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10#include <linux/config.h>
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/delay.h>
16#include <linux/string.h>
17#include <linux/timer.h>
18#include <linux/proc_fs.h>
19#include <linux/init.h>
20#include <linux/crc32.h>
21#include <asm/prom.h>
22#include <asm/dbdma.h>
23#include <asm/io.h>
24#include <asm/page.h>
25#include <asm/pgtable.h>
26#include <asm/machdep.h>
27#include <asm/pmac_feature.h>
28#ifdef CONFIG_PMAC_PBOOK
29#include <linux/adb.h>
30#include <linux/pmu.h>
31#include <asm/irq.h>
32#endif
33#include "bmac.h"
34
35#define trunc_page(x) ((void *)(((unsigned long)(x)) & ~((unsigned long)(PAGE_SIZE - 1))))
36#define round_page(x) trunc_page(((unsigned long)(x)) + ((unsigned long)(PAGE_SIZE - 1)))
37
38
39
40
41#define ENET_CRCPOLY 0x04c11db7
42
43
44#define SUNHME_MULTICAST
45
46#define N_RX_RING 64
47#define N_TX_RING 32
48#define MAX_TX_ACTIVE 1
49#define ETHERCRC 4
50#define ETHERMINPACKET 64
51#define ETHERMTU 1500
52#define RX_BUFLEN (ETHERMTU + 14 + ETHERCRC + 2)
53#define TX_TIMEOUT HZ
54
55
56#define TX_DMA_ERR 0x80
57
58#define XXDEBUG(args)
59
60struct bmac_data {
61
62 struct sk_buff_head *queue;
63 volatile struct dbdma_regs *tx_dma;
64 int tx_dma_intr;
65 volatile struct dbdma_regs *rx_dma;
66 int rx_dma_intr;
67 volatile struct dbdma_cmd *tx_cmds;
68 volatile struct dbdma_cmd *rx_cmds;
69 struct device_node *node;
70 int is_bmac_plus;
71 struct sk_buff *rx_bufs[N_RX_RING];
72 int rx_fill;
73 int rx_empty;
74 struct sk_buff *tx_bufs[N_TX_RING];
75 int tx_fill;
76 int tx_empty;
77 unsigned char tx_fullup;
78 struct net_device_stats stats;
79 struct timer_list tx_timeout;
80 int timeout_active;
81 int sleeping;
82 int opened;
83 unsigned short hash_use_count[64];
84 unsigned short hash_table_mask[4];
85 struct net_device *next_bmac;
86};
87
88typedef struct bmac_reg_entry {
89 char *name;
90 unsigned short reg_offset;
91} bmac_reg_entry_t;
92
93#define N_REG_ENTRIES 31
94
95static bmac_reg_entry_t reg_entries[N_REG_ENTRIES] = {
96 {"MEMADD", MEMADD},
97 {"MEMDATAHI", MEMDATAHI},
98 {"MEMDATALO", MEMDATALO},
99 {"TXPNTR", TXPNTR},
100 {"RXPNTR", RXPNTR},
101 {"IPG1", IPG1},
102 {"IPG2", IPG2},
103 {"ALIMIT", ALIMIT},
104 {"SLOT", SLOT},
105 {"PALEN", PALEN},
106 {"PAPAT", PAPAT},
107 {"TXSFD", TXSFD},
108 {"JAM", JAM},
109 {"TXCFG", TXCFG},
110 {"TXMAX", TXMAX},
111 {"TXMIN", TXMIN},
112 {"PAREG", PAREG},
113 {"DCNT", DCNT},
114 {"NCCNT", NCCNT},
115 {"NTCNT", NTCNT},
116 {"EXCNT", EXCNT},
117 {"LTCNT", LTCNT},
118 {"TXSM", TXSM},
119 {"RXCFG", RXCFG},
120 {"RXMAX", RXMAX},
121 {"RXMIN", RXMIN},
122 {"FRCNT", FRCNT},
123 {"AECNT", AECNT},
124 {"FECNT", FECNT},
125 {"RXSM", RXSM},
126 {"RXCV", RXCV}
127};
128
129static struct net_device *bmac_devs;
130static unsigned char *bmac_emergency_rxbuf;
131
132#ifdef CONFIG_PMAC_PBOOK
133static int bmac_sleep_notify(struct pmu_sleep_notifier *self, int when);
134static struct pmu_sleep_notifier bmac_sleep_notifier = {
135 bmac_sleep_notify, SLEEP_LEVEL_NET,
136};
137#endif
138
139
140
141
142
143
144
145#define PRIV_BYTES (sizeof(struct bmac_data) \
146 + (N_RX_RING + N_TX_RING + 4) * sizeof(struct dbdma_cmd) \
147 + sizeof(struct sk_buff_head))
148
149static unsigned char bitrev(unsigned char b);
150static void bmac_probe1(struct device_node *bmac, int is_bmac_plus);
151static int bmac_open(struct net_device *dev);
152static int bmac_close(struct net_device *dev);
153static int bmac_transmit_packet(struct sk_buff *skb, struct net_device *dev);
154static struct net_device_stats *bmac_stats(struct net_device *dev);
155static void bmac_set_multicast(struct net_device *dev);
156static void bmac_reset_and_enable(struct net_device *dev);
157static void bmac_start_chip(struct net_device *dev);
158static void bmac_init_chip(struct net_device *dev);
159static void bmac_init_registers(struct net_device *dev);
160static void bmac_enable_and_reset_chip(struct net_device *dev);
161static int bmac_set_address(struct net_device *dev, void *addr);
162static void bmac_misc_intr(int irq, void *dev_id, struct pt_regs *regs);
163static void bmac_txdma_intr(int irq, void *dev_id, struct pt_regs *regs);
164static void bmac_rxdma_intr(int irq, void *dev_id, struct pt_regs *regs);
165static void bmac_set_timeout(struct net_device *dev);
166static void bmac_tx_timeout(unsigned long data);
167static int bmac_proc_info ( char *buffer, char **start, off_t offset, int length);
168static int bmac_output(struct sk_buff *skb, struct net_device *dev);
169static void bmac_start(struct net_device *dev);
170
171#define DBDMA_SET(x) ( ((x) | (x) << 16) )
172#define DBDMA_CLEAR(x) ( (x) << 16)
173
174static inline void
175dbdma_st32(volatile unsigned long *a, unsigned long x)
176{
177 __asm__ volatile( "stwbrx %0,0,%1" : : "r" (x), "r" (a) : "memory");
178 return;
179}
180
181static inline unsigned long
182dbdma_ld32(volatile unsigned long *a)
183{
184 unsigned long swap;
185 __asm__ volatile ("lwbrx %0,0,%1" : "=r" (swap) : "r" (a));
186 return swap;
187}
188
189static void
190dbdma_continue(volatile struct dbdma_regs *dmap)
191{
192 dbdma_st32((volatile unsigned long *)&dmap->control,
193 DBDMA_SET(RUN|WAKE) | DBDMA_CLEAR(PAUSE|DEAD));
194 eieio();
195}
196
197static void
198dbdma_reset(volatile struct dbdma_regs *dmap)
199{
200 dbdma_st32((volatile unsigned long *)&dmap->control,
201 DBDMA_CLEAR(ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN));
202 eieio();
203 while (dbdma_ld32((volatile unsigned long *)&dmap->status) & RUN)
204 eieio();
205}
206
207static void
208dbdma_setcmd(volatile struct dbdma_cmd *cp,
209 unsigned short cmd, unsigned count, unsigned long addr,
210 unsigned long cmd_dep)
211{
212 out_le16(&cp->command, cmd);
213 out_le16(&cp->req_count, count);
214 out_le32(&cp->phy_addr, addr);
215 out_le32(&cp->cmd_dep, cmd_dep);
216 out_le16(&cp->xfer_status, 0);
217 out_le16(&cp->res_count, 0);
218}
219
220static inline
221void bmwrite(struct net_device *dev, unsigned long reg_offset, unsigned data )
222{
223 out_le16((void *)dev->base_addr + reg_offset, data);
224}
225
226
227static inline
228volatile unsigned short bmread(struct net_device *dev, unsigned long reg_offset )
229{
230 return in_le16((void *)dev->base_addr + reg_offset);
231}
232
233static void
234bmac_enable_and_reset_chip(struct net_device *dev)
235{
236 struct bmac_data *bp = (struct bmac_data *) dev->priv;
237 volatile struct dbdma_regs *rd = bp->rx_dma;
238 volatile struct dbdma_regs *td = bp->tx_dma;
239
240 if (rd)
241 dbdma_reset(rd);
242 if (td)
243 dbdma_reset(td);
244
245 pmac_call_feature(PMAC_FTR_BMAC_ENABLE, bp->node, 0, 1);
246}
247
248#define MIFDELAY udelay(10)
249
250static unsigned int
251bmac_mif_readbits(struct net_device *dev, int nb)
252{
253 unsigned int val = 0;
254
255 while (--nb >= 0) {
256 bmwrite(dev, MIFCSR, 0);
257 MIFDELAY;
258 if (bmread(dev, MIFCSR) & 8)
259 val |= 1 << nb;
260 bmwrite(dev, MIFCSR, 1);
261 MIFDELAY;
262 }
263 bmwrite(dev, MIFCSR, 0);
264 MIFDELAY;
265 bmwrite(dev, MIFCSR, 1);
266 MIFDELAY;
267 return val;
268}
269
270static void
271bmac_mif_writebits(struct net_device *dev, unsigned int val, int nb)
272{
273 int b;
274
275 while (--nb >= 0) {
276 b = (val & (1 << nb))? 6: 4;
277 bmwrite(dev, MIFCSR, b);
278 MIFDELAY;
279 bmwrite(dev, MIFCSR, b|1);
280 MIFDELAY;
281 }
282}
283
284static unsigned int
285bmac_mif_read(struct net_device *dev, unsigned int addr)
286{
287 unsigned int val;
288
289 bmwrite(dev, MIFCSR, 4);
290 MIFDELAY;
291 bmac_mif_writebits(dev, ~0U, 32);
292 bmac_mif_writebits(dev, 6, 4);
293 bmac_mif_writebits(dev, addr, 10);
294 bmwrite(dev, MIFCSR, 2);
295 MIFDELAY;
296 bmwrite(dev, MIFCSR, 1);
297 MIFDELAY;
298 val = bmac_mif_readbits(dev, 17);
299 bmwrite(dev, MIFCSR, 4);
300 MIFDELAY;
301 return val;
302}
303
304static void
305bmac_mif_write(struct net_device *dev, unsigned int addr, unsigned int val)
306{
307 bmwrite(dev, MIFCSR, 4);
308 MIFDELAY;
309 bmac_mif_writebits(dev, ~0U, 32);
310 bmac_mif_writebits(dev, 5, 4);
311 bmac_mif_writebits(dev, addr, 10);
312 bmac_mif_writebits(dev, 2, 2);
313 bmac_mif_writebits(dev, val, 16);
314 bmac_mif_writebits(dev, 3, 2);
315}
316
317static void
318bmac_init_registers(struct net_device *dev)
319{
320 struct bmac_data *bp = (struct bmac_data *) dev->priv;
321 volatile unsigned short regValue;
322 unsigned short *pWord16;
323 int i;
324
325
326
327 bmwrite(dev, RXRST, RxResetValue);
328 bmwrite(dev, TXRST, TxResetBit);
329
330 i = 100;
331 do {
332 --i;
333 udelay(10000);
334 regValue = bmread(dev, TXRST);
335 } while ((regValue & TxResetBit) && i > 0);
336
337 if (!bp->is_bmac_plus) {
338 regValue = bmread(dev, XCVRIF);
339 regValue |= ClkBit | SerialMode | COLActiveLow;
340 bmwrite(dev, XCVRIF, regValue);
341 udelay(10000);
342 }
343
344 bmwrite(dev, RSEED, (unsigned short)0x1968);
345
346 regValue = bmread(dev, XIFC);
347 regValue |= TxOutputEnable;
348 bmwrite(dev, XIFC, regValue);
349
350 bmread(dev, PAREG);
351
352
353 bmwrite(dev, NCCNT, 0);
354 bmwrite(dev, NTCNT, 0);
355 bmwrite(dev, EXCNT, 0);
356 bmwrite(dev, LTCNT, 0);
357
358
359 bmwrite(dev, FRCNT, 0);
360 bmwrite(dev, LECNT, 0);
361 bmwrite(dev, AECNT, 0);
362 bmwrite(dev, FECNT, 0);
363 bmwrite(dev, RXCV, 0);
364
365
366 bmwrite(dev, TXTH, 4);
367
368 bmwrite(dev, TXFIFOCSR, 0);
369 bmwrite(dev, TXFIFOCSR, TxFIFOEnable );
370
371
372 bmwrite(dev, RXFIFOCSR, 0);
373 bmwrite(dev, RXFIFOCSR, RxFIFOEnable );
374
375
376 bmread(dev, STATUS);
377
378
379 for (i=0; i<4; i++) bp->hash_table_mask[i] = 0;
380 bmwrite(dev, BHASH3, bp->hash_table_mask[0]);
381 bmwrite(dev, BHASH2, bp->hash_table_mask[1]);
382 bmwrite(dev, BHASH1, bp->hash_table_mask[2]);
383 bmwrite(dev, BHASH0, bp->hash_table_mask[3]);
384
385 pWord16 = (unsigned short *)dev->dev_addr;
386 bmwrite(dev, MADD0, *pWord16++);
387 bmwrite(dev, MADD1, *pWord16++);
388 bmwrite(dev, MADD2, *pWord16);
389
390 bmwrite(dev, RXCFG, RxCRCNoStrip | RxHashFilterEnable | RxRejectOwnPackets);
391
392 bmwrite(dev, INTDISABLE, EnableNormal);
393
394 return;
395}
396
397#if 0
398static void
399bmac_disable_interrupts(struct net_device *dev)
400{
401 bmwrite(dev, INTDISABLE, DisableAll);
402}
403
404static void
405bmac_enable_interrupts(struct net_device *dev)
406{
407 bmwrite(dev, INTDISABLE, EnableNormal);
408}
409#endif
410
411
412static void
413bmac_start_chip(struct net_device *dev)
414{
415 struct bmac_data *bp = (struct bmac_data *) dev->priv;
416 volatile struct dbdma_regs *rd = bp->rx_dma;
417 unsigned short oldConfig;
418
419
420 dbdma_continue(rd);
421
422 oldConfig = bmread(dev, TXCFG);
423 bmwrite(dev, TXCFG, oldConfig | TxMACEnable );
424
425
426 oldConfig = bmread(dev, RXCFG);
427 bmwrite(dev, RXCFG, oldConfig | RxMACEnable );
428 udelay(20000);
429}
430
431static void
432bmac_init_phy(struct net_device *dev)
433{
434 unsigned int addr;
435 struct bmac_data *bp = (struct bmac_data *) dev->priv;
436
437 printk(KERN_DEBUG "phy registers:");
438 for (addr = 0; addr < 32; ++addr) {
439 if ((addr & 7) == 0)
440 printk("\n" KERN_DEBUG);
441 printk(" %.4x", bmac_mif_read(dev, addr));
442 }
443 printk("\n");
444 if (bp->is_bmac_plus) {
445 unsigned int capable, ctrl;
446
447 ctrl = bmac_mif_read(dev, 0);
448 capable = ((bmac_mif_read(dev, 1) & 0xf800) >> 6) | 1;
449 if (bmac_mif_read(dev, 4) != capable
450 || (ctrl & 0x1000) == 0) {
451 bmac_mif_write(dev, 4, capable);
452 bmac_mif_write(dev, 0, 0x1200);
453 } else
454 bmac_mif_write(dev, 0, 0x1000);
455 }
456}
457
458static void
459bmac_init_chip(struct net_device *dev)
460{
461 bmac_init_phy(dev);
462 bmac_init_registers(dev);
463}
464
465#ifdef CONFIG_PMAC_PBOOK
466static int
467bmac_sleep_notify(struct pmu_sleep_notifier *self, int when)
468{
469 struct bmac_data *bp;
470 unsigned long flags;
471 unsigned short config;
472 struct net_device* dev = bmac_devs;
473 int i;
474
475 if (bmac_devs == 0)
476 return PBOOK_SLEEP_OK;
477
478 bp = (struct bmac_data *) dev->priv;
479
480 switch (when) {
481 case PBOOK_SLEEP_REQUEST:
482 break;
483 case PBOOK_SLEEP_REJECT:
484 break;
485 case PBOOK_SLEEP_NOW:
486 netif_device_detach(dev);
487
488 save_flags(flags); cli();
489 if (bp->timeout_active) {
490 del_timer(&bp->tx_timeout);
491 bp->timeout_active = 0;
492 }
493 disable_irq(dev->irq);
494 disable_irq(bp->tx_dma_intr);
495 disable_irq(bp->rx_dma_intr);
496 bp->sleeping = 1;
497 restore_flags(flags);
498 if (bp->opened) {
499 volatile struct dbdma_regs *rd = bp->rx_dma;
500 volatile struct dbdma_regs *td = bp->tx_dma;
501
502 config = bmread(dev, RXCFG);
503 bmwrite(dev, RXCFG, (config & ~RxMACEnable));
504 config = bmread(dev, TXCFG);
505 bmwrite(dev, TXCFG, (config & ~TxMACEnable));
506 bmwrite(dev, INTDISABLE, DisableAll);
507
508 st_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE));
509 st_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE));
510
511 for (i=0; i<N_RX_RING; i++) {
512 if (bp->rx_bufs[i] != NULL) {
513 dev_kfree_skb(bp->rx_bufs[i]);
514 bp->rx_bufs[i] = NULL;
515 }
516 }
517 for (i = 0; i<N_TX_RING; i++) {
518 if (bp->tx_bufs[i] != NULL) {
519 dev_kfree_skb(bp->tx_bufs[i]);
520 bp->tx_bufs[i] = NULL;
521 }
522 }
523 }
524 pmac_call_feature(PMAC_FTR_BMAC_ENABLE, bp->node, 0, 0);
525 break;
526 case PBOOK_WAKE:
527
528 if (bp->opened)
529 bmac_reset_and_enable(dev);
530 enable_irq(dev->irq);
531 enable_irq(bp->tx_dma_intr);
532 enable_irq(bp->rx_dma_intr);
533 netif_device_attach(dev);
534 break;
535 }
536 return PBOOK_SLEEP_OK;
537}
538#endif
539
540static int bmac_set_address(struct net_device *dev, void *addr)
541{
542 unsigned char *p = addr;
543 unsigned short *pWord16;
544 unsigned long flags;
545 int i;
546
547 XXDEBUG(("bmac: enter set_address\n"));
548 save_flags(flags); cli();
549
550 for (i = 0; i < 6; ++i) {
551 dev->dev_addr[i] = p[i];
552 }
553
554 pWord16 = (unsigned short *)dev->dev_addr;
555 bmwrite(dev, MADD0, *pWord16++);
556 bmwrite(dev, MADD1, *pWord16++);
557 bmwrite(dev, MADD2, *pWord16);
558
559 restore_flags(flags);
560 XXDEBUG(("bmac: exit set_address\n"));
561 return 0;
562}
563
564static inline void bmac_set_timeout(struct net_device *dev)
565{
566 struct bmac_data *bp = (struct bmac_data *) dev->priv;
567 unsigned long flags;
568
569 save_flags(flags);
570 cli();
571 if (bp->timeout_active)
572 del_timer(&bp->tx_timeout);
573 bp->tx_timeout.expires = jiffies + TX_TIMEOUT;
574 bp->tx_timeout.function = bmac_tx_timeout;
575 bp->tx_timeout.data = (unsigned long) dev;
576 add_timer(&bp->tx_timeout);
577 bp->timeout_active = 1;
578 restore_flags(flags);
579}
580
581static void
582bmac_construct_xmt(struct sk_buff *skb, volatile struct dbdma_cmd *cp)
583{
584 void *vaddr;
585 unsigned long baddr;
586 unsigned long len;
587
588 len = skb->len;
589 vaddr = skb->data;
590 baddr = virt_to_bus(vaddr);
591
592 dbdma_setcmd(cp, (OUTPUT_LAST | INTR_ALWAYS | WAIT_IFCLR), len, baddr, 0);
593}
594
595static void
596bmac_construct_rxbuff(struct sk_buff *skb, volatile struct dbdma_cmd *cp)
597{
598 unsigned char *addr = skb? skb->data: bmac_emergency_rxbuf;
599
600 dbdma_setcmd(cp, (INPUT_LAST | INTR_ALWAYS), RX_BUFLEN,
601 virt_to_bus(addr), 0);
602}
603
604
605static unsigned char
606bitrev(unsigned char b)
607{
608 int d = 0, i;
609
610 for (i = 0; i < 8; ++i, b >>= 1)
611 d = (d << 1) | (b & 1);
612 return d;
613}
614
615
616static void
617bmac_init_tx_ring(struct bmac_data *bp)
618{
619 volatile struct dbdma_regs *td = bp->tx_dma;
620
621 memset((char *)bp->tx_cmds, 0, (N_TX_RING+1) * sizeof(struct dbdma_cmd));
622
623 bp->tx_empty = 0;
624 bp->tx_fill = 0;
625 bp->tx_fullup = 0;
626
627
628 dbdma_setcmd(&bp->tx_cmds[N_TX_RING],
629 (DBDMA_NOP | BR_ALWAYS), 0, 0, virt_to_bus(bp->tx_cmds));
630
631
632 dbdma_reset(td);
633 out_le32(&td->wait_sel, 0x00200020);
634 out_le32(&td->cmdptr, virt_to_bus(bp->tx_cmds));
635}
636
637static int
638bmac_init_rx_ring(struct bmac_data *bp)
639{
640 volatile struct dbdma_regs *rd = bp->rx_dma;
641 int i;
642 struct sk_buff *skb;
643
644
645 memset((char *)bp->rx_cmds, 0,
646 (N_RX_RING + 1) * sizeof(struct dbdma_cmd));
647 for (i = 0; i < N_RX_RING; i++) {
648 if ((skb = bp->rx_bufs[i]) == NULL) {
649 bp->rx_bufs[i] = skb = dev_alloc_skb(RX_BUFLEN+2);
650 if (skb != NULL)
651 skb_reserve(skb, 2);
652 }
653 bmac_construct_rxbuff(skb, &bp->rx_cmds[i]);
654 }
655
656 bp->rx_empty = 0;
657 bp->rx_fill = i;
658
659
660 dbdma_setcmd(&bp->rx_cmds[N_RX_RING],
661 (DBDMA_NOP | BR_ALWAYS), 0, 0, virt_to_bus(bp->rx_cmds));
662
663
664 dbdma_reset(rd);
665 out_le32(&rd->cmdptr, virt_to_bus(bp->rx_cmds));
666
667 return 1;
668}
669
670
671static int bmac_transmit_packet(struct sk_buff *skb, struct net_device *dev)
672{
673 struct bmac_data *bp = (struct bmac_data *) dev->priv;
674 volatile struct dbdma_regs *td = bp->tx_dma;
675 int i;
676
677
678
679
680 i = bp->tx_fill + 1;
681 if (i >= N_TX_RING)
682 i = 0;
683 if (i == bp->tx_empty) {
684 netif_stop_queue(dev);
685 bp->tx_fullup = 1;
686 XXDEBUG(("bmac_transmit_packet: tx ring full\n"));
687 return -1;
688 }
689
690 dbdma_setcmd(&bp->tx_cmds[i], DBDMA_STOP, 0, 0, 0);
691
692 bmac_construct_xmt(skb, &bp->tx_cmds[bp->tx_fill]);
693
694 bp->tx_bufs[bp->tx_fill] = skb;
695 bp->tx_fill = i;
696
697 bp->stats.tx_bytes += skb->len;
698
699 dbdma_continue(td);
700
701 return 0;
702}
703
704static int rxintcount;
705
706static void bmac_rxdma_intr(int irq, void *dev_id, struct pt_regs *regs)
707{
708 struct net_device *dev = (struct net_device *) dev_id;
709 struct bmac_data *bp = (struct bmac_data *) dev->priv;
710 volatile struct dbdma_regs *rd = bp->rx_dma;
711 volatile struct dbdma_cmd *cp;
712 int i, nb, stat;
713 struct sk_buff *skb;
714 unsigned int residual;
715 int last;
716 unsigned long flags;
717
718 save_flags(flags); cli();
719
720 if (++rxintcount < 10) {
721 XXDEBUG(("bmac_rxdma_intr\n"));
722 }
723
724 last = -1;
725 i = bp->rx_empty;
726
727 while (1) {
728 cp = &bp->rx_cmds[i];
729 stat = ld_le16(&cp->xfer_status);
730 residual = ld_le16(&cp->res_count);
731 if ((stat & ACTIVE) == 0)
732 break;
733 nb = RX_BUFLEN - residual - 2;
734 if (nb < (ETHERMINPACKET - ETHERCRC)) {
735 skb = NULL;
736 bp->stats.rx_length_errors++;
737 bp->stats.rx_errors++;
738 } else {
739 skb = bp->rx_bufs[i];
740 bp->rx_bufs[i] = NULL;
741 }
742 if (skb != NULL) {
743 nb -= ETHERCRC;
744 skb_put(skb, nb);
745 skb->dev = dev;
746 skb->protocol = eth_type_trans(skb, dev);
747 netif_rx(skb);
748 dev->last_rx = jiffies;
749 ++bp->stats.rx_packets;
750 bp->stats.rx_bytes += nb;
751 } else {
752 ++bp->stats.rx_dropped;
753 }
754 dev->last_rx = jiffies;
755 if ((skb = bp->rx_bufs[i]) == NULL) {
756 bp->rx_bufs[i] = skb = dev_alloc_skb(RX_BUFLEN+2);
757 if (skb != NULL)
758 skb_reserve(bp->rx_bufs[i], 2);
759 }
760 bmac_construct_rxbuff(skb, &bp->rx_cmds[i]);
761 st_le16(&cp->res_count, 0);
762 st_le16(&cp->xfer_status, 0);
763 last = i;
764 if (++i >= N_RX_RING) i = 0;
765 }
766
767 if (last != -1) {
768 bp->rx_fill = last;
769 bp->rx_empty = i;
770 }
771
772 restore_flags(flags);
773
774 dbdma_continue(rd);
775
776 if (rxintcount < 10) {
777 XXDEBUG(("bmac_rxdma_intr done\n"));
778 }
779}
780
781static int txintcount;
782
783static void bmac_txdma_intr(int irq, void *dev_id, struct pt_regs *regs)
784{
785 struct net_device *dev = (struct net_device *) dev_id;
786 struct bmac_data *bp = (struct bmac_data *) dev->priv;
787 volatile struct dbdma_cmd *cp;
788 int stat;
789 unsigned long flags;
790
791 save_flags(flags); cli();
792
793 if (txintcount++ < 10) {
794 XXDEBUG(("bmac_txdma_intr\n"));
795 }
796
797
798
799
800 while (1) {
801 cp = &bp->tx_cmds[bp->tx_empty];
802 stat = ld_le16(&cp->xfer_status);
803 if (txintcount < 10) {
804 XXDEBUG(("bmac_txdma_xfer_stat=%#0x\n", stat));
805 }
806 if (!(stat & ACTIVE)) {
807
808
809
810 if (cp == bus_to_virt(in_le32(&bp->tx_dma->cmdptr)))
811 break;
812 }
813
814 if (bp->tx_bufs[bp->tx_empty]) {
815 ++bp->stats.tx_packets;
816 dev_kfree_skb_irq(bp->tx_bufs[bp->tx_empty]);
817 }
818 bp->tx_bufs[bp->tx_empty] = NULL;
819 bp->tx_fullup = 0;
820 netif_wake_queue(dev);
821 if (++bp->tx_empty >= N_TX_RING)
822 bp->tx_empty = 0;
823 if (bp->tx_empty == bp->tx_fill)
824 break;
825 }
826
827 restore_flags(flags);
828
829 if (txintcount < 10) {
830 XXDEBUG(("bmac_txdma_intr done->bmac_start\n"));
831 }
832
833 bmac_start(dev);
834}
835
836static struct net_device_stats *bmac_stats(struct net_device *dev)
837{
838 struct bmac_data *p = (struct bmac_data *) dev->priv;
839
840 return &p->stats;
841}
842
843#ifndef SUNHME_MULTICAST
844
845static int reverse6[64] = {
846 0x0,0x20,0x10,0x30,0x8,0x28,0x18,0x38,
847 0x4,0x24,0x14,0x34,0xc,0x2c,0x1c,0x3c,
848 0x2,0x22,0x12,0x32,0xa,0x2a,0x1a,0x3a,
849 0x6,0x26,0x16,0x36,0xe,0x2e,0x1e,0x3e,
850 0x1,0x21,0x11,0x31,0x9,0x29,0x19,0x39,
851 0x5,0x25,0x15,0x35,0xd,0x2d,0x1d,0x3d,
852 0x3,0x23,0x13,0x33,0xb,0x2b,0x1b,0x3b,
853 0x7,0x27,0x17,0x37,0xf,0x2f,0x1f,0x3f
854};
855
856static unsigned int
857crc416(unsigned int curval, unsigned short nxtval)
858{
859 register unsigned int counter, cur = curval, next = nxtval;
860 register int high_crc_set, low_data_set;
861
862
863 next = ((next & 0x00FF) << 8) | (next >> 8);
864
865
866 for (counter = 0; counter < 16; ++counter) {
867
868 if ((cur & 0x80000000) == 0) high_crc_set = 0;
869 else high_crc_set = 1;
870
871 cur = cur << 1;
872
873 if ((next & 0x0001) == 0) low_data_set = 0;
874 else low_data_set = 1;
875
876 next = next >> 1;
877
878
879 if (high_crc_set ^ low_data_set) cur = cur ^ ENET_CRCPOLY;
880 }
881 return cur;
882}
883
884static unsigned int
885bmac_crc(unsigned short *address)
886{
887 unsigned int newcrc;
888
889 XXDEBUG(("bmac_crc: addr=%#04x, %#04x, %#04x\n", *address, address[1], address[2]));
890 newcrc = crc416(0xffffffff, *address);
891 newcrc = crc416(newcrc, address[1]);
892 newcrc = crc416(newcrc, address[2]);
893
894 return(newcrc);
895}
896
897
898
899
900
901
902static void
903bmac_addhash(struct bmac_data *bp, unsigned char *addr)
904{
905 unsigned int crc;
906 unsigned short mask;
907
908 if (!(*addr)) return;
909 crc = bmac_crc((unsigned short *)addr) & 0x3f;
910 crc = reverse6[crc];
911 if (bp->hash_use_count[crc]++) return;
912 mask = crc % 16;
913 mask = (unsigned char)1 << mask;
914 bp->hash_use_count[crc/16] |= mask;
915}
916
917static void
918bmac_removehash(struct bmac_data *bp, unsigned char *addr)
919{
920 unsigned int crc;
921 unsigned char mask;
922
923
924 crc = bmac_crc((unsigned short *)addr) & 0x3f;
925 crc = reverse6[crc];
926 if (bp->hash_use_count[crc] == 0) return;
927 if (--bp->hash_use_count[crc]) return;
928 mask = crc % 16;
929 mask = ((unsigned char)1 << mask) ^ 0xffff;
930 bp->hash_table_mask[crc/16] &= mask;
931}
932
933
934
935
936
937
938static void
939bmac_rx_off(struct net_device *dev)
940{
941 unsigned short rx_cfg;
942
943 rx_cfg = bmread(dev, RXCFG);
944 rx_cfg &= ~RxMACEnable;
945 bmwrite(dev, RXCFG, rx_cfg);
946 do {
947 rx_cfg = bmread(dev, RXCFG);
948 } while (rx_cfg & RxMACEnable);
949}
950
951unsigned short
952bmac_rx_on(struct net_device *dev, int hash_enable, int promisc_enable)
953{
954 unsigned short rx_cfg;
955
956 rx_cfg = bmread(dev, RXCFG);
957 rx_cfg |= RxMACEnable;
958 if (hash_enable) rx_cfg |= RxHashFilterEnable;
959 else rx_cfg &= ~RxHashFilterEnable;
960 if (promisc_enable) rx_cfg |= RxPromiscEnable;
961 else rx_cfg &= ~RxPromiscEnable;
962 bmwrite(dev, RXRST, RxResetValue);
963 bmwrite(dev, RXFIFOCSR, 0);
964 bmwrite(dev, RXFIFOCSR, RxFIFOEnable );
965 bmwrite(dev, RXCFG, rx_cfg );
966 return rx_cfg;
967}
968
969static void
970bmac_update_hash_table_mask(struct net_device *dev, struct bmac_data *bp)
971{
972 bmwrite(dev, BHASH3, bp->hash_table_mask[0]);
973 bmwrite(dev, BHASH2, bp->hash_table_mask[1]);
974 bmwrite(dev, BHASH1, bp->hash_table_mask[2]);
975 bmwrite(dev, BHASH0, bp->hash_table_mask[3]);
976}
977
978#if 0
979static void
980bmac_add_multi(struct net_device *dev,
981 struct bmac_data *bp, unsigned char *addr)
982{
983
984 bmac_addhash(bp, addr);
985 bmac_rx_off(dev);
986 bmac_update_hash_table_mask(dev, bp);
987 bmac_rx_on(dev, 1, (dev->flags & IFF_PROMISC)? 1 : 0);
988
989}
990
991static void
992bmac_remove_multi(struct net_device *dev,
993 struct bmac_data *bp, unsigned char *addr)
994{
995 bmac_removehash(bp, addr);
996 bmac_rx_off(dev);
997 bmac_update_hash_table_mask(dev, bp);
998 bmac_rx_on(dev, 1, (dev->flags & IFF_PROMISC)? 1 : 0);
999}
1000#endif
1001
1002
1003
1004
1005
1006
1007
1008static void bmac_set_multicast(struct net_device *dev)
1009{
1010 struct dev_mc_list *dmi;
1011 struct bmac_data *bp = (struct bmac_data *) dev->priv;
1012 int num_addrs = dev->mc_count;
1013 unsigned short rx_cfg;
1014 int i;
1015
1016 if (bp->sleeping)
1017 return;
1018
1019 XXDEBUG(("bmac: enter bmac_set_multicast, n_addrs=%d\n", num_addrs));
1020
1021 if((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
1022 for (i=0; i<4; i++) bp->hash_table_mask[i] = 0xffff;
1023 bmac_update_hash_table_mask(dev, bp);
1024 rx_cfg = bmac_rx_on(dev, 1, 0);
1025 XXDEBUG(("bmac: all multi, rx_cfg=%#08x\n"));
1026 } else if ((dev->flags & IFF_PROMISC) || (num_addrs < 0)) {
1027 rx_cfg = bmread(dev, RXCFG);
1028 rx_cfg |= RxPromiscEnable;
1029 bmwrite(dev, RXCFG, rx_cfg);
1030 rx_cfg = bmac_rx_on(dev, 0, 1);
1031 XXDEBUG(("bmac: promisc mode enabled, rx_cfg=%#08x\n", rx_cfg));
1032 } else {
1033 for (i=0; i<4; i++) bp->hash_table_mask[i] = 0;
1034 for (i=0; i<64; i++) bp->hash_use_count[i] = 0;
1035 if (num_addrs == 0) {
1036 rx_cfg = bmac_rx_on(dev, 0, 0);
1037 XXDEBUG(("bmac: multi disabled, rx_cfg=%#08x\n", rx_cfg));
1038 } else {
1039 for (dmi=dev->mc_list; dmi!=NULL; dmi=dmi->next)
1040 bmac_addhash(bp, dmi->dmi_addr);
1041 bmac_update_hash_table_mask(dev, bp);
1042 rx_cfg = bmac_rx_on(dev, 1, 0);
1043 XXDEBUG(("bmac: multi enabled, rx_cfg=%#08x\n", rx_cfg));
1044 }
1045 }
1046
1047}
1048#else
1049
1050
1051
1052static void bmac_set_multicast(struct net_device *dev)
1053{
1054 struct dev_mc_list *dmi = dev->mc_list;
1055 char *addrs;
1056 int i, j, bit, byte;
1057 unsigned short rx_cfg;
1058 u32 crc;
1059
1060 if((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
1061 bmwrite(dev, BHASH0, 0xffff);
1062 bmwrite(dev, BHASH1, 0xffff);
1063 bmwrite(dev, BHASH2, 0xffff);
1064 bmwrite(dev, BHASH3, 0xffff);
1065 } else if(dev->flags & IFF_PROMISC) {
1066 rx_cfg = bmread(dev, RXCFG);
1067 rx_cfg |= RxPromiscEnable;
1068 bmwrite(dev, RXCFG, rx_cfg);
1069 } else {
1070 u16 hash_table[4];
1071
1072 rx_cfg = bmread(dev, RXCFG);
1073 rx_cfg &= ~RxPromiscEnable;
1074 bmwrite(dev, RXCFG, rx_cfg);
1075
1076 for(i = 0; i < 4; i++) hash_table[i] = 0;
1077
1078 for(i = 0; i < dev->mc_count; i++) {
1079 addrs = dmi->dmi_addr;
1080 dmi = dmi->next;
1081
1082 if(!(*addrs & 1))
1083 continue;
1084
1085 crc = ether_crc_le(6, addrs);
1086 crc >>= 26;
1087 hash_table[crc >> 4] |= 1 << (crc & 0xf);
1088 }
1089 bmwrite(dev, BHASH0, hash_table[0]);
1090 bmwrite(dev, BHASH1, hash_table[1]);
1091 bmwrite(dev, BHASH2, hash_table[2]);
1092 bmwrite(dev, BHASH3, hash_table[3]);
1093 }
1094}
1095#endif
1096
1097static int miscintcount;
1098
1099static void bmac_misc_intr(int irq, void *dev_id, struct pt_regs *regs)
1100{
1101 struct net_device *dev = (struct net_device *) dev_id;
1102 struct bmac_data *bp = (struct bmac_data *)dev->priv;
1103 unsigned int status = bmread(dev, STATUS);
1104 if (miscintcount++ < 10) {
1105 XXDEBUG(("bmac_misc_intr\n"));
1106 }
1107
1108
1109
1110 if (status & RxErrorMask) bp->stats.rx_errors++;
1111 if (status & RxCRCCntExp) bp->stats.rx_crc_errors++;
1112 if (status & RxLenCntExp) bp->stats.rx_length_errors++;
1113 if (status & RxOverFlow) bp->stats.rx_over_errors++;
1114 if (status & RxAlignCntExp) bp->stats.rx_frame_errors++;
1115
1116
1117 if (status & TxErrorMask) bp->stats.tx_errors++;
1118 if (status & TxUnderrun) bp->stats.tx_fifo_errors++;
1119 if (status & TxNormalCollExp) bp->stats.collisions++;
1120}
1121
1122
1123
1124
1125#define SROMAddressLength 5
1126#define DataInOn 0x0008
1127#define DataInOff 0x0000
1128#define Clk 0x0002
1129#define ChipSelect 0x0001
1130#define SDIShiftCount 3
1131#define SD0ShiftCount 2
1132#define DelayValue 1000
1133#define SROMStartOffset 10
1134#define SROMReadCount 3
1135#define SROMAddressBits 6
1136#define EnetAddressOffset 20
1137
1138static unsigned char
1139bmac_clock_out_bit(struct net_device *dev)
1140{
1141 unsigned short data;
1142 unsigned short val;
1143
1144 bmwrite(dev, SROMCSR, ChipSelect | Clk);
1145 udelay(DelayValue);
1146
1147 data = bmread(dev, SROMCSR);
1148 udelay(DelayValue);
1149 val = (data >> SD0ShiftCount) & 1;
1150
1151 bmwrite(dev, SROMCSR, ChipSelect);
1152 udelay(DelayValue);
1153
1154 return val;
1155}
1156
1157static void
1158bmac_clock_in_bit(struct net_device *dev, unsigned int val)
1159{
1160 unsigned short data;
1161
1162 if (val != 0 && val != 1) return;
1163
1164 data = (val << SDIShiftCount);
1165 bmwrite(dev, SROMCSR, data | ChipSelect );
1166 udelay(DelayValue);
1167
1168 bmwrite(dev, SROMCSR, data | ChipSelect | Clk );
1169 udelay(DelayValue);
1170
1171 bmwrite(dev, SROMCSR, data | ChipSelect);
1172 udelay(DelayValue);
1173}
1174
1175static void
1176reset_and_select_srom(struct net_device *dev)
1177{
1178
1179 bmwrite(dev, SROMCSR, 0);
1180 udelay(DelayValue);
1181
1182
1183 bmac_clock_in_bit(dev, 1);
1184 bmac_clock_in_bit(dev, 1);
1185 bmac_clock_in_bit(dev, 0);
1186}
1187
1188static unsigned short
1189read_srom(struct net_device *dev, unsigned int addr, unsigned int addr_len)
1190{
1191 unsigned short data, val;
1192 int i;
1193
1194
1195 for (i = 0; i < addr_len; i++) {
1196 val = addr >> (addr_len-i-1);
1197 bmac_clock_in_bit(dev, val & 1);
1198 }
1199
1200
1201 data = 0;
1202 for (i = 0; i < 16; i++) {
1203 val = bmac_clock_out_bit(dev);
1204 data <<= 1;
1205 data |= val;
1206 }
1207 bmwrite(dev, SROMCSR, 0);
1208
1209 return data;
1210}
1211
1212
1213
1214
1215
1216
1217static int
1218bmac_verify_checksum(struct net_device *dev)
1219{
1220 unsigned short data, storedCS;
1221
1222 reset_and_select_srom(dev);
1223 data = read_srom(dev, 3, SROMAddressBits);
1224 storedCS = ((data >> 8) & 0x0ff) | ((data << 8) & 0xff00);
1225
1226 return 0;
1227}
1228
1229
1230static void
1231bmac_get_station_address(struct net_device *dev, unsigned char *ea)
1232{
1233 int i;
1234 unsigned short data;
1235
1236 for (i = 0; i < 6; i++)
1237 {
1238 reset_and_select_srom(dev);
1239 data = read_srom(dev, i + EnetAddressOffset/2, SROMAddressBits);
1240 ea[2*i] = bitrev(data & 0x0ff);
1241 ea[2*i+1] = bitrev((data >> 8) & 0x0ff);
1242 }
1243}
1244
1245static void bmac_reset_and_enable(struct net_device *dev)
1246{
1247 struct bmac_data *bp = dev->priv;
1248 unsigned long flags;
1249 struct sk_buff *skb;
1250 unsigned char *data;
1251
1252 save_flags(flags); cli();
1253 bmac_enable_and_reset_chip(dev);
1254 bmac_init_tx_ring(bp);
1255 bmac_init_rx_ring(bp);
1256 bmac_init_chip(dev);
1257 bmac_start_chip(dev);
1258 bmwrite(dev, INTDISABLE, EnableNormal);
1259 bp->sleeping = 0;
1260
1261
1262
1263
1264
1265 skb = dev_alloc_skb(ETHERMINPACKET);
1266 if (skb != NULL) {
1267 data = skb_put(skb, ETHERMINPACKET);
1268 memset(data, 0, ETHERMINPACKET);
1269 memcpy(data, dev->dev_addr, 6);
1270 memcpy(data+6, dev->dev_addr, 6);
1271 bmac_transmit_packet(skb, dev);
1272 }
1273 restore_flags(flags);
1274}
1275
1276static int __init bmac_probe(void)
1277{
1278 struct device_node *bmac;
1279
1280 MOD_INC_USE_COUNT;
1281
1282 for (bmac = find_devices("bmac"); bmac != 0; bmac = bmac->next)
1283 bmac_probe1(bmac, 0);
1284 for (bmac = find_compatible_devices("network", "bmac+"); bmac != 0;
1285 bmac = bmac->next)
1286 bmac_probe1(bmac, 1);
1287
1288 if (bmac_devs != 0) {
1289 proc_net_create ("bmac", 0, bmac_proc_info);
1290#ifdef CONFIG_PMAC_PBOOK
1291 pmu_register_sleep_notifier(&bmac_sleep_notifier);
1292#endif
1293 }
1294
1295 MOD_DEC_USE_COUNT;
1296
1297 return bmac_devs? 0: -ENODEV;
1298}
1299
1300static void __init bmac_probe1(struct device_node *bmac, int is_bmac_plus)
1301{
1302 int j, rev, ret;
1303 struct bmac_data *bp;
1304 unsigned char *addr;
1305 struct net_device *dev;
1306
1307 if (bmac->n_addrs != 3 || bmac->n_intrs != 3) {
1308 printk(KERN_ERR "can't use BMAC %s: need 3 addrs and 3 intrs\n",
1309 bmac->full_name);
1310 return;
1311 }
1312 addr = get_property(bmac, "mac-address", NULL);
1313 if (addr == NULL) {
1314 addr = get_property(bmac, "local-mac-address", NULL);
1315 if (addr == NULL) {
1316 printk(KERN_ERR "Can't get mac-address for BMAC %s\n",
1317 bmac->full_name);
1318 return;
1319 }
1320 }
1321
1322 if (bmac_emergency_rxbuf == NULL) {
1323 bmac_emergency_rxbuf = kmalloc(RX_BUFLEN, GFP_KERNEL);
1324 if (bmac_emergency_rxbuf == NULL) {
1325 printk(KERN_ERR "BMAC: can't allocate emergency RX buffer\n");
1326 return;
1327 }
1328 }
1329
1330 dev = init_etherdev(NULL, PRIV_BYTES);
1331 if (!dev) {
1332 printk(KERN_ERR "init_etherdev failed, out of memory for BMAC %s\n",
1333 bmac->full_name);
1334 return;
1335 }
1336 bp = (struct bmac_data *) dev->priv;
1337 SET_MODULE_OWNER(dev);
1338 bp->node = bmac;
1339
1340 if (!request_OF_resource(bmac, 0, " (bmac)")) {
1341 printk(KERN_ERR "BMAC: can't request IO resource !\n");
1342 goto err_out;
1343 }
1344 if (!request_OF_resource(bmac, 1, " (bmac tx dma)")) {
1345 printk(KERN_ERR "BMAC: can't request TX DMA resource !\n");
1346 goto err_out;
1347 }
1348
1349 if (!request_OF_resource(bmac, 2, " (bmac rx dma)")) {
1350 printk(KERN_ERR "BMAC: can't request RX DMA resource !\n");
1351 goto err_out;
1352 }
1353 dev->base_addr = (unsigned long)
1354 ioremap(bmac->addrs[0].address, bmac->addrs[0].size);
1355 if (!dev->base_addr)
1356 goto err_out;
1357 dev->irq = bmac->intrs[0].line;
1358
1359 bmac_enable_and_reset_chip(dev);
1360 bmwrite(dev, INTDISABLE, DisableAll);
1361
1362 printk(KERN_INFO "%s: BMAC%s at", dev->name, (is_bmac_plus? "+": ""));
1363 rev = addr[0] == 0 && addr[1] == 0xA0;
1364 for (j = 0; j < 6; ++j) {
1365 dev->dev_addr[j] = rev? bitrev(addr[j]): addr[j];
1366 printk("%c%.2x", (j? ':': ' '), dev->dev_addr[j]);
1367 }
1368 XXDEBUG((", base_addr=%#0lx", dev->base_addr));
1369 printk("\n");
1370
1371
1372 bmac_enable_and_reset_chip(dev);
1373 bmwrite(dev, INTDISABLE, DisableAll);
1374
1375 dev->open = bmac_open;
1376 dev->stop = bmac_close;
1377 dev->hard_start_xmit = bmac_output;
1378 dev->get_stats = bmac_stats;
1379 dev->set_multicast_list = bmac_set_multicast;
1380 dev->set_mac_address = bmac_set_address;
1381
1382 bmac_get_station_address(dev, addr);
1383 if (bmac_verify_checksum(dev) != 0)
1384 goto err_out_iounmap;
1385
1386 bp->is_bmac_plus = is_bmac_plus;
1387 bp->tx_dma = (volatile struct dbdma_regs *)
1388 ioremap(bmac->addrs[1].address, bmac->addrs[1].size);
1389 if (!bp->tx_dma)
1390 goto err_out_iounmap;
1391 bp->tx_dma_intr = bmac->intrs[1].line;
1392 bp->rx_dma = (volatile struct dbdma_regs *)
1393 ioremap(bmac->addrs[2].address, bmac->addrs[2].size);
1394 if (!bp->rx_dma)
1395 goto err_out_iounmap_tx;
1396 bp->rx_dma_intr = bmac->intrs[2].line;
1397
1398 bp->tx_cmds = (volatile struct dbdma_cmd *) DBDMA_ALIGN(bp + 1);
1399 bp->rx_cmds = bp->tx_cmds + N_TX_RING + 1;
1400
1401 bp->queue = (struct sk_buff_head *)(bp->rx_cmds + N_RX_RING + 1);
1402 skb_queue_head_init(bp->queue);
1403
1404 memset((char *) bp->tx_cmds, 0,
1405 (N_TX_RING + N_RX_RING + 2) * sizeof(struct dbdma_cmd));
1406
1407
1408
1409 ret = request_irq(dev->irq, bmac_misc_intr, 0, "BMAC-misc", dev);
1410 if (ret) {
1411 printk(KERN_ERR "BMAC: can't get irq %d\n", dev->irq);
1412 goto err_out_iounmap_rx;
1413 }
1414 ret = request_irq(bmac->intrs[1].line, bmac_txdma_intr, 0, "BMAC-txdma", dev);
1415 if (ret) {
1416 printk(KERN_ERR "BMAC: can't get irq %d\n", bmac->intrs[1].line);
1417 goto err_out_irq0;
1418 }
1419 ret = request_irq(bmac->intrs[2].line, bmac_rxdma_intr, 0, "BMAC-rxdma", dev);
1420 if (ret) {
1421 printk(KERN_ERR "BMAC: can't get irq %d\n", bmac->intrs[2].line);
1422 goto err_out_irq1;
1423 }
1424
1425
1426
1427
1428 disable_irq(dev->irq);
1429 pmac_call_feature(PMAC_FTR_BMAC_ENABLE, bp->node, 0, 0);
1430
1431 bp->next_bmac = bmac_devs;
1432 bmac_devs = dev;
1433 return;
1434
1435err_out_irq1:
1436 free_irq(bmac->intrs[1].line, dev);
1437err_out_irq0:
1438 free_irq(dev->irq, dev);
1439err_out_iounmap_rx:
1440 iounmap((void *)bp->rx_dma);
1441err_out_iounmap_tx:
1442 iounmap((void *)bp->tx_dma);
1443err_out_iounmap:
1444 iounmap((void *)dev->base_addr);
1445err_out:
1446 if (bp->node) {
1447 release_OF_resource(bp->node, 0);
1448 release_OF_resource(bp->node, 1);
1449 release_OF_resource(bp->node, 2);
1450 pmac_call_feature(PMAC_FTR_BMAC_ENABLE, bp->node, 0, 0);
1451 }
1452 unregister_netdev(dev);
1453 kfree(dev);
1454}
1455
1456static int bmac_open(struct net_device *dev)
1457{
1458 struct bmac_data *bp = (struct bmac_data *) dev->priv;
1459
1460
1461 bp->opened = 1;
1462 bmac_reset_and_enable(dev);
1463 enable_irq(dev->irq);
1464 dev->flags |= IFF_RUNNING;
1465 return 0;
1466}
1467
1468static int bmac_close(struct net_device *dev)
1469{
1470 struct bmac_data *bp = (struct bmac_data *) dev->priv;
1471 volatile struct dbdma_regs *rd = bp->rx_dma;
1472 volatile struct dbdma_regs *td = bp->tx_dma;
1473 unsigned short config;
1474 int i;
1475
1476 bp->sleeping = 1;
1477 dev->flags &= ~(IFF_UP | IFF_RUNNING);
1478
1479
1480 config = bmread(dev, RXCFG);
1481 bmwrite(dev, RXCFG, (config & ~RxMACEnable));
1482
1483 config = bmread(dev, TXCFG);
1484 bmwrite(dev, TXCFG, (config & ~TxMACEnable));
1485
1486 bmwrite(dev, INTDISABLE, DisableAll);
1487
1488
1489 st_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE));
1490 st_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE));
1491
1492
1493 XXDEBUG(("bmac: free rx bufs\n"));
1494 for (i=0; i<N_RX_RING; i++) {
1495 if (bp->rx_bufs[i] != NULL) {
1496 dev_kfree_skb(bp->rx_bufs[i]);
1497 bp->rx_bufs[i] = NULL;
1498 }
1499 }
1500 XXDEBUG(("bmac: free tx bufs\n"));
1501 for (i = 0; i<N_TX_RING; i++) {
1502 if (bp->tx_bufs[i] != NULL) {
1503 dev_kfree_skb(bp->tx_bufs[i]);
1504 bp->tx_bufs[i] = NULL;
1505 }
1506 }
1507 XXDEBUG(("bmac: all bufs freed\n"));
1508
1509 bp->opened = 0;
1510 disable_irq(dev->irq);
1511 pmac_call_feature(PMAC_FTR_BMAC_ENABLE, bp->node, 0, 0);
1512
1513 return 0;
1514}
1515
1516static void
1517bmac_start(struct net_device *dev)
1518{
1519 struct bmac_data *bp = dev->priv;
1520 int i;
1521 struct sk_buff *skb;
1522 unsigned long flags;
1523
1524 if (bp->sleeping)
1525 return;
1526
1527 save_flags(flags); cli();
1528 while (1) {
1529 i = bp->tx_fill + 1;
1530 if (i >= N_TX_RING)
1531 i = 0;
1532 if (i == bp->tx_empty)
1533 break;
1534 skb = skb_dequeue(bp->queue);
1535 if (skb == NULL)
1536 break;
1537 bmac_transmit_packet(skb, dev);
1538 }
1539 restore_flags(flags);
1540}
1541
1542static int
1543bmac_output(struct sk_buff *skb, struct net_device *dev)
1544{
1545 struct bmac_data *bp = dev->priv;
1546 skb_queue_tail(bp->queue, skb);
1547 bmac_start(dev);
1548 return 0;
1549}
1550
1551static void bmac_tx_timeout(unsigned long data)
1552{
1553 struct net_device *dev = (struct net_device *) data;
1554 struct bmac_data *bp = (struct bmac_data *) dev->priv;
1555 volatile struct dbdma_regs *td = bp->tx_dma;
1556 volatile struct dbdma_regs *rd = bp->rx_dma;
1557 volatile struct dbdma_cmd *cp;
1558 unsigned long flags;
1559 unsigned short config, oldConfig;
1560 int i;
1561
1562 XXDEBUG(("bmac: tx_timeout called\n"));
1563 save_flags(flags); cli();
1564 bp->timeout_active = 0;
1565
1566
1567
1568
1569 cp = &bp->tx_cmds[bp->tx_empty];
1570
1571
1572
1573
1574
1575 config = bmread(dev, RXCFG);
1576 bmwrite(dev, RXCFG, (config & ~RxMACEnable));
1577 config = bmread(dev, TXCFG);
1578 bmwrite(dev, TXCFG, (config & ~TxMACEnable));
1579 out_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
1580 printk(KERN_ERR "bmac: transmit timeout - resetting\n");
1581 bmac_enable_and_reset_chip(dev);
1582
1583
1584 cp = bus_to_virt(ld_le32(&rd->cmdptr));
1585 out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
1586 out_le16(&cp->xfer_status, 0);
1587 out_le32(&rd->cmdptr, virt_to_bus(cp));
1588 out_le32(&rd->control, DBDMA_SET(RUN|WAKE));
1589
1590
1591 XXDEBUG((KERN_DEBUG "bmac: tx empty=%d fill=%d fullup=%d\n",
1592 bp->tx_empty, bp->tx_fill, bp->tx_fullup));
1593 i = bp->tx_empty;
1594 ++bp->stats.tx_errors;
1595 if (i != bp->tx_fill) {
1596 dev_kfree_skb(bp->tx_bufs[i]);
1597 bp->tx_bufs[i] = NULL;
1598 if (++i >= N_TX_RING) i = 0;
1599 bp->tx_empty = i;
1600 }
1601 bp->tx_fullup = 0;
1602 netif_wake_queue(dev);
1603 if (i != bp->tx_fill) {
1604 cp = &bp->tx_cmds[i];
1605 out_le16(&cp->xfer_status, 0);
1606 out_le16(&cp->command, OUTPUT_LAST);
1607 out_le32(&td->cmdptr, virt_to_bus(cp));
1608 out_le32(&td->control, DBDMA_SET(RUN));
1609
1610 XXDEBUG((KERN_DEBUG "bmac: starting %d\n", i));
1611 }
1612
1613
1614 oldConfig = bmread(dev, RXCFG);
1615 bmwrite(dev, RXCFG, oldConfig | RxMACEnable );
1616 oldConfig = bmread(dev, TXCFG);
1617 bmwrite(dev, TXCFG, oldConfig | TxMACEnable );
1618
1619 restore_flags(flags);
1620}
1621
1622#if 0
1623static void dump_dbdma(volatile struct dbdma_cmd *cp,int count)
1624{
1625 int i,*ip;
1626
1627 for (i=0;i< count;i++) {
1628 ip = (int*)(cp+i);
1629
1630 printk("dbdma req 0x%x addr 0x%x baddr 0x%x xfer/res 0x%x\n",
1631 ld_le32(ip+0),
1632 ld_le32(ip+1),
1633 ld_le32(ip+2),
1634 ld_le32(ip+3));
1635 }
1636
1637}
1638#endif
1639
1640static int
1641bmac_proc_info(char *buffer, char **start, off_t offset, int length)
1642{
1643 int len = 0;
1644 off_t pos = 0;
1645 off_t begin = 0;
1646 int i;
1647
1648 if (bmac_devs == NULL)
1649 return (-ENOSYS);
1650
1651 len += sprintf(buffer, "BMAC counters & registers\n");
1652
1653 for (i = 0; i<N_REG_ENTRIES; i++) {
1654 len += sprintf(buffer + len, "%s: %#08x\n",
1655 reg_entries[i].name,
1656 bmread(bmac_devs, reg_entries[i].reg_offset));
1657 pos = begin + len;
1658
1659 if (pos < offset) {
1660 len = 0;
1661 begin = pos;
1662 }
1663
1664 if (pos > offset+length) break;
1665 }
1666
1667 *start = buffer + (offset - begin);
1668 len -= (offset - begin);
1669
1670 if (len > length) len = length;
1671
1672 return len;
1673}
1674
1675
1676MODULE_AUTHOR("Randy Gobbel/Paul Mackerras");
1677MODULE_DESCRIPTION("PowerMac BMAC ethernet driver.");
1678MODULE_LICENSE("GPL");
1679
1680static void __exit bmac_cleanup (void)
1681{
1682 struct bmac_data *bp;
1683 struct net_device *dev;
1684
1685 if (bmac_emergency_rxbuf != NULL) {
1686 kfree(bmac_emergency_rxbuf);
1687 bmac_emergency_rxbuf = NULL;
1688 }
1689
1690 if (bmac_devs == 0)
1691 return;
1692#ifdef CONFIG_PMAC_PBOOK
1693 pmu_unregister_sleep_notifier(&bmac_sleep_notifier);
1694#endif
1695 proc_net_remove("bmac");
1696
1697 do {
1698 dev = bmac_devs;
1699 bp = (struct bmac_data *) dev->priv;
1700 bmac_devs = bp->next_bmac;
1701
1702 unregister_netdev(dev);
1703
1704 release_OF_resource(bp->node, 0);
1705 release_OF_resource(bp->node, 1);
1706 release_OF_resource(bp->node, 2);
1707 free_irq(dev->irq, dev);
1708 free_irq(bp->tx_dma_intr, dev);
1709 free_irq(bp->rx_dma_intr, dev);
1710
1711 kfree(dev);
1712 } while (bmac_devs != NULL);
1713}
1714
1715module_init(bmac_probe);
1716module_exit(bmac_cleanup);
1717
