linux/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (c) 2011-2015, 2017, 2020, The Linux Foundation. All rights reserved.
   4 */
   5
   6#include <linux/bitops.h>
   7#include <linux/delay.h>
   8#include <linux/err.h>
   9#include <linux/iio/consumer.h>
  10#include <linux/interrupt.h>
  11#include <linux/module.h>
  12#include <linux/of.h>
  13#include <linux/of_device.h>
  14#include <linux/platform_device.h>
  15#include <linux/regmap.h>
  16#include <linux/thermal.h>
  17
  18#include "../thermal_core.h"
  19
  20#define QPNP_TM_REG_DIG_MAJOR           0x01
  21#define QPNP_TM_REG_TYPE                0x04
  22#define QPNP_TM_REG_SUBTYPE             0x05
  23#define QPNP_TM_REG_STATUS              0x08
  24#define QPNP_TM_REG_SHUTDOWN_CTRL1      0x40
  25#define QPNP_TM_REG_ALARM_CTRL          0x46
  26
  27#define QPNP_TM_TYPE                    0x09
  28#define QPNP_TM_SUBTYPE_GEN1            0x08
  29#define QPNP_TM_SUBTYPE_GEN2            0x09
  30
  31#define STATUS_GEN1_STAGE_MASK          GENMASK(1, 0)
  32#define STATUS_GEN2_STATE_MASK          GENMASK(6, 4)
  33#define STATUS_GEN2_STATE_SHIFT         4
  34
  35#define SHUTDOWN_CTRL1_OVERRIDE_S2      BIT(6)
  36#define SHUTDOWN_CTRL1_THRESHOLD_MASK   GENMASK(1, 0)
  37
  38#define SHUTDOWN_CTRL1_RATE_25HZ        BIT(3)
  39
  40#define ALARM_CTRL_FORCE_ENABLE         BIT(7)
  41
  42#define THRESH_COUNT                    4
  43#define STAGE_COUNT                     3
  44
  45/* Over-temperature trip point values in mC */
  46static const long temp_map_gen1[THRESH_COUNT][STAGE_COUNT] = {
  47        { 105000, 125000, 145000 },
  48        { 110000, 130000, 150000 },
  49        { 115000, 135000, 155000 },
  50        { 120000, 140000, 160000 },
  51};
  52
  53static const long temp_map_gen2_v1[THRESH_COUNT][STAGE_COUNT] = {
  54        {  90000, 110000, 140000 },
  55        {  95000, 115000, 145000 },
  56        { 100000, 120000, 150000 },
  57        { 105000, 125000, 155000 },
  58};
  59
  60#define TEMP_THRESH_STEP                5000 /* Threshold step: 5 C */
  61
  62#define THRESH_MIN                      0
  63#define THRESH_MAX                      3
  64
  65#define TEMP_STAGE_HYSTERESIS           2000
  66
  67/* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
  68#define DEFAULT_TEMP                    37000
  69
  70struct qpnp_tm_chip {
  71        struct regmap                   *map;
  72        struct device                   *dev;
  73        struct thermal_zone_device      *tz_dev;
  74        unsigned int                    subtype;
  75        long                            temp;
  76        unsigned int                    thresh;
  77        unsigned int                    stage;
  78        unsigned int                    prev_stage;
  79        unsigned int                    base;
  80        /* protects .thresh, .stage and chip registers */
  81        struct mutex                    lock;
  82        bool                            initialized;
  83
  84        struct iio_channel              *adc;
  85        const long                      (*temp_map)[THRESH_COUNT][STAGE_COUNT];
  86};
  87
  88/* This array maps from GEN2 alarm state to GEN1 alarm stage */
  89static const unsigned int alarm_state_map[8] = {0, 1, 1, 2, 2, 3, 3, 3};
  90
  91static int qpnp_tm_read(struct qpnp_tm_chip *chip, u16 addr, u8 *data)
  92{
  93        unsigned int val;
  94        int ret;
  95
  96        ret = regmap_read(chip->map, chip->base + addr, &val);
  97        if (ret < 0)
  98                return ret;
  99
 100        *data = val;
 101        return 0;
 102}
 103
 104static int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 data)
 105{
 106        return regmap_write(chip->map, chip->base + addr, data);
 107}
 108
 109/**
 110 * qpnp_tm_decode_temp() - return temperature in mC corresponding to the
 111 *              specified over-temperature stage
 112 * @chip:               Pointer to the qpnp_tm chip
 113 * @stage:              Over-temperature stage
 114 *
 115 * Return: temperature in mC
 116 */
 117static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage)
 118{
 119        if (!chip->temp_map || chip->thresh >= THRESH_COUNT || stage == 0 ||
 120            stage > STAGE_COUNT)
 121                return 0;
 122
 123        return (*chip->temp_map)[chip->thresh][stage - 1];
 124}
 125
 126/**
 127 * qpnp_tm_get_temp_stage() - return over-temperature stage
 128 * @chip:               Pointer to the qpnp_tm chip
 129 *
 130 * Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
 131 */
 132static int qpnp_tm_get_temp_stage(struct qpnp_tm_chip *chip)
 133{
 134        int ret;
 135        u8 reg = 0;
 136
 137        ret = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, &reg);
 138        if (ret < 0)
 139                return ret;
 140
 141        if (chip->subtype == QPNP_TM_SUBTYPE_GEN1)
 142                ret = reg & STATUS_GEN1_STAGE_MASK;
 143        else
 144                ret = (reg & STATUS_GEN2_STATE_MASK) >> STATUS_GEN2_STATE_SHIFT;
 145
 146        return ret;
 147}
 148
 149/*
 150 * This function updates the internal temp value based on the
 151 * current thermal stage and threshold as well as the previous stage
 152 */
 153static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip)
 154{
 155        unsigned int stage, stage_new, stage_old;
 156        int ret;
 157
 158        WARN_ON(!mutex_is_locked(&chip->lock));
 159
 160        ret = qpnp_tm_get_temp_stage(chip);
 161        if (ret < 0)
 162                return ret;
 163        stage = ret;
 164
 165        if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) {
 166                stage_new = stage;
 167                stage_old = chip->stage;
 168        } else {
 169                stage_new = alarm_state_map[stage];
 170                stage_old = alarm_state_map[chip->stage];
 171        }
 172
 173        if (stage_new > stage_old) {
 174                /* increasing stage, use lower bound */
 175                chip->temp = qpnp_tm_decode_temp(chip, stage_new)
 176                                + TEMP_STAGE_HYSTERESIS;
 177        } else if (stage_new < stage_old) {
 178                /* decreasing stage, use upper bound */
 179                chip->temp = qpnp_tm_decode_temp(chip, stage_new + 1)
 180                                - TEMP_STAGE_HYSTERESIS;
 181        }
 182
 183        chip->stage = stage;
 184
 185        return 0;
 186}
 187
 188static int qpnp_tm_get_temp(void *data, int *temp)
 189{
 190        struct qpnp_tm_chip *chip = data;
 191        int ret, mili_celsius;
 192
 193        if (!temp)
 194                return -EINVAL;
 195
 196        if (!chip->initialized) {
 197                *temp = DEFAULT_TEMP;
 198                return 0;
 199        }
 200
 201        if (!chip->adc) {
 202                mutex_lock(&chip->lock);
 203                ret = qpnp_tm_update_temp_no_adc(chip);
 204                mutex_unlock(&chip->lock);
 205                if (ret < 0)
 206                        return ret;
 207        } else {
 208                ret = iio_read_channel_processed(chip->adc, &mili_celsius);
 209                if (ret < 0)
 210                        return ret;
 211
 212                chip->temp = mili_celsius;
 213        }
 214
 215        *temp = chip->temp;
 216
 217        return 0;
 218}
 219
 220static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip,
 221                                             int temp)
 222{
 223        long stage2_threshold_min = (*chip->temp_map)[THRESH_MIN][1];
 224        long stage2_threshold_max = (*chip->temp_map)[THRESH_MAX][1];
 225        bool disable_s2_shutdown = false;
 226        u8 reg;
 227
 228        WARN_ON(!mutex_is_locked(&chip->lock));
 229
 230        /*
 231         * Default: S2 and S3 shutdown enabled, thresholds at
 232         * lowest threshold set, monitoring at 25Hz
 233         */
 234        reg = SHUTDOWN_CTRL1_RATE_25HZ;
 235
 236        if (temp == THERMAL_TEMP_INVALID ||
 237            temp < stage2_threshold_min) {
 238                chip->thresh = THRESH_MIN;
 239                goto skip;
 240        }
 241
 242        if (temp <= stage2_threshold_max) {
 243                chip->thresh = THRESH_MAX -
 244                        ((stage2_threshold_max - temp) /
 245                         TEMP_THRESH_STEP);
 246                disable_s2_shutdown = true;
 247        } else {
 248                chip->thresh = THRESH_MAX;
 249
 250                if (chip->adc)
 251                        disable_s2_shutdown = true;
 252                else
 253                        dev_warn(chip->dev,
 254                                 "No ADC is configured and critical temperature is above the maximum stage 2 threshold of 140 C! Configuring stage 2 shutdown at 140 C.\n");
 255        }
 256
 257skip:
 258        reg |= chip->thresh;
 259        if (disable_s2_shutdown)
 260                reg |= SHUTDOWN_CTRL1_OVERRIDE_S2;
 261
 262        return qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, reg);
 263}
 264
 265static int qpnp_tm_set_trip_temp(void *data, int trip, int temp)
 266{
 267        struct qpnp_tm_chip *chip = data;
 268        const struct thermal_trip *trip_points;
 269        int ret;
 270
 271        trip_points = of_thermal_get_trip_points(chip->tz_dev);
 272        if (!trip_points)
 273                return -EINVAL;
 274
 275        if (trip_points[trip].type != THERMAL_TRIP_CRITICAL)
 276                return 0;
 277
 278        mutex_lock(&chip->lock);
 279        ret = qpnp_tm_update_critical_trip_temp(chip, temp);
 280        mutex_unlock(&chip->lock);
 281
 282        return ret;
 283}
 284
 285static const struct thermal_zone_of_device_ops qpnp_tm_sensor_ops = {
 286        .get_temp = qpnp_tm_get_temp,
 287        .set_trip_temp = qpnp_tm_set_trip_temp,
 288};
 289
 290static irqreturn_t qpnp_tm_isr(int irq, void *data)
 291{
 292        struct qpnp_tm_chip *chip = data;
 293
 294        thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED);
 295
 296        return IRQ_HANDLED;
 297}
 298
 299static int qpnp_tm_get_critical_trip_temp(struct qpnp_tm_chip *chip)
 300{
 301        int ntrips;
 302        const struct thermal_trip *trips;
 303        int i;
 304
 305        ntrips = of_thermal_get_ntrips(chip->tz_dev);
 306        if (ntrips <= 0)
 307                return THERMAL_TEMP_INVALID;
 308
 309        trips = of_thermal_get_trip_points(chip->tz_dev);
 310        if (!trips)
 311                return THERMAL_TEMP_INVALID;
 312
 313        for (i = 0; i < ntrips; i++) {
 314                if (of_thermal_is_trip_valid(chip->tz_dev, i) &&
 315                    trips[i].type == THERMAL_TRIP_CRITICAL)
 316                        return trips[i].temperature;
 317        }
 318
 319        return THERMAL_TEMP_INVALID;
 320}
 321
 322/*
 323 * This function initializes the internal temp value based on only the
 324 * current thermal stage and threshold. Setup threshold control and
 325 * disable shutdown override.
 326 */
 327static int qpnp_tm_init(struct qpnp_tm_chip *chip)
 328{
 329        unsigned int stage;
 330        int ret;
 331        u8 reg = 0;
 332        int crit_temp;
 333
 334        mutex_lock(&chip->lock);
 335
 336        ret = qpnp_tm_read(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, &reg);
 337        if (ret < 0)
 338                goto out;
 339
 340        chip->thresh = reg & SHUTDOWN_CTRL1_THRESHOLD_MASK;
 341        chip->temp = DEFAULT_TEMP;
 342
 343        ret = qpnp_tm_get_temp_stage(chip);
 344        if (ret < 0)
 345                goto out;
 346        chip->stage = ret;
 347
 348        stage = chip->subtype == QPNP_TM_SUBTYPE_GEN1
 349                ? chip->stage : alarm_state_map[chip->stage];
 350
 351        if (stage)
 352                chip->temp = qpnp_tm_decode_temp(chip, stage);
 353
 354        crit_temp = qpnp_tm_get_critical_trip_temp(chip);
 355        ret = qpnp_tm_update_critical_trip_temp(chip, crit_temp);
 356        if (ret < 0)
 357                goto out;
 358
 359        /* Enable the thermal alarm PMIC module in always-on mode. */
 360        reg = ALARM_CTRL_FORCE_ENABLE;
 361        ret = qpnp_tm_write(chip, QPNP_TM_REG_ALARM_CTRL, reg);
 362
 363        chip->initialized = true;
 364
 365out:
 366        mutex_unlock(&chip->lock);
 367        return ret;
 368}
 369
 370static int qpnp_tm_probe(struct platform_device *pdev)
 371{
 372        struct qpnp_tm_chip *chip;
 373        struct device_node *node;
 374        u8 type, subtype, dig_major;
 375        u32 res;
 376        int ret, irq;
 377
 378        node = pdev->dev.of_node;
 379
 380        chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
 381        if (!chip)
 382                return -ENOMEM;
 383
 384        dev_set_drvdata(&pdev->dev, chip);
 385        chip->dev = &pdev->dev;
 386
 387        mutex_init(&chip->lock);
 388
 389        chip->map = dev_get_regmap(pdev->dev.parent, NULL);
 390        if (!chip->map)
 391                return -ENXIO;
 392
 393        ret = of_property_read_u32(node, "reg", &res);
 394        if (ret < 0)
 395                return ret;
 396
 397        irq = platform_get_irq(pdev, 0);
 398        if (irq < 0)
 399                return irq;
 400
 401        /* ADC based measurements are optional */
 402        chip->adc = devm_iio_channel_get(&pdev->dev, "thermal");
 403        if (IS_ERR(chip->adc)) {
 404                ret = PTR_ERR(chip->adc);
 405                chip->adc = NULL;
 406                if (ret == -EPROBE_DEFER)
 407                        return ret;
 408        }
 409
 410        chip->base = res;
 411
 412        ret = qpnp_tm_read(chip, QPNP_TM_REG_TYPE, &type);
 413        if (ret < 0) {
 414                dev_err(&pdev->dev, "could not read type\n");
 415                return ret;
 416        }
 417
 418        ret = qpnp_tm_read(chip, QPNP_TM_REG_SUBTYPE, &subtype);
 419        if (ret < 0) {
 420                dev_err(&pdev->dev, "could not read subtype\n");
 421                return ret;
 422        }
 423
 424        ret = qpnp_tm_read(chip, QPNP_TM_REG_DIG_MAJOR, &dig_major);
 425        if (ret < 0) {
 426                dev_err(&pdev->dev, "could not read dig_major\n");
 427                return ret;
 428        }
 429
 430        if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1
 431                                     && subtype != QPNP_TM_SUBTYPE_GEN2)) {
 432                dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n",
 433                        type, subtype);
 434                return -ENODEV;
 435        }
 436
 437        chip->subtype = subtype;
 438        if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 1)
 439                chip->temp_map = &temp_map_gen2_v1;
 440        else
 441                chip->temp_map = &temp_map_gen1;
 442
 443        /*
 444         * Register the sensor before initializing the hardware to be able to
 445         * read the trip points. get_temp() returns the default temperature
 446         * before the hardware initialization is completed.
 447         */
 448        chip->tz_dev = devm_thermal_zone_of_sensor_register(
 449                &pdev->dev, 0, chip, &qpnp_tm_sensor_ops);
 450        if (IS_ERR(chip->tz_dev)) {
 451                dev_err(&pdev->dev, "failed to register sensor\n");
 452                return PTR_ERR(chip->tz_dev);
 453        }
 454
 455        ret = qpnp_tm_init(chip);
 456        if (ret < 0) {
 457                dev_err(&pdev->dev, "init failed\n");
 458                return ret;
 459        }
 460
 461        ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, qpnp_tm_isr,
 462                                        IRQF_ONESHOT, node->name, chip);
 463        if (ret < 0)
 464                return ret;
 465
 466        thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED);
 467
 468        return 0;
 469}
 470
 471static const struct of_device_id qpnp_tm_match_table[] = {
 472        { .compatible = "qcom,spmi-temp-alarm" },
 473        { }
 474};
 475MODULE_DEVICE_TABLE(of, qpnp_tm_match_table);
 476
 477static struct platform_driver qpnp_tm_driver = {
 478        .driver = {
 479                .name = "spmi-temp-alarm",
 480                .of_match_table = qpnp_tm_match_table,
 481        },
 482        .probe  = qpnp_tm_probe,
 483};
 484module_platform_driver(qpnp_tm_driver);
 485
 486MODULE_ALIAS("platform:spmi-temp-alarm");
 487MODULE_DESCRIPTION("QPNP PMIC Temperature Alarm driver");
 488MODULE_LICENSE("GPL v2");
 489
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