linux/drivers/scsi/hisi_sas/hisi_sas.h
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   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * Copyright (c) 2015 Linaro Ltd.
   4 * Copyright (c) 2015 Hisilicon Limited.
   5 */
   6
   7#ifndef _HISI_SAS_H_
   8#define _HISI_SAS_H_
   9
  10#include <linux/acpi.h>
  11#include <linux/async.h>
  12#include <linux/blk-mq.h>
  13#include <linux/blk-mq-pci.h>
  14#include <linux/clk.h>
  15#include <linux/debugfs.h>
  16#include <linux/dmapool.h>
  17#include <linux/iopoll.h>
  18#include <linux/irq.h>
  19#include <linux/lcm.h>
  20#include <linux/libata.h>
  21#include <linux/mfd/syscon.h>
  22#include <linux/module.h>
  23#include <linux/of_address.h>
  24#include <linux/pci.h>
  25#include <linux/platform_device.h>
  26#include <linux/pm_runtime.h>
  27#include <linux/property.h>
  28#include <linux/regmap.h>
  29#include <linux/timer.h>
  30#include <scsi/sas_ata.h>
  31#include <scsi/libsas.h>
  32
  33#define HISI_SAS_MAX_PHYS       9
  34#define HISI_SAS_MAX_QUEUES     32
  35#define HISI_SAS_QUEUE_SLOTS    4096
  36#define HISI_SAS_MAX_ITCT_ENTRIES 1024
  37#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
  38#define HISI_SAS_RESET_BIT      0
  39#define HISI_SAS_REJECT_CMD_BIT 1
  40#define HISI_SAS_PM_BIT         2
  41#define HISI_SAS_HW_FAULT_BIT   3
  42#define HISI_SAS_MAX_COMMANDS (HISI_SAS_QUEUE_SLOTS)
  43#define HISI_SAS_RESERVED_IPTT  96
  44#define HISI_SAS_UNRESERVED_IPTT \
  45        (HISI_SAS_MAX_COMMANDS - HISI_SAS_RESERVED_IPTT)
  46
  47#define HISI_SAS_IOST_ITCT_CACHE_NUM 64
  48#define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10
  49#define HISI_SAS_FIFO_DATA_DW_SIZE 32
  50
  51#define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))
  52#define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))
  53
  54#define hisi_sas_status_buf_addr(buf) \
  55        ((buf) + offsetof(struct hisi_sas_slot_buf_table, status_buffer))
  56#define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr((slot)->buf)
  57#define hisi_sas_status_buf_addr_dma(slot) \
  58        hisi_sas_status_buf_addr((slot)->buf_dma)
  59
  60#define hisi_sas_cmd_hdr_addr(buf) \
  61        ((buf) + offsetof(struct hisi_sas_slot_buf_table, command_header))
  62#define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr((slot)->buf)
  63#define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr((slot)->buf_dma)
  64
  65#define hisi_sas_sge_addr(buf) \
  66        ((buf) + offsetof(struct hisi_sas_slot_buf_table, sge_page))
  67#define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr((slot)->buf)
  68#define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr((slot)->buf_dma)
  69
  70#define hisi_sas_sge_dif_addr(buf) \
  71        ((buf) + offsetof(struct hisi_sas_slot_dif_buf_table, sge_dif_page))
  72#define hisi_sas_sge_dif_addr_mem(slot) hisi_sas_sge_dif_addr((slot)->buf)
  73#define hisi_sas_sge_dif_addr_dma(slot) hisi_sas_sge_dif_addr((slot)->buf_dma)
  74
  75#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
  76#define HISI_SAS_MAX_SMP_RESP_SZ 1028
  77#define HISI_SAS_MAX_STP_RESP_SZ 28
  78
  79#define HISI_SAS_SATA_PROTOCOL_NONDATA          0x1
  80#define HISI_SAS_SATA_PROTOCOL_PIO                      0x2
  81#define HISI_SAS_SATA_PROTOCOL_DMA                      0x4
  82#define HISI_SAS_SATA_PROTOCOL_FPDMA            0x8
  83#define HISI_SAS_SATA_PROTOCOL_ATAPI            0x10
  84
  85#define HISI_SAS_DIF_PROT_MASK (SHOST_DIF_TYPE1_PROTECTION | \
  86                                SHOST_DIF_TYPE2_PROTECTION | \
  87                                SHOST_DIF_TYPE3_PROTECTION)
  88
  89#define HISI_SAS_DIX_PROT_MASK (SHOST_DIX_TYPE1_PROTECTION | \
  90                                SHOST_DIX_TYPE2_PROTECTION | \
  91                                SHOST_DIX_TYPE3_PROTECTION)
  92
  93#define HISI_SAS_PROT_MASK (HISI_SAS_DIF_PROT_MASK | HISI_SAS_DIX_PROT_MASK)
  94
  95#define HISI_SAS_WAIT_PHYUP_TIMEOUT     (20 * HZ)
  96#define HISI_SAS_CLEAR_ITCT_TIMEOUT     (20 * HZ)
  97
  98struct hisi_hba;
  99
 100enum {
 101        PORT_TYPE_SAS = (1U << 1),
 102        PORT_TYPE_SATA = (1U << 0),
 103};
 104
 105enum dev_status {
 106        HISI_SAS_DEV_INIT,
 107        HISI_SAS_DEV_NORMAL,
 108};
 109
 110enum {
 111        HISI_SAS_INT_ABT_CMD = 0,
 112        HISI_SAS_INT_ABT_DEV = 1,
 113};
 114
 115enum hisi_sas_dev_type {
 116        HISI_SAS_DEV_TYPE_STP = 0,
 117        HISI_SAS_DEV_TYPE_SSP,
 118        HISI_SAS_DEV_TYPE_SATA,
 119};
 120
 121struct hisi_sas_hw_error {
 122        u32 irq_msk;
 123        u32 msk;
 124        int shift;
 125        const char *msg;
 126        int reg;
 127        const struct hisi_sas_hw_error *sub;
 128};
 129
 130struct hisi_sas_rst {
 131        struct hisi_hba *hisi_hba;
 132        struct completion *completion;
 133        struct work_struct work;
 134        bool done;
 135};
 136
 137#define HISI_SAS_RST_WORK_INIT(r, c) \
 138        {       .hisi_hba = hisi_hba, \
 139                .completion = &c, \
 140                .work = __WORK_INITIALIZER(r.work, \
 141                                hisi_sas_sync_rst_work_handler), \
 142                .done = false, \
 143                }
 144
 145#define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \
 146        DECLARE_COMPLETION_ONSTACK(c); \
 147        struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c)
 148
 149enum hisi_sas_bit_err_type {
 150        HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0,
 151        HISI_SAS_ERR_MULTI_BIT_ECC = 0x1,
 152};
 153
 154enum hisi_sas_phy_event {
 155        HISI_PHYE_PHY_UP   = 0U,
 156        HISI_PHYE_LINK_RESET,
 157        HISI_PHYES_NUM,
 158};
 159
 160struct hisi_sas_debugfs_fifo {
 161        u32 signal_sel;
 162        u32 dump_msk;
 163        u32 dump_mode;
 164        u32 trigger;
 165        u32 trigger_msk;
 166        u32 trigger_mode;
 167        u32 rd_data[HISI_SAS_FIFO_DATA_DW_SIZE];
 168};
 169
 170struct hisi_sas_phy {
 171        struct work_struct      works[HISI_PHYES_NUM];
 172        struct hisi_hba *hisi_hba;
 173        struct hisi_sas_port    *port;
 174        struct asd_sas_phy      sas_phy;
 175        struct sas_identify     identify;
 176        struct completion *reset_completion;
 177        struct timer_list timer;
 178        spinlock_t lock;
 179        u64             port_id; /* from hw */
 180        u64             frame_rcvd_size;
 181        u8              frame_rcvd[32];
 182        u8              phy_attached;
 183        u8              in_reset;
 184        u8              reserved[2];
 185        u32             phy_type;
 186        u32             code_violation_err_count;
 187        enum sas_linkrate       minimum_linkrate;
 188        enum sas_linkrate       maximum_linkrate;
 189        int enable;
 190        int wait_phyup_cnt;
 191        atomic_t down_cnt;
 192
 193        /* Trace FIFO */
 194        struct hisi_sas_debugfs_fifo fifo;
 195};
 196
 197struct hisi_sas_port {
 198        struct asd_sas_port     sas_port;
 199        u8      port_attached;
 200        u8      id; /* from hw */
 201};
 202
 203struct hisi_sas_cq {
 204        struct hisi_hba *hisi_hba;
 205        const struct cpumask *irq_mask;
 206        int     rd_point;
 207        int     id;
 208        int     irq_no;
 209};
 210
 211struct hisi_sas_dq {
 212        struct hisi_hba *hisi_hba;
 213        struct list_head list;
 214        spinlock_t lock;
 215        int     wr_point;
 216        int     id;
 217};
 218
 219struct hisi_sas_device {
 220        struct hisi_hba         *hisi_hba;
 221        struct domain_device    *sas_device;
 222        struct completion *completion;
 223        struct hisi_sas_dq      *dq;
 224        struct list_head        list;
 225        enum sas_device_type    dev_type;
 226        enum dev_status dev_status;
 227        int device_id;
 228        int sata_idx;
 229        spinlock_t lock; /* For protecting slots */
 230};
 231
 232struct hisi_sas_tmf_task {
 233        int force_phy;
 234        int phy_id;
 235        u8 tmf;
 236        u16 tag_of_task_to_be_managed;
 237};
 238
 239struct hisi_sas_slot {
 240        struct list_head entry;
 241        struct list_head delivery;
 242        struct sas_task *task;
 243        struct hisi_sas_port    *port;
 244        u64     n_elem;
 245        u64     n_elem_dif;
 246        int     dlvry_queue;
 247        int     dlvry_queue_slot;
 248        int     cmplt_queue;
 249        int     cmplt_queue_slot;
 250        int     abort;
 251        int     ready;
 252        int     device_id;
 253        void    *cmd_hdr;
 254        dma_addr_t cmd_hdr_dma;
 255        struct timer_list internal_abort_timer;
 256        bool is_internal;
 257        struct hisi_sas_tmf_task *tmf;
 258        /* Do not reorder/change members after here */
 259        void    *buf;
 260        dma_addr_t buf_dma;
 261        u16     idx;
 262};
 263
 264struct hisi_sas_iost_itct_cache {
 265        u32 data[HISI_SAS_IOST_ITCT_CACHE_DW_SZ];
 266};
 267
 268enum hisi_sas_debugfs_reg_array_member {
 269        DEBUGFS_GLOBAL = 0,
 270        DEBUGFS_AXI,
 271        DEBUGFS_RAS,
 272        DEBUGFS_REGS_NUM
 273};
 274
 275enum hisi_sas_debugfs_cache_type {
 276        HISI_SAS_ITCT_CACHE,
 277        HISI_SAS_IOST_CACHE,
 278};
 279
 280enum hisi_sas_debugfs_bist_ffe_cfg {
 281        FFE_SAS_1_5_GBPS,
 282        FFE_SAS_3_0_GBPS,
 283        FFE_SAS_6_0_GBPS,
 284        FFE_SAS_12_0_GBPS,
 285        FFE_RESV,
 286        FFE_SATA_1_5_GBPS,
 287        FFE_SATA_3_0_GBPS,
 288        FFE_SATA_6_0_GBPS,
 289        FFE_CFG_MAX
 290};
 291
 292enum hisi_sas_debugfs_bist_fixed_code {
 293        FIXED_CODE,
 294        FIXED_CODE_1,
 295        FIXED_CODE_MAX
 296};
 297
 298enum {
 299        HISI_SAS_BIST_CODE_MODE_PRBS7,
 300        HISI_SAS_BIST_CODE_MODE_PRBS23,
 301        HISI_SAS_BIST_CODE_MODE_PRBS31,
 302        HISI_SAS_BIST_CODE_MODE_JTPAT,
 303        HISI_SAS_BIST_CODE_MODE_CJTPAT,
 304        HISI_SAS_BIST_CODE_MODE_SCRAMBED_0,
 305        HISI_SAS_BIST_CODE_MODE_TRAIN,
 306        HISI_SAS_BIST_CODE_MODE_TRAIN_DONE,
 307        HISI_SAS_BIST_CODE_MODE_HFTP,
 308        HISI_SAS_BIST_CODE_MODE_MFTP,
 309        HISI_SAS_BIST_CODE_MODE_LFTP,
 310        HISI_SAS_BIST_CODE_MODE_FIXED_DATA,
 311};
 312
 313struct hisi_sas_hw {
 314        int (*hw_init)(struct hisi_hba *hisi_hba);
 315        int (*interrupt_preinit)(struct hisi_hba *hisi_hba);
 316        void (*setup_itct)(struct hisi_hba *hisi_hba,
 317                           struct hisi_sas_device *device);
 318        int (*slot_index_alloc)(struct hisi_hba *hisi_hba,
 319                                struct domain_device *device);
 320        struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
 321        void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no);
 322        void (*start_delivery)(struct hisi_sas_dq *dq);
 323        void (*prep_ssp)(struct hisi_hba *hisi_hba,
 324                        struct hisi_sas_slot *slot);
 325        void (*prep_smp)(struct hisi_hba *hisi_hba,
 326                        struct hisi_sas_slot *slot);
 327        void (*prep_stp)(struct hisi_hba *hisi_hba,
 328                        struct hisi_sas_slot *slot);
 329        void (*prep_abort)(struct hisi_hba *hisi_hba,
 330                          struct hisi_sas_slot *slot,
 331                          int device_id, int abort_flag, int tag_to_abort);
 332        void (*phys_init)(struct hisi_hba *hisi_hba);
 333        void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no);
 334        void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
 335        void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
 336        void (*get_events)(struct hisi_hba *hisi_hba, int phy_no);
 337        void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
 338                        struct sas_phy_linkrates *linkrates);
 339        enum sas_linkrate (*phy_get_max_linkrate)(void);
 340        int (*clear_itct)(struct hisi_hba *hisi_hba,
 341                          struct hisi_sas_device *dev);
 342        void (*free_device)(struct hisi_sas_device *sas_dev);
 343        int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
 344        void (*dereg_device)(struct hisi_hba *hisi_hba,
 345                                struct domain_device *device);
 346        int (*soft_reset)(struct hisi_hba *hisi_hba);
 347        u32 (*get_phys_state)(struct hisi_hba *hisi_hba);
 348        int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type,
 349                                u8 reg_index, u8 reg_count, u8 *write_data);
 350        void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba,
 351                                           int delay_ms, int timeout_ms);
 352        void (*debugfs_snapshot_regs)(struct hisi_hba *hisi_hba);
 353        int complete_hdr_size;
 354        struct scsi_host_template *sht;
 355};
 356
 357#define HISI_SAS_MAX_DEBUGFS_DUMP (50)
 358
 359struct hisi_sas_debugfs_cq {
 360        struct hisi_sas_cq *cq;
 361        void *complete_hdr;
 362};
 363
 364struct hisi_sas_debugfs_dq {
 365        struct hisi_sas_dq *dq;
 366        struct hisi_sas_cmd_hdr *hdr;
 367};
 368
 369struct hisi_sas_debugfs_regs {
 370        struct hisi_hba *hisi_hba;
 371        u32 *data;
 372};
 373
 374struct hisi_sas_debugfs_port {
 375        struct hisi_sas_phy *phy;
 376        u32 *data;
 377};
 378
 379struct hisi_sas_debugfs_iost {
 380        struct hisi_sas_iost *iost;
 381};
 382
 383struct hisi_sas_debugfs_itct {
 384        struct hisi_sas_itct *itct;
 385};
 386
 387struct hisi_sas_debugfs_iost_cache {
 388        struct hisi_sas_iost_itct_cache *cache;
 389};
 390
 391struct hisi_sas_debugfs_itct_cache {
 392        struct hisi_sas_iost_itct_cache *cache;
 393};
 394
 395struct hisi_hba {
 396        /* This must be the first element, used by SHOST_TO_SAS_HA */
 397        struct sas_ha_struct *p;
 398
 399        struct platform_device *platform_dev;
 400        struct pci_dev *pci_dev;
 401        struct device *dev;
 402
 403        int prot_mask;
 404
 405        void __iomem *regs;
 406        void __iomem *sgpio_regs;
 407        struct regmap *ctrl;
 408        u32 ctrl_reset_reg;
 409        u32 ctrl_reset_sts_reg;
 410        u32 ctrl_clock_ena_reg;
 411        u32 refclk_frequency_mhz;
 412        u8 sas_addr[SAS_ADDR_SIZE];
 413
 414        int *irq_map; /* v2 hw */
 415
 416        int n_phy;
 417        spinlock_t lock;
 418        struct semaphore sem;
 419
 420        struct timer_list timer;
 421        struct workqueue_struct *wq;
 422
 423        int slot_index_count;
 424        int last_slot_index;
 425        int last_dev_id;
 426        unsigned long *slot_index_tags;
 427        unsigned long reject_stp_links_msk;
 428
 429        /* SCSI/SAS glue */
 430        struct sas_ha_struct sha;
 431        struct Scsi_Host *shost;
 432
 433        struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
 434        struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
 435        struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
 436        struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
 437
 438        int     queue_count;
 439
 440        struct hisi_sas_device  devices[HISI_SAS_MAX_DEVICES];
 441        struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
 442        dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
 443        void *complete_hdr[HISI_SAS_MAX_QUEUES];
 444        dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
 445        struct hisi_sas_initial_fis *initial_fis;
 446        dma_addr_t initial_fis_dma;
 447        struct hisi_sas_itct *itct;
 448        dma_addr_t itct_dma;
 449        struct hisi_sas_iost *iost;
 450        dma_addr_t iost_dma;
 451        struct hisi_sas_breakpoint *breakpoint;
 452        dma_addr_t breakpoint_dma;
 453        struct hisi_sas_breakpoint *sata_breakpoint;
 454        dma_addr_t sata_breakpoint_dma;
 455        struct hisi_sas_slot    *slot_info;
 456        unsigned long flags;
 457        const struct hisi_sas_hw *hw;   /* Low level hw interface */
 458        unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
 459        struct work_struct rst_work;
 460        struct work_struct debugfs_work;
 461        u32 phy_state;
 462        u32 intr_coal_ticks;    /* Time of interrupt coalesce in us */
 463        u32 intr_coal_count;    /* Interrupt count to coalesce */
 464
 465        int cq_nvecs;
 466
 467        /* bist */
 468        enum sas_linkrate debugfs_bist_linkrate;
 469        int debugfs_bist_code_mode;
 470        int debugfs_bist_phy_no;
 471        int debugfs_bist_mode;
 472        u32 debugfs_bist_cnt;
 473        int debugfs_bist_enable;
 474        u32 debugfs_bist_ffe[HISI_SAS_MAX_PHYS][FFE_CFG_MAX];
 475        u32 debugfs_bist_fixed_code[FIXED_CODE_MAX];
 476
 477        /* debugfs memories */
 478        /* Put Global AXI and RAS Register into register array */
 479        struct hisi_sas_debugfs_regs debugfs_regs[HISI_SAS_MAX_DEBUGFS_DUMP][DEBUGFS_REGS_NUM];
 480        struct hisi_sas_debugfs_port debugfs_port_reg[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_PHYS];
 481        struct hisi_sas_debugfs_cq debugfs_cq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES];
 482        struct hisi_sas_debugfs_dq debugfs_dq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES];
 483        struct hisi_sas_debugfs_iost debugfs_iost[HISI_SAS_MAX_DEBUGFS_DUMP];
 484        struct hisi_sas_debugfs_itct debugfs_itct[HISI_SAS_MAX_DEBUGFS_DUMP];
 485        struct hisi_sas_debugfs_iost_cache debugfs_iost_cache[HISI_SAS_MAX_DEBUGFS_DUMP];
 486        struct hisi_sas_debugfs_itct_cache debugfs_itct_cache[HISI_SAS_MAX_DEBUGFS_DUMP];
 487
 488        u64 debugfs_timestamp[HISI_SAS_MAX_DEBUGFS_DUMP];
 489        int debugfs_dump_index;
 490        struct dentry *debugfs_dir;
 491        struct dentry *debugfs_dump_dentry;
 492        struct dentry *debugfs_bist_dentry;
 493        struct dentry *debugfs_fifo_dentry;
 494};
 495
 496/* Generic HW DMA host memory structures */
 497/* Delivery queue header */
 498struct hisi_sas_cmd_hdr {
 499        /* dw0 */
 500        __le32 dw0;
 501
 502        /* dw1 */
 503        __le32 dw1;
 504
 505        /* dw2 */
 506        __le32 dw2;
 507
 508        /* dw3 */
 509        __le32 transfer_tags;
 510
 511        /* dw4 */
 512        __le32 data_transfer_len;
 513
 514        /* dw5 */
 515        __le32 first_burst_num;
 516
 517        /* dw6 */
 518        __le32 sg_len;
 519
 520        /* dw7 */
 521        __le32 dw7;
 522
 523        /* dw8-9 */
 524        __le64 cmd_table_addr;
 525
 526        /* dw10-11 */
 527        __le64 sts_buffer_addr;
 528
 529        /* dw12-13 */
 530        __le64 prd_table_addr;
 531
 532        /* dw14-15 */
 533        __le64 dif_prd_table_addr;
 534};
 535
 536struct hisi_sas_itct {
 537        __le64 qw0;
 538        __le64 sas_addr;
 539        __le64 qw2;
 540        __le64 qw3;
 541        __le64 qw4_15[12];
 542};
 543
 544struct hisi_sas_iost {
 545        __le64 qw0;
 546        __le64 qw1;
 547        __le64 qw2;
 548        __le64 qw3;
 549};
 550
 551struct hisi_sas_err_record {
 552        u32     data[4];
 553};
 554
 555struct hisi_sas_initial_fis {
 556        struct hisi_sas_err_record err_record;
 557        struct dev_to_host_fis fis;
 558        u32 rsvd[3];
 559};
 560
 561struct hisi_sas_breakpoint {
 562        u8      data[128];
 563};
 564
 565struct hisi_sas_sata_breakpoint {
 566        struct hisi_sas_breakpoint tag[32];
 567};
 568
 569struct hisi_sas_sge {
 570        __le64 addr;
 571        __le32 page_ctrl_0;
 572        __le32 page_ctrl_1;
 573        __le32 data_len;
 574        __le32 data_off;
 575};
 576
 577struct hisi_sas_command_table_smp {
 578        u8 bytes[44];
 579};
 580
 581struct hisi_sas_command_table_stp {
 582        struct  host_to_dev_fis command_fis;
 583        u8      dummy[12];
 584        u8      atapi_cdb[ATAPI_CDB_LEN];
 585};
 586
 587#define HISI_SAS_SGE_PAGE_CNT (124)
 588struct hisi_sas_sge_page {
 589        struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
 590}  __aligned(16);
 591
 592#define HISI_SAS_SGE_DIF_PAGE_CNT   HISI_SAS_SGE_PAGE_CNT
 593struct hisi_sas_sge_dif_page {
 594        struct hisi_sas_sge sge[HISI_SAS_SGE_DIF_PAGE_CNT];
 595}  __aligned(16);
 596
 597struct hisi_sas_command_table_ssp {
 598        struct ssp_frame_hdr hdr;
 599        union {
 600                struct {
 601                        struct ssp_command_iu task;
 602                        u32 prot[7];
 603                };
 604                struct ssp_tmf_iu ssp_task;
 605                struct xfer_rdy_iu xfer_rdy;
 606                struct ssp_response_iu ssp_res;
 607        } u;
 608};
 609
 610union hisi_sas_command_table {
 611        struct hisi_sas_command_table_ssp ssp;
 612        struct hisi_sas_command_table_smp smp;
 613        struct hisi_sas_command_table_stp stp;
 614}  __aligned(16);
 615
 616struct hisi_sas_status_buffer {
 617        struct hisi_sas_err_record err;
 618        u8      iu[1024];
 619}  __aligned(16);
 620
 621struct hisi_sas_slot_buf_table {
 622        struct hisi_sas_status_buffer status_buffer;
 623        union hisi_sas_command_table command_header;
 624        struct hisi_sas_sge_page sge_page;
 625};
 626
 627struct hisi_sas_slot_dif_buf_table {
 628        struct hisi_sas_slot_buf_table slot_buf;
 629        struct hisi_sas_sge_dif_page sge_dif_page;
 630};
 631
 632extern struct scsi_transport_template *hisi_sas_stt;
 633
 634extern bool hisi_sas_debugfs_enable;
 635extern u32 hisi_sas_debugfs_dump_count;
 636extern struct dentry *hisi_sas_debugfs_dir;
 637
 638extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba);
 639extern int hisi_sas_alloc(struct hisi_hba *hisi_hba);
 640extern void hisi_sas_free(struct hisi_hba *hisi_hba);
 641extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis,
 642                                int direction);
 643extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port);
 644extern void hisi_sas_sata_done(struct sas_task *task,
 645                            struct hisi_sas_slot *slot);
 646extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba);
 647extern int hisi_sas_probe(struct platform_device *pdev,
 648                          const struct hisi_sas_hw *ops);
 649extern int hisi_sas_remove(struct platform_device *pdev);
 650
 651extern int hisi_sas_slave_configure(struct scsi_device *sdev);
 652extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time);
 653extern void hisi_sas_scan_start(struct Scsi_Host *shost);
 654extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type);
 655extern void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no,
 656                                int enable);
 657extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy,
 658                              gfp_t gfp_flags);
 659extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
 660                                    struct sas_task *task,
 661                                    struct hisi_sas_slot *slot);
 662extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
 663extern void hisi_sas_rst_work_handler(struct work_struct *work);
 664extern void hisi_sas_sync_rst_work_handler(struct work_struct *work);
 665extern void hisi_sas_sync_irqs(struct hisi_hba *hisi_hba);
 666extern void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no);
 667extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
 668                                enum hisi_sas_phy_event event);
 669extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba);
 670extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max);
 671extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba);
 672extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba);
 673#endif
 674
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