linux/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
   4 */
   5
   6#include <linux/gpio/driver.h>
   7#include <linux/module.h>
   8#include <linux/of.h>
   9#include <linux/of_irq.h>
  10#include <linux/pinctrl/pinconf-generic.h>
  11#include <linux/pinctrl/pinconf.h>
  12#include <linux/pinctrl/pinmux.h>
  13#include <linux/platform_device.h>
  14#include <linux/regmap.h>
  15#include <linux/slab.h>
  16#include <linux/types.h>
  17
  18#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
  19
  20#include "../core.h"
  21#include "../pinctrl-utils.h"
  22
  23#define PMIC_MPP_ADDRESS_RANGE                  0x100
  24
  25/*
  26 * Pull Up Values - it indicates whether a pull-up should be
  27 * applied for bidirectional mode only. The hardware ignores the
  28 * configuration when operating in other modes.
  29 */
  30#define PMIC_MPP_PULL_UP_0P6KOHM                0
  31#define PMIC_MPP_PULL_UP_10KOHM                 1
  32#define PMIC_MPP_PULL_UP_30KOHM                 2
  33#define PMIC_MPP_PULL_UP_OPEN                   3
  34
  35/* type registers base address bases */
  36#define PMIC_MPP_REG_TYPE                       0x4
  37#define PMIC_MPP_REG_SUBTYPE                    0x5
  38
  39/* mpp peripheral type and subtype values */
  40#define PMIC_MPP_TYPE                           0x11
  41#define PMIC_MPP_SUBTYPE_4CH_NO_ANA_OUT         0x3
  42#define PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT     0x4
  43#define PMIC_MPP_SUBTYPE_4CH_NO_SINK            0x5
  44#define PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK        0x6
  45#define PMIC_MPP_SUBTYPE_4CH_FULL_FUNC          0x7
  46#define PMIC_MPP_SUBTYPE_8CH_FULL_FUNC          0xf
  47
  48#define PMIC_MPP_REG_RT_STS                     0x10
  49#define PMIC_MPP_REG_RT_STS_VAL_MASK            0x1
  50
  51/* control register base address bases */
  52#define PMIC_MPP_REG_MODE_CTL                   0x40
  53#define PMIC_MPP_REG_DIG_VIN_CTL                0x41
  54#define PMIC_MPP_REG_DIG_PULL_CTL               0x42
  55#define PMIC_MPP_REG_DIG_IN_CTL                 0x43
  56#define PMIC_MPP_REG_EN_CTL                     0x46
  57#define PMIC_MPP_REG_AOUT_CTL                   0x48
  58#define PMIC_MPP_REG_AIN_CTL                    0x4a
  59#define PMIC_MPP_REG_SINK_CTL                   0x4c
  60
  61/* PMIC_MPP_REG_MODE_CTL */
  62#define PMIC_MPP_REG_MODE_VALUE_MASK            0x1
  63#define PMIC_MPP_REG_MODE_FUNCTION_SHIFT        1
  64#define PMIC_MPP_REG_MODE_FUNCTION_MASK         0x7
  65#define PMIC_MPP_REG_MODE_DIR_SHIFT             4
  66#define PMIC_MPP_REG_MODE_DIR_MASK              0x7
  67
  68/* PMIC_MPP_REG_DIG_VIN_CTL */
  69#define PMIC_MPP_REG_VIN_SHIFT                  0
  70#define PMIC_MPP_REG_VIN_MASK                   0x7
  71
  72/* PMIC_MPP_REG_DIG_PULL_CTL */
  73#define PMIC_MPP_REG_PULL_SHIFT                 0
  74#define PMIC_MPP_REG_PULL_MASK                  0x7
  75
  76/* PMIC_MPP_REG_EN_CTL */
  77#define PMIC_MPP_REG_MASTER_EN_SHIFT            7
  78
  79/* PMIC_MPP_REG_AIN_CTL */
  80#define PMIC_MPP_REG_AIN_ROUTE_SHIFT            0
  81#define PMIC_MPP_REG_AIN_ROUTE_MASK             0x7
  82
  83#define PMIC_MPP_MODE_DIGITAL_INPUT             0
  84#define PMIC_MPP_MODE_DIGITAL_OUTPUT            1
  85#define PMIC_MPP_MODE_DIGITAL_BIDIR             2
  86#define PMIC_MPP_MODE_ANALOG_BIDIR              3
  87#define PMIC_MPP_MODE_ANALOG_INPUT              4
  88#define PMIC_MPP_MODE_ANALOG_OUTPUT             5
  89#define PMIC_MPP_MODE_CURRENT_SINK              6
  90
  91#define PMIC_MPP_SELECTOR_NORMAL                0
  92#define PMIC_MPP_SELECTOR_PAIRED                1
  93#define PMIC_MPP_SELECTOR_DTEST_FIRST           4
  94
  95#define PMIC_MPP_PHYSICAL_OFFSET                1
  96
  97/* Qualcomm specific pin configurations */
  98#define PMIC_MPP_CONF_AMUX_ROUTE                (PIN_CONFIG_END + 1)
  99#define PMIC_MPP_CONF_ANALOG_LEVEL              (PIN_CONFIG_END + 2)
 100#define PMIC_MPP_CONF_DTEST_SELECTOR            (PIN_CONFIG_END + 3)
 101#define PMIC_MPP_CONF_PAIRED                    (PIN_CONFIG_END + 4)
 102
 103/**
 104 * struct pmic_mpp_pad - keep current MPP settings
 105 * @base: Address base in SPMI device.
 106 * @irq: IRQ number which this MPP generate.
 107 * @is_enabled: Set to false when MPP should be put in high Z state.
 108 * @out_value: Cached pin output value.
 109 * @output_enabled: Set to true if MPP output logic is enabled.
 110 * @input_enabled: Set to true if MPP input buffer logic is enabled.
 111 * @paired: Pin operates in paired mode
 112 * @has_pullup: Pin has support to configure pullup
 113 * @num_sources: Number of power-sources supported by this MPP.
 114 * @power_source: Current power-source used.
 115 * @amux_input: Set the source for analog input.
 116 * @aout_level: Analog output level
 117 * @pullup: Pullup resistor value. Valid in Bidirectional mode only.
 118 * @function: See pmic_mpp_functions[].
 119 * @drive_strength: Amount of current in sink mode
 120 * @dtest: DTEST route selector
 121 */
 122struct pmic_mpp_pad {
 123        u16             base;
 124        int             irq;
 125        bool            is_enabled;
 126        bool            out_value;
 127        bool            output_enabled;
 128        bool            input_enabled;
 129        bool            paired;
 130        bool            has_pullup;
 131        unsigned int    num_sources;
 132        unsigned int    power_source;
 133        unsigned int    amux_input;
 134        unsigned int    aout_level;
 135        unsigned int    pullup;
 136        unsigned int    function;
 137        unsigned int    drive_strength;
 138        unsigned int    dtest;
 139};
 140
 141struct pmic_mpp_state {
 142        struct device   *dev;
 143        struct regmap   *map;
 144        struct pinctrl_dev *ctrl;
 145        struct gpio_chip chip;
 146};
 147
 148static const struct pinconf_generic_params pmic_mpp_bindings[] = {
 149        {"qcom,amux-route",     PMIC_MPP_CONF_AMUX_ROUTE,       0},
 150        {"qcom,analog-level",   PMIC_MPP_CONF_ANALOG_LEVEL,     0},
 151        {"qcom,dtest",          PMIC_MPP_CONF_DTEST_SELECTOR,   0},
 152        {"qcom,paired",         PMIC_MPP_CONF_PAIRED,           0},
 153};
 154
 155#ifdef CONFIG_DEBUG_FS
 156static const struct pin_config_item pmic_conf_items[] = {
 157        PCONFDUMP(PMIC_MPP_CONF_AMUX_ROUTE, "analog mux", NULL, true),
 158        PCONFDUMP(PMIC_MPP_CONF_ANALOG_LEVEL, "analog level", NULL, true),
 159        PCONFDUMP(PMIC_MPP_CONF_DTEST_SELECTOR, "dtest", NULL, true),
 160        PCONFDUMP(PMIC_MPP_CONF_PAIRED, "paired", NULL, false),
 161};
 162#endif
 163
 164static const char *const pmic_mpp_groups[] = {
 165        "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
 166};
 167
 168#define PMIC_MPP_DIGITAL        0
 169#define PMIC_MPP_ANALOG         1
 170#define PMIC_MPP_SINK           2
 171
 172static const char *const pmic_mpp_functions[] = {
 173        "digital", "analog", "sink"
 174};
 175
 176static int pmic_mpp_read(struct pmic_mpp_state *state,
 177                         struct pmic_mpp_pad *pad, unsigned int addr)
 178{
 179        unsigned int val;
 180        int ret;
 181
 182        ret = regmap_read(state->map, pad->base + addr, &val);
 183        if (ret < 0)
 184                dev_err(state->dev, "read 0x%x failed\n", addr);
 185        else
 186                ret = val;
 187
 188        return ret;
 189}
 190
 191static int pmic_mpp_write(struct pmic_mpp_state *state,
 192                          struct pmic_mpp_pad *pad, unsigned int addr,
 193                          unsigned int val)
 194{
 195        int ret;
 196
 197        ret = regmap_write(state->map, pad->base + addr, val);
 198        if (ret < 0)
 199                dev_err(state->dev, "write 0x%x failed\n", addr);
 200
 201        return ret;
 202}
 203
 204static int pmic_mpp_get_groups_count(struct pinctrl_dev *pctldev)
 205{
 206        /* Every PIN is a group */
 207        return pctldev->desc->npins;
 208}
 209
 210static const char *pmic_mpp_get_group_name(struct pinctrl_dev *pctldev,
 211                                           unsigned pin)
 212{
 213        return pctldev->desc->pins[pin].name;
 214}
 215
 216static int pmic_mpp_get_group_pins(struct pinctrl_dev *pctldev,
 217                                   unsigned pin,
 218                                   const unsigned **pins, unsigned *num_pins)
 219{
 220        *pins = &pctldev->desc->pins[pin].number;
 221        *num_pins = 1;
 222        return 0;
 223}
 224
 225static const struct pinctrl_ops pmic_mpp_pinctrl_ops = {
 226        .get_groups_count       = pmic_mpp_get_groups_count,
 227        .get_group_name         = pmic_mpp_get_group_name,
 228        .get_group_pins         = pmic_mpp_get_group_pins,
 229        .dt_node_to_map         = pinconf_generic_dt_node_to_map_group,
 230        .dt_free_map            = pinctrl_utils_free_map,
 231};
 232
 233static int pmic_mpp_get_functions_count(struct pinctrl_dev *pctldev)
 234{
 235        return ARRAY_SIZE(pmic_mpp_functions);
 236}
 237
 238static const char *pmic_mpp_get_function_name(struct pinctrl_dev *pctldev,
 239                                              unsigned function)
 240{
 241        return pmic_mpp_functions[function];
 242}
 243
 244static int pmic_mpp_get_function_groups(struct pinctrl_dev *pctldev,
 245                                        unsigned function,
 246                                        const char *const **groups,
 247                                        unsigned *const num_qgroups)
 248{
 249        *groups = pmic_mpp_groups;
 250        *num_qgroups = pctldev->desc->npins;
 251        return 0;
 252}
 253
 254static int pmic_mpp_write_mode_ctl(struct pmic_mpp_state *state,
 255                                   struct pmic_mpp_pad *pad)
 256{
 257        unsigned int mode;
 258        unsigned int sel;
 259        unsigned int val;
 260        unsigned int en;
 261
 262        switch (pad->function) {
 263        case PMIC_MPP_ANALOG:
 264                if (pad->input_enabled && pad->output_enabled)
 265                        mode = PMIC_MPP_MODE_ANALOG_BIDIR;
 266                else if (pad->input_enabled)
 267                        mode = PMIC_MPP_MODE_ANALOG_INPUT;
 268                else
 269                        mode = PMIC_MPP_MODE_ANALOG_OUTPUT;
 270                break;
 271        case PMIC_MPP_DIGITAL:
 272                if (pad->input_enabled && pad->output_enabled)
 273                        mode = PMIC_MPP_MODE_DIGITAL_BIDIR;
 274                else if (pad->input_enabled)
 275                        mode = PMIC_MPP_MODE_DIGITAL_INPUT;
 276                else
 277                        mode = PMIC_MPP_MODE_DIGITAL_OUTPUT;
 278                break;
 279        case PMIC_MPP_SINK:
 280        default:
 281                mode = PMIC_MPP_MODE_CURRENT_SINK;
 282                break;
 283        }
 284
 285        if (pad->dtest)
 286                sel = PMIC_MPP_SELECTOR_DTEST_FIRST + pad->dtest - 1;
 287        else if (pad->paired)
 288                sel = PMIC_MPP_SELECTOR_PAIRED;
 289        else
 290                sel = PMIC_MPP_SELECTOR_NORMAL;
 291
 292        en = !!pad->out_value;
 293
 294        val = mode << PMIC_MPP_REG_MODE_DIR_SHIFT |
 295              sel << PMIC_MPP_REG_MODE_FUNCTION_SHIFT |
 296              en;
 297
 298        return pmic_mpp_write(state, pad, PMIC_MPP_REG_MODE_CTL, val);
 299}
 300
 301static int pmic_mpp_set_mux(struct pinctrl_dev *pctldev, unsigned function,
 302                                unsigned pin)
 303{
 304        struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
 305        struct pmic_mpp_pad *pad;
 306        unsigned int val;
 307        int ret;
 308
 309        pad = pctldev->desc->pins[pin].drv_data;
 310
 311        pad->function = function;
 312
 313        ret = pmic_mpp_write_mode_ctl(state, pad);
 314        if (ret < 0)
 315                return ret;
 316
 317        val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT;
 318
 319        return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);
 320}
 321
 322static const struct pinmux_ops pmic_mpp_pinmux_ops = {
 323        .get_functions_count    = pmic_mpp_get_functions_count,
 324        .get_function_name      = pmic_mpp_get_function_name,
 325        .get_function_groups    = pmic_mpp_get_function_groups,
 326        .set_mux                = pmic_mpp_set_mux,
 327};
 328
 329static int pmic_mpp_config_get(struct pinctrl_dev *pctldev,
 330                               unsigned int pin, unsigned long *config)
 331{
 332        unsigned param = pinconf_to_config_param(*config);
 333        struct pmic_mpp_pad *pad;
 334        unsigned arg = 0;
 335
 336        pad = pctldev->desc->pins[pin].drv_data;
 337
 338        switch (param) {
 339        case PIN_CONFIG_BIAS_DISABLE:
 340                if (pad->pullup != PMIC_MPP_PULL_UP_OPEN)
 341                        return -EINVAL;
 342                arg = 1;
 343                break;
 344        case PIN_CONFIG_BIAS_PULL_UP:
 345                switch (pad->pullup) {
 346                case PMIC_MPP_PULL_UP_0P6KOHM:
 347                        arg = 600;
 348                        break;
 349                case PMIC_MPP_PULL_UP_10KOHM:
 350                        arg = 10000;
 351                        break;
 352                case PMIC_MPP_PULL_UP_30KOHM:
 353                        arg = 30000;
 354                        break;
 355                default:
 356                        return -EINVAL;
 357                }
 358                break;
 359        case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 360                if (pad->is_enabled)
 361                        return -EINVAL;
 362                arg = 1;
 363                break;
 364        case PIN_CONFIG_POWER_SOURCE:
 365                arg = pad->power_source;
 366                break;
 367        case PIN_CONFIG_INPUT_ENABLE:
 368                if (!pad->input_enabled)
 369                        return -EINVAL;
 370                arg = 1;
 371                break;
 372        case PIN_CONFIG_OUTPUT:
 373                arg = pad->out_value;
 374                break;
 375        case PMIC_MPP_CONF_DTEST_SELECTOR:
 376                arg = pad->dtest;
 377                break;
 378        case PMIC_MPP_CONF_AMUX_ROUTE:
 379                arg = pad->amux_input;
 380                break;
 381        case PMIC_MPP_CONF_PAIRED:
 382                if (!pad->paired)
 383                        return -EINVAL;
 384                arg = 1;
 385                break;
 386        case PIN_CONFIG_DRIVE_STRENGTH:
 387                arg = pad->drive_strength;
 388                break;
 389        case PMIC_MPP_CONF_ANALOG_LEVEL:
 390                arg = pad->aout_level;
 391                break;
 392        default:
 393                return -EINVAL;
 394        }
 395
 396        /* Convert register value to pinconf value */
 397        *config = pinconf_to_config_packed(param, arg);
 398        return 0;
 399}
 400
 401static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
 402                               unsigned long *configs, unsigned nconfs)
 403{
 404        struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
 405        struct pmic_mpp_pad *pad;
 406        unsigned param, arg;
 407        unsigned int val;
 408        int i, ret;
 409
 410        pad = pctldev->desc->pins[pin].drv_data;
 411
 412        /* Make it possible to enable the pin, by not setting high impedance */
 413        pad->is_enabled = true;
 414
 415        for (i = 0; i < nconfs; i++) {
 416                param = pinconf_to_config_param(configs[i]);
 417                arg = pinconf_to_config_argument(configs[i]);
 418
 419                switch (param) {
 420                case PIN_CONFIG_BIAS_DISABLE:
 421                        pad->pullup = PMIC_MPP_PULL_UP_OPEN;
 422                        break;
 423                case PIN_CONFIG_BIAS_PULL_UP:
 424                        switch (arg) {
 425                        case 600:
 426                                pad->pullup = PMIC_MPP_PULL_UP_0P6KOHM;
 427                                break;
 428                        case 10000:
 429                                pad->pullup = PMIC_MPP_PULL_UP_10KOHM;
 430                                break;
 431                        case 30000:
 432                                pad->pullup = PMIC_MPP_PULL_UP_30KOHM;
 433                                break;
 434                        default:
 435                                return -EINVAL;
 436                        }
 437                        break;
 438                case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 439                        pad->is_enabled = false;
 440                        break;
 441                case PIN_CONFIG_POWER_SOURCE:
 442                        if (arg >= pad->num_sources)
 443                                return -EINVAL;
 444                        pad->power_source = arg;
 445                        break;
 446                case PIN_CONFIG_INPUT_ENABLE:
 447                        pad->input_enabled = arg ? true : false;
 448                        break;
 449                case PIN_CONFIG_OUTPUT:
 450                        pad->output_enabled = true;
 451                        pad->out_value = arg;
 452                        break;
 453                case PMIC_MPP_CONF_DTEST_SELECTOR:
 454                        pad->dtest = arg;
 455                        break;
 456                case PIN_CONFIG_DRIVE_STRENGTH:
 457                        pad->drive_strength = arg;
 458                        break;
 459                case PMIC_MPP_CONF_AMUX_ROUTE:
 460                        if (arg >= PMIC_MPP_AMUX_ROUTE_ABUS4)
 461                                return -EINVAL;
 462                        pad->amux_input = arg;
 463                        break;
 464                case PMIC_MPP_CONF_ANALOG_LEVEL:
 465                        pad->aout_level = arg;
 466                        break;
 467                case PMIC_MPP_CONF_PAIRED:
 468                        pad->paired = !!arg;
 469                        break;
 470                default:
 471                        return -EINVAL;
 472                }
 473        }
 474
 475        val = pad->power_source << PMIC_MPP_REG_VIN_SHIFT;
 476
 477        ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_DIG_VIN_CTL, val);
 478        if (ret < 0)
 479                return ret;
 480
 481        if (pad->has_pullup) {
 482                val = pad->pullup << PMIC_MPP_REG_PULL_SHIFT;
 483
 484                ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_DIG_PULL_CTL,
 485                                     val);
 486                if (ret < 0)
 487                        return ret;
 488        }
 489
 490        val = pad->amux_input & PMIC_MPP_REG_AIN_ROUTE_MASK;
 491
 492        ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_AIN_CTL, val);
 493        if (ret < 0)
 494                return ret;
 495
 496        ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_AOUT_CTL, pad->aout_level);
 497        if (ret < 0)
 498                return ret;
 499
 500        ret = pmic_mpp_write_mode_ctl(state, pad);
 501        if (ret < 0)
 502                return ret;
 503
 504        ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_SINK_CTL, pad->drive_strength);
 505        if (ret < 0)
 506                return ret;
 507
 508        val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT;
 509
 510        return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);
 511}
 512
 513static void pmic_mpp_config_dbg_show(struct pinctrl_dev *pctldev,
 514                                     struct seq_file *s, unsigned pin)
 515{
 516        struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
 517        struct pmic_mpp_pad *pad;
 518        int ret;
 519
 520        static const char *const biases[] = {
 521                "0.6kOhm", "10kOhm", "30kOhm", "Disabled"
 522        };
 523
 524        pad = pctldev->desc->pins[pin].drv_data;
 525
 526        seq_printf(s, " mpp%-2d:", pin + PMIC_MPP_PHYSICAL_OFFSET);
 527
 528        if (!pad->is_enabled) {
 529                seq_puts(s, " ---");
 530        } else {
 531
 532                if (pad->input_enabled) {
 533                        ret = pmic_mpp_read(state, pad, PMIC_MPP_REG_RT_STS);
 534                        if (ret < 0)
 535                                return;
 536
 537                        ret &= PMIC_MPP_REG_RT_STS_VAL_MASK;
 538                        pad->out_value = ret;
 539                }
 540
 541                seq_printf(s, " %-4s", pad->output_enabled ? "out" : "in");
 542                seq_printf(s, " %-7s", pmic_mpp_functions[pad->function]);
 543                seq_printf(s, " vin-%d", pad->power_source);
 544                seq_printf(s, " %d", pad->aout_level);
 545                if (pad->has_pullup)
 546                        seq_printf(s, " %-8s", biases[pad->pullup]);
 547                seq_printf(s, " %-4s", pad->out_value ? "high" : "low");
 548                if (pad->dtest)
 549                        seq_printf(s, " dtest%d", pad->dtest);
 550                if (pad->paired)
 551                        seq_puts(s, " paired");
 552        }
 553}
 554
 555static const struct pinconf_ops pmic_mpp_pinconf_ops = {
 556        .is_generic = true,
 557        .pin_config_group_get           = pmic_mpp_config_get,
 558        .pin_config_group_set           = pmic_mpp_config_set,
 559        .pin_config_group_dbg_show      = pmic_mpp_config_dbg_show,
 560};
 561
 562static int pmic_mpp_direction_input(struct gpio_chip *chip, unsigned pin)
 563{
 564        struct pmic_mpp_state *state = gpiochip_get_data(chip);
 565        unsigned long config;
 566
 567        config = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE, 1);
 568
 569        return pmic_mpp_config_set(state->ctrl, pin, &config, 1);
 570}
 571
 572static int pmic_mpp_direction_output(struct gpio_chip *chip,
 573                                     unsigned pin, int val)
 574{
 575        struct pmic_mpp_state *state = gpiochip_get_data(chip);
 576        unsigned long config;
 577
 578        config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val);
 579
 580        return pmic_mpp_config_set(state->ctrl, pin, &config, 1);
 581}
 582
 583static int pmic_mpp_get(struct gpio_chip *chip, unsigned pin)
 584{
 585        struct pmic_mpp_state *state = gpiochip_get_data(chip);
 586        struct pmic_mpp_pad *pad;
 587        int ret;
 588
 589        pad = state->ctrl->desc->pins[pin].drv_data;
 590
 591        if (pad->input_enabled) {
 592                ret = pmic_mpp_read(state, pad, PMIC_MPP_REG_RT_STS);
 593                if (ret < 0)
 594                        return ret;
 595
 596                pad->out_value = ret & PMIC_MPP_REG_RT_STS_VAL_MASK;
 597        }
 598
 599        return !!pad->out_value;
 600}
 601
 602static void pmic_mpp_set(struct gpio_chip *chip, unsigned pin, int value)
 603{
 604        struct pmic_mpp_state *state = gpiochip_get_data(chip);
 605        unsigned long config;
 606
 607        config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value);
 608
 609        pmic_mpp_config_set(state->ctrl, pin, &config, 1);
 610}
 611
 612static int pmic_mpp_of_xlate(struct gpio_chip *chip,
 613                             const struct of_phandle_args *gpio_desc,
 614                             u32 *flags)
 615{
 616        if (chip->of_gpio_n_cells < 2)
 617                return -EINVAL;
 618
 619        if (flags)
 620                *flags = gpio_desc->args[1];
 621
 622        return gpio_desc->args[0] - PMIC_MPP_PHYSICAL_OFFSET;
 623}
 624
 625static int pmic_mpp_to_irq(struct gpio_chip *chip, unsigned pin)
 626{
 627        struct pmic_mpp_state *state = gpiochip_get_data(chip);
 628        struct pmic_mpp_pad *pad;
 629
 630        pad = state->ctrl->desc->pins[pin].drv_data;
 631
 632        return pad->irq;
 633}
 634
 635static void pmic_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 636{
 637        struct pmic_mpp_state *state = gpiochip_get_data(chip);
 638        unsigned i;
 639
 640        for (i = 0; i < chip->ngpio; i++) {
 641                pmic_mpp_config_dbg_show(state->ctrl, s, i);
 642                seq_puts(s, "\n");
 643        }
 644}
 645
 646static const struct gpio_chip pmic_mpp_gpio_template = {
 647        .direction_input        = pmic_mpp_direction_input,
 648        .direction_output       = pmic_mpp_direction_output,
 649        .get                    = pmic_mpp_get,
 650        .set                    = pmic_mpp_set,
 651        .request                = gpiochip_generic_request,
 652        .free                   = gpiochip_generic_free,
 653        .of_xlate               = pmic_mpp_of_xlate,
 654        .to_irq                 = pmic_mpp_to_irq,
 655        .dbg_show               = pmic_mpp_dbg_show,
 656};
 657
 658static int pmic_mpp_populate(struct pmic_mpp_state *state,
 659                             struct pmic_mpp_pad *pad)
 660{
 661        int type, subtype, val, dir;
 662        unsigned int sel;
 663
 664        type = pmic_mpp_read(state, pad, PMIC_MPP_REG_TYPE);
 665        if (type < 0)
 666                return type;
 667
 668        if (type != PMIC_MPP_TYPE) {
 669                dev_err(state->dev, "incorrect block type 0x%x at 0x%x\n",
 670                        type, pad->base);
 671                return -ENODEV;
 672        }
 673
 674        subtype = pmic_mpp_read(state, pad, PMIC_MPP_REG_SUBTYPE);
 675        if (subtype < 0)
 676                return subtype;
 677
 678        switch (subtype) {
 679        case PMIC_MPP_SUBTYPE_4CH_NO_ANA_OUT:
 680        case PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT:
 681        case PMIC_MPP_SUBTYPE_4CH_NO_SINK:
 682        case PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK:
 683        case PMIC_MPP_SUBTYPE_4CH_FULL_FUNC:
 684                pad->num_sources = 4;
 685                break;
 686        case PMIC_MPP_SUBTYPE_8CH_FULL_FUNC:
 687                pad->num_sources = 8;
 688                break;
 689        default:
 690                dev_err(state->dev, "unknown MPP type 0x%x at 0x%x\n",
 691                        subtype, pad->base);
 692                return -ENODEV;
 693        }
 694
 695        val = pmic_mpp_read(state, pad, PMIC_MPP_REG_MODE_CTL);
 696        if (val < 0)
 697                return val;
 698
 699        pad->out_value = val & PMIC_MPP_REG_MODE_VALUE_MASK;
 700
 701        dir = val >> PMIC_MPP_REG_MODE_DIR_SHIFT;
 702        dir &= PMIC_MPP_REG_MODE_DIR_MASK;
 703
 704        switch (dir) {
 705        case PMIC_MPP_MODE_DIGITAL_INPUT:
 706                pad->input_enabled = true;
 707                pad->output_enabled = false;
 708                pad->function = PMIC_MPP_DIGITAL;
 709                break;
 710        case PMIC_MPP_MODE_DIGITAL_OUTPUT:
 711                pad->input_enabled = false;
 712                pad->output_enabled = true;
 713                pad->function = PMIC_MPP_DIGITAL;
 714                break;
 715        case PMIC_MPP_MODE_DIGITAL_BIDIR:
 716                pad->input_enabled = true;
 717                pad->output_enabled = true;
 718                pad->function = PMIC_MPP_DIGITAL;
 719                break;
 720        case PMIC_MPP_MODE_ANALOG_BIDIR:
 721                pad->input_enabled = true;
 722                pad->output_enabled = true;
 723                pad->function = PMIC_MPP_ANALOG;
 724                break;
 725        case PMIC_MPP_MODE_ANALOG_INPUT:
 726                pad->input_enabled = true;
 727                pad->output_enabled = false;
 728                pad->function = PMIC_MPP_ANALOG;
 729                break;
 730        case PMIC_MPP_MODE_ANALOG_OUTPUT:
 731                pad->input_enabled = false;
 732                pad->output_enabled = true;
 733                pad->function = PMIC_MPP_ANALOG;
 734                break;
 735        case PMIC_MPP_MODE_CURRENT_SINK:
 736                pad->input_enabled = false;
 737                pad->output_enabled = true;
 738                pad->function = PMIC_MPP_SINK;
 739                break;
 740        default:
 741                dev_err(state->dev, "unknown MPP direction\n");
 742                return -ENODEV;
 743        }
 744
 745        sel = val >> PMIC_MPP_REG_MODE_FUNCTION_SHIFT;
 746        sel &= PMIC_MPP_REG_MODE_FUNCTION_MASK;
 747
 748        if (sel >= PMIC_MPP_SELECTOR_DTEST_FIRST)
 749                pad->dtest = sel + 1;
 750        else if (sel == PMIC_MPP_SELECTOR_PAIRED)
 751                pad->paired = true;
 752
 753        val = pmic_mpp_read(state, pad, PMIC_MPP_REG_DIG_VIN_CTL);
 754        if (val < 0)
 755                return val;
 756
 757        pad->power_source = val >> PMIC_MPP_REG_VIN_SHIFT;
 758        pad->power_source &= PMIC_MPP_REG_VIN_MASK;
 759
 760        if (subtype != PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT &&
 761            subtype != PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK) {
 762                val = pmic_mpp_read(state, pad, PMIC_MPP_REG_DIG_PULL_CTL);
 763                if (val < 0)
 764                        return val;
 765
 766                pad->pullup = val >> PMIC_MPP_REG_PULL_SHIFT;
 767                pad->pullup &= PMIC_MPP_REG_PULL_MASK;
 768                pad->has_pullup = true;
 769        }
 770
 771        val = pmic_mpp_read(state, pad, PMIC_MPP_REG_AIN_CTL);
 772        if (val < 0)
 773                return val;
 774
 775        pad->amux_input = val >> PMIC_MPP_REG_AIN_ROUTE_SHIFT;
 776        pad->amux_input &= PMIC_MPP_REG_AIN_ROUTE_MASK;
 777
 778        val = pmic_mpp_read(state, pad, PMIC_MPP_REG_SINK_CTL);
 779        if (val < 0)
 780                return val;
 781
 782        pad->drive_strength = val;
 783
 784        val = pmic_mpp_read(state, pad, PMIC_MPP_REG_AOUT_CTL);
 785        if (val < 0)
 786                return val;
 787
 788        pad->aout_level = val;
 789
 790        val = pmic_mpp_read(state, pad, PMIC_MPP_REG_EN_CTL);
 791        if (val < 0)
 792                return val;
 793
 794        pad->is_enabled = !!val;
 795
 796        return 0;
 797}
 798
 799static int pmic_mpp_probe(struct platform_device *pdev)
 800{
 801        struct device *dev = &pdev->dev;
 802        struct pinctrl_pin_desc *pindesc;
 803        struct pinctrl_desc *pctrldesc;
 804        struct pmic_mpp_pad *pad, *pads;
 805        struct pmic_mpp_state *state;
 806        int ret, npins, i;
 807        u32 reg;
 808
 809        ret = of_property_read_u32(dev->of_node, "reg", &reg);
 810        if (ret < 0) {
 811                dev_err(dev, "missing base address");
 812                return ret;
 813        }
 814
 815        npins = platform_irq_count(pdev);
 816        if (!npins)
 817                return -EINVAL;
 818        if (npins < 0)
 819                return npins;
 820
 821        BUG_ON(npins > ARRAY_SIZE(pmic_mpp_groups));
 822
 823        state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
 824        if (!state)
 825                return -ENOMEM;
 826
 827        platform_set_drvdata(pdev, state);
 828
 829        state->dev = &pdev->dev;
 830        state->map = dev_get_regmap(dev->parent, NULL);
 831
 832        pindesc = devm_kcalloc(dev, npins, sizeof(*pindesc), GFP_KERNEL);
 833        if (!pindesc)
 834                return -ENOMEM;
 835
 836        pads = devm_kcalloc(dev, npins, sizeof(*pads), GFP_KERNEL);
 837        if (!pads)
 838                return -ENOMEM;
 839
 840        pctrldesc = devm_kzalloc(dev, sizeof(*pctrldesc), GFP_KERNEL);
 841        if (!pctrldesc)
 842                return -ENOMEM;
 843
 844        pctrldesc->pctlops = &pmic_mpp_pinctrl_ops;
 845        pctrldesc->pmxops = &pmic_mpp_pinmux_ops;
 846        pctrldesc->confops = &pmic_mpp_pinconf_ops;
 847        pctrldesc->owner = THIS_MODULE;
 848        pctrldesc->name = dev_name(dev);
 849        pctrldesc->pins = pindesc;
 850        pctrldesc->npins = npins;
 851
 852        pctrldesc->num_custom_params = ARRAY_SIZE(pmic_mpp_bindings);
 853        pctrldesc->custom_params = pmic_mpp_bindings;
 854#ifdef CONFIG_DEBUG_FS
 855        pctrldesc->custom_conf_items = pmic_conf_items;
 856#endif
 857
 858        for (i = 0; i < npins; i++, pindesc++) {
 859                pad = &pads[i];
 860                pindesc->drv_data = pad;
 861                pindesc->number = i;
 862                pindesc->name = pmic_mpp_groups[i];
 863
 864                pad->irq = platform_get_irq(pdev, i);
 865                if (pad->irq < 0)
 866                        return pad->irq;
 867
 868                pad->base = reg + i * PMIC_MPP_ADDRESS_RANGE;
 869
 870                ret = pmic_mpp_populate(state, pad);
 871                if (ret < 0)
 872                        return ret;
 873        }
 874
 875        state->chip = pmic_mpp_gpio_template;
 876        state->chip.parent = dev;
 877        state->chip.base = -1;
 878        state->chip.ngpio = npins;
 879        state->chip.label = dev_name(dev);
 880        state->chip.of_gpio_n_cells = 2;
 881        state->chip.can_sleep = false;
 882
 883        state->ctrl = devm_pinctrl_register(dev, pctrldesc, state);
 884        if (IS_ERR(state->ctrl))
 885                return PTR_ERR(state->ctrl);
 886
 887        ret = gpiochip_add_data(&state->chip, state);
 888        if (ret) {
 889                dev_err(state->dev, "can't add gpio chip\n");
 890                return ret;
 891        }
 892
 893        ret = gpiochip_add_pin_range(&state->chip, dev_name(dev), 0, 0, npins);
 894        if (ret) {
 895                dev_err(dev, "failed to add pin range\n");
 896                goto err_range;
 897        }
 898
 899        return 0;
 900
 901err_range:
 902        gpiochip_remove(&state->chip);
 903        return ret;
 904}
 905
 906static int pmic_mpp_remove(struct platform_device *pdev)
 907{
 908        struct pmic_mpp_state *state = platform_get_drvdata(pdev);
 909
 910        gpiochip_remove(&state->chip);
 911        return 0;
 912}
 913
 914static const struct of_device_id pmic_mpp_of_match[] = {
 915        { .compatible = "qcom,pm8019-mpp" },    /* 6 MPP's */
 916        { .compatible = "qcom,pm8841-mpp" },    /* 4 MPP's */
 917        { .compatible = "qcom,pm8916-mpp" },    /* 4 MPP's */
 918        { .compatible = "qcom,pm8941-mpp" },    /* 8 MPP's */
 919        { .compatible = "qcom,pm8950-mpp" },    /* 4 MPP's */
 920        { .compatible = "qcom,pmi8950-mpp" },   /* 4 MPP's */
 921        { .compatible = "qcom,pm8994-mpp" },    /* 8 MPP's */
 922        { .compatible = "qcom,pma8084-mpp" },   /* 8 MPP's */
 923        { .compatible = "qcom,pmi8994-mpp" },   /* 4 MPP's */
 924        { .compatible = "qcom,spmi-mpp" },      /* Generic */
 925        { },
 926};
 927
 928MODULE_DEVICE_TABLE(of, pmic_mpp_of_match);
 929
 930static struct platform_driver pmic_mpp_driver = {
 931        .driver = {
 932                   .name = "qcom-spmi-mpp",
 933                   .of_match_table = pmic_mpp_of_match,
 934        },
 935        .probe  = pmic_mpp_probe,
 936        .remove = pmic_mpp_remove,
 937};
 938
 939module_platform_driver(pmic_mpp_driver);
 940
 941MODULE_AUTHOR("Ivan T. Ivanov <iivanov@mm-sol.com>");
 942MODULE_DESCRIPTION("Qualcomm SPMI PMIC MPP pin control driver");
 943MODULE_ALIAS("platform:qcom-spmi-mpp");
 944MODULE_LICENSE("GPL v2");
 945
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