linux/drivers/infiniband/hw/hfi1/chip.c
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   1/*
   2 * Copyright(c) 2015 - 2020 Intel Corporation.
   3 *
   4 * This file is provided under a dual BSD/GPLv2 license.  When using or
   5 * redistributing this file, you may do so under either license.
   6 *
   7 * GPL LICENSE SUMMARY
   8 *
   9 * This program is free software; you can redistribute it and/or modify
  10 * it under the terms of version 2 of the GNU General Public License as
  11 * published by the Free Software Foundation.
  12 *
  13 * This program is distributed in the hope that it will be useful, but
  14 * WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16 * General Public License for more details.
  17 *
  18 * BSD LICENSE
  19 *
  20 * Redistribution and use in source and binary forms, with or without
  21 * modification, are permitted provided that the following conditions
  22 * are met:
  23 *
  24 *  - Redistributions of source code must retain the above copyright
  25 *    notice, this list of conditions and the following disclaimer.
  26 *  - Redistributions in binary form must reproduce the above copyright
  27 *    notice, this list of conditions and the following disclaimer in
  28 *    the documentation and/or other materials provided with the
  29 *    distribution.
  30 *  - Neither the name of Intel Corporation nor the names of its
  31 *    contributors may be used to endorse or promote products derived
  32 *    from this software without specific prior written permission.
  33 *
  34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45 *
  46 */
  47
  48/*
  49 * This file contains all of the code that is specific to the HFI chip
  50 */
  51
  52#include <linux/pci.h>
  53#include <linux/delay.h>
  54#include <linux/interrupt.h>
  55#include <linux/module.h>
  56
  57#include "hfi.h"
  58#include "trace.h"
  59#include "mad.h"
  60#include "pio.h"
  61#include "sdma.h"
  62#include "eprom.h"
  63#include "efivar.h"
  64#include "platform.h"
  65#include "aspm.h"
  66#include "affinity.h"
  67#include "debugfs.h"
  68#include "fault.h"
  69#include "netdev.h"
  70
  71uint num_vls = HFI1_MAX_VLS_SUPPORTED;
  72module_param(num_vls, uint, S_IRUGO);
  73MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
  74
  75/*
  76 * Default time to aggregate two 10K packets from the idle state
  77 * (timer not running). The timer starts at the end of the first packet,
  78 * so only the time for one 10K packet and header plus a bit extra is needed.
  79 * 10 * 1024 + 64 header byte = 10304 byte
  80 * 10304 byte / 12.5 GB/s = 824.32ns
  81 */
  82uint rcv_intr_timeout = (824 + 16); /* 16 is for coalescing interrupt */
  83module_param(rcv_intr_timeout, uint, S_IRUGO);
  84MODULE_PARM_DESC(rcv_intr_timeout, "Receive interrupt mitigation timeout in ns");
  85
  86uint rcv_intr_count = 16; /* same as qib */
  87module_param(rcv_intr_count, uint, S_IRUGO);
  88MODULE_PARM_DESC(rcv_intr_count, "Receive interrupt mitigation count");
  89
  90ushort link_crc_mask = SUPPORTED_CRCS;
  91module_param(link_crc_mask, ushort, S_IRUGO);
  92MODULE_PARM_DESC(link_crc_mask, "CRCs to use on the link");
  93
  94uint loopback;
  95module_param_named(loopback, loopback, uint, S_IRUGO);
  96MODULE_PARM_DESC(loopback, "Put into loopback mode (1 = serdes, 3 = external cable");
  97
  98/* Other driver tunables */
  99uint rcv_intr_dynamic = 1; /* enable dynamic mode for rcv int mitigation*/
 100static ushort crc_14b_sideband = 1;
 101static uint use_flr = 1;
 102uint quick_linkup; /* skip LNI */
 103
 104struct flag_table {
 105        u64 flag;       /* the flag */
 106        char *str;      /* description string */
 107        u16 extra;      /* extra information */
 108        u16 unused0;
 109        u32 unused1;
 110};
 111
 112/* str must be a string constant */
 113#define FLAG_ENTRY(str, extra, flag) {flag, str, extra}
 114#define FLAG_ENTRY0(str, flag) {flag, str, 0}
 115
 116/* Send Error Consequences */
 117#define SEC_WRITE_DROPPED       0x1
 118#define SEC_PACKET_DROPPED      0x2
 119#define SEC_SC_HALTED           0x4     /* per-context only */
 120#define SEC_SPC_FREEZE          0x8     /* per-HFI only */
 121
 122#define DEFAULT_KRCVQS            2
 123#define MIN_KERNEL_KCTXTS         2
 124#define FIRST_KERNEL_KCTXT        1
 125
 126/*
 127 * RSM instance allocation
 128 *   0 - User Fecn Handling
 129 *   1 - Vnic
 130 *   2 - AIP
 131 *   3 - Verbs
 132 */
 133#define RSM_INS_FECN              0
 134#define RSM_INS_VNIC              1
 135#define RSM_INS_AIP               2
 136#define RSM_INS_VERBS             3
 137
 138/* Bit offset into the GUID which carries HFI id information */
 139#define GUID_HFI_INDEX_SHIFT     39
 140
 141/* extract the emulation revision */
 142#define emulator_rev(dd) ((dd)->irev >> 8)
 143/* parallel and serial emulation versions are 3 and 4 respectively */
 144#define is_emulator_p(dd) ((((dd)->irev) & 0xf) == 3)
 145#define is_emulator_s(dd) ((((dd)->irev) & 0xf) == 4)
 146
 147/* RSM fields for Verbs */
 148/* packet type */
 149#define IB_PACKET_TYPE         2ull
 150#define QW_SHIFT               6ull
 151/* QPN[7..1] */
 152#define QPN_WIDTH              7ull
 153
 154/* LRH.BTH: QW 0, OFFSET 48 - for match */
 155#define LRH_BTH_QW             0ull
 156#define LRH_BTH_BIT_OFFSET     48ull
 157#define LRH_BTH_OFFSET(off)    ((LRH_BTH_QW << QW_SHIFT) | (off))
 158#define LRH_BTH_MATCH_OFFSET   LRH_BTH_OFFSET(LRH_BTH_BIT_OFFSET)
 159#define LRH_BTH_SELECT
 160#define LRH_BTH_MASK           3ull
 161#define LRH_BTH_VALUE          2ull
 162
 163/* LRH.SC[3..0] QW 0, OFFSET 56 - for match */
 164#define LRH_SC_QW              0ull
 165#define LRH_SC_BIT_OFFSET      56ull
 166#define LRH_SC_OFFSET(off)     ((LRH_SC_QW << QW_SHIFT) | (off))
 167#define LRH_SC_MATCH_OFFSET    LRH_SC_OFFSET(LRH_SC_BIT_OFFSET)
 168#define LRH_SC_MASK            128ull
 169#define LRH_SC_VALUE           0ull
 170
 171/* SC[n..0] QW 0, OFFSET 60 - for select */
 172#define LRH_SC_SELECT_OFFSET  ((LRH_SC_QW << QW_SHIFT) | (60ull))
 173
 174/* QPN[m+n:1] QW 1, OFFSET 1 */
 175#define QPN_SELECT_OFFSET      ((1ull << QW_SHIFT) | (1ull))
 176
 177/* RSM fields for AIP */
 178/* LRH.BTH above is reused for this rule */
 179
 180/* BTH.DESTQP: QW 1, OFFSET 16 for match */
 181#define BTH_DESTQP_QW           1ull
 182#define BTH_DESTQP_BIT_OFFSET   16ull
 183#define BTH_DESTQP_OFFSET(off) ((BTH_DESTQP_QW << QW_SHIFT) | (off))
 184#define BTH_DESTQP_MATCH_OFFSET BTH_DESTQP_OFFSET(BTH_DESTQP_BIT_OFFSET)
 185#define BTH_DESTQP_MASK         0xFFull
 186#define BTH_DESTQP_VALUE        0x81ull
 187
 188/* DETH.SQPN: QW 1 Offset 56 for select */
 189/* We use 8 most significant Soure QPN bits as entropy fpr AIP */
 190#define DETH_AIP_SQPN_QW 3ull
 191#define DETH_AIP_SQPN_BIT_OFFSET 56ull
 192#define DETH_AIP_SQPN_OFFSET(off) ((DETH_AIP_SQPN_QW << QW_SHIFT) | (off))
 193#define DETH_AIP_SQPN_SELECT_OFFSET \
 194        DETH_AIP_SQPN_OFFSET(DETH_AIP_SQPN_BIT_OFFSET)
 195
 196/* RSM fields for Vnic */
 197/* L2_TYPE: QW 0, OFFSET 61 - for match */
 198#define L2_TYPE_QW             0ull
 199#define L2_TYPE_BIT_OFFSET     61ull
 200#define L2_TYPE_OFFSET(off)    ((L2_TYPE_QW << QW_SHIFT) | (off))
 201#define L2_TYPE_MATCH_OFFSET   L2_TYPE_OFFSET(L2_TYPE_BIT_OFFSET)
 202#define L2_TYPE_MASK           3ull
 203#define L2_16B_VALUE           2ull
 204
 205/* L4_TYPE QW 1, OFFSET 0 - for match */
 206#define L4_TYPE_QW              1ull
 207#define L4_TYPE_BIT_OFFSET      0ull
 208#define L4_TYPE_OFFSET(off)     ((L4_TYPE_QW << QW_SHIFT) | (off))
 209#define L4_TYPE_MATCH_OFFSET    L4_TYPE_OFFSET(L4_TYPE_BIT_OFFSET)
 210#define L4_16B_TYPE_MASK        0xFFull
 211#define L4_16B_ETH_VALUE        0x78ull
 212
 213/* 16B VESWID - for select */
 214#define L4_16B_HDR_VESWID_OFFSET  ((2 << QW_SHIFT) | (16ull))
 215/* 16B ENTROPY - for select */
 216#define L2_16B_ENTROPY_OFFSET     ((1 << QW_SHIFT) | (32ull))
 217
 218/* defines to build power on SC2VL table */
 219#define SC2VL_VAL( \
 220        num, \
 221        sc0, sc0val, \
 222        sc1, sc1val, \
 223        sc2, sc2val, \
 224        sc3, sc3val, \
 225        sc4, sc4val, \
 226        sc5, sc5val, \
 227        sc6, sc6val, \
 228        sc7, sc7val) \
 229( \
 230        ((u64)(sc0val) << SEND_SC2VLT##num##_SC##sc0##_SHIFT) | \
 231        ((u64)(sc1val) << SEND_SC2VLT##num##_SC##sc1##_SHIFT) | \
 232        ((u64)(sc2val) << SEND_SC2VLT##num##_SC##sc2##_SHIFT) | \
 233        ((u64)(sc3val) << SEND_SC2VLT##num##_SC##sc3##_SHIFT) | \
 234        ((u64)(sc4val) << SEND_SC2VLT##num##_SC##sc4##_SHIFT) | \
 235        ((u64)(sc5val) << SEND_SC2VLT##num##_SC##sc5##_SHIFT) | \
 236        ((u64)(sc6val) << SEND_SC2VLT##num##_SC##sc6##_SHIFT) | \
 237        ((u64)(sc7val) << SEND_SC2VLT##num##_SC##sc7##_SHIFT)   \
 238)
 239
 240#define DC_SC_VL_VAL( \
 241        range, \
 242        e0, e0val, \
 243        e1, e1val, \
 244        e2, e2val, \
 245        e3, e3val, \
 246        e4, e4val, \
 247        e5, e5val, \
 248        e6, e6val, \
 249        e7, e7val, \
 250        e8, e8val, \
 251        e9, e9val, \
 252        e10, e10val, \
 253        e11, e11val, \
 254        e12, e12val, \
 255        e13, e13val, \
 256        e14, e14val, \
 257        e15, e15val) \
 258( \
 259        ((u64)(e0val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e0##_SHIFT) | \
 260        ((u64)(e1val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e1##_SHIFT) | \
 261        ((u64)(e2val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e2##_SHIFT) | \
 262        ((u64)(e3val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e3##_SHIFT) | \
 263        ((u64)(e4val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e4##_SHIFT) | \
 264        ((u64)(e5val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e5##_SHIFT) | \
 265        ((u64)(e6val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e6##_SHIFT) | \
 266        ((u64)(e7val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e7##_SHIFT) | \
 267        ((u64)(e8val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e8##_SHIFT) | \
 268        ((u64)(e9val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e9##_SHIFT) | \
 269        ((u64)(e10val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e10##_SHIFT) | \
 270        ((u64)(e11val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e11##_SHIFT) | \
 271        ((u64)(e12val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e12##_SHIFT) | \
 272        ((u64)(e13val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e13##_SHIFT) | \
 273        ((u64)(e14val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e14##_SHIFT) | \
 274        ((u64)(e15val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e15##_SHIFT) \
 275)
 276
 277/* all CceStatus sub-block freeze bits */
 278#define ALL_FROZE (CCE_STATUS_SDMA_FROZE_SMASK \
 279                        | CCE_STATUS_RXE_FROZE_SMASK \
 280                        | CCE_STATUS_TXE_FROZE_SMASK \
 281                        | CCE_STATUS_TXE_PIO_FROZE_SMASK)
 282/* all CceStatus sub-block TXE pause bits */
 283#define ALL_TXE_PAUSE (CCE_STATUS_TXE_PIO_PAUSED_SMASK \
 284                        | CCE_STATUS_TXE_PAUSED_SMASK \
 285                        | CCE_STATUS_SDMA_PAUSED_SMASK)
 286/* all CceStatus sub-block RXE pause bits */
 287#define ALL_RXE_PAUSE CCE_STATUS_RXE_PAUSED_SMASK
 288
 289#define CNTR_MAX 0xFFFFFFFFFFFFFFFFULL
 290#define CNTR_32BIT_MAX 0x00000000FFFFFFFF
 291
 292/*
 293 * CCE Error flags.
 294 */
 295static struct flag_table cce_err_status_flags[] = {
 296/* 0*/  FLAG_ENTRY0("CceCsrParityErr",
 297                CCE_ERR_STATUS_CCE_CSR_PARITY_ERR_SMASK),
 298/* 1*/  FLAG_ENTRY0("CceCsrReadBadAddrErr",
 299                CCE_ERR_STATUS_CCE_CSR_READ_BAD_ADDR_ERR_SMASK),
 300/* 2*/  FLAG_ENTRY0("CceCsrWriteBadAddrErr",
 301                CCE_ERR_STATUS_CCE_CSR_WRITE_BAD_ADDR_ERR_SMASK),
 302/* 3*/  FLAG_ENTRY0("CceTrgtAsyncFifoParityErr",
 303                CCE_ERR_STATUS_CCE_TRGT_ASYNC_FIFO_PARITY_ERR_SMASK),
 304/* 4*/  FLAG_ENTRY0("CceTrgtAccessErr",
 305                CCE_ERR_STATUS_CCE_TRGT_ACCESS_ERR_SMASK),
 306/* 5*/  FLAG_ENTRY0("CceRspdDataParityErr",
 307                CCE_ERR_STATUS_CCE_RSPD_DATA_PARITY_ERR_SMASK),
 308/* 6*/  FLAG_ENTRY0("CceCli0AsyncFifoParityErr",
 309                CCE_ERR_STATUS_CCE_CLI0_ASYNC_FIFO_PARITY_ERR_SMASK),
 310/* 7*/  FLAG_ENTRY0("CceCsrCfgBusParityErr",
 311                CCE_ERR_STATUS_CCE_CSR_CFG_BUS_PARITY_ERR_SMASK),
 312/* 8*/  FLAG_ENTRY0("CceCli2AsyncFifoParityErr",
 313                CCE_ERR_STATUS_CCE_CLI2_ASYNC_FIFO_PARITY_ERR_SMASK),
 314/* 9*/  FLAG_ENTRY0("CceCli1AsyncFifoPioCrdtParityErr",
 315            CCE_ERR_STATUS_CCE_CLI1_ASYNC_FIFO_PIO_CRDT_PARITY_ERR_SMASK),
 316/*10*/  FLAG_ENTRY0("CceCli1AsyncFifoPioCrdtParityErr",
 317            CCE_ERR_STATUS_CCE_CLI1_ASYNC_FIFO_SDMA_HD_PARITY_ERR_SMASK),
 318/*11*/  FLAG_ENTRY0("CceCli1AsyncFifoRxdmaParityError",
 319            CCE_ERR_STATUS_CCE_CLI1_ASYNC_FIFO_RXDMA_PARITY_ERROR_SMASK),
 320/*12*/  FLAG_ENTRY0("CceCli1AsyncFifoDbgParityError",
 321                CCE_ERR_STATUS_CCE_CLI1_ASYNC_FIFO_DBG_PARITY_ERROR_SMASK),
 322/*13*/  FLAG_ENTRY0("PcicRetryMemCorErr",
 323                CCE_ERR_STATUS_PCIC_RETRY_MEM_COR_ERR_SMASK),
 324/*14*/  FLAG_ENTRY0("PcicRetryMemCorErr",
 325                CCE_ERR_STATUS_PCIC_RETRY_SOT_MEM_COR_ERR_SMASK),
 326/*15*/  FLAG_ENTRY0("PcicPostHdQCorErr",
 327                CCE_ERR_STATUS_PCIC_POST_HD_QCOR_ERR_SMASK),
 328/*16*/  FLAG_ENTRY0("PcicPostHdQCorErr",
 329                CCE_ERR_STATUS_PCIC_POST_DAT_QCOR_ERR_SMASK),
 330/*17*/  FLAG_ENTRY0("PcicPostHdQCorErr",
 331                CCE_ERR_STATUS_PCIC_CPL_HD_QCOR_ERR_SMASK),
 332/*18*/  FLAG_ENTRY0("PcicCplDatQCorErr",
 333                CCE_ERR_STATUS_PCIC_CPL_DAT_QCOR_ERR_SMASK),
 334/*19*/  FLAG_ENTRY0("PcicNPostHQParityErr",
 335                CCE_ERR_STATUS_PCIC_NPOST_HQ_PARITY_ERR_SMASK),
 336/*20*/  FLAG_ENTRY0("PcicNPostDatQParityErr",
 337                CCE_ERR_STATUS_PCIC_NPOST_DAT_QPARITY_ERR_SMASK),
 338/*21*/  FLAG_ENTRY0("PcicRetryMemUncErr",
 339                CCE_ERR_STATUS_PCIC_RETRY_MEM_UNC_ERR_SMASK),
 340/*22*/  FLAG_ENTRY0("PcicRetrySotMemUncErr",
 341                CCE_ERR_STATUS_PCIC_RETRY_SOT_MEM_UNC_ERR_SMASK),
 342/*23*/  FLAG_ENTRY0("PcicPostHdQUncErr",
 343                CCE_ERR_STATUS_PCIC_POST_HD_QUNC_ERR_SMASK),
 344/*24*/  FLAG_ENTRY0("PcicPostDatQUncErr",
 345                CCE_ERR_STATUS_PCIC_POST_DAT_QUNC_ERR_SMASK),
 346/*25*/  FLAG_ENTRY0("PcicCplHdQUncErr",
 347                CCE_ERR_STATUS_PCIC_CPL_HD_QUNC_ERR_SMASK),
 348/*26*/  FLAG_ENTRY0("PcicCplDatQUncErr",
 349                CCE_ERR_STATUS_PCIC_CPL_DAT_QUNC_ERR_SMASK),
 350/*27*/  FLAG_ENTRY0("PcicTransmitFrontParityErr",
 351                CCE_ERR_STATUS_PCIC_TRANSMIT_FRONT_PARITY_ERR_SMASK),
 352/*28*/  FLAG_ENTRY0("PcicTransmitBackParityErr",
 353                CCE_ERR_STATUS_PCIC_TRANSMIT_BACK_PARITY_ERR_SMASK),
 354/*29*/  FLAG_ENTRY0("PcicReceiveParityErr",
 355                CCE_ERR_STATUS_PCIC_RECEIVE_PARITY_ERR_SMASK),
 356/*30*/  FLAG_ENTRY0("CceTrgtCplTimeoutErr",
 357                CCE_ERR_STATUS_CCE_TRGT_CPL_TIMEOUT_ERR_SMASK),
 358/*31*/  FLAG_ENTRY0("LATriggered",
 359                CCE_ERR_STATUS_LA_TRIGGERED_SMASK),
 360/*32*/  FLAG_ENTRY0("CceSegReadBadAddrErr",
 361                CCE_ERR_STATUS_CCE_SEG_READ_BAD_ADDR_ERR_SMASK),
 362/*33*/  FLAG_ENTRY0("CceSegWriteBadAddrErr",
 363                CCE_ERR_STATUS_CCE_SEG_WRITE_BAD_ADDR_ERR_SMASK),
 364/*34*/  FLAG_ENTRY0("CceRcplAsyncFifoParityErr",
 365                CCE_ERR_STATUS_CCE_RCPL_ASYNC_FIFO_PARITY_ERR_SMASK),
 366/*35*/  FLAG_ENTRY0("CceRxdmaConvFifoParityErr",
 367                CCE_ERR_STATUS_CCE_RXDMA_CONV_FIFO_PARITY_ERR_SMASK),
 368/*36*/  FLAG_ENTRY0("CceMsixTableCorErr",
 369                CCE_ERR_STATUS_CCE_MSIX_TABLE_COR_ERR_SMASK),
 370/*37*/  FLAG_ENTRY0("CceMsixTableUncErr",
 371                CCE_ERR_STATUS_CCE_MSIX_TABLE_UNC_ERR_SMASK),
 372/*38*/  FLAG_ENTRY0("CceIntMapCorErr",
 373                CCE_ERR_STATUS_CCE_INT_MAP_COR_ERR_SMASK),
 374/*39*/  FLAG_ENTRY0("CceIntMapUncErr",
 375                CCE_ERR_STATUS_CCE_INT_MAP_UNC_ERR_SMASK),
 376/*40*/  FLAG_ENTRY0("CceMsixCsrParityErr",
 377                CCE_ERR_STATUS_CCE_MSIX_CSR_PARITY_ERR_SMASK),
 378/*41-63 reserved*/
 379};
 380
 381/*
 382 * Misc Error flags
 383 */
 384#define MES(text) MISC_ERR_STATUS_MISC_##text##_ERR_SMASK
 385static struct flag_table misc_err_status_flags[] = {
 386/* 0*/  FLAG_ENTRY0("CSR_PARITY", MES(CSR_PARITY)),
 387/* 1*/  FLAG_ENTRY0("CSR_READ_BAD_ADDR", MES(CSR_READ_BAD_ADDR)),
 388/* 2*/  FLAG_ENTRY0("CSR_WRITE_BAD_ADDR", MES(CSR_WRITE_BAD_ADDR)),
 389/* 3*/  FLAG_ENTRY0("SBUS_WRITE_FAILED", MES(SBUS_WRITE_FAILED)),
 390/* 4*/  FLAG_ENTRY0("KEY_MISMATCH", MES(KEY_MISMATCH)),
 391/* 5*/  FLAG_ENTRY0("FW_AUTH_FAILED", MES(FW_AUTH_FAILED)),
 392/* 6*/  FLAG_ENTRY0("EFUSE_CSR_PARITY", MES(EFUSE_CSR_PARITY)),
 393/* 7*/  FLAG_ENTRY0("EFUSE_READ_BAD_ADDR", MES(EFUSE_READ_BAD_ADDR)),
 394/* 8*/  FLAG_ENTRY0("EFUSE_WRITE", MES(EFUSE_WRITE)),
 395/* 9*/  FLAG_ENTRY0("EFUSE_DONE_PARITY", MES(EFUSE_DONE_PARITY)),
 396/*10*/  FLAG_ENTRY0("INVALID_EEP_CMD", MES(INVALID_EEP_CMD)),
 397/*11*/  FLAG_ENTRY0("MBIST_FAIL", MES(MBIST_FAIL)),
 398/*12*/  FLAG_ENTRY0("PLL_LOCK_FAIL", MES(PLL_LOCK_FAIL))
 399};
 400
 401/*
 402 * TXE PIO Error flags and consequences
 403 */
 404static struct flag_table pio_err_status_flags[] = {
 405/* 0*/  FLAG_ENTRY("PioWriteBadCtxt",
 406        SEC_WRITE_DROPPED,
 407        SEND_PIO_ERR_STATUS_PIO_WRITE_BAD_CTXT_ERR_SMASK),
 408/* 1*/  FLAG_ENTRY("PioWriteAddrParity",
 409        SEC_SPC_FREEZE,
 410        SEND_PIO_ERR_STATUS_PIO_WRITE_ADDR_PARITY_ERR_SMASK),
 411/* 2*/  FLAG_ENTRY("PioCsrParity",
 412        SEC_SPC_FREEZE,
 413        SEND_PIO_ERR_STATUS_PIO_CSR_PARITY_ERR_SMASK),
 414/* 3*/  FLAG_ENTRY("PioSbMemFifo0",
 415        SEC_SPC_FREEZE,
 416        SEND_PIO_ERR_STATUS_PIO_SB_MEM_FIFO0_ERR_SMASK),
 417/* 4*/  FLAG_ENTRY("PioSbMemFifo1",
 418        SEC_SPC_FREEZE,
 419        SEND_PIO_ERR_STATUS_PIO_SB_MEM_FIFO1_ERR_SMASK),
 420/* 5*/  FLAG_ENTRY("PioPccFifoParity",
 421        SEC_SPC_FREEZE,
 422        SEND_PIO_ERR_STATUS_PIO_PCC_FIFO_PARITY_ERR_SMASK),
 423/* 6*/  FLAG_ENTRY("PioPecFifoParity",
 424        SEC_SPC_FREEZE,
 425        SEND_PIO_ERR_STATUS_PIO_PEC_FIFO_PARITY_ERR_SMASK),
 426/* 7*/  FLAG_ENTRY("PioSbrdctlCrrelParity",
 427        SEC_SPC_FREEZE,
 428        SEND_PIO_ERR_STATUS_PIO_SBRDCTL_CRREL_PARITY_ERR_SMASK),
 429/* 8*/  FLAG_ENTRY("PioSbrdctrlCrrelFifoParity",
 430        SEC_SPC_FREEZE,
 431        SEND_PIO_ERR_STATUS_PIO_SBRDCTRL_CRREL_FIFO_PARITY_ERR_SMASK),
 432/* 9*/  FLAG_ENTRY("PioPktEvictFifoParityErr",
 433        SEC_SPC_FREEZE,
 434        SEND_PIO_ERR_STATUS_PIO_PKT_EVICT_FIFO_PARITY_ERR_SMASK),
 435/*10*/  FLAG_ENTRY("PioSmPktResetParity",
 436        SEC_SPC_FREEZE,
 437        SEND_PIO_ERR_STATUS_PIO_SM_PKT_RESET_PARITY_ERR_SMASK),
 438/*11*/  FLAG_ENTRY("PioVlLenMemBank0Unc",
 439        SEC_SPC_FREEZE,
 440        SEND_PIO_ERR_STATUS_PIO_VL_LEN_MEM_BANK0_UNC_ERR_SMASK),
 441/*12*/  FLAG_ENTRY("PioVlLenMemBank1Unc",
 442        SEC_SPC_FREEZE,
 443        SEND_PIO_ERR_STATUS_PIO_VL_LEN_MEM_BANK1_UNC_ERR_SMASK),
 444/*13*/  FLAG_ENTRY("PioVlLenMemBank0Cor",
 445        0,
 446        SEND_PIO_ERR_STATUS_PIO_VL_LEN_MEM_BANK0_COR_ERR_SMASK),
 447/*14*/  FLAG_ENTRY("PioVlLenMemBank1Cor",
 448        0,
 449        SEND_PIO_ERR_STATUS_PIO_VL_LEN_MEM_BANK1_COR_ERR_SMASK),
 450/*15*/  FLAG_ENTRY("PioCreditRetFifoParity",
 451        SEC_SPC_FREEZE,
 452        SEND_PIO_ERR_STATUS_PIO_CREDIT_RET_FIFO_PARITY_ERR_SMASK),
 453/*16*/  FLAG_ENTRY("PioPpmcPblFifo",
 454        SEC_SPC_FREEZE,
 455        SEND_PIO_ERR_STATUS_PIO_PPMC_PBL_FIFO_ERR_SMASK),
 456/*17*/  FLAG_ENTRY("PioInitSmIn",
 457        0,
 458        SEND_PIO_ERR_STATUS_PIO_INIT_SM_IN_ERR_SMASK),
 459/*18*/  FLAG_ENTRY("PioPktEvictSmOrArbSm",
 460        SEC_SPC_FREEZE,
 461        SEND_PIO_ERR_STATUS_PIO_PKT_EVICT_SM_OR_ARB_SM_ERR_SMASK),
 462/*19*/  FLAG_ENTRY("PioHostAddrMemUnc",
 463        SEC_SPC_FREEZE,
 464        SEND_PIO_ERR_STATUS_PIO_HOST_ADDR_MEM_UNC_ERR_SMASK),
 465/*20*/  FLAG_ENTRY("PioHostAddrMemCor",
 466        0,
 467        SEND_PIO_ERR_STATUS_PIO_HOST_ADDR_MEM_COR_ERR_SMASK),
 468/*21*/  FLAG_ENTRY("PioWriteDataParity",
 469        SEC_SPC_FREEZE,
 470        SEND_PIO_ERR_STATUS_PIO_WRITE_DATA_PARITY_ERR_SMASK),
 471/*22*/  FLAG_ENTRY("PioStateMachine",
 472        SEC_SPC_FREEZE,
 473        SEND_PIO_ERR_STATUS_PIO_STATE_MACHINE_ERR_SMASK),
 474/*23*/  FLAG_ENTRY("PioWriteQwValidParity",
 475        SEC_WRITE_DROPPED | SEC_SPC_FREEZE,
 476        SEND_PIO_ERR_STATUS_PIO_WRITE_QW_VALID_PARITY_ERR_SMASK),
 477/*24*/  FLAG_ENTRY("PioBlockQwCountParity",
 478        SEC_WRITE_DROPPED | SEC_SPC_FREEZE,
 479        SEND_PIO_ERR_STATUS_PIO_BLOCK_QW_COUNT_PARITY_ERR_SMASK),
 480/*25*/  FLAG_ENTRY("PioVlfVlLenParity",
 481        SEC_SPC_FREEZE,
 482        SEND_PIO_ERR_STATUS_PIO_VLF_VL_LEN_PARITY_ERR_SMASK),
 483/*26*/  FLAG_ENTRY("PioVlfSopParity",
 484        SEC_SPC_FREEZE,
 485        SEND_PIO_ERR_STATUS_PIO_VLF_SOP_PARITY_ERR_SMASK),
 486/*27*/  FLAG_ENTRY("PioVlFifoParity",
 487        SEC_SPC_FREEZE,
 488        SEND_PIO_ERR_STATUS_PIO_VL_FIFO_PARITY_ERR_SMASK),
 489/*28*/  FLAG_ENTRY("PioPpmcBqcMemParity",
 490        SEC_SPC_FREEZE,
 491        SEND_PIO_ERR_STATUS_PIO_PPMC_BQC_MEM_PARITY_ERR_SMASK),
 492/*29*/  FLAG_ENTRY("PioPpmcSopLen",
 493        SEC_SPC_FREEZE,
 494        SEND_PIO_ERR_STATUS_PIO_PPMC_SOP_LEN_ERR_SMASK),
 495/*30-31 reserved*/
 496/*32*/  FLAG_ENTRY("PioCurrentFreeCntParity",
 497        SEC_SPC_FREEZE,
 498        SEND_PIO_ERR_STATUS_PIO_CURRENT_FREE_CNT_PARITY_ERR_SMASK),
 499/*33*/  FLAG_ENTRY("PioLastReturnedCntParity",
 500        SEC_SPC_FREEZE,
 501        SEND_PIO_ERR_STATUS_PIO_LAST_RETURNED_CNT_PARITY_ERR_SMASK),
 502/*34*/  FLAG_ENTRY("PioPccSopHeadParity",
 503        SEC_SPC_FREEZE,
 504        SEND_PIO_ERR_STATUS_PIO_PCC_SOP_HEAD_PARITY_ERR_SMASK),
 505/*35*/  FLAG_ENTRY("PioPecSopHeadParityErr",
 506        SEC_SPC_FREEZE,
 507        SEND_PIO_ERR_STATUS_PIO_PEC_SOP_HEAD_PARITY_ERR_SMASK),
 508/*36-63 reserved*/
 509};
 510
 511/* TXE PIO errors that cause an SPC freeze */
 512#define ALL_PIO_FREEZE_ERR \
 513        (SEND_PIO_ERR_STATUS_PIO_WRITE_ADDR_PARITY_ERR_SMASK \
 514        | SEND_PIO_ERR_STATUS_PIO_CSR_PARITY_ERR_SMASK \
 515        | SEND_PIO_ERR_STATUS_PIO_SB_MEM_FIFO0_ERR_SMASK \
 516        | SEND_PIO_ERR_STATUS_PIO_SB_MEM_FIFO1_ERR_SMASK \
 517        | SEND_PIO_ERR_STATUS_PIO_PCC_FIFO_PARITY_ERR_SMASK \
 518        | SEND_PIO_ERR_STATUS_PIO_PEC_FIFO_PARITY_ERR_SMASK \
 519        | SEND_PIO_ERR_STATUS_PIO_SBRDCTL_CRREL_PARITY_ERR_SMASK \
 520        | SEND_PIO_ERR_STATUS_PIO_SBRDCTRL_CRREL_FIFO_PARITY_ERR_SMASK \
 521        | SEND_PIO_ERR_STATUS_PIO_PKT_EVICT_FIFO_PARITY_ERR_SMASK \
 522        | SEND_PIO_ERR_STATUS_PIO_SM_PKT_RESET_PARITY_ERR_SMASK \
 523        | SEND_PIO_ERR_STATUS_PIO_VL_LEN_MEM_BANK0_UNC_ERR_SMASK \
 524        | SEND_PIO_ERR_STATUS_PIO_VL_LEN_MEM_BANK1_UNC_ERR_SMASK \
 525        | SEND_PIO_ERR_STATUS_PIO_CREDIT_RET_FIFO_PARITY_ERR_SMASK \
 526        | SEND_PIO_ERR_STATUS_PIO_PPMC_PBL_FIFO_ERR_SMASK \
 527        | SEND_PIO_ERR_STATUS_PIO_PKT_EVICT_SM_OR_ARB_SM_ERR_SMASK \
 528        | SEND_PIO_ERR_STATUS_PIO_HOST_ADDR_MEM_UNC_ERR_SMASK \
 529        | SEND_PIO_ERR_STATUS_PIO_WRITE_DATA_PARITY_ERR_SMASK \
 530        | SEND_PIO_ERR_STATUS_PIO_STATE_MACHINE_ERR_SMASK \
 531        | SEND_PIO_ERR_STATUS_PIO_WRITE_QW_VALID_PARITY_ERR_SMASK \
 532        | SEND_PIO_ERR_STATUS_PIO_BLOCK_QW_COUNT_PARITY_ERR_SMASK \
 533        | SEND_PIO_ERR_STATUS_PIO_VLF_VL_LEN_PARITY_ERR_SMASK \
 534        | SEND_PIO_ERR_STATUS_PIO_VLF_SOP_PARITY_ERR_SMASK \
 535        | SEND_PIO_ERR_STATUS_PIO_VL_FIFO_PARITY_ERR_SMASK \
 536        | SEND_PIO_ERR_STATUS_PIO_PPMC_BQC_MEM_PARITY_ERR_SMASK \
 537        | SEND_PIO_ERR_STATUS_PIO_PPMC_SOP_LEN_ERR_SMASK \
 538        | SEND_PIO_ERR_STATUS_PIO_CURRENT_FREE_CNT_PARITY_ERR_SMASK \
 539        | SEND_PIO_ERR_STATUS_PIO_LAST_RETURNED_CNT_PARITY_ERR_SMASK \
 540        | SEND_PIO_ERR_STATUS_PIO_PCC_SOP_HEAD_PARITY_ERR_SMASK \
 541        | SEND_PIO_ERR_STATUS_PIO_PEC_SOP_HEAD_PARITY_ERR_SMASK)
 542
 543/*
 544 * TXE SDMA Error flags
 545 */
 546static struct flag_table sdma_err_status_flags[] = {
 547/* 0*/  FLAG_ENTRY0("SDmaRpyTagErr",
 548                SEND_DMA_ERR_STATUS_SDMA_RPY_TAG_ERR_SMASK),
 549/* 1*/  FLAG_ENTRY0("SDmaCsrParityErr",
 550                SEND_DMA_ERR_STATUS_SDMA_CSR_PARITY_ERR_SMASK),
 551/* 2*/  FLAG_ENTRY0("SDmaPcieReqTrackingUncErr",
 552                SEND_DMA_ERR_STATUS_SDMA_PCIE_REQ_TRACKING_UNC_ERR_SMASK),
 553/* 3*/  FLAG_ENTRY0("SDmaPcieReqTrackingCorErr",
 554                SEND_DMA_ERR_STATUS_SDMA_PCIE_REQ_TRACKING_COR_ERR_SMASK),
 555/*04-63 reserved*/
 556};
 557
 558/* TXE SDMA errors that cause an SPC freeze */
 559#define ALL_SDMA_FREEZE_ERR  \
 560                (SEND_DMA_ERR_STATUS_SDMA_RPY_TAG_ERR_SMASK \
 561                | SEND_DMA_ERR_STATUS_SDMA_CSR_PARITY_ERR_SMASK \
 562                | SEND_DMA_ERR_STATUS_SDMA_PCIE_REQ_TRACKING_UNC_ERR_SMASK)
 563
 564/* SendEgressErrInfo bits that correspond to a PortXmitDiscard counter */
 565#define PORT_DISCARD_EGRESS_ERRS \
 566        (SEND_EGRESS_ERR_INFO_TOO_LONG_IB_PACKET_ERR_SMASK \
 567        | SEND_EGRESS_ERR_INFO_VL_MAPPING_ERR_SMASK \
 568        | SEND_EGRESS_ERR_INFO_VL_ERR_SMASK)
 569
 570/*
 571 * TXE Egress Error flags
 572 */
 573#define SEES(text) SEND_EGRESS_ERR_STATUS_##text##_ERR_SMASK
 574static struct flag_table egress_err_status_flags[] = {
 575/* 0*/  FLAG_ENTRY0("TxPktIntegrityMemCorErr", SEES(TX_PKT_INTEGRITY_MEM_COR)),
 576/* 1*/  FLAG_ENTRY0("TxPktIntegrityMemUncErr", SEES(TX_PKT_INTEGRITY_MEM_UNC)),
 577/* 2 reserved */
 578/* 3*/  FLAG_ENTRY0("TxEgressFifoUnderrunOrParityErr",
 579                SEES(TX_EGRESS_FIFO_UNDERRUN_OR_PARITY)),
 580/* 4*/  FLAG_ENTRY0("TxLinkdownErr", SEES(TX_LINKDOWN)),
 581/* 5*/  FLAG_ENTRY0("TxIncorrectLinkStateErr", SEES(TX_INCORRECT_LINK_STATE)),
 582/* 6 reserved */
 583/* 7*/  FLAG_ENTRY0("TxPioLaunchIntfParityErr",
 584                SEES(TX_PIO_LAUNCH_INTF_PARITY)),
 585/* 8*/  FLAG_ENTRY0("TxSdmaLaunchIntfParityErr",
 586                SEES(TX_SDMA_LAUNCH_INTF_PARITY)),
 587/* 9-10 reserved */
 588/*11*/  FLAG_ENTRY0("TxSbrdCtlStateMachineParityErr",
 589                SEES(TX_SBRD_CTL_STATE_MACHINE_PARITY)),
 590/*12*/  FLAG_ENTRY0("TxIllegalVLErr", SEES(TX_ILLEGAL_VL)),
 591/*13*/  FLAG_ENTRY0("TxLaunchCsrParityErr", SEES(TX_LAUNCH_CSR_PARITY)),
 592/*14*/  FLAG_ENTRY0("TxSbrdCtlCsrParityErr", SEES(TX_SBRD_CTL_CSR_PARITY)),
 593/*15*/  FLAG_ENTRY0("TxConfigParityErr", SEES(TX_CONFIG_PARITY)),
 594/*16*/  FLAG_ENTRY0("TxSdma0DisallowedPacketErr",
 595                SEES(TX_SDMA0_DISALLOWED_PACKET)),
 596/*17*/  FLAG_ENTRY0("TxSdma1DisallowedPacketErr",
 597                SEES(TX_SDMA1_DISALLOWED_PACKET)),
 598/*18*/  FLAG_ENTRY0("TxSdma2DisallowedPacketErr",
 599                SEES(TX_SDMA2_DISALLOWED_PACKET)),
 600/*19*/  FLAG_ENTRY0("TxSdma3DisallowedPacketErr",
 601                SEES(TX_SDMA3_DISALLOWED_PACKET)),
 602/*20*/  FLAG_ENTRY0("TxSdma4DisallowedPacketErr",
 603                SEES(TX_SDMA4_DISALLOWED_PACKET)),
 604/*21*/  FLAG_ENTRY0("TxSdma5DisallowedPacketErr",
 605                SEES(TX_SDMA5_DISALLOWED_PACKET)),
 606/*22*/  FLAG_ENTRY0("TxSdma6DisallowedPacketErr",
 607                SEES(TX_SDMA6_DISALLOWED_PACKET)),
 608/*23*/  FLAG_ENTRY0("TxSdma7DisallowedPacketErr",
 609                SEES(TX_SDMA7_DISALLOWED_PACKET)),
 610/*24*/  FLAG_ENTRY0("TxSdma8DisallowedPacketErr",
 611                SEES(TX_SDMA8_DISALLOWED_PACKET)),
 612/*25*/  FLAG_ENTRY0("TxSdma9DisallowedPacketErr",
 613                SEES(TX_SDMA9_DISALLOWED_PACKET)),
 614/*26*/  FLAG_ENTRY0("TxSdma10DisallowedPacketErr",
 615                SEES(TX_SDMA10_DISALLOWED_PACKET)),
 616/*27*/  FLAG_ENTRY0("TxSdma11DisallowedPacketErr",
 617                SEES(TX_SDMA11_DISALLOWED_PACKET)),
 618/*28*/  FLAG_ENTRY0("TxSdma12DisallowedPacketErr",
 619                SEES(TX_SDMA12_DISALLOWED_PACKET)),
 620/*29*/  FLAG_ENTRY0("TxSdma13DisallowedPacketErr",
 621                SEES(TX_SDMA13_DISALLOWED_PACKET)),
 622/*30*/  FLAG_ENTRY0("TxSdma14DisallowedPacketErr",
 623                SEES(TX_SDMA14_DISALLOWED_PACKET)),
 624/*31*/  FLAG_ENTRY0("TxSdma15DisallowedPacketErr",
 625                SEES(TX_SDMA15_DISALLOWED_PACKET)),
 626/*32*/  FLAG_ENTRY0("TxLaunchFifo0UncOrParityErr",
 627                SEES(TX_LAUNCH_FIFO0_UNC_OR_PARITY)),
 628/*33*/  FLAG_ENTRY0("TxLaunchFifo1UncOrParityErr",
 629                SEES(TX_LAUNCH_FIFO1_UNC_OR_PARITY)),
 630/*34*/  FLAG_ENTRY0("TxLaunchFifo2UncOrParityErr",
 631                SEES(TX_LAUNCH_FIFO2_UNC_OR_PARITY)),
 632/*35*/  FLAG_ENTRY0("TxLaunchFifo3UncOrParityErr",
 633                SEES(TX_LAUNCH_FIFO3_UNC_OR_PARITY)),
 634/*36*/  FLAG_ENTRY0("TxLaunchFifo4UncOrParityErr",
 635                SEES(TX_LAUNCH_FIFO4_UNC_OR_PARITY)),
 636/*37*/  FLAG_ENTRY0("TxLaunchFifo5UncOrParityErr",
 637                SEES(TX_LAUNCH_FIFO5_UNC_OR_PARITY)),
 638/*38*/  FLAG_ENTRY0("TxLaunchFifo6UncOrParityErr",
 639                SEES(TX_LAUNCH_FIFO6_UNC_OR_PARITY)),
 640/*39*/  FLAG_ENTRY0("TxLaunchFifo7UncOrParityErr",
 641                SEES(TX_LAUNCH_FIFO7_UNC_OR_PARITY)),
 642/*40*/  FLAG_ENTRY0("TxLaunchFifo8UncOrParityErr",
 643                SEES(TX_LAUNCH_FIFO8_UNC_OR_PARITY)),
 644/*41*/  FLAG_ENTRY0("TxCreditReturnParityErr", SEES(TX_CREDIT_RETURN_PARITY)),
 645/*42*/  FLAG_ENTRY0("TxSbHdrUncErr", SEES(TX_SB_HDR_UNC)),
 646/*43*/  FLAG_ENTRY0("TxReadSdmaMemoryUncErr", SEES(TX_READ_SDMA_MEMORY_UNC)),
 647/*44*/  FLAG_ENTRY0("TxReadPioMemoryUncErr", SEES(TX_READ_PIO_MEMORY_UNC)),
 648/*45*/  FLAG_ENTRY0("TxEgressFifoUncErr", SEES(TX_EGRESS_FIFO_UNC)),
 649/*46*/  FLAG_ENTRY0("TxHcrcInsertionErr", SEES(TX_HCRC_INSERTION)),
 650/*47*/  FLAG_ENTRY0("TxCreditReturnVLErr", SEES(TX_CREDIT_RETURN_VL)),
 651/*48*/  FLAG_ENTRY0("TxLaunchFifo0CorErr", SEES(TX_LAUNCH_FIFO0_COR)),
 652/*49*/  FLAG_ENTRY0("TxLaunchFifo1CorErr", SEES(TX_LAUNCH_FIFO1_COR)),
 653/*50*/  FLAG_ENTRY0("TxLaunchFifo2CorErr", SEES(TX_LAUNCH_FIFO2_COR)),
 654/*51*/  FLAG_ENTRY0("TxLaunchFifo3CorErr", SEES(TX_LAUNCH_FIFO3_COR)),
 655/*52*/  FLAG_ENTRY0("TxLaunchFifo4CorErr", SEES(TX_LAUNCH_FIFO4_COR)),
 656/*53*/  FLAG_ENTRY0("TxLaunchFifo5CorErr", SEES(TX_LAUNCH_FIFO5_COR)),
 657/*54*/  FLAG_ENTRY0("TxLaunchFifo6CorErr", SEES(TX_LAUNCH_FIFO6_COR)),
 658/*55*/  FLAG_ENTRY0("TxLaunchFifo7CorErr", SEES(TX_LAUNCH_FIFO7_COR)),
 659/*56*/  FLAG_ENTRY0("TxLaunchFifo8CorErr", SEES(TX_LAUNCH_FIFO8_COR)),
 660/*57*/  FLAG_ENTRY0("TxCreditOverrunErr", SEES(TX_CREDIT_OVERRUN)),
 661/*58*/  FLAG_ENTRY0("TxSbHdrCorErr", SEES(TX_SB_HDR_COR)),
 662/*59*/  FLAG_ENTRY0("TxReadSdmaMemoryCorErr", SEES(TX_READ_SDMA_MEMORY_COR)),
 663/*60*/  FLAG_ENTRY0("TxReadPioMemoryCorErr", SEES(TX_READ_PIO_MEMORY_COR)),
 664/*61*/  FLAG_ENTRY0("TxEgressFifoCorErr", SEES(TX_EGRESS_FIFO_COR)),
 665/*62*/  FLAG_ENTRY0("TxReadSdmaMemoryCsrUncErr",
 666                SEES(TX_READ_SDMA_MEMORY_CSR_UNC)),
 667/*63*/  FLAG_ENTRY0("TxReadPioMemoryCsrUncErr",
 668                SEES(TX_READ_PIO_MEMORY_CSR_UNC)),
 669};
 670
 671/*
 672 * TXE Egress Error Info flags
 673 */
 674#define SEEI(text) SEND_EGRESS_ERR_INFO_##text##_ERR_SMASK
 675static struct flag_table egress_err_info_flags[] = {
 676/* 0*/  FLAG_ENTRY0("Reserved", 0ull),
 677/* 1*/  FLAG_ENTRY0("VLErr", SEEI(VL)),
 678/* 2*/  FLAG_ENTRY0("JobKeyErr", SEEI(JOB_KEY)),
 679/* 3*/  FLAG_ENTRY0("JobKeyErr", SEEI(JOB_KEY)),
 680/* 4*/  FLAG_ENTRY0("PartitionKeyErr", SEEI(PARTITION_KEY)),
 681/* 5*/  FLAG_ENTRY0("SLIDErr", SEEI(SLID)),
 682/* 6*/  FLAG_ENTRY0("OpcodeErr", SEEI(OPCODE)),
 683/* 7*/  FLAG_ENTRY0("VLMappingErr", SEEI(VL_MAPPING)),
 684/* 8*/  FLAG_ENTRY0("RawErr", SEEI(RAW)),
 685/* 9*/  FLAG_ENTRY0("RawIPv6Err", SEEI(RAW_IPV6)),
 686/*10*/  FLAG_ENTRY0("GRHErr", SEEI(GRH)),
 687/*11*/  FLAG_ENTRY0("BypassErr", SEEI(BYPASS)),
 688/*12*/  FLAG_ENTRY0("KDETHPacketsErr", SEEI(KDETH_PACKETS)),
 689/*13*/  FLAG_ENTRY0("NonKDETHPacketsErr", SEEI(NON_KDETH_PACKETS)),
 690/*14*/  FLAG_ENTRY0("TooSmallIBPacketsErr", SEEI(TOO_SMALL_IB_PACKETS)),
 691/*15*/  FLAG_ENTRY0("TooSmallBypassPacketsErr", SEEI(TOO_SMALL_BYPASS_PACKETS)),
 692/*16*/  FLAG_ENTRY0("PbcTestErr", SEEI(PBC_TEST)),
 693/*17*/  FLAG_ENTRY0("BadPktLenErr", SEEI(BAD_PKT_LEN)),
 694/*18*/  FLAG_ENTRY0("TooLongIBPacketErr", SEEI(TOO_LONG_IB_PACKET)),
 695/*19*/  FLAG_ENTRY0("TooLongBypassPacketsErr", SEEI(TOO_LONG_BYPASS_PACKETS)),
 696/*20*/  FLAG_ENTRY0("PbcStaticRateControlErr", SEEI(PBC_STATIC_RATE_CONTROL)),
 697/*21*/  FLAG_ENTRY0("BypassBadPktLenErr", SEEI(BAD_PKT_LEN)),
 698};
 699
 700/* TXE Egress errors that cause an SPC freeze */
 701#define ALL_TXE_EGRESS_FREEZE_ERR \
 702        (SEES(TX_EGRESS_FIFO_UNDERRUN_OR_PARITY) \
 703        | SEES(TX_PIO_LAUNCH_INTF_PARITY) \
 704        | SEES(TX_SDMA_LAUNCH_INTF_PARITY) \
 705        | SEES(TX_SBRD_CTL_STATE_MACHINE_PARITY) \
 706        | SEES(TX_LAUNCH_CSR_PARITY) \
 707        | SEES(TX_SBRD_CTL_CSR_PARITY) \
 708        | SEES(TX_CONFIG_PARITY) \
 709        | SEES(TX_LAUNCH_FIFO0_UNC_OR_PARITY) \
 710        | SEES(TX_LAUNCH_FIFO1_UNC_OR_PARITY) \
 711        | SEES(TX_LAUNCH_FIFO2_UNC_OR_PARITY) \
 712        | SEES(TX_LAUNCH_FIFO3_UNC_OR_PARITY) \
 713        | SEES(TX_LAUNCH_FIFO4_UNC_OR_PARITY) \
 714        | SEES(TX_LAUNCH_FIFO5_UNC_OR_PARITY) \
 715        | SEES(TX_LAUNCH_FIFO6_UNC_OR_PARITY) \
 716        | SEES(TX_LAUNCH_FIFO7_UNC_OR_PARITY) \
 717        | SEES(TX_LAUNCH_FIFO8_UNC_OR_PARITY) \
 718        | SEES(TX_CREDIT_RETURN_PARITY))
 719
 720/*
 721 * TXE Send error flags
 722 */
 723#define SES(name) SEND_ERR_STATUS_SEND_##name##_ERR_SMASK
 724static struct flag_table send_err_status_flags[] = {
 725/* 0*/  FLAG_ENTRY0("SendCsrParityErr", SES(CSR_PARITY)),
 726/* 1*/  FLAG_ENTRY0("SendCsrReadBadAddrErr", SES(CSR_READ_BAD_ADDR)),
 727/* 2*/  FLAG_ENTRY0("SendCsrWriteBadAddrErr", SES(CSR_WRITE_BAD_ADDR))
 728};
 729
 730/*
 731 * TXE Send Context Error flags and consequences
 732 */
 733static struct flag_table sc_err_status_flags[] = {
 734/* 0*/  FLAG_ENTRY("InconsistentSop",
 735                SEC_PACKET_DROPPED | SEC_SC_HALTED,
 736                SEND_CTXT_ERR_STATUS_PIO_INCONSISTENT_SOP_ERR_SMASK),
 737/* 1*/  FLAG_ENTRY("DisallowedPacket",
 738                SEC_PACKET_DROPPED | SEC_SC_HALTED,
 739                SEND_CTXT_ERR_STATUS_PIO_DISALLOWED_PACKET_ERR_SMASK),
 740/* 2*/  FLAG_ENTRY("WriteCrossesBoundary",
 741                SEC_WRITE_DROPPED | SEC_SC_HALTED,
 742                SEND_CTXT_ERR_STATUS_PIO_WRITE_CROSSES_BOUNDARY_ERR_SMASK),
 743/* 3*/  FLAG_ENTRY("WriteOverflow",
 744                SEC_WRITE_DROPPED | SEC_SC_HALTED,
 745                SEND_CTXT_ERR_STATUS_PIO_WRITE_OVERFLOW_ERR_SMASK),
 746/* 4*/  FLAG_ENTRY("WriteOutOfBounds",
 747                SEC_WRITE_DROPPED | SEC_SC_HALTED,
 748                SEND_CTXT_ERR_STATUS_PIO_WRITE_OUT_OF_BOUNDS_ERR_SMASK),
 749/* 5-63 reserved*/
 750};
 751
 752/*
 753 * RXE Receive Error flags
 754 */
 755#define RXES(name) RCV_ERR_STATUS_RX_##name##_ERR_SMASK
 756static struct flag_table rxe_err_status_flags[] = {
 757/* 0*/  FLAG_ENTRY0("RxDmaCsrCorErr", RXES(DMA_CSR_COR)),
 758/* 1*/  FLAG_ENTRY0("RxDcIntfParityErr", RXES(DC_INTF_PARITY)),
 759/* 2*/  FLAG_ENTRY0("RxRcvHdrUncErr", RXES(RCV_HDR_UNC)),
 760/* 3*/  FLAG_ENTRY0("RxRcvHdrCorErr", RXES(RCV_HDR_COR)),
 761/* 4*/  FLAG_ENTRY0("RxRcvDataUncErr", RXES(RCV_DATA_UNC)),
 762/* 5*/  FLAG_ENTRY0("RxRcvDataCorErr", RXES(RCV_DATA_COR)),
 763/* 6*/  FLAG_ENTRY0("RxRcvQpMapTableUncErr", RXES(RCV_QP_MAP_TABLE_UNC)),
 764/* 7*/  FLAG_ENTRY0("RxRcvQpMapTableCorErr", RXES(RCV_QP_MAP_TABLE_COR)),
 765/* 8*/  FLAG_ENTRY0("RxRcvCsrParityErr", RXES(RCV_CSR_PARITY)),
 766/* 9*/  FLAG_ENTRY0("RxDcSopEopParityErr", RXES(DC_SOP_EOP_PARITY)),
 767/*10*/  FLAG_ENTRY0("RxDmaFlagUncErr", RXES(DMA_FLAG_UNC)),
 768/*11*/  FLAG_ENTRY0("RxDmaFlagCorErr", RXES(DMA_FLAG_COR)),
 769/*12*/  FLAG_ENTRY0("RxRcvFsmEncodingErr", RXES(RCV_FSM_ENCODING)),
 770/*13*/  FLAG_ENTRY0("RxRbufFreeListUncErr", RXES(RBUF_FREE_LIST_UNC)),
 771/*14*/  FLAG_ENTRY0("RxRbufFreeListCorErr", RXES(RBUF_FREE_LIST_COR)),
 772/*15*/  FLAG_ENTRY0("RxRbufLookupDesRegUncErr", RXES(RBUF_LOOKUP_DES_REG_UNC)),
 773/*16*/  FLAG_ENTRY0("RxRbufLookupDesRegUncCorErr",
 774                RXES(RBUF_LOOKUP_DES_REG_UNC_COR)),
 775/*17*/  FLAG_ENTRY0("RxRbufLookupDesUncErr", RXES(RBUF_LOOKUP_DES_UNC)),
 776/*18*/  FLAG_ENTRY0("RxRbufLookupDesCorErr", RXES(RBUF_LOOKUP_DES_COR)),
 777/*19*/  FLAG_ENTRY0("RxRbufBlockListReadUncErr",
 778                RXES(RBUF_BLOCK_LIST_READ_UNC)),
 779/*20*/  FLAG_ENTRY0("RxRbufBlockListReadCorErr",
 780                RXES(RBUF_BLOCK_LIST_READ_COR)),
 781/*21*/  FLAG_ENTRY0("RxRbufCsrQHeadBufNumParityErr",
 782                RXES(RBUF_CSR_QHEAD_BUF_NUM_PARITY)),
 783/*22*/  FLAG_ENTRY0("RxRbufCsrQEntCntParityErr",
 784                RXES(RBUF_CSR_QENT_CNT_PARITY)),
 785/*23*/  FLAG_ENTRY0("RxRbufCsrQNextBufParityErr",
 786                RXES(RBUF_CSR_QNEXT_BUF_PARITY)),
 787/*24*/  FLAG_ENTRY0("RxRbufCsrQVldBitParityErr",
 788                RXES(RBUF_CSR_QVLD_BIT_PARITY)),
 789/*25*/  FLAG_ENTRY0("RxRbufCsrQHdPtrParityErr", RXES(RBUF_CSR_QHD_PTR_PARITY)),
 790/*26*/  FLAG_ENTRY0("RxRbufCsrQTlPtrParityErr", RXES(RBUF_CSR_QTL_PTR_PARITY)),
 791/*27*/  FLAG_ENTRY0("RxRbufCsrQNumOfPktParityErr",
 792                RXES(RBUF_CSR_QNUM_OF_PKT_PARITY)),
 793/*28*/  FLAG_ENTRY0("RxRbufCsrQEOPDWParityErr", RXES(RBUF_CSR_QEOPDW_PARITY)),
 794/*29*/  FLAG_ENTRY0("RxRbufCtxIdParityErr", RXES(RBUF_CTX_ID_PARITY)),
 795/*30*/  FLAG_ENTRY0("RxRBufBadLookupErr", RXES(RBUF_BAD_LOOKUP)),
 796/*31*/  FLAG_ENTRY0("RxRbufFullErr", RXES(RBUF_FULL)),
 797/*32*/  FLAG_ENTRY0("RxRbufEmptyErr", RXES(RBUF_EMPTY)),
 798/*33*/  FLAG_ENTRY0("RxRbufFlRdAddrParityErr", RXES(RBUF_FL_RD_ADDR_PARITY)),
 799/*34*/  FLAG_ENTRY0("RxRbufFlWrAddrParityErr", RXES(RBUF_FL_WR_ADDR_PARITY)),
 800/*35*/  FLAG_ENTRY0("RxRbufFlInitdoneParityErr",
 801                RXES(RBUF_FL_INITDONE_PARITY)),
 802/*36*/  FLAG_ENTRY0("RxRbufFlInitWrAddrParityErr",
 803                RXES(RBUF_FL_INIT_WR_ADDR_PARITY)),
 804/*37*/  FLAG_ENTRY0("RxRbufNextFreeBufUncErr", RXES(RBUF_NEXT_FREE_BUF_UNC)),
 805/*38*/  FLAG_ENTRY0("RxRbufNextFreeBufCorErr", RXES(RBUF_NEXT_FREE_BUF_COR)),
 806/*39*/  FLAG_ENTRY0("RxLookupDesPart1UncErr", RXES(LOOKUP_DES_PART1_UNC)),
 807/*40*/  FLAG_ENTRY0("RxLookupDesPart1UncCorErr",
 808                RXES(LOOKUP_DES_PART1_UNC_COR)),
 809/*41*/  FLAG_ENTRY0("RxLookupDesPart2ParityErr",
 810                RXES(LOOKUP_DES_PART2_PARITY)),
 811/*42*/  FLAG_ENTRY0("RxLookupRcvArrayUncErr", RXES(LOOKUP_RCV_ARRAY_UNC)),
 812/*43*/  FLAG_ENTRY0("RxLookupRcvArrayCorErr", RXES(LOOKUP_RCV_ARRAY_COR)),
 813/*44*/  FLAG_ENTRY0("RxLookupCsrParityErr", RXES(LOOKUP_CSR_PARITY)),
 814/*45*/  FLAG_ENTRY0("RxHqIntrCsrParityErr", RXES(HQ_INTR_CSR_PARITY)),
 815/*46*/  FLAG_ENTRY0("RxHqIntrFsmErr", RXES(HQ_INTR_FSM)),
 816/*47*/  FLAG_ENTRY0("RxRbufDescPart1UncErr", RXES(RBUF_DESC_PART1_UNC)),
 817/*48*/  FLAG_ENTRY0("RxRbufDescPart1CorErr", RXES(RBUF_DESC_PART1_COR)),
 818/*49*/  FLAG_ENTRY0("RxRbufDescPart2UncErr", RXES(RBUF_DESC_PART2_UNC)),
 819/*50*/  FLAG_ENTRY0("RxRbufDescPart2CorErr", RXES(RBUF_DESC_PART2_COR)),
 820/*51*/  FLAG_ENTRY0("RxDmaHdrFifoRdUncErr", RXES(DMA_HDR_FIFO_RD_UNC)),
 821/*52*/  FLAG_ENTRY0("RxDmaHdrFifoRdCorErr", RXES(DMA_HDR_FIFO_RD_COR)),
 822/*53*/  FLAG_ENTRY0("RxDmaDataFifoRdUncErr", RXES(DMA_DATA_FIFO_RD_UNC)),
 823/*54*/  FLAG_ENTRY0("RxDmaDataFifoRdCorErr", RXES(DMA_DATA_FIFO_RD_COR)),
 824/*55*/  FLAG_ENTRY0("RxRbufDataUncErr", RXES(RBUF_DATA_UNC)),
 825/*56*/  FLAG_ENTRY0("RxRbufDataCorErr", RXES(RBUF_DATA_COR)),
 826/*57*/  FLAG_ENTRY0("RxDmaCsrParityErr", RXES(DMA_CSR_PARITY)),
 827/*58*/  FLAG_ENTRY0("RxDmaEqFsmEncodingErr", RXES(DMA_EQ_FSM_ENCODING)),
 828/*59*/  FLAG_ENTRY0("RxDmaDqFsmEncodingErr", RXES(DMA_DQ_FSM_ENCODING)),
 829/*60*/  FLAG_ENTRY0("RxDmaCsrUncErr", RXES(DMA_CSR_UNC)),
 830/*61*/  FLAG_ENTRY0("RxCsrReadBadAddrErr", RXES(CSR_READ_BAD_ADDR)),
 831/*62*/  FLAG_ENTRY0("RxCsrWriteBadAddrErr", RXES(CSR_WRITE_BAD_ADDR)),
 832/*63*/  FLAG_ENTRY0("RxCsrParityErr", RXES(CSR_PARITY))
 833};
 834
 835/* RXE errors that will trigger an SPC freeze */
 836#define ALL_RXE_FREEZE_ERR  \
 837        (RCV_ERR_STATUS_RX_RCV_QP_MAP_TABLE_UNC_ERR_SMASK \
 838        | RCV_ERR_STATUS_RX_RCV_CSR_PARITY_ERR_SMASK \
 839        | RCV_ERR_STATUS_RX_DMA_FLAG_UNC_ERR_SMASK \
 840        | RCV_ERR_STATUS_RX_RCV_FSM_ENCODING_ERR_SMASK \
 841        | RCV_ERR_STATUS_RX_RBUF_FREE_LIST_UNC_ERR_SMASK \
 842        | RCV_ERR_STATUS_RX_RBUF_LOOKUP_DES_REG_UNC_ERR_SMASK \
 843        | RCV_ERR_STATUS_RX_RBUF_LOOKUP_DES_REG_UNC_COR_ERR_SMASK \
 844        | RCV_ERR_STATUS_RX_RBUF_LOOKUP_DES_UNC_ERR_SMASK \
 845        | RCV_ERR_STATUS_RX_RBUF_BLOCK_LIST_READ_UNC_ERR_SMASK \
 846        | RCV_ERR_STATUS_RX_RBUF_CSR_QHEAD_BUF_NUM_PARITY_ERR_SMASK \
 847        | RCV_ERR_STATUS_RX_RBUF_CSR_QENT_CNT_PARITY_ERR_SMASK \
 848        | RCV_ERR_STATUS_RX_RBUF_CSR_QNEXT_BUF_PARITY_ERR_SMASK \
 849        | RCV_ERR_STATUS_RX_RBUF_CSR_QVLD_BIT_PARITY_ERR_SMASK \
 850        | RCV_ERR_STATUS_RX_RBUF_CSR_QHD_PTR_PARITY_ERR_SMASK \
 851        | RCV_ERR_STATUS_RX_RBUF_CSR_QTL_PTR_PARITY_ERR_SMASK \
 852        | RCV_ERR_STATUS_RX_RBUF_CSR_QNUM_OF_PKT_PARITY_ERR_SMASK \
 853        | RCV_ERR_STATUS_RX_RBUF_CSR_QEOPDW_PARITY_ERR_SMASK \
 854        | RCV_ERR_STATUS_RX_RBUF_CTX_ID_PARITY_ERR_SMASK \
 855        | RCV_ERR_STATUS_RX_RBUF_BAD_LOOKUP_ERR_SMASK \
 856        | RCV_ERR_STATUS_RX_RBUF_FULL_ERR_SMASK \
 857        | RCV_ERR_STATUS_RX_RBUF_EMPTY_ERR_SMASK \
 858        | RCV_ERR_STATUS_RX_RBUF_FL_RD_ADDR_PARITY_ERR_SMASK \
 859        | RCV_ERR_STATUS_RX_RBUF_FL_WR_ADDR_PARITY_ERR_SMASK \
 860        | RCV_ERR_STATUS_RX_RBUF_FL_INITDONE_PARITY_ERR_SMASK \
 861        | RCV_ERR_STATUS_RX_RBUF_FL_INIT_WR_ADDR_PARITY_ERR_SMASK \
 862        | RCV_ERR_STATUS_RX_RBUF_NEXT_FREE_BUF_UNC_ERR_SMASK \
 863        | RCV_ERR_STATUS_RX_LOOKUP_DES_PART1_UNC_ERR_SMASK \
 864        | RCV_ERR_STATUS_RX_LOOKUP_DES_PART1_UNC_COR_ERR_SMASK \
 865        | RCV_ERR_STATUS_RX_LOOKUP_DES_PART2_PARITY_ERR_SMASK \
 866        | RCV_ERR_STATUS_RX_LOOKUP_RCV_ARRAY_UNC_ERR_SMASK \
 867        | RCV_ERR_STATUS_RX_LOOKUP_CSR_PARITY_ERR_SMASK \
 868        | RCV_ERR_STATUS_RX_HQ_INTR_CSR_PARITY_ERR_SMASK \
 869        | RCV_ERR_STATUS_RX_HQ_INTR_FSM_ERR_SMASK \
 870        | RCV_ERR_STATUS_RX_RBUF_DESC_PART1_UNC_ERR_SMASK \
 871        | RCV_ERR_STATUS_RX_RBUF_DESC_PART1_COR_ERR_SMASK \
 872        | RCV_ERR_STATUS_RX_RBUF_DESC_PART2_UNC_ERR_SMASK \
 873        | RCV_ERR_STATUS_RX_DMA_HDR_FIFO_RD_UNC_ERR_SMASK \
 874        | RCV_ERR_STATUS_RX_DMA_DATA_FIFO_RD_UNC_ERR_SMASK \
 875        | RCV_ERR_STATUS_RX_RBUF_DATA_UNC_ERR_SMASK \
 876        | RCV_ERR_STATUS_RX_DMA_CSR_PARITY_ERR_SMASK \
 877        | RCV_ERR_STATUS_RX_DMA_EQ_FSM_ENCODING_ERR_SMASK \
 878        | RCV_ERR_STATUS_RX_DMA_DQ_FSM_ENCODING_ERR_SMASK \
 879        | RCV_ERR_STATUS_RX_DMA_CSR_UNC_ERR_SMASK \
 880        | RCV_ERR_STATUS_RX_CSR_PARITY_ERR_SMASK)
 881
 882#define RXE_FREEZE_ABORT_MASK \
 883        (RCV_ERR_STATUS_RX_DMA_CSR_UNC_ERR_SMASK | \
 884        RCV_ERR_STATUS_RX_DMA_HDR_FIFO_RD_UNC_ERR_SMASK | \
 885        RCV_ERR_STATUS_RX_DMA_DATA_FIFO_RD_UNC_ERR_SMASK)
 886
 887/*
 888 * DCC Error Flags
 889 */
 890#define DCCE(name) DCC_ERR_FLG_##name##_SMASK
 891static struct flag_table dcc_err_flags[] = {
 892        FLAG_ENTRY0("bad_l2_err", DCCE(BAD_L2_ERR)),
 893        FLAG_ENTRY0("bad_sc_err", DCCE(BAD_SC_ERR)),
 894        FLAG_ENTRY0("bad_mid_tail_err", DCCE(BAD_MID_TAIL_ERR)),
 895        FLAG_ENTRY0("bad_preemption_err", DCCE(BAD_PREEMPTION_ERR)),
 896        FLAG_ENTRY0("preemption_err", DCCE(PREEMPTION_ERR)),
 897        FLAG_ENTRY0("preemptionvl15_err", DCCE(PREEMPTIONVL15_ERR)),
 898        FLAG_ENTRY0("bad_vl_marker_err", DCCE(BAD_VL_MARKER_ERR)),
 899        FLAG_ENTRY0("bad_dlid_target_err", DCCE(BAD_DLID_TARGET_ERR)),
 900        FLAG_ENTRY0("bad_lver_err", DCCE(BAD_LVER_ERR)),
 901        FLAG_ENTRY0("uncorrectable_err", DCCE(UNCORRECTABLE_ERR)),
 902        FLAG_ENTRY0("bad_crdt_ack_err", DCCE(BAD_CRDT_ACK_ERR)),
 903        FLAG_ENTRY0("unsup_pkt_type", DCCE(UNSUP_PKT_TYPE)),
 904        FLAG_ENTRY0("bad_ctrl_flit_err", DCCE(BAD_CTRL_FLIT_ERR)),
 905        FLAG_ENTRY0("event_cntr_parity_err", DCCE(EVENT_CNTR_PARITY_ERR)),
 906        FLAG_ENTRY0("event_cntr_rollover_err", DCCE(EVENT_CNTR_ROLLOVER_ERR)),
 907        FLAG_ENTRY0("link_err", DCCE(LINK_ERR)),
 908        FLAG_ENTRY0("misc_cntr_rollover_err", DCCE(MISC_CNTR_ROLLOVER_ERR)),
 909        FLAG_ENTRY0("bad_ctrl_dist_err", DCCE(BAD_CTRL_DIST_ERR)),
 910        FLAG_ENTRY0("bad_tail_dist_err", DCCE(BAD_TAIL_DIST_ERR)),
 911        FLAG_ENTRY0("bad_head_dist_err", DCCE(BAD_HEAD_DIST_ERR)),
 912        FLAG_ENTRY0("nonvl15_state_err", DCCE(NONVL15_STATE_ERR)),
 913        FLAG_ENTRY0("vl15_multi_err", DCCE(VL15_MULTI_ERR)),
 914        FLAG_ENTRY0("bad_pkt_length_err", DCCE(BAD_PKT_LENGTH_ERR)),
 915        FLAG_ENTRY0("unsup_vl_err", DCCE(UNSUP_VL_ERR)),
 916        FLAG_ENTRY0("perm_nvl15_err", DCCE(PERM_NVL15_ERR)),
 917        FLAG_ENTRY0("slid_zero_err", DCCE(SLID_ZERO_ERR)),
 918        FLAG_ENTRY0("dlid_zero_err", DCCE(DLID_ZERO_ERR)),
 919        FLAG_ENTRY0("length_mtu_err", DCCE(LENGTH_MTU_ERR)),
 920        FLAG_ENTRY0("rx_early_drop_err", DCCE(RX_EARLY_DROP_ERR)),
 921        FLAG_ENTRY0("late_short_err", DCCE(LATE_SHORT_ERR)),
 922        FLAG_ENTRY0("late_long_err", DCCE(LATE_LONG_ERR)),
 923        FLAG_ENTRY0("late_ebp_err", DCCE(LATE_EBP_ERR)),
 924        FLAG_ENTRY0("fpe_tx_fifo_ovflw_err", DCCE(FPE_TX_FIFO_OVFLW_ERR)),
 925        FLAG_ENTRY0("fpe_tx_fifo_unflw_err", DCCE(FPE_TX_FIFO_UNFLW_ERR)),
 926        FLAG_ENTRY0("csr_access_blocked_host", DCCE(CSR_ACCESS_BLOCKED_HOST)),
 927        FLAG_ENTRY0("csr_access_blocked_uc", DCCE(CSR_ACCESS_BLOCKED_UC)),
 928        FLAG_ENTRY0("tx_ctrl_parity_err", DCCE(TX_CTRL_PARITY_ERR)),
 929        FLAG_ENTRY0("tx_ctrl_parity_mbe_err", DCCE(TX_CTRL_PARITY_MBE_ERR)),
 930        FLAG_ENTRY0("tx_sc_parity_err", DCCE(TX_SC_PARITY_ERR)),
 931        FLAG_ENTRY0("rx_ctrl_parity_mbe_err", DCCE(RX_CTRL_PARITY_MBE_ERR)),
 932        FLAG_ENTRY0("csr_parity_err", DCCE(CSR_PARITY_ERR)),
 933        FLAG_ENTRY0("csr_inval_addr", DCCE(CSR_INVAL_ADDR)),
 934        FLAG_ENTRY0("tx_byte_shft_parity_err", DCCE(TX_BYTE_SHFT_PARITY_ERR)),
 935        FLAG_ENTRY0("rx_byte_shft_parity_err", DCCE(RX_BYTE_SHFT_PARITY_ERR)),
 936        FLAG_ENTRY0("fmconfig_err", DCCE(FMCONFIG_ERR)),
 937        FLAG_ENTRY0("rcvport_err", DCCE(RCVPORT_ERR)),
 938};
 939
 940/*
 941 * LCB error flags
 942 */
 943#define LCBE(name) DC_LCB_ERR_FLG_##name##_SMASK
 944static struct flag_table lcb_err_flags[] = {
 945/* 0*/  FLAG_ENTRY0("CSR_PARITY_ERR", LCBE(CSR_PARITY_ERR)),
 946/* 1*/  FLAG_ENTRY0("INVALID_CSR_ADDR", LCBE(INVALID_CSR_ADDR)),
 947/* 2*/  FLAG_ENTRY0("RST_FOR_FAILED_DESKEW", LCBE(RST_FOR_FAILED_DESKEW)),
 948/* 3*/  FLAG_ENTRY0("ALL_LNS_FAILED_REINIT_TEST",
 949                LCBE(ALL_LNS_FAILED_REINIT_TEST)),
 950/* 4*/  FLAG_ENTRY0("LOST_REINIT_STALL_OR_TOS", LCBE(LOST_REINIT_STALL_OR_TOS)),
 951/* 5*/  FLAG_ENTRY0("TX_LESS_THAN_FOUR_LNS", LCBE(TX_LESS_THAN_FOUR_LNS)),
 952/* 6*/  FLAG_ENTRY0("RX_LESS_THAN_FOUR_LNS", LCBE(RX_LESS_THAN_FOUR_LNS)),
 953/* 7*/  FLAG_ENTRY0("SEQ_CRC_ERR", LCBE(SEQ_CRC_ERR)),
 954/* 8*/  FLAG_ENTRY0("REINIT_FROM_PEER", LCBE(REINIT_FROM_PEER)),
 955/* 9*/  FLAG_ENTRY0("REINIT_FOR_LN_DEGRADE", LCBE(REINIT_FOR_LN_DEGRADE)),
 956/*10*/  FLAG_ENTRY0("CRC_ERR_CNT_HIT_LIMIT", LCBE(CRC_ERR_CNT_HIT_LIMIT)),
 957/*11*/  FLAG_ENTRY0("RCLK_STOPPED", LCBE(RCLK_STOPPED)),
 958/*12*/  FLAG_ENTRY0("UNEXPECTED_REPLAY_MARKER", LCBE(UNEXPECTED_REPLAY_MARKER)),
 959/*13*/  FLAG_ENTRY0("UNEXPECTED_ROUND_TRIP_MARKER",
 960                LCBE(UNEXPECTED_ROUND_TRIP_MARKER)),
 961/*14*/  FLAG_ENTRY0("ILLEGAL_NULL_LTP", LCBE(ILLEGAL_NULL_LTP)),
 962/*15*/  FLAG_ENTRY0("ILLEGAL_FLIT_ENCODING", LCBE(ILLEGAL_FLIT_ENCODING)),
 963/*16*/  FLAG_ENTRY0("FLIT_INPUT_BUF_OFLW", LCBE(FLIT_INPUT_BUF_OFLW)),
 964/*17*/  FLAG_ENTRY0("VL_ACK_INPUT_BUF_OFLW", LCBE(VL_ACK_INPUT_BUF_OFLW)),
 965/*18*/  FLAG_ENTRY0("VL_ACK_INPUT_PARITY_ERR", LCBE(VL_ACK_INPUT_PARITY_ERR)),
 966/*19*/  FLAG_ENTRY0("VL_ACK_INPUT_WRONG_CRC_MODE",
 967                LCBE(VL_ACK_INPUT_WRONG_CRC_MODE)),
 968/*20*/  FLAG_ENTRY0("FLIT_INPUT_BUF_MBE", LCBE(FLIT_INPUT_BUF_MBE)),
 969/*21*/  FLAG_ENTRY0("FLIT_INPUT_BUF_SBE", LCBE(FLIT_INPUT_BUF_SBE)),
 970/*22*/  FLAG_ENTRY0("REPLAY_BUF_MBE", LCBE(REPLAY_BUF_MBE)),
 971/*23*/  FLAG_ENTRY0("REPLAY_BUF_SBE", LCBE(REPLAY_BUF_SBE)),
 972/*24*/  FLAG_ENTRY0("CREDIT_RETURN_FLIT_MBE", LCBE(CREDIT_RETURN_FLIT_MBE)),
 973/*25*/  FLAG_ENTRY0("RST_FOR_LINK_TIMEOUT", LCBE(RST_FOR_LINK_TIMEOUT)),
 974/*26*/  FLAG_ENTRY0("RST_FOR_INCOMPLT_RND_TRIP",
 975                LCBE(RST_FOR_INCOMPLT_RND_TRIP)),
 976/*27*/  FLAG_ENTRY0("HOLD_REINIT", LCBE(HOLD_REINIT)),
 977/*28*/  FLAG_ENTRY0("NEG_EDGE_LINK_TRANSFER_ACTIVE",
 978                LCBE(NEG_EDGE_LINK_TRANSFER_ACTIVE)),
 979/*29*/  FLAG_ENTRY0("REDUNDANT_FLIT_PARITY_ERR",
 980                LCBE(REDUNDANT_FLIT_PARITY_ERR))
 981};
 982
 983/*
 984 * DC8051 Error Flags
 985 */
 986#define D8E(name) DC_DC8051_ERR_FLG_##name##_SMASK
 987static struct flag_table dc8051_err_flags[] = {
 988        FLAG_ENTRY0("SET_BY_8051", D8E(SET_BY_8051)),
 989        FLAG_ENTRY0("LOST_8051_HEART_BEAT", D8E(LOST_8051_HEART_BEAT)),
 990        FLAG_ENTRY0("CRAM_MBE", D8E(CRAM_MBE)),
 991        FLAG_ENTRY0("CRAM_SBE", D8E(CRAM_SBE)),
 992        FLAG_ENTRY0("DRAM_MBE", D8E(DRAM_MBE)),
 993        FLAG_ENTRY0("DRAM_SBE", D8E(DRAM_SBE)),
 994        FLAG_ENTRY0("IRAM_MBE", D8E(IRAM_MBE)),
 995        FLAG_ENTRY0("IRAM_SBE", D8E(IRAM_SBE)),
 996        FLAG_ENTRY0("UNMATCHED_SECURE_MSG_ACROSS_BCC_LANES",
 997                    D8E(UNMATCHED_SECURE_MSG_ACROSS_BCC_LANES)),
 998        FLAG_ENTRY0("INVALID_CSR_ADDR", D8E(INVALID_CSR_ADDR)),
 999};
1000
1001/*
1002 * DC8051 Information Error flags
1003 *
1004 * Flags in DC8051_DBG_ERR_INFO_SET_BY_8051.ERROR field.
1005 */
1006static struct flag_table dc8051_info_err_flags[] = {
1007        FLAG_ENTRY0("Spico ROM check failed",  SPICO_ROM_FAILED),
1008        FLAG_ENTRY0("Unknown frame received",  UNKNOWN_FRAME),
1009        FLAG_ENTRY0("Target BER not met",      TARGET_BER_NOT_MET),
1010        FLAG_ENTRY0("Serdes internal loopback failure",
1011                    FAILED_SERDES_INTERNAL_LOOPBACK),
1012        FLAG_ENTRY0("Failed SerDes init",      FAILED_SERDES_INIT),
1013        FLAG_ENTRY0("Failed LNI(Polling)",     FAILED_LNI_POLLING),
1014        FLAG_ENTRY0("Failed LNI(Debounce)",    FAILED_LNI_DEBOUNCE),
1015        FLAG_ENTRY0("Failed LNI(EstbComm)",    FAILED_LNI_ESTBCOMM),
1016        FLAG_ENTRY0("Failed LNI(OptEq)",       FAILED_LNI_OPTEQ),
1017        FLAG_ENTRY0("Failed LNI(VerifyCap_1)", FAILED_LNI_VERIFY_CAP1),
1018        FLAG_ENTRY0("Failed LNI(VerifyCap_2)", FAILED_LNI_VERIFY_CAP2),
1019        FLAG_ENTRY0("Failed LNI(ConfigLT)",    FAILED_LNI_CONFIGLT),
1020        FLAG_ENTRY0("Host Handshake Timeout",  HOST_HANDSHAKE_TIMEOUT),
1021        FLAG_ENTRY0("External Device Request Timeout",
1022                    EXTERNAL_DEVICE_REQ_TIMEOUT),
1023};
1024
1025/*
1026 * DC8051 Information Host Information flags
1027 *
1028 * Flags in DC8051_DBG_ERR_INFO_SET_BY_8051.HOST_MSG field.
1029 */
1030static struct flag_table dc8051_info_host_msg_flags[] = {
1031        FLAG_ENTRY0("Host request done", 0x0001),
1032        FLAG_ENTRY0("BC PWR_MGM message", 0x0002),
1033        FLAG_ENTRY0("BC SMA message", 0x0004),
1034        FLAG_ENTRY0("BC Unknown message (BCC)", 0x0008),
1035        FLAG_ENTRY0("BC Unknown message (LCB)", 0x0010),
1036        FLAG_ENTRY0("External device config request", 0x0020),
1037        FLAG_ENTRY0("VerifyCap all frames received", 0x0040),
1038        FLAG_ENTRY0("LinkUp achieved", 0x0080),
1039        FLAG_ENTRY0("Link going down", 0x0100),
1040        FLAG_ENTRY0("Link width downgraded", 0x0200),
1041};
1042
1043static u32 encoded_size(u32 size);
1044static u32 chip_to_opa_lstate(struct hfi1_devdata *dd, u32 chip_lstate);
1045static int set_physical_link_state(struct hfi1_devdata *dd, u64 state);
1046static void read_vc_remote_phy(struct hfi1_devdata *dd, u8 *power_management,
1047                               u8 *continuous);
1048static void read_vc_remote_fabric(struct hfi1_devdata *dd, u8 *vau, u8 *z,
1049                                  u8 *vcu, u16 *vl15buf, u8 *crc_sizes);
1050static void read_vc_remote_link_width(struct hfi1_devdata *dd,
1051                                      u8 *remote_tx_rate, u16 *link_widths);
1052static void read_vc_local_link_mode(struct hfi1_devdata *dd, u8 *misc_bits,
1053                                    u8 *flag_bits, u16 *link_widths);
1054static void read_remote_device_id(struct hfi1_devdata *dd, u16 *device_id,
1055                                  u8 *device_rev);
1056static void read_local_lni(struct hfi1_devdata *dd, u8 *enable_lane_rx);
1057static int read_tx_settings(struct hfi1_devdata *dd, u8 *enable_lane_tx,
1058                            u8 *tx_polarity_inversion,
1059                            u8 *rx_polarity_inversion, u8 *max_rate);
1060static void handle_sdma_eng_err(struct hfi1_devdata *dd,
1061                                unsigned int context, u64 err_status);
1062static void handle_qsfp_int(struct hfi1_devdata *dd, u32 source, u64 reg);
1063static void handle_dcc_err(struct hfi1_devdata *dd,
1064                           unsigned int context, u64 err_status);
1065static void handle_lcb_err(struct hfi1_devdata *dd,
1066                           unsigned int context, u64 err_status);
1067static void handle_8051_interrupt(struct hfi1_devdata *dd, u32 unused, u64 reg);
1068static void handle_cce_err(struct hfi1_devdata *dd, u32 unused, u64 reg);
1069static void handle_rxe_err(struct hfi1_devdata *dd, u32 unused, u64 reg);
1070static void handle_misc_err(struct hfi1_devdata *dd, u32 unused, u64 reg);
1071static void handle_pio_err(struct hfi1_devdata *dd, u32 unused, u64 reg);
1072static void handle_sdma_err(struct hfi1_devdata *dd, u32 unused, u64 reg);
1073static void handle_egress_err(struct hfi1_devdata *dd, u32 unused, u64 reg);
1074static void handle_txe_err(struct hfi1_devdata *dd, u32 unused, u64 reg);
1075static void set_partition_keys(struct hfi1_pportdata *ppd);
1076static const char *link_state_name(u32 state);
1077static const char *link_state_reason_name(struct hfi1_pportdata *ppd,
1078                                          u32 state);
1079static int do_8051_command(struct hfi1_devdata *dd, u32 type, u64 in_data,
1080                           u64 *out_data);
1081static int read_idle_sma(struct hfi1_devdata *dd, u64 *data);
1082static int thermal_init(struct hfi1_devdata *dd);
1083
1084static void update_statusp(struct hfi1_pportdata *ppd, u32 state);
1085static int wait_phys_link_offline_substates(struct hfi1_pportdata *ppd,
1086                                            int msecs);
1087static int wait_logical_linkstate(struct hfi1_pportdata *ppd, u32 state,
1088                                  int msecs);
1089static void log_state_transition(struct hfi1_pportdata *ppd, u32 state);
1090static void log_physical_state(struct hfi1_pportdata *ppd, u32 state);
1091static int wait_physical_linkstate(struct hfi1_pportdata *ppd, u32 state,
1092                                   int msecs);
1093static int wait_phys_link_out_of_offline(struct hfi1_pportdata *ppd,
1094                                         int msecs);
1095static void read_planned_down_reason_code(struct hfi1_devdata *dd, u8 *pdrrc);
1096static void read_link_down_reason(struct hfi1_devdata *dd, u8 *ldr);
1097static void handle_temp_err(struct hfi1_devdata *dd);
1098static void dc_shutdown(struct hfi1_devdata *dd);
1099static void dc_start(struct hfi1_devdata *dd);
1100static int qos_rmt_entries(struct hfi1_devdata *dd, unsigned int *mp,
1101                           unsigned int *np);
1102static void clear_full_mgmt_pkey(struct hfi1_pportdata *ppd);
1103static int wait_link_transfer_active(struct hfi1_devdata *dd, int wait_ms);
1104static void clear_rsm_rule(struct hfi1_devdata *dd, u8 rule_index);
1105static void update_xmit_counters(struct hfi1_pportdata *ppd, u16 link_width);
1106
1107/*
1108 * Error interrupt table entry.  This is used as input to the interrupt
1109 * "clear down" routine used for all second tier error interrupt register.
1110 * Second tier interrupt registers have a single bit representing them
1111 * in the top-level CceIntStatus.
1112 */
1113struct err_reg_info {
1114        u32 status;             /* status CSR offset */
1115        u32 clear;              /* clear CSR offset */
1116        u32 mask;               /* mask CSR offset */
1117        void (*handler)(struct hfi1_devdata *dd, u32 source, u64 reg);
1118        const char *desc;
1119};
1120
1121#define NUM_MISC_ERRS (IS_GENERAL_ERR_END + 1 - IS_GENERAL_ERR_START)
1122#define NUM_DC_ERRS (IS_DC_END + 1 - IS_DC_START)
1123#define NUM_VARIOUS (IS_VARIOUS_END + 1 - IS_VARIOUS_START)
1124
1125/*
1126 * Helpers for building HFI and DC error interrupt table entries.  Different
1127 * helpers are needed because of inconsistent register names.
1128 */
1129#define EE(reg, handler, desc) \
1130        { reg##_STATUS, reg##_CLEAR, reg##_MASK, \
1131                handler, desc }
1132#define DC_EE1(reg, handler, desc) \
1133        { reg##_FLG, reg##_FLG_CLR, reg##_FLG_EN, handler, desc }
1134#define DC_EE2(reg, handler, desc) \
1135        { reg##_FLG, reg##_CLR, reg##_EN, handler, desc }
1136
1137/*
1138 * Table of the "misc" grouping of error interrupts.  Each entry refers to
1139 * another register containing more information.
1140 */
1141static const struct err_reg_info misc_errs[NUM_MISC_ERRS] = {
1142/* 0*/  EE(CCE_ERR,             handle_cce_err,    "CceErr"),
1143/* 1*/  EE(RCV_ERR,             handle_rxe_err,    "RxeErr"),
1144/* 2*/  EE(MISC_ERR,    handle_misc_err,   "MiscErr"),
1145/* 3*/  { 0, 0, 0, NULL }, /* reserved */
1146/* 4*/  EE(SEND_PIO_ERR,    handle_pio_err,    "PioErr"),
1147/* 5*/  EE(SEND_DMA_ERR,    handle_sdma_err,   "SDmaErr"),
1148/* 6*/  EE(SEND_EGRESS_ERR, handle_egress_err, "EgressErr"),
1149/* 7*/  EE(SEND_ERR,    handle_txe_err,    "TxeErr")
1150        /* the rest are reserved */
1151};
1152
1153/*
1154 * Index into the Various section of the interrupt sources
1155 * corresponding to the Critical Temperature interrupt.
1156 */
1157#define TCRIT_INT_SOURCE 4
1158
1159/*
1160 * SDMA error interrupt entry - refers to another register containing more
1161 * information.
1162 */
1163static const struct err_reg_info sdma_eng_err =
1164        EE(SEND_DMA_ENG_ERR, handle_sdma_eng_err, "SDmaEngErr");
1165
1166static const struct err_reg_info various_err[NUM_VARIOUS] = {
1167/* 0*/  { 0, 0, 0, NULL }, /* PbcInt */
1168/* 1*/  { 0, 0, 0, NULL }, /* GpioAssertInt */
1169/* 2*/  EE(ASIC_QSFP1,  handle_qsfp_int,        "QSFP1"),
1170/* 3*/  EE(ASIC_QSFP2,  handle_qsfp_int,        "QSFP2"),
1171/* 4*/  { 0, 0, 0, NULL }, /* TCritInt */
1172        /* rest are reserved */
1173};
1174
1175/*
1176 * The DC encoding of mtu_cap for 10K MTU in the DCC_CFG_PORT_CONFIG
1177 * register can not be derived from the MTU value because 10K is not
1178 * a power of 2. Therefore, we need a constant. Everything else can
1179 * be calculated.
1180 */
1181#define DCC_CFG_PORT_MTU_CAP_10240 7
1182
1183/*
1184 * Table of the DC grouping of error interrupts.  Each entry refers to
1185 * another register containing more information.
1186 */
1187static const struct err_reg_info dc_errs[NUM_DC_ERRS] = {
1188/* 0*/  DC_EE1(DCC_ERR,         handle_dcc_err,        "DCC Err"),
1189/* 1*/  DC_EE2(DC_LCB_ERR,      handle_lcb_err,        "LCB Err"),
1190/* 2*/  DC_EE2(DC_DC8051_ERR,   handle_8051_interrupt, "DC8051 Interrupt"),
1191/* 3*/  /* dc_lbm_int - special, see is_dc_int() */
1192        /* the rest are reserved */
1193};
1194
1195struct cntr_entry {
1196        /*
1197         * counter name
1198         */
1199        char *name;
1200
1201        /*
1202         * csr to read for name (if applicable)
1203         */
1204        u64 csr;
1205
1206        /*
1207         * offset into dd or ppd to store the counter's value
1208         */
1209        int offset;
1210
1211        /*
1212         * flags
1213         */
1214        u8 flags;
1215
1216        /*
1217         * accessor for stat element, context either dd or ppd
1218         */
1219        u64 (*rw_cntr)(const struct cntr_entry *, void *context, int vl,
1220                       int mode, u64 data);
1221};
1222
1223#define C_RCV_HDR_OVF_FIRST C_RCV_HDR_OVF_0
1224#define C_RCV_HDR_OVF_LAST C_RCV_HDR_OVF_159
1225
1226#define CNTR_ELEM(name, csr, offset, flags, accessor) \
1227{ \
1228        name, \
1229        csr, \
1230        offset, \
1231        flags, \
1232        accessor \
1233}
1234
1235/* 32bit RXE */
1236#define RXE32_PORT_CNTR_ELEM(name, counter, flags) \
1237CNTR_ELEM(#name, \
1238          (counter * 8 + RCV_COUNTER_ARRAY32), \
1239          0, flags | CNTR_32BIT, \
1240          port_access_u32_csr)
1241
1242#define RXE32_DEV_CNTR_ELEM(name, counter, flags) \
1243CNTR_ELEM(#name, \
1244          (counter * 8 + RCV_COUNTER_ARRAY32), \
1245          0, flags | CNTR_32BIT, \
1246          dev_access_u32_csr)
1247
1248/* 64bit RXE */
1249#define RXE64_PORT_CNTR_ELEM(name, counter, flags) \
1250CNTR_ELEM(#name, \
1251          (counter * 8 + RCV_COUNTER_ARRAY64), \
1252          0, flags, \
1253          port_access_u64_csr)
1254
1255#define RXE64_DEV_CNTR_ELEM(name, counter, flags) \
1256CNTR_ELEM(#name, \
1257          (counter * 8 + RCV_COUNTER_ARRAY64), \
1258          0, flags, \
1259          dev_access_u64_csr)
1260
1261#define OVR_LBL(ctx) C_RCV_HDR_OVF_ ## ctx
1262#define OVR_ELM(ctx) \
1263CNTR_ELEM("RcvHdrOvr" #ctx, \
1264          (RCV_HDR_OVFL_CNT + ctx * 0x100), \
1265          0, CNTR_NORMAL, port_access_u64_csr)
1266
1267/* 32bit TXE */
1268#define TXE32_PORT_CNTR_ELEM(name, counter, flags) \
1269CNTR_ELEM(#name, \
1270          (counter * 8 + SEND_COUNTER_ARRAY32), \
1271          0, flags | CNTR_32BIT, \
1272          port_access_u32_csr)
1273
1274/* 64bit TXE */
1275#define TXE64_PORT_CNTR_ELEM(name, counter, flags) \
1276CNTR_ELEM(#name, \
1277          (counter * 8 + SEND_COUNTER_ARRAY64), \
1278          0, flags, \
1279          port_access_u64_csr)
1280
1281# define TX64_DEV_CNTR_ELEM(name, counter, flags) \
1282CNTR_ELEM(#name,\
1283          counter * 8 + SEND_COUNTER_ARRAY64, \
1284          0, \
1285          flags, \
1286          dev_access_u64_csr)
1287
1288/* CCE */
1289#define CCE_PERF_DEV_CNTR_ELEM(name, counter, flags) \
1290CNTR_ELEM(#name, \
1291          (counter * 8 + CCE_COUNTER_ARRAY32), \
1292          0, flags | CNTR_32BIT, \
1293          dev_access_u32_csr)
1294
1295#define CCE_INT_DEV_CNTR_ELEM(name, counter, flags) \
1296CNTR_ELEM(#name, \
1297          (counter * 8 + CCE_INT_COUNTER_ARRAY32), \
1298          0, flags | CNTR_32BIT, \
1299          dev_access_u32_csr)
1300
1301/* DC */
1302#define DC_PERF_CNTR(name, counter, flags) \
1303CNTR_ELEM(#name, \
1304          counter, \
1305          0, \
1306          flags, \
1307          dev_access_u64_csr)
1308
1309#define DC_PERF_CNTR_LCB(name, counter, flags) \
1310CNTR_ELEM(#name, \
1311          counter, \
1312          0, \
1313          flags, \
1314          dc_access_lcb_cntr)
1315
1316/* ibp counters */
1317#define SW_IBP_CNTR(name, cntr) \
1318CNTR_ELEM(#name, \
1319          0, \
1320          0, \
1321          CNTR_SYNTH, \
1322          access_ibp_##cntr)
1323
1324/**
1325 * hfi1_addr_from_offset - return addr for readq/writeq
1326 * @dd: the dd device
1327 * @offset: the offset of the CSR within bar0
1328 *
1329 * This routine selects the appropriate base address
1330 * based on the indicated offset.
1331 */
1332static inline void __iomem *hfi1_addr_from_offset(
1333        const struct hfi1_devdata *dd,
1334        u32 offset)
1335{
1336        if (offset >= dd->base2_start)
1337                return dd->kregbase2 + (offset - dd->base2_start);
1338        return dd->kregbase1 + offset;
1339}
1340
1341/**
1342 * read_csr - read CSR at the indicated offset
1343 * @dd: the dd device
1344 * @offset: the offset of the CSR within bar0
1345 *
1346 * Return: the value read or all FF's if there
1347 * is no mapping
1348 */
1349u64 read_csr(const struct hfi1_devdata *dd, u32 offset)
1350{
1351        if (dd->flags & HFI1_PRESENT)
1352                return readq(hfi1_addr_from_offset(dd, offset));
1353        return -1;
1354}
1355
1356/**
1357 * write_csr - write CSR at the indicated offset
1358 * @dd: the dd device
1359 * @offset: the offset of the CSR within bar0
1360 * @value: value to write
1361 */
1362void write_csr(const struct hfi1_devdata *dd, u32 offset, u64 value)
1363{
1364        if (dd->flags & HFI1_PRESENT) {
1365                void __iomem *base = hfi1_addr_from_offset(dd, offset);
1366
1367                /* avoid write to RcvArray */
1368                if (WARN_ON(offset >= RCV_ARRAY && offset < dd->base2_start))
1369                        return;
1370                writeq(value, base);
1371        }
1372}
1373
1374/**
1375 * get_csr_addr - return te iomem address for offset
1376 * @dd: the dd device
1377 * @offset: the offset of the CSR within bar0
1378 *
1379 * Return: The iomem address to use in subsequent
1380 * writeq/readq operations.
1381 */
1382void __iomem *get_csr_addr(
1383        const struct hfi1_devdata *dd,
1384        u32 offset)
1385{
1386        if (dd->flags & HFI1_PRESENT)
1387                return hfi1_addr_from_offset(dd, offset);
1388        return NULL;
1389}
1390
1391static inline u64 read_write_csr(const struct hfi1_devdata *dd, u32 csr,
1392                                 int mode, u64 value)
1393{
1394        u64 ret;
1395
1396        if (mode == CNTR_MODE_R) {
1397                ret = read_csr(dd, csr);
1398        } else if (mode == CNTR_MODE_W) {
1399                write_csr(dd, csr, value);
1400                ret = value;
1401        } else {
1402                dd_dev_err(dd, "Invalid cntr register access mode");
1403                return 0;
1404        }
1405
1406        hfi1_cdbg(CNTR, "csr 0x%x val 0x%llx mode %d", csr, ret, mode);
1407        return ret;
1408}
1409
1410/* Dev Access */
1411static u64 dev_access_u32_csr(const struct cntr_entry *entry,
1412                              void *context, int vl, int mode, u64 data)
1413{
1414        struct hfi1_devdata *dd = context;
1415        u64 csr = entry->csr;
1416
1417        if (entry->flags & CNTR_SDMA) {
1418                if (vl == CNTR_INVALID_VL)
1419                        return 0;
1420                csr += 0x100 * vl;
1421        } else {
1422                if (vl != CNTR_INVALID_VL)
1423                        return 0;
1424        }
1425        return read_write_csr(dd, csr, mode, data);
1426}
1427
1428static u64 access_sde_err_cnt(const struct cntr_entry *entry,
1429                              void *context, int idx, int mode, u64 data)
1430{
1431        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1432
1433        if (dd->per_sdma && idx < dd->num_sdma)
1434                return dd->per_sdma[idx].err_cnt;
1435        return 0;
1436}
1437
1438static u64 access_sde_int_cnt(const struct cntr_entry *entry,
1439                              void *context, int idx, int mode, u64 data)
1440{
1441        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1442
1443        if (dd->per_sdma && idx < dd->num_sdma)
1444                return dd->per_sdma[idx].sdma_int_cnt;
1445        return 0;
1446}
1447
1448static u64 access_sde_idle_int_cnt(const struct cntr_entry *entry,
1449                                   void *context, int idx, int mode, u64 data)
1450{
1451        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1452
1453        if (dd->per_sdma && idx < dd->num_sdma)
1454                return dd->per_sdma[idx].idle_int_cnt;
1455        return 0;
1456}
1457
1458static u64 access_sde_progress_int_cnt(const struct cntr_entry *entry,
1459                                       void *context, int idx, int mode,
1460                                       u64 data)
1461{
1462        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1463
1464        if (dd->per_sdma && idx < dd->num_sdma)
1465                return dd->per_sdma[idx].progress_int_cnt;
1466        return 0;
1467}
1468
1469static u64 dev_access_u64_csr(const struct cntr_entry *entry, void *context,
1470                              int vl, int mode, u64 data)
1471{
1472        struct hfi1_devdata *dd = context;
1473
1474        u64 val = 0;
1475        u64 csr = entry->csr;
1476
1477        if (entry->flags & CNTR_VL) {
1478                if (vl == CNTR_INVALID_VL)
1479                        return 0;
1480                csr += 8 * vl;
1481        } else {
1482                if (vl != CNTR_INVALID_VL)
1483                        return 0;
1484        }
1485
1486        val = read_write_csr(dd, csr, mode, data);
1487        return val;
1488}
1489
1490static u64 dc_access_lcb_cntr(const struct cntr_entry *entry, void *context,
1491                              int vl, int mode, u64 data)
1492{
1493        struct hfi1_devdata *dd = context;
1494        u32 csr = entry->csr;
1495        int ret = 0;
1496
1497        if (vl != CNTR_INVALID_VL)
1498                return 0;
1499        if (mode == CNTR_MODE_R)
1500                ret = read_lcb_csr(dd, csr, &data);
1501        else if (mode == CNTR_MODE_W)
1502                ret = write_lcb_csr(dd, csr, data);
1503
1504        if (ret) {
1505                dd_dev_err(dd, "Could not acquire LCB for counter 0x%x", csr);
1506                return 0;
1507        }
1508
1509        hfi1_cdbg(CNTR, "csr 0x%x val 0x%llx mode %d", csr, data, mode);
1510        return data;
1511}
1512
1513/* Port Access */
1514static u64 port_access_u32_csr(const struct cntr_entry *entry, void *context,
1515                               int vl, int mode, u64 data)
1516{
1517        struct hfi1_pportdata *ppd = context;
1518
1519        if (vl != CNTR_INVALID_VL)
1520                return 0;
1521        return read_write_csr(ppd->dd, entry->csr, mode, data);
1522}
1523
1524static u64 port_access_u64_csr(const struct cntr_entry *entry,
1525                               void *context, int vl, int mode, u64 data)
1526{
1527        struct hfi1_pportdata *ppd = context;
1528        u64 val;
1529        u64 csr = entry->csr;
1530
1531        if (entry->flags & CNTR_VL) {
1532                if (vl == CNTR_INVALID_VL)
1533                        return 0;
1534                csr += 8 * vl;
1535        } else {
1536                if (vl != CNTR_INVALID_VL)
1537                        return 0;
1538        }
1539        val = read_write_csr(ppd->dd, csr, mode, data);
1540        return val;
1541}
1542
1543/* Software defined */
1544static inline u64 read_write_sw(struct hfi1_devdata *dd, u64 *cntr, int mode,
1545                                u64 data)
1546{
1547        u64 ret;
1548
1549        if (mode == CNTR_MODE_R) {
1550                ret = *cntr;
1551        } else if (mode == CNTR_MODE_W) {
1552                *cntr = data;
1553                ret = data;
1554        } else {
1555                dd_dev_err(dd, "Invalid cntr sw access mode");
1556                return 0;
1557        }
1558
1559        hfi1_cdbg(CNTR, "val 0x%llx mode %d", ret, mode);
1560
1561        return ret;
1562}
1563
1564static u64 access_sw_link_dn_cnt(const struct cntr_entry *entry, void *context,
1565                                 int vl, int mode, u64 data)
1566{
1567        struct hfi1_pportdata *ppd = context;
1568
1569        if (vl != CNTR_INVALID_VL)
1570                return 0;
1571        return read_write_sw(ppd->dd, &ppd->link_downed, mode, data);
1572}
1573
1574static u64 access_sw_link_up_cnt(const struct cntr_entry *entry, void *context,
1575                                 int vl, int mode, u64 data)
1576{
1577        struct hfi1_pportdata *ppd = context;
1578
1579        if (vl != CNTR_INVALID_VL)
1580                return 0;
1581        return read_write_sw(ppd->dd, &ppd->link_up, mode, data);
1582}
1583
1584static u64 access_sw_unknown_frame_cnt(const struct cntr_entry *entry,
1585                                       void *context, int vl, int mode,
1586                                       u64 data)
1587{
1588        struct hfi1_pportdata *ppd = (struct hfi1_pportdata *)context;
1589
1590        if (vl != CNTR_INVALID_VL)
1591                return 0;
1592        return read_write_sw(ppd->dd, &ppd->unknown_frame_count, mode, data);
1593}
1594
1595static u64 access_sw_xmit_discards(const struct cntr_entry *entry,
1596                                   void *context, int vl, int mode, u64 data)
1597{
1598        struct hfi1_pportdata *ppd = (struct hfi1_pportdata *)context;
1599        u64 zero = 0;
1600        u64 *counter;
1601
1602        if (vl == CNTR_INVALID_VL)
1603                counter = &ppd->port_xmit_discards;
1604        else if (vl >= 0 && vl < C_VL_COUNT)
1605                counter = &ppd->port_xmit_discards_vl[vl];
1606        else
1607                counter = &zero;
1608
1609        return read_write_sw(ppd->dd, counter, mode, data);
1610}
1611
1612static u64 access_xmit_constraint_errs(const struct cntr_entry *entry,
1613                                       void *context, int vl, int mode,
1614                                       u64 data)
1615{
1616        struct hfi1_pportdata *ppd = context;
1617
1618        if (vl != CNTR_INVALID_VL)
1619                return 0;
1620
1621        return read_write_sw(ppd->dd, &ppd->port_xmit_constraint_errors,
1622                             mode, data);
1623}
1624
1625static u64 access_rcv_constraint_errs(const struct cntr_entry *entry,
1626                                      void *context, int vl, int mode, u64 data)
1627{
1628        struct hfi1_pportdata *ppd = context;
1629
1630        if (vl != CNTR_INVALID_VL)
1631                return 0;
1632
1633        return read_write_sw(ppd->dd, &ppd->port_rcv_constraint_errors,
1634                             mode, data);
1635}
1636
1637u64 get_all_cpu_total(u64 __percpu *cntr)
1638{
1639        int cpu;
1640        u64 counter = 0;
1641
1642        for_each_possible_cpu(cpu)
1643                counter += *per_cpu_ptr(cntr, cpu);
1644        return counter;
1645}
1646
1647static u64 read_write_cpu(struct hfi1_devdata *dd, u64 *z_val,
1648                          u64 __percpu *cntr,
1649                          int vl, int mode, u64 data)
1650{
1651        u64 ret = 0;
1652
1653        if (vl != CNTR_INVALID_VL)
1654                return 0;
1655
1656        if (mode == CNTR_MODE_R) {
1657                ret = get_all_cpu_total(cntr) - *z_val;
1658        } else if (mode == CNTR_MODE_W) {
1659                /* A write can only zero the counter */
1660                if (data == 0)
1661                        *z_val = get_all_cpu_total(cntr);
1662                else
1663                        dd_dev_err(dd, "Per CPU cntrs can only be zeroed");
1664        } else {
1665                dd_dev_err(dd, "Invalid cntr sw cpu access mode");
1666                return 0;
1667        }
1668
1669        return ret;
1670}
1671
1672static u64 access_sw_cpu_intr(const struct cntr_entry *entry,
1673                              void *context, int vl, int mode, u64 data)
1674{
1675        struct hfi1_devdata *dd = context;
1676
1677        return read_write_cpu(dd, &dd->z_int_counter, dd->int_counter, vl,
1678                              mode, data);
1679}
1680
1681static u64 access_sw_cpu_rcv_limit(const struct cntr_entry *entry,
1682                                   void *context, int vl, int mode, u64 data)
1683{
1684        struct hfi1_devdata *dd = context;
1685
1686        return read_write_cpu(dd, &dd->z_rcv_limit, dd->rcv_limit, vl,
1687                              mode, data);
1688}
1689
1690static u64 access_sw_pio_wait(const struct cntr_entry *entry,
1691                              void *context, int vl, int mode, u64 data)
1692{
1693        struct hfi1_devdata *dd = context;
1694
1695        return dd->verbs_dev.n_piowait;
1696}
1697
1698static u64 access_sw_pio_drain(const struct cntr_entry *entry,
1699                               void *context, int vl, int mode, u64 data)
1700{
1701        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1702
1703        return dd->verbs_dev.n_piodrain;
1704}
1705
1706static u64 access_sw_ctx0_seq_drop(const struct cntr_entry *entry,
1707                                   void *context, int vl, int mode, u64 data)
1708{
1709        struct hfi1_devdata *dd = context;
1710
1711        return dd->ctx0_seq_drop;
1712}
1713
1714static u64 access_sw_vtx_wait(const struct cntr_entry *entry,
1715                              void *context, int vl, int mode, u64 data)
1716{
1717        struct hfi1_devdata *dd = context;
1718
1719        return dd->verbs_dev.n_txwait;
1720}
1721
1722static u64 access_sw_kmem_wait(const struct cntr_entry *entry,
1723                               void *context, int vl, int mode, u64 data)
1724{
1725        struct hfi1_devdata *dd = context;
1726
1727        return dd->verbs_dev.n_kmem_wait;
1728}
1729
1730static u64 access_sw_send_schedule(const struct cntr_entry *entry,
1731                                   void *context, int vl, int mode, u64 data)
1732{
1733        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1734
1735        return read_write_cpu(dd, &dd->z_send_schedule, dd->send_schedule, vl,
1736                              mode, data);
1737}
1738
1739/* Software counters for the error status bits within MISC_ERR_STATUS */
1740static u64 access_misc_pll_lock_fail_err_cnt(const struct cntr_entry *entry,
1741                                             void *context, int vl, int mode,
1742                                             u64 data)
1743{
1744        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1745
1746        return dd->misc_err_status_cnt[12];
1747}
1748
1749static u64 access_misc_mbist_fail_err_cnt(const struct cntr_entry *entry,
1750                                          void *context, int vl, int mode,
1751                                          u64 data)
1752{
1753        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1754
1755        return dd->misc_err_status_cnt[11];
1756}
1757
1758static u64 access_misc_invalid_eep_cmd_err_cnt(const struct cntr_entry *entry,
1759                                               void *context, int vl, int mode,
1760                                               u64 data)
1761{
1762        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1763
1764        return dd->misc_err_status_cnt[10];
1765}
1766
1767static u64 access_misc_efuse_done_parity_err_cnt(const struct cntr_entry *entry,
1768                                                 void *context, int vl,
1769                                                 int mode, u64 data)
1770{
1771        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1772
1773        return dd->misc_err_status_cnt[9];
1774}
1775
1776static u64 access_misc_efuse_write_err_cnt(const struct cntr_entry *entry,
1777                                           void *context, int vl, int mode,
1778                                           u64 data)
1779{
1780        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1781
1782        return dd->misc_err_status_cnt[8];
1783}
1784
1785static u64 access_misc_efuse_read_bad_addr_err_cnt(
1786                                const struct cntr_entry *entry,
1787                                void *context, int vl, int mode, u64 data)
1788{
1789        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1790
1791        return dd->misc_err_status_cnt[7];
1792}
1793
1794static u64 access_misc_efuse_csr_parity_err_cnt(const struct cntr_entry *entry,
1795                                                void *context, int vl,
1796                                                int mode, u64 data)
1797{
1798        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1799
1800        return dd->misc_err_status_cnt[6];
1801}
1802
1803static u64 access_misc_fw_auth_failed_err_cnt(const struct cntr_entry *entry,
1804                                              void *context, int vl, int mode,
1805                                              u64 data)
1806{
1807        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1808
1809        return dd->misc_err_status_cnt[5];
1810}
1811
1812static u64 access_misc_key_mismatch_err_cnt(const struct cntr_entry *entry,
1813                                            void *context, int vl, int mode,
1814                                            u64 data)
1815{
1816        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1817
1818        return dd->misc_err_status_cnt[4];
1819}
1820
1821static u64 access_misc_sbus_write_failed_err_cnt(const struct cntr_entry *entry,
1822                                                 void *context, int vl,
1823                                                 int mode, u64 data)
1824{
1825        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1826
1827        return dd->misc_err_status_cnt[3];
1828}
1829
1830static u64 access_misc_csr_write_bad_addr_err_cnt(
1831                                const struct cntr_entry *entry,
1832                                void *context, int vl, int mode, u64 data)
1833{
1834        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1835
1836        return dd->misc_err_status_cnt[2];
1837}
1838
1839static u64 access_misc_csr_read_bad_addr_err_cnt(const struct cntr_entry *entry,
1840                                                 void *context, int vl,
1841                                                 int mode, u64 data)
1842{
1843        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1844
1845        return dd->misc_err_status_cnt[1];
1846}
1847
1848static u64 access_misc_csr_parity_err_cnt(const struct cntr_entry *entry,
1849                                          void *context, int vl, int mode,
1850                                          u64 data)
1851{
1852        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1853
1854        return dd->misc_err_status_cnt[0];
1855}
1856
1857/*
1858 * Software counter for the aggregate of
1859 * individual CceErrStatus counters
1860 */
1861static u64 access_sw_cce_err_status_aggregated_cnt(
1862                                const struct cntr_entry *entry,
1863                                void *context, int vl, int mode, u64 data)
1864{
1865        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1866
1867        return dd->sw_cce_err_status_aggregate;
1868}
1869
1870/*
1871 * Software counters corresponding to each of the
1872 * error status bits within CceErrStatus
1873 */
1874static u64 access_cce_msix_csr_parity_err_cnt(const struct cntr_entry *entry,
1875                                              void *context, int vl, int mode,
1876                                              u64 data)
1877{
1878        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1879
1880        return dd->cce_err_status_cnt[40];
1881}
1882
1883static u64 access_cce_int_map_unc_err_cnt(const struct cntr_entry *entry,
1884                                          void *context, int vl, int mode,
1885                                          u64 data)
1886{
1887        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1888
1889        return dd->cce_err_status_cnt[39];
1890}
1891
1892static u64 access_cce_int_map_cor_err_cnt(const struct cntr_entry *entry,
1893                                          void *context, int vl, int mode,
1894                                          u64 data)
1895{
1896        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1897
1898        return dd->cce_err_status_cnt[38];
1899}
1900
1901static u64 access_cce_msix_table_unc_err_cnt(const struct cntr_entry *entry,
1902                                             void *context, int vl, int mode,
1903                                             u64 data)
1904{
1905        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1906
1907        return dd->cce_err_status_cnt[37];
1908}
1909
1910static u64 access_cce_msix_table_cor_err_cnt(const struct cntr_entry *entry,
1911                                             void *context, int vl, int mode,
1912                                             u64 data)
1913{
1914        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1915
1916        return dd->cce_err_status_cnt[36];
1917}
1918
1919static u64 access_cce_rxdma_conv_fifo_parity_err_cnt(
1920                                const struct cntr_entry *entry,
1921                                void *context, int vl, int mode, u64 data)
1922{
1923        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1924
1925        return dd->cce_err_status_cnt[35];
1926}
1927
1928static u64 access_cce_rcpl_async_fifo_parity_err_cnt(
1929                                const struct cntr_entry *entry,
1930                                void *context, int vl, int mode, u64 data)
1931{
1932        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1933
1934        return dd->cce_err_status_cnt[34];
1935}
1936
1937static u64 access_cce_seg_write_bad_addr_err_cnt(const struct cntr_entry *entry,
1938                                                 void *context, int vl,
1939                                                 int mode, u64 data)
1940{
1941        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1942
1943        return dd->cce_err_status_cnt[33];
1944}
1945
1946static u64 access_cce_seg_read_bad_addr_err_cnt(const struct cntr_entry *entry,
1947                                                void *context, int vl, int mode,
1948                                                u64 data)
1949{
1950        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1951
1952        return dd->cce_err_status_cnt[32];
1953}
1954
1955static u64 access_la_triggered_cnt(const struct cntr_entry *entry,
1956                                   void *context, int vl, int mode, u64 data)
1957{
1958        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1959
1960        return dd->cce_err_status_cnt[31];
1961}
1962
1963static u64 access_cce_trgt_cpl_timeout_err_cnt(const struct cntr_entry *entry,
1964                                               void *context, int vl, int mode,
1965                                               u64 data)
1966{
1967        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1968
1969        return dd->cce_err_status_cnt[30];
1970}
1971
1972static u64 access_pcic_receive_parity_err_cnt(const struct cntr_entry *entry,
1973                                              void *context, int vl, int mode,
1974                                              u64 data)
1975{
1976        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1977
1978        return dd->cce_err_status_cnt[29];
1979}
1980
1981static u64 access_pcic_transmit_back_parity_err_cnt(
1982                                const struct cntr_entry *entry,
1983                                void *context, int vl, int mode, u64 data)
1984{
1985        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1986
1987        return dd->cce_err_status_cnt[28];
1988}
1989
1990static u64 access_pcic_transmit_front_parity_err_cnt(
1991                                const struct cntr_entry *entry,
1992                                void *context, int vl, int mode, u64 data)
1993{
1994        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
1995
1996        return dd->cce_err_status_cnt[27];
1997}
1998
1999static u64 access_pcic_cpl_dat_q_unc_err_cnt(const struct cntr_entry *entry,
2000                                             void *context, int vl, int mode,
2001                                             u64 data)
2002{
2003        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2004
2005        return dd->cce_err_status_cnt[26];
2006}
2007
2008static u64 access_pcic_cpl_hd_q_unc_err_cnt(const struct cntr_entry *entry,
2009                                            void *context, int vl, int mode,
2010                                            u64 data)
2011{
2012        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2013
2014        return dd->cce_err_status_cnt[25];
2015}
2016
2017static u64 access_pcic_post_dat_q_unc_err_cnt(const struct cntr_entry *entry,
2018                                              void *context, int vl, int mode,
2019                                              u64 data)
2020{
2021        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2022
2023        return dd->cce_err_status_cnt[24];
2024}
2025
2026static u64 access_pcic_post_hd_q_unc_err_cnt(const struct cntr_entry *entry,
2027                                             void *context, int vl, int mode,
2028                                             u64 data)
2029{
2030        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2031
2032        return dd->cce_err_status_cnt[23];
2033}
2034
2035static u64 access_pcic_retry_sot_mem_unc_err_cnt(const struct cntr_entry *entry,
2036                                                 void *context, int vl,
2037                                                 int mode, u64 data)
2038{
2039        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2040
2041        return dd->cce_err_status_cnt[22];
2042}
2043
2044static u64 access_pcic_retry_mem_unc_err(const struct cntr_entry *entry,
2045                                         void *context, int vl, int mode,
2046                                         u64 data)
2047{
2048        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2049
2050        return dd->cce_err_status_cnt[21];
2051}
2052
2053static u64 access_pcic_n_post_dat_q_parity_err_cnt(
2054                                const struct cntr_entry *entry,
2055                                void *context, int vl, int mode, u64 data)
2056{
2057        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2058
2059        return dd->cce_err_status_cnt[20];
2060}
2061
2062static u64 access_pcic_n_post_h_q_parity_err_cnt(const struct cntr_entry *entry,
2063                                                 void *context, int vl,
2064                                                 int mode, u64 data)
2065{
2066        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2067
2068        return dd->cce_err_status_cnt[19];
2069}
2070
2071static u64 access_pcic_cpl_dat_q_cor_err_cnt(const struct cntr_entry *entry,
2072                                             void *context, int vl, int mode,
2073                                             u64 data)
2074{
2075        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2076
2077        return dd->cce_err_status_cnt[18];
2078}
2079
2080static u64 access_pcic_cpl_hd_q_cor_err_cnt(const struct cntr_entry *entry,
2081                                            void *context, int vl, int mode,
2082                                            u64 data)
2083{
2084        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2085
2086        return dd->cce_err_status_cnt[17];
2087}
2088
2089static u64 access_pcic_post_dat_q_cor_err_cnt(const struct cntr_entry *entry,
2090                                              void *context, int vl, int mode,
2091                                              u64 data)
2092{
2093        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2094
2095        return dd->cce_err_status_cnt[16];
2096}
2097
2098static u64 access_pcic_post_hd_q_cor_err_cnt(const struct cntr_entry *entry,
2099                                             void *context, int vl, int mode,
2100                                             u64 data)
2101{
2102        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2103
2104        return dd->cce_err_status_cnt[15];
2105}
2106
2107static u64 access_pcic_retry_sot_mem_cor_err_cnt(const struct cntr_entry *entry,
2108                                                 void *context, int vl,
2109                                                 int mode, u64 data)
2110{
2111        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2112
2113        return dd->cce_err_status_cnt[14];
2114}
2115
2116static u64 access_pcic_retry_mem_cor_err_cnt(const struct cntr_entry *entry,
2117                                             void *context, int vl, int mode,
2118                                             u64 data)
2119{
2120        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2121
2122        return dd->cce_err_status_cnt[13];
2123}
2124
2125static u64 access_cce_cli1_async_fifo_dbg_parity_err_cnt(
2126                                const struct cntr_entry *entry,
2127                                void *context, int vl, int mode, u64 data)
2128{
2129        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2130
2131        return dd->cce_err_status_cnt[12];
2132}
2133
2134static u64 access_cce_cli1_async_fifo_rxdma_parity_err_cnt(
2135                                const struct cntr_entry *entry,
2136                                void *context, int vl, int mode, u64 data)
2137{
2138        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2139
2140        return dd->cce_err_status_cnt[11];
2141}
2142
2143static u64 access_cce_cli1_async_fifo_sdma_hd_parity_err_cnt(
2144                                const struct cntr_entry *entry,
2145                                void *context, int vl, int mode, u64 data)
2146{
2147        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2148
2149        return dd->cce_err_status_cnt[10];
2150}
2151
2152static u64 access_cce_cl1_async_fifo_pio_crdt_parity_err_cnt(
2153                                const struct cntr_entry *entry,
2154                                void *context, int vl, int mode, u64 data)
2155{
2156        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2157
2158        return dd->cce_err_status_cnt[9];
2159}
2160
2161static u64 access_cce_cli2_async_fifo_parity_err_cnt(
2162                                const struct cntr_entry *entry,
2163                                void *context, int vl, int mode, u64 data)
2164{
2165        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2166
2167        return dd->cce_err_status_cnt[8];
2168}
2169
2170static u64 access_cce_csr_cfg_bus_parity_err_cnt(const struct cntr_entry *entry,
2171                                                 void *context, int vl,
2172                                                 int mode, u64 data)
2173{
2174        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2175
2176        return dd->cce_err_status_cnt[7];
2177}
2178
2179static u64 access_cce_cli0_async_fifo_parity_err_cnt(
2180                                const struct cntr_entry *entry,
2181                                void *context, int vl, int mode, u64 data)
2182{
2183        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2184
2185        return dd->cce_err_status_cnt[6];
2186}
2187
2188static u64 access_cce_rspd_data_parity_err_cnt(const struct cntr_entry *entry,
2189                                               void *context, int vl, int mode,
2190                                               u64 data)
2191{
2192        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2193
2194        return dd->cce_err_status_cnt[5];
2195}
2196
2197static u64 access_cce_trgt_access_err_cnt(const struct cntr_entry *entry,
2198                                          void *context, int vl, int mode,
2199                                          u64 data)
2200{
2201        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2202
2203        return dd->cce_err_status_cnt[4];
2204}
2205
2206static u64 access_cce_trgt_async_fifo_parity_err_cnt(
2207                                const struct cntr_entry *entry,
2208                                void *context, int vl, int mode, u64 data)
2209{
2210        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2211
2212        return dd->cce_err_status_cnt[3];
2213}
2214
2215static u64 access_cce_csr_write_bad_addr_err_cnt(const struct cntr_entry *entry,
2216                                                 void *context, int vl,
2217                                                 int mode, u64 data)
2218{
2219        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2220
2221        return dd->cce_err_status_cnt[2];
2222}
2223
2224static u64 access_cce_csr_read_bad_addr_err_cnt(const struct cntr_entry *entry,
2225                                                void *context, int vl,
2226                                                int mode, u64 data)
2227{
2228        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2229
2230        return dd->cce_err_status_cnt[1];
2231}
2232
2233static u64 access_ccs_csr_parity_err_cnt(const struct cntr_entry *entry,
2234                                         void *context, int vl, int mode,
2235                                         u64 data)
2236{
2237        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2238
2239        return dd->cce_err_status_cnt[0];
2240}
2241
2242/*
2243 * Software counters corresponding to each of the
2244 * error status bits within RcvErrStatus
2245 */
2246static u64 access_rx_csr_parity_err_cnt(const struct cntr_entry *entry,
2247                                        void *context, int vl, int mode,
2248                                        u64 data)
2249{
2250        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2251
2252        return dd->rcv_err_status_cnt[63];
2253}
2254
2255static u64 access_rx_csr_write_bad_addr_err_cnt(const struct cntr_entry *entry,
2256                                                void *context, int vl,
2257                                                int mode, u64 data)
2258{
2259        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2260
2261        return dd->rcv_err_status_cnt[62];
2262}
2263
2264static u64 access_rx_csr_read_bad_addr_err_cnt(const struct cntr_entry *entry,
2265                                               void *context, int vl, int mode,
2266                                               u64 data)
2267{
2268        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2269
2270        return dd->rcv_err_status_cnt[61];
2271}
2272
2273static u64 access_rx_dma_csr_unc_err_cnt(const struct cntr_entry *entry,
2274                                         void *context, int vl, int mode,
2275                                         u64 data)
2276{
2277        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2278
2279        return dd->rcv_err_status_cnt[60];
2280}
2281
2282static u64 access_rx_dma_dq_fsm_encoding_err_cnt(const struct cntr_entry *entry,
2283                                                 void *context, int vl,
2284                                                 int mode, u64 data)
2285{
2286        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2287
2288        return dd->rcv_err_status_cnt[59];
2289}
2290
2291static u64 access_rx_dma_eq_fsm_encoding_err_cnt(const struct cntr_entry *entry,
2292                                                 void *context, int vl,
2293                                                 int mode, u64 data)
2294{
2295        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2296
2297        return dd->rcv_err_status_cnt[58];
2298}
2299
2300static u64 access_rx_dma_csr_parity_err_cnt(const struct cntr_entry *entry,
2301                                            void *context, int vl, int mode,
2302                                            u64 data)
2303{
2304        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2305
2306        return dd->rcv_err_status_cnt[57];
2307}
2308
2309static u64 access_rx_rbuf_data_cor_err_cnt(const struct cntr_entry *entry,
2310                                           void *context, int vl, int mode,
2311                                           u64 data)
2312{
2313        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2314
2315        return dd->rcv_err_status_cnt[56];
2316}
2317
2318static u64 access_rx_rbuf_data_unc_err_cnt(const struct cntr_entry *entry,
2319                                           void *context, int vl, int mode,
2320                                           u64 data)
2321{
2322        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2323
2324        return dd->rcv_err_status_cnt[55];
2325}
2326
2327static u64 access_rx_dma_data_fifo_rd_cor_err_cnt(
2328                                const struct cntr_entry *entry,
2329                                void *context, int vl, int mode, u64 data)
2330{
2331        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2332
2333        return dd->rcv_err_status_cnt[54];
2334}
2335
2336static u64 access_rx_dma_data_fifo_rd_unc_err_cnt(
2337                                const struct cntr_entry *entry,
2338                                void *context, int vl, int mode, u64 data)
2339{
2340        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2341
2342        return dd->rcv_err_status_cnt[53];
2343}
2344
2345static u64 access_rx_dma_hdr_fifo_rd_cor_err_cnt(const struct cntr_entry *entry,
2346                                                 void *context, int vl,
2347                                                 int mode, u64 data)
2348{
2349        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2350
2351        return dd->rcv_err_status_cnt[52];
2352}
2353
2354static u64 access_rx_dma_hdr_fifo_rd_unc_err_cnt(const struct cntr_entry *entry,
2355                                                 void *context, int vl,
2356                                                 int mode, u64 data)
2357{
2358        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2359
2360        return dd->rcv_err_status_cnt[51];
2361}
2362
2363static u64 access_rx_rbuf_desc_part2_cor_err_cnt(const struct cntr_entry *entry,
2364                                                 void *context, int vl,
2365                                                 int mode, u64 data)
2366{
2367        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2368
2369        return dd->rcv_err_status_cnt[50];
2370}
2371
2372static u64 access_rx_rbuf_desc_part2_unc_err_cnt(const struct cntr_entry *entry,
2373                                                 void *context, int vl,
2374                                                 int mode, u64 data)
2375{
2376        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2377
2378        return dd->rcv_err_status_cnt[49];
2379}
2380
2381static u64 access_rx_rbuf_desc_part1_cor_err_cnt(const struct cntr_entry *entry,
2382                                                 void *context, int vl,
2383                                                 int mode, u64 data)
2384{
2385        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2386
2387        return dd->rcv_err_status_cnt[48];
2388}
2389
2390static u64 access_rx_rbuf_desc_part1_unc_err_cnt(const struct cntr_entry *entry,
2391                                                 void *context, int vl,
2392                                                 int mode, u64 data)
2393{
2394        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2395
2396        return dd->rcv_err_status_cnt[47];
2397}
2398
2399static u64 access_rx_hq_intr_fsm_err_cnt(const struct cntr_entry *entry,
2400                                         void *context, int vl, int mode,
2401                                         u64 data)
2402{
2403        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2404
2405        return dd->rcv_err_status_cnt[46];
2406}
2407
2408static u64 access_rx_hq_intr_csr_parity_err_cnt(
2409                                const struct cntr_entry *entry,
2410                                void *context, int vl, int mode, u64 data)
2411{
2412        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2413
2414        return dd->rcv_err_status_cnt[45];
2415}
2416
2417static u64 access_rx_lookup_csr_parity_err_cnt(
2418                                const struct cntr_entry *entry,
2419                                void *context, int vl, int mode, u64 data)
2420{
2421        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2422
2423        return dd->rcv_err_status_cnt[44];
2424}
2425
2426static u64 access_rx_lookup_rcv_array_cor_err_cnt(
2427                                const struct cntr_entry *entry,
2428                                void *context, int vl, int mode, u64 data)
2429{
2430        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2431
2432        return dd->rcv_err_status_cnt[43];
2433}
2434
2435static u64 access_rx_lookup_rcv_array_unc_err_cnt(
2436                                const struct cntr_entry *entry,
2437                                void *context, int vl, int mode, u64 data)
2438{
2439        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2440
2441        return dd->rcv_err_status_cnt[42];
2442}
2443
2444static u64 access_rx_lookup_des_part2_parity_err_cnt(
2445                                const struct cntr_entry *entry,
2446                                void *context, int vl, int mode, u64 data)
2447{
2448        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2449
2450        return dd->rcv_err_status_cnt[41];
2451}
2452
2453static u64 access_rx_lookup_des_part1_unc_cor_err_cnt(
2454                                const struct cntr_entry *entry,
2455                                void *context, int vl, int mode, u64 data)
2456{
2457        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2458
2459        return dd->rcv_err_status_cnt[40];
2460}
2461
2462static u64 access_rx_lookup_des_part1_unc_err_cnt(
2463                                const struct cntr_entry *entry,
2464                                void *context, int vl, int mode, u64 data)
2465{
2466        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2467
2468        return dd->rcv_err_status_cnt[39];
2469}
2470
2471static u64 access_rx_rbuf_next_free_buf_cor_err_cnt(
2472                                const struct cntr_entry *entry,
2473                                void *context, int vl, int mode, u64 data)
2474{
2475        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2476
2477        return dd->rcv_err_status_cnt[38];
2478}
2479
2480static u64 access_rx_rbuf_next_free_buf_unc_err_cnt(
2481                                const struct cntr_entry *entry,
2482                                void *context, int vl, int mode, u64 data)
2483{
2484        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2485
2486        return dd->rcv_err_status_cnt[37];
2487}
2488
2489static u64 access_rbuf_fl_init_wr_addr_parity_err_cnt(
2490                                const struct cntr_entry *entry,
2491                                void *context, int vl, int mode, u64 data)
2492{
2493        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2494
2495        return dd->rcv_err_status_cnt[36];
2496}
2497
2498static u64 access_rx_rbuf_fl_initdone_parity_err_cnt(
2499                                const struct cntr_entry *entry,
2500                                void *context, int vl, int mode, u64 data)
2501{
2502        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2503
2504        return dd->rcv_err_status_cnt[35];
2505}
2506
2507static u64 access_rx_rbuf_fl_write_addr_parity_err_cnt(
2508                                const struct cntr_entry *entry,
2509                                void *context, int vl, int mode, u64 data)
2510{
2511        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2512
2513        return dd->rcv_err_status_cnt[34];
2514}
2515
2516static u64 access_rx_rbuf_fl_rd_addr_parity_err_cnt(
2517                                const struct cntr_entry *entry,
2518                                void *context, int vl, int mode, u64 data)
2519{
2520        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2521
2522        return dd->rcv_err_status_cnt[33];
2523}
2524
2525static u64 access_rx_rbuf_empty_err_cnt(const struct cntr_entry *entry,
2526                                        void *context, int vl, int mode,
2527                                        u64 data)
2528{
2529        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2530
2531        return dd->rcv_err_status_cnt[32];
2532}
2533
2534static u64 access_rx_rbuf_full_err_cnt(const struct cntr_entry *entry,
2535                                       void *context, int vl, int mode,
2536                                       u64 data)
2537{
2538        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2539
2540        return dd->rcv_err_status_cnt[31];
2541}
2542
2543static u64 access_rbuf_bad_lookup_err_cnt(const struct cntr_entry *entry,
2544                                          void *context, int vl, int mode,
2545                                          u64 data)
2546{
2547        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2548
2549        return dd->rcv_err_status_cnt[30];
2550}
2551
2552static u64 access_rbuf_ctx_id_parity_err_cnt(const struct cntr_entry *entry,
2553                                             void *context, int vl, int mode,
2554                                             u64 data)
2555{
2556        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2557
2558        return dd->rcv_err_status_cnt[29];
2559}
2560
2561static u64 access_rbuf_csr_qeopdw_parity_err_cnt(const struct cntr_entry *entry,
2562                                                 void *context, int vl,
2563                                                 int mode, u64 data)
2564{
2565        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2566
2567        return dd->rcv_err_status_cnt[28];
2568}
2569
2570static u64 access_rx_rbuf_csr_q_num_of_pkt_parity_err_cnt(
2571                                const struct cntr_entry *entry,
2572                                void *context, int vl, int mode, u64 data)
2573{
2574        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2575
2576        return dd->rcv_err_status_cnt[27];
2577}
2578
2579static u64 access_rx_rbuf_csr_q_t1_ptr_parity_err_cnt(
2580                                const struct cntr_entry *entry,
2581                                void *context, int vl, int mode, u64 data)
2582{
2583        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2584
2585        return dd->rcv_err_status_cnt[26];
2586}
2587
2588static u64 access_rx_rbuf_csr_q_hd_ptr_parity_err_cnt(
2589                                const struct cntr_entry *entry,
2590                                void *context, int vl, int mode, u64 data)
2591{
2592        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2593
2594        return dd->rcv_err_status_cnt[25];
2595}
2596
2597static u64 access_rx_rbuf_csr_q_vld_bit_parity_err_cnt(
2598                                const struct cntr_entry *entry,
2599                                void *context, int vl, int mode, u64 data)
2600{
2601        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2602
2603        return dd->rcv_err_status_cnt[24];
2604}
2605
2606static u64 access_rx_rbuf_csr_q_next_buf_parity_err_cnt(
2607                                const struct cntr_entry *entry,
2608                                void *context, int vl, int mode, u64 data)
2609{
2610        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2611
2612        return dd->rcv_err_status_cnt[23];
2613}
2614
2615static u64 access_rx_rbuf_csr_q_ent_cnt_parity_err_cnt(
2616                                const struct cntr_entry *entry,
2617                                void *context, int vl, int mode, u64 data)
2618{
2619        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2620
2621        return dd->rcv_err_status_cnt[22];
2622}
2623
2624static u64 access_rx_rbuf_csr_q_head_buf_num_parity_err_cnt(
2625                                const struct cntr_entry *entry,
2626                                void *context, int vl, int mode, u64 data)
2627{
2628        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2629
2630        return dd->rcv_err_status_cnt[21];
2631}
2632
2633static u64 access_rx_rbuf_block_list_read_cor_err_cnt(
2634                                const struct cntr_entry *entry,
2635                                void *context, int vl, int mode, u64 data)
2636{
2637        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2638
2639        return dd->rcv_err_status_cnt[20];
2640}
2641
2642static u64 access_rx_rbuf_block_list_read_unc_err_cnt(
2643                                const struct cntr_entry *entry,
2644                                void *context, int vl, int mode, u64 data)
2645{
2646        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2647
2648        return dd->rcv_err_status_cnt[19];
2649}
2650
2651static u64 access_rx_rbuf_lookup_des_cor_err_cnt(const struct cntr_entry *entry,
2652                                                 void *context, int vl,
2653                                                 int mode, u64 data)
2654{
2655        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2656
2657        return dd->rcv_err_status_cnt[18];
2658}
2659
2660static u64 access_rx_rbuf_lookup_des_unc_err_cnt(const struct cntr_entry *entry,
2661                                                 void *context, int vl,
2662                                                 int mode, u64 data)
2663{
2664        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2665
2666        return dd->rcv_err_status_cnt[17];
2667}
2668
2669static u64 access_rx_rbuf_lookup_des_reg_unc_cor_err_cnt(
2670                                const struct cntr_entry *entry,
2671                                void *context, int vl, int mode, u64 data)
2672{
2673        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2674
2675        return dd->rcv_err_status_cnt[16];
2676}
2677
2678static u64 access_rx_rbuf_lookup_des_reg_unc_err_cnt(
2679                                const struct cntr_entry *entry,
2680                                void *context, int vl, int mode, u64 data)
2681{
2682        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2683
2684        return dd->rcv_err_status_cnt[15];
2685}
2686
2687static u64 access_rx_rbuf_free_list_cor_err_cnt(const struct cntr_entry *entry,
2688                                                void *context, int vl,
2689                                                int mode, u64 data)
2690{
2691        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2692
2693        return dd->rcv_err_status_cnt[14];
2694}
2695
2696static u64 access_rx_rbuf_free_list_unc_err_cnt(const struct cntr_entry *entry,
2697                                                void *context, int vl,
2698                                                int mode, u64 data)
2699{
2700        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2701
2702        return dd->rcv_err_status_cnt[13];
2703}
2704
2705static u64 access_rx_rcv_fsm_encoding_err_cnt(const struct cntr_entry *entry,
2706                                              void *context, int vl, int mode,
2707                                              u64 data)
2708{
2709        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2710
2711        return dd->rcv_err_status_cnt[12];
2712}
2713
2714static u64 access_rx_dma_flag_cor_err_cnt(const struct cntr_entry *entry,
2715                                          void *context, int vl, int mode,
2716                                          u64 data)
2717{
2718        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2719
2720        return dd->rcv_err_status_cnt[11];
2721}
2722
2723static u64 access_rx_dma_flag_unc_err_cnt(const struct cntr_entry *entry,
2724                                          void *context, int vl, int mode,
2725                                          u64 data)
2726{
2727        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2728
2729        return dd->rcv_err_status_cnt[10];
2730}
2731
2732static u64 access_rx_dc_sop_eop_parity_err_cnt(const struct cntr_entry *entry,
2733                                               void *context, int vl, int mode,
2734                                               u64 data)
2735{
2736        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2737
2738        return dd->rcv_err_status_cnt[9];
2739}
2740
2741static u64 access_rx_rcv_csr_parity_err_cnt(const struct cntr_entry *entry,
2742                                            void *context, int vl, int mode,
2743                                            u64 data)
2744{
2745        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2746
2747        return dd->rcv_err_status_cnt[8];
2748}
2749
2750static u64 access_rx_rcv_qp_map_table_cor_err_cnt(
2751                                const struct cntr_entry *entry,
2752                                void *context, int vl, int mode, u64 data)
2753{
2754        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2755
2756        return dd->rcv_err_status_cnt[7];
2757}
2758
2759static u64 access_rx_rcv_qp_map_table_unc_err_cnt(
2760                                const struct cntr_entry *entry,
2761                                void *context, int vl, int mode, u64 data)
2762{
2763        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2764
2765        return dd->rcv_err_status_cnt[6];
2766}
2767
2768static u64 access_rx_rcv_data_cor_err_cnt(const struct cntr_entry *entry,
2769                                          void *context, int vl, int mode,
2770                                          u64 data)
2771{
2772        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2773
2774        return dd->rcv_err_status_cnt[5];
2775}
2776
2777static u64 access_rx_rcv_data_unc_err_cnt(const struct cntr_entry *entry,
2778                                          void *context, int vl, int mode,
2779                                          u64 data)
2780{
2781        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2782
2783        return dd->rcv_err_status_cnt[4];
2784}
2785
2786static u64 access_rx_rcv_hdr_cor_err_cnt(const struct cntr_entry *entry,
2787                                         void *context, int vl, int mode,
2788                                         u64 data)
2789{
2790        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2791
2792        return dd->rcv_err_status_cnt[3];
2793}
2794
2795static u64 access_rx_rcv_hdr_unc_err_cnt(const struct cntr_entry *entry,
2796                                         void *context, int vl, int mode,
2797                                         u64 data)
2798{
2799        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2800
2801        return dd->rcv_err_status_cnt[2];
2802}
2803
2804static u64 access_rx_dc_intf_parity_err_cnt(const struct cntr_entry *entry,
2805                                            void *context, int vl, int mode,
2806                                            u64 data)
2807{
2808        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2809
2810        return dd->rcv_err_status_cnt[1];
2811}
2812
2813static u64 access_rx_dma_csr_cor_err_cnt(const struct cntr_entry *entry,
2814                                         void *context, int vl, int mode,
2815                                         u64 data)
2816{
2817        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2818
2819        return dd->rcv_err_status_cnt[0];
2820}
2821
2822/*
2823 * Software counters corresponding to each of the
2824 * error status bits within SendPioErrStatus
2825 */
2826static u64 access_pio_pec_sop_head_parity_err_cnt(
2827                                const struct cntr_entry *entry,
2828                                void *context, int vl, int mode, u64 data)
2829{
2830        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2831
2832        return dd->send_pio_err_status_cnt[35];
2833}
2834
2835static u64 access_pio_pcc_sop_head_parity_err_cnt(
2836                                const struct cntr_entry *entry,
2837                                void *context, int vl, int mode, u64 data)
2838{
2839        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2840
2841        return dd->send_pio_err_status_cnt[34];
2842}
2843
2844static u64 access_pio_last_returned_cnt_parity_err_cnt(
2845                                const struct cntr_entry *entry,
2846                                void *context, int vl, int mode, u64 data)
2847{
2848        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2849
2850        return dd->send_pio_err_status_cnt[33];
2851}
2852
2853static u64 access_pio_current_free_cnt_parity_err_cnt(
2854                                const struct cntr_entry *entry,
2855                                void *context, int vl, int mode, u64 data)
2856{
2857        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2858
2859        return dd->send_pio_err_status_cnt[32];
2860}
2861
2862static u64 access_pio_reserved_31_err_cnt(const struct cntr_entry *entry,
2863                                          void *context, int vl, int mode,
2864                                          u64 data)
2865{
2866        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2867
2868        return dd->send_pio_err_status_cnt[31];
2869}
2870
2871static u64 access_pio_reserved_30_err_cnt(const struct cntr_entry *entry,
2872                                          void *context, int vl, int mode,
2873                                          u64 data)
2874{
2875        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2876
2877        return dd->send_pio_err_status_cnt[30];
2878}
2879
2880static u64 access_pio_ppmc_sop_len_err_cnt(const struct cntr_entry *entry,
2881                                           void *context, int vl, int mode,
2882                                           u64 data)
2883{
2884        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2885
2886        return dd->send_pio_err_status_cnt[29];
2887}
2888
2889static u64 access_pio_ppmc_bqc_mem_parity_err_cnt(
2890                                const struct cntr_entry *entry,
2891                                void *context, int vl, int mode, u64 data)
2892{
2893        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2894
2895        return dd->send_pio_err_status_cnt[28];
2896}
2897
2898static u64 access_pio_vl_fifo_parity_err_cnt(const struct cntr_entry *entry,
2899                                             void *context, int vl, int mode,
2900                                             u64 data)
2901{
2902        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2903
2904        return dd->send_pio_err_status_cnt[27];
2905}
2906
2907static u64 access_pio_vlf_sop_parity_err_cnt(const struct cntr_entry *entry,
2908                                             void *context, int vl, int mode,
2909                                             u64 data)
2910{
2911        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2912
2913        return dd->send_pio_err_status_cnt[26];
2914}
2915
2916static u64 access_pio_vlf_v1_len_parity_err_cnt(const struct cntr_entry *entry,
2917                                                void *context, int vl,
2918                                                int mode, u64 data)
2919{
2920        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2921
2922        return dd->send_pio_err_status_cnt[25];
2923}
2924
2925static u64 access_pio_block_qw_count_parity_err_cnt(
2926                                const struct cntr_entry *entry,
2927                                void *context, int vl, int mode, u64 data)
2928{
2929        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2930
2931        return dd->send_pio_err_status_cnt[24];
2932}
2933
2934static u64 access_pio_write_qw_valid_parity_err_cnt(
2935                                const struct cntr_entry *entry,
2936                                void *context, int vl, int mode, u64 data)
2937{
2938        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2939
2940        return dd->send_pio_err_status_cnt[23];
2941}
2942
2943static u64 access_pio_state_machine_err_cnt(const struct cntr_entry *entry,
2944                                            void *context, int vl, int mode,
2945                                            u64 data)
2946{
2947        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2948
2949        return dd->send_pio_err_status_cnt[22];
2950}
2951
2952static u64 access_pio_write_data_parity_err_cnt(const struct cntr_entry *entry,
2953                                                void *context, int vl,
2954                                                int mode, u64 data)
2955{
2956        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2957
2958        return dd->send_pio_err_status_cnt[21];
2959}
2960
2961static u64 access_pio_host_addr_mem_cor_err_cnt(const struct cntr_entry *entry,
2962                                                void *context, int vl,
2963                                                int mode, u64 data)
2964{
2965        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2966
2967        return dd->send_pio_err_status_cnt[20];
2968}
2969
2970static u64 access_pio_host_addr_mem_unc_err_cnt(const struct cntr_entry *entry,
2971                                                void *context, int vl,
2972                                                int mode, u64 data)
2973{
2974        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2975
2976        return dd->send_pio_err_status_cnt[19];
2977}
2978
2979static u64 access_pio_pkt_evict_sm_or_arb_sm_err_cnt(
2980                                const struct cntr_entry *entry,
2981                                void *context, int vl, int mode, u64 data)
2982{
2983        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2984
2985        return dd->send_pio_err_status_cnt[18];
2986}
2987
2988static u64 access_pio_init_sm_in_err_cnt(const struct cntr_entry *entry,
2989                                         void *context, int vl, int mode,
2990                                         u64 data)
2991{
2992        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
2993
2994        return dd->send_pio_err_status_cnt[17];
2995}
2996
2997static u64 access_pio_ppmc_pbl_fifo_err_cnt(const struct cntr_entry *entry,
2998                                            void *context, int vl, int mode,
2999                                            u64 data)
3000{
3001        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3002
3003        return dd->send_pio_err_status_cnt[16];
3004}
3005
3006static u64 access_pio_credit_ret_fifo_parity_err_cnt(
3007                                const struct cntr_entry *entry,
3008                                void *context, int vl, int mode, u64 data)
3009{
3010        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3011
3012        return dd->send_pio_err_status_cnt[15];
3013}
3014
3015static u64 access_pio_v1_len_mem_bank1_cor_err_cnt(
3016                                const struct cntr_entry *entry,
3017                                void *context, int vl, int mode, u64 data)
3018{
3019        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3020
3021        return dd->send_pio_err_status_cnt[14];
3022}
3023
3024static u64 access_pio_v1_len_mem_bank0_cor_err_cnt(
3025                                const struct cntr_entry *entry,
3026                                void *context, int vl, int mode, u64 data)
3027{
3028        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3029
3030        return dd->send_pio_err_status_cnt[13];
3031}
3032
3033static u64 access_pio_v1_len_mem_bank1_unc_err_cnt(
3034                                const struct cntr_entry *entry,
3035                                void *context, int vl, int mode, u64 data)
3036{
3037        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3038
3039        return dd->send_pio_err_status_cnt[12];
3040}
3041
3042static u64 access_pio_v1_len_mem_bank0_unc_err_cnt(
3043                                const struct cntr_entry *entry,
3044                                void *context, int vl, int mode, u64 data)
3045{
3046        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3047
3048        return dd->send_pio_err_status_cnt[11];
3049}
3050
3051static u64 access_pio_sm_pkt_reset_parity_err_cnt(
3052                                const struct cntr_entry *entry,
3053                                void *context, int vl, int mode, u64 data)
3054{
3055        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3056
3057        return dd->send_pio_err_status_cnt[10];
3058}
3059
3060static u64 access_pio_pkt_evict_fifo_parity_err_cnt(
3061                                const struct cntr_entry *entry,
3062                                void *context, int vl, int mode, u64 data)
3063{
3064        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3065
3066        return dd->send_pio_err_status_cnt[9];
3067}
3068
3069static u64 access_pio_sbrdctrl_crrel_fifo_parity_err_cnt(
3070                                const struct cntr_entry *entry,
3071                                void *context, int vl, int mode, u64 data)
3072{
3073        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3074
3075        return dd->send_pio_err_status_cnt[8];
3076}
3077
3078static u64 access_pio_sbrdctl_crrel_parity_err_cnt(
3079                                const struct cntr_entry *entry,
3080                                void *context, int vl, int mode, u64 data)
3081{
3082        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3083
3084        return dd->send_pio_err_status_cnt[7];
3085}
3086
3087static u64 access_pio_pec_fifo_parity_err_cnt(const struct cntr_entry *entry,
3088                                              void *context, int vl, int mode,
3089                                              u64 data)
3090{
3091        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3092
3093        return dd->send_pio_err_status_cnt[6];
3094}
3095
3096static u64 access_pio_pcc_fifo_parity_err_cnt(const struct cntr_entry *entry,
3097                                              void *context, int vl, int mode,
3098                                              u64 data)
3099{
3100        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3101
3102        return dd->send_pio_err_status_cnt[5];
3103}
3104
3105static u64 access_pio_sb_mem_fifo1_err_cnt(const struct cntr_entry *entry,
3106                                           void *context, int vl, int mode,
3107                                           u64 data)
3108{
3109        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3110
3111        return dd->send_pio_err_status_cnt[4];
3112}
3113
3114static u64 access_pio_sb_mem_fifo0_err_cnt(const struct cntr_entry *entry,
3115                                           void *context, int vl, int mode,
3116                                           u64 data)
3117{
3118        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3119
3120        return dd->send_pio_err_status_cnt[3];
3121}
3122
3123static u64 access_pio_csr_parity_err_cnt(const struct cntr_entry *entry,
3124                                         void *context, int vl, int mode,
3125                                         u64 data)
3126{
3127        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3128
3129        return dd->send_pio_err_status_cnt[2];
3130}
3131
3132static u64 access_pio_write_addr_parity_err_cnt(const struct cntr_entry *entry,
3133                                                void *context, int vl,
3134                                                int mode, u64 data)
3135{
3136        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3137
3138        return dd->send_pio_err_status_cnt[1];
3139}
3140
3141static u64 access_pio_write_bad_ctxt_err_cnt(const struct cntr_entry *entry,
3142                                             void *context, int vl, int mode,
3143                                             u64 data)
3144{
3145        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3146
3147        return dd->send_pio_err_status_cnt[0];
3148}
3149
3150/*
3151 * Software counters corresponding to each of the
3152 * error status bits within SendDmaErrStatus
3153 */
3154static u64 access_sdma_pcie_req_tracking_cor_err_cnt(
3155                                const struct cntr_entry *entry,
3156                                void *context, int vl, int mode, u64 data)
3157{
3158        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3159
3160        return dd->send_dma_err_status_cnt[3];
3161}
3162
3163static u64 access_sdma_pcie_req_tracking_unc_err_cnt(
3164                                const struct cntr_entry *entry,
3165                                void *context, int vl, int mode, u64 data)
3166{
3167        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3168
3169        return dd->send_dma_err_status_cnt[2];
3170}
3171
3172static u64 access_sdma_csr_parity_err_cnt(const struct cntr_entry *entry,
3173                                          void *context, int vl, int mode,
3174                                          u64 data)
3175{
3176        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3177
3178        return dd->send_dma_err_status_cnt[1];
3179}
3180
3181static u64 access_sdma_rpy_tag_err_cnt(const struct cntr_entry *entry,
3182                                       void *context, int vl, int mode,
3183                                       u64 data)
3184{
3185        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3186
3187        return dd->send_dma_err_status_cnt[0];
3188}
3189
3190/*
3191 * Software counters corresponding to each of the
3192 * error status bits within SendEgressErrStatus
3193 */
3194static u64 access_tx_read_pio_memory_csr_unc_err_cnt(
3195                                const struct cntr_entry *entry,
3196                                void *context, int vl, int mode, u64 data)
3197{
3198        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3199
3200        return dd->send_egress_err_status_cnt[63];
3201}
3202
3203static u64 access_tx_read_sdma_memory_csr_err_cnt(
3204                                const struct cntr_entry *entry,
3205                                void *context, int vl, int mode, u64 data)
3206{
3207        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3208
3209        return dd->send_egress_err_status_cnt[62];
3210}
3211
3212static u64 access_tx_egress_fifo_cor_err_cnt(const struct cntr_entry *entry,
3213                                             void *context, int vl, int mode,
3214                                             u64 data)
3215{
3216        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3217
3218        return dd->send_egress_err_status_cnt[61];
3219}
3220
3221static u64 access_tx_read_pio_memory_cor_err_cnt(const struct cntr_entry *entry,
3222                                                 void *context, int vl,
3223                                                 int mode, u64 data)
3224{
3225        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3226
3227        return dd->send_egress_err_status_cnt[60];
3228}
3229
3230static u64 access_tx_read_sdma_memory_cor_err_cnt(
3231                                const struct cntr_entry *entry,
3232                                void *context, int vl, int mode, u64 data)
3233{
3234        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3235
3236        return dd->send_egress_err_status_cnt[59];
3237}
3238
3239static u64 access_tx_sb_hdr_cor_err_cnt(const struct cntr_entry *entry,
3240                                        void *context, int vl, int mode,
3241                                        u64 data)
3242{
3243        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3244
3245        return dd->send_egress_err_status_cnt[58];
3246}
3247
3248static u64 access_tx_credit_overrun_err_cnt(const struct cntr_entry *entry,
3249                                            void *context, int vl, int mode,
3250                                            u64 data)
3251{
3252        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3253
3254        return dd->send_egress_err_status_cnt[57];
3255}
3256
3257static u64 access_tx_launch_fifo8_cor_err_cnt(const struct cntr_entry *entry,
3258                                              void *context, int vl, int mode,
3259                                              u64 data)
3260{
3261        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3262
3263        return dd->send_egress_err_status_cnt[56];
3264}
3265
3266static u64 access_tx_launch_fifo7_cor_err_cnt(const struct cntr_entry *entry,
3267                                              void *context, int vl, int mode,
3268                                              u64 data)
3269{
3270        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3271
3272        return dd->send_egress_err_status_cnt[55];
3273}
3274
3275static u64 access_tx_launch_fifo6_cor_err_cnt(const struct cntr_entry *entry,
3276                                              void *context, int vl, int mode,
3277                                              u64 data)
3278{
3279        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3280
3281        return dd->send_egress_err_status_cnt[54];
3282}
3283
3284static u64 access_tx_launch_fifo5_cor_err_cnt(const struct cntr_entry *entry,
3285                                              void *context, int vl, int mode,
3286                                              u64 data)
3287{
3288        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3289
3290        return dd->send_egress_err_status_cnt[53];
3291}
3292
3293static u64 access_tx_launch_fifo4_cor_err_cnt(const struct cntr_entry *entry,
3294                                              void *context, int vl, int mode,
3295                                              u64 data)
3296{
3297        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3298
3299        return dd->send_egress_err_status_cnt[52];
3300}
3301
3302static u64 access_tx_launch_fifo3_cor_err_cnt(const struct cntr_entry *entry,
3303                                              void *context, int vl, int mode,
3304                                              u64 data)
3305{
3306        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3307
3308        return dd->send_egress_err_status_cnt[51];
3309}
3310
3311static u64 access_tx_launch_fifo2_cor_err_cnt(const struct cntr_entry *entry,
3312                                              void *context, int vl, int mode,
3313                                              u64 data)
3314{
3315        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3316
3317        return dd->send_egress_err_status_cnt[50];
3318}
3319
3320static u64 access_tx_launch_fifo1_cor_err_cnt(const struct cntr_entry *entry,
3321                                              void *context, int vl, int mode,
3322                                              u64 data)
3323{
3324        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3325
3326        return dd->send_egress_err_status_cnt[49];
3327}
3328
3329static u64 access_tx_launch_fifo0_cor_err_cnt(const struct cntr_entry *entry,
3330                                              void *context, int vl, int mode,
3331                                              u64 data)
3332{
3333        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3334
3335        return dd->send_egress_err_status_cnt[48];
3336}
3337
3338static u64 access_tx_credit_return_vl_err_cnt(const struct cntr_entry *entry,
3339                                              void *context, int vl, int mode,
3340                                              u64 data)
3341{
3342        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3343
3344        return dd->send_egress_err_status_cnt[47];
3345}
3346
3347static u64 access_tx_hcrc_insertion_err_cnt(const struct cntr_entry *entry,
3348                                            void *context, int vl, int mode,
3349                                            u64 data)
3350{
3351        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3352
3353        return dd->send_egress_err_status_cnt[46];
3354}
3355
3356static u64 access_tx_egress_fifo_unc_err_cnt(const struct cntr_entry *entry,
3357                                             void *context, int vl, int mode,
3358                                             u64 data)
3359{
3360        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3361
3362        return dd->send_egress_err_status_cnt[45];
3363}
3364
3365static u64 access_tx_read_pio_memory_unc_err_cnt(const struct cntr_entry *entry,
3366                                                 void *context, int vl,
3367                                                 int mode, u64 data)
3368{
3369        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3370
3371        return dd->send_egress_err_status_cnt[44];
3372}
3373
3374static u64 access_tx_read_sdma_memory_unc_err_cnt(
3375                                const struct cntr_entry *entry,
3376                                void *context, int vl, int mode, u64 data)
3377{
3378        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3379
3380        return dd->send_egress_err_status_cnt[43];
3381}
3382
3383static u64 access_tx_sb_hdr_unc_err_cnt(const struct cntr_entry *entry,
3384                                        void *context, int vl, int mode,
3385                                        u64 data)
3386{
3387        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3388
3389        return dd->send_egress_err_status_cnt[42];
3390}
3391
3392static u64 access_tx_credit_return_partiy_err_cnt(
3393                                const struct cntr_entry *entry,
3394                                void *context, int vl, int mode, u64 data)
3395{
3396        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3397
3398        return dd->send_egress_err_status_cnt[41];
3399}
3400
3401static u64 access_tx_launch_fifo8_unc_or_parity_err_cnt(
3402                                const struct cntr_entry *entry,
3403                                void *context, int vl, int mode, u64 data)
3404{
3405        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3406
3407        return dd->send_egress_err_status_cnt[40];
3408}
3409
3410static u64 access_tx_launch_fifo7_unc_or_parity_err_cnt(
3411                                const struct cntr_entry *entry,
3412                                void *context, int vl, int mode, u64 data)
3413{
3414        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3415
3416        return dd->send_egress_err_status_cnt[39];
3417}
3418
3419static u64 access_tx_launch_fifo6_unc_or_parity_err_cnt(
3420                                const struct cntr_entry *entry,
3421                                void *context, int vl, int mode, u64 data)
3422{
3423        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3424
3425        return dd->send_egress_err_status_cnt[38];
3426}
3427
3428static u64 access_tx_launch_fifo5_unc_or_parity_err_cnt(
3429                                const struct cntr_entry *entry,
3430                                void *context, int vl, int mode, u64 data)
3431{
3432        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3433
3434        return dd->send_egress_err_status_cnt[37];
3435}
3436
3437static u64 access_tx_launch_fifo4_unc_or_parity_err_cnt(
3438                                const struct cntr_entry *entry,
3439                                void *context, int vl, int mode, u64 data)
3440{
3441        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3442
3443        return dd->send_egress_err_status_cnt[36];
3444}
3445
3446static u64 access_tx_launch_fifo3_unc_or_parity_err_cnt(
3447                                const struct cntr_entry *entry,
3448                                void *context, int vl, int mode, u64 data)
3449{
3450        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3451
3452        return dd->send_egress_err_status_cnt[35];
3453}
3454
3455static u64 access_tx_launch_fifo2_unc_or_parity_err_cnt(
3456                                const struct cntr_entry *entry,
3457                                void *context, int vl, int mode, u64 data)
3458{
3459        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3460
3461        return dd->send_egress_err_status_cnt[34];
3462}
3463
3464static u64 access_tx_launch_fifo1_unc_or_parity_err_cnt(
3465                                const struct cntr_entry *entry,
3466                                void *context, int vl, int mode, u64 data)
3467{
3468        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3469
3470        return dd->send_egress_err_status_cnt[33];
3471}
3472
3473static u64 access_tx_launch_fifo0_unc_or_parity_err_cnt(
3474                                const struct cntr_entry *entry,
3475                                void *context, int vl, int mode, u64 data)
3476{
3477        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3478
3479        return dd->send_egress_err_status_cnt[32];
3480}
3481
3482static u64 access_tx_sdma15_disallowed_packet_err_cnt(
3483                                const struct cntr_entry *entry,
3484                                void *context, int vl, int mode, u64 data)
3485{
3486        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3487
3488        return dd->send_egress_err_status_cnt[31];
3489}
3490
3491static u64 access_tx_sdma14_disallowed_packet_err_cnt(
3492                                const struct cntr_entry *entry,
3493                                void *context, int vl, int mode, u64 data)
3494{
3495        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3496
3497        return dd->send_egress_err_status_cnt[30];
3498}
3499
3500static u64 access_tx_sdma13_disallowed_packet_err_cnt(
3501                                const struct cntr_entry *entry,
3502                                void *context, int vl, int mode, u64 data)
3503{
3504        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3505
3506        return dd->send_egress_err_status_cnt[29];
3507}
3508
3509static u64 access_tx_sdma12_disallowed_packet_err_cnt(
3510                                const struct cntr_entry *entry,
3511                                void *context, int vl, int mode, u64 data)
3512{
3513        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3514
3515        return dd->send_egress_err_status_cnt[28];
3516}
3517
3518static u64 access_tx_sdma11_disallowed_packet_err_cnt(
3519                                const struct cntr_entry *entry,
3520                                void *context, int vl, int mode, u64 data)
3521{
3522        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3523
3524        return dd->send_egress_err_status_cnt[27];
3525}
3526
3527static u64 access_tx_sdma10_disallowed_packet_err_cnt(
3528                                const struct cntr_entry *entry,
3529                                void *context, int vl, int mode, u64 data)
3530{
3531        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3532
3533        return dd->send_egress_err_status_cnt[26];
3534}
3535
3536static u64 access_tx_sdma9_disallowed_packet_err_cnt(
3537                                const struct cntr_entry *entry,
3538                                void *context, int vl, int mode, u64 data)
3539{
3540        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3541
3542        return dd->send_egress_err_status_cnt[25];
3543}
3544
3545static u64 access_tx_sdma8_disallowed_packet_err_cnt(
3546                                const struct cntr_entry *entry,
3547                                void *context, int vl, int mode, u64 data)
3548{
3549        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3550
3551        return dd->send_egress_err_status_cnt[24];
3552}
3553
3554static u64 access_tx_sdma7_disallowed_packet_err_cnt(
3555                                const struct cntr_entry *entry,
3556                                void *context, int vl, int mode, u64 data)
3557{
3558        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3559
3560        return dd->send_egress_err_status_cnt[23];
3561}
3562
3563static u64 access_tx_sdma6_disallowed_packet_err_cnt(
3564                                const struct cntr_entry *entry,
3565                                void *context, int vl, int mode, u64 data)
3566{
3567        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3568
3569        return dd->send_egress_err_status_cnt[22];
3570}
3571
3572static u64 access_tx_sdma5_disallowed_packet_err_cnt(
3573                                const struct cntr_entry *entry,
3574                                void *context, int vl, int mode, u64 data)
3575{
3576        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3577
3578        return dd->send_egress_err_status_cnt[21];
3579}
3580
3581static u64 access_tx_sdma4_disallowed_packet_err_cnt(
3582                                const struct cntr_entry *entry,
3583                                void *context, int vl, int mode, u64 data)
3584{
3585        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3586
3587        return dd->send_egress_err_status_cnt[20];
3588}
3589
3590static u64 access_tx_sdma3_disallowed_packet_err_cnt(
3591                                const struct cntr_entry *entry,
3592                                void *context, int vl, int mode, u64 data)
3593{
3594        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3595
3596        return dd->send_egress_err_status_cnt[19];
3597}
3598
3599static u64 access_tx_sdma2_disallowed_packet_err_cnt(
3600                                const struct cntr_entry *entry,
3601                                void *context, int vl, int mode, u64 data)
3602{
3603        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3604
3605        return dd->send_egress_err_status_cnt[18];
3606}
3607
3608static u64 access_tx_sdma1_disallowed_packet_err_cnt(
3609                                const struct cntr_entry *entry,
3610                                void *context, int vl, int mode, u64 data)
3611{
3612        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3613
3614        return dd->send_egress_err_status_cnt[17];
3615}
3616
3617static u64 access_tx_sdma0_disallowed_packet_err_cnt(
3618                                const struct cntr_entry *entry,
3619                                void *context, int vl, int mode, u64 data)
3620{
3621        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3622
3623        return dd->send_egress_err_status_cnt[16];
3624}
3625
3626static u64 access_tx_config_parity_err_cnt(const struct cntr_entry *entry,
3627                                           void *context, int vl, int mode,
3628                                           u64 data)
3629{
3630        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3631
3632        return dd->send_egress_err_status_cnt[15];
3633}
3634
3635static u64 access_tx_sbrd_ctl_csr_parity_err_cnt(const struct cntr_entry *entry,
3636                                                 void *context, int vl,
3637                                                 int mode, u64 data)
3638{
3639        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3640
3641        return dd->send_egress_err_status_cnt[14];
3642}
3643
3644static u64 access_tx_launch_csr_parity_err_cnt(const struct cntr_entry *entry,
3645                                               void *context, int vl, int mode,
3646                                               u64 data)
3647{
3648        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3649
3650        return dd->send_egress_err_status_cnt[13];
3651}
3652
3653static u64 access_tx_illegal_vl_err_cnt(const struct cntr_entry *entry,
3654                                        void *context, int vl, int mode,
3655                                        u64 data)
3656{
3657        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3658
3659        return dd->send_egress_err_status_cnt[12];
3660}
3661
3662static u64 access_tx_sbrd_ctl_state_machine_parity_err_cnt(
3663                                const struct cntr_entry *entry,
3664                                void *context, int vl, int mode, u64 data)
3665{
3666        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3667
3668        return dd->send_egress_err_status_cnt[11];
3669}
3670
3671static u64 access_egress_reserved_10_err_cnt(const struct cntr_entry *entry,
3672                                             void *context, int vl, int mode,
3673                                             u64 data)
3674{
3675        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3676
3677        return dd->send_egress_err_status_cnt[10];
3678}
3679
3680static u64 access_egress_reserved_9_err_cnt(const struct cntr_entry *entry,
3681                                            void *context, int vl, int mode,
3682                                            u64 data)
3683{
3684        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3685
3686        return dd->send_egress_err_status_cnt[9];
3687}
3688
3689static u64 access_tx_sdma_launch_intf_parity_err_cnt(
3690                                const struct cntr_entry *entry,
3691                                void *context, int vl, int mode, u64 data)
3692{
3693        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3694
3695        return dd->send_egress_err_status_cnt[8];
3696}
3697
3698static u64 access_tx_pio_launch_intf_parity_err_cnt(
3699                                const struct cntr_entry *entry,
3700                                void *context, int vl, int mode, u64 data)
3701{
3702        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3703
3704        return dd->send_egress_err_status_cnt[7];
3705}
3706
3707static u64 access_egress_reserved_6_err_cnt(const struct cntr_entry *entry,
3708                                            void *context, int vl, int mode,
3709                                            u64 data)
3710{
3711        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3712
3713        return dd->send_egress_err_status_cnt[6];
3714}
3715
3716static u64 access_tx_incorrect_link_state_err_cnt(
3717                                const struct cntr_entry *entry,
3718                                void *context, int vl, int mode, u64 data)
3719{
3720        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3721
3722        return dd->send_egress_err_status_cnt[5];
3723}
3724
3725static u64 access_tx_linkdown_err_cnt(const struct cntr_entry *entry,
3726                                      void *context, int vl, int mode,
3727                                      u64 data)
3728{
3729        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3730
3731        return dd->send_egress_err_status_cnt[4];
3732}
3733
3734static u64 access_tx_egress_fifi_underrun_or_parity_err_cnt(
3735                                const struct cntr_entry *entry,
3736                                void *context, int vl, int mode, u64 data)
3737{
3738        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3739
3740        return dd->send_egress_err_status_cnt[3];
3741}
3742
3743static u64 access_egress_reserved_2_err_cnt(const struct cntr_entry *entry,
3744                                            void *context, int vl, int mode,
3745                                            u64 data)
3746{
3747        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3748
3749        return dd->send_egress_err_status_cnt[2];
3750}
3751
3752static u64 access_tx_pkt_integrity_mem_unc_err_cnt(
3753                                const struct cntr_entry *entry,
3754                                void *context, int vl, int mode, u64 data)
3755{
3756        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3757
3758        return dd->send_egress_err_status_cnt[1];
3759}
3760
3761static u64 access_tx_pkt_integrity_mem_cor_err_cnt(
3762                                const struct cntr_entry *entry,
3763                                void *context, int vl, int mode, u64 data)
3764{
3765        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3766
3767        return dd->send_egress_err_status_cnt[0];
3768}
3769
3770/*
3771 * Software counters corresponding to each of the
3772 * error status bits within SendErrStatus
3773 */
3774static u64 access_send_csr_write_bad_addr_err_cnt(
3775                                const struct cntr_entry *entry,
3776                                void *context, int vl, int mode, u64 data)
3777{
3778        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3779
3780        return dd->send_err_status_cnt[2];
3781}
3782
3783static u64 access_send_csr_read_bad_addr_err_cnt(const struct cntr_entry *entry,
3784                                                 void *context, int vl,
3785                                                 int mode, u64 data)
3786{
3787        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3788
3789        return dd->send_err_status_cnt[1];
3790}
3791
3792static u64 access_send_csr_parity_cnt(const struct cntr_entry *entry,
3793                                      void *context, int vl, int mode,
3794                                      u64 data)
3795{
3796        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3797
3798        return dd->send_err_status_cnt[0];
3799}
3800
3801/*
3802 * Software counters corresponding to each of the
3803 * error status bits within SendCtxtErrStatus
3804 */
3805static u64 access_pio_write_out_of_bounds_err_cnt(
3806                                const struct cntr_entry *entry,
3807                                void *context, int vl, int mode, u64 data)
3808{
3809        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3810
3811        return dd->sw_ctxt_err_status_cnt[4];
3812}
3813
3814static u64 access_pio_write_overflow_err_cnt(const struct cntr_entry *entry,
3815                                             void *context, int vl, int mode,
3816                                             u64 data)
3817{
3818        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3819
3820        return dd->sw_ctxt_err_status_cnt[3];
3821}
3822
3823static u64 access_pio_write_crosses_boundary_err_cnt(
3824                                const struct cntr_entry *entry,
3825                                void *context, int vl, int mode, u64 data)
3826{
3827        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3828
3829        return dd->sw_ctxt_err_status_cnt[2];
3830}
3831
3832static u64 access_pio_disallowed_packet_err_cnt(const struct cntr_entry *entry,
3833                                                void *context, int vl,
3834                                                int mode, u64 data)
3835{
3836        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3837
3838        return dd->sw_ctxt_err_status_cnt[1];
3839}
3840
3841static u64 access_pio_inconsistent_sop_err_cnt(const struct cntr_entry *entry,
3842                                               void *context, int vl, int mode,
3843                                               u64 data)
3844{
3845        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3846
3847        return dd->sw_ctxt_err_status_cnt[0];
3848}
3849
3850/*
3851 * Software counters corresponding to each of the
3852 * error status bits within SendDmaEngErrStatus
3853 */
3854static u64 access_sdma_header_request_fifo_cor_err_cnt(
3855                                const struct cntr_entry *entry,
3856                                void *context, int vl, int mode, u64 data)
3857{
3858        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3859
3860        return dd->sw_send_dma_eng_err_status_cnt[23];
3861}
3862
3863static u64 access_sdma_header_storage_cor_err_cnt(
3864                                const struct cntr_entry *entry,
3865                                void *context, int vl, int mode, u64 data)
3866{
3867        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3868
3869        return dd->sw_send_dma_eng_err_status_cnt[22];
3870}
3871
3872static u64 access_sdma_packet_tracking_cor_err_cnt(
3873                                const struct cntr_entry *entry,
3874                                void *context, int vl, int mode, u64 data)
3875{
3876        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3877
3878        return dd->sw_send_dma_eng_err_status_cnt[21];
3879}
3880
3881static u64 access_sdma_assembly_cor_err_cnt(const struct cntr_entry *entry,
3882                                            void *context, int vl, int mode,
3883                                            u64 data)
3884{
3885        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3886
3887        return dd->sw_send_dma_eng_err_status_cnt[20];
3888}
3889
3890static u64 access_sdma_desc_table_cor_err_cnt(const struct cntr_entry *entry,
3891                                              void *context, int vl, int mode,
3892                                              u64 data)
3893{
3894        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3895
3896        return dd->sw_send_dma_eng_err_status_cnt[19];
3897}
3898
3899static u64 access_sdma_header_request_fifo_unc_err_cnt(
3900                                const struct cntr_entry *entry,
3901                                void *context, int vl, int mode, u64 data)
3902{
3903        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3904
3905        return dd->sw_send_dma_eng_err_status_cnt[18];
3906}
3907
3908static u64 access_sdma_header_storage_unc_err_cnt(
3909                                const struct cntr_entry *entry,
3910                                void *context, int vl, int mode, u64 data)
3911{
3912        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3913
3914        return dd->sw_send_dma_eng_err_status_cnt[17];
3915}
3916
3917static u64 access_sdma_packet_tracking_unc_err_cnt(
3918                                const struct cntr_entry *entry,
3919                                void *context, int vl, int mode, u64 data)
3920{
3921        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3922
3923        return dd->sw_send_dma_eng_err_status_cnt[16];
3924}
3925
3926static u64 access_sdma_assembly_unc_err_cnt(const struct cntr_entry *entry,
3927                                            void *context, int vl, int mode,
3928                                            u64 data)
3929{
3930        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3931
3932        return dd->sw_send_dma_eng_err_status_cnt[15];
3933}
3934
3935static u64 access_sdma_desc_table_unc_err_cnt(const struct cntr_entry *entry,
3936                                              void *context, int vl, int mode,
3937                                              u64 data)
3938{
3939        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3940
3941        return dd->sw_send_dma_eng_err_status_cnt[14];
3942}
3943
3944static u64 access_sdma_timeout_err_cnt(const struct cntr_entry *entry,
3945                                       void *context, int vl, int mode,
3946                                       u64 data)
3947{
3948        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3949
3950        return dd->sw_send_dma_eng_err_status_cnt[13];
3951}
3952
3953static u64 access_sdma_header_length_err_cnt(const struct cntr_entry *entry,
3954                                             void *context, int vl, int mode,
3955                                             u64 data)
3956{
3957        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3958
3959        return dd->sw_send_dma_eng_err_status_cnt[12];
3960}
3961
3962static u64 access_sdma_header_address_err_cnt(const struct cntr_entry *entry,
3963                                              void *context, int vl, int mode,
3964                                              u64 data)
3965{
3966        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3967
3968        return dd->sw_send_dma_eng_err_status_cnt[11];
3969}
3970
3971static u64 access_sdma_header_select_err_cnt(const struct cntr_entry *entry,
3972                                             void *context, int vl, int mode,
3973                                             u64 data)
3974{
3975        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3976
3977        return dd->sw_send_dma_eng_err_status_cnt[10];
3978}
3979
3980static u64 access_sdma_reserved_9_err_cnt(const struct cntr_entry *entry,
3981                                          void *context, int vl, int mode,
3982                                          u64 data)
3983{
3984        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3985
3986        return dd->sw_send_dma_eng_err_status_cnt[9];
3987}
3988
3989static u64 access_sdma_packet_desc_overflow_err_cnt(
3990                                const struct cntr_entry *entry,
3991                                void *context, int vl, int mode, u64 data)
3992{
3993        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
3994
3995        return dd->sw_send_dma_eng_err_status_cnt[8];
3996}
3997
3998static u64 access_sdma_length_mismatch_err_cnt(const struct cntr_entry *entry,
3999                                               void *context, int vl,
4000                                               int mode, u64 data)
4001{
4002        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
4003
4004        return dd->sw_send_dma_eng_err_status_cnt[7];
4005}
4006
4007static u64 access_sdma_halt_err_cnt(const struct cntr_entry *entry,
4008                                    void *context, int vl, int mode, u64 data)
4009{
4010        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
4011
4012        return dd->sw_send_dma_eng_err_status_cnt[6];
4013}
4014
4015static u64 access_sdma_mem_read_err_cnt(const struct cntr_entry *entry,
4016                                        void *context, int vl, int mode,
4017                                        u64 data)
4018{
4019        struct hfi1_devdata *dd = (struct hfi1_devdata *)context;
4020
4021        return dd->sw_send_dma_eng_err_status_cnt[5];
4022}
4023
4024static u64 access_sdma_first_desc_err_cnt(const struct cntr_entry *