linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c
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   1/*
   2 * Copyright 2013 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24#include "priv.h"
  25
  26#include <subdev/bios.h>
  27#include <subdev/bios/boost.h>
  28#include <subdev/bios/cstep.h>
  29#include <subdev/bios/perf.h>
  30#include <subdev/bios/vpstate.h>
  31#include <subdev/fb.h>
  32#include <subdev/therm.h>
  33#include <subdev/volt.h>
  34
  35#include <core/option.h>
  36
  37/******************************************************************************
  38 * misc
  39 *****************************************************************************/
  40static u32
  41nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,
  42                u8 pstate, u8 domain, u32 input)
  43{
  44        struct nvkm_bios *bios = clk->subdev.device->bios;
  45        struct nvbios_boostE boostE;
  46        u8  ver, hdr, cnt, len;
  47        u32 data;
  48
  49        data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE);
  50        if (data) {
  51                struct nvbios_boostS boostS;
  52                u8  idx = 0, sver, shdr;
  53                u32 subd;
  54
  55                input = max(boostE.min, input);
  56                input = min(boostE.max, input);
  57                do {
  58                        sver = ver;
  59                        shdr = hdr;
  60                        subd = nvbios_boostSp(bios, idx++, data, &sver, &shdr,
  61                                              cnt, len, &boostS);
  62                        if (subd && boostS.domain == domain) {
  63                                if (adjust)
  64                                        input = input * boostS.percent / 100;
  65                                input = max(boostS.min, input);
  66                                input = min(boostS.max, input);
  67                                break;
  68                        }
  69                } while (subd);
  70        }
  71
  72        return input;
  73}
  74
  75/******************************************************************************
  76 * C-States
  77 *****************************************************************************/
  78static bool
  79nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate,
  80                  u32 max_volt, int temp)
  81{
  82        const struct nvkm_domain *domain = clk->domains;
  83        struct nvkm_volt *volt = clk->subdev.device->volt;
  84        int voltage;
  85
  86        while (domain && domain->name != nv_clk_src_max) {
  87                if (domain->flags & NVKM_CLK_DOM_FLAG_VPSTATE) {
  88                        u32 freq = cstate->domain[domain->name];
  89                        switch (clk->boost_mode) {
  90                        case NVKM_CLK_BOOST_NONE:
  91                                if (clk->base_khz && freq > clk->base_khz)
  92                                        return false;
  93                                fallthrough;
  94                        case NVKM_CLK_BOOST_BIOS:
  95                                if (clk->boost_khz && freq > clk->boost_khz)
  96                                        return false;
  97                        }
  98                }
  99                domain++;
 100        }
 101
 102        if (!volt)
 103                return true;
 104
 105        voltage = nvkm_volt_map(volt, cstate->voltage, temp);
 106        if (voltage < 0)
 107                return false;
 108        return voltage <= min(max_volt, volt->max_uv);
 109}
 110
 111static struct nvkm_cstate *
 112nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate,
 113                      struct nvkm_cstate *cstate)
 114{
 115        struct nvkm_device *device = clk->subdev.device;
 116        struct nvkm_volt *volt = device->volt;
 117        int max_volt;
 118
 119        if (!pstate || !cstate)
 120                return NULL;
 121
 122        if (!volt)
 123                return cstate;
 124
 125        max_volt = volt->max_uv;
 126        if (volt->max0_id != 0xff)
 127                max_volt = min(max_volt,
 128                               nvkm_volt_map(volt, volt->max0_id, clk->temp));
 129        if (volt->max1_id != 0xff)
 130                max_volt = min(max_volt,
 131                               nvkm_volt_map(volt, volt->max1_id, clk->temp));
 132        if (volt->max2_id != 0xff)
 133                max_volt = min(max_volt,
 134                               nvkm_volt_map(volt, volt->max2_id, clk->temp));
 135
 136        list_for_each_entry_from_reverse(cstate, &pstate->list, head) {
 137                if (nvkm_cstate_valid(clk, cstate, max_volt, clk->temp))
 138                        break;
 139        }
 140
 141        return cstate;
 142}
 143
 144static struct nvkm_cstate *
 145nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
 146{
 147        struct nvkm_cstate *cstate;
 148        if (cstatei == NVKM_CLK_CSTATE_HIGHEST)
 149                return list_last_entry(&pstate->list, typeof(*cstate), head);
 150        else {
 151                list_for_each_entry(cstate, &pstate->list, head) {
 152                        if (cstate->id == cstatei)
 153                                return cstate;
 154                }
 155        }
 156        return NULL;
 157}
 158
 159static int
 160nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
 161{
 162        struct nvkm_subdev *subdev = &clk->subdev;
 163        struct nvkm_device *device = subdev->device;
 164        struct nvkm_therm *therm = device->therm;
 165        struct nvkm_volt *volt = device->volt;
 166        struct nvkm_cstate *cstate;
 167        int ret;
 168
 169        if (!list_empty(&pstate->list)) {
 170                cstate = nvkm_cstate_get(clk, pstate, cstatei);
 171                cstate = nvkm_cstate_find_best(clk, pstate, cstate);
 172        } else {
 173                cstate = &pstate->base;
 174        }
 175
 176        if (therm) {
 177                ret = nvkm_therm_cstate(therm, pstate->fanspeed, +1);
 178                if (ret && ret != -ENODEV) {
 179                        nvkm_error(subdev, "failed to raise fan speed: %d\n", ret);
 180                        return ret;
 181                }
 182        }
 183
 184        if (volt) {
 185                ret = nvkm_volt_set_id(volt, cstate->voltage,
 186                                       pstate->base.voltage, clk->temp, +1);
 187                if (ret && ret != -ENODEV) {
 188                        nvkm_error(subdev, "failed to raise voltage: %d\n", ret);
 189                        return ret;
 190                }
 191        }
 192
 193        ret = clk->func->calc(clk, cstate);
 194        if (ret == 0) {
 195                ret = clk->func->prog(clk);
 196                clk->func->tidy(clk);
 197        }
 198
 199        if (volt) {
 200                ret = nvkm_volt_set_id(volt, cstate->voltage,
 201                                       pstate->base.voltage, clk->temp, -1);
 202                if (ret && ret != -ENODEV)
 203                        nvkm_error(subdev, "failed to lower voltage: %d\n", ret);
 204        }
 205
 206        if (therm) {
 207                ret = nvkm_therm_cstate(therm, pstate->fanspeed, -1);
 208                if (ret && ret != -ENODEV)
 209                        nvkm_error(subdev, "failed to lower fan speed: %d\n", ret);
 210        }
 211
 212        return ret;
 213}
 214
 215static void
 216nvkm_cstate_del(struct nvkm_cstate *cstate)
 217{
 218        list_del(&cstate->head);
 219        kfree(cstate);
 220}
 221
 222static int
 223nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)
 224{
 225        struct nvkm_bios *bios = clk->subdev.device->bios;
 226        struct nvkm_volt *volt = clk->subdev.device->volt;
 227        const struct nvkm_domain *domain = clk->domains;
 228        struct nvkm_cstate *cstate = NULL;
 229        struct nvbios_cstepX cstepX;
 230        u8  ver, hdr;
 231        u32 data;
 232
 233        data = nvbios_cstepXp(bios, idx, &ver, &hdr, &cstepX);
 234        if (!data)
 235                return -ENOENT;
 236
 237        if (volt && nvkm_volt_map_min(volt, cstepX.voltage) > volt->max_uv)
 238                return -EINVAL;
 239
 240        cstate = kzalloc(sizeof(*cstate), GFP_KERNEL);
 241        if (!cstate)
 242                return -ENOMEM;
 243
 244        *cstate = pstate->base;
 245        cstate->voltage = cstepX.voltage;
 246        cstate->id = idx;
 247
 248        while (domain && domain->name != nv_clk_src_max) {
 249                if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
 250                        u32 freq = nvkm_clk_adjust(clk, true, pstate->pstate,
 251                                                   domain->bios, cstepX.freq);
 252                        cstate->domain[domain->name] = freq;
 253                }
 254                domain++;
 255        }
 256
 257        list_add(&cstate->head, &pstate->list);
 258        return 0;
 259}
 260
 261/******************************************************************************
 262 * P-States
 263 *****************************************************************************/
 264static int
 265nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
 266{
 267        struct nvkm_subdev *subdev = &clk->subdev;
 268        struct nvkm_fb *fb = subdev->device->fb;
 269        struct nvkm_pci *pci = subdev->device->pci;
 270        struct nvkm_pstate *pstate;
 271        int ret, idx = 0;
 272
 273        list_for_each_entry(pstate, &clk->states, head) {
 274                if (idx++ == pstatei)
 275                        break;
 276        }
 277
 278        nvkm_debug(subdev, "setting performance state %d\n", pstatei);
 279        clk->pstate = pstatei;
 280
 281        nvkm_pcie_set_link(pci, pstate->pcie_speed, pstate->pcie_width);
 282
 283        if (fb && fb->ram && fb->ram->func->calc) {
 284                struct nvkm_ram *ram = fb->ram;
 285                int khz = pstate->base.domain[nv_clk_src_mem];
 286                do {
 287                        ret = ram->func->calc(ram, khz);
 288                        if (ret == 0)
 289                                ret = ram->func->prog(ram);
 290                } while (ret > 0);
 291                ram->func->tidy(ram);
 292        }
 293
 294        return nvkm_cstate_prog(clk, pstate, NVKM_CLK_CSTATE_HIGHEST);
 295}
 296
 297static void
 298nvkm_pstate_work(struct work_struct *work)
 299{
 300        struct nvkm_clk *clk = container_of(work, typeof(*clk), work);
 301        struct nvkm_subdev *subdev = &clk->subdev;
 302        int pstate;
 303
 304        if (!atomic_xchg(&clk->waiting, 0))
 305                return;
 306        clk->pwrsrc = power_supply_is_system_supplied();
 307
 308        nvkm_trace(subdev, "P %d PWR %d U(AC) %d U(DC) %d A %d T %d°C D %d\n",
 309                   clk->pstate, clk->pwrsrc, clk->ustate_ac, clk->ustate_dc,
 310                   clk->astate, clk->temp, clk->dstate);
 311
 312        pstate = clk->pwrsrc ? clk->ustate_ac : clk->ustate_dc;
 313        if (clk->state_nr && pstate != -1) {
 314                pstate = (pstate < 0) ? clk->astate : pstate;
 315                pstate = min(pstate, clk->state_nr - 1);
 316                pstate = max(pstate, clk->dstate);
 317        } else {
 318                pstate = clk->pstate = -1;
 319        }
 320
 321        nvkm_trace(subdev, "-> %d\n", pstate);
 322        if (pstate != clk->pstate) {
 323                int ret = nvkm_pstate_prog(clk, pstate);
 324                if (ret) {
 325                        nvkm_error(subdev, "error setting pstate %d: %d\n",
 326                                   pstate, ret);
 327                }
 328        }
 329
 330        wake_up_all(&clk->wait);
 331        nvkm_notify_get(&clk->pwrsrc_ntfy);
 332}
 333
 334static int
 335nvkm_pstate_calc(struct nvkm_clk *clk, bool wait)
 336{
 337        atomic_set(&clk->waiting, 1);
 338        schedule_work(&clk->work);
 339        if (wait)
 340                wait_event(clk->wait, !atomic_read(&clk->waiting));
 341        return 0;
 342}
 343
 344static void
 345nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate)
 346{
 347        const struct nvkm_domain *clock = clk->domains - 1;
 348        struct nvkm_cstate *cstate;
 349        struct nvkm_subdev *subdev = &clk->subdev;
 350        char info[3][32] = { "", "", "" };
 351        char name[4] = "--";
 352        int i = -1;
 353
 354        if (pstate->pstate != 0xff)
 355                snprintf(name, sizeof(name), "%02x", pstate->pstate);
 356
 357        while ((++clock)->name != nv_clk_src_max) {
 358                u32 lo = pstate->base.domain[clock->name];
 359                u32 hi = lo;
 360                if (hi == 0)
 361                        continue;
 362
 363                nvkm_debug(subdev, "%02x: %10d KHz\n", clock->name, lo);
 364                list_for_each_entry(cstate, &pstate->list, head) {
 365                        u32 freq = cstate->domain[clock->name];
 366                        lo = min(lo, freq);
 367                        hi = max(hi, freq);
 368                        nvkm_debug(subdev, "%10d KHz\n", freq);
 369                }
 370
 371                if (clock->mname && ++i < ARRAY_SIZE(info)) {
 372                        lo /= clock->mdiv;
 373                        hi /= clock->mdiv;
 374                        if (lo == hi) {
 375                                snprintf(info[i], sizeof(info[i]), "%s %d MHz",
 376                                         clock->mname, lo);
 377                        } else {
 378                                snprintf(info[i], sizeof(info[i]),
 379                                         "%s %d-%d MHz", clock->mname, lo, hi);
 380                        }
 381                }
 382        }
 383
 384        nvkm_debug(subdev, "%s: %s %s %s\n", name, info[0], info[1], info[2]);
 385}
 386
 387static void
 388nvkm_pstate_del(struct nvkm_pstate *pstate)
 389{
 390        struct nvkm_cstate *cstate, *temp;
 391
 392        list_for_each_entry_safe(cstate, temp, &pstate->list, head) {
 393                nvkm_cstate_del(cstate);
 394        }
 395
 396        list_del(&pstate->head);
 397        kfree(pstate);
 398}
 399
 400static int
 401nvkm_pstate_new(struct nvkm_clk *clk, int idx)
 402{
 403        struct nvkm_bios *bios = clk->subdev.device->bios;
 404        const struct nvkm_domain *domain = clk->domains - 1;
 405        struct nvkm_pstate *pstate;
 406        struct nvkm_cstate *cstate;
 407        struct nvbios_cstepE cstepE;
 408        struct nvbios_perfE perfE;
 409        u8  ver, hdr, cnt, len;
 410        u32 data;
 411
 412        data = nvbios_perfEp(bios, idx, &ver, &hdr, &cnt, &len, &perfE);
 413        if (!data)
 414                return -EINVAL;
 415        if (perfE.pstate == 0xff)
 416                return 0;
 417
 418        pstate = kzalloc(sizeof(*pstate), GFP_KERNEL);
 419        cstate = &pstate->base;
 420        if (!pstate)
 421                return -ENOMEM;
 422
 423        INIT_LIST_HEAD(&pstate->list);
 424
 425        pstate->pstate = perfE.pstate;
 426        pstate->fanspeed = perfE.fanspeed;
 427        pstate->pcie_speed = perfE.pcie_speed;
 428        pstate->pcie_width = perfE.pcie_width;
 429        cstate->voltage = perfE.voltage;
 430        cstate->domain[nv_clk_src_core] = perfE.core;
 431        cstate->domain[nv_clk_src_shader] = perfE.shader;
 432        cstate->domain[nv_clk_src_mem] = perfE.memory;
 433        cstate->domain[nv_clk_src_vdec] = perfE.vdec;
 434        cstate->domain[nv_clk_src_dom6] = perfE.disp;
 435
 436        while (ver >= 0x40 && (++domain)->name != nv_clk_src_max) {
 437                struct nvbios_perfS perfS;
 438                u8  sver = ver, shdr = hdr;
 439                u32 perfSe = nvbios_perfSp(bios, data, domain->bios,
 440                                          &sver, &shdr, cnt, len, &perfS);
 441                if (perfSe == 0 || sver != 0x40)
 442                        continue;
 443
 444                if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
 445                        perfS.v40.freq = nvkm_clk_adjust(clk, false,
 446                                                         pstate->pstate,
 447                                                         domain->bios,
 448                                                         perfS.v40.freq);
 449                }
 450
 451                cstate->domain[domain->name] = perfS.v40.freq;
 452        }
 453
 454        data = nvbios_cstepEm(bios, pstate->pstate, &ver, &hdr, &cstepE);
 455        if (data) {
 456                int idx = cstepE.index;
 457                do {
 458                        nvkm_cstate_new(clk, idx, pstate);
 459                } while(idx--);
 460        }
 461
 462        nvkm_pstate_info(clk, pstate);
 463        list_add_tail(&pstate->head, &clk->states);
 464        clk->state_nr++;
 465        return 0;
 466}
 467
 468/******************************************************************************
 469 * Adjustment triggers
 470 *****************************************************************************/
 471static int
 472nvkm_clk_ustate_update(struct nvkm_clk *clk, int req)
 473{
 474        struct nvkm_pstate *pstate;
 475        int i = 0;
 476
 477        if (!clk->allow_reclock)
 478                return -ENOSYS;
 479
 480        if (req != -1 && req != -2) {
 481                list_for_each_entry(pstate, &clk->states, head) {
 482                        if (pstate->pstate == req)
 483                                break;
 484                        i++;
 485                }
 486
 487                if (pstate->pstate != req)
 488                        return -EINVAL;
 489                req = i;
 490        }
 491
 492        return req + 2;
 493}
 494
 495static int
 496nvkm_clk_nstate(struct nvkm_clk *clk, const char *mode, int arglen)
 497{
 498        int ret = 1;
 499
 500        if (clk->allow_reclock && !strncasecmpz(mode, "auto", arglen))
 501                return -2;
 502
 503        if (strncasecmpz(mode, "disabled", arglen)) {
 504                char save = mode[arglen];
 505                long v;
 506
 507                ((char *)mode)[arglen] = '\0';
 508                if (!kstrtol(mode, 0, &v)) {
 509                        ret = nvkm_clk_ustate_update(clk, v);
 510                        if (ret < 0)
 511                                ret = 1;
 512                }
 513                ((char *)mode)[arglen] = save;
 514        }
 515
 516        return ret - 2;
 517}
 518
 519int
 520nvkm_clk_ustate(struct nvkm_clk *clk, int req, int pwr)
 521{
 522        int ret = nvkm_clk_ustate_update(clk, req);
 523        if (ret >= 0) {
 524                if (ret -= 2, pwr) clk->ustate_ac = ret;
 525                else               clk->ustate_dc = ret;
 526                return nvkm_pstate_calc(clk, true);
 527        }
 528        return ret;
 529}
 530
 531int
 532nvkm_clk_astate(struct nvkm_clk *clk, int req, int rel, bool wait)
 533{
 534        if (!rel) clk->astate  = req;
 535        if ( rel) clk->astate += rel;
 536        clk->astate = min(clk->astate, clk->state_nr - 1);
 537        clk->astate = max(clk->astate, 0);
 538        return nvkm_pstate_calc(clk, wait);
 539}
 540
 541int
 542nvkm_clk_tstate(struct nvkm_clk *clk, u8 temp)
 543{
 544        if (clk->temp == temp)
 545                return 0;
 546        clk->temp = temp;
 547        return nvkm_pstate_calc(clk, false);
 548}
 549
 550int
 551nvkm_clk_dstate(struct nvkm_clk *clk, int req, int rel)
 552{
 553        if (!rel) clk->dstate  = req;
 554        if ( rel) clk->dstate += rel;
 555        clk->dstate = min(clk->dstate, clk->state_nr - 1);
 556        clk->dstate = max(clk->dstate, 0);
 557        return nvkm_pstate_calc(clk, true);
 558}
 559
 560static int
 561nvkm_clk_pwrsrc(struct nvkm_notify *notify)
 562{
 563        struct nvkm_clk *clk =
 564                container_of(notify, typeof(*clk), pwrsrc_ntfy);
 565        nvkm_pstate_calc(clk, false);
 566        return NVKM_NOTIFY_DROP;
 567}
 568
 569/******************************************************************************
 570 * subdev base class implementation
 571 *****************************************************************************/
 572
 573int
 574nvkm_clk_read(struct nvkm_clk *clk, enum nv_clk_src src)
 575{
 576        return clk->func->read(clk, src);
 577}
 578
 579static int
 580nvkm_clk_fini(struct nvkm_subdev *subdev, bool suspend)
 581{
 582        struct nvkm_clk *clk = nvkm_clk(subdev);
 583        nvkm_notify_put(&clk->pwrsrc_ntfy);
 584        flush_work(&clk->work);
 585        if (clk->func->fini)
 586                clk->func->fini(clk);
 587        return 0;
 588}
 589
 590static int
 591nvkm_clk_init(struct nvkm_subdev *subdev)
 592{
 593        struct nvkm_clk *clk = nvkm_clk(subdev);
 594        const struct nvkm_domain *clock = clk->domains;
 595        int ret;
 596
 597        memset(&clk->bstate, 0x00, sizeof(clk->bstate));
 598        INIT_LIST_HEAD(&clk->bstate.list);
 599        clk->bstate.pstate = 0xff;
 600
 601        while (clock->name != nv_clk_src_max) {
 602                ret = nvkm_clk_read(clk, clock->name);
 603                if (ret < 0) {
 604                        nvkm_error(subdev, "%02x freq unknown\n", clock->name);
 605                        return ret;
 606                }
 607                clk->bstate.base.domain[clock->name] = ret;
 608                clock++;
 609        }
 610
 611        nvkm_pstate_info(clk, &clk->bstate);
 612
 613        if (clk->func->init)
 614                return clk->func->init(clk);
 615
 616        clk->astate = clk->state_nr - 1;
 617        clk->dstate = 0;
 618        clk->pstate = -1;
 619        clk->temp = 90; /* reasonable default value */
 620        nvkm_pstate_calc(clk, true);
 621        return 0;
 622}
 623
 624static void *
 625nvkm_clk_dtor(struct nvkm_subdev *subdev)
 626{
 627        struct nvkm_clk *clk = nvkm_clk(subdev);
 628        struct nvkm_pstate *pstate, *temp;
 629
 630        nvkm_notify_fini(&clk->pwrsrc_ntfy);
 631
 632        /* Early return if the pstates have been provided statically */
 633        if (clk->func->pstates)
 634                return clk;
 635
 636        list_for_each_entry_safe(pstate, temp, &clk->states, head) {
 637                nvkm_pstate_del(pstate);
 638        }
 639
 640        return clk;
 641}
 642
 643static const struct nvkm_subdev_func
 644nvkm_clk = {
 645        .dtor = nvkm_clk_dtor,
 646        .init = nvkm_clk_init,
 647        .fini = nvkm_clk_fini,
 648};
 649
 650int
 651nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device,
 652              enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk *clk)
 653{
 654        struct nvkm_subdev *subdev = &clk->subdev;
 655        struct nvkm_bios *bios = device->bios;
 656        int ret, idx, arglen;
 657        const char *mode;
 658        struct nvbios_vpstate_header h;
 659
 660        nvkm_subdev_ctor(&nvkm_clk, device, type, inst, subdev);
 661
 662        if (bios && !nvbios_vpstate_parse(bios, &h)) {
 663                struct nvbios_vpstate_entry base, boost;
 664                if (!nvbios_vpstate_entry(bios, &h, h.boost_id, &boost))
 665                        clk->boost_khz = boost.clock_mhz * 1000;
 666                if (!nvbios_vpstate_entry(bios, &h, h.base_id, &base))
 667                        clk->base_khz = base.clock_mhz * 1000;
 668        }
 669
 670        clk->func = func;
 671        INIT_LIST_HEAD(&clk->states);
 672        clk->domains = func->domains;
 673        clk->ustate_ac = -1;
 674        clk->ustate_dc = -1;
 675        clk->allow_reclock = allow_reclock;
 676
 677        INIT_WORK(&clk->work, nvkm_pstate_work);
 678        init_waitqueue_head(&clk->wait);
 679        atomic_set(&clk->waiting, 0);
 680
 681        /* If no pstates are provided, try and fetch them from the BIOS */
 682        if (!func->pstates) {
 683                idx = 0;
 684                do {
 685                        ret = nvkm_pstate_new(clk, idx++);
 686                } while (ret == 0);
 687        } else {
 688                for (idx = 0; idx < func->nr_pstates; idx++)
 689                        list_add_tail(&func->pstates[idx].head, &clk->states);
 690                clk->state_nr = func->nr_pstates;
 691        }
 692
 693        ret = nvkm_notify_init(NULL, &device->event, nvkm_clk_pwrsrc, true,
 694                               NULL, 0, 0, &clk->pwrsrc_ntfy);
 695        if (ret)
 696                return ret;
 697
 698        mode = nvkm_stropt(device->cfgopt, "NvClkMode", &arglen);
 699        if (mode) {
 700                clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);
 701                clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
 702        }
 703
 704        mode = nvkm_stropt(device->cfgopt, "NvClkModeAC", &arglen);
 705        if (mode)
 706                clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);
 707
 708        mode = nvkm_stropt(device->cfgopt, "NvClkModeDC", &arglen);
 709        if (mode)
 710                clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
 711
 712        clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost",
 713                                       NVKM_CLK_BOOST_NONE);
 714        return 0;
 715}
 716
 717int
 718nvkm_clk_new_(const struct nvkm_clk_func *func, struct nvkm_device *device,
 719              enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk **pclk)
 720{
 721        if (!(*pclk = kzalloc(sizeof(**pclk), GFP_KERNEL)))
 722                return -ENOMEM;
 723        return nvkm_clk_ctor(func, device, type, inst, allow_reclock, *pclk);
 724}
 725
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