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8
9#define KMSG_COMPONENT "zpci"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12#include <linux/compat.h>
13#include <linux/kernel.h>
14#include <linux/miscdevice.h>
15#include <linux/slab.h>
16#include <linux/err.h>
17#include <linux/delay.h>
18#include <linux/pci.h>
19#include <linux/uaccess.h>
20#include <asm/pci_debug.h>
21#include <asm/pci_clp.h>
22#include <asm/clp.h>
23#include <uapi/asm/clp.h>
24
25bool zpci_unique_uid;
26
27void update_uid_checking(bool new)
28{
29 if (zpci_unique_uid != new)
30 zpci_dbg(1, "uid checking:%d\n", new);
31
32 zpci_unique_uid = new;
33}
34
35static inline void zpci_err_clp(unsigned int rsp, int rc)
36{
37 struct {
38 unsigned int rsp;
39 int rc;
40 } __packed data = {rsp, rc};
41
42 zpci_err_hex(&data, sizeof(data));
43}
44
45
46
47
48
49static inline int clp_get_ilp(unsigned long *ilp)
50{
51 unsigned long mask;
52 int cc = 3;
53
54 asm volatile (
55 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n"
56 "0: ipm %[cc]\n"
57 " srl %[cc],28\n"
58 "1:\n"
59 EX_TABLE(0b, 1b)
60 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1)
61 : "cc");
62 *ilp = mask;
63 return cc;
64}
65
66
67
68
69static __always_inline int clp_req(void *data, unsigned int lps)
70{
71 struct { u8 _[CLP_BLK_SIZE]; } *req = data;
72 u64 ignored;
73 int cc = 3;
74
75 asm volatile (
76 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n"
77 "0: ipm %[cc]\n"
78 " srl %[cc],28\n"
79 "1:\n"
80 EX_TABLE(0b, 1b)
81 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req)
82 : [req] "a" (req), [lps] "i" (lps)
83 : "cc");
84 return cc;
85}
86
87static void *clp_alloc_block(gfp_t gfp_mask)
88{
89 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE));
90}
91
92static void clp_free_block(void *ptr)
93{
94 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
95}
96
97static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
98 struct clp_rsp_query_pci_grp *response)
99{
100 zdev->tlb_refresh = response->refresh;
101 zdev->dma_mask = response->dasm;
102 zdev->msi_addr = response->msia;
103 zdev->max_msi = response->noi;
104 zdev->fmb_update = response->mui;
105 zdev->version = response->version;
106
107 switch (response->version) {
108 case 1:
109 zdev->max_bus_speed = PCIE_SPEED_5_0GT;
110 break;
111 default:
112 zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
113 break;
114 }
115}
116
117static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
118{
119 struct clp_req_rsp_query_pci_grp *rrb;
120 int rc;
121
122 rrb = clp_alloc_block(GFP_KERNEL);
123 if (!rrb)
124 return -ENOMEM;
125
126 memset(rrb, 0, sizeof(*rrb));
127 rrb->request.hdr.len = sizeof(rrb->request);
128 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
129 rrb->response.hdr.len = sizeof(rrb->response);
130 rrb->request.pfgid = pfgid;
131
132 rc = clp_req(rrb, CLP_LPS_PCI);
133 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
134 clp_store_query_pci_fngrp(zdev, &rrb->response);
135 else {
136 zpci_err("Q PCI FGRP:\n");
137 zpci_err_clp(rrb->response.hdr.rsp, rc);
138 rc = -EIO;
139 }
140 clp_free_block(rrb);
141 return rc;
142}
143
144static int clp_store_query_pci_fn(struct zpci_dev *zdev,
145 struct clp_rsp_query_pci *response)
146{
147 int i;
148
149 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
150 zdev->bars[i].val = le32_to_cpu(response->bar[i]);
151 zdev->bars[i].size = response->bar_size[i];
152 }
153 zdev->start_dma = response->sdma;
154 zdev->end_dma = response->edma;
155 zdev->pchid = response->pchid;
156 zdev->pfgid = response->pfgid;
157 zdev->pft = response->pft;
158 zdev->vfn = response->vfn;
159 zdev->port = response->port;
160 zdev->uid = response->uid;
161 zdev->fmb_length = sizeof(u32) * response->fmb_len;
162 zdev->rid_available = response->rid_avail;
163 zdev->is_physfn = response->is_physfn;
164 if (!s390_pci_no_rid && zdev->rid_available)
165 zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN;
166
167 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
168 if (response->util_str_avail) {
169 memcpy(zdev->util_str, response->util_str,
170 sizeof(zdev->util_str));
171 zdev->util_str_avail = 1;
172 }
173 zdev->mio_capable = response->mio_addr_avail;
174 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
175 if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1))))
176 continue;
177
178 zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;
179 zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt;
180 }
181 return 0;
182}
183
184int clp_query_pci_fn(struct zpci_dev *zdev)
185{
186 struct clp_req_rsp_query_pci *rrb;
187 int rc;
188
189 rrb = clp_alloc_block(GFP_KERNEL);
190 if (!rrb)
191 return -ENOMEM;
192
193 memset(rrb, 0, sizeof(*rrb));
194 rrb->request.hdr.len = sizeof(rrb->request);
195 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
196 rrb->response.hdr.len = sizeof(rrb->response);
197 rrb->request.fh = zdev->fh;
198
199 rc = clp_req(rrb, CLP_LPS_PCI);
200 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
201 rc = clp_store_query_pci_fn(zdev, &rrb->response);
202 if (rc)
203 goto out;
204 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
205 } else {
206 zpci_err("Q PCI FN:\n");
207 zpci_err_clp(rrb->response.hdr.rsp, rc);
208 rc = -EIO;
209 }
210out:
211 clp_free_block(rrb);
212 return rc;
213}
214
215static int clp_refresh_fh(u32 fid);
216
217
218
219
220static int clp_set_pci_fn(struct zpci_dev *zdev, u8 nr_dma_as, u8 command)
221{
222 struct clp_req_rsp_set_pci *rrb;
223 int rc, retries = 100;
224 u32 fid = zdev->fid;
225
226 rrb = clp_alloc_block(GFP_KERNEL);
227 if (!rrb)
228 return -ENOMEM;
229
230 do {
231 memset(rrb, 0, sizeof(*rrb));
232 rrb->request.hdr.len = sizeof(rrb->request);
233 rrb->request.hdr.cmd = CLP_SET_PCI_FN;
234 rrb->response.hdr.len = sizeof(rrb->response);
235 rrb->request.fh = zdev->fh;
236 rrb->request.oc = command;
237 rrb->request.ndas = nr_dma_as;
238
239 rc = clp_req(rrb, CLP_LPS_PCI);
240 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
241 retries--;
242 if (retries < 0)
243 break;
244 msleep(20);
245 }
246 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
247
248 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
249 zpci_err("Set PCI FN:\n");
250 zpci_err_clp(rrb->response.hdr.rsp, rc);
251 }
252
253 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
254 zdev->fh = rrb->response.fh;
255 } else if (!rc && rrb->response.hdr.rsp == CLP_RC_SETPCIFN_ALRDY &&
256 rrb->response.fh == 0) {
257
258 rc = clp_refresh_fh(fid);
259 }
260 clp_free_block(rrb);
261 return rc;
262}
263
264int clp_setup_writeback_mio(void)
265{
266 struct clp_req_rsp_slpc_pci *rrb;
267 u8 wb_bit_pos;
268 int rc;
269
270 rrb = clp_alloc_block(GFP_KERNEL);
271 if (!rrb)
272 return -ENOMEM;
273
274 memset(rrb, 0, sizeof(*rrb));
275 rrb->request.hdr.len = sizeof(rrb->request);
276 rrb->request.hdr.cmd = CLP_SLPC;
277 rrb->response.hdr.len = sizeof(rrb->response);
278
279 rc = clp_req(rrb, CLP_LPS_PCI);
280 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
281 if (rrb->response.vwb) {
282 wb_bit_pos = rrb->response.mio_wb;
283 set_bit_inv(wb_bit_pos, &mio_wb_bit_mask);
284 zpci_dbg(3, "wb bit: %d\n", wb_bit_pos);
285 } else {
286 zpci_dbg(3, "wb bit: n.a.\n");
287 }
288
289 } else {
290 zpci_err("SLPC PCI:\n");
291 zpci_err_clp(rrb->response.hdr.rsp, rc);
292 rc = -EIO;
293 }
294 clp_free_block(rrb);
295 return rc;
296}
297
298int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
299{
300 int rc;
301
302 rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
303 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
304 if (rc)
305 goto out;
306
307 if (zpci_use_mio(zdev)) {
308 rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_MIO);
309 zpci_dbg(3, "ena mio fid:%x, fh:%x, rc:%d\n",
310 zdev->fid, zdev->fh, rc);
311 if (rc)
312 clp_disable_fh(zdev);
313 }
314out:
315 return rc;
316}
317
318int clp_disable_fh(struct zpci_dev *zdev)
319{
320 int rc;
321
322 if (!zdev_enabled(zdev))
323 return 0;
324
325 rc = clp_set_pci_fn(zdev, 0, CLP_SET_DISABLE_PCI_FN);
326 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
327 return rc;
328}
329
330static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, void *data,
331 void (*cb)(struct clp_fh_list_entry *, void *))
332{
333 u64 resume_token = 0;
334 int entries, i, rc;
335
336 do {
337 memset(rrb, 0, sizeof(*rrb));
338 rrb->request.hdr.len = sizeof(rrb->request);
339 rrb->request.hdr.cmd = CLP_LIST_PCI;
340
341 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
342 rrb->request.resume_token = resume_token;
343
344
345 rc = clp_req(rrb, CLP_LPS_PCI);
346 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
347 zpci_err("List PCI FN:\n");
348 zpci_err_clp(rrb->response.hdr.rsp, rc);
349 rc = -EIO;
350 goto out;
351 }
352
353 update_uid_checking(rrb->response.uid_checking);
354 WARN_ON_ONCE(rrb->response.entry_size !=
355 sizeof(struct clp_fh_list_entry));
356
357 entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
358 rrb->response.entry_size;
359
360 resume_token = rrb->response.resume_token;
361 for (i = 0; i < entries; i++)
362 cb(&rrb->response.fh_list[i], data);
363 } while (resume_token);
364out:
365 return rc;
366}
367
368static void __clp_add(struct clp_fh_list_entry *entry, void *data)
369{
370 struct zpci_dev *zdev;
371
372 if (!entry->vendor_id)
373 return;
374
375 zdev = get_zdev_by_fid(entry->fid);
376 if (!zdev)
377 zpci_create_device(entry->fid, entry->fh, entry->config_state);
378}
379
380int clp_scan_pci_devices(void)
381{
382 struct clp_req_rsp_list_pci *rrb;
383 int rc;
384
385 rrb = clp_alloc_block(GFP_KERNEL);
386 if (!rrb)
387 return -ENOMEM;
388
389 rc = clp_list_pci(rrb, NULL, __clp_add);
390
391 clp_free_block(rrb);
392 return rc;
393}
394
395static void __clp_refresh_fh(struct clp_fh_list_entry *entry, void *data)
396{
397 struct zpci_dev *zdev;
398 u32 fid = *((u32 *)data);
399
400 if (!entry->vendor_id || fid != entry->fid)
401 return;
402
403 zdev = get_zdev_by_fid(fid);
404 if (!zdev)
405 return;
406
407 zdev->fh = entry->fh;
408}
409
410
411
412
413static int clp_refresh_fh(u32 fid)
414{
415 struct clp_req_rsp_list_pci *rrb;
416 int rc;
417
418 rrb = clp_alloc_block(GFP_NOWAIT);
419 if (!rrb)
420 return -ENOMEM;
421
422 rc = clp_list_pci(rrb, &fid, __clp_refresh_fh);
423
424 clp_free_block(rrb);
425 return rc;
426}
427
428struct clp_state_data {
429 u32 fid;
430 enum zpci_state state;
431};
432
433static void __clp_get_state(struct clp_fh_list_entry *entry, void *data)
434{
435 struct clp_state_data *sd = data;
436
437 if (entry->fid != sd->fid)
438 return;
439
440 sd->state = entry->config_state;
441}
442
443int clp_get_state(u32 fid, enum zpci_state *state)
444{
445 struct clp_req_rsp_list_pci *rrb;
446 struct clp_state_data sd = {fid, ZPCI_FN_STATE_RESERVED};
447 int rc;
448
449 rrb = clp_alloc_block(GFP_ATOMIC);
450 if (!rrb)
451 return -ENOMEM;
452
453 rc = clp_list_pci(rrb, &sd, __clp_get_state);
454 if (!rc)
455 *state = sd.state;
456
457 clp_free_block(rrb);
458 return rc;
459}
460
461static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
462{
463 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
464
465 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
466 lpcb->response.hdr.len > limit)
467 return -EINVAL;
468 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0;
469}
470
471static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb)
472{
473 switch (lpcb->cmd) {
474 case 0x0001:
475 return clp_base_slpc(req, (void *) lpcb);
476 default:
477 return -EINVAL;
478 }
479}
480
481static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc_pci *lpcb)
482{
483 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
484
485 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
486 lpcb->response.hdr.len > limit)
487 return -EINVAL;
488 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
489}
490
491static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb)
492{
493 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
494
495 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
496 lpcb->response.hdr.len > limit)
497 return -EINVAL;
498 if (lpcb->request.reserved2 != 0)
499 return -EINVAL;
500 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
501}
502
503static int clp_pci_query(struct clp_req *req,
504 struct clp_req_rsp_query_pci *lpcb)
505{
506 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
507
508 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
509 lpcb->response.hdr.len > limit)
510 return -EINVAL;
511 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0)
512 return -EINVAL;
513 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
514}
515
516static int clp_pci_query_grp(struct clp_req *req,
517 struct clp_req_rsp_query_pci_grp *lpcb)
518{
519 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
520
521 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
522 lpcb->response.hdr.len > limit)
523 return -EINVAL;
524 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 ||
525 lpcb->request.reserved4 != 0)
526 return -EINVAL;
527 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
528}
529
530static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb)
531{
532 switch (lpcb->cmd) {
533 case 0x0001:
534 return clp_pci_slpc(req, (void *) lpcb);
535 case 0x0002:
536 return clp_pci_list(req, (void *) lpcb);
537 case 0x0003:
538 return clp_pci_query(req, (void *) lpcb);
539 case 0x0004:
540 return clp_pci_query_grp(req, (void *) lpcb);
541 default:
542 return -EINVAL;
543 }
544}
545
546static int clp_normal_command(struct clp_req *req)
547{
548 struct clp_req_hdr *lpcb;
549 void __user *uptr;
550 int rc;
551
552 rc = -EINVAL;
553 if (req->lps != 0 && req->lps != 2)
554 goto out;
555
556 rc = -ENOMEM;
557 lpcb = clp_alloc_block(GFP_KERNEL);
558 if (!lpcb)
559 goto out;
560
561 rc = -EFAULT;
562 uptr = (void __force __user *)(unsigned long) req->data_p;
563 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0)
564 goto out_free;
565
566 rc = -EINVAL;
567 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0)
568 goto out_free;
569
570 switch (req->lps) {
571 case 0:
572 rc = clp_base_command(req, lpcb);
573 break;
574 case 2:
575 rc = clp_pci_command(req, lpcb);
576 break;
577 }
578 if (rc)
579 goto out_free;
580
581 rc = -EFAULT;
582 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0)
583 goto out_free;
584
585 rc = 0;
586
587out_free:
588 clp_free_block(lpcb);
589out:
590 return rc;
591}
592
593static int clp_immediate_command(struct clp_req *req)
594{
595 void __user *uptr;
596 unsigned long ilp;
597 int exists;
598
599 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0)
600 return -EINVAL;
601
602 uptr = (void __force __user *)(unsigned long) req->data_p;
603 if (req->cmd == 0) {
604
605 exists = test_bit_inv(req->lps, &ilp);
606 return put_user(exists, (int __user *) uptr);
607 }
608
609 return put_user(ilp, (unsigned long __user *) uptr);
610}
611
612static long clp_misc_ioctl(struct file *filp, unsigned int cmd,
613 unsigned long arg)
614{
615 struct clp_req req;
616 void __user *argp;
617
618 if (cmd != CLP_SYNC)
619 return -EINVAL;
620
621 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg;
622 if (copy_from_user(&req, argp, sizeof(req)))
623 return -EFAULT;
624 if (req.r != 0)
625 return -EINVAL;
626 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req);
627}
628
629static int clp_misc_release(struct inode *inode, struct file *filp)
630{
631 return 0;
632}
633
634static const struct file_operations clp_misc_fops = {
635 .owner = THIS_MODULE,
636 .open = nonseekable_open,
637 .release = clp_misc_release,
638 .unlocked_ioctl = clp_misc_ioctl,
639 .compat_ioctl = clp_misc_ioctl,
640 .llseek = no_llseek,
641};
642
643static struct miscdevice clp_misc_device = {
644 .minor = MISC_DYNAMIC_MINOR,
645 .name = "clp",
646 .fops = &clp_misc_fops,
647};
648
649static int __init clp_misc_init(void)
650{
651 return misc_register(&clp_misc_device);
652}
653
654device_initcall(clp_misc_init);
655
