linux/arch/ia64/kernel/setup.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Architecture-specific setup.
   4 *
   5 * Copyright (C) 1998-2001, 2003-2004 Hewlett-Packard Co
   6 *      David Mosberger-Tang <davidm@hpl.hp.com>
   7 *      Stephane Eranian <eranian@hpl.hp.com>
   8 * Copyright (C) 2000, 2004 Intel Corp
   9 *      Rohit Seth <rohit.seth@intel.com>
  10 *      Suresh Siddha <suresh.b.siddha@intel.com>
  11 *      Gordon Jin <gordon.jin@intel.com>
  12 * Copyright (C) 1999 VA Linux Systems
  13 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
  14 *
  15 * 12/26/04 S.Siddha, G.Jin, R.Seth
  16 *                      Add multi-threading and multi-core detection
  17 * 11/12/01 D.Mosberger Convert get_cpuinfo() to seq_file based show_cpuinfo().
  18 * 04/04/00 D.Mosberger renamed cpu_initialized to cpu_online_map
  19 * 03/31/00 R.Seth      cpu_initialized and current->processor fixes
  20 * 02/04/00 D.Mosberger some more get_cpuinfo fixes...
  21 * 02/01/00 R.Seth      fixed get_cpuinfo for SMP
  22 * 01/07/99 S.Eranian   added the support for command line argument
  23 * 06/24/99 W.Drummond  added boot_cpu_data.
  24 * 05/28/05 Z. Menyhart Dynamic stride size for "flush_icache_range()"
  25 */
  26#include <linux/module.h>
  27#include <linux/init.h>
  28#include <linux/pgtable.h>
  29
  30#include <linux/acpi.h>
  31#include <linux/console.h>
  32#include <linux/delay.h>
  33#include <linux/cpu.h>
  34#include <linux/kdev_t.h>
  35#include <linux/kernel.h>
  36#include <linux/memblock.h>
  37#include <linux/reboot.h>
  38#include <linux/sched/mm.h>
  39#include <linux/sched/clock.h>
  40#include <linux/sched/task_stack.h>
  41#include <linux/seq_file.h>
  42#include <linux/string.h>
  43#include <linux/threads.h>
  44#include <linux/screen_info.h>
  45#include <linux/dmi.h>
  46#include <linux/root_dev.h>
  47#include <linux/serial.h>
  48#include <linux/serial_core.h>
  49#include <linux/efi.h>
  50#include <linux/initrd.h>
  51#include <linux/pm.h>
  52#include <linux/cpufreq.h>
  53#include <linux/kexec.h>
  54#include <linux/crash_dump.h>
  55
  56#include <asm/mca.h>
  57#include <asm/meminit.h>
  58#include <asm/page.h>
  59#include <asm/patch.h>
  60#include <asm/processor.h>
  61#include <asm/sal.h>
  62#include <asm/sections.h>
  63#include <asm/setup.h>
  64#include <asm/smp.h>
  65#include <asm/tlbflush.h>
  66#include <asm/unistd.h>
  67#include <asm/uv/uv.h>
  68#include <asm/xtp.h>
  69
  70#if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
  71# error "struct cpuinfo_ia64 too big!"
  72#endif
  73
  74char ia64_platform_name[64];
  75
  76#ifdef CONFIG_SMP
  77unsigned long __per_cpu_offset[NR_CPUS];
  78EXPORT_SYMBOL(__per_cpu_offset);
  79#endif
  80
  81DEFINE_PER_CPU(struct cpuinfo_ia64, ia64_cpu_info);
  82EXPORT_SYMBOL(ia64_cpu_info);
  83DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
  84#ifdef CONFIG_SMP
  85EXPORT_SYMBOL(local_per_cpu_offset);
  86#endif
  87unsigned long ia64_cycles_per_usec;
  88struct ia64_boot_param *ia64_boot_param;
  89struct screen_info screen_info;
  90unsigned long vga_console_iobase;
  91unsigned long vga_console_membase;
  92
  93static struct resource data_resource = {
  94        .name   = "Kernel data",
  95        .flags  = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
  96};
  97
  98static struct resource code_resource = {
  99        .name   = "Kernel code",
 100        .flags  = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
 101};
 102
 103static struct resource bss_resource = {
 104        .name   = "Kernel bss",
 105        .flags  = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
 106};
 107
 108unsigned long ia64_max_cacheline_size;
 109
 110unsigned long ia64_iobase;      /* virtual address for I/O accesses */
 111EXPORT_SYMBOL(ia64_iobase);
 112struct io_space io_space[MAX_IO_SPACES];
 113EXPORT_SYMBOL(io_space);
 114unsigned int num_io_spaces;
 115
 116/*
 117 * "flush_icache_range()" needs to know what processor dependent stride size to use
 118 * when it makes i-cache(s) coherent with d-caches.
 119 */
 120#define I_CACHE_STRIDE_SHIFT    5       /* Safest way to go: 32 bytes by 32 bytes */
 121unsigned long ia64_i_cache_stride_shift = ~0;
 122/*
 123 * "clflush_cache_range()" needs to know what processor dependent stride size to
 124 * use when it flushes cache lines including both d-cache and i-cache.
 125 */
 126/* Safest way to go: 32 bytes by 32 bytes */
 127#define CACHE_STRIDE_SHIFT      5
 128unsigned long ia64_cache_stride_shift = ~0;
 129
 130/*
 131 * We use a special marker for the end of memory and it uses the extra (+1) slot
 132 */
 133struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1] __initdata;
 134int num_rsvd_regions __initdata;
 135
 136
 137/*
 138 * Filter incoming memory segments based on the primitive map created from the boot
 139 * parameters. Segments contained in the map are removed from the memory ranges. A
 140 * caller-specified function is called with the memory ranges that remain after filtering.
 141 * This routine does not assume the incoming segments are sorted.
 142 */
 143int __init
 144filter_rsvd_memory (u64 start, u64 end, void *arg)
 145{
 146        u64 range_start, range_end, prev_start;
 147        void (*func)(unsigned long, unsigned long, int);
 148        int i;
 149
 150#if IGNORE_PFN0
 151        if (start == PAGE_OFFSET) {
 152                printk(KERN_WARNING "warning: skipping physical page 0\n");
 153                start += PAGE_SIZE;
 154                if (start >= end) return 0;
 155        }
 156#endif
 157        /*
 158         * lowest possible address(walker uses virtual)
 159         */
 160        prev_start = PAGE_OFFSET;
 161        func = arg;
 162
 163        for (i = 0; i < num_rsvd_regions; ++i) {
 164                range_start = max(start, prev_start);
 165                range_end   = min(end, rsvd_region[i].start);
 166
 167                if (range_start < range_end)
 168                        call_pernode_memory(__pa(range_start), range_end - range_start, func);
 169
 170                /* nothing more available in this segment */
 171                if (range_end == end) return 0;
 172
 173                prev_start = rsvd_region[i].end;
 174        }
 175        /* end of memory marker allows full processing inside loop body */
 176        return 0;
 177}
 178
 179/*
 180 * Similar to "filter_rsvd_memory()", but the reserved memory ranges
 181 * are not filtered out.
 182 */
 183int __init
 184filter_memory(u64 start, u64 end, void *arg)
 185{
 186        void (*func)(unsigned long, unsigned long, int);
 187
 188#if IGNORE_PFN0
 189        if (start == PAGE_OFFSET) {
 190                printk(KERN_WARNING "warning: skipping physical page 0\n");
 191                start += PAGE_SIZE;
 192                if (start >= end)
 193                        return 0;
 194        }
 195#endif
 196        func = arg;
 197        if (start < end)
 198                call_pernode_memory(__pa(start), end - start, func);
 199        return 0;
 200}
 201
 202static void __init
 203sort_regions (struct rsvd_region *rsvd_region, int max)
 204{
 205        int j;
 206
 207        /* simple bubble sorting */
 208        while (max--) {
 209                for (j = 0; j < max; ++j) {
 210                        if (rsvd_region[j].start > rsvd_region[j+1].start) {
 211                                struct rsvd_region tmp;
 212                                tmp = rsvd_region[j];
 213                                rsvd_region[j] = rsvd_region[j + 1];
 214                                rsvd_region[j + 1] = tmp;
 215                        }
 216                }
 217        }
 218}
 219
 220/* merge overlaps */
 221static int __init
 222merge_regions (struct rsvd_region *rsvd_region, int max)
 223{
 224        int i;
 225        for (i = 1; i < max; ++i) {
 226                if (rsvd_region[i].start >= rsvd_region[i-1].end)
 227                        continue;
 228                if (rsvd_region[i].end > rsvd_region[i-1].end)
 229                        rsvd_region[i-1].end = rsvd_region[i].end;
 230                --max;
 231                memmove(&rsvd_region[i], &rsvd_region[i+1],
 232                        (max - i) * sizeof(struct rsvd_region));
 233        }
 234        return max;
 235}
 236
 237/*
 238 * Request address space for all standard resources
 239 */
 240static int __init register_memory(void)
 241{
 242        code_resource.start = ia64_tpa(_text);
 243        code_resource.end   = ia64_tpa(_etext) - 1;
 244        data_resource.start = ia64_tpa(_etext);
 245        data_resource.end   = ia64_tpa(_edata) - 1;
 246        bss_resource.start  = ia64_tpa(__bss_start);
 247        bss_resource.end    = ia64_tpa(_end) - 1;
 248        efi_initialize_iomem_resources(&code_resource, &data_resource,
 249                        &bss_resource);
 250
 251        return 0;
 252}
 253
 254__initcall(register_memory);
 255
 256
 257#ifdef CONFIG_KEXEC
 258
 259/*
 260 * This function checks if the reserved crashkernel is allowed on the specific
 261 * IA64 machine flavour. Machines without an IO TLB use swiotlb and require
 262 * some memory below 4 GB (i.e. in 32 bit area), see the implementation of
 263 * kernel/dma/swiotlb.c. The hpzx1 architecture has an IO TLB but cannot use that
 264 * in kdump case. See the comment in sba_init() in sba_iommu.c.
 265 *
 266 * So, the only machvec that really supports loading the kdump kernel
 267 * over 4 GB is "uv".
 268 */
 269static int __init check_crashkernel_memory(unsigned long pbase, size_t size)
 270{
 271        if (is_uv_system())
 272                return 1;
 273        else
 274                return pbase < (1UL << 32);
 275}
 276
 277static void __init setup_crashkernel(unsigned long total, int *n)
 278{
 279        unsigned long long base = 0, size = 0;
 280        int ret;
 281
 282        ret = parse_crashkernel(boot_command_line, total,
 283                        &size, &base);
 284        if (ret == 0 && size > 0) {
 285                if (!base) {
 286                        sort_regions(rsvd_region, *n);
 287                        *n = merge_regions(rsvd_region, *n);
 288                        base = kdump_find_rsvd_region(size,
 289                                        rsvd_region, *n);
 290                }
 291
 292                if (!check_crashkernel_memory(base, size)) {
 293                        pr_warn("crashkernel: There would be kdump memory "
 294                                "at %ld GB but this is unusable because it "
 295                                "must\nbe below 4 GB. Change the memory "
 296                                "configuration of the machine.\n",
 297                                (unsigned long)(base >> 30));
 298                        return;
 299                }
 300
 301                if (base != ~0UL) {
 302                        printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
 303                                        "for crashkernel (System RAM: %ldMB)\n",
 304                                        (unsigned long)(size >> 20),
 305                                        (unsigned long)(base >> 20),
 306                                        (unsigned long)(total >> 20));
 307                        rsvd_region[*n].start =
 308                                (unsigned long)__va(base);
 309                        rsvd_region[*n].end =
 310                                (unsigned long)__va(base + size);
 311                        (*n)++;
 312                        crashk_res.start = base;
 313                        crashk_res.end = base + size - 1;
 314                }
 315        }
 316        efi_memmap_res.start = ia64_boot_param->efi_memmap;
 317        efi_memmap_res.end = efi_memmap_res.start +
 318                ia64_boot_param->efi_memmap_size;
 319        boot_param_res.start = __pa(ia64_boot_param);
 320        boot_param_res.end = boot_param_res.start +
 321                sizeof(*ia64_boot_param);
 322}
 323#else
 324static inline void __init setup_crashkernel(unsigned long total, int *n)
 325{}
 326#endif
 327
 328/**
 329 * reserve_memory - setup reserved memory areas
 330 *
 331 * Setup the reserved memory areas set aside for the boot parameters,
 332 * initrd, etc.  There are currently %IA64_MAX_RSVD_REGIONS defined,
 333 * see arch/ia64/include/asm/meminit.h if you need to define more.
 334 */
 335void __init
 336reserve_memory (void)
 337{
 338        int n = 0;
 339        unsigned long total_memory;
 340
 341        /*
 342         * none of the entries in this table overlap
 343         */
 344        rsvd_region[n].start = (unsigned long) ia64_boot_param;
 345        rsvd_region[n].end   = rsvd_region[n].start + sizeof(*ia64_boot_param);
 346        n++;
 347
 348        rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->efi_memmap);
 349        rsvd_region[n].end   = rsvd_region[n].start + ia64_boot_param->efi_memmap_size;
 350        n++;
 351
 352        rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->command_line);
 353        rsvd_region[n].end   = (rsvd_region[n].start
 354                                + strlen(__va(ia64_boot_param->command_line)) + 1);
 355        n++;
 356
 357        rsvd_region[n].start = (unsigned long) ia64_imva((void *)KERNEL_START);
 358        rsvd_region[n].end   = (unsigned long) ia64_imva(_end);
 359        n++;
 360
 361#ifdef CONFIG_BLK_DEV_INITRD
 362        if (ia64_boot_param->initrd_start) {
 363                rsvd_region[n].start = (unsigned long)__va(ia64_boot_param->initrd_start);
 364                rsvd_region[n].end   = rsvd_region[n].start + ia64_boot_param->initrd_size;
 365                n++;
 366        }
 367#endif
 368
 369#ifdef CONFIG_CRASH_DUMP
 370        if (reserve_elfcorehdr(&rsvd_region[n].start,
 371                               &rsvd_region[n].end) == 0)
 372                n++;
 373#endif
 374
 375        total_memory = efi_memmap_init(&rsvd_region[n].start, &rsvd_region[n].end);
 376        n++;
 377
 378        setup_crashkernel(total_memory, &n);
 379
 380        /* end of memory marker */
 381        rsvd_region[n].start = ~0UL;
 382        rsvd_region[n].end   = ~0UL;
 383        n++;
 384
 385        num_rsvd_regions = n;
 386        BUG_ON(IA64_MAX_RSVD_REGIONS + 1 < n);
 387
 388        sort_regions(rsvd_region, num_rsvd_regions);
 389        num_rsvd_regions = merge_regions(rsvd_region, num_rsvd_regions);
 390
 391        /* reserve all regions except the end of memory marker with memblock */
 392        for (n = 0; n < num_rsvd_regions - 1; n++) {
 393                struct rsvd_region *region = &rsvd_region[n];
 394                phys_addr_t addr = __pa(region->start);
 395                phys_addr_t size = region->end - region->start;
 396
 397                memblock_reserve(addr, size);
 398        }
 399}
 400
 401/**
 402 * find_initrd - get initrd parameters from the boot parameter structure
 403 *
 404 * Grab the initrd start and end from the boot parameter struct given us by
 405 * the boot loader.
 406 */
 407void __init
 408find_initrd (void)
 409{
 410#ifdef CONFIG_BLK_DEV_INITRD
 411        if (ia64_boot_param->initrd_start) {
 412                initrd_start = (unsigned long)__va(ia64_boot_param->initrd_start);
 413                initrd_end   = initrd_start+ia64_boot_param->initrd_size;
 414
 415                printk(KERN_INFO "Initial ramdisk at: 0x%lx (%llu bytes)\n",
 416                       initrd_start, ia64_boot_param->initrd_size);
 417        }
 418#endif
 419}
 420
 421static void __init
 422io_port_init (void)
 423{
 424        unsigned long phys_iobase;
 425
 426        /*
 427         * Set `iobase' based on the EFI memory map or, failing that, the
 428         * value firmware left in ar.k0.
 429         *
 430         * Note that in ia32 mode, IN/OUT instructions use ar.k0 to compute
 431         * the port's virtual address, so ia32_load_state() loads it with a
 432         * user virtual address.  But in ia64 mode, glibc uses the
 433         * *physical* address in ar.k0 to mmap the appropriate area from
 434         * /dev/mem, and the inX()/outX() interfaces use MMIO.  In both
 435         * cases, user-mode can only use the legacy 0-64K I/O port space.
 436         *
 437         * ar.k0 is not involved in kernel I/O port accesses, which can use
 438         * any of the I/O port spaces and are done via MMIO using the
 439         * virtual mmio_base from the appropriate io_space[].
 440         */
 441        phys_iobase = efi_get_iobase();
 442        if (!phys_iobase) {
 443                phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
 444                printk(KERN_INFO "No I/O port range found in EFI memory map, "
 445                        "falling back to AR.KR0 (0x%lx)\n", phys_iobase);
 446        }
 447        ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
 448        ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
 449
 450        /* setup legacy IO port space */
 451        io_space[0].mmio_base = ia64_iobase;
 452        io_space[0].sparse = 1;
 453        num_io_spaces = 1;
 454}
 455
 456/**
 457 * early_console_setup - setup debugging console
 458 *
 459 * Consoles started here require little enough setup that we can start using
 460 * them very early in the boot process, either right after the machine
 461 * vector initialization, or even before if the drivers can detect their hw.
 462 *
 463 * Returns non-zero if a console couldn't be setup.
 464 */
 465static inline int __init
 466early_console_setup (char *cmdline)
 467{
 468#ifdef CONFIG_EFI_PCDP
 469        if (!efi_setup_pcdp_console(cmdline))
 470                return 0;
 471#endif
 472        return -1;
 473}
 474
 475static void __init
 476screen_info_setup(void)
 477{
 478        unsigned int orig_x, orig_y, num_cols, num_rows, font_height;
 479
 480        memset(&screen_info, 0, sizeof(screen_info));
 481
 482        if (!ia64_boot_param->console_info.num_rows ||
 483            !ia64_boot_param->console_info.num_cols) {
 484                printk(KERN_WARNING "invalid screen-info, guessing 80x25\n");
 485                orig_x = 0;
 486                orig_y = 0;
 487                num_cols = 80;
 488                num_rows = 25;
 489                font_height = 16;
 490        } else {
 491                orig_x = ia64_boot_param->console_info.orig_x;
 492                orig_y = ia64_boot_param->console_info.orig_y;
 493                num_cols = ia64_boot_param->console_info.num_cols;
 494                num_rows = ia64_boot_param->console_info.num_rows;
 495                font_height = 400 / num_rows;
 496        }
 497
 498        screen_info.orig_x = orig_x;
 499        screen_info.orig_y = orig_y;
 500        screen_info.orig_video_cols  = num_cols;
 501        screen_info.orig_video_lines = num_rows;
 502        screen_info.orig_video_points = font_height;
 503        screen_info.orig_video_mode = 3;        /* XXX fake */
 504        screen_info.orig_video_isVGA = 1;       /* XXX fake */
 505        screen_info.orig_video_ega_bx = 3;      /* XXX fake */
 506}
 507
 508static inline void
 509mark_bsp_online (void)
 510{
 511#ifdef CONFIG_SMP
 512        /* If we register an early console, allow CPU 0 to printk */
 513        set_cpu_online(smp_processor_id(), true);
 514#endif
 515}
 516
 517static __initdata int nomca;
 518static __init int setup_nomca(char *s)
 519{
 520        nomca = 1;
 521        return 0;
 522}
 523early_param("nomca", setup_nomca);
 524
 525#ifdef CONFIG_CRASH_DUMP
 526int __init reserve_elfcorehdr(u64 *start, u64 *end)
 527{
 528        u64 length;
 529
 530        /* We get the address using the kernel command line,
 531         * but the size is extracted from the EFI tables.
 532         * Both address and size are required for reservation
 533         * to work properly.
 534         */
 535
 536        if (!is_vmcore_usable())
 537                return -EINVAL;
 538
 539        if ((length = vmcore_find_descriptor_size(elfcorehdr_addr)) == 0) {
 540                vmcore_unusable();
 541                return -EINVAL;
 542        }
 543
 544        *start = (unsigned long)__va(elfcorehdr_addr);
 545        *end = *start + length;
 546        return 0;
 547}
 548
 549#endif /* CONFIG_PROC_VMCORE */
 550
 551void __init
 552setup_arch (char **cmdline_p)
 553{
 554        unw_init();
 555
 556        ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
 557
 558        *cmdline_p = __va(ia64_boot_param->command_line);
 559        strlcpy(boot_command_line, *cmdline_p, COMMAND_LINE_SIZE);
 560
 561        efi_init();
 562        io_port_init();
 563
 564        uv_probe_system_type();
 565        parse_early_param();
 566
 567        if (early_console_setup(*cmdline_p) == 0)
 568                mark_bsp_online();
 569
 570        /* Initialize the ACPI boot-time table parser */
 571        acpi_table_init();
 572        early_acpi_boot_init();
 573#ifdef CONFIG_ACPI_NUMA
 574        acpi_numa_init();
 575        acpi_numa_fixup();
 576#ifdef CONFIG_ACPI_HOTPLUG_CPU
 577        prefill_possible_map();
 578#endif
 579        per_cpu_scan_finalize((cpumask_weight(&early_cpu_possible_map) == 0 ?
 580                32 : cpumask_weight(&early_cpu_possible_map)),
 581                additional_cpus > 0 ? additional_cpus : 0);
 582#endif /* CONFIG_ACPI_NUMA */
 583
 584#ifdef CONFIG_SMP
 585        smp_build_cpu_map();
 586#endif
 587        find_memory();
 588
 589        /* process SAL system table: */
 590        ia64_sal_init(__va(sal_systab_phys));
 591
 592#ifdef CONFIG_ITANIUM
 593        ia64_patch_rse((u64) __start___rse_patchlist, (u64) __end___rse_patchlist);
 594#else
 595        {
 596                unsigned long num_phys_stacked;
 597
 598                if (ia64_pal_rse_info(&num_phys_stacked, 0) == 0 && num_phys_stacked > 96)
 599                        ia64_patch_rse((u64) __start___rse_patchlist, (u64) __end___rse_patchlist);
 600        }
 601#endif
 602
 603#ifdef CONFIG_SMP
 604        cpu_physical_id(0) = hard_smp_processor_id();
 605#endif
 606
 607        cpu_init();     /* initialize the bootstrap CPU */
 608        mmu_context_init();     /* initialize context_id bitmap */
 609
 610#ifdef CONFIG_VT
 611        if (!conswitchp) {
 612# if defined(CONFIG_VGA_CONSOLE)
 613                /*
 614                 * Non-legacy systems may route legacy VGA MMIO range to system
 615                 * memory.  vga_con probes the MMIO hole, so memory looks like
 616                 * a VGA device to it.  The EFI memory map can tell us if it's
 617                 * memory so we can avoid this problem.
 618                 */
 619                if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
 620                        conswitchp = &vga_con;
 621# endif
 622        }
 623#endif
 624
 625        /* enable IA-64 Machine Check Abort Handling unless disabled */
 626        if (!nomca)
 627                ia64_mca_init();
 628
 629        /*
 630         * Default to /dev/sda2.  This assumes that the EFI partition
 631         * is physical disk 1 partition 1 and the Linux root disk is
 632         * physical disk 1 partition 2.
 633         */
 634        ROOT_DEV = Root_SDA2;           /* default to second partition on first drive */
 635
 636        if (is_uv_system())
 637                uv_setup(cmdline_p);
 638#ifdef CONFIG_SMP
 639        else
 640                init_smp_config();
 641#endif
 642
 643        screen_info_setup();
 644        paging_init();
 645
 646        clear_sched_clock_stable();
 647}
 648
 649/*
 650 * Display cpu info for all CPUs.
 651 */
 652static int
 653show_cpuinfo (struct seq_file *m, void *v)
 654{
 655#ifdef CONFIG_SMP
 656#       define lpj      c->loops_per_jiffy
 657#       define cpunum   c->cpu
 658#else
 659#       define lpj      loops_per_jiffy
 660#       define cpunum   0
 661#endif
 662        static struct {
 663                unsigned long mask;
 664                const char *feature_name;
 665        } feature_bits[] = {
 666                { 1UL << 0, "branchlong" },
 667                { 1UL << 1, "spontaneous deferral"},
 668                { 1UL << 2, "16-byte atomic ops" }
 669        };
 670        char features[128], *cp, *sep;
 671        struct cpuinfo_ia64 *c = v;
 672        unsigned long mask;
 673        unsigned long proc_freq;
 674        int i, size;
 675
 676        mask = c->features;
 677
 678        /* build the feature string: */
 679        memcpy(features, "standard", 9);
 680        cp = features;
 681        size = sizeof(features);
 682        sep = "";
 683        for (i = 0; i < ARRAY_SIZE(feature_bits) && size > 1; ++i) {
 684                if (mask & feature_bits[i].mask) {
 685                        cp += snprintf(cp, size, "%s%s", sep,
 686                                       feature_bits[i].feature_name),
 687                        sep = ", ";
 688                        mask &= ~feature_bits[i].mask;
 689                        size = sizeof(features) - (cp - features);
 690                }
 691        }
 692        if (mask && size > 1) {
 693                /* print unknown features as a hex value */
 694                snprintf(cp, size, "%s0x%lx", sep, mask);
 695        }
 696
 697        proc_freq = cpufreq_quick_get(cpunum);
 698        if (!proc_freq)
 699                proc_freq = c->proc_freq / 1000;
 700
 701        seq_printf(m,
 702                   "processor  : %d\n"
 703                   "vendor     : %s\n"
 704                   "arch       : IA-64\n"
 705                   "family     : %u\n"
 706                   "model      : %u\n"
 707                   "model name : %s\n"
 708                   "revision   : %u\n"
 709                   "archrev    : %u\n"
 710                   "features   : %s\n"
 711                   "cpu number : %lu\n"
 712                   "cpu regs   : %u\n"
 713                   "cpu MHz    : %lu.%03lu\n"
 714                   "itc MHz    : %lu.%06lu\n"
 715                   "BogoMIPS   : %lu.%02lu\n",
 716                   cpunum, c->vendor, c->family, c->model,
 717                   c->model_name, c->revision, c->archrev,
 718                   features, c->ppn, c->number,
 719                   proc_freq / 1000, proc_freq % 1000,
 720                   c->itc_freq / 1000000, c->itc_freq % 1000000,
 721                   lpj*HZ/500000, (lpj*HZ/5000) % 100);
 722#ifdef CONFIG_SMP
 723        seq_printf(m, "siblings   : %u\n",
 724                   cpumask_weight(&cpu_core_map[cpunum]));
 725        if (c->socket_id != -1)
 726                seq_printf(m, "physical id: %u\n", c->socket_id);
 727        if (c->threads_per_core > 1 || c->cores_per_socket > 1)
 728                seq_printf(m,
 729                           "core id    : %u\n"
 730                           "thread id  : %u\n",
 731                           c->core_id, c->thread_id);
 732#endif
 733        seq_printf(m,"\n");
 734
 735        return 0;
 736}
 737
 738static void *
 739c_start (struct seq_file *m, loff_t *pos)
 740{
 741#ifdef CONFIG_SMP
 742        while (*pos < nr_cpu_ids && !cpu_online(*pos))
 743                ++*pos;
 744#endif
 745        return *pos < nr_cpu_ids ? cpu_data(*pos) : NULL;
 746}
 747
 748static void *
 749c_next (struct seq_file *m, void *v, loff_t *pos)
 750{
 751        ++*pos;
 752        return c_start(m, pos);
 753}
 754
 755static void
 756c_stop (struct seq_file *m, void *v)
 757{
 758}
 759
 760const struct seq_operations cpuinfo_op = {
 761        .start =        c_start,
 762        .next =         c_next,
 763        .stop =         c_stop,
 764        .show =         show_cpuinfo
 765};
 766
 767#define MAX_BRANDS      8
 768static char brandname[MAX_BRANDS][128];
 769
 770static char *
 771get_model_name(__u8 family, __u8 model)
 772{
 773        static int overflow;
 774        char brand[128];
 775        int i;
 776
 777        memcpy(brand, "Unknown", 8);
 778        if (ia64_pal_get_brand_info(brand)) {
 779                if (family == 0x7)
 780                        memcpy(brand, "Merced", 7);
 781                else if (family == 0x1f) switch (model) {
 782                        case 0: memcpy(brand, "McKinley", 9); break;
 783                        case 1: memcpy(brand, "Madison", 8); break;
 784                        case 2: memcpy(brand, "Madison up to 9M cache", 23); break;
 785                }
 786        }
 787        for (i = 0; i < MAX_BRANDS; i++)
 788                if (strcmp(brandname[i], brand) == 0)
 789                        return brandname[i];
 790        for (i = 0; i < MAX_BRANDS; i++)
 791                if (brandname[i][0] == '\0')
 792                        return strcpy(brandname[i], brand);
 793        if (overflow++ == 0)
 794                printk(KERN_ERR
 795                       "%s: Table overflow. Some processor model information will be missing\n",
 796                       __func__);
 797        return "Unknown";
 798}
 799
 800static void
 801identify_cpu (struct cpuinfo_ia64 *c)
 802{
 803        union {
 804                unsigned long bits[5];
 805                struct {
 806                        /* id 0 & 1: */
 807                        char vendor[16];
 808
 809                        /* id 2 */
 810                        u64 ppn;                /* processor serial number */
 811
 812                        /* id 3: */
 813                        unsigned number         :  8;
 814                        unsigned revision       :  8;
 815                        unsigned model          :  8;
 816                        unsigned family         :  8;
 817                        unsigned archrev        :  8;
 818                        unsigned reserved       : 24;
 819
 820                        /* id 4: */
 821                        u64 features;
 822                } field;
 823        } cpuid;
 824        pal_vm_info_1_u_t vm1;
 825        pal_vm_info_2_u_t vm2;
 826        pal_status_t status;
 827        unsigned long impl_va_msb = 50, phys_addr_size = 44;    /* Itanium defaults */
 828        int i;
 829        for (i = 0; i < 5; ++i)
 830                cpuid.bits[i] = ia64_get_cpuid(i);
 831
 832        memcpy(c->vendor, cpuid.field.vendor, 16);
 833#ifdef CONFIG_SMP
 834        c->cpu = smp_processor_id();
 835
 836        /* below default values will be overwritten  by identify_siblings() 
 837         * for Multi-Threading/Multi-Core capable CPUs
 838         */
 839        c->threads_per_core = c->cores_per_socket = c->num_log = 1;
 840        c->socket_id = -1;
 841
 842        identify_siblings(c);
 843
 844        if (c->threads_per_core > smp_num_siblings)
 845                smp_num_siblings = c->threads_per_core;
 846#endif
 847        c->ppn = cpuid.field.ppn;
 848        c->number = cpuid.field.number;
 849        c->revision = cpuid.field.revision;
 850        c->model = cpuid.field.model;
 851        c->family = cpuid.field.family;
 852        c->archrev = cpuid.field.archrev;
 853        c->features = cpuid.field.features;
 854        c->model_name = get_model_name(c->family, c->model);
 855
 856        status = ia64_pal_vm_summary(&vm1, &vm2);
 857        if (status == PAL_STATUS_SUCCESS) {
 858                impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
 859                phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
 860        }
 861        c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
 862        c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
 863}
 864
 865/*
 866 * Do the following calculations:
 867 *
 868 * 1. the max. cache line size.
 869 * 2. the minimum of the i-cache stride sizes for "flush_icache_range()".
 870 * 3. the minimum of the cache stride sizes for "clflush_cache_range()".
 871 */
 872static void
 873get_cache_info(void)
 874{
 875        unsigned long line_size, max = 1;
 876        unsigned long l, levels, unique_caches;
 877        pal_cache_config_info_t cci;
 878        long status;
 879
 880        status = ia64_pal_cache_summary(&levels, &unique_caches);
 881        if (status != 0) {
 882                printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
 883                       __func__, status);
 884                max = SMP_CACHE_BYTES;
 885                /* Safest setup for "flush_icache_range()" */
 886                ia64_i_cache_stride_shift = I_CACHE_STRIDE_SHIFT;
 887                /* Safest setup for "clflush_cache_range()" */
 888                ia64_cache_stride_shift = CACHE_STRIDE_SHIFT;
 889                goto out;
 890        }
 891
 892        for (l = 0; l < levels; ++l) {
 893                /* cache_type (data_or_unified)=2 */
 894                status = ia64_pal_cache_config_info(l, 2, &cci);
 895                if (status != 0) {
 896                        printk(KERN_ERR "%s: ia64_pal_cache_config_info"
 897                                "(l=%lu, 2) failed (status=%ld)\n",
 898                                __func__, l, status);
 899                        max = SMP_CACHE_BYTES;
 900                        /* The safest setup for "flush_icache_range()" */
 901                        cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
 902                        /* The safest setup for "clflush_cache_range()" */
 903                        ia64_cache_stride_shift = CACHE_STRIDE_SHIFT;
 904                        cci.pcci_unified = 1;
 905                } else {
 906                        if (cci.pcci_stride < ia64_cache_stride_shift)
 907                                ia64_cache_stride_shift = cci.pcci_stride;
 908
 909                        line_size = 1 << cci.pcci_line_size;
 910                        if (line_size > max)
 911                                max = line_size;
 912                }
 913
 914                if (!cci.pcci_unified) {
 915                        /* cache_type (instruction)=1*/
 916                        status = ia64_pal_cache_config_info(l, 1, &cci);
 917                        if (status != 0) {
 918                                printk(KERN_ERR "%s: ia64_pal_cache_config_info"
 919                                        "(l=%lu, 1) failed (status=%ld)\n",
 920                                        __func__, l, status);
 921                                /* The safest setup for flush_icache_range() */
 922                                cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
 923                        }
 924                }
 925                if (cci.pcci_stride < ia64_i_cache_stride_shift)
 926                        ia64_i_cache_stride_shift = cci.pcci_stride;
 927        }
 928  out:
 929        if (max > ia64_max_cacheline_size)
 930                ia64_max_cacheline_size = max;
 931}
 932
 933/*
 934 * cpu_init() initializes state that is per-CPU.  This function acts
 935 * as a 'CPU state barrier', nothing should get across.
 936 */
 937void
 938cpu_init (void)
 939{
 940        extern void ia64_mmu_init(void *);
 941        static unsigned long max_num_phys_stacked = IA64_NUM_PHYS_STACK_REG;
 942        unsigned long num_phys_stacked;
 943        pal_vm_info_2_u_t vmi;
 944        unsigned int max_ctx;
 945        struct cpuinfo_ia64 *cpu_info;
 946        void *cpu_data;
 947
 948        cpu_data = per_cpu_init();
 949#ifdef CONFIG_SMP
 950        /*
 951         * insert boot cpu into sibling and core mapes
 952         * (must be done after per_cpu area is setup)
 953         */
 954        if (smp_processor_id() == 0) {
 955                cpumask_set_cpu(0, &per_cpu(cpu_sibling_map, 0));
 956                cpumask_set_cpu(0, &cpu_core_map[0]);
 957        } else {
 958                /*
 959                 * Set ar.k3 so that assembly code in MCA handler can compute
 960                 * physical addresses of per cpu variables with a simple:
 961                 *   phys = ar.k3 + &per_cpu_var
 962                 * and the alt-dtlb-miss handler can set per-cpu mapping into
 963                 * the TLB when needed. head.S already did this for cpu0.
 964                 */
 965                ia64_set_kr(IA64_KR_PER_CPU_DATA,
 966                            ia64_tpa(cpu_data) - (long) __per_cpu_start);
 967        }
 968#endif
 969
 970        get_cache_info();
 971
 972        /*
 973         * We can't pass "local_cpu_data" to identify_cpu() because we haven't called
 974         * ia64_mmu_init() yet.  And we can't call ia64_mmu_init() first because it
 975         * depends on the data returned by identify_cpu().  We break the dependency by
 976         * accessing cpu_data() through the canonical per-CPU address.
 977         */
 978        cpu_info = cpu_data + ((char *) &__ia64_per_cpu_var(ia64_cpu_info) - __per_cpu_start);
 979        identify_cpu(cpu_info);
 980
 981#ifdef CONFIG_MCKINLEY
 982        {
 983#               define FEATURE_SET 16
 984                struct ia64_pal_retval iprv;
 985
 986                if (cpu_info->family == 0x1f) {
 987                        PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, FEATURE_SET, 0);
 988                        if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80))
 989                                PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES,
 990                                              (iprv.v1 | 0x80), FEATURE_SET, 0);
 991                }
 992        }
 993#endif
 994
 995        /* Clear the stack memory reserved for pt_regs: */
 996        memset(task_pt_regs(current), 0, sizeof(struct pt_regs));
 997
 998        ia64_set_kr(IA64_KR_FPU_OWNER, 0);
 999
1000        /*
1001         * Initialize the page-table base register to a global
1002         * directory with all zeroes.  This ensure that we can handle
1003         * TLB-misses to user address-space even before we created the
1004         * first user address-space.  This may happen, e.g., due to
1005         * aggressive use of lfetch.fault.
1006         */
1007        ia64_set_kr(IA64_KR_PT_BASE, __pa(ia64_imva(empty_zero_page)));
1008
1009        /*
1010         * Initialize default control register to defer speculative faults except
1011         * for those arising from TLB misses, which are not deferred.  The
1012         * kernel MUST NOT depend on a particular setting of these bits (in other words,
1013         * the kernel must have recovery code for all speculative accesses).  Turn on
1014         * dcr.lc as per recommendation by the architecture team.  Most IA-32 apps
1015         * shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll
1016         * be fine).
1017         */
1018        ia64_setreg(_IA64_REG_CR_DCR,  (  IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
1019                                        | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
1020        mmgrab(&init_mm);
1021        current->active_mm = &init_mm;
1022        BUG_ON(current->mm);
1023
1024        ia64_mmu_init(ia64_imva(cpu_data));
1025        ia64_mca_cpu_init(ia64_imva(cpu_data));
1026
1027        /* Clear ITC to eliminate sched_clock() overflows in human time.  */
1028        ia64_set_itc(0);
1029
1030        /* disable all local interrupt sources: */
1031        ia64_set_itv(1 << 16);
1032        ia64_set_lrr0(1 << 16);
1033        ia64_set_lrr1(1 << 16);
1034        ia64_setreg(_IA64_REG_CR_PMV, 1 << 16);
1035        ia64_setreg(_IA64_REG_CR_CMCV, 1 << 16);
1036
1037        /* clear TPR & XTP to enable all interrupt classes: */
1038        ia64_setreg(_IA64_REG_CR_TPR, 0);
1039
1040        /* Clear any pending interrupts left by SAL/EFI */
1041        while (ia64_get_ivr() != IA64_SPURIOUS_INT_VECTOR)
1042                ia64_eoi();
1043
1044#ifdef CONFIG_SMP
1045        normal_xtp();
1046#endif
1047
1048        /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
1049        if (ia64_pal_vm_summary(NULL, &vmi) == 0) {
1050                max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
1051                setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, NPTCG_FROM_PAL);
1052        } else {
1053                printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
1054                max_ctx = (1U << 15) - 1;       /* use architected minimum */
1055        }
1056        while (max_ctx < ia64_ctx.max_ctx) {
1057                unsigned int old = ia64_ctx.max_ctx;
1058                if (cmpxchg(&ia64_ctx.max_ctx, old, max_ctx) == old)
1059                        break;
1060        }
1061
1062        if (ia64_pal_rse_info(&num_phys_stacked, NULL) != 0) {
1063                printk(KERN_WARNING "cpu_init: PAL RSE info failed; assuming 96 physical "
1064                       "stacked regs\n");
1065                num_phys_stacked = 96;
1066        }
1067        /* size of physical stacked register partition plus 8 bytes: */
1068        if (num_phys_stacked > max_num_phys_stacked) {
1069                ia64_patch_phys_stack_reg(num_phys_stacked*8 + 8);
1070                max_num_phys_stacked = num_phys_stacked;
1071        }
1072}
1073
1074void __init
1075check_bugs (void)
1076{
1077        ia64_patch_mckinley_e9((unsigned long) __start___mckinley_e9_bundles,
1078                               (unsigned long) __end___mckinley_e9_bundles);
1079}
1080
1081static int __init run_dmi_scan(void)
1082{
1083        dmi_setup();
1084        return 0;
1085}
1086core_initcall(run_dmi_scan);
1087
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