linux/arch/arm/mm/dma-mapping.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 *  linux/arch/arm/mm/dma-mapping.c
   4 *
   5 *  Copyright (C) 2000-2004 Russell King
   6 *
   7 *  DMA uncached mapping support.
   8 */
   9#include <linux/module.h>
  10#include <linux/mm.h>
  11#include <linux/genalloc.h>
  12#include <linux/gfp.h>
  13#include <linux/errno.h>
  14#include <linux/list.h>
  15#include <linux/init.h>
  16#include <linux/device.h>
  17#include <linux/dma-direct.h>
  18#include <linux/dma-map-ops.h>
  19#include <linux/highmem.h>
  20#include <linux/memblock.h>
  21#include <linux/slab.h>
  22#include <linux/iommu.h>
  23#include <linux/io.h>
  24#include <linux/vmalloc.h>
  25#include <linux/sizes.h>
  26#include <linux/cma.h>
  27
  28#include <asm/memory.h>
  29#include <asm/highmem.h>
  30#include <asm/cacheflush.h>
  31#include <asm/tlbflush.h>
  32#include <asm/mach/arch.h>
  33#include <asm/dma-iommu.h>
  34#include <asm/mach/map.h>
  35#include <asm/system_info.h>
  36#include <xen/swiotlb-xen.h>
  37
  38#include "dma.h"
  39#include "mm.h"
  40
  41struct arm_dma_alloc_args {
  42        struct device *dev;
  43        size_t size;
  44        gfp_t gfp;
  45        pgprot_t prot;
  46        const void *caller;
  47        bool want_vaddr;
  48        int coherent_flag;
  49};
  50
  51struct arm_dma_free_args {
  52        struct device *dev;
  53        size_t size;
  54        void *cpu_addr;
  55        struct page *page;
  56        bool want_vaddr;
  57};
  58
  59#define NORMAL      0
  60#define COHERENT    1
  61
  62struct arm_dma_allocator {
  63        void *(*alloc)(struct arm_dma_alloc_args *args,
  64                       struct page **ret_page);
  65        void (*free)(struct arm_dma_free_args *args);
  66};
  67
  68struct arm_dma_buffer {
  69        struct list_head list;
  70        void *virt;
  71        struct arm_dma_allocator *allocator;
  72};
  73
  74static LIST_HEAD(arm_dma_bufs);
  75static DEFINE_SPINLOCK(arm_dma_bufs_lock);
  76
  77static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
  78{
  79        struct arm_dma_buffer *buf, *found = NULL;
  80        unsigned long flags;
  81
  82        spin_lock_irqsave(&arm_dma_bufs_lock, flags);
  83        list_for_each_entry(buf, &arm_dma_bufs, list) {
  84                if (buf->virt == virt) {
  85                        list_del(&buf->list);
  86                        found = buf;
  87                        break;
  88                }
  89        }
  90        spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
  91        return found;
  92}
  93
  94/*
  95 * The DMA API is built upon the notion of "buffer ownership".  A buffer
  96 * is either exclusively owned by the CPU (and therefore may be accessed
  97 * by it) or exclusively owned by the DMA device.  These helper functions
  98 * represent the transitions between these two ownership states.
  99 *
 100 * Note, however, that on later ARMs, this notion does not work due to
 101 * speculative prefetches.  We model our approach on the assumption that
 102 * the CPU does do speculative prefetches, which means we clean caches
 103 * before transfers and delay cache invalidation until transfer completion.
 104 *
 105 */
 106static void __dma_page_cpu_to_dev(struct page *, unsigned long,
 107                size_t, enum dma_data_direction);
 108static void __dma_page_dev_to_cpu(struct page *, unsigned long,
 109                size_t, enum dma_data_direction);
 110
 111/**
 112 * arm_dma_map_page - map a portion of a page for streaming DMA
 113 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 114 * @page: page that buffer resides in
 115 * @offset: offset into page for start of buffer
 116 * @size: size of buffer to map
 117 * @dir: DMA transfer direction
 118 *
 119 * Ensure that any data held in the cache is appropriately discarded
 120 * or written back.
 121 *
 122 * The device owns this memory once this call has completed.  The CPU
 123 * can regain ownership by calling dma_unmap_page().
 124 */
 125static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
 126             unsigned long offset, size_t size, enum dma_data_direction dir,
 127             unsigned long attrs)
 128{
 129        if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 130                __dma_page_cpu_to_dev(page, offset, size, dir);
 131        return pfn_to_dma(dev, page_to_pfn(page)) + offset;
 132}
 133
 134static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
 135             unsigned long offset, size_t size, enum dma_data_direction dir,
 136             unsigned long attrs)
 137{
 138        return pfn_to_dma(dev, page_to_pfn(page)) + offset;
 139}
 140
 141/**
 142 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
 143 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 144 * @handle: DMA address of buffer
 145 * @size: size of buffer (same as passed to dma_map_page)
 146 * @dir: DMA transfer direction (same as passed to dma_map_page)
 147 *
 148 * Unmap a page streaming mode DMA translation.  The handle and size
 149 * must match what was provided in the previous dma_map_page() call.
 150 * All other usages are undefined.
 151 *
 152 * After this call, reads by the CPU to the buffer are guaranteed to see
 153 * whatever the device wrote there.
 154 */
 155static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
 156                size_t size, enum dma_data_direction dir, unsigned long attrs)
 157{
 158        if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 159                __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
 160                                      handle & ~PAGE_MASK, size, dir);
 161}
 162
 163static void arm_dma_sync_single_for_cpu(struct device *dev,
 164                dma_addr_t handle, size_t size, enum dma_data_direction dir)
 165{
 166        unsigned int offset = handle & (PAGE_SIZE - 1);
 167        struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
 168        __dma_page_dev_to_cpu(page, offset, size, dir);
 169}
 170
 171static void arm_dma_sync_single_for_device(struct device *dev,
 172                dma_addr_t handle, size_t size, enum dma_data_direction dir)
 173{
 174        unsigned int offset = handle & (PAGE_SIZE - 1);
 175        struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
 176        __dma_page_cpu_to_dev(page, offset, size, dir);
 177}
 178
 179/*
 180 * Return whether the given device DMA address mask can be supported
 181 * properly.  For example, if your device can only drive the low 24-bits
 182 * during bus mastering, then you would pass 0x00ffffff as the mask
 183 * to this function.
 184 */
 185static int arm_dma_supported(struct device *dev, u64 mask)
 186{
 187        unsigned long max_dma_pfn = min(max_pfn - 1, arm_dma_pfn_limit);
 188
 189        /*
 190         * Translate the device's DMA mask to a PFN limit.  This
 191         * PFN number includes the page which we can DMA to.
 192         */
 193        return dma_to_pfn(dev, mask) >= max_dma_pfn;
 194}
 195
 196const struct dma_map_ops arm_dma_ops = {
 197        .alloc                  = arm_dma_alloc,
 198        .free                   = arm_dma_free,
 199        .alloc_pages            = dma_direct_alloc_pages,
 200        .free_pages             = dma_direct_free_pages,
 201        .mmap                   = arm_dma_mmap,
 202        .get_sgtable            = arm_dma_get_sgtable,
 203        .map_page               = arm_dma_map_page,
 204        .unmap_page             = arm_dma_unmap_page,
 205        .map_sg                 = arm_dma_map_sg,
 206        .unmap_sg               = arm_dma_unmap_sg,
 207        .map_resource           = dma_direct_map_resource,
 208        .sync_single_for_cpu    = arm_dma_sync_single_for_cpu,
 209        .sync_single_for_device = arm_dma_sync_single_for_device,
 210        .sync_sg_for_cpu        = arm_dma_sync_sg_for_cpu,
 211        .sync_sg_for_device     = arm_dma_sync_sg_for_device,
 212        .dma_supported          = arm_dma_supported,
 213        .get_required_mask      = dma_direct_get_required_mask,
 214};
 215EXPORT_SYMBOL(arm_dma_ops);
 216
 217static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
 218        dma_addr_t *handle, gfp_t gfp, unsigned long attrs);
 219static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
 220                                  dma_addr_t handle, unsigned long attrs);
 221static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
 222                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 223                 unsigned long attrs);
 224
 225const struct dma_map_ops arm_coherent_dma_ops = {
 226        .alloc                  = arm_coherent_dma_alloc,
 227        .free                   = arm_coherent_dma_free,
 228        .alloc_pages            = dma_direct_alloc_pages,
 229        .free_pages             = dma_direct_free_pages,
 230        .mmap                   = arm_coherent_dma_mmap,
 231        .get_sgtable            = arm_dma_get_sgtable,
 232        .map_page               = arm_coherent_dma_map_page,
 233        .map_sg                 = arm_dma_map_sg,
 234        .map_resource           = dma_direct_map_resource,
 235        .dma_supported          = arm_dma_supported,
 236        .get_required_mask      = dma_direct_get_required_mask,
 237};
 238EXPORT_SYMBOL(arm_coherent_dma_ops);
 239
 240static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
 241{
 242        /*
 243         * Ensure that the allocated pages are zeroed, and that any data
 244         * lurking in the kernel direct-mapped region is invalidated.
 245         */
 246        if (PageHighMem(page)) {
 247                phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
 248                phys_addr_t end = base + size;
 249                while (size > 0) {
 250                        void *ptr = kmap_atomic(page);
 251                        memset(ptr, 0, PAGE_SIZE);
 252                        if (coherent_flag != COHERENT)
 253                                dmac_flush_range(ptr, ptr + PAGE_SIZE);
 254                        kunmap_atomic(ptr);
 255                        page++;
 256                        size -= PAGE_SIZE;
 257                }
 258                if (coherent_flag != COHERENT)
 259                        outer_flush_range(base, end);
 260        } else {
 261                void *ptr = page_address(page);
 262                memset(ptr, 0, size);
 263                if (coherent_flag != COHERENT) {
 264                        dmac_flush_range(ptr, ptr + size);
 265                        outer_flush_range(__pa(ptr), __pa(ptr) + size);
 266                }
 267        }
 268}
 269
 270/*
 271 * Allocate a DMA buffer for 'dev' of size 'size' using the
 272 * specified gfp mask.  Note that 'size' must be page aligned.
 273 */
 274static struct page *__dma_alloc_buffer(struct device *dev, size_t size,
 275                                       gfp_t gfp, int coherent_flag)
 276{
 277        unsigned long order = get_order(size);
 278        struct page *page, *p, *e;
 279
 280        page = alloc_pages(gfp, order);
 281        if (!page)
 282                return NULL;
 283
 284        /*
 285         * Now split the huge page and free the excess pages
 286         */
 287        split_page(page, order);
 288        for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
 289                __free_page(p);
 290
 291        __dma_clear_buffer(page, size, coherent_flag);
 292
 293        return page;
 294}
 295
 296/*
 297 * Free a DMA buffer.  'size' must be page aligned.
 298 */
 299static void __dma_free_buffer(struct page *page, size_t size)
 300{
 301        struct page *e = page + (size >> PAGE_SHIFT);
 302
 303        while (page < e) {
 304                __free_page(page);
 305                page++;
 306        }
 307}
 308
 309static void *__alloc_from_contiguous(struct device *dev, size_t size,
 310                                     pgprot_t prot, struct page **ret_page,
 311                                     const void *caller, bool want_vaddr,
 312                                     int coherent_flag, gfp_t gfp);
 313
 314static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
 315                                 pgprot_t prot, struct page **ret_page,
 316                                 const void *caller, bool want_vaddr);
 317
 318#define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_256K
 319static struct gen_pool *atomic_pool __ro_after_init;
 320
 321static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
 322
 323static int __init early_coherent_pool(char *p)
 324{
 325        atomic_pool_size = memparse(p, &p);
 326        return 0;
 327}
 328early_param("coherent_pool", early_coherent_pool);
 329
 330/*
 331 * Initialise the coherent pool for atomic allocations.
 332 */
 333static int __init atomic_pool_init(void)
 334{
 335        pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
 336        gfp_t gfp = GFP_KERNEL | GFP_DMA;
 337        struct page *page;
 338        void *ptr;
 339
 340        atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
 341        if (!atomic_pool)
 342                goto out;
 343        /*
 344         * The atomic pool is only used for non-coherent allocations
 345         * so we must pass NORMAL for coherent_flag.
 346         */
 347        if (dev_get_cma_area(NULL))
 348                ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
 349                                      &page, atomic_pool_init, true, NORMAL,
 350                                      GFP_KERNEL);
 351        else
 352                ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
 353                                           &page, atomic_pool_init, true);
 354        if (ptr) {
 355                int ret;
 356
 357                ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
 358                                        page_to_phys(page),
 359                                        atomic_pool_size, -1);
 360                if (ret)
 361                        goto destroy_genpool;
 362
 363                gen_pool_set_algo(atomic_pool,
 364                                gen_pool_first_fit_order_align,
 365                                NULL);
 366                pr_info("DMA: preallocated %zu KiB pool for atomic coherent allocations\n",
 367                       atomic_pool_size / 1024);
 368                return 0;
 369        }
 370
 371destroy_genpool:
 372        gen_pool_destroy(atomic_pool);
 373        atomic_pool = NULL;
 374out:
 375        pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
 376               atomic_pool_size / 1024);
 377        return -ENOMEM;
 378}
 379/*
 380 * CMA is activated by core_initcall, so we must be called after it.
 381 */
 382postcore_initcall(atomic_pool_init);
 383
 384struct dma_contig_early_reserve {
 385        phys_addr_t base;
 386        unsigned long size;
 387};
 388
 389static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
 390
 391static int dma_mmu_remap_num __initdata;
 392
 393void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
 394{
 395        dma_mmu_remap[dma_mmu_remap_num].base = base;
 396        dma_mmu_remap[dma_mmu_remap_num].size = size;
 397        dma_mmu_remap_num++;
 398}
 399
 400void __init dma_contiguous_remap(void)
 401{
 402        int i;
 403        for (i = 0; i < dma_mmu_remap_num; i++) {
 404                phys_addr_t start = dma_mmu_remap[i].base;
 405                phys_addr_t end = start + dma_mmu_remap[i].size;
 406                struct map_desc map;
 407                unsigned long addr;
 408
 409                if (end > arm_lowmem_limit)
 410                        end = arm_lowmem_limit;
 411                if (start >= end)
 412                        continue;
 413
 414                map.pfn = __phys_to_pfn(start);
 415                map.virtual = __phys_to_virt(start);
 416                map.length = end - start;
 417                map.type = MT_MEMORY_DMA_READY;
 418
 419                /*
 420                 * Clear previous low-memory mapping to ensure that the
 421                 * TLB does not see any conflicting entries, then flush
 422                 * the TLB of the old entries before creating new mappings.
 423                 *
 424                 * This ensures that any speculatively loaded TLB entries
 425                 * (even though they may be rare) can not cause any problems,
 426                 * and ensures that this code is architecturally compliant.
 427                 */
 428                for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
 429                     addr += PMD_SIZE)
 430                        pmd_clear(pmd_off_k(addr));
 431
 432                flush_tlb_kernel_range(__phys_to_virt(start),
 433                                       __phys_to_virt(end));
 434
 435                iotable_init(&map, 1);
 436        }
 437}
 438
 439static int __dma_update_pte(pte_t *pte, unsigned long addr, void *data)
 440{
 441        struct page *page = virt_to_page(addr);
 442        pgprot_t prot = *(pgprot_t *)data;
 443
 444        set_pte_ext(pte, mk_pte(page, prot), 0);
 445        return 0;
 446}
 447
 448static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
 449{
 450        unsigned long start = (unsigned long) page_address(page);
 451        unsigned end = start + size;
 452
 453        apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
 454        flush_tlb_kernel_range(start, end);
 455}
 456
 457static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
 458                                 pgprot_t prot, struct page **ret_page,
 459                                 const void *caller, bool want_vaddr)
 460{
 461        struct page *page;
 462        void *ptr = NULL;
 463        /*
 464         * __alloc_remap_buffer is only called when the device is
 465         * non-coherent
 466         */
 467        page = __dma_alloc_buffer(dev, size, gfp, NORMAL);
 468        if (!page)
 469                return NULL;
 470        if (!want_vaddr)
 471                goto out;
 472
 473        ptr = dma_common_contiguous_remap(page, size, prot, caller);
 474        if (!ptr) {
 475                __dma_free_buffer(page, size);
 476                return NULL;
 477        }
 478
 479 out:
 480        *ret_page = page;
 481        return ptr;
 482}
 483
 484static void *__alloc_from_pool(size_t size, struct page **ret_page)
 485{
 486        unsigned long val;
 487        void *ptr = NULL;
 488
 489        if (!atomic_pool) {
 490                WARN(1, "coherent pool not initialised!\n");
 491                return NULL;
 492        }
 493
 494        val = gen_pool_alloc(atomic_pool, size);
 495        if (val) {
 496                phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
 497
 498                *ret_page = phys_to_page(phys);
 499                ptr = (void *)val;
 500        }
 501
 502        return ptr;
 503}
 504
 505static bool __in_atomic_pool(void *start, size_t size)
 506{
 507        return gen_pool_has_addr(atomic_pool, (unsigned long)start, size);
 508}
 509
 510static int __free_from_pool(void *start, size_t size)
 511{
 512        if (!__in_atomic_pool(start, size))
 513                return 0;
 514
 515        gen_pool_free(atomic_pool, (unsigned long)start, size);
 516
 517        return 1;
 518}
 519
 520static void *__alloc_from_contiguous(struct device *dev, size_t size,
 521                                     pgprot_t prot, struct page **ret_page,
 522                                     const void *caller, bool want_vaddr,
 523                                     int coherent_flag, gfp_t gfp)
 524{
 525        unsigned long order = get_order(size);
 526        size_t count = size >> PAGE_SHIFT;
 527        struct page *page;
 528        void *ptr = NULL;
 529
 530        page = dma_alloc_from_contiguous(dev, count, order, gfp & __GFP_NOWARN);
 531        if (!page)
 532                return NULL;
 533
 534        __dma_clear_buffer(page, size, coherent_flag);
 535
 536        if (!want_vaddr)
 537                goto out;
 538
 539        if (PageHighMem(page)) {
 540                ptr = dma_common_contiguous_remap(page, size, prot, caller);
 541                if (!ptr) {
 542                        dma_release_from_contiguous(dev, page, count);
 543                        return NULL;
 544                }
 545        } else {
 546                __dma_remap(page, size, prot);
 547                ptr = page_address(page);
 548        }
 549
 550 out:
 551        *ret_page = page;
 552        return ptr;
 553}
 554
 555static void __free_from_contiguous(struct device *dev, struct page *page,
 556                                   void *cpu_addr, size_t size, bool want_vaddr)
 557{
 558        if (want_vaddr) {
 559                if (PageHighMem(page))
 560                        dma_common_free_remap(cpu_addr, size);
 561                else
 562                        __dma_remap(page, size, PAGE_KERNEL);
 563        }
 564        dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
 565}
 566
 567static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
 568{
 569        prot = (attrs & DMA_ATTR_WRITE_COMBINE) ?
 570                        pgprot_writecombine(prot) :
 571                        pgprot_dmacoherent(prot);
 572        return prot;
 573}
 574
 575static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
 576                                   struct page **ret_page)
 577{
 578        struct page *page;
 579        /* __alloc_simple_buffer is only called when the device is coherent */
 580        page = __dma_alloc_buffer(dev, size, gfp, COHERENT);
 581        if (!page)
 582                return NULL;
 583
 584        *ret_page = page;
 585        return page_address(page);
 586}
 587
 588static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
 589                                    struct page **ret_page)
 590{
 591        return __alloc_simple_buffer(args->dev, args->size, args->gfp,
 592                                     ret_page);
 593}
 594
 595static void simple_allocator_free(struct arm_dma_free_args *args)
 596{
 597        __dma_free_buffer(args->page, args->size);
 598}
 599
 600static struct arm_dma_allocator simple_allocator = {
 601        .alloc = simple_allocator_alloc,
 602        .free = simple_allocator_free,
 603};
 604
 605static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
 606                                 struct page **ret_page)
 607{
 608        return __alloc_from_contiguous(args->dev, args->size, args->prot,
 609                                       ret_page, args->caller,
 610                                       args->want_vaddr, args->coherent_flag,
 611                                       args->gfp);
 612}
 613
 614static void cma_allocator_free(struct arm_dma_free_args *args)
 615{
 616        __free_from_contiguous(args->dev, args->page, args->cpu_addr,
 617                               args->size, args->want_vaddr);
 618}
 619
 620static struct arm_dma_allocator cma_allocator = {
 621        .alloc = cma_allocator_alloc,
 622        .free = cma_allocator_free,
 623};
 624
 625static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
 626                                  struct page **ret_page)
 627{
 628        return __alloc_from_pool(args->size, ret_page);
 629}
 630
 631static void pool_allocator_free(struct arm_dma_free_args *args)
 632{
 633        __free_from_pool(args->cpu_addr, args->size);
 634}
 635
 636static struct arm_dma_allocator pool_allocator = {
 637        .alloc = pool_allocator_alloc,
 638        .free = pool_allocator_free,
 639};
 640
 641static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
 642                                   struct page **ret_page)
 643{
 644        return __alloc_remap_buffer(args->dev, args->size, args->gfp,
 645                                    args->prot, ret_page, args->caller,
 646                                    args->want_vaddr);
 647}
 648
 649static void remap_allocator_free(struct arm_dma_free_args *args)
 650{
 651        if (args->want_vaddr)
 652                dma_common_free_remap(args->cpu_addr, args->size);
 653
 654        __dma_free_buffer(args->page, args->size);
 655}
 656
 657static struct arm_dma_allocator remap_allocator = {
 658        .alloc = remap_allocator_alloc,
 659        .free = remap_allocator_free,
 660};
 661
 662static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
 663                         gfp_t gfp, pgprot_t prot, bool is_coherent,
 664                         unsigned long attrs, const void *caller)
 665{
 666        u64 mask = min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit);
 667        struct page *page = NULL;
 668        void *addr;
 669        bool allowblock, cma;
 670        struct arm_dma_buffer *buf;
 671        struct arm_dma_alloc_args args = {
 672                .dev = dev,
 673                .size = PAGE_ALIGN(size),
 674                .gfp = gfp,
 675                .prot = prot,
 676                .caller = caller,
 677                .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
 678                .coherent_flag = is_coherent ? COHERENT : NORMAL,
 679        };
 680
 681#ifdef CONFIG_DMA_API_DEBUG
 682        u64 limit = (mask + 1) & ~mask;
 683        if (limit && size >= limit) {
 684                dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
 685                        size, mask);
 686                return NULL;
 687        }
 688#endif
 689
 690        buf = kzalloc(sizeof(*buf),
 691                      gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
 692        if (!buf)
 693                return NULL;
 694
 695        if (mask < 0xffffffffULL)
 696                gfp |= GFP_DMA;
 697
 698        /*
 699         * Following is a work-around (a.k.a. hack) to prevent pages
 700         * with __GFP_COMP being passed to split_page() which cannot
 701         * handle them.  The real problem is that this flag probably
 702         * should be 0 on ARM as it is not supported on this
 703         * platform; see CONFIG_HUGETLBFS.
 704         */
 705        gfp &= ~(__GFP_COMP);
 706        args.gfp = gfp;
 707
 708        *handle = DMA_MAPPING_ERROR;
 709        allowblock = gfpflags_allow_blocking(gfp);
 710        cma = allowblock ? dev_get_cma_area(dev) : false;
 711
 712        if (cma)
 713                buf->allocator = &cma_allocator;
 714        else if (is_coherent)
 715                buf->allocator = &simple_allocator;
 716        else if (allowblock)
 717                buf->allocator = &remap_allocator;
 718        else
 719                buf->allocator = &pool_allocator;
 720
 721        addr = buf->allocator->alloc(&args, &page);
 722
 723        if (page) {
 724                unsigned long flags;
 725
 726                *handle = pfn_to_dma(dev, page_to_pfn(page));
 727                buf->virt = args.want_vaddr ? addr : page;
 728
 729                spin_lock_irqsave(&arm_dma_bufs_lock, flags);
 730                list_add(&buf->list, &arm_dma_bufs);
 731                spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
 732        } else {
 733                kfree(buf);
 734        }
 735
 736        return args.want_vaddr ? addr : page;
 737}
 738
 739/*
 740 * Allocate DMA-coherent memory space and return both the kernel remapped
 741 * virtual and bus address for that space.
 742 */
 743void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
 744                    gfp_t gfp, unsigned long attrs)
 745{
 746        pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
 747
 748        return __dma_alloc(dev, size, handle, gfp, prot, false,
 749                           attrs, __builtin_return_address(0));
 750}
 751
 752static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
 753        dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
 754{
 755        return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
 756                           attrs, __builtin_return_address(0));
 757}
 758
 759static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
 760                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 761                 unsigned long attrs)
 762{
 763        int ret = -ENXIO;
 764        unsigned long nr_vma_pages = vma_pages(vma);
 765        unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
 766        unsigned long pfn = dma_to_pfn(dev, dma_addr);
 767        unsigned long off = vma->vm_pgoff;
 768
 769        if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
 770                return ret;
 771
 772        if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
 773                ret = remap_pfn_range(vma, vma->vm_start,
 774                                      pfn + off,
 775                                      vma->vm_end - vma->vm_start,
 776                                      vma->vm_page_prot);
 777        }
 778
 779        return ret;
 780}
 781
 782/*
 783 * Create userspace mapping for the DMA-coherent memory.
 784 */
 785static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
 786                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 787                 unsigned long attrs)
 788{
 789        return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
 790}
 791
 792int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
 793                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 794                 unsigned long attrs)
 795{
 796        vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
 797        return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
 798}
 799
 800/*
 801 * Free a buffer as defined by the above mapping.
 802 */
 803static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
 804                           dma_addr_t handle, unsigned long attrs,
 805                           bool is_coherent)
 806{
 807        struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
 808        struct arm_dma_buffer *buf;
 809        struct arm_dma_free_args args = {
 810                .dev = dev,
 811                .size = PAGE_ALIGN(size),
 812                .cpu_addr = cpu_addr,
 813                .page = page,
 814                .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
 815        };
 816
 817        buf = arm_dma_buffer_find(cpu_addr);
 818        if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
 819                return;
 820
 821        buf->allocator->free(&args);
 822        kfree(buf);
 823}
 824
 825void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
 826                  dma_addr_t handle, unsigned long attrs)
 827{
 828        __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
 829}
 830
 831static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
 832                                  dma_addr_t handle, unsigned long attrs)
 833{
 834        __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
 835}
 836
 837int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
 838                 void *cpu_addr, dma_addr_t handle, size_t size,
 839                 unsigned long attrs)
 840{
 841        unsigned long pfn = dma_to_pfn(dev, handle);
 842        struct page *page;
 843        int ret;
 844
 845        /* If the PFN is not valid, we do not have a struct page */
 846        if (!pfn_valid(pfn))
 847                return -ENXIO;
 848
 849        page = pfn_to_page(pfn);
 850
 851        ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
 852        if (unlikely(ret))
 853                return ret;
 854
 855        sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
 856        return 0;
 857}
 858
 859static void dma_cache_maint_page(struct page *page, unsigned long offset,
 860        size_t size, enum dma_data_direction dir,
 861        void (*op)(const void *, size_t, int))
 862{
 863        unsigned long pfn;
 864        size_t left = size;
 865
 866        pfn = page_to_pfn(page) + offset / PAGE_SIZE;
 867        offset %= PAGE_SIZE;
 868
 869        /*
 870         * A single sg entry may refer to multiple physically contiguous
 871         * pages.  But we still need to process highmem pages individually.
 872         * If highmem is not configured then the bulk of this loop gets
 873         * optimized out.
 874         */
 875        do {
 876                size_t len = left;
 877                void *vaddr;
 878
 879                page = pfn_to_page(pfn);
 880
 881                if (PageHighMem(page)) {
 882                        if (len + offset > PAGE_SIZE)
 883                                len = PAGE_SIZE - offset;
 884
 885                        if (cache_is_vipt_nonaliasing()) {
 886                                vaddr = kmap_atomic(page);
 887                                op(vaddr + offset, len, dir);
 888                                kunmap_atomic(vaddr);
 889                        } else {
 890                                vaddr = kmap_high_get(page);
 891                                if (vaddr) {
 892                                        op(vaddr + offset, len, dir);
 893                                        kunmap_high(page);
 894                                }
 895                        }
 896                } else {
 897                        vaddr = page_address(page) + offset;
 898                        op(vaddr, len, dir);
 899                }
 900                offset = 0;
 901                pfn++;
 902                left -= len;
 903        } while (left);
 904}
 905
 906/*
 907 * Make an area consistent for devices.
 908 * Note: Drivers should NOT use this function directly, as it will break
 909 * platforms with CONFIG_DMABOUNCE.
 910 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
 911 */
 912static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
 913        size_t size, enum dma_data_direction dir)
 914{
 915        phys_addr_t paddr;
 916
 917        dma_cache_maint_page(page, off, size, dir, dmac_map_area);
 918
 919        paddr = page_to_phys(page) + off;
 920        if (dir == DMA_FROM_DEVICE) {
 921                outer_inv_range(paddr, paddr + size);
 922        } else {
 923                outer_clean_range(paddr, paddr + size);
 924        }
 925        /* FIXME: non-speculating: flush on bidirectional mappings? */
 926}
 927
 928static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
 929        size_t size, enum dma_data_direction dir)
 930{
 931        phys_addr_t paddr = page_to_phys(page) + off;
 932
 933        /* FIXME: non-speculating: not required */
 934        /* in any case, don't bother invalidating if DMA to device */
 935        if (dir != DMA_TO_DEVICE) {
 936                outer_inv_range(paddr, paddr + size);
 937
 938                dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
 939        }
 940
 941        /*
 942         * Mark the D-cache clean for these pages to avoid extra flushing.
 943         */
 944        if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
 945                unsigned long pfn;
 946                size_t left = size;
 947
 948                pfn = page_to_pfn(page) + off / PAGE_SIZE;
 949                off %= PAGE_SIZE;
 950                if (off) {
 951                        pfn++;
 952                        left -= PAGE_SIZE - off;
 953                }
 954                while (left >= PAGE_SIZE) {
 955                        page = pfn_to_page(pfn++);
 956                        set_bit(PG_dcache_clean, &page->flags);
 957                        left -= PAGE_SIZE;
 958                }
 959        }
 960}
 961
 962/**
 963 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
 964 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 965 * @sg: list of buffers
 966 * @nents: number of buffers to map
 967 * @dir: DMA transfer direction
 968 *
 969 * Map a set of buffers described by scatterlist in streaming mode for DMA.
 970 * This is the scatter-gather version of the dma_map_single interface.
 971 * Here the scatter gather list elements are each tagged with the
 972 * appropriate dma address and length.  They are obtained via
 973 * sg_dma_{address,length}.
 974 *
 975 * Device ownership issues as mentioned for dma_map_single are the same
 976 * here.
 977 */
 978int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 979                enum dma_data_direction dir, unsigned long attrs)
 980{
 981        const struct dma_map_ops *ops = get_dma_ops(dev);
 982        struct scatterlist *s;
 983        int i, j;
 984
 985        for_each_sg(sg, s, nents, i) {
 986#ifdef CONFIG_NEED_SG_DMA_LENGTH
 987                s->dma_length = s->length;
 988#endif
 989                s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
 990                                                s->length, dir, attrs);
 991                if (dma_mapping_error(dev, s->dma_address))
 992                        goto bad_mapping;
 993        }
 994        return nents;
 995
 996 bad_mapping:
 997        for_each_sg(sg, s, i, j)
 998                ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
 999        return 0;
1000}
1001
1002/**
1003 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1004 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1005 * @sg: list of buffers
1006 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1007 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1008 *
1009 * Unmap a set of streaming mode DMA translations.  Again, CPU access
1010 * rules concerning calls here are the same as for dma_unmap_single().
1011 */
1012void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1013                enum dma_data_direction dir, unsigned long attrs)
1014{
1015        const struct dma_map_ops *ops = get_dma_ops(dev);
1016        struct scatterlist *s;
1017
1018        int i;
1019
1020        for_each_sg(sg, s, nents, i)
1021                ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1022}
1023
1024/**
1025 * arm_dma_sync_sg_for_cpu
1026 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1027 * @sg: list of buffers
1028 * @nents: number of buffers to map (returned from dma_map_sg)
1029 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1030 */
1031void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1032                        int nents, enum dma_data_direction dir)
1033{
1034        const struct dma_map_ops *ops = get_dma_ops(dev);
1035        struct scatterlist *s;
1036        int i;
1037
1038        for_each_sg(sg, s, nents, i)
1039                ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
1040                                         dir);
1041}
1042
1043/**
1044 * arm_dma_sync_sg_for_device
1045 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1046 * @sg: list of buffers
1047 * @nents: number of buffers to map (returned from dma_map_sg)
1048 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1049 */
1050void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1051                        int nents, enum dma_data_direction dir)
1052{
1053        const struct dma_map_ops *ops = get_dma_ops(dev);
1054        struct scatterlist *s;
1055        int i;
1056
1057        for_each_sg(sg, s, nents, i)
1058                ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1059                                            dir);
1060}
1061
1062static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
1063{
1064        /*
1065         * When CONFIG_ARM_LPAE is set, physical address can extend above
1066         * 32-bits, which then can't be addressed by devices that only support
1067         * 32-bit DMA.
1068         * Use the generic dma-direct / swiotlb ops code in that case, as that
1069         * handles bounce buffering for us.
1070         */
1071        if (IS_ENABLED(CONFIG_ARM_LPAE))
1072                return NULL;
1073        return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
1074}
1075
1076#ifdef CONFIG_ARM_DMA_USE_IOMMU
1077
1078static int __dma_info_to_prot(enum dma_data_direction dir, unsigned long attrs)
1079{
1080        int prot = 0;
1081
1082        if (attrs & DMA_ATTR_PRIVILEGED)
1083                prot |= IOMMU_PRIV;
1084
1085        switch (dir) {
1086        case DMA_BIDIRECTIONAL:
1087                return prot | IOMMU_READ | IOMMU_WRITE;
1088        case DMA_TO_DEVICE:
1089                return prot | IOMMU_READ;
1090        case DMA_FROM_DEVICE:
1091                return prot | IOMMU_WRITE;
1092        default:
1093                return prot;
1094        }
1095}
1096
1097/* IOMMU */
1098
1099static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
1100
1101static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1102                                      size_t size)
1103{
1104        unsigned int order = get_order(size);
1105        unsigned int align = 0;
1106        unsigned int count, start;
1107        size_t mapping_size = mapping->bits << PAGE_SHIFT;
1108        unsigned long flags;
1109        dma_addr_t iova;
1110        int i;
1111
1112        if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1113                order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1114
1115        count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1116        align = (1 << order) - 1;
1117
1118        spin_lock_irqsave(&mapping->lock, flags);
1119        for (i = 0; i < mapping->nr_bitmaps; i++) {
1120                start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1121                                mapping->bits, 0, count, align);
1122
1123                if (start > mapping->bits)
1124                        continue;
1125
1126                bitmap_set(mapping->bitmaps[i], start, count);
1127                break;
1128        }
1129
1130        /*
1131         * No unused range found. Try to extend the existing mapping
1132         * and perform a second attempt to reserve an IO virtual
1133         * address range of size bytes.
1134         */
1135        if (i == mapping->nr_bitmaps) {
1136                if (extend_iommu_mapping(mapping)) {
1137                        spin_unlock_irqrestore(&mapping->lock, flags);
1138                        return DMA_MAPPING_ERROR;
1139                }
1140
1141                start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1142                                mapping->bits, 0, count, align);
1143
1144                if (start > mapping->bits) {
1145                        spin_unlock_irqrestore(&mapping->lock, flags);
1146                        return DMA_MAPPING_ERROR;
1147                }
1148
1149                bitmap_set(mapping->bitmaps[i], start, count);
1150        }
1151        spin_unlock_irqrestore(&mapping->lock, flags);
1152
1153        iova = mapping->base + (mapping_size * i);
1154        iova += start << PAGE_SHIFT;
1155
1156        return iova;
1157}
1158
1159static inline void __free_iova(struct dma_iommu_mapping *mapping,
1160                               dma_addr_t addr, size_t size)
1161{
1162        unsigned int start, count;
1163        size_t mapping_size = mapping->bits << PAGE_SHIFT;
1164        unsigned long flags;
1165        dma_addr_t bitmap_base;
1166        u32 bitmap_index;
1167
1168        if (!size)
1169                return;
1170
1171        bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1172        BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
1173
1174        bitmap_base = mapping->base + mapping_size * bitmap_index;
1175
1176        start = (addr - bitmap_base) >> PAGE_SHIFT;
1177
1178        if (addr + size > bitmap_base + mapping_size) {
1179                /*
1180                 * The address range to be freed reaches into the iova
1181                 * range of the next bitmap. This should not happen as
1182                 * we don't allow this in __alloc_iova (at the
1183                 * moment).
1184                 */
1185                BUG();
1186        } else
1187                count = size >> PAGE_SHIFT;
1188
1189        spin_lock_irqsave(&mapping->lock, flags);
1190        bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1191        spin_unlock_irqrestore(&mapping->lock, flags);
1192}
1193
1194/* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
1195static const int iommu_order_array[] = { 9, 8, 4, 0 };
1196
1197static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1198                                          gfp_t gfp, unsigned long attrs,
1199                                          int coherent_flag)
1200{
1201        struct page **pages;
1202        int count = size >> PAGE_SHIFT;
1203        int array_size = count * sizeof(struct page *);
1204        int i = 0;
1205        int order_idx = 0;
1206
1207        if (array_size <= PAGE_SIZE)
1208                pages = kzalloc(array_size, GFP_KERNEL);
1209        else
1210                pages = vzalloc(array_size);
1211        if (!pages)
1212                return NULL;
1213
1214        if (attrs & DMA_ATTR_FORCE_CONTIGUOUS)
1215        {
1216                unsigned long order = get_order(size);
1217                struct page *page;
1218
1219                page = dma_alloc_from_contiguous(dev, count, order,
1220                                                 gfp & __GFP_NOWARN);
1221                if (!page)
1222                        goto error;
1223
1224                __dma_clear_buffer(page, size, coherent_flag);
1225
1226                for (i = 0; i < count; i++)
1227                        pages[i] = page + i;
1228
1229                return pages;
1230        }
1231
1232        /* Go straight to 4K chunks if caller says it's OK. */
1233        if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
1234                order_idx = ARRAY_SIZE(iommu_order_array) - 1;
1235
1236        /*
1237         * IOMMU can map any pages, so himem can also be used here
1238         */
1239        gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1240
1241        while (count) {
1242                int j, order;
1243
1244                order = iommu_order_array[order_idx];
1245
1246                /* Drop down when we get small */
1247                if (__fls(count) < order) {
1248                        order_idx++;
1249                        continue;
1250                }
1251
1252                if (order) {
1253                        /* See if it's easy to allocate a high-order chunk */
1254                        pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
1255
1256                        /* Go down a notch at first sign of pressure */
1257                        if (!pages[i]) {
1258                                order_idx++;
1259                                continue;
1260                        }
1261                } else {
1262                        pages[i] = alloc_pages(gfp, 0);
1263                        if (!pages[i])
1264                                goto error;
1265                }
1266
1267                if (order) {
1268                        split_page(pages[i], order);
1269                        j = 1 << order;
1270                        while (--j)
1271                                pages[i + j] = pages[i] + j;
1272                }
1273
1274                __dma_clear_buffer(pages[i], PAGE_SIZE << order, coherent_flag);
1275                i += 1 << order;
1276                count -= 1 << order;
1277        }
1278
1279        return pages;
1280error:
1281        while (i--)
1282                if (pages[i])
1283                        __free_pages(pages[i], 0);
1284        kvfree(pages);
1285        return NULL;
1286}
1287
1288static int __iommu_free_buffer(struct device *dev, struct page **pages,
1289                               size_t size, unsigned long attrs)
1290{
1291        int count = size >> PAGE_SHIFT;
1292        int i;
1293
1294        if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
1295                dma_release_from_contiguous(dev, pages[0], count);
1296        } else {
1297                for (i = 0; i < count; i++)
1298                        if (pages[i])
1299                                __free_pages(pages[i], 0);
1300        }
1301
1302        kvfree(pages);
1303        return 0;
1304}
1305
1306/*
1307 * Create a mapping in device IO address space for specified pages
1308 */
1309static dma_addr_t
1310__iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
1311                       unsigned long attrs)
1312{
1313        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1314        unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1315        dma_addr_t dma_addr, iova;
1316        int i;
1317
1318        dma_addr = __alloc_iova(mapping, size);
1319        if (dma_addr == DMA_MAPPING_ERROR)
1320                return dma_addr;
1321
1322        iova = dma_addr;
1323        for (i = 0; i < count; ) {
1324                int ret;
1325
1326                unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1327                phys_addr_t phys = page_to_phys(pages[i]);
1328                unsigned int len, j;
1329
1330                for (j = i + 1; j < count; j++, next_pfn++)
1331                        if (page_to_pfn(pages[j]) != next_pfn)
1332                                break;
1333
1334                len = (j - i) << PAGE_SHIFT;
1335                ret = iommu_map(mapping->domain, iova, phys, len,
1336                                __dma_info_to_prot(DMA_BIDIRECTIONAL, attrs));
1337                if (ret < 0)
1338                        goto fail;
1339                iova += len;
1340                i = j;
1341        }
1342        return dma_addr;
1343fail:
1344        iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1345        __free_iova(mapping, dma_addr, size);
1346        return DMA_MAPPING_ERROR;
1347}
1348
1349static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1350{
1351        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1352
1353        /*
1354         * add optional in-page offset from iova to size and align
1355         * result to page size
1356         */
1357        size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1358        iova &= PAGE_MASK;
1359
1360        iommu_unmap(mapping->domain, iova, size);
1361        __free_iova(mapping, iova, size);
1362        return 0;
1363}
1364
1365static struct page **__atomic_get_pages(void *addr)
1366{
1367        struct page *page;
1368        phys_addr_t phys;
1369
1370        phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1371        page = phys_to_page(phys);
1372
1373        return (struct page **)page;
1374}
1375
1376static struct page **__iommu_get_pages(void *cpu_addr, unsigned long attrs)
1377{
1378        if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1379                return __atomic_get_pages(cpu_addr);
1380
1381        if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1382                return cpu_addr;
1383
1384        return dma_common_find_pages(cpu_addr);
1385}
1386
1387static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
1388                                  dma_addr_t *handle, int coherent_flag,
1389                                  unsigned long attrs)
1390{
1391        struct page *page;
1392        void *addr;
1393
1394        if (coherent_flag  == COHERENT)
1395                addr = __alloc_simple_buffer(dev, size, gfp, &page);
1396        else
1397                addr = __alloc_from_pool(size, &page);
1398        if (!addr)
1399                return NULL;
1400
1401        *handle = __iommu_create_mapping(dev, &page, size, attrs);
1402        if (*handle == DMA_MAPPING_ERROR)
1403                goto err_mapping;
1404
1405        return addr;
1406
1407err_mapping:
1408        __free_from_pool(addr, size);
1409        return NULL;
1410}
1411
1412static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1413                        dma_addr_t handle, size_t size, int coherent_flag)
1414{
1415        __iommu_remove_mapping(dev, handle, size);
1416        if (coherent_flag == COHERENT)
1417                __dma_free_buffer(virt_to_page(cpu_addr), size);
1418        else
1419                __free_from_pool(cpu_addr, size);
1420}
1421
1422static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
1423            dma_addr_t *handle, gfp_t gfp, unsigned long attrs,
1424            int coherent_flag)
1425{
1426        pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1427        struct page **pages;
1428        void *addr = NULL;
1429
1430        *handle = DMA_MAPPING_ERROR;
1431        size = PAGE_ALIGN(size);
1432
1433        if (coherent_flag  == COHERENT || !gfpflags_allow_blocking(gfp))
1434                return __iommu_alloc_simple(dev, size, gfp, handle,
1435                                            coherent_flag, attrs);
1436
1437        /*
1438         * Following is a work-around (a.k.a. hack) to prevent pages
1439         * with __GFP_COMP being passed to split_page() which cannot
1440         * handle them.  The real problem is that this flag probably
1441         * should be 0 on ARM as it is not supported on this
1442         * platform; see CONFIG_HUGETLBFS.
1443         */
1444        gfp &= ~(__GFP_COMP);
1445
1446        pages = __iommu_alloc_buffer(dev, size, gfp, attrs, coherent_flag);
1447        if (!pages)
1448                return NULL;
1449
1450        *handle = __iommu_create_mapping(dev, pages, size, attrs);
1451        if (*handle == DMA_MAPPING_ERROR)
1452                goto err_buffer;
1453
1454        if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1455                return pages;
1456
1457        addr = dma_common_pages_remap(pages, size, prot,
1458                                   __builtin_return_address(0));
1459        if (!addr)
1460                goto err_mapping;
1461
1462        return addr;
1463
1464err_mapping:
1465        __iommu_remove_mapping(dev, *handle, size);
1466err_buffer:
1467        __iommu_free_buffer(dev, pages, size, attrs);
1468        return NULL;
1469}
1470
1471static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1472            dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1473{
1474        return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, NORMAL);
1475}
1476
1477static void *arm_coherent_iommu_alloc_attrs(struct device *dev, size_t size,
1478                    dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1479{
1480        return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, COHERENT);
1481}
1482
1483static int __arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1484                    void *cpu_addr, dma_addr_t dma_addr, size_t size,
1485                    unsigned long attrs)
1486{
1487        struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1488        unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1489        int err;
1490
1491        if (!pages)
1492                return -ENXIO;
1493
1494        if (vma->vm_pgoff >= nr_pages)
1495                return -ENXIO;
1496
1497        err = vm_map_pages(vma, pages, nr_pages);
1498        if (err)
1499                pr_err("Remapping memory failed: %d\n", err);
1500
1501        return err;
1502}
1503static int arm_iommu_mmap_attrs(struct device *dev,
1504                struct vm_area_struct *vma, void *cpu_addr,
1505                dma_addr_t dma_addr, size_t size, unsigned long attrs)
1506{
1507        vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1508
1509        return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1510}
1511
1512static int arm_coherent_iommu_mmap_attrs(struct device *dev,
1513                struct vm_area_struct *vma, void *cpu_addr,
1514                dma_addr_t dma_addr, size_t size, unsigned long attrs)
1515{
1516        return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1517}
1518
1519/*
1520 * free a page as defined by the above mapping.
1521 * Must not be called with IRQs disabled.
1522 */
1523static void __arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1524        dma_addr_t handle, unsigned long attrs, int coherent_flag)
1525{
1526        struct page **pages;
1527        size = PAGE_ALIGN(size);
1528
1529        if (coherent_flag == COHERENT || __in_atomic_pool(cpu_addr, size)) {
1530                __iommu_free_atomic(dev, cpu_addr, handle, size, coherent_flag);
1531                return;
1532        }
1533
1534        pages = __iommu_get_pages(cpu_addr, attrs);
1535        if (!pages) {
1536                WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1537                return;
1538        }
1539
1540        if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0)
1541                dma_common_free_remap(cpu_addr, size);
1542
1543        __iommu_remove_mapping(dev, handle, size);
1544        __iommu_free_buffer(dev, pages, size, attrs);
1545}
1546
1547static void arm_iommu_free_attrs(struct device *dev, size_t size,
1548                                 void *cpu_addr, dma_addr_t handle,
1549                                 unsigned long attrs)
1550{
1551        __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, NORMAL);
1552}
1553
1554static void arm_coherent_iommu_free_attrs(struct device *dev, size_t size,
1555                    void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1556{
1557        __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, COHERENT);
1558}
1559
1560static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1561                                 void *cpu_addr, dma_addr_t dma_addr,
1562                                 size_t size, unsigned long attrs)
1563{
1564        unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1565        struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1566
1567        if (!pages)
1568                return -ENXIO;
1569
1570        return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1571                                         GFP_KERNEL);
1572}
1573
1574/*
1575 * Map a part of the scatter-gather list into contiguous io address space
1576 */
1577static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1578                          size_t size, dma_addr_t *handle,
1579                          enum dma_data_direction dir, unsigned long attrs,
1580                          bool is_coherent)
1581{
1582        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1583        dma_addr_t iova, iova_base;
1584        int ret = 0;
1585        unsigned int count;
1586        struct scatterlist *s;
1587        int prot;
1588
1589        size = PAGE_ALIGN(size);
1590        *handle = DMA_MAPPING_ERROR;
1591
1592        iova_base = iova = __alloc_iova(mapping, size);
1593        if (iova == DMA_MAPPING_ERROR)
1594                return -ENOMEM;
1595
1596        for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1597                phys_addr_t phys = page_to_phys(sg_page(s));
1598                unsigned int len = PAGE_ALIGN(s->offset + s->length);
1599
1600                if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1601                        __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1602
1603                prot = __dma_info_to_prot(dir, attrs);
1604
1605                ret = iommu_map(mapping->domain, iova, phys, len, prot);
1606                if (ret < 0)
1607                        goto fail;
1608                count += len >> PAGE_SHIFT;
1609                iova += len;
1610        }
1611        *handle = iova_base;
1612
1613        return 0;
1614fail:
1615        iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1616        __free_iova(mapping, iova_base, size);
1617        return ret;
1618}
1619
1620static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1621                     enum dma_data_direction dir, unsigned long attrs,
1622                     bool is_coherent)
1623{
1624        struct scatterlist *s = sg, *dma = sg, *start = sg;
1625        int i, count = 0;
1626        unsigned int offset = s->offset;
1627        unsigned int size = s->offset + s->length;
1628        unsigned int max = dma_get_max_seg_size(dev);
1629
1630        for (i = 1; i < nents; i++) {
1631                s = sg_next(s);
1632
1633                s->dma_address = DMA_MAPPING_ERROR;
1634                s->dma_length = 0;
1635
1636                if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1637                        if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1638                            dir, attrs, is_coherent) < 0)
1639                                goto bad_mapping;
1640
1641                        dma->dma_address += offset;
1642                        dma->dma_length = size - offset;
1643
1644                        size = offset = s->offset;
1645                        start = s;
1646                        dma = sg_next(dma);
1647                        count += 1;
1648                }
1649                size += s->length;
1650        }
1651        if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1652                is_coherent) < 0)
1653                goto bad_mapping;
1654
1655        dma->dma_address += offset;
1656        dma->dma_length = size - offset;
1657
1658        return count+1;
1659
1660bad_mapping:
1661        for_each_sg(sg, s, count, i)
1662                __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1663        return 0;
1664}
1665
1666/**
1667 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1668 * @dev: valid struct device pointer
1669 * @sg: list of buffers
1670 * @nents: number of buffers to map
1671 * @dir: DMA transfer direction
1672 *
1673 * Map a set of i/o coherent buffers described by scatterlist in streaming
1674 * mode for DMA. The scatter gather list elements are merged together (if
1675 * possible) and tagged with the appropriate dma address and length. They are
1676 * obtained via sg_dma_{address,length}.
1677 */
1678static int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1679                int nents, enum dma_data_direction dir, unsigned long attrs)
1680{
1681        return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1682}
1683
1684/**
1685 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1686 * @dev: valid struct device pointer
1687 * @sg: list of buffers
1688 * @nents: number of buffers to map
1689 * @dir: DMA transfer direction
1690 *
1691 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1692 * The scatter gather list elements are merged together (if possible) and
1693 * tagged with the appropriate dma address and length. They are obtained via
1694 * sg_dma_{address,length}.
1695 */
1696static int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1697                int nents, enum dma_data_direction dir, unsigned long attrs)
1698{
1699        return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1700}
1701
1702static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1703                int nents, enum dma_data_direction dir,
1704                unsigned long attrs, bool is_coherent)
1705{
1706        struct scatterlist *s;
1707        int i;
1708
1709        for_each_sg(sg, s, nents, i) {
1710                if (sg_dma_len(s))
1711                        __iommu_remove_mapping(dev, sg_dma_address(s),
1712                                               sg_dma_len(s));
1713                if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1714                        __dma_page_dev_to_cpu(sg_page(s), s->offset,
1715                                              s->length, dir);
1716        }
1717}
1718
1719/**
1720 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1721 * @dev: valid struct device pointer
1722 * @sg: list of buffers
1723 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1724 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1725 *
1726 * Unmap a set of streaming mode DMA translations.  Again, CPU access
1727 * rules concerning calls here are the same as for dma_unmap_single().
1728 */
1729static void arm_coherent_iommu_unmap_sg(struct device *dev,
1730                struct scatterlist *sg, int nents, enum dma_data_direction dir,
1731                unsigned long attrs)
1732{
1733        __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1734}
1735
1736/**
1737 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1738 * @dev: valid struct device pointer
1739 * @sg: list of buffers
1740 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1741 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1742 *
1743 * Unmap a set of streaming mode DMA translations.  Again, CPU access
1744 * rules concerning calls here are the same as for dma_unmap_single().
1745 */
1746static void arm_iommu_unmap_sg(struct device *dev,
1747                               struct scatterlist *sg, int nents,
1748                               enum dma_data_direction dir,
1749                               unsigned long attrs)
1750{
1751        __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1752}
1753
1754/**
1755 * arm_iommu_sync_sg_for_cpu
1756 * @dev: valid struct device pointer
1757 * @sg: list of buffers
1758 * @nents: number of buffers to map (returned from dma_map_sg)
1759 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1760 */
1761static void arm_iommu_sync_sg_for_cpu(struct device *dev,
1762                        struct scatterlist *sg,
1763                        int nents, enum dma_data_direction dir)
1764{
1765        struct scatterlist *s;
1766        int i;
1767
1768        for_each_sg(sg, s, nents, i)
1769                __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1770
1771}
1772
1773/**
1774 * arm_iommu_sync_sg_for_device
1775 * @dev: valid struct device pointer
1776 * @sg: list of buffers
1777 * @nents: number of buffers to map (returned from dma_map_sg)
1778 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1779 */
1780static void arm_iommu_sync_sg_for_device(struct device *dev,
1781                        struct scatterlist *sg,
1782                        int nents, enum dma_data_direction dir)
1783{
1784        struct scatterlist *s;
1785        int i;
1786
1787        for_each_sg(sg, s, nents, i)
1788                __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1789}
1790
1791
1792/**
1793 * arm_coherent_iommu_map_page
1794 * @dev: valid struct device pointer
1795 * @page: page that buffer resides in
1796 * @offset: offset into page for start of buffer
1797 * @size: size of buffer to map
1798 * @dir: DMA transfer direction
1799 *
1800 * Coherent IOMMU aware version of arm_dma_map_page()
1801 */
1802static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1803             unsigned long offset, size_t size, enum dma_data_direction dir,
1804             unsigned long attrs)
1805{
1806        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1807        dma_addr_t dma_addr;
1808        int ret, prot, len = PAGE_ALIGN(size + offset);
1809
1810        dma_addr = __alloc_iova(mapping, len);
1811        if (dma_addr == DMA_MAPPING_ERROR)
1812                return dma_addr;
1813
1814        prot = __dma_info_to_prot(dir, attrs);
1815
1816        ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1817        if (ret < 0)
1818                goto fail;
1819
1820        return dma_addr + offset;
1821fail:
1822        __free_iova(mapping, dma_addr, len);
1823        return DMA_MAPPING_ERROR;
1824}
1825
1826/**
1827 * arm_iommu_map_page
1828 * @dev: valid struct device pointer
1829 * @page: page that buffer resides in
1830 * @offset: offset into page for start of buffer
1831 * @size: size of buffer to map
1832 * @dir: DMA transfer direction
1833 *
1834 * IOMMU aware version of arm_dma_map_page()
1835 */
1836static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1837             unsigned long offset, size_t size, enum dma_data_direction dir,
1838             unsigned long attrs)
1839{
1840        if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1841                __dma_page_cpu_to_dev(page, offset, size, dir);
1842
1843        return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1844}
1845
1846/**
1847 * arm_coherent_iommu_unmap_page
1848 * @dev: valid struct device pointer
1849 * @handle: DMA address of buffer
1850 * @size: size of buffer (same as passed to dma_map_page)
1851 * @dir: DMA transfer direction (same as passed to dma_map_page)
1852 *
1853 * Coherent IOMMU aware version of arm_dma_unmap_page()
1854 */
1855static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1856                size_t size, enum dma_data_direction dir, unsigned long attrs)
1857{
1858        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1859        dma_addr_t iova = handle & PAGE_MASK;
1860        int offset = handle & ~PAGE_MASK;
1861        int len = PAGE_ALIGN(size + offset);
1862
1863        if (!iova)
1864                return;
1865
1866        iommu_unmap(mapping->domain, iova, len);
1867        __free_iova(mapping, iova, len);
1868}
1869
1870/**
1871 * arm_iommu_unmap_page
1872 * @dev: valid struct device pointer
1873 * @handle: DMA address of buffer
1874 * @size: size of buffer (same as passed to dma_map_page)
1875 * @dir: DMA transfer direction (same as passed to dma_map_page)
1876 *
1877 * IOMMU aware version of arm_dma_unmap_page()
1878 */
1879static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1880                size_t size, enum dma_data_direction dir, unsigned long attrs)
1881{
1882        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1883        dma_addr_t iova = handle & PAGE_MASK;
1884        struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1885        int offset = handle & ~PAGE_MASK;
1886        int len = PAGE_ALIGN(size + offset);
1887
1888        if (!iova)
1889                return;
1890
1891        if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1892                __dma_page_dev_to_cpu(page, offset, size, dir);
1893
1894        iommu_unmap(mapping->domain, iova, len);
1895        __free_iova(mapping, iova, len);
1896}
1897
1898/**
1899 * arm_iommu_map_resource - map a device resource for DMA
1900 * @dev: valid struct device pointer
1901 * @phys_addr: physical address of resource
1902 * @size: size of resource to map
1903 * @dir: DMA transfer direction
1904 */
1905static dma_addr_t arm_iommu_map_resource(struct device *dev,
1906                phys_addr_t phys_addr, size_t size,
1907                enum dma_data_direction dir, unsigned long attrs)
1908{
1909        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1910        dma_addr_t dma_addr;
1911        int ret, prot;
1912        phys_addr_t addr = phys_addr & PAGE_MASK;
1913        unsigned int offset = phys_addr & ~PAGE_MASK;
1914        size_t len = PAGE_ALIGN(size + offset);
1915
1916        dma_addr = __alloc_iova(mapping, len);
1917        if (dma_addr == DMA_MAPPING_ERROR)
1918                return dma_addr;
1919
1920        prot = __dma_info_to_prot(dir, attrs) | IOMMU_MMIO;
1921
1922        ret = iommu_map(mapping->domain, dma_addr, addr, len, prot);
1923        if (ret < 0)
1924                goto fail;
1925
1926        return dma_addr + offset;
1927fail:
1928        __free_iova(mapping, dma_addr, len);
1929        return DMA_MAPPING_ERROR;
1930}
1931
1932/**
1933 * arm_iommu_unmap_resource - unmap a device DMA resource
1934 * @dev: valid struct device pointer
1935 * @dma_handle: DMA address to resource
1936 * @size: size of resource to map
1937 * @dir: DMA transfer direction
1938 */
1939static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
1940                size_t size, enum dma_data_direction dir,
1941                unsigned long attrs)
1942{
1943        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1944        dma_addr_t iova = dma_handle & PAGE_MASK;
1945        unsigned int offset = dma_handle & ~PAGE_MASK;
1946        size_t len = PAGE_ALIGN(size + offset);
1947
1948        if (!iova)
1949                return;
1950
1951        iommu_unmap(mapping->domain, iova, len);
1952        __free_iova(mapping, iova, len);
1953}
1954
1955static void arm_iommu_sync_single_for_cpu(struct device *dev,
1956                dma_addr_t handle, size_t size, enum dma_data_direction dir)
1957{
1958        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1959        dma_addr_t iova = handle & PAGE_MASK;
1960        struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1961        unsigned int offset = handle & ~PAGE_MASK;
1962
1963        if (!iova)
1964                return;
1965
1966        __dma_page_dev_to_cpu(page, offset, size, dir);
1967}
1968
1969static void arm_iommu_sync_single_for_device(struct device *dev,
1970                dma_addr_t handle, size_t size, enum dma_data_direction dir)
1971{
1972        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1973        dma_addr_t iova = handle & PAGE_MASK;
1974        struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1975        unsigned int offset = handle & ~PAGE_MASK;
1976
1977        if (!iova)
1978                return;
1979
1980        __dma_page_cpu_to_dev(page, offset, size, dir);
1981}
1982
1983static const struct dma_map_ops iommu_ops = {
1984        .alloc          = arm_iommu_alloc_attrs,
1985        .free           = arm_iommu_free_attrs,
1986        .mmap           = arm_iommu_mmap_attrs,
1987        .get_sgtable    = arm_iommu_get_sgtable,
1988
1989        .map_page               = arm_iommu_map_page,
1990        .unmap_page             = arm_iommu_unmap_page,
1991        .sync_single_for_cpu    = arm_iommu_sync_single_for_cpu,
1992        .sync_single_for_device = arm_iommu_sync_single_for_device,
1993
1994        .map_sg                 = arm_iommu_map_sg,
1995        .unmap_sg               = arm_iommu_unmap_sg,
1996        .sync_sg_for_cpu        = arm_iommu_sync_sg_for_cpu,
1997        .sync_sg_for_device     = arm_iommu_sync_sg_for_device,
1998
1999        .map_resource           = arm_iommu_map_resource,
2000        .unmap_resource         = arm_iommu_unmap_resource,
2001
2002        .dma_supported          = arm_dma_supported,
2003};
2004
2005static const struct dma_map_ops iommu_coherent_ops = {
2006        .alloc          = arm_coherent_iommu_alloc_attrs,
2007        .free           = arm_coherent_iommu_free_attrs,
2008        .mmap           = arm_coherent_iommu_mmap_attrs,
2009        .get_sgtable    = arm_iommu_get_sgtable,
2010
2011        .map_page       = arm_coherent_iommu_map_page,
2012        .unmap_page     = arm_coherent_iommu_unmap_page,
2013
2014        .map_sg         = arm_coherent_iommu_map_sg,
2015        .unmap_sg       = arm_coherent_iommu_unmap_sg,
2016
2017        .map_resource   = arm_iommu_map_resource,
2018        .unmap_resource = arm_iommu_unmap_resource,
2019
2020        .dma_supported          = arm_dma_supported,
2021};
2022
2023/**
2024 * arm_iommu_create_mapping
2025 * @bus: pointer to the bus holding the client device (for IOMMU calls)
2026 * @base: start address of the valid IO address space
2027 * @size: maximum size of the valid IO address space
2028 *
2029 * Creates a mapping structure which holds information about used/unused
2030 * IO address ranges, which is required to perform memory allocation and
2031 * mapping with IOMMU aware functions.
2032 *
2033 * The client device need to be attached to the mapping with
2034 * arm_iommu_attach_device function.
2035 */
2036struct dma_iommu_mapping *
2037arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
2038{
2039        unsigned int bits = size >> PAGE_SHIFT;
2040        unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
2041        struct dma_iommu_mapping *mapping;
2042        int extensions = 1;
2043        int err = -ENOMEM;
2044
2045        /* currently only 32-bit DMA address space is supported */
2046        if (size > DMA_BIT_MASK(32) + 1)
2047                return ERR_PTR(-ERANGE);
2048
2049        if (!bitmap_size)
2050                return ERR_PTR(-EINVAL);
2051
2052        if (bitmap_size > PAGE_SIZE) {
2053                extensions = bitmap_size / PAGE_SIZE;
2054                bitmap_size = PAGE_SIZE;
2055        }
2056
2057        mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
2058        if (!mapping)
2059                goto err;
2060
2061        mapping->bitmap_size = bitmap_size;
2062        mapping->bitmaps = kcalloc(extensions, sizeof(unsigned long *),
2063                                   GFP_KERNEL);
2064        if (!mapping->bitmaps)
2065                goto err2;
2066
2067        mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
2068        if (!mapping->bitmaps[0])
2069                goto err3;
2070
2071        mapping->nr_bitmaps = 1;
2072        mapping->extensions = extensions;
2073        mapping->base = base;
2074        mapping->bits = BITS_PER_BYTE * bitmap_size;
2075
2076        spin_lock_init(&mapping->lock);
2077
2078        mapping->domain = iommu_domain_alloc(bus);
2079        if (!mapping->domain)
2080                goto err4;
2081
2082        kref_init(&mapping->kref);
2083        return mapping;
2084err4:
2085        kfree(mapping->bitmaps[0]);
2086err3:
2087        kfree(mapping->bitmaps);
2088err2:
2089        kfree(mapping);
2090err:
2091        return ERR_PTR(err);
2092}
2093EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
2094
2095static void release_iommu_mapping(struct kref *kref)
2096{
2097        int i;
2098        struct dma_iommu_mapping *mapping =
2099                container_of(kref, struct dma_iommu_mapping, kref);
2100
2101        iommu_domain_free(mapping->domain);
2102        for (i = 0; i < mapping->nr_bitmaps; i++)
2103                kfree(mapping->bitmaps[i]);
2104        kfree(mapping->bitmaps);
2105        kfree(mapping);
2106}
2107
2108static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
2109{
2110        int next_bitmap;
2111
2112        if (mapping->nr_bitmaps >= mapping->extensions)
2113                return -EINVAL;
2114
2115        next_bitmap = mapping->nr_bitmaps;
2116        mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
2117                                                GFP_ATOMIC);
2118        if (!mapping->bitmaps[next_bitmap])
2119                return -ENOMEM;
2120
2121        mapping->nr_bitmaps++;
2122
2123        return 0;
2124}
2125
2126void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
2127{
2128        if (mapping)
2129                kref_put(&mapping->kref, release_iommu_mapping);
2130}
2131EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2132
2133static int __arm_iommu_attach_device(struct device *dev,
2134                                     struct dma_iommu_mapping *mapping)
2135{
2136        int err;
2137
2138        err = iommu_attach_device(mapping->domain, dev);
2139        if (err)
2140                return err;
2141
2142        kref_get(&mapping->kref);
2143        to_dma_iommu_mapping(dev) = mapping;
2144
2145        pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
2146        return 0;
2147}
2148
2149/**
2150 * arm_iommu_attach_device
2151 * @dev: valid struct device pointer
2152 * @mapping: io address space mapping structure (returned from
2153 *      arm_iommu_create_mapping)
2154 *
2155 * Attaches specified io address space mapping to the provided device.
2156 * This replaces the dma operations (dma_map_ops pointer) with the
2157 * IOMMU aware version.
2158 *
2159 * More than one client might be attached to the same io address space
2160 * mapping.
2161 */
2162int arm_iommu_attach_device(struct device *dev,
2163                            struct dma_iommu_mapping *mapping)
2164{
2165        int err;
2166
2167        err = __arm_iommu_attach_device(dev, mapping);
2168        if (err)
2169                return err;
2170
2171        set_dma_ops(dev, &iommu_ops);
2172        return 0;
2173}
2174EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2175
2176/**
2177 * arm_iommu_detach_device
2178 * @dev: valid struct device pointer
2179 *
2180 * Detaches the provided device from a previously attached map.
2181 * This overwrites the dma_ops pointer with appropriate non-IOMMU ops.
2182 */
2183void arm_iommu_detach_device(struct device *dev)
2184{
2185        struct dma_iommu_mapping *mapping;
2186
2187        mapping = to_dma_iommu_mapping(dev);
2188        if (!mapping) {
2189                dev_warn(dev, "Not attached\n");
2190                return;
2191        }
2192
2193        iommu_detach_device(mapping->domain, dev);
2194        kref_put(&mapping->kref, release_iommu_mapping);
2195        to_dma_iommu_mapping(dev) = NULL;
2196        set_dma_ops(dev, arm_get_dma_map_ops(dev->archdata.dma_coherent));
2197
2198        pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
2199}
2200EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2201
2202static const struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
2203{
2204        return coherent ? &iommu_coherent_ops : &iommu_ops;
2205}
2206
2207static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2208                                    const struct iommu_ops *iommu)
2209{
2210        struct dma_iommu_mapping *mapping;
2211
2212        if (!iommu)
2213                return false;
2214
2215        mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
2216        if (IS_ERR(mapping)) {
2217                pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2218                                size, dev_name(dev));
2219                return false;
2220        }
2221
2222        if (__arm_iommu_attach_device(dev, mapping)) {
2223                pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2224                                dev_name(dev));
2225                arm_iommu_release_mapping(mapping);
2226                return false;
2227        }
2228
2229        return true;
2230}
2231
2232static void arm_teardown_iommu_dma_ops(struct device *dev)
2233{
2234        struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2235
2236        if (!mapping)
2237                return;
2238
2239        arm_iommu_detach_device(dev);
2240        arm_iommu_release_mapping(mapping);
2241}
2242
2243#else
2244
2245static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2246                                    const struct iommu_ops *iommu)
2247{
2248        return false;
2249}
2250
2251static void arm_teardown_iommu_dma_ops(struct device *dev) { }
2252
2253#define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2254
2255#endif  /* CONFIG_ARM_DMA_USE_IOMMU */
2256
2257void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2258                        const struct iommu_ops *iommu, bool coherent)
2259{
2260        const struct dma_map_ops *dma_ops;
2261
2262        dev->archdata.dma_coherent = coherent;
2263#ifdef CONFIG_SWIOTLB
2264        dev->dma_coherent = coherent;
2265#endif
2266
2267        /*
2268         * Don't override the dma_ops if they have already been set. Ideally
2269         * this should be the only location where dma_ops are set, remove this
2270         * check when all other callers of set_dma_ops will have disappeared.
2271         */
2272        if (dev->dma_ops)
2273                return;
2274
2275        if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
2276                dma_ops = arm_get_iommu_dma_map_ops(coherent);
2277        else
2278                dma_ops = arm_get_dma_map_ops(coherent);
2279
2280        set_dma_ops(dev, dma_ops);
2281
2282#ifdef CONFIG_XEN
2283        if (xen_initial_domain())
2284                dev->dma_ops = &xen_swiotlb_dma_ops;
2285#endif
2286        dev->archdata.dma_ops_setup = true;
2287}
2288
2289void arch_teardown_dma_ops(struct device *dev)
2290{
2291        if (!dev->archdata.dma_ops_setup)
2292                return;
2293
2294        arm_teardown_iommu_dma_ops(dev);
2295        /* Let arch_setup_dma_ops() start again from scratch upon re-probe */
2296        set_dma_ops(dev, NULL);
2297}
2298
2299#ifdef CONFIG_SWIOTLB
2300void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
2301                enum dma_data_direction dir)
2302{
2303        __dma_page_cpu_to_dev(phys_to_page(paddr), paddr & (PAGE_SIZE - 1),
2304                              size, dir);
2305}
2306
2307void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
2308                enum dma_data_direction dir)
2309{
2310        __dma_page_dev_to_cpu(phys_to_page(paddr), paddr & (PAGE_SIZE - 1),
2311                              size, dir);
2312}
2313
2314void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
2315                gfp_t gfp, unsigned long attrs)
2316{
2317        return __dma_alloc(dev, size, dma_handle, gfp,
2318                           __get_dma_pgprot(attrs, PAGE_KERNEL), false,
2319                           attrs, __builtin_return_address(0));
2320}
2321
2322void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
2323                dma_addr_t dma_handle, unsigned long attrs)
2324{
2325        __arm_dma_free(dev, size, cpu_addr, dma_handle, attrs, false);
2326}
2327#endif /* CONFIG_SWIOTLB */
2328
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