linux/arch/arm/mach-omap2/prm_common.c
<<
>>
Prefs
   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * OMAP2+ common Power & Reset Management (PRM) IP block functions
   4 *
   5 * Copyright (C) 2011 Texas Instruments, Inc.
   6 * Tero Kristo <t-kristo@ti.com>
   7 *
   8 * For historical purposes, the API used to configure the PRM
   9 * interrupt handler refers to it as the "PRCM interrupt."  The
  10 * underlying registers are located in the PRM on OMAP3/4.
  11 *
  12 * XXX This code should eventually be moved to a PRM driver.
  13 */
  14
  15#include <linux/kernel.h>
  16#include <linux/module.h>
  17#include <linux/init.h>
  18#include <linux/io.h>
  19#include <linux/irq.h>
  20#include <linux/interrupt.h>
  21#include <linux/slab.h>
  22#include <linux/of.h>
  23#include <linux/of_address.h>
  24#include <linux/clk-provider.h>
  25#include <linux/clk/ti.h>
  26
  27#include "soc.h"
  28#include "prm2xxx_3xxx.h"
  29#include "prm2xxx.h"
  30#include "prm3xxx.h"
  31#include "prm33xx.h"
  32#include "prm44xx.h"
  33#include "prm54xx.h"
  34#include "prm7xx.h"
  35#include "prcm43xx.h"
  36#include "common.h"
  37#include "clock.h"
  38#include "cm.h"
  39#include "control.h"
  40
  41/*
  42 * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
  43 * XXX this is technically not needed, since
  44 * omap_prcm_register_chain_handler() could allocate this based on the
  45 * actual amount of memory needed for the SoC
  46 */
  47#define OMAP_PRCM_MAX_NR_PENDING_REG            2
  48
  49/*
  50 * prcm_irq_chips: an array of all of the "generic IRQ chips" in use
  51 * by the PRCM interrupt handler code.  There will be one 'chip' per
  52 * PRM_{IRQSTATUS,IRQENABLE}_MPU register pair.  (So OMAP3 will have
  53 * one "chip" and OMAP4 will have two.)
  54 */
  55static struct irq_chip_generic **prcm_irq_chips;
  56
  57/*
  58 * prcm_irq_setup: the PRCM IRQ parameters for the hardware the code
  59 * is currently running on.  Defined and passed by initialization code
  60 * that calls omap_prcm_register_chain_handler().
  61 */
  62static struct omap_prcm_irq_setup *prcm_irq_setup;
  63
  64/* prm_base: base virtual address of the PRM IP block */
  65struct omap_domain_base prm_base;
  66
  67u16 prm_features;
  68
  69/*
  70 * prm_ll_data: function pointers to SoC-specific implementations of
  71 * common PRM functions
  72 */
  73static struct prm_ll_data null_prm_ll_data;
  74static struct prm_ll_data *prm_ll_data = &null_prm_ll_data;
  75
  76/* Private functions */
  77
  78/*
  79 * Move priority events from events to priority_events array
  80 */
  81static void omap_prcm_events_filter_priority(unsigned long *events,
  82        unsigned long *priority_events)
  83{
  84        int i;
  85
  86        for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
  87                priority_events[i] =
  88                        events[i] & prcm_irq_setup->priority_mask[i];
  89                events[i] ^= priority_events[i];
  90        }
  91}
  92
  93/*
  94 * PRCM Interrupt Handler
  95 *
  96 * This is a common handler for the OMAP PRCM interrupts. Pending
  97 * interrupts are detected by a call to prcm_pending_events and
  98 * dispatched accordingly. Clearing of the wakeup events should be
  99 * done by the SoC specific individual handlers.
 100 */
 101static void omap_prcm_irq_handler(struct irq_desc *desc)
 102{
 103        unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
 104        unsigned long priority_pending[OMAP_PRCM_MAX_NR_PENDING_REG];
 105        struct irq_chip *chip = irq_desc_get_chip(desc);
 106        unsigned int virtirq;
 107        int nr_irq = prcm_irq_setup->nr_regs * 32;
 108
 109        /*
 110         * If we are suspended, mask all interrupts from PRCM level,
 111         * this does not ack them, and they will be pending until we
 112         * re-enable the interrupts, at which point the
 113         * omap_prcm_irq_handler will be executed again.  The
 114         * _save_and_clear_irqen() function must ensure that the PRM
 115         * write to disable all IRQs has reached the PRM before
 116         * returning, or spurious PRCM interrupts may occur during
 117         * suspend.
 118         */
 119        if (prcm_irq_setup->suspended) {
 120                prcm_irq_setup->save_and_clear_irqen(prcm_irq_setup->saved_mask);
 121                prcm_irq_setup->suspend_save_flag = true;
 122        }
 123
 124        /*
 125         * Loop until all pending irqs are handled, since
 126         * generic_handle_irq() can cause new irqs to come
 127         */
 128        while (!prcm_irq_setup->suspended) {
 129                prcm_irq_setup->read_pending_irqs(pending);
 130
 131                /* No bit set, then all IRQs are handled */
 132                if (find_first_bit(pending, nr_irq) >= nr_irq)
 133                        break;
 134
 135                omap_prcm_events_filter_priority(pending, priority_pending);
 136
 137                /*
 138                 * Loop on all currently pending irqs so that new irqs
 139                 * cannot starve previously pending irqs
 140                 */
 141
 142                /* Serve priority events first */
 143                for_each_set_bit(virtirq, priority_pending, nr_irq)
 144                        generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
 145
 146                /* Serve normal events next */
 147                for_each_set_bit(virtirq, pending, nr_irq)
 148                        generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
 149        }
 150        if (chip->irq_ack)
 151                chip->irq_ack(&desc->irq_data);
 152        if (chip->irq_eoi)
 153                chip->irq_eoi(&desc->irq_data);
 154        chip->irq_unmask(&desc->irq_data);
 155
 156        prcm_irq_setup->ocp_barrier(); /* avoid spurious IRQs */
 157}
 158
 159/* Public functions */
 160
 161/**
 162 * omap_prcm_event_to_irq - given a PRCM event name, returns the
 163 * corresponding IRQ on which the handler should be registered
 164 * @name: name of the PRCM interrupt bit to look up - see struct omap_prcm_irq
 165 *
 166 * Returns the Linux internal IRQ ID corresponding to @name upon success,
 167 * or -ENOENT upon failure.
 168 */
 169int omap_prcm_event_to_irq(const char *name)
 170{
 171        int i;
 172
 173        if (!prcm_irq_setup || !name)
 174                return -ENOENT;
 175
 176        for (i = 0; i < prcm_irq_setup->nr_irqs; i++)
 177                if (!strcmp(prcm_irq_setup->irqs[i].name, name))
 178                        return prcm_irq_setup->base_irq +
 179                                prcm_irq_setup->irqs[i].offset;
 180
 181        return -ENOENT;
 182}
 183
 184/**
 185 * omap_prcm_irq_cleanup - reverses memory allocated and other steps
 186 * done by omap_prcm_register_chain_handler()
 187 *
 188 * No return value.
 189 */
 190void omap_prcm_irq_cleanup(void)
 191{
 192        unsigned int irq;
 193        int i;
 194
 195        if (!prcm_irq_setup) {
 196                pr_err("PRCM: IRQ handler not initialized; cannot cleanup\n");
 197                return;
 198        }
 199
 200        if (prcm_irq_chips) {
 201                for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
 202                        if (prcm_irq_chips[i])
 203                                irq_remove_generic_chip(prcm_irq_chips[i],
 204                                        0xffffffff, 0, 0);
 205                        prcm_irq_chips[i] = NULL;
 206                }
 207                kfree(prcm_irq_chips);
 208                prcm_irq_chips = NULL;
 209        }
 210
 211        kfree(prcm_irq_setup->saved_mask);
 212        prcm_irq_setup->saved_mask = NULL;
 213
 214        kfree(prcm_irq_setup->priority_mask);
 215        prcm_irq_setup->priority_mask = NULL;
 216
 217        irq = prcm_irq_setup->irq;
 218        irq_set_chained_handler(irq, NULL);
 219
 220        if (prcm_irq_setup->base_irq > 0)
 221                irq_free_descs(prcm_irq_setup->base_irq,
 222                        prcm_irq_setup->nr_regs * 32);
 223        prcm_irq_setup->base_irq = 0;
 224}
 225
 226void omap_prcm_irq_prepare(void)
 227{
 228        prcm_irq_setup->suspended = true;
 229}
 230
 231void omap_prcm_irq_complete(void)
 232{
 233        prcm_irq_setup->suspended = false;
 234
 235        /* If we have not saved the masks, do not attempt to restore */
 236        if (!prcm_irq_setup->suspend_save_flag)
 237                return;
 238
 239        prcm_irq_setup->suspend_save_flag = false;
 240
 241        /*
 242         * Re-enable all masked PRCM irq sources, this causes the PRCM
 243         * interrupt to fire immediately if the events were masked
 244         * previously in the chain handler
 245         */
 246        prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask);
 247}
 248
 249/**
 250 * omap_prcm_register_chain_handler - initializes the prcm chained interrupt
 251 * handler based on provided parameters
 252 * @irq_setup: hardware data about the underlying PRM/PRCM
 253 *
 254 * Set up the PRCM chained interrupt handler on the PRCM IRQ.  Sets up
 255 * one generic IRQ chip per PRM interrupt status/enable register pair.
 256 * Returns 0 upon success, -EINVAL if called twice or if invalid
 257 * arguments are passed, or -ENOMEM on any other error.
 258 */
 259int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
 260{
 261        int nr_regs;
 262        u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG];
 263        int offset, i, irq;
 264        struct irq_chip_generic *gc;
 265        struct irq_chip_type *ct;
 266
 267        if (!irq_setup)
 268                return -EINVAL;
 269
 270        nr_regs = irq_setup->nr_regs;
 271
 272        if (prcm_irq_setup) {
 273                pr_err("PRCM: already initialized; won't reinitialize\n");
 274                return -EINVAL;
 275        }
 276
 277        if (nr_regs > OMAP_PRCM_MAX_NR_PENDING_REG) {
 278                pr_err("PRCM: nr_regs too large\n");
 279                return -EINVAL;
 280        }
 281
 282        prcm_irq_setup = irq_setup;
 283
 284        prcm_irq_chips = kcalloc(nr_regs, sizeof(void *), GFP_KERNEL);
 285        prcm_irq_setup->saved_mask = kcalloc(nr_regs, sizeof(u32),
 286                                             GFP_KERNEL);
 287        prcm_irq_setup->priority_mask = kcalloc(nr_regs, sizeof(u32),
 288                                                GFP_KERNEL);
 289
 290        if (!prcm_irq_chips || !prcm_irq_setup->saved_mask ||
 291            !prcm_irq_setup->priority_mask)
 292                goto err;
 293
 294        memset(mask, 0, sizeof(mask));
 295
 296        for (i = 0; i < irq_setup->nr_irqs; i++) {
 297                offset = irq_setup->irqs[i].offset;
 298                mask[offset >> 5] |= 1 << (offset & 0x1f);
 299                if (irq_setup->irqs[i].priority)
 300                        irq_setup->priority_mask[offset >> 5] |=
 301                                1 << (offset & 0x1f);
 302        }
 303
 304        irq = irq_setup->irq;
 305        irq_set_chained_handler(irq, omap_prcm_irq_handler);
 306
 307        irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32,
 308                0);
 309
 310        if (irq_setup->base_irq < 0) {
 311                pr_err("PRCM: failed to allocate irq descs: %d\n",
 312                        irq_setup->base_irq);
 313                goto err;
 314        }
 315
 316        for (i = 0; i < irq_setup->nr_regs; i++) {
 317                gc = irq_alloc_generic_chip("PRCM", 1,
 318                        irq_setup->base_irq + i * 32, prm_base.va,
 319                        handle_level_irq);
 320
 321                if (!gc) {
 322                        pr_err("PRCM: failed to allocate generic chip\n");
 323                        goto err;
 324                }
 325                ct = gc->chip_types;
 326                ct->chip.irq_ack = irq_gc_ack_set_bit;
 327                ct->chip.irq_mask = irq_gc_mask_clr_bit;
 328                ct->chip.irq_unmask = irq_gc_mask_set_bit;
 329
 330                ct->regs.ack = irq_setup->ack + i * 4;
 331                ct->regs.mask = irq_setup->mask + i * 4;
 332
 333                irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0);
 334                prcm_irq_chips[i] = gc;
 335        }
 336
 337        irq = omap_prcm_event_to_irq("io");
 338        omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
 339
 340        return 0;
 341
 342err:
 343        omap_prcm_irq_cleanup();
 344        return -ENOMEM;
 345}
 346
 347/**
 348 * omap2_set_globals_prm - set the PRM base address (for early use)
 349 * @prm: PRM base virtual address
 350 *
 351 * XXX Will be replaced when the PRM/CM drivers are completed.
 352 */
 353void __init omap2_set_globals_prm(void __iomem *prm)
 354{
 355        prm_base.va = prm;
 356}
 357
 358/**
 359 * prm_read_reset_sources - return the sources of the SoC's last reset
 360 *
 361 * Return a u32 bitmask representing the reset sources that caused the
 362 * SoC to reset.  The low-level per-SoC functions called by this
 363 * function remap the SoC-specific reset source bits into an
 364 * OMAP-common set of reset source bits, defined in
 365 * arch/arm/mach-omap2/prm.h.  Returns the standardized reset source
 366 * u32 bitmask from the hardware upon success, or returns (1 <<
 367 * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources()
 368 * function was registered.
 369 */
 370u32 prm_read_reset_sources(void)
 371{
 372        u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT;
 373
 374        if (prm_ll_data->read_reset_sources)
 375                ret = prm_ll_data->read_reset_sources();
 376        else
 377                WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__);
 378
 379        return ret;
 380}
 381
 382/**
 383 * prm_was_any_context_lost_old - was device context lost? (old API)
 384 * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
 385 * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
 386 * @idx: CONTEXT register offset
 387 *
 388 * Return 1 if any bits were set in the *_CONTEXT_* register
 389 * identified by (@part, @inst, @idx), which means that some context
 390 * was lost for that module; otherwise, return 0.  XXX Deprecated;
 391 * callers need to use a less-SoC-dependent way to identify hardware
 392 * IP blocks.
 393 */
 394bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx)
 395{
 396        bool ret = true;
 397
 398        if (prm_ll_data->was_any_context_lost_old)
 399                ret = prm_ll_data->was_any_context_lost_old(part, inst, idx);
 400        else
 401                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 402                          __func__);
 403
 404        return ret;
 405}
 406
 407/**
 408 * prm_clear_context_lost_flags_old - clear context loss flags (old API)
 409 * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
 410 * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
 411 * @idx: CONTEXT register offset
 412 *
 413 * Clear hardware context loss bits for the module identified by
 414 * (@part, @inst, @idx).  No return value.  XXX Deprecated; callers
 415 * need to use a less-SoC-dependent way to identify hardware IP
 416 * blocks.
 417 */
 418void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx)
 419{
 420        if (prm_ll_data->clear_context_loss_flags_old)
 421                prm_ll_data->clear_context_loss_flags_old(part, inst, idx);
 422        else
 423                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 424                          __func__);
 425}
 426
 427/**
 428 * omap_prm_assert_hardreset - assert hardreset for an IP block
 429 * @shift: register bit shift corresponding to the reset line
 430 * @part: PRM partition
 431 * @prm_mod: PRM submodule base or instance offset
 432 * @offset: register offset
 433 *
 434 * Asserts a hardware reset line for an IP block.
 435 */
 436int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
 437{
 438        if (!prm_ll_data->assert_hardreset) {
 439                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 440                          __func__);
 441                return -EINVAL;
 442        }
 443
 444        return prm_ll_data->assert_hardreset(shift, part, prm_mod, offset);
 445}
 446
 447/**
 448 * omap_prm_deassert_hardreset - deassert hardreset for an IP block
 449 * @shift: register bit shift corresponding to the reset line
 450 * @st_shift: reset status bit shift corresponding to the reset line
 451 * @part: PRM partition
 452 * @prm_mod: PRM submodule base or instance offset
 453 * @offset: register offset
 454 * @st_offset: status register offset
 455 *
 456 * Deasserts a hardware reset line for an IP block.
 457 */
 458int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
 459                                u16 offset, u16 st_offset)
 460{
 461        if (!prm_ll_data->deassert_hardreset) {
 462                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 463                          __func__);
 464                return -EINVAL;
 465        }
 466
 467        return prm_ll_data->deassert_hardreset(shift, st_shift, part, prm_mod,
 468                                               offset, st_offset);
 469}
 470
 471/**
 472 * omap_prm_is_hardreset_asserted - check the hardreset status for an IP block
 473 * @shift: register bit shift corresponding to the reset line
 474 * @part: PRM partition
 475 * @prm_mod: PRM submodule base or instance offset
 476 * @offset: register offset
 477 *
 478 * Checks if a hardware reset line for an IP block is enabled or not.
 479 */
 480int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
 481{
 482        if (!prm_ll_data->is_hardreset_asserted) {
 483                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 484                          __func__);
 485                return -EINVAL;
 486        }
 487
 488        return prm_ll_data->is_hardreset_asserted(shift, part, prm_mod, offset);
 489}
 490
 491/**
 492 * omap_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
 493 *
 494 * Clear any previously-latched I/O wakeup events and ensure that the
 495 * I/O wakeup gates are aligned with the current mux settings.
 496 * Calls SoC specific I/O chain reconfigure function if available,
 497 * otherwise does nothing.
 498 */
 499void omap_prm_reconfigure_io_chain(void)
 500{
 501        if (!prcm_irq_setup || !prcm_irq_setup->reconfigure_io_chain)
 502                return;
 503
 504        prcm_irq_setup->reconfigure_io_chain();
 505}
 506
 507/**
 508 * omap_prm_reset_system - trigger global SW reset
 509 *
 510 * Triggers SoC specific global warm reset to reboot the device.
 511 */
 512void omap_prm_reset_system(void)
 513{
 514        if (!prm_ll_data->reset_system) {
 515                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 516                          __func__);
 517                return;
 518        }
 519
 520        prm_ll_data->reset_system();
 521
 522        while (1) {
 523                cpu_relax();
 524                wfe();
 525        }
 526}
 527
 528/**
 529 * omap_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt
 530 * @module: PRM module to clear wakeups from
 531 * @regs: register to clear
 532 * @wkst_mask: wkst bits to clear
 533 *
 534 * Clears any wakeup events for the module and register set defined.
 535 * Uses SoC specific implementation to do the actual wakeup status
 536 * clearing.
 537 */
 538int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)
 539{
 540        if (!prm_ll_data->clear_mod_irqs) {
 541                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 542                          __func__);
 543                return -EINVAL;
 544        }
 545
 546        return prm_ll_data->clear_mod_irqs(module, regs, wkst_mask);
 547}
 548
 549/**
 550 * omap_prm_vp_check_txdone - check voltage processor TX done status
 551 *
 552 * Checks if voltage processor transmission has been completed.
 553 * Returns non-zero if a transmission has completed, 0 otherwise.
 554 */
 555u32 omap_prm_vp_check_txdone(u8 vp_id)
 556{
 557        if (!prm_ll_data->vp_check_txdone) {
 558                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 559                          __func__);
 560                return 0;
 561        }
 562
 563        return prm_ll_data->vp_check_txdone(vp_id);
 564}
 565
 566/**
 567 * omap_prm_vp_clear_txdone - clears voltage processor TX done status
 568 *
 569 * Clears the status bit for completed voltage processor transmission
 570 * returned by prm_vp_check_txdone.
 571 */
 572void omap_prm_vp_clear_txdone(u8 vp_id)
 573{
 574        if (!prm_ll_data->vp_clear_txdone) {
 575                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 576                          __func__);
 577                return;
 578        }
 579
 580        prm_ll_data->vp_clear_txdone(vp_id);
 581}
 582
 583/**
 584 * prm_register - register per-SoC low-level data with the PRM
 585 * @pld: low-level per-SoC OMAP PRM data & function pointers to register
 586 *
 587 * Register per-SoC low-level OMAP PRM data and function pointers with
 588 * the OMAP PRM common interface.  The caller must keep the data
 589 * pointed to by @pld valid until it calls prm_unregister() and
 590 * it returns successfully.  Returns 0 upon success, -EINVAL if @pld
 591 * is NULL, or -EEXIST if prm_register() has already been called
 592 * without an intervening prm_unregister().
 593 */
 594int prm_register(struct prm_ll_data *pld)
 595{
 596        if (!pld)
 597                return -EINVAL;
 598
 599        if (prm_ll_data != &null_prm_ll_data)
 600                return -EEXIST;
 601
 602        prm_ll_data = pld;
 603
 604        return 0;
 605}
 606
 607/**
 608 * prm_unregister - unregister per-SoC low-level data & function pointers
 609 * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister
 610 *
 611 * Unregister per-SoC low-level OMAP PRM data and function pointers
 612 * that were previously registered with prm_register().  The
 613 * caller may not destroy any of the data pointed to by @pld until
 614 * this function returns successfully.  Returns 0 upon success, or
 615 * -EINVAL if @pld is NULL or if @pld does not match the struct
 616 * prm_ll_data * previously registered by prm_register().
 617 */
 618int prm_unregister(struct prm_ll_data *pld)
 619{
 620        if (!pld || prm_ll_data != pld)
 621                return -EINVAL;
 622
 623        prm_ll_data = &null_prm_ll_data;
 624
 625        return 0;
 626}
 627
 628#ifdef CONFIG_ARCH_OMAP2
 629static struct omap_prcm_init_data omap2_prm_data __initdata = {
 630        .index = TI_CLKM_PRM,
 631        .init = omap2xxx_prm_init,
 632};
 633#endif
 634
 635#ifdef CONFIG_ARCH_OMAP3
 636static struct omap_prcm_init_data omap3_prm_data __initdata = {
 637        .index = TI_CLKM_PRM,
 638        .init = omap3xxx_prm_init,
 639
 640        /*
 641         * IVA2 offset is a negative value, must offset the prm_base
 642         * address by this to get it to positive
 643         */
 644        .offset = -OMAP3430_IVA2_MOD,
 645};
 646#endif
 647
 648#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX)
 649static struct omap_prcm_init_data am3_prm_data __initdata = {
 650        .index = TI_CLKM_PRM,
 651        .init = am33xx_prm_init,
 652};
 653#endif
 654
 655#ifdef CONFIG_SOC_TI81XX
 656static struct omap_prcm_init_data dm814_pllss_data __initdata = {
 657        .index = TI_CLKM_PLLSS,
 658        .init = am33xx_prm_init,
 659};
 660#endif
 661
 662#ifdef CONFIG_ARCH_OMAP4
 663static struct omap_prcm_init_data omap4_prm_data __initdata = {
 664        .index = TI_CLKM_PRM,
 665        .init = omap44xx_prm_init,
 666        .device_inst_offset = OMAP4430_PRM_DEVICE_INST,
 667        .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
 668};
 669#endif
 670
 671#ifdef CONFIG_SOC_OMAP5
 672static struct omap_prcm_init_data omap5_prm_data __initdata = {
 673        .index = TI_CLKM_PRM,
 674        .init = omap44xx_prm_init,
 675        .device_inst_offset = OMAP54XX_PRM_DEVICE_INST,
 676        .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
 677};
 678#endif
 679
 680#ifdef CONFIG_SOC_DRA7XX
 681static struct omap_prcm_init_data dra7_prm_data __initdata = {
 682        .index = TI_CLKM_PRM,
 683        .init = omap44xx_prm_init,
 684        .device_inst_offset = DRA7XX_PRM_DEVICE_INST,
 685        .flags = PRM_HAS_IO_WAKEUP,
 686};
 687#endif
 688
 689#ifdef CONFIG_SOC_AM43XX
 690static struct omap_prcm_init_data am4_prm_data __initdata = {
 691        .index = TI_CLKM_PRM,
 692        .init = omap44xx_prm_init,
 693        .device_inst_offset = AM43XX_PRM_DEVICE_INST,
 694        .flags = PRM_HAS_IO_WAKEUP,
 695};
 696#endif
 697
 698#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
 699static struct omap_prcm_init_data scrm_data __initdata = {
 700        .index = TI_CLKM_SCRM,
 701};
 702#endif
 703
 704static const struct of_device_id omap_prcm_dt_match_table[] __initconst = {
 705#ifdef CONFIG_SOC_AM33XX
 706        { .compatible = "ti,am3-prcm", .data = &am3_prm_data },
 707#endif
 708#ifdef CONFIG_SOC_AM43XX
 709        { .compatible = "ti,am4-prcm", .data = &am4_prm_data },
 710#endif
 711#ifdef CONFIG_SOC_TI81XX
 712        { .compatible = "ti,dm814-prcm", .data = &am3_prm_data },
 713        { .compatible = "ti,dm814-pllss", .data = &dm814_pllss_data },
 714        { .compatible = "ti,dm816-prcm", .data = &am3_prm_data },
 715#endif
 716#ifdef CONFIG_ARCH_OMAP2
 717        { .compatible = "ti,omap2-prcm", .data = &omap2_prm_data },
 718#endif
 719#ifdef CONFIG_ARCH_OMAP3
 720        { .compatible = "ti,omap3-prm", .data = &omap3_prm_data },
 721#endif
 722#ifdef CONFIG_ARCH_OMAP4
 723        { .compatible = "ti,omap4-prm", .data = &omap4_prm_data },
 724        { .compatible = "ti,omap4-scrm", .data = &scrm_data },
 725#endif
 726#ifdef CONFIG_SOC_OMAP5
 727        { .compatible = "ti,omap5-prm", .data = &omap5_prm_data },
 728        { .compatible = "ti,omap5-scrm", .data = &scrm_data },
 729#endif
 730#ifdef CONFIG_SOC_DRA7XX
 731        { .compatible = "ti,dra7-prm", .data = &dra7_prm_data },
 732#endif
 733        { }
 734};
 735
 736/**
 737 * omap2_prm_base_init - initialize iomappings for the PRM driver
 738 *
 739 * Detects and initializes the iomappings for the PRM driver, based
 740 * on the DT data. Returns 0 in success, negative error value
 741 * otherwise.
 742 */
 743int __init omap2_prm_base_init(void)
 744{
 745        struct device_node *np;
 746        const struct of_device_id *match;
 747        struct omap_prcm_init_data *data;
 748        struct resource res;
 749        int ret;
 750
 751        for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) {
 752                data = (struct omap_prcm_init_data *)match->data;
 753
 754                ret = of_address_to_resource(np, 0, &res);
 755                if (ret)
 756                        return ret;
 757
 758                data->mem = ioremap(res.start, resource_size(&res));
 759
 760                if (data->index == TI_CLKM_PRM) {
 761                        prm_base.va = data->mem + data->offset;
 762                        prm_base.pa = res.start + data->offset;
 763                }
 764
 765                data->np = np;
 766
 767                if (data->init)
 768                        data->init(data);
 769        }
 770
 771        return 0;
 772}
 773
 774int __init omap2_prcm_base_init(void)
 775{
 776        int ret;
 777
 778        ret = omap2_prm_base_init();
 779        if (ret)
 780                return ret;
 781
 782        return omap2_cm_base_init();
 783}
 784
 785/**
 786 * omap_prcm_init - low level init for the PRCM drivers
 787 *
 788 * Initializes the low level clock infrastructure for PRCM drivers.
 789 * Returns 0 in success, negative error value in failure.
 790 */
 791int __init omap_prcm_init(void)
 792{
 793        struct device_node *np;
 794        const struct of_device_id *match;
 795        const struct omap_prcm_init_data *data;
 796        int ret;
 797
 798        for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) {
 799                data = match->data;
 800
 801                ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
 802                if (ret)
 803                        return ret;
 804        }
 805
 806        omap_cm_init();
 807
 808        return 0;
 809}
 810
 811static int __init prm_late_init(void)
 812{
 813        if (prm_ll_data->late_init)
 814                return prm_ll_data->late_init();
 815        return 0;
 816}
 817subsys_initcall(prm_late_init);
 818
lxr.linux.no kindly hosted by Redpill Linpro AS, provider of Linux consulting and operations services since 1995.