linux/drivers/rtc/rtc-palmas.c
<<
lue=.11/spa v3 .11/formv3 .11a lue=.1 href="../linux+v3.9.6/drivers/rtc/rtc-palmas.c">lue=.11img src="../.static/gfx/right.png" alt=">>">lu1/spa v3lu1spa class="lxr_search">lue= ="+search" method="post" onsubmit="return do_search(this);">lue=.11input typ hidden" nam navtarget" n> ">lue=.11input typ text" nam search" id search">lue=.11butttiotyp submit">Searchlue=.1Prefs3 .11/a>lu1/spa v3e=.1 11/divv3e=.1 11form ac> ="ajax+*" method="post" onsubmit="return false;">lu1input typ hidden" nam ajax_lookup" id ajax_lookup" n> ">le=.1 11/formv3le=.1 11div class="headingbotttm">3 1div id file_contents"v
1 111/a>1spa  class="comment">/*1/spa v31 121/a>1spa  class="comment"> * rtc-palmas.c -- Palmas Real Time Clock driver.1/spa v31 131/a>l1 141/a>1spa  class="comment"> * RTC driver for TI Palma series devices like TPS65913,1/spa v31 151/a>1spa  class="comment"> * TPS65914 power management IC.1/spa v31 161/a>1spa  class="comment"> *1/spa v31 171/a>1spa  class="comment"> * Copyright (c) 2012, NVIDIA Corpora>
  .1/spa v31 181/a>1spa  class="comment"> *1/spa v31 191/a>1spa  class="comment"> * Author: Laxman Dewangan <ldewangan@nvidia.com>1/spa v31 
	  a>1spa  class="comment"> *1/spa v31 111/a>1spa  class="comment"> * This program is free software; you ca  redistribute it and/or1/spa v31 121/a>1spa  class="comment"> * modify it under the terms of the GNU General Public License as1/spa v31 131/a>1spa  class="comment"> * published by the Free Software Foundaoptionersptio2.1/spa v31 141/a>1spa  class="comment"> *1/spa v31 151/a>1spa  class="comment"> * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,1/spa v31 161/a>1spa  class="comment"> * whether express or implied; without even the implied warranty of1/spa v31 171/a>1spa  class="comment"> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU1/spa v31 181/a>1spa  class="comment"> * General Public License for more details.1/spa v31 191/a>1spa  class="comment"> *1/spa v31 2	  a>1spa  class="comment"> * You should have received a copy of the GNU General Public License1/spa v31 211/a>1spa  class="comment"> * along with this program; if not, write to the Free Software1/spa v31 221/a>1spa  class="comment"> * Foundaopti, Inc., 59 Temple Place, Suite 330, Bostti, MA1/spa v31 231/a>1spa  class="comment"> * 02111-1307, USA1/spa v31 241/a>1spa  class="comment"> */1/spa v31 251/a>l1 261/a>#include <linux/bcd.h1/a>>l1 271/a>#include <linux/errno.h1/a>>l1 281/a>#include <linux/init.h1/a>>l1 291/a>#include <linux/interrupt.h1/a>>l1 301/a>#include <linux/kernel.h1/a>>l1 311/a>#include <linux/mfd/palmas.h1/a>>l1 321/a>#include <linux/module.h1/a>>l1 331/a>#include <linux/rtc.h1/a>>l1 341/a>#include <linux/typ s.h1/a>>l1 351/a>#include <linux/platform_device.h1/a>>l1 361/a>#include <linux/pm.h1/a>>l1 371/a>l1 381/a>struct11a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> {l1 391/a>        struct11a href="+code=rtc_device" class="sref">rtc_device1/a>       *1a href="+code=rtc" class="sref">rtc1/a>;l1 401/a>        struct11a href="+code=device" class="sref">device1/a>           *1a href="+code=dev" class="sref">dev1/a>;l1 411/a>        unsigned int           11a href="+code=irq" class="sref">irq1/a>;l1 421/a>};l1 431/a>l1 441/a>1spa  class="comment">/* Total number of RTC registers needed to set time*/1/spa v31 451/a>#define11a href="+code=PALMAS_NUM_TIME_REGS" class="sref">PALMAS_NUM_TIME_REGS1/a>    (1a href="+code=PALMAS_YEARS_REG" class="sref">PALMAS_YEARS_REG1/a> -11a href="+code=PALMAS_SECONDS_REG" class="sref">PALMAS_SECONDS_REG1/a> + 1)31 461/a>l1 471/a>static int 1a href="+code=palmas_rtc_read_time" class="sref">palmas_rtc_read_time1/a>(struct11a href="+code=device" class="sref">device1/a> *1a href="+code=dev" class="sref">dev1/a>, struct11a href="+code=rtc_time" class="sref">rtc_time1/a> *1a href="+code=tm" class="sref">tm1/a>)31 481/a>{l1 491/a>        unsigned char11a href="+code=rtc_data" class="sref">rtc_data1/a>[1a href="+code=PALMAS_NUM_TIME_REGS" class="sref">PALMAS_NUM_TIME_REGS1/a>];l1 501/a>        struct11a href="+code=palmas" class="sref">palmas1/a> *1a href="+code=palmas" class="sref">palmas1/a> =11a href="+code=dev_get_drvdata" class="sref">dev_get_drvdata1/a>(1a href="+code=dev" class="sref">dev1/a>->1a href="+code=parent" class="sref">parent1/a>);l1 511/a>        int 1a href="+code=ret" class="sref">ret1/a>;l1 521/a>l1 531/a>        1spa  class="comment">/* Copy RTC counting registers to static registers or latches */1/spa v31 541/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_update_bits" class="sref">palmas_update_bits1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,11a href="+code=PALMAS_RTC_CTRL_REG" class="sref">PALMAS_RTC_CTRL_REG1/a>,31 551/a>                1a href="+code=PALMAS_RTC_CTRL_REG_GET_TIME" class="sref">PALMAS_RTC_CTRL_REG_GET_TIME1/a>,11a href="+code=PALMAS_RTC_CTRL_REG_GET_TIME" class="sref">PALMAS_RTC_CTRL_REG_GET_TIME1/a>);l1 561/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l1 571/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC CTRL reg update failed, err: %d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l1 581/a>                return 1a href="+code=ret" class="sref">ret1/a>;l1 591/a>        }31 601/a>l1 611/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_bulk_read" class="sref">palmas_bulk_read1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,11a href="+code=PALMAS_SECONDS_REG" class="sref">PALMAS_SECONDS_REG1/a>,31 621/a>                        1a href="+code=rtc_data" class="sref">rtc_data1/a>,11a href="+code=PALMAS_NUM_TIME_REGS" class="sref">PALMAS_NUM_TIME_REGS1/a>);l1 631/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l1 641/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC_SECONDS reg read failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l1 651/a>                return 1a href="+code=ret" class="sref">ret1/a>;l1 661/a>        }31 671/a>l1 681/a>        1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_sec" class="sref">tm_sec1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=rtc_data" class="sref">rtc_data1/a>[0]);l1 691/a>        1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_min" class="sref">tm_min1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=rtc_data" class="sref">rtc_data1/a>[1]);l1 701/a>        1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_hour" class="sref">tm_hour1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=rtc_data" class="sref">rtc_data1/a>[2]);l1 711/a>        1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_mday" class="sref">tm_mday1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=rtc_data" class="sref">rtc_data1/a>[3]);l1 721/a>        1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_mon" class="sref">tm_mon1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=rtc_data" class="sref">rtc_data1/a>[4]) - 1;l1 731/a>        1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_year" class="sref">tm_year1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=rtc_data" class="sref">rtc_data1/a>[5]) + 100;l1 741/a>l1 751/a>        return 1a href="+code=ret" class="sref">ret1/a>;l1 761/a>}31 771/a>l1 781/a>static int 1a href="+code=palmas_rtc_set_time" class="sref">palmas_rtc_set_time1/a>(struct11a href="+code=device" class="sref">device1/a> *1a href="+code=dev" class="sref">dev1/a>, struct11a href="+code=rtc_time" class="sref">rtc_time1/a> *1a href="+code=tm" class="sref">tm1/a>)31 791/a>{l1 801/a>        unsigned char11a href="+code=rtc_data" class="sref">rtc_data1/a>[1a href="+code=PALMAS_NUM_TIME_REGS" class="sref">PALMAS_NUM_TIME_REGS1/a>];l1 811/a>        struct11a href="+code=palmas" class="sref">palmas1/a> *1a href="+code=palmas" class="sref">palmas1/a> =11a href="+code=dev_get_drvdata" class="sref">dev_get_drvdata1/a>(1a href="+code=dev" class="sref">dev1/a>->1a href="+code=parent" class="sref">parent1/a>);l1 821/a>        int 1a href="+code=ret" class="sref">ret1/a>;l1 831/a>l1 841/a>        1a href="+code=rtc_data" class="sref">rtc_data1/a>[0] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_sec" class="sref">tm_sec1/a>);l1 851/a>        1a href="+code=rtc_data" class="sref">rtc_data1/a>[1] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_min" class="sref">tm_min1/a>);l1 861/a>        1a href="+code=rtc_data" class="sref">rtc_data1/a>[2] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_hour" class="sref">tm_hour1/a>);l1 871/a>        1a href="+code=rtc_data" class="sref">rtc_data1/a>[3] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_mday" class="sref">tm_mday1/a>);l1 881/a>        1a href="+code=rtc_data" class="sref">rtc_data1/a>[4] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_mon" class="sref">tm_mon1/a> + 1);l1 891/a>        1a href="+code=rtc_data" class="sref">rtc_data1/a>[5] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=tm" class="sref">tm1/a>->1a href="+code=tm_year" class="sref">tm_year1/a> - 100);l1 901/a>l1 911/a>        1spa  class="comment">/* Stop RTC while updating the RTC time registers */1/spa v31 921/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_update_bits" class="sref">palmas_update_bits1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,11a href="+code=PALMAS_RTC_CTRL_REG" class="sref">PALMAS_RTC_CTRL_REG1/a>,31 931/a>                1a href="+code=PALMAS_RTC_CTRL_REG_STOP_RTC" class="sref">PALMAS_RTC_CTRL_REG_STOP_RTC1/a>,10);l1 941/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l1 951/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC stop failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l1 961/a>                return 1a href="+code=ret" class="sref">ret1/a>;l1 971/a>        }31 981/a>l1 991/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_bulk_write" class="sref">palmas_bulk_write1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,11a href="+code=PALMAS_SECONDS_REG" class="sref">PALMAS_SECONDS_REG1/a>,311001/a>                1a href="+code=rtc_data" class="sref">rtc_data1/a>,11a href="+code=PALMAS_NUM_TIME_REGS" class="sref">PALMAS_NUM_TIME_REGS1/a>);l11011/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l11021/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC_SECONDS reg write failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l11031/a>                return 1a href="+code=ret" class="sref">ret1/a>;l11041/a>        }311051/a>l11061/a>        1spa  class="comment">/* Start back RTC */1/spa v311071/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_update_bits" class="sref">palmas_update_bits1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,11a href="+code=PALMAS_RTC_CTRL_REG" class="sref">PALMAS_RTC_CTRL_REG1/a>,311081/a>                1a href="+code=PALMAS_RTC_CTRL_REG_STOP_RTC" class="sref">PALMAS_RTC_CTRL_REG_STOP_RTC1/a>,11a href="+code=PALMAS_RTC_CTRL_REG_STOP_RTC" class="sref">PALMAS_RTC_CTRL_REG_STOP_RTC1/a>);l11091/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0)311101/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC start failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l11111/a>        return 1a href="+code=ret" class="sref">ret1/a>;l11121/a>}311131/a>l11141/a>static int 1a href="+code=palmas_rtc_alarm_irq_enable" class="sref">palmas_rtc_alarm_irq_enable1/a>(struct11a href="+code=device" class="sref">device1/a> *1a href="+code=dev" class="sref">dev1/a>, unsigned 1a href="+code=enabled" class="sref">enabled1/a>)311151/a>{l11161/a>        struct11a href="+code=palmas" class="sref">palmas1/a> *1a href="+code=palmas" class="sref">palmas1/a> =11a href="+code=dev_get_drvdata" class="sref">dev_get_drvdata1/a>(1a href="+code=dev" class="sref">dev1/a>->1a href="+code=parent" class="sref">parent1/a>);l11171/a>        1a href="+code=u8" class="sref">u81/a> 1a href="+code=val" class="sref">val1/a>;l11181/a>l11191/a>        1a href="+code=val" class="sref">val1/a> =11a href="+code=enabled" class="sref">enabled1/a> ?11a href="+code=PALMAS_RTC_INTERRUPTS_REG_IT_ALARM" class="sref">PALMAS_RTC_INTERRUPTS_REG_IT_ALARM1/a> : 0;l11201/a>        return 1a href="+code=palmas_write" class="sref">palmas_write1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,l11211/a>                1a href="+code=PALMAS_RTC_INTERRUPTS_REG" class="sref">PALMAS_RTC_INTERRUPTS_REG1/a>,11a href="+code=val" class="sref">val1/a>);l11221/a>}311231/a>l11241/a>static int 1a href="+code=palmas_rtc_read_alarm" class="sref">palmas_rtc_read_alarm1/a>(struct11a href="+code=device" class="sref">device1/a> *1a href="+code=dev" class="sref">dev1/a>, struct11a href="+code=rtc_wkalrm" class="sref">rtc_wkalrm1/a> *1a href="+code=alm" class="sref">alm1/a>)311251/a>{l11261/a>        unsigned char11a href="+code=alarm_data" class="sref">alarm_data1/a>[1a href="+code=PALMAS_NUM_TIME_REGS" class="sref">PALMAS_NUM_TIME_REGS1/a>];l11271/a>        1a href="+code=u32" class="sref">u321/a>11a href="+code=int_val" class="sref">int_val1/a>;l11281/a>        struct11a href="+code=palmas" class="sref">palmas1/a> *1a href="+code=palmas" class="sref">palmas1/a> =11a href="+code=dev_get_drvdata" class="sref">dev_get_drvdata1/a>(1a href="+code=dev" class="sref">dev1/a>->1a href="+code=parent" class="sref">parent1/a>);l11291/a>        int 1a href="+code=ret" class="sref">ret1/a>;l11301/a>l11311/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_bulk_read" class="sref">palmas_bulk_read1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,l11321/a>                        1a href="+code=PALMAS_ALARM_SECONDS_REG" class="sref">PALMAS_ALARM_SECONDS_REG1/a>,l11331/a>                        1a href="+code=alarm_data" class="sref">alarm_data1/a>,11a href="+code=PALMAS_NUM_TIME_REGS" class="sref">PALMAS_NUM_TIME_REGS1/a>);l11341/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l11351/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC_ALARM_SECONDS read failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l11361/a>                return 1a href="+code=ret" class="sref">ret1/a>;l11371/a>        }311381/a>l11391/a>        1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_sec" class="sref">tm_sec1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=alarm_data" class="sref">alarm_data1/a>[0]);l11401/a>        1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_min" class="sref">tm_min1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=alarm_data" class="sref">alarm_data1/a>[1]);l11411/a>        1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_hour" class="sref">tm_hour1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=alarm_data" class="sref">alarm_data1/a>[2]);l11421/a>        1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_mday" class="sref">tm_mday1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=alarm_data" class="sref">alarm_data1/a>[3]);l11431/a>        1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_mon" class="sref">tm_mon1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=alarm_data" class="sref">alarm_data1/a>[4]) - 1;l11441/a>        1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_year" class="sref">tm_year1/a> =11a href="+code=bcd2bin" class="sref">bcd2bin1/a>(1a href="+code=alarm_data" class="sref">alarm_data1/a>[5]) + 100;l11451/a>l11461/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_read" class="sref">palmas_read1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,11a href="+code=PALMAS_RTC_INTERRUPTS_REG" class="sref">PALMAS_RTC_INTERRUPTS_REG1/a>,l11471/a>                        &1a href="+code=int_val" class="sref">int_val1/a>);l11481/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l11491/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC_INTERRUPTS reg read failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l11501/a>                return 1a href="+code=ret" class="sref">ret1/a>;l11511/a>        }311521/a>l11531/a>        if (1a href="+code=int_val" class="sref">int_val1/a> &11a href="+code=PALMAS_RTC_INTERRUPTS_REG_IT_ALARM" class="sref">PALMAS_RTC_INTERRUPTS_REG_IT_ALARM1/a>)311541/a>                1a href="+code=alm" class="sref">alm1/a>->1a href="+code=enabled" class="sref">enabled1/a> = 1;l11551/a>        return 1a href="+code=ret" class="sref">ret1/a>;l11561/a>}311571/a>l11581/a>static int 1a href="+code=palmas_rtc_set_alarm" class="sref">palmas_rtc_set_alarm1/a>(struct11a href="+code=device" class="sref">device1/a> *1a href="+code=dev" class="sref">dev1/a>, struct11a href="+code=rtc_wkalrm" class="sref">rtc_wkalrm1/a> *1a href="+code=alm" class="sref">alm1/a>)311591/a>{l11601/a>        unsigned char11a href="+code=alarm_data" class="sref">alarm_data1/a>[1a href="+code=PALMAS_NUM_TIME_REGS" class="sref">PALMAS_NUM_TIME_REGS1/a>];l11611/a>        struct11a href="+code=palmas" class="sref">palmas1/a> *1a href="+code=palmas" class="sref">palmas1/a> =11a href="+code=dev_get_drvdata" class="sref">dev_get_drvdata1/a>(1a href="+code=dev" class="sref">dev1/a>->1a href="+code=parent" class="sref">parent1/a>);l11621/a>        int 1a href="+code=ret" class="sref">ret1/a>;l11631/a>l11641/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_rtc_alarm_irq_enable" class="sref">palmas_rtc_alarm_irq_enable1/a>(1a href="+code=dev" class="sref">dev1/a>, 0);l11651/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l11661/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"Disable RTC alarm failed\n"1/spa v);l11671/a>                return 1a href="+code=ret" class="sref">ret1/a>;l11681/a>        }311691/a>311701/a>        1a href="+code=alarm_data" class="sref">alarm_data1/a>[0] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_sec" class="sref">tm_sec1/a>);l11711/a>        1a href="+code=alarm_data" class="sref">alarm_data1/a>[1] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_min" class="sref">tm_min1/a>);l11721/a>        1a href="+code=alarm_data" class="sref">alarm_data1/a>[2] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_hour" class="sref">tm_hour1/a>);l11731/a>        1a href="+code=alarm_data" class="sref">alarm_data1/a>[3] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_mday" class="sref">tm_mday1/a>);l11741/a>        1a href="+code=alarm_data" class="sref">alarm_data1/a>[4] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_mon" class="sref">tm_mon1/a> + 1);l11751/a>        1a href="+code=alarm_data" class="sref">alarm_data1/a>[5] =11a href="+code=bin2bcd" class="sref">bin2bcd1/a>(1a href="+code=alm" class="sref">alm1/a>->1a href="+code=time" class="sref">time1/a>.1a href="+code=tm_year" class="sref">tm_year1/a> - 100);l11761/a>l11771/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_bulk_write" class="sref">palmas_bulk_write1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,l11781/a>                1a href="+code=PALMAS_ALARM_SECONDS_REG" class="sref">PALMAS_ALARM_SECONDS_REG1/a>, 1a href="+code=alarm_data" class="sref">alarm_data1/a>,11a href="+code=PALMAS_NUM_TIME_REGS" class="sref">PALMAS_NUM_TIME_REGS1/a>);l11791/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l11801/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"ALARM_SECONDS_REG write failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l11811/a>                return 1a href="+code=ret" class="sref">ret1/a>;l11821/a>        }311831/a>l11841/a>        if (1a href="+code=alm" class="sref">alm1/a>->1a href="+code=enabled" class="sref">enabled1/a>)311851/a>                1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_rtc_alarm_irq_enable" class="sref">palmas_rtc_alarm_irq_enable1/a>(1a href="+code=dev" class="sref">dev1/a>, 1);l11861/a>        return 1a href="+code=ret" class="sref">ret1/a>;l11871/a>}311881/a>l11891/a>static int 1a href="+code=palmas_clear_interrupts" class="sref">palmas_clear_interrupts1/a>(struct11a href="+code=device" class="sref">device1/a> *1a href="+code=dev" class="sref">dev1/a>)311901/a>{l11911/a>        struct11a href="+code=palmas" class="sref">palmas1/a> *1a href="+code=palmas" class="sref">palmas1/a> =11a href="+code=dev_get_drvdata" class="sref">dev_get_drvdata1/a>(1a href="+code=dev" class="sref">dev1/a>->1a href="+code=parent" class="sref">parent1/a>);l11921/a>        unsigned int 1a href="+code=rtc_reg" class="sref">rtc_reg1/a>;l11931/a>        int 1a href="+code=ret" class="sref">ret1/a>;l11941/a>l11951/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_read" class="sref">palmas_read1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,11a href="+code=PALMAS_RTC_STATUS_REG" class="sref">PALMAS_RTC_STATUS_REG1/a>,l11961/a>                                &1a href="+code=rtc_reg" class="sref">rtc_reg1/a>);l11971/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l11981/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC_STATUS read failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l11991/a>                return 1a href="+code=ret" class="sref">ret1/a>;l12001/a>        }312011/a>312021/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_write" class="sref">palmas_write1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,11a href="+code=PALMAS_RTC_STATUS_REG" class="sref">PALMAS_RTC_STATUS_REG1/a>,l12031/a>                        1a href="+code=rtc_reg" class="sref">rtc_reg1/a>);l12041/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l12051/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC_STATUS write failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l12061/a>                return 1a href="+code=ret" class="sref">ret1/a>;l12071/a>        }312081/a>        return 0;l12091/a>}312101/a>l12111/a>static 1a href="+code=irqreturn_t" class="sref">irqreturn_t1/a> 1a href="+code=palmas_rtc_interrupt" class="sref">palmas_rtc_interrupt1/a>(int 1a href="+code=irq" class="sref">irq1/a>, void *1a href="+code=context" class="sref">context1/a>)312121/a>{l12131/a>        struct11a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> *1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> =11a href="+code=context" class="sref">context1/a>;l12141/a>        struct11a href="+code=device" class="sref">device1/a> *1a href="+code=dev" class="sref">dev1/a> =11a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=dev" class="sref">dev1/a>;l12151/a>        int 1a href="+code=ret" class="sref">ret1/a>;l12161/a>l12171/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_clear_interrupts" class="sref">palmas_clear_interrupts1/a>(1a href="+code=dev" class="sref">dev1/a>);l12181/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l12191/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC interrupt clear failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l12201/a>                return 1a href="+code=IRQ_NONE" class="sref">IRQ_NONE1/a>;l12211/a>        }312221/a>l12231/a>        1a href="+code=rtc_update_irq" class="sref">rtc_update_irq1/a>(1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=rtc" class="sref">rtc1/a>, 1,11a href="+code=RTC_IRQF" class="sref">RTC_IRQF1/a> |11a href="+code=RTC_AF" class="sref">RTC_AF1/a>);l12241/a>        return 1a href="+code=IRQ_HANDLED" class="sref">IRQ_HANDLED1/a>;l12251/a>}312261/a>l12271/a>static struct11a href="+code=rtc_class_ops" class="sref">rtc_class_ops1/a> 1a href="+code=palmas_rtc_ops" class="sref">palmas_rtc_ops1/a> =1{l12281/a>        .1a href="+code=read_time" class="sref">read_time1/a>      =11a href="+code=palmas_rtc_read_time" class="sref">palmas_rtc_read_time1/a>,l12291/a>        .1a href="+code=set_time" class="sref">set_time1/a>       =11a href="+code=palmas_rtc_set_time" class="sref">palmas_rtc_set_time1/a>,l12301/a>        .1a href="+code=read_alarm" class="sref">read_alarm1/a>     =11a href="+code=palmas_rtc_read_alarm" class="sref">palmas_rtc_read_alarm1/a>,l12311/a>        .1a href="+code=set_alarm" class="sref">set_alarm1/a>      =11a href="+code=palmas_rtc_set_alarm" class="sref">palmas_rtc_set_alarm1/a>,l12321/a>        .1a href="+code=alarm_irq_enable" class="sref">alarm_irq_enable1/a> =11a href="+code=palmas_rtc_alarm_irq_enable" class="sref">palmas_rtc_alarm_irq_enable1/a>,l12331/a>};l12341/a>l12351/a>static int 1a href="+code=palmas_rtc_probe" class="sref">palmas_rtc_probe1/a>(struct11a href="+code=platform_device" class="sref">platform_device1/a> *1a href="+code=pdev" class="sref">pdev1/a>)312361/a>{l12371/a>        struct11a href="+code=palmas" class="sref">palmas1/a> *1a href="+code=palmas" class="sref">palmas1/a> =11a href="+code=dev_get_drvdata" class="sref">dev_get_drvdata1/a>(1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>.1a href="+code=parent" class="sref">parent1/a>);l12381/a>        struct11a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> *1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> =11a href="+code=NULL" class="sref">NULL1/a>;l12391/a>        int 1a href="+code=ret" class="sref">ret1/a>;l12401/a>l12411/a>        1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> =11a href="+code=devm_kzalloc" class="sref">devm_kzalloc1/a>(&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>, sizeof(struct11a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>),l12421/a>                        1a href="+code=GFP_KERNEL" class="sref">GFP_KERNEL1/a>);l12431/a>        if (!1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>)l12441/a>                return -1a href="+code=ENOMEM" class="sref">ENOMEM1/a>;l12451/a>l12461/a>        1spa  class="comment">/* Clear pending interrupts */1/spa v312471/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_clear_interrupts" class="sref">palmas_clear_interrupts1/a>(&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>);l12481/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l12491/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"clear RTC int failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l12501/a>                return 1a href="+code=ret" class="sref">ret1/a>;l12511/a>        }312521/a>l12531/a>        1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=dev" class="sref">dev1/a> =1&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>;l12541/a>        1a href="+code=platform_set_drvdata" class="sref">platform_set_drvdata1/a>(1a href="+code=pdev" class="sref">pdev1/a>,11a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>);l12551/a>l12561/a>        1spa  class="comment">/* Start RTC */1/spa v312571/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=palmas_update_bits" class="sref">palmas_update_bits1/a>(1a href="+code=palmas" class="sref">palmas1/a>,11a href="+code=PALMAS_RTC_BASE" class="sref">PALMAS_RTC_BASE1/a>,11a href="+code=PALMAS_RTC_CTRL_REG" class="sref">PALMAS_RTC_CTRL_REG1/a>,312581/a>                        1a href="+code=PALMAS_RTC_CTRL_REG_STOP_RTC" class="sref">PALMAS_RTC_CTRL_REG_STOP_RTC1/a>,312591/a>                        1a href="+code=PALMAS_RTC_CTRL_REG_STOP_RTC" class="sref">PALMAS_RTC_CTRL_REG_STOP_RTC1/a>);l12601/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l12611/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC_CTRL write failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l12621/a>                return 1a href="+code=ret" class="sref">ret1/a>;l12631/a>        }312641/a>l12651/a>        1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=irq" class="sref">irq1/a> =11a href="+code=platform_get_irq" class="sref">platform_get_irq1/a>(1a href="+code=pdev" class="sref">pdev1/a>,10);l12661/a>l12671/a>        1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=rtc" class="sref">rtc1/a> =11a href="+code=rtc_device_register" class="sref">rtc_device_register1/a>(1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=nam " class="sref">nam 1/a>,1&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>,l12681/a>                                &1a href="+code=palmas_rtc_ops" class="sref">palmas_rtc_ops1/a>,11a href="+code=THIS_MODULE" class="sref">THIS_MODULE1/a>);l12691/a>        if (1a href="+code=IS_ERR" class="sref">IS_ERR1/a>(1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=rtc" class="sref">rtc1/a>)) {l12701/a>                1a href="+code=ret" class="sref">ret1/a> =11a href="+code=PTR_ERR" class="sref">PTR_ERR1/a>(1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=rtc" class="sref">rtc1/a>);l12711/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"RTC register failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l12721/a>                return 1a href="+code=ret" class="sref">ret1/a>;l12731/a>        }312741/a>l12751/a>        1a href="+code=ret" class="sref">ret1/a> =11a href="+code=request_threaded_irq" class="sref">request_threaded_irq1/a>(1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=irq" class="sref">irq1/a>, 1a href="+code=NULL" class="sref">NULL1/a>,l12761/a>                        1a href="+code=palmas_rtc_interrupt" class="sref">palmas_rtc_interrupt1/a>,l12771/a>                        1a href="+code=IRQF_TRIGGER_LOW" class="sref">IRQF_TRIGGER_LOW1/a> |11a href="+code=IRQF_ONESHOT" class="sref">IRQF_ONESHOT1/a> |l12781/a>                        1a href="+code=IRQF_EARLY_RESUME" class="sref">IRQF_EARLY_RESUME1/a>,l12791/a>                        1a href="+code=dev_nam " class="sref">dev_nam 1/a>(&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>),11a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>);l12801/a>        if (1a href="+code=ret" class="sref">ret1/a> < 0) {l12811/a>                1a href="+code=dev_err" class="sref">dev_err1/a>(&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>, 1spa  class="string">"IRQ request failed, err =1%d\n"1/spa v,11a href="+code=ret" class="sref">ret1/a>);l12821/a>                1a href="+code=rtc_device_unregister" class="sref">rtc_device_unregister1/a>(1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=rtc" class="sref">rtc1/a>);l12831/a>                return 1a href="+code=ret" class="sref">ret1/a>;l12841/a>        }312851/a>l12861/a>        1a href="+code=device_set_wakeup_capable" class="sref">device_set_wakeup_capable1/a>(&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>, 1);l12871/a>        return 0;l12881/a>}312891/a>312901/a>static int 1a href="+code=palmas_rtc_remove" class="sref">palmas_rtc_remove1/a>(struct11a href="+code=platform_device" class="sref">platform_device1/a> *1a href="+code=pdev" class="sref">pdev1/a>)312911/a>{l12921/a>        struct11a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> *1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> =11a href="+code=platform_get_drvdata" class="sref">platform_get_drvdata1/a>(1a href="+code=pdev" class="sref">pdev1/a>);l12931/a>l12941/a>        1a href="+code=palmas_rtc_alarm_irq_enable" class="sref">palmas_rtc_alarm_irq_enable1/a>(&1a href="+code=pdev" class="sref">pdev1/a>->1a href="+code=dev" class="sref">dev1/a>, 0);l12951/a>        1a href="+code=free_irq" class="sref">free_irq1/a>(1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=irq" class="sref">irq1/a>, 1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>);l12961/a>        1a href="+code=rtc_device_unregister" class="sref">rtc_device_unregister1/a>(1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=rtc" class="sref">rtc1/a>);l12971/a>        return 0;l12981/a>}312991/a>313001/a>#ifdef 1a href="+code=CONFIG_PM_SLEEP" class="sref">CONFIG_PM_SLEEP1/a>313011/a>static int 1a href="+code=palmas_rtc_suspend" class="sref">palmas_rtc_suspend1/a>(struct11a href="+code=device" class="sref">device1/a> *1a href="+code=dev" class="sref">dev1/a>)313021/a>{l13031/a>        struct11a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> *1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> =11a href="+code=dev_get_drvdata" class="sref">dev_get_drvdata1/a>(1a href="+code=dev" class="sref">dev1/a>);l13041/a>l13051/a>        if (1a href="+code=device_may_wakeup" class="sref">device_may_wakeup1/a>(1a href="+code=dev" class="sref">dev1/a>))313061/a>                1a href="+code=enable_irq_wake" class="sref">enable_irq_wake1/a>(1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=irq" class="sref">irq1/a>);l13071/a>        return 0;l13081/a>}313091/a>313101/a>static int 1a href="+code=palmas_rtc_resume" class="sref">palmas_rtc_resume1/a>(struct11a href="+code=device" class="sref">device1/a> *1a href="+code=dev" class="sref">dev1/a>)313111/a>{l13121/a>        struct11a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> *1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a> =11a href="+code=dev_get_drvdata" class="sref">dev_get_drvdata1/a>(1a href="+code=dev" class="sref">dev1/a>);l13131/a>l13141/a>        if (1a href="+code=device_may_wakeup" class="sref">device_may_wakeup1/a>(1a href="+code=dev" class="sref">dev1/a>))313151/a>                1a href="+code=disable_irq_wake" class="sref">disable_irq_wake1/a>(1a href="+code=palmas_rtc" class="sref">palmas_rtc1/a>->1a href="+code=irq" class="sref">irq1/a>);l13161/a>        return 0;l13171/a>}313181/a>#endif313191/a>313201/a>static const struct11a href="+code=dev_pm_ops" class="sref">dev_pm_ops1/a> 1a href="+code=palmas_rtc_pm_ops" class="sref">palmas_rtc_pm_ops1/a> =1{l13211/a>        1a href="+code=SET_SYSTEM_SLEEP_PM_OPS" class="sref">SET_SYSTEM_SLEEP_PM_OPS1/a>(1a href="+code=palmas_rtc_suspend" class="sref">palmas_rtc_suspend1/a>, 1a href="+code=palmas_rtc_resume" class="sref">palmas_rtc_resume1/a>)313221/a>};l13231/a>l13241/a>static struct11a href="+code=platform_driver" class="sref">platform_driver1/a> 1a href="+code=palmas_rtc_driver" class="sref">palmas_rtc_driver1/a> =1{l13251/a>        .1a href="+code=probe" class="sref">probe1/a>          =11a href="+code=palmas_rtc_probe" class="sref">palmas_rtc_probe1/a>,l13261/a>        .1a href="+code=remove" class="sref">remove1/a>         =11a href="+code=palmas_rtc_remove" class="sref">palmas_rtc_remove1/a>,l13271/a>        .1a href="+code=driver" class="sref">driver1/a>         =1{l13281/a>                .1a href="+code=owner" class="sref">owner1/a>  =11a href="+code=THIS_MODULE" class="sref">THIS_MODULE1/a>,l13291/a>                .1a href="+code=nam " class="sref">nam 1/a>   =11spa  class="string">"palmas-rtc"1/spa v,l13301/a>                .1a href="+code=pm" class="sref">pm1/a>     =1&1a href="+code=palmas_rtc_pm_ops" class="sref">palmas_rtc_pm_ops1/a>,l13311/a>        },l13321/a>};l13331/a>l13341/a>1a href="+code=module_platform_driver" class="sref">module_platform_driver1/a>(1a href="+code=palmas_rtc_driver" class="sref">palmas_rtc_driver1/a>);l13351/a>l13361/a>1a href="+code=MODULE_ALIAS" class="sref">MODULE_ALIAS1/a>(1spa  class="string">"platform:palmas_rtc"1/spa v);l13371/a>1a href="+code=MODULE_DESCRIPTION" class="sref">MODULE_DESCRIPTION1/a>(1spa  class="string">"TI PALMAS series RTC driver"1/spa v);l13381/a>1a href="+code=MODULE_AUTHOR" class="sref">MODULE_AUTHOR1/a>(1spa  class="string">"Laxma  Dewanga  <ldewanga @nvidia.com>"1/spa v);l13391/a>1a href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSE1/a>(1spa  class="string">"GPL v2"1/spa v);l13401/a>
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