linux/drivers/rtc/rtc-omap.c
<<
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3 31./a>.spaa class="comment">/*./spaalu3 32./a>.spaa class="comment"> * TI OMAP1 Real Time Clock interface for Linux./spaalu3 33./a>.spaa class="comment"> *./spaalu3 34./a>.spaa class="comment"> * Copyright (C) 2003 MontaVista Software, Inc../spaalu3 35./a>.spaa class="comment"> * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>./spaalu3 36./a>.spaa class="comment"> *./spaalu3 37./a>.spaa class="comment"> * Copyright (C) 2006 David Brownell (new RTC fram
work)./spaalu3 38./a>.spaa class="comment"> *./spaalu3 39./a>.spaa class="comment"> * This program is free software; you caa redistribute it and/or./spaalu3 ion a>.spaa class="comment"> * modify it under the terms of the GNU General Public License./spaalu3 11./a>.spaa class="comment"> * as published by the Free Software Foundan va; either vers va./spaalu3 12./a>.spaa class="comment"> * 2 of the License, or (at your ion va) any later vers va../spaalu3 13./a>.spaa class="comment"> */./spaalu3 14./a>u3 15./a>#include <linux/kernel.h./a>>u3 16./a>#include <linux/init.h./a>>u3 17./a>#include <linux/module.h./a>>u3 18./a>#include <linux/ioport.h./a>>u3 19./a>#include <linux/delay.h./a>>u3 20./a>#include <linux/rtc.h./a>>u3 21./a>#include <linux/bcd.h./a>>u3 22./a>#include <linux/platform_device.h./a>>u3 23./a>#include <linux/of.h./a>>u3 24./a>#include <linux/of_device.h./a>>u3 25./a>#include <linux/pm_runtime.h./a>>u3 26./a>u3 27./a>#include <asm/io.h./a>>u3 28./a>u3 29./a>u3 3on a>.spaa class="comment">/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock./spaalu3 31./a>.spaa class="comment"> * with century-range alarm matching, driven by the 32kHz clock../spaalu3 32./a>.spaa class="comment"> *./spaalu3 33./a>.spaa class="comment"> * The main user-visible ways it differs from PC RTCs are by omitting./spaalu3 34./a>.spaa class="comment"> * "don't care" alarm fields and sub-second periodic IRQs, and having./spaalu3 35./a>.spaa class="comment"> * aa autoadjust mechanism to calibrate to the true oscillator rate../spaalu3 36./a>.spaa class="comment"> *./spaalu3 37./a>.spaa class="comment"> * Board-specific wiring ion vas include using split power mode with./spaalu3 38./a>.spaa class="comment"> * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),./spaalu3 39./a>.spaa class="comment"> * and wiring RTC_WAKE_INT (so the RTC alarm caa wake the system from./spaalu3 4on a>.spaa class="comment"> * low power modes) for OMAP1 boards (OMAP-L138 has this built into./spaalu3 41./a>.spaa class="comment"> * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment../spaalu3 42./a>.spaa class="comment"> */./spaalu3 43./a>u3 44./a>#define3.a href="+code=DRIVER_NAME" class="sref">DRIVER_NAME./a>                     .spaa class="string">"omap_rtc"./spaalu3 45./a>u3 46./a>#define3.a href="+code=OMAP_RTC_BASE" class="sref">OMAP_RTC_BASE./a>                   0xfffb4800u3 47./a>u3 48./a>.spaa class="comment">/* RTC registers */./spaalu3 49./a>#define3.a href="+code=OMAP_RTC_SECONDS_REG" class="sref">OMAP_RTC_SECONDS_REG./a>            0x00u3 50./a>#define3.a href="+code=OMAP_RTC_MINUTES_REG" class="sref">OMAP_RTC_MINUTES_REG./a>            0x04u3 51./a>#define3.a href="+code=OMAP_RTC_HOURS_REG" class="sref">OMAP_RTC_HOURS_REG./a>              0x08u3 52./a>#define3.a href="+code=OMAP_RTC_DAYS_REG" class="sref">OMAP_RTC_DAYS_REG./a>               0x0Cu3 53./a>#define3.a href="+code=OMAP_RTC_MONTHS_REG" class="sref">OMAP_RTC_MONTHS_REG./a>             0x10u3 54./a>#define3.a href="+code=OMAP_RTC_YEARS_REG" class="sref">OMAP_RTC_YEARS_REG./a>              0x14u3 55./a>#define3.a href="+code=OMAP_RTC_WEEKS_REG" class="sref">OMAP_RTC_WEEKS_REG./a>              0x18u3 56./a>u3 57./a>#define3.a href="+code=OMAP_RTC_ALARM_SECONDS_REG" class="sref">OMAP_RTC_ALARM_SECONDS_REG./a>      0x20u3 58./a>#define3.a href="+code=OMAP_RTC_ALARM_MINUTES_REG" class="sref">OMAP_RTC_ALARM_MINUTES_REG./a>      0x24u3 59./a>#define3.a href="+code=OMAP_RTC_ALARM_HOURS_REG" class="sref">OMAP_RTC_ALARM_HOURS_REG./a>        0x28u3 60./a>#define3.a href="+code=OMAP_RTC_ALARM_DAYS_REG" class="sref">OMAP_RTC_ALARM_DAYS_REG./a>         0x2cu3 61./a>#define3.a href="+code=OMAP_RTC_ALARM_MONTHS_REG" class="sref">OMAP_RTC_ALARM_MONTHS_REG./a>       0x30u3 62./a>#define3.a href="+code=OMAP_RTC_ALARM_YEARS_REG" class="sref">OMAP_RTC_ALARM_YEARS_REG./a>        0x34u3 63./a>u3 64./a>#define3.a href="+code=OMAP_RTC_CTRL_REG" class="sref">OMAP_RTC_CTRL_REG./a>               0x40u3 65./a>#define3.a href="+code=OMAP_RTC_STATUS_REG" class="sref">OMAP_RTC_STATUS_REG./a>             0x44u3 66./a>#define3.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>         0x48u3 67./a>u3 68./a>#define3.a href="+code=OMAP_RTC_COMP_LSB_REG" class="sref">OMAP_RTC_COMP_LSB_REG./a>           0x4cu3 69./a>#define3.a href="+code=OMAP_RTC_COMP_MSB_REG" class="sref">OMAP_RTC_COMP_MSB_REG./a>           0x50u3 70./a>#define3.a href="+code=OMAP_RTC_OSC_REG" class="sref">OMAP_RTC_OSC_REG./a>                0x54u3 71./a>u3 72./a>#define3.a href="+code=OMAP_RTC_KICK0_REG" class="sref">OMAP_RTC_KICK0_REG./a>              0x6cu3 73./a>#define3.a href="+code=OMAP_RTC_KICK1_REG" class="sref">OMAP_RTC_KICK1_REG./a>              0x70u3 74./a>u3 75./a>.spaa class="comment">/* OMAP_RTC_CTRL_REG bit fields: */./spaalu3 76./a>#define3.a href="+code=OMAP_RTC_CTRL_SPLIT" class="sref">OMAP_RTC_CTRL_SPLIT./a>             (1<<7)u3 77./a>#define3.a href="+code=OMAP_RTC_CTRL_DISABLE" class="sref">OMAP_RTC_CTRL_DISABLE./a>           (1<<6)u3 78./a>#define3.a href="+code=OMAP_RTC_CTRL_SET_32_COUNTER" class="sref">OMAP_RTC_CTRL_SET_32_COUNTER./a>    (1<<5)u3 79./a>#define3.a href="+code=OMAP_RTC_CTRL_TEST" class="sref">OMAP_RTC_CTRL_TEST./a>              (1<<4)u3 80./a>#define3.a href="+code=OMAP_RTC_CTRL_MODE_12_24" class="sref">OMAP_RTC_CTRL_MODE_12_24./a>        (1<<3)u3 81./a>#define3.a href="+code=OMAP_RTC_CTRL_AUTO_COMP" class="sref">OMAP_RTC_CTRL_AUTO_COMP./a>         (1<<2)u3 82./a>#define3.a href="+code=OMAP_RTC_CTRL_ROUND_30S" class="sref">OMAP_RTC_CTRL_ROUND_30S./a>         (1<<1)u3 83./a>#define3.a href="+code=OMAP_RTC_CTRL_STOP" class="sref">OMAP_RTC_CTRL_STOP./a>              (1<<0)u3 84./a>u3 85./a>.spaa class="comment">/* OMAP_RTC_STATUS_REG bit fields: */./spaalu3 86./a>#define3.a href="+code=OMAP_RTC_STATUS_POWER_UP" class="sref">OMAP_RTC_STATUS_POWER_UP./a>        (1<<7)u3 87./a>#define3.a href="+code=OMAP_RTC_STATUS_ALARM" class="sref">OMAP_RTC_STATUS_ALARM./a>           (1<<6)u3 88./a>#define3.a href="+code=OMAP_RTC_STATUS_1D_EVENT" class="sref">OMAP_RTC_STATUS_1D_EVENT./a>        (1<<5)u3 89./a>#define3.a href="+code=OMAP_RTC_STATUS_1H_EVENT" class="sref">OMAP_RTC_STATUS_1H_EVENT./a>        (1<<4)u3 90./a>#define3.a href="+code=OMAP_RTC_STATUS_1M_EVENT" class="sref">OMAP_RTC_STATUS_1M_EVENT./a>        (1<<3)u3 91./a>#define3.a href="+code=OMAP_RTC_STATUS_1S_EVENT" class="sref">OMAP_RTC_STATUS_1S_EVENT./a>        (1<<2)u3 92./a>#define3.a href="+code=OMAP_RTC_STATUS_RUN" class="sref">OMAP_RTC_STATUS_RUN./a>             (1<<1)u3 93./a>#define3.a href="+code=OMAP_RTC_STATUS_BUSY" class="sref">OMAP_RTC_STATUS_BUSY./a>            (1<<0)u3 94./a>u3 95./a>.spaa class="comment">/* OMAP_RTC_INTERRUPTS_REG bit fields: */./spaalu3 96./a>#define3.a href="+code=OMAP_RTC_INTERRUPTS_IT_ALARM" class="sref">OMAP_RTC_INTERRUPTS_IT_ALARM./a>    (1<<3)u3 97./a>#define3.a href="+code=OMAP_RTC_INTERRUPTS_IT_TIMER" class="sref">OMAP_RTC_INTERRUPTS_IT_TIMER./a>    (1<<2)u3 98./a>u3 99./a>.spaa class="comment">/* OMAP_RTC_KICKER 	  >
s */./spaalu3100./a>#define3.a href="+code=KICK0_VALUE" class="sref">KICK0_VALUE./a>                     0x83e70b13u3101./a>#define3.a href="+code=KICK1_VALUE" class="sref">KICK1_VALUE./a>                     0x95a4f1e0u3102./a>u3103./a>#define3.a href="+code=OMAP_RTC_HAS_KICKER" class="sref">OMAP_RTC_HAS_KICKER./a>             0x1u3104./a>u3105./a>static void3.a href="+code=__iomem" class="sref">__iomem./a>     *.a href="+code=rtc_base" class="sref">rtc_base./a>;u3106./a>u3107./a>#define3.a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=addr" class="sref">addr./a>)          .a href="+code=readb" class="sref">readb./a>(.a href="+code=rtc_base" class="sref">rtc_base./a> + (.a href="+code=addr" class="sref">addr./a>))u3108./a>#define3.a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=	  " class="sref">	  ./a>,3.a href="+code=addr" class="sref">addr./a>)    .a href="+code=writeb" class="sref">writeb./a>(.a href="+code=	  " class="sref">	  ./a>,3.a href="+code=rtc_base" class="sref">rtc_base./a> + (.a href="+code=addr" class="sref">addr./a>))u3109./a>u3110./a>#define3.a href="+code=rtc_write " class="sref">rtc_write ./a>(.a href="+code=	  " class="sref">	  ./a>,3.a href="+code=addr" class="sref">addr./a>)   .a href="+code=write " class="sref">write ./a>(.a href="+code=	  " class="sref">	  ./a>,3.a href="+code=rtc_base" class="sref">rtc_base./a> + (.a href="+code=addr" class="sref">addr./a>))u3111./a>u3112./a>u3113./a>.spaa class="comment">/* we rely 0"
the rtc fram
work to handle locking (rtc->ops_lock),./spaalu3114./a>.spaa class="comment"> * so the only 0ther requirement is that register access
s which./spaalu3115./a>.spaa class="comment"> * require BUSY to be clear are made with IRQs locally disabled./spaalu3116./a>.spaa class="comment"> */./spaalu3117./a>static void3.a href="+code=rtc_wait_not_busy" class="sref">rtc_wait_not_busy./a>(void)u3118./a>{u3119./a>        int     .a href="+code=count" class="sref">count./a> = 0;u3120./a>        .a href="+code=u8" class="sref">u8./a>      .a href="+code=status" class="sref">status./a>;u3121./a>u3122./a>        .spaa class="comment">/* BUSY may stay acn ve for 1/32768 second (~30 usec) */./spaalu3123./a>        for (.a href="+code=count" class="sref">count./a> = 0; .a href="+code=count" class="sref">count./a> < 50; .a href="+code=count" class="sref">count./a>++) {u3124./a>                .a href="+code=status" class="sref">status./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_STATUS_REG" class="sref">OMAP_RTC_STATUS_REG./a>);u3125./a>                if ((.a href="+code=status" class="sref">status./a> & (.a href="+code=u8" class="sref">u8./a>).a href="+code=OMAP_RTC_STATUS_BUSY" class="sref">OMAP_RTC_STATUS_BUSY./a>) == 0)u3126./a>                        break;u3127./a>                .a href="+code=udelay" class="sref">udelay./a>(1);u3128./a>        }u3129./a>        .spaa class="comment">/* now we have ~15 usec to read/write various registers */./spaalu313on a>}u3131./a>u3132./a>static .a href="+code=irqreturn_t" class="sref">irqreturn_t./a> .a href="+code=rtc_irq" class="sref">rtc_irq./a>(int .a href="+code=irq" class="sref">irq./a>,3void3*.a href="+code=rtc" class="sref">rtc./a>)u3133./a>{u3134./a>        unsigned long           .a href="+code=events" class="sref">events./a> = 0;u3135./a>        .a href="+code=u8" class="sref">u8./a>                      .a href="+code=irq_data" class="sref">irq_data./a>;u3136./a>u3137./a>        .a href="+code=irq_data" class="sref">irq_data./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_STATUS_REG" class="sref">OMAP_RTC_STATUS_REG./a>);u3138./a>u3139./a>        .spaa class="comment">/* alarm irq? */./spaalu3140./a>        if (.a href="+code=irq_data" class="sref">irq_data./a> & .a href="+code=OMAP_RTC_STATUS_ALARM" class="sref">OMAP_RTC_STATUS_ALARM./a>) {u3141./a>                .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=OMAP_RTC_STATUS_ALARM" class="sref">OMAP_RTC_STATUS_ALARM./a>,3.a href="+code=OMAP_RTC_STATUS_REG" class="sref">OMAP_RTC_STATUS_REG./a>);u3142./a>                .a href="+code=events" class="sref">events./a> |= .a href="+code=RTC_IRQF" class="sref">RTC_IRQF./a> | .a href="+code=RTC_AF" class="sref">RTC_AF./a>;u3143./a>        }u3144./a>u3145./a>        .spaa class="comment">/* 1/sec periodic/update irq? */./spaalu3146./a>        if (.a href="+code=irq_data" class="sref">irq_data./a> & .a href="+code=OMAP_RTC_STATUS_1S_EVENT" class="sref">OMAP_RTC_STATUS_1S_EVENT./a>)u3147./a>                .a href="+code=events" class="sref">events./a> |= .a href="+code=RTC_IRQF" class="sref">RTC_IRQF./a> | .a href="+code=RTC_UF" class="sref">RTC_UF./a>;u3148./a>u3149./a>        .a href="+code=rtc_update_irq" class="sref">rtc_update_irq./a>(.a href="+code=rtc" class="sref">rtc./a>, 1,3.a href="+code=events" class="sref">events./a>);u3150./a>u3151./a>        return .a href="+code=IRQ_HANDLED" class="sref">IRQ_HANDLED./a>;u3152./a>}u3153./a>u3154./a>static int .a href="+code=omap_rtc_alarm_irq_enable" class="sref">omap_rtc_alarm_irq_enable./a>(struct .a href="+code=device" class="sref">device./a> *.a href="+code=dev" class="sref">dev./a>, unsigned int .a href="+code=enabled" class="sref">enabled./a>)u3155./a>{u3156./a>        .a href="+code=u8" class="sref">u8./a> .a href="+code=reg" class="sref">reg./a>;u3157./a>u3158./a>        .a href="+code=local_irq_disable" class="sref">local_irq_disable./a>();u3159./a>        .a href="+code=rtc_wait_not_busy" class="sref">rtc_wait_not_busy./a>();u3160./a>        .a href="+code=reg" class="sref">reg./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>);u3161./a>        if (.a href="+code=enabled" class="sref">enabled./a>)u3162./a>                .a href="+code=reg" class="sref">reg./a> |= .a href="+code=OMAP_RTC_INTERRUPTS_IT_ALARM" class="sref">OMAP_RTC_INTERRUPTS_IT_ALARM./a>;u3163./a>        elseu3164./a>                .a href="+code=reg" class="sref">reg./a> &= ~.a href="+code=OMAP_RTC_INTERRUPTS_IT_ALARM" class="sref">OMAP_RTC_INTERRUPTS_IT_ALARM./a>;u3165./a>        .a href="+code=rtc_wait_not_busy" class="sref">rtc_wait_not_busy./a>();u3166./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=reg" class="sref">reg./a>,3.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>);u3167./a>        .a href="+code=local_irq_enable" class="sref">local_irq_enable./a>();u3168./a>u3169./a>        return 0;u317on a>}u3171./a>u3172./a>.spaa class="comment">/* this hardware doesn't support "don't care" alarm fields */./spaalu3173./a>static int .a href="+code=tm2bcd" class="sref">tm2bcd./a>(struct .a href="+code=rtc_time" class="sref">rtc_time./a> *.a href="+code=tm" class="sref">tm./a>)u3174./a>{u3175./a>        if (.a href="+code=rtc_valid_tm" class="sref">rtc_valid_tm./a>(.a href="+code=tm" class="sref">tm./a>) != 0)u3176./a>                return -.a href="+code=EINVAL" class="sref">EINVAL./a>;u3177./a>u3178./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_sec" class="sref">tm_sec./a> = .a href="+code=bin2bcd" class="sref">bin2bcd./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_sec" class="sref">tm_sec./a>);u3179./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_min" class="sref">tm_min./a> = .a href="+code=bin2bcd" class="sref">bin2bcd./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_min" class="sref">tm_min./a>);u3180./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_hour" class="sref">tm_hour./a> = .a href="+code=bin2bcd" class="sref">bin2bcd./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_hour" class="sref">tm_hour./a>);u3181./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mday" class="sref">tm_mday./a> = .a href="+code=bin2bcd" class="sref">bin2bcd./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mday" class="sref">tm_mday./a>);u3182./a>u3183./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mon" class="sref">tm_mon./a> = .a href="+code=bin2bcd" class="sref">bin2bcd./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mon" class="sref">tm_mon./a> + 1);u3184./a>u3185./a>        .spaa class="comment">/* epoch == 1900 */./spaalu3186./a>        if (.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_year" class="sref">tm_year./a> < 100 || .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_year" class="sref">tm_year./a> > 199)u3187./a>                return -.a href="+code=EINVAL" class="sref">EINVAL./a>;u3188./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_year" class="sref">tm_year./a> = .a href="+code=bin2bcd" class="sref">bin2bcd./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_year" class="sref">tm_year./a> - 100);u3189./a>u3190./a>        return 0;u3191./a>}u3192./a>u3193./a>static void3.a href="+code=bcd2tm" class="sref">bcd2tm./a>(struct .a href="+code=rtc_time" class="sref">rtc_time./a> *.a href="+code=tm" class="sref">tm./a>)u3194./a>{u3195./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_sec" class="sref">tm_sec./a> = .a href="+code=bcd2bin" class="sref">bcd2bin./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_sec" class="sref">tm_sec./a>);u3196./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_min" class="sref">tm_min./a> = .a href="+code=bcd2bin" class="sref">bcd2bin./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_min" class="sref">tm_min./a>);u3197./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_hour" class="sref">tm_hour./a> = .a href="+code=bcd2bin" class="sref">bcd2bin./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_hour" class="sref">tm_hour./a>);u3198./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mday" class="sref">tm_mday./a> = .a href="+code=bcd2bin" class="sref">bcd2bin./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mday" class="sref">tm_mday./a>);u3199./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mon" class="sref">tm_mon./a> = .a href="+code=bcd2bin" class="sref">bcd2bin./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mon" class="sref">tm_mon./a>) - 1;u3200./a>        .spaa class="comment">/* epoch == 1900 */./spaalu3201./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_year" class="sref">tm_year./a> = .a href="+code=bcd2bin" class="sref">bcd2bin./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_year" class="sref">tm_year./a>) + 100;u3202./a>}u3203./a>u3204./a>u3205./a>static int .a href="+code=omap_rtc_read_time" class="sref">omap_rtc_read_time./a>(struct .a href="+code=device" class="sref">device./a> *.a href="+code=dev" class="sref">dev./a>, struct .a href="+code=rtc_time" class="sref">rtc_time./a> *.a href="+code=tm" class="sref">tm./a>)u3206./a>{u3207./a>        .spaa class="comment">/* we don't report wday/yday/isdst ... */./spaalu3208./a>        .a href="+code=local_irq_disable" class="sref">local_irq_disable./a>();u3209./a>        .a href="+code=rtc_wait_not_busy" class="sref">rtc_wait_not_busy./a>();u3210./a>u3211./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_sec" class="sref">tm_sec./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_SECONDS_REG" class="sref">OMAP_RTC_SECONDS_REG./a>);u3212./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_min" class="sref">tm_min./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_MINUTES_REG" class="sref">OMAP_RTC_MINUTES_REG./a>);u3213./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_hour" class="sref">tm_hour./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_HOURS_REG" class="sref">OMAP_RTC_HOURS_REG./a>);u3214./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mday" class="sref">tm_mday./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_DAYS_REG" class="sref">OMAP_RTC_DAYS_REG./a>);u3215./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mon" class="sref">tm_mon./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_MONTHS_REG" class="sref">OMAP_RTC_MONTHS_REG./a>);u3216./a>        .a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_year" class="sref">tm_year./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_YEARS_REG" class="sref">OMAP_RTC_YEARS_REG./a>);u3217./a>u3218./a>        .a href="+code=local_irq_enable" class="sref">local_irq_enable./a>();u3219./a>u3220./a>        .a href="+code=bcd2tm" class="sref">bcd2tm./a>(.a href="+code=tm" class="sref">tm./a>);u3221./a>        return 0;u3222./a>}u3223./a>u3224./a>static int .a href="+code=omap_rtc_set_time" class="sref">omap_rtc_set_time./a>(struct .a href="+code=device" class="sref">device./a> *.a href="+code=dev" class="sref">dev./a>, struct .a href="+code=rtc_time" class="sref">rtc_time./a> *.a href="+code=tm" class="sref">tm./a>)u3225./a>{u3226./a>        if (.a href="+code=tm2bcd" class="sref">tm2bcd./a>(.a href="+code=tm" class="sref">tm./a>) < 0)u3227./a>                return -.a href="+code=EINVAL" class="sref">EINVAL./a>;u3228./a>        .a href="+code=local_irq_disable" class="sref">local_irq_disable./a>();u3229./a>        .a href="+code=rtc_wait_not_busy" class="sref">rtc_wait_not_busy./a>();u3230./a>u3231./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_year" class="sref">tm_year./a>,3.a href="+code=OMAP_RTC_YEARS_REG" class="sref">OMAP_RTC_YEARS_REG./a>);u3232./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mon" class="sref">tm_mon./a>,3.a href="+code=OMAP_RTC_MONTHS_REG" class="sref">OMAP_RTC_MONTHS_REG./a>);u3233./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_mday" class="sref">tm_mday./a>,3.a href="+code=OMAP_RTC_DAYS_REG" class="sref">OMAP_RTC_DAYS_REG./a>);u3234./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_hour" class="sref">tm_hour./a>,3.a href="+code=OMAP_RTC_HOURS_REG" class="sref">OMAP_RTC_HOURS_REG./a>);u3235./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_min" class="sref">tm_min./a>,3.a href="+code=OMAP_RTC_MINUTES_REG" class="sref">OMAP_RTC_MINUTES_REG./a>);u3236./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=tm" class="sref">tm./a>->.a href="+code=tm_sec" class="sref">tm_sec./a>,3.a href="+code=OMAP_RTC_SECONDS_REG" class="sref">OMAP_RTC_SECONDS_REG./a>);u3237./a>u3238./a>        .a href="+code=local_irq_enable" class="sref">local_irq_enable./a>();u3239./a>u3240./a>        return 0;u3241./a>}u3242./a>u3243./a>static int .a href="+code=omap_rtc_read_alarm" class="sref">omap_rtc_read_alarm./a>(struct .a href="+code=device" class="sref">device./a> *.a href="+code=dev" class="sref">dev./a>, struct .a href="+code=rtc_wkalrm" class="sref">rtc_wkalrm./a> *.a href="+code=alm" class="sref">alm./a>)u3244./a>{u3245./a>        .a href="+code=local_irq_disable" class="sref">local_irq_disable./a>();u3246./a>        .a href="+code=rtc_wait_not_busy" class="sref">rtc_wait_not_busy./a>();u3247./a>u3248./a>        .a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_sec" class="sref">tm_sec./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_ALARM_SECONDS_REG" class="sref">OMAP_RTC_ALARM_SECONDS_REG./a>);u3249./a>        .a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_min" class="sref">tm_min./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_ALARM_MINUTES_REG" class="sref">OMAP_RTC_ALARM_MINUTES_REG./a>);u3250./a>        .a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_hour" class="sref">tm_hour./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_ALARM_HOURS_REG" class="sref">OMAP_RTC_ALARM_HOURS_REG./a>);u3251./a>        .a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_mday" class="sref">tm_mday./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_ALARM_DAYS_REG" class="sref">OMAP_RTC_ALARM_DAYS_REG./a>);u3252./a>        .a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_mon" class="sref">tm_mon./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_ALARM_MONTHS_REG" class="sref">OMAP_RTC_ALARM_MONTHS_REG./a>);u3253./a>        .a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_year" class="sref">tm_year./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_ALARM_YEARS_REG" class="sref">OMAP_RTC_ALARM_YEARS_REG./a>);u3254./a>u3255./a>        .a href="+code=local_irq_enable" class="sref">local_irq_enable./a>();u3256./a>u3257./a>        .a href="+code=bcd2tm" class="sref">bcd2tm./a>(&.a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>);u3258./a>        .a href="+code=alm" class="sref">alm./a>->.a href="+code=enabled" class="sref">enabled./a> = !!(.a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>)u3259./a>                        & .a href="+code=OMAP_RTC_INTERRUPTS_IT_ALARM" class="sref">OMAP_RTC_INTERRUPTS_IT_ALARM./a>);u3260./a>u3261./a>        return 0;u3262./a>}u3263./a>u3264./a>static int .a href="+code=omap_rtc_set_alarm" class="sref">omap_rtc_set_alarm./a>(struct .a href="+code=device" class="sref">device./a> *.a href="+code=dev" class="sref">dev./a>, struct .a href="+code=rtc_wkalrm" class="sref">rtc_wkalrm./a> *.a href="+code=alm" class="sref">alm./a>)u3265./a>{u3266./a>        .a href="+code=u8" class="sref">u8./a> .a href="+code=reg" class="sref">reg./a>;u3267./a>u3268./a>        if (.a href="+code=tm2bcd" class="sref">tm2bcd./a>(&.a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>) < 0)u3269./a>                return -.a href="+code=EINVAL" class="sref">EINVAL./a>;u3270./a>u3271./a>        .a href="+code=local_irq_disable" class="sref">local_irq_disable./a>();u3272./a>        .a href="+code=rtc_wait_not_busy" class="sref">rtc_wait_not_busy./a>();u3273./a>u3274./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_year" class="sref">tm_year./a>,3.a href="+code=OMAP_RTC_ALARM_YEARS_REG" class="sref">OMAP_RTC_ALARM_YEARS_REG./a>);u3275./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_mon" class="sref">tm_mon./a>,3.a href="+code=OMAP_RTC_ALARM_MONTHS_REG" class="sref">OMAP_RTC_ALARM_MONTHS_REG./a>);u3276./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_mday" class="sref">tm_mday./a>,3.a href="+code=OMAP_RTC_ALARM_DAYS_REG" class="sref">OMAP_RTC_ALARM_DAYS_REG./a>);u3277./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_hour" class="sref">tm_hour./a>,3.a href="+code=OMAP_RTC_ALARM_HOURS_REG" class="sref">OMAP_RTC_ALARM_HOURS_REG./a>);u3278./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_min" class="sref">tm_min./a>,3.a href="+code=OMAP_RTC_ALARM_MINUTES_REG" class="sref">OMAP_RTC_ALARM_MINUTES_REG./a>);u3279./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=alm" class="sref">alm./a>->.a href="+code=time" class="sref">time./a>..a href="+code=tm_sec" class="sref">tm_sec./a>,3.a href="+code=OMAP_RTC_ALARM_SECONDS_REG" class="sref">OMAP_RTC_ALARM_SECONDS_REG./a>);u3280./a>u3281./a>        .a href="+code=reg" class="sref">reg./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>);u3282./a>        if (.a href="+code=alm" class="sref">alm./a>->.a href="+code=enabled" class="sref">enabled./a>)u3283./a>                .a href="+code=reg" class="sref">reg./a> |= .a href="+code=OMAP_RTC_INTERRUPTS_IT_ALARM" class="sref">OMAP_RTC_INTERRUPTS_IT_ALARM./a>;u3284./a>        elseu3285./a>                .a href="+code=reg" class="sref">reg./a> &= ~.a href="+code=OMAP_RTC_INTERRUPTS_IT_ALARM" class="sref">OMAP_RTC_INTERRUPTS_IT_ALARM./a>;u3286./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=reg" class="sref">reg./a>,3.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>);u3287./a>u3288./a>        .a href="+code=local_irq_enable" class="sref">local_irq_enable./a>();u3289./a>u3290./a>        return 0;u3291./a>}u3292./a>u3293./a>static struct .a href="+code=rtc_class_ops" class="sref">rtc_class_ops./a> .a href="+code=omap_rtc_ops" class="sref">omap_rtc_ops./a> = {u3294./a>        ..a href="+code=read_time" class="sref">read_time./a>      = .a href="+code=omap_rtc_read_time" class="sref">omap_rtc_read_time./a>,u3295./a>        ..a href="+code=set_time" class="sref">set_time./a>       = .a href="+code=omap_rtc_set_time" class="sref">omap_rtc_set_time./a>,u3296./a>        ..a href="+code=read_alarm" class="sref">read_alarm./a>     = .a href="+code=omap_rtc_read_alarm" class="sref">omap_rtc_read_alarm./a>,u3297./a>        ..a href="+code=set_alarm" class="sref">set_alarm./a>      = .a href="+code=omap_rtc_set_alarm" class="sref">omap_rtc_set_alarm./a>,u3298./a>        ..a href="+code=alarm_irq_enable" class="sref">alarm_irq_enable./a> = .a href="+code=omap_rtc_alarm_irq_enable" class="sref">omap_rtc_alarm_irq_enable./a>,u3299./a>};u3300./a>u3301./a>static int .a href="+code=omap_rtc_alarm" class="sref">omap_rtc_alarm./a>;u3302./a>static int .a href="+code=omap_rtc_timer" class="sref">omap_rtc_timer./a>;u3303./a>u3304./a>#define3.a href="+code=OMAP_RTC_DATA_DA830_IDX" class="sref">OMAP_RTC_DATA_DA830_IDX./a> 1u3305./a>u3306./a>static struct .a href="+code=platform_device_id" class="sref">platform_device_id./a> .a href="+code=omap_rtc_devtype" class="sref">omap_rtc_devtype./a>[] = {u3307./a>        {u3308./a>                ..a href="+code=nam
" class="sref">nam
./a>   = .a href="+code=DRIVER_NAME" class="sref">DRIVER_NAME./a>,u3309./a>        }, {u3310./a>                ..a href="+code=nam
" class="sref">nam
./a>   = .spaa class="string">"da830-rtc"./spaal,u3311./a>                ..a href="+code=driver_data" class="sref">driver_data./a> = .a href="+code=OMAP_RTC_HAS_KICKER" class="sref">OMAP_RTC_HAS_KICKER./a>,u3312./a>        },u3313./a>        {},u3314./a>};u3315./a>.a href="+code=MODULE_DEVICE_TABLE" class="sref">MODULE_DEVICE_TABLE./a>(.a href="+code=platform" class="sref">platform./a>,3.a href="+code=omap_rtc_devtype" class="sref">omap_rtc_devtype./a>);u3316./a>u3317./a>static const struct .a href="+code=of_device_id" class="sref">of_device_id./a> .a href="+code=omap_rtc_of_match" class="sref">omap_rtc_of_match./a>[] = {u3318./a>        {       ..a href="+code=compatible" class="sref">compatible./a>     = .spaa class="string">"ti,da830-rtc"./spaal,u3319./a>                ..a href="+code=data" class="sref">data./a>           = &.a href="+code=omap_rtc_devtype" class="sref">omap_rtc_devtype./a>[.a href="+code=OMAP_RTC_DATA_DA830_IDX" class="sref">OMAP_RTC_DATA_DA830_IDX./a>],u3320./a>        },u3321./a>        {},u3322./a>};u3323./a>.a href="+code=MODULE_DEVICE_TABLE" class="sref">MODULE_DEVICE_TABLE./a>(.a href="+code=of" class="sref">of./a>,3.a href="+code=omap_rtc_of_match" class="sref">omap_rtc_of_match./a>);u3324./a>u3325./a>static int .a href="+code=__init" class="sref">__init./a> .a href="+code=omap_rtc_probe" class="sref">omap_rtc_probe./a>(struct .a href="+code=platform_device" class="sref">platform_device./a> *.a href="+code=pdev" class="sref">pdev./a>)u3326./a>{u3327./a>        struct .a href="+code=resource" class="sref">resource./a>         *.a href="+code=res" class="sref">res./a>,3*.a href="+code=mem" class="sref">mem./a>;u3328./a>        struct .a href="+code=rtc_device" class="sref">rtc_device./a>       *.a href="+code=rtc" class="sref">rtc./a>;u3329./a>        .a href="+code=u8" class="sref">u8./a>                      .a href="+code=reg" class="sref">reg./a>,3.a href="+code=new_ctrl" class="sref">new_ctrl./a>;u3330./a>        const struct .a href="+code=platform_device_id" class="sref">platform_device_id./a> *.a href="+code=id_entry" class="sref">id_entry./a>;u3331./a>        const struct .a href="+code=of_device_id" class="sref">of_device_id./a> *.a href="+code=of_id" class="sref">of_id./a>;u3332./a>u3333./a>        .a href="+code=of_id" class="sref">of_id./a> = .a href="+code=of_match_device" class="sref">of_match_device./a>(.a href="+code=omap_rtc_of_match" class="sref">omap_rtc_of_match./a>, &.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>);u3334./a>        if (.a href="+code=of_id" class="sref">of_id./a>)u3335./a>                .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=id_entry" class="sref">id_entry./a> = .a href="+code=of_id" class="sref">of_id./a>->.a href="+code=data" class="sref">data./a>;u3336./a>u3337./a>        .a href="+code=omap_rtc_timer" class="sref">omap_rtc_timer./a> = .a href="+code=platform_get_irq" class="sref">platform_get_irq./a>(.a href="+code=pdev" class="sref">pdev./a>, 0);u3338./a>        if (.a href="+code=omap_rtc_timer" class="sref">omap_rtc_timer./a> <= 0) {u3339./a>                .a href="+code=pr_debug" class="sref">pr_debug./a>(.spaa class="string">"%s: no update irq?\n"./spaal, .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>);u3340./a>                return -.a href="+code=ENOENT" class="sref">ENOENT./a>;u3341./a>        }u3342./a>u3343./a>        .a href="+code=omap_rtc_alarm" class="sref">omap_rtc_alarm./a> = .a href="+code=platform_get_irq" class="sref">platform_get_irq./a>(.a href="+code=pdev" class="sref">pdev./a>, 1);u3344./a>        if (.a href="+code=omap_rtc_alarm" class="sref">omap_rtc_alarm./a> <= 0) {u3345./a>                .a href="+code=pr_debug" class="sref">pr_debug./a>(.spaa class="string">"%s: no alarm irq?\n"./spaal, .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>);u3346./a>                return -.a href="+code=ENOENT" class="sref">ENOENT./a>;u3347./a>        }u3348./a>u3349./a>        .a href="+code=res" class="sref">res./a> = .a href="+code=platform_get_resource" class="sref">platform_get_resource./a>(.a href="+code=pdev" class="sref">pdev./a>, .a href="+code=IORESOURCE_MEM" class="sref">IORESOURCE_MEM./a>, 0);u3350./a>        if (!.a href="+code=res" class="sref">res./a>) {u3351./a>                .a href="+code=pr_debug" class="sref">pr_debug./a>(.spaa class="string">"%s: RTC resource data missing\n"./spaal, .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>);u3352./a>                return -.a href="+code=ENOENT" class="sref">ENOENT./a>;u3353./a>        }u3354./a>u3355./a>        .a href="+code=mem" class="sref">mem./a> = .a href="+code=request_mem_region" class="sref">request_mem_region./a>(.a href="+code=res" class="sref">res./a>->.a href="+code=start" class="sref">start./a>, .a href="+code=resource_size" class="sref">resource_size./a>(.a href="+code=res" class="sref">res./a>), .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>);u3356./a>        if (!.a href="+code=mem" class="sref">mem./a>) {u3357./a>                .a href="+code=pr_debug" class="sref">pr_debug./a>(.spaa class="string">"%s: RTC registers at %08x are not free\n"./spaal,u3358./a>                        .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>, .a href="+code=res" class="sref">res./a>->.a href="+code=start" class="sref">start./a>);u3359./a>                return -.a href="+code=EBUSY" class="sref">EBUSY./a>;u3360./a>        }u3361./a>u3362./a>        .a href="+code=rtc_base" class="sref">rtc_base./a> = .a href="+code=ioremap" class="sref">ioremap./a>(.a href="+code=res" class="sref">res./a>->.a href="+code=start" class="sref">start./a>, .a href="+code=resource_size" class="sref">resource_size./a>(.a href="+code=res" class="sref">res./a>));u3363./a>        if (!.a href="+code=rtc_base" class="sref">rtc_base./a>) {u3364./a>                .a href="+code=pr_debug" class="sref">pr_debug./a>(.spaa class="string">"%s: RTC registers can't be mapped\n"./spaal, .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>);u3365./a>                goto .a href="+code=fail" class="sref">fail./a>;u3366./a>        }u3367./a>u3368./a>        .spaa class="comment">/* Enable the clock/module so that we can access the registers */./spaalu3369./a>        .a href="+code=pm_runtime_enable" class="sref">pm_runtime_enable./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>);u3370./a>        .a href="+code=pm_runtime_get_sync" class="sref">pm_runtime_get_sync./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>);u3371./a>u3372./a>        .a href="+code=id_entry" class="sref">id_entry./a> = .a href="+code=platform_get_device_id" class="sref">platform_get_device_id./a>(.a href="+code=pdev" class="sref">pdev./a>);u3373./a>        if (.a href="+code=id_entry" class="sref">id_entry./a> && (.a href="+code=id_entry" class="sref">id_entry./a>->.a href="+code=driver_data" class="sref">driver_data./a> & .a href="+code=OMAP_RTC_HAS_KICKER" class="sref">OMAP_RTC_HAS_KICKER./a>)) {u3374./a>                .a href="+code=rtc_writel" class="sref">rtc_writel./a>(.a href="+code=KICK0_VALUE" class="sref">KICK0_VALUE./a>, .a href="+code=OMAP_RTC_KICK0_REG" class="sref">OMAP_RTC_KICK0_REG./a>);u3375./a>                .a href="+code=rtc_writel" class="sref">rtc_writel./a>(.a href="+code=KICK1_VALUE" class="sref">KICK1_VALUE./a>, .a href="+code=OMAP_RTC_KICK1_REG" class="sref">OMAP_RTC_KICK1_REG./a>);u3376./a>        }u3377./a>u3378./a>        .a href="+code=rtc" class="sref">rtc./a> = .a href="+code=rtc_device_register" class="sref">rtc_device_register./a>(.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>, &.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>,u3379./a>                        &.a href="+code=omap_rtc_ops" class="sref">omap_rtc_ops./a>, .a href="+code=THIS_MODULE" class="sref">THIS_MODULE./a>);u3380./a>        if (.a href="+code=IS_ERR" class="sref">IS_ERR./a>(.a href="+code=rtc" class="sref">rtc./a>)) {u3381./a>                .a href="+code=pr_debug" class="sref">pr_debug./a>(.spaa class="string">"%s: can't register RTC device, err %ld\n"./spaal,u3382./a>                        .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>, .a href="+code=PTR_ERR" class="sref">PTR_ERR./a>(.a href="+code=rtc" class="sref">rtc./a>));u3383./a>                goto .a href="+code=fail0" class="sref">fail0./a>;u3384./a>        }u3385./a>        .a href="+code=platform_set_drvdata" class="sref">platform_set_drvdata./a>(.a href="+code=pdev" class="sref">pdev./a>, .a href="+code=rtc" class="sref">rtc./a>);u3386./a>        .a href="+code=dev_set_drvdata" class="sref">dev_set_drvdata./a>(&.a href="+code=rtc" class="sref">rtc./a>->.a href="+code=dev" class="sref">dev./a>, .a href="+code=mem" class="sref">mem./a>);u3387./a>u3388./a>        .spaa class="comment">/* clear pending irqs, and set 1/second periodic,./spaalu3389./a>.spaa class="comment">         * which we'll use instead of update irqs./spaalu3390./a>.spaa class="comment">         */./spaalu3391./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(0,3.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>);u3392./a>u3393./a>        .spaa class="comment">/* clear old status */./spaalu3394./a>        .a href="+code=reg" class="sref">reg./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_STATUS_REG" class="sref">OMAP_RTC_STATUS_REG./a>);u3395./a>        if (.a href="+code=reg" class="sref">reg./a> & (.a href="+code=u8" class="sref">u8./a>)3.a href="+code=OMAP_RTC_STATUS_POWER_UP" class="sref">OMAP_RTC_STATUS_POWER_UP./a>) {u3396./a>                .a href="+code=pr_info" class="sref">pr_info./a>(.spaa class="string">"%s: RTC power up reset detected\n"./spaal,u3397./a>                        .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>);u3398./a>                .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=OMAP_RTC_STATUS_POWER_UP" class="sref">OMAP_RTC_STATUS_POWER_UP./a>,3.a href="+code=OMAP_RTC_STATUS_REG" class="sref">OMAP_RTC_STATUS_REG./a>);u3399./a>        }u3400./a>        if (.a href="+code=reg" class="sref">reg./a> & (.a href="+code=u8" class="sref">u8./a>)3.a href="+code=OMAP_RTC_STATUS_ALARM" class="sref">OMAP_RTC_STATUS_ALARM./a>)u3401./a>                .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=OMAP_RTC_STATUS_ALARM" class="sref">OMAP_RTC_STATUS_ALARM./a>,3.a href="+code=OMAP_RTC_STATUS_REG" class="sref">OMAP_RTC_STATUS_REG./a>);u3402./a>u3403./a>        .spaa class="comment">/* handle periodic and alarm irqs */./spaalu3404./a>        if (.a href="+code=request_irq" class="sref">request_irq./a>(.a href="+code=omap_rtc_timer" class="sref">omap_rtc_timer./a>, .a href="+code=rtc_irq" class="sref">rtc_irq./a>, 0,u3405./a>                        .a href="+code=dev_nam
" class="sref">dev_nam
./a>(&.a href="+code=rtc" class="sref">rtc./a>->.a href="+code=dev" class="sref">dev./a>), .a href="+code=rtc" class="sref">rtc./a>)) {u3406./a>                .a href="+code=pr_debug" class="sref">pr_debug./a>(.spaa class="string">"%s: RTC timer interrupt IRQ%d already claimed\n"./spaal,u3407./a>                        .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>,3.a href="+code=omap_rtc_timer" class="sref">omap_rtc_timer./a>);u3408./a>                goto .a href="+code=fail1" class="sref">fail1./a>;u3409./a>        }u3410./a>        if ((.a href="+code=omap_rtc_timer" class="sref">omap_rtc_timer./a> != .a href="+code=omap_rtc_alarm" class="sref">omap_rtc_alarm./a>) &&u3411./a>                (.a href="+code=request_irq" class="sref">request_irq./a>(.a href="+code=omap_rtc_alarm" class="sref">omap_rtc_alarm./a>, .a href="+code=rtc_irq" class="sref">rtc_irq./a>, 0,u3412./a>                        .a href="+code=dev_nam
" class="sref">dev_nam
./a>(&.a href="+code=rtc" class="sref">rtc./a>->.a href="+code=dev" class="sref">dev./a>), .a href="+code=rtc" class="sref">rtc./a>))) {u3413./a>                .a href="+code=pr_debug" class="sref">pr_debug./a>(.spaa class="string">"%s: RTC alarm interrupt IRQ%d already claimed\n"./spaal,u3414./a>                        .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>,3.a href="+code=omap_rtc_alarm" class="sref">omap_rtc_alarm./a>);u3415./a>                goto .a href="+code=fail2" class="sref">fail2./a>;u3416./a>        }u3417./a>u3418./a>        .spaa class="comment">/* On boards with split power, RTC_ON_NOFF won't reset the RTC */./spaalu3419./a>        .a href="+code=reg" class="sref">reg./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_CTRL_REG" class="sref">OMAP_RTC_CTRL_REG./a>);u3420./a>        if (.a href="+code=reg" class="sref">reg./a> & (.a href="+code=u8" class="sref">u8./a>)3.a href="+code=OMAP_RTC_CTRL_STOP" class="sref">OMAP_RTC_CTRL_STOP./a>)u3421./a>                .a href="+code=pr_info" class="sref">pr_info./a>(.spaa class="string">"%s: already running\n"./spaal, .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>);u3422./a>u3423./a>        .spaa class="comment">/* force to 24 hour mode */./spaalu3424./a>        .a href="+code=new_ctrl" class="sref">new_ctrl./a> = .a href="+code=reg" class="sref">reg./a> & (.a href="+code=OMAP_RTC_CTRL_SPLIT" class="sref">OMAP_RTC_CTRL_SPLIT./a>|.a href="+code=OMAP_RTC_CTRL_AUTO_COMP" class="sref">OMAP_RTC_CTRL_AUTO_COMP./a>);u3425./a>        .a href="+code=new_ctrl" class="sref">new_ctrl./a> |= .a href="+code=OMAP_RTC_CTRL_STOP" class="sref">OMAP_RTC_CTRL_STOP./a>;u3426./a>u3427./a>        .spaa class="comment">/* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:./spaalu3428./a>.spaa class="comment">         *./spaalu3429./a>.spaa class="comment">         *  - Device wake-up capability setting should come through chip./spaalu3430./a>.spaa class="comment">         *    init logic. OMAP1 boards should initialize the "wakeup capable"./spaalu3431./a>.spaa class="comment">         *    flag in the platform device if the board is wired right for./spaalu3432./a>.spaa class="comment">         *    being woken up by RTC alarm. For OMAP-L138, this capability./spaalu3433./a>.spaa class="comment">         *    is built into the SoC by the "Deep Sleep" capability../spaalu3434./a>.spaa class="comment">         *./spaalu3435./a>.spaa class="comment">         *  - Boards wired so RTC_ON_nOFF is used as the reset signal,./spaalu3436./a>.spaa class="comment">         *    rather than nPWRON_RESET, should forcibly enable split./spaalu3437./a>.spaa class="comment">         *    power mode.  (Some chip errata report that RTC_CTRL_SPLIT./spaalu3438./a>.spaa class="comment">         *    is write-only, and always reads as zero...)./spaalu3439./a>.spaa class="comment">         */./spaalu3440./a>u3441./a>        if (.a href="+code=new_ctrl" class="sref">new_ctrl./a> & (.a href="+code=u8" class="sref">u8./a>)3.a href="+code=OMAP_RTC_CTRL_SPLIT" class="sref">OMAP_RTC_CTRL_SPLIT./a>)u3442./a>                .a href="+code=pr_info" class="sref">pr_info./a>(.spaa class="string">"%s: split power mode\n"./spaal, .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=nam
" class="sref">nam
./a>);u3443./a>u3444./a>        if (.a href="+code=reg" class="sref">reg./a> != .a href="+code=new_ctrl" class="sref">new_ctrl./a>)u3445./a>                .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=new_ctrl" class="sref">new_ctrl./a>,3.a href="+code=OMAP_RTC_CTRL_REG" class="sref">OMAP_RTC_CTRL_REG./a>);u3446./a>u3447./a>        return 0;u3448./a>u3449./a>.a href="+code=fail2" class="sref">fail2./a>:u3450./a>        .a href="+code=free_irq" class="sref">free_irq./a>(.a href="+code=omap_rtc_timer" class="sref">omap_rtc_timer./a>, .a href="+code=rtc" class="sref">rtc./a>);u3451./a>.a href="+code=fail1" class="sref">fail1./a>:u3452./a>        .a href="+code=rtc_device_unregister" class="sref">rtc_device_unregister./a>(.a href="+code=rtc" class="sref">rtc./a>);u3453./a>.a href="+code=fail0" class="sref">fail0./a>:u3454./a>        if (.a href="+code=id_entry" class="sref">id_entry./a> && (.a href="+code=id_entry" class="sref">id_entry./a>->.a href="+code=driver_data" class="sref">driver_data./a> & .a href="+code=OMAP_RTC_HAS_KICKER" class="sref">OMAP_RTC_HAS_KICKER./a>))u3455./a>                .a href="+code=rtc_writel" class="sref">rtc_writel./a>(0,3.a href="+code=OMAP_RTC_KICK0_REG" class="sref">OMAP_RTC_KICK0_REG./a>);u3456./a>        .a href="+code=pm_runtime_put_sync" class="sref">pm_runtime_put_sync./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>);u3457./a>        .a href="+code=pm_runtime_disable" class="sref">pm_runtime_disable./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>);u3458./a>        .a href="+code=iounmap" class="sref">iounmap./a>(.a href="+code=rtc_base" class="sref">rtc_base./a>);u3459./a>.a href="+code=fail" class="sref">fail./a>:u3460./a>        .a href="+code=release_mem_region" class="sref">release_mem_region./a>(.a href="+code=mem" class="sref">mem./a>->.a href="+code=start" class="sref">start./a>, .a href="+code=resource_size" class="sref">resource_size./a>(.a href="+code=mem" class="sref">mem./a>));u3461./a>        return -.a href="+code=EIO" class="sref">EIO./a>;u3462./a>}u3463./a>u3464./a>static int .a href="+code=__exit" class="sref">__exit./a> .a href="+code=omap_rtc_remove" class="sref">omap_rtc_remove./a>(struct .a href="+code=platform_device" class="sref">platform_device./a> *.a href="+code=pdev" class="sref">pdev./a>)u3465./a>{u3466./a>        struct .a href="+code=rtc_device" class="sref">rtc_device./a>       *.a href="+code=rtc" class="sref">rtc./a> = .a href="+code=platform_get_drvdata" class="sref">platform_get_drvdata./a>(.a href="+code=pdev" class="sref">pdev./a>);u3467./a>        struct .a href="+code=resource" class="sref">resource./a>         *.a href="+code=mem" class="sref">mem./a> = .a href="+code=dev_get_drvdata" class="sref">dev_get_drvdata./a>(&.a href="+code=rtc" class="sref">rtc./a>->.a href="+code=dev" class="sref">dev./a>);u3468./a>        const struct .a href="+code=platform_device_id" class="sref">platform_device_id./a> *.a href="+code=id_entry" class="sref">id_entry./a> =u3469./a>                                .a href="+code=platform_get_device_id" class="sref">platform_get_device_id./a>(.a href="+code=pdev" class="sref">pdev./a>);u3470./a>u3471./a>        .a href="+code=device_init_wakeup" class="sref">device_init_wakeup./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>, 0);u3472./a>u3473./a>        .spaa class="comment">/* leave rtc running, but disable irqs */./spaalu3474./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(0,3.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>);u3475./a>u3476./a>        .a href="+code=free_irq" class="sref">free_irq./a>(.a href="+code=omap_rtc_timer" class="sref">omap_rtc_timer./a>, .a href="+code=rtc" class="sref">rtc./a>);u3477./a>u3478./a>        if (.a href="+code=omap_rtc_timer" class="sref">omap_rtc_timer./a> != .a href="+code=omap_rtc_alarm" class="sref">omap_rtc_alarm./a>)u3479./a>                .a href="+code=free_irq" class="sref">free_irq./a>(.a href="+code=omap_rtc_alarm" class="sref">omap_rtc_alarm./a>, .a href="+code=rtc" class="sref">rtc./a>);u3480./a>u3481./a>        .a href="+code=rtc_device_unregister" class="sref">rtc_device_unregister./a>(.a href="+code=rtc" class="sref">rtc./a>);u3482./a>        if (.a href="+code=id_entry" class="sref">id_entry./a> && (.a href="+code=id_entry" class="sref">id_entry./a>->.a href="+code=driver_data" class="sref">driver_data./a> & .a href="+code=OMAP_RTC_HAS_KICKER" class="sref">OMAP_RTC_HAS_KICKER./a>))u3483./a>                .a href="+code=rtc_writel" class="sref">rtc_writel./a>(0,3.a href="+code=OMAP_RTC_KICK0_REG" class="sref">OMAP_RTC_KICK0_REG./a>);u3484./a>u3485./a>        .spaa class="comment">/* Disable the clock/module */./spaalu3486./a>        .a href="+code=pm_runtime_put_sync" class="sref">pm_runtime_put_sync./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>);u3487./a>        .a href="+code=pm_runtime_disable" class="sref">pm_runtime_disable./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>);u3488./a>u3489./a>        .a href="+code=iounmap" class="sref">iounmap./a>(.a href="+code=rtc_base" class="sref">rtc_base./a>);u3490./a>        .a href="+code=release_mem_region" class="sref">release_mem_region./a>(.a href="+code=mem" class="sref">mem./a>->.a href="+code=start" class="sref">start./a>, .a href="+code=resource_size" class="sref">resource_size./a>(.a href="+code=mem" class="sref">mem./a>));u3491./a>        return 0;u3492./a>}u3493./a>u3494./a>#ifdef .a href="+code=CONFIG_PM" class="sref">CONFIG_PM./a>u3495./a>u3496./a>static .a href="+code=u8" class="sref">u8./a> .a href="+code=irqstat" class="sref">irqstat./a>;u3497./a>u3498./a>static int .a href="+code=omap_rtc_suspend" class="sref">omap_rtc_suspend./a>(struct .a href="+code=platform_device" class="sref">platform_device./a> *.a href="+code=pdev" class="sref">pdev./a>, .a href="+code=pm_message_t" class="sref">pm_message_t./a> .a href="+code=state" class="sref">state./a>)u3499./a>{u3500./a>        .a href="+code=irqstat" class="sref">irqstat./a> = .a href="+code=rtc_read" class="sref">rtc_read./a>(.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>);u3501./a>u3502./a>        .spaa class="comment">/* FIXME the RTC alarm is not currently acting as a wakeup event./spaalu3503./a>.spaa class="comment">         * source, and in fact this enable() call is just saving a flag./spaalu3504./a>.spaa class="comment">         * that's never used..../spaalu3505./a>.spaa class="comment">         */./spaalu3506./a>        if (.a href="+code=device_may_wakeup" class="sref">device_may_wakeup./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>))u3507./a>                .a href="+code=enable_irq_wake" class="sref">enable_irq_wake./a>(.a href="+code=omap_rtc_alarm" class="sref">omap_rtc_alarm./a>);u3508./a>        elseu3509./a>                .a href="+code=rtc_write" class="sref">rtc_write./a>(0,3.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>);u3510./a>u3511./a>        .spaa class="comment">/* Disable the clock/module */./spaalu3512./a>        .a href="+code=pm_runtime_put_sync" class="sref">pm_runtime_put_sync./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>);u3513./a>u3514./a>        return 0;u3515./a>}u3516./a>u3517./a>static int .a href="+code=omap_rtc_resum
" class="sref">omap_rtc_resum
./a>(struct .a href="+code=platform_device" class="sref">platform_device./a> *.a href="+code=pdev" class="sref">pdev./a>)u3518./a>{u3519./a>        .spaa class="comment">/* Enable the clock/module so that we can access the registers */./spaalu3520./a>        .a href="+code=pm_runtime_get_sync" class="sref">pm_runtime_get_sync./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>);u3521./a>u3522./a>        if (.a href="+code=device_may_wakeup" class="sref">device_may_wakeup./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>))u3523./a>                .a href="+code=disable_irq_wake" class="sref">disable_irq_wake./a>(.a href="+code=omap_rtc_alarm" class="sref">omap_rtc_alarm./a>);u3524./a>        elseu3525./a>                .a href="+code=rtc_write" class="sref">rtc_write./a>(.a href="+code=irqstat" class="sref">irqstat./a>,3.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>);u3526./a>        return 0;u3527./a>}u3528./a>u3529./a>#elseu3530./a>#define .a href="+code=omap_rtc_suspend" class="sref">omap_rtc_suspend./a> .a href="+code=NULL" class="sref">NULL./a>u3531./a>#define .a href="+code=omap_rtc_resum
" class="sref">omap_rtc_resum
./a>  .a href="+code=NULL" class="sref">NULL./a>u3532./a>#endifu3533./a>u3534./a>static void .a href="+code=omap_rtc_shutdown" class="sref">omap_rtc_shutdown./a>(struct .a href="+code=platform_device" class="sref">platform_device./a> *.a href="+code=pdev" class="sref">pdev./a>)u3535./a>{u3536./a>        .a href="+code=rtc_write" class="sref">rtc_write./a>(0,3.a href="+code=OMAP_RTC_INTERRUPTS_REG" class="sref">OMAP_RTC_INTERRUPTS_REG./a>);u3537./a>}u3538./a>u3539./a>.a href="+code=MODULE_ALIAS" class="sref">MODULE_ALIAS./a>(.spaa class="string">"platform:omap_rtc"./spaal);u3540./a>static struct .a href="+code=platform_driver" class="sref">platform_driver./a> .a href="+code=omap_rtc_driver" class="sref">omap_rtc_driver./a> = {u3541./a>        ..a href="+code=remove" class="sref">remove./a>         = .a href="+code=__exit_p" class="sref">__exit_p./a>(.a href="+code=omap_rtc_remove" class="sref">omap_rtc_remove./a>),u3542./a>        ..a href="+code=suspend" class="sref">suspend./a>        = .a href="+code=omap_rtc_suspend" class="sref">omap_rtc_suspend./a>,u3543./a>        ..a href="+code=resum
" class="sref">resum
./a>         = .a href="+code=omap_rtc_resum
" class="sref">omap_rtc_resum
./a>,u3544./a>        ..a href="+code=shutdown" class="sref">shutdown./a>       = .a href="+code=omap_rtc_shutdown" class="sref">omap_rtc_shutdown./a>,u3545./a>        ..a href="+code=driver" class="sref">driver./a>         = {u3546./a>                ..a href="+code=nam
" class="sref">nam
./a>   = .a href="+code=DRIVER_NAME" class="sref">DRIVER_NAME./a>,u3547./a>                ..a href="+code=owner" class="sref">owner./a>  = .a href="+code=THIS_MODULE" class="sref">THIS_MODULE./a>,u3548./a>                ..a href="+code=of_match_table" class="sref">of_match_table./a> = .a href="+code=of_match_ptr" class="sref">of_match_ptr./a>(.a href="+code=omap_rtc_of_match" class="sref">omap_rtc_of_match./a>),u3549./a>        },u3550./a>        ..a href="+code=id_table" class="sref">id_table./a>       = .a href="+code=omap_rtc_devtyp
" class="sref">omap_rtc_devtyp
./a>,u3551./a>};u3552./a>u3553./a>static int .a href="+code=__init" class="sref">__init./a> .a href="+code=rtc_init" class="sref">rtc_init./a>(void)u3554./a>{u3555./a>        return .a href="+code=platform_driver_probe" class="sref">platform_driver_probe./a>(&.a href="+code=omap_rtc_driver" class="sref">omap_rtc_driver./a>,3.a href="+code=omap_rtc_probe" class="sref">omap_rtc_probe./a>);u3556./a>}u3557./a>.a href="+code=module_init" class="sref">module_init./a>(.a href="+code=rtc_init" class="sref">rtc_init./a>);u3558./a>u3559./a>static void .a href="+code=__exit" class="sref">__exit./a> .a href="+code=rtc_exit" class="sref">rtc_exit./a>(void)u3560./a>{u3561./a>        .a href="+code=platform_driver_unregister" class="sref">platform_driver_unregister./a>(&.a href="+code=omap_rtc_driver" class="sref">omap_rtc_driver./a>);u3562./a>}u3563./a>.a href="+code=module_exit" class="sref">module_exit./a>(.a href="+code=rtc_exit" class="sref">rtc_exit./a>);u3564./a>u3565./a>.a href="+code=MODULE_AUTHOR" class="sref">MODULE_AUTHOR./a>(.spaa class="string">"George G. Davis (and others)"./spaal);u3566./a>.a href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSE./a>(.spaa class="string">"GPL"./spaal);u3567./a>
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