linux/drivers/regulator/rc5t583-regulator.c
<<
opti v/spa2.o v/form.o va opti href="../linux+v3.9.5/drivers/regulator/rc5t583-regulator.c">opti vimg src="../.static/gfx/right.png" alt=">>">opv/spa2.oopvspa2 class="lxr_search">optiopti vinput typptihidden" namptinavtarget" 322.pti">opti vinput typptitext" namptisearch" idtisearch">opti vbutt23.typptisubmit">Searchopti Prefso v/a>opv/spa2.oti v/div.oti vform ac.322="ajax+*" method="post" onsubmit="return false;">opvinput typptihidden" namptiajax_lookup" idtiajax_lookup" 322.pti">oti v/form.ooti vdiv class="headingbott2m">o vdiv idtifile_contents".
   1v/a>vspa2 class="comment">/*v/spa2.o   2v/a>vspa2 class="comment"> * Regulator driver for RICOH RC5T583 power management chip.v/spa2.o   3v/a>vspa2 class="comment"> *v/spa2.o   4v/a>vspa2 class="comment"> * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.v/spa2.o   5v/a>vspa2 class="comment"> * Author: Laxman dewangan <ldewangan@nvidia.com>v/spa2.o   6v/a>vspa2 class="comment"> *v/spa2.o   7v/a>vspa2 class="comment"> * based on codev/spa2.o   8v/a>vspa2 class="comment"> *      Copyright (C) 2011 RICOH COMPANY,LTDv/spa2.o   9v/a>vspa2 class="comment"> *v/spa2.o  4.23a>vspa2 class="comment"> *v/spa2.o  11v/a>vspa2 class="comment"> * This program is free software; you ca2 redistribute it and/or modify itv/spa2.o  12v/a>vspa2 class="comment"> * under the terms and condi.322s of the GNU General Public License,v/spa2.o  13v/a>vspa2 class="comment"> * vers823.2, as published by the Free Software Founda.322.v/spa2.o  14v/a>vspa2 class="comment"> *v/spa2.o  15v/a>vspa2 class="comment"> * This program is distributed in the hope it will be useful, but WITHOUTv/spa2.o  16v/a>vspa2 class="comment"> * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY orv/spa2.o  17v/a>vspa2 class="comment"> * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License forv/spa2.o  18v/a>vspa2 class="comment"> * more details.v/spa2.o  19v/a>vspa2 class="comment"> *v/spa2.o  2.23a>vspa2 class="comment"> * You should have received a copy of the GNU General Public Licensev/spa2.o  21v/a>vspa2 class="comment"> * along with this program.  If not, see <http://www.gnu.org/licenses/>.v/spa2.o  22v/a>vspa2 class="comment"> *v/spa2.o  23v/a>vspa2 class="comment"> */v/spa2.o  24v/a>o  25v/a>#include <linux/module.hv/a>>o  26v/a>#include <linux/init.hv/a>>o  27v/a>#include <linux/slab.hv/a>>o  28v/a>#include <linux/err.hv/a>>o  29v/a>#include <linux/platform_device.hv/a>>o  30v/a>#include <linux/regulator/driver.hv/a>>o  31v/a>#include <linux/regulator/machine.hv/a>>o  32v/a>#include <linux/gpio.hv/a>>o  33v/a>#include <linux/mfd/rc5t583.hv/a>>o  34v/a>o  35v/a>struct va href="+code=rc5t583_regulator_info" class="sref">rc5t583_regulator_infov/a> {o  36v/a>        int                     va href="+code=deepsleep_id" class="sref">deepsleep_idv/a>;o  37v/a>o  38v/a>        vspa2 class="comment">/* Regulator register address.*/v/spa2.o  39v/a>        va href="+code=uint8_t" class="sref">uint8_tv/a>                 va href="+code=reg_disc_reg" class="sref">reg_disc_regv/a>;o  40v/a>        va href="+code=uint8_t" class="sref">uint8_tv/a>                 va href="+code=disc_bit" class="sref">disc_bitv/a>;o  41v/a>        va href="+code=uint8_t" class="sref">uint8_tv/a>                 va href="+code=deepsleep_reg" class="sref">deepsleep_regv/a>;o  42v/a>o  43v/a>        vspa2 class="comment">/* Regulator specific turn-on delay  and voltage settling time*/v/spa2.o  44v/a>        int                     va href="+code=enable_uv_per_us" class="sref">enable_uv_per_usv/a>;o  45v/a>o  46v/a>        vspa2 class="comment">/* Used by regulator core */v/spa2.o  47v/a>        struct va href="+code=regulator_desc" class="sref">regulator_descv/a>   va href="+code=desc" class="sref">descv/a>;o  48v/a>};o  49v/a>o  50v/a>struct va href="+code=rc5t583_regulator" class="sref">rc5t583_regulatorv/a> {o  51v/a>        struct va href="+code=rc5t583_regulator_info" class="sref">rc5t583_regulator_infov/a> *va href="+code=reg_info" class="sref">reg_infov/a>;o  52v/a>o  53v/a>        vspa2 class="comment">/* Devices */v/spa2.o  54v/a>        struct va href="+code=device" class="sref">devicev/a>           *va href="+code=dev" class="sref">devv/a>;o  55v/a>        struct va href="+code=rc5t583" class="sref">rc5t583v/a>          *va href="+code=mfd" class="sref">mfdv/a>;o  56v/a>        struct va href="+code=regulator_dev" class="sref">regulator_devv/a>    *va href="+code=rdev" class="sref">rdevv/a>;o  57v/a>};o  58v/a>o  59v/a>static int va href="+code=rc5t583_regulator_enable_time" class="sref">rc5t583_regulator_enable_timev/a>(struct va href="+code=regulator_dev" class="sref">regulator_devv/a> *va href="+code=rdev" class="sref">rdevv/a>)o  60v/a>{o  61v/a>        struct va href="+code=rc5t583_regulator" class="sref">rc5t583_regulatorv/a> *va href="+code=reg" class="sref">regv/a> = va href="+code=rdev_get_drvdata" class="sref">rdev_get_drvdatav/a>(va href="+code=rdev" class="sref">rdevv/a>);o  62v/a>        int va href="+code=vsel" class="sref">vselv/a> = va href="+code=regulator_get_voltage_sel_regmap" class="sref">regulator_get_voltage_sel_regmapv/a>(va href="+code=rdev" class="sref">rdevv/a>);o  63v/a>        int va href="+code=curr_uV" class="sref">curr_uVv/a> = va href="+code=regulator_list_voltage_linear" class="sref">regulator_list_voltage_linearv/a>(va href="+code=rdev" class="sref">rdevv/a>, va href="+code=vsel" class="sref">vselv/a>);o  64v/a>o  65v/a>        return va href="+code=DIV_ROUND_UP" class="sref">DIV_ROUND_UPv/a>(va href="+code=curr_uV" class="sref">curr_uVv/a>, va href="+code=reg" class="sref">regv/a>->va href="+code=reg_info" class="sref">reg_infov/a>->va href="+code=enable_uv_per_us" class="sref">enable_uv_per_usv/a>);o  66v/a>}o  67v/a>o  68v/a>static struct va href="+code=regulator_ops" class="sref">regulator_opsv/a> va href="+code=rc5t583_ops" class="sref">rc5t583_opsv/a> = {o  69v/a>        .va href="+code=is_enabled" class="sref">is_enabledv/a>             = va href="+code=regulator_is_enabled_regmap" class="sref">regulator_is_enabled_regmapv/a>,o  70v/a>        .va href="+code=enable" class="sref">enablev/a>                 = va href="+code=regulator_enable_regmap" class="sref">regulator_enable_regmapv/a>,o  71v/a>        .va href="+code=disable" class="sref">disablev/a>                = va href="+code=regulator_disable_regmap" class="sref">regulator_disable_regmapv/a>,o  72v/a>        .va href="+code=enable_time" class="sref">enable_timev/a>            = va href="+code=rc5t583_regulator_enable_time" class="sref">rc5t583_regulator_enable_timev/a>,o  73v/a>        .va href="+code=get_voltage_sel" class="sref">get_voltage_selv/a>        = va href="+code=regulator_get_voltage_sel_regmap" class="sref">regulator_get_voltage_sel_regmapv/a>,o  74v/a>        .va href="+code=set_voltage_sel" class="sref">set_voltage_selv/a>        = va href="+code=regulator_set_voltage_sel_regmap" class="sref">regulator_set_voltage_sel_regmapv/a>,o  75v/a>        .va href="+code=list_voltage" class="sref">list_voltagev/a>           = va href="+code=regulator_list_voltage_linear" class="sref">regulator_list_voltage_linearv/a>,o  76v/a>        .va href="+code=map_voltage" class="sref">map_voltagev/a>            = va href="+code=regulator_map_voltage_linear" class="sref">regulator_map_voltage_linearv/a>,o  77v/a>        .va href="+code=set_voltage_time_sel" class="sref">set_voltage_time_selv/a>   = va href="+code=regulator_set_voltage_time_sel" class="sref">regulator_set_voltage_time_selv/a>,o  78v/a>};o  79v/a>o  80v/a>#define va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=_id" class="sref">_idv/a>, va href="+code=_en_reg" class="sref">_en_regv/a>, va href="+code=_en_bit" class="sref">_en_bitv/a>, va href="+code=_disc_reg" class="sref">_disc_regv/a>, va href="+code=_disc_bit" class="sref">_disc_bitv/a>, \o  81v/a>                va href="+code=_vout_mask" class="sref">_vout_maskv/a>, va href="+code=_min_mv" class="sref">_min_mvv/a>, va href="+code=_max_mv" class="sref">_max_mvv/a>, va href="+code=_step_uV" class="sref">_step_uVv/a>, va href="+code=_enable_mv" class="sref">_enable_mvv/a>) \o  82v/a>{                                                               \o  83v/a>        .va href="+code=reg_disc_reg" class="sref">reg_disc_regv/a>   = va href="+code=RC5T583_REG_" class="sref">RC5T583_REG_v/a>##_disc_reg,              \o  84v/a>        .va href="+code=disc_bit" class="sref">disc_bitv/a>       = va href="+code=_disc_bit" class="sref">_disc_bitv/a>,                            \o  85v/a>        .va href="+code=deepsleep_reg" class="sref">deepsleep_regv/a>  = va href="+code=RC5T583_REG_" class="sref">RC5T583_REG_v/a>##_id##DAC_DS,            \o  86v/a>        .va href="+code=enable_uv_per_us" class="sref">enable_uv_per_usv/a> = va href="+code=_enable_mv" class="sref">_enable_mvv/a> * 1000,                  \o  87v/a>        .va href="+code=deepsleep_id" class="sref">deepsleep_idv/a>   = va href="+code=RC5T583_DS_" class="sref">RC5T583_DS_v/a>##_id,                     \o  88v/a>        .va href="+code=desc" class="sref">descv/a> = {                                               \o  89v/a>                .va href="+code=namp" class="sref">nampv/a> = vspa2 class="string">"rc5t583-regulator-"v/spa2.#_id,               \o  90v/a>                .va href="+code=id" class="sref">idv/a> = va href="+code=RC5T583_REGULATOR_" class="sref">RC5T583_REGULATOR_v/a>##_id,                  \o  91v/a>                .va href="+code=n_voltages" class="sref">n_voltagesv/a> = (va href="+code=_max_mv" class="sref">_max_mvv/a> - va href="+code=_min_mv" class="sref">_min_mvv/a>) * 1000 / va href="+code=_step_uV" class="sref">_step_uVv/a> + 1, \o  92v/a>                .va href="+code=ops" class="sref">opsv/a> = &va href="+code=rc5t583_ops" class="sref">rc5t583_opsv/a>,                            \o  93v/a>                .va href="+code=typp" class="sref">typpv/a> = va href="+code=REGULATOR_VOLTAGE" class="sref">REGULATOR_VOLTAGEv/a>,                      \o  94v/a>                .va href="+code=owner" class="sref">ownerv/a> = va href="+code=THIS_MODULE" class="sref">THIS_MODULEv/a>,                           \o  95v/a>                .va href="+code=vsel_reg" class="sref">vsel_regv/a> = va href="+code=RC5T583_REG_" class="sref">RC5T583_REG_v/a>##_id##DAC,             \o  96v/a>                .va href="+code=vsel_mask" class="sref">vsel_maskv/a> = va href="+code=_vout_mask" class="sref">_vout_maskv/a>,                        \o  97v/a>                .va href="+code=enable_reg" class="sref">enable_regv/a> = va href="+code=RC5T583_REG_" class="sref">RC5T583_REG_v/a>##_en_reg,            \o  98v/a>                .va href="+code=enable_mask" class="sref">enable_maskv/a> = va href="+code=BIT" class="sref">BITv/a>(va href="+code=_en_bit" class="sref">_en_bitv/a>),                    \o  99v/a>                .va href="+code=min_uV" class="sref">min_uVv/a> = va href="+code=_min_mv" class="sref">_min_mvv/a> * 1000,                       \o 100v/a>                .va href="+code=uV_step" class="sref">uV_stepv/a> = va href="+code=_step_uV" class="sref">_step_uVv/a>,                            \o 101v/a>                .va href="+code=ramp_delay" class="sref">ramp_delayv/a> = 40 * 1000,                        \o 102v/a>        },                                                      \o 103v/a>}o 104v/a>o 105v/a>static struct va href="+code=rc5t583_regulator_info" class="sref">rc5t583_regulator_infov/a> va href="+code=rc5t583_reg_info" class="sref">rc5t583_reg_infov/a>[va href="+code=RC5T583_REGULATOR_MAX" class="sref">RC5T583_REGULATOR_MAXv/a>] = {o 106v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=DC0" class="sref">DC0v/a>, va href="+code=DC0CTL" class="sref">DC0CTLv/a>, 0, va href="+code=DC0CTL" class="sref">DC0CTLv/a>, 1, 0x7F, 700, 1500, 12500, 4),o 107v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=DC1" class="sref">DC1v/a>, va href="+code=DC1CTL" class="sref">DC1CTLv/a>, 0, va href="+code=DC1CTL" class="sref">DC1CTLv/a>, 1, 0x7F, 700, 1500, 12500, 14),o 108v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=DC2" class="sref">DC2v/a>, va href="+code=DC2CTL" class="sref">DC2CTLv/a>, 0, va href="+code=DC2CTL" class="sref">DC2CTLv/a>, 1, 0x7F, 900, 2400, 12500, 14),o 109v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=DC3" class="sref">DC3v/a>, va href="+code=DC3CTL" class="sref">DC3CTLv/a>, 0, va href="+code=DC3CTL" class="sref">DC3CTLv/a>, 1, 0x7F, 900, 2400, 12500, 14),o 110v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=LDO0" class="sref">LDO0v/a>, va href="+code=LDOEN2" class="sref">LDOEN2v/a>, 0, va href="+code=LDODIS2" class="sref">LDODIS2v/a>, 0, 0x7F, 900, 3400, 25000, 160),o 111v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=LDO1" class="sref">LDO1v/a>, va href="+code=LDOEN2" class="sref">LDOEN2v/a>, 1, va href="+code=LDODIS2" class="sref">LDODIS2v/a>, 1, 0x7F, 900, 3400, 25000, 160),o 112v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=LDO2" class="sref">LDO2v/a>, va href="+code=LDOEN2" class="sref">LDOEN2v/a>, 2, va href="+code=LDODIS2" class="sref">LDODIS2v/a>, 2, 0x7F, 900, 3400, 25000, 160),o 113v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=LDO3" class="sref">LDO3v/a>, va href="+code=LDOEN2" class="sref">LDOEN2v/a>, 3, va href="+code=LDODIS2" class="sref">LDODIS2v/a>, 3, 0x7F, 900, 3400, 25000, 160),o 114v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=LDO4" class="sref">LDO4v/a>, va href="+code=LDOEN2" class="sref">LDOEN2v/a>, 4, va href="+code=LDODIS2" class="sref">LDODIS2v/a>, 4, 0x3F, 750, 1500, 12500, 133),o 115v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=LDO5" class="sref">LDO5v/a>, va href="+code=LDOEN2" class="sref">LDOEN2v/a>, 5, va href="+code=LDODIS2" class="sref">LDODIS2v/a>, 5, 0x7F, 900, 3400, 25000, 267),o 116v/a>        va href="+code=RC5T583_REG" class="sref">RC5T583_REGv/a>(va href="+code=LDO6" class="sref">LDO6v/a>, va href="+code=LDOEN2" class="sref">LDOEN2v/a>, 6, va href="+code=LDODIS2" class="sref">LDODIS2v/a>, Lv/a>, 1, 0x7F, 700, 1500, 12500, 4),o 107v/a>        va href="+code=RC5T583_REG" class, v7">LDOEN2v/a>, 6, v7(va href="+code=LDO6" class="sref">LDO6v/a>, va href="7code=LDOEN2" class="sref">LDOEN2v/a>, 6, va href="+c7de=LDODIS2" class="sref">LDODIS2v/a>, Lv/a>, 1, 0x7F, 700, 1500, 12500, 4),o 108v/a>        va href="+code=RC5T583_REG" class, v8">LDOEN2v/a>, 6, v8(va href="+code=LDO6" clasref">RC5T583_REGv/aasrhref="+code=LDOEN2" class="sreref">RC5T583_REGv/asreref="+code=LDODIS2" class="sref">LDODIS2v/a>, Lv/a>, 1, 0x7F, 700, 1500, 12500, 4),o 109v/a>        va href="+code=RC5T583_REG" classv/a9ef">RC5T583_REGv/a9(va href="+code=LDO6" clasref">RC5T583_REGv/aasrhref="+code=LDOEN2" class="sreref">RC5T583_REGv/asreref="+code=LDODIS2" class="sref">LDODIS2v/a>, Lv/a>, 1, 0x7F, 700, 1500, 12500, 4),o  78v/a>};o  78v/a>};o  59v/a>statiprobref="+code=rc5t583_regulator_enablprobre=RC5lass="line" namptiL105/platform_devicef="+code=rc5t5/platform_devicef="+cine" namptiL105/ist_voltage_linearpa> *va href="+code=rdev" class="sref">rdevv/a>)oRC5T583_REGULATOR_MAXv/a>] = {o  55v/a>        struct va href="+or" class="sref">  55v/a>        struct va href="+code=uV_step" claclass="sref">regv/a> = va href"+code=rdev_get_drvdata" class="sre/ist_voltage_linearpa> *va ode=reg_info" class=">devicev/a>           *ve" namptiL101"> pariL53voltage_linearpariL5*va hiL78" class="line" namptiL78">  78v/a>};o  55v/_/platform_>regv/a> = va href=  55v/_/platform_>reef="+cine" namptiL105/i>regv/a> = va hrefp_>reef="+code=uV_step" claclass="s/pla">regv/a> = va href"+code=r/pla">re_drvdata" class="sre>  55v/a>        struct va href="ode=reg_info" class=">devicev/a>           *vhiL78" class="line" namptiL78">  78v/a>};o  56v/a> cludm_>regv/a> = va href=  56v/a> cludm_>reef="+or" class="sref">ref=>regv/a> = va href=  m_>reef="iL78" class="line" namptiL78">  78v/a>};o  47v/a> confiv/a>        .va hre47v/a> confivfo" class="sref">rc5confiv/a>        .va confivfo" cref=tiL78" class="line" namptiL78">  78v/a>};o  55v/_>};ore/a>        .va hreef="+code=uV_step" claNULef">DC3CTLv/a>, NULeef="iL78" class="line" namptiL78">  78v/a>};o  55v/_>};oreatic struct va hrefuv_per_us" class="sref">enable_uv_per_usv/a>;o  47v/a> mev/a>(struct va href="+code=regulator_dev" class="sref">regulator_devv/a> *va r_us" class="sref">enable_uv_per_usv/a>;o  51v/a>        struct va href="+code=rc5t583_regulator_info" class="sref">rc5t5it va href="+codei*va r_us" class="sref">enable_uv_per_usv/a>;oenable_uv_per_usv/a>;o                r_us" class="sref">enable_uv_per_usv/a>;o  34v/a>oregv/a> = va hrefp_>reef=")ass="sref">RC5T583_REGULATOR_MAXv/a>] = {o *va ode=reg_info" class=">devicev/a>           *v,ef="+code=namp" class="sref"No /platfor _>re, exitlas...\nclass="stringhiL78" class="line" namptiL78">  78v/a>};ouV_stepv/a> =ENODEf    r_us" class="sref">enable_uv_per_usv/a>;o 103v/a>}o  79v/a>oreatic struct va hrefuv_pe+code=uV_step" claclam_kzallo88">  88v/a>      am_kzallo8_drvdref="+code=ops" clas/ist_voltage_linearpa> *va ode=reg_info" class=">devicev/a>           *v,efss="line" namptiL109"> 10reg_infov/a>[va href="+code=RC5T583_REGULATOR_MAX" *tiL79" class="line" namptiL79">  79v/a>orc5t583_regulator_  55v/_>};oDC3CTLv/a>, GFP_KERNEe  *vhiL78" class="line" namptiL78">  78v/a>};oreatic struct va hrefuv_pe)ass="sref">RC5T583_REGULATOR_MAXv/a>] = {o *va ode=reg_info" class=">devicev/a>           *v,ef="+code=namp" class="sref"Memory allo8as pu failed exitlas..\nclass="stringhiL78" class="line" namptiL78">  78v/a>};ouV_stepv/a> =ENOMEM    r_us" class="sref">enable_uv_per_usv/a>;o 103v/a>}o 103v/a>}o  67v/a>o                lass=efss="line" namptiL109"> 10reg_infov/a>[va href="+code=RC5T583_REGULATOR_MAX"; ++="line" namptiL 90v/a>                )ass="sref">RC5T583_REGULATOR_MAXv/a>] = {oref=>regv/a> = va href=  m_>reef="+code=uV_step" cla/i>regv/a> = va hrefp_>reef="a href="+code=reg" class="udm_>regv/a> = va href=   cludm_>reef="info" class="sre 90v/a>                ]r_us" class="sref">enable_uv_per_usv/a>;oenable_uv_per_usv/a>;o  No need to     vspa2it"> *rea>vsno       vspa_>re       vspa2 class="comment">/* Devices */v/spa2.oref=>regv/a> = va href=  m_>reef="href="+code=rdev" class="sref">rdevv/a>)oenable_uv_per_usv/a>;o  34v/a>ore/a>        .va hreef="+coref="+code=ops" classreatic struct va hrefuv_peinfo" class="sre 90v/a>                ]r_us" class="sref">enable_uv_per_usv/a>;o va href="+code=rc5t583_reg_info" class="sre 90v/a>                ]r_us" class="sref">enable_uv_per_usv/a>;ore/a>        .va hreef="a href="+code=reg" class="sref">regv/a>->va href="+cclass="sref">set_voit va href="+codei*va r_us" class="sref">enable_uv_per_usv/a>;ore/a>        .va hreef="a href="+code=reg" c">rc5t583v/a>          *vclass="sref">enable_timeva>        struct va href="r_us" class="sref">enable_uv_per_usv/a>;ore/a>        .va hreef="a href="+code=reg" c">devicev/a>           *va href="+code=ops" clas/ist_voltage_linearpa> *va ode=reg_info" class=">devicev/a>           *vr_us" class="sref">enable_uv_per_usv/a>;oenable_uv_per_usv/a>;oset_voit va href="+codei*va ode=reg_info" class=">L87">  87v/a>        .va href="+code=deeps=ep_id" class="sref">deepsleeNONpv/a> = va href="">deepsleeNONpef="href="+code=rdev" class="sref">rdevv/a>)oenable_uv_per_usv/a>;oenable_uv_per_usv/a>;oenable_timev/ext_power=rcq confiv/a>        .va h_timev/ext_power=rcq confiv_drvdata" class="sre>  55v/a>        struct va href="ode=reg_info" class=">devicev/a>           *vS2v/a>, Lv/a>, 1, 0x7F, 700, 1500, 12500, 4),o  87v/a>        .va href="+code=deepS2v/a>, Lv/a>, 1, 0x7F, 700, 1500, 12500, 4),oregv/a> = va hrefp_>reef="a href="+code=reg" clasegulatoext_pw> controef="+code=regulator_set_voext_pw> controereg_info" class="sre 90v/a>                ]S2v/a>, Lv/a>, 1, 0x7F, 700, 1500, 12500, 4),oregv/a> = va hrefp_>reef="a href="+code=reg" clasegulatohref="+codslo53voltage_linearresegulatohref="+codslo5reg_info" class="sre 90v/a>                ]hiL78" class="line" namptiL78">  78v/a>};o     vspa2 class="comment">/* Devices */v/spa2.ovsnot a majspaissue,    vspa2 class="comment">/* Devices */v/spa2.o/* Devices */v/spa2.o/* Devices */v/spa2.ordevv/a>)o *va ode=reg_info" class=">devicev/a>           *v,ref="+code=rdev" class="sref">rdevv/a>)o                )iL78" class="line" namptiL78">  78v/a>};o  45v/a>o  45v/a>o        .va confivfo" lass="line" namptidevicev/a>           *va href="+code=ops" clas/ist_voltage_linearpa> *va ode=reg_info" class=">devicev/a>           *vr_us" class="sref">enable_uv_per_usv/a>;o        .va confivfo" lass="line" namp="udm_>regv/a> = va hrefcludm_>reef="+lass="sref">set_voltf=>regv/a> = va href=  m_>reef="iL78" class="line" namptiL78">  78v/a>};o        .va confivfo" lass="line" nampt"linef=>regv/a> = va hreft"linef=>reef="+lass="sref">set_volt/a>        .va hreef="iL78" class="line" namptiL78">  78v/a>};o        .va confivfo" lass="line" namprhref="+code=regulator_sss="sreclass="sref">enable_timeva>        struct va href="a href="+code=reg" clasef="+code=regulator_sss="sreiL78" class="line" namptiL78">  78v/a>};o  78v/a>};oregulator_devv/a> *va class="sref">set_voltage_tim    vspa3voltage_linearresegulato    vspa_drvdref="+code=ops" clas5it va href="+codei*va ode=reg_info" class=">L88">  88v/a>        .va ,href="+code=ops" clasconfiv/a>        .va confivfo" )iL78" class="line" namptiL78">  78v/a>};o        .va IS_ERR_drvdata" class="sre>voltage_sel_regmapv/a>(va h)ass="sref">RC5T583_REGULATOR_MAXv/a>] = {o *va ode=reg_info" class=">devicev/a>           *v,ef="+code=namp" class="sref"Failed to     vspa2      vspa%s\nclass="string,s="sref">RC5T583_REGULATOR_MAXv/a>] = {o  88v/a>        .va ne" namptiL89">  89v/a>                .va )iL78" class="line" namptiL78">  78v/a>};oenablPTR_ERR/a>        .va PTR_ERR_drvdata" class="sre>voltage_sel_regmapv/a>(va hiL78" class="line" namptiL78">  78v/a>};o  78v/a>};o 103v/a>}ore/a>        .va hreef="a href="+code=reg" clef">regulator_devv/a> *va class="sref">set_voef">regulator_devv/a> *va r_us" class="sref">enable_uv_per_usv/a>;o 103v/a>}oregv/a> = va href/platforms="sref">re_drvdata" class="sre/ist_voltage_linearpa> *va +code=curr_uV" classatic struct va hrefuv_pe)r_us" class="sref">enable_uv_per_usv/a>;oenable_uv_per_usv/a>;oenable_uv_per_usv/a>;o  45v/a>o                lahre=e0href="+code=rdev" class="sref">rdevv/a>)oset_voltage_timun    vspa3voltage_linearresegulatoun    vspa_drvdata" class="sre>reatic struct va hrefuv_peinfo" class="sre 90v/a>                ]lass="line" namprvoltage_sel_regmapv/a>(va hiL78" class="line" namptiL78">  78v/a>};o  67v/a>oenable_uv_per_usv/a>;o 103v/a>}oenable_uv_per_usv/a>;o  59v/a>statiremovref="+code=rc5t583_regulator_enablremovr_drvdlass="line" namptiL105/platform_devicef="+code=rc5t5/platform_devicef="+cine" namptiL105/ist_voltage_linearpa> *va href="+code=rdev" class="sref">rdevv/a>)oRC5T583_REGULATOR_MAXv/a>] = {o  55v/_>};oreatic struct va hrefuv_pe+code=uV_step" cla/platforms="sref">regv/a> = va href/platforms="sref">re_drvdata" class="sre/ist_voltage_linearpa> *va hiL78" class="line" namptiL78">  78v/a>};o                r_us" class="sref">enable_uv_per_usv/a>;o  45v/a>o                lass=efss="line" namptiL109"> 10reg_infov/a>[va href="+code=RC5T583_REGULATOR_MAX"; ++="line" namptiL 90v/a>                )tiL45" class="line" namptiL45">  45v/a>oreage_timun    vspa3voltage_linearresegulatoun    vspa_drvdata" class="sre>reatic struct va hrefuv_peinfo" class="sre 90v/a>                ]lass="line" namprvoltage_sel_regmapv/a>(va hiL78" class="line" namptiL78">  78v/a>};oenable_uv_per_usv/a>;o 103v/a>}oenable_uv_per_usv/a>;o  59v/a>stati_"srefef="+code=rc5t5L59">  59v/a>stati_"sref    .vass="sref">RC5T583_REGULATOR_MAXv/a>] = {o = va hreft"line    .vass="sref">RC5T583_REGULATOR_MAXv/a>] = {o  89v/a>                .va h href="+code=namp" class="sref">nampv/a> = vspa2class="string,s="sref">RC5T583_REGULATOR_MAXv/a>] = {o  94v/a>                .va hreef="+code=owner" class="sref">ownerv/a> = va href="+code=THIs="sref">RC5T583_REGULATOR_MAXv/a>] = {oRC5T583_REGULATOR_MAXv/a>] = {o probref="+code=rc5t5probre=RC class="lilass="sref">enable_timev/a>        probref="+code=rc5t583_regulator_enablprobre=RCIs="sref">RC5T583_REGULATOR_MAXv/a>] = {oenable_timev/a>        removref="+code=rc5t583_regulator_enablremovr_drvIs="sref">RC5T583_REGULATOR_MAXv/a>] = {o  78v/a>};o  79v/a>o  59v/a>staticludef="+code=rc5t5L59">  59v/a>staticlud_drvdvoid)tiL45" class="line" namptiL45">  45v/a>oRC5T583_REGULATOR_MAXv/a>] = {o  59v/a>stati_"srefef="+code=rc5t5L59">  59v/a>stati_"sref    hiL78" class="line" namptiL78">  78v/a>};o 103v/a>}o  59v/a>staticludef="+code=rc5t5L59">  59v/a>staticlud_drvhiL78" class="line" namptiL78">  78v/a>};o  45v/a>o        .va __exit"srets="line" namptiL59">  59v/a>statiexit/a>        .va L59">  59v/a>statiexit_drvdvoid)tiL45" class="line" namptiL45">  45v/a>oRC5T583_REGULATOR_MAXv/a>] = {o  59v/a>stati_"srefef="+code=rc5t5L59">  59v/a>stati_"sref    hiL78" class="line" namptiL78">  78v/a>};o 103v/a>}o        .va moduleiexit_drvdata" class="sre>59">  59v/a>statiexit/a>        .va L59">  59v/a>statiexit_drvhiL78" class="line" namptiL78">  78v/a>};o  78v/a>};o        .va ="+cod_AUTHOR_drvda="+code=namp" class="sref"Laxm+coDewang+coass=ldewang+c@nvidia.comahreclass="stringhiL78" class="line" namptiL78">  78v/a>};o        .va ="+cod_DESCRIPTION_drvda="+code=namp" class="sref"de=RC5T       vspa_"lineclass="stringhiL78" class="line" namptiL78">  78v/a>};o        .va ="+cod_ALIAS_drvda="+code=namp" class="sref"/platfor:>nampv/a> = vspa2class="stringhiL78" class="line" namptiL78">  78v/a>};oownerv/a> = va="+cod_LICENS"_drvda="+code=namp" class="sref"GPL v2class="stringhiL78" class="line" namptiL78">  78v/a>};o


The original LXR software by"> *lass="linehttp://sourcetfoge.net/projects/lxa3>LXR "linuludy*va +cthis experine" al ine" pu by"ass="linemailto:lxa@5t5ux.no">lxa@5t5ux.no.va n
lxa.5t5ux.no kindly hovspd by"ass="linehttp://www.redpill-5t5pro.no">Redpill Lt5pro AS_drv, provider of Lt5ux consultlas and operas pus serevics since#1995.