linux/drivers/mfd/rc5t583.c
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   1 /a> spa" class="comment">/* /spa"
	   2 /a> spa" class="comment"> * Core driver access RC5T583 power management chip. /spa"
	   3 /a> spa" class="comment"> * /spa"
	   4 /a> spa" class="comment"> * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved. /spa"
	   5 /a> spa" class="comment"> * Author: Laxman dewangan <ldewangan@nvidia.com> /spa"
	   6 /a> spa" class="comment"> * /spa"
	   7 /a> spa" class="comment"> * Based on code /spa"
	   8 /a> spa" class="comment"> *      Copyright (C) 2011 RICOH COMPANY,LTD /spa"
	   9 /a> spa" class="comment"> * /spa"
	  2.6.a> spa" class="comment"> * This program is free software; you ca" redistribute it and/or modify it /spa"
	  11 /a> spa" class="comment"> * under the terms and condi.12"s of the GNU General Public License, /spa"
	  12 /a> spa" class="comment"> * vers6.322, as published by the Free Software Founda.12". /spa"
	  13 /a> spa" class="comment"> * /spa"
	  14 /a> spa" class="comment"> * This program is distributed in the hope it will be useful, but WITHOUT /spa"
	  15 /a> spa" class="comment"> * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or /spa"
	  16 /a> spa" class="comment"> * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for /spa"
	  17 /a> spa" class="comment"> * more details. /spa"
	  18 /a> spa" class="comment"> * /spa"
	  19 /a> spa" class="comment"> * You should have received a copy of the GNU General Public License /spa"
	  2.6.a> spa" class="comment"> * along with this program.  If not, see <http://www.gnu.org/licenses/>. /spa"
	  21 /a> spa" class="comment"> * /spa"
	  22 /a> spa" class="comment"> */ /spa"
	  23 /a>#include <linux/interrupt.h /a>>	  24 /a>#include <linux/irq.h /a>>	  25 /a>#include <linux/kernel.h /a>>	  26 /a>#include <linux/module.h /a>>	  27 /a>#include <linux/init.h /a>>	  28 /a>#include <linux/err.h /a>>	  29 /a>#include <linux/slab.h /a>>	  30 /a>#include <linux/i2c.h /a>>	  31 /a>#include <linux/mfd/core.h /a>>	  32 /a>#include <linux/mfd/rc5t583.h /a>>	  33 /a>#include <linux/regmap.h /a>>	  34 /a>	  35 /a>#define  a href="+code=RICOH_ONOFFSEL_REG" class="sref">RICOH_ONOFFSEL_REG /a>      0x10	  36 /a>#define  a href="+code=RICOH_SWCTL_REG" class="sref">RICOH_SWCTL_REG /a>         0x5E	  37 /a>	  38 /a>struct  a href="+code=deepsleep_control_da.a" class="sref">deepsleep_control_da.a /a> {	  39 /a>         a href="+code=u8" class="sref">u8 /a>  a href="+code=reg_add" class="sref">reg_add /a>;	  40 /a>         a href="+code=u8" class="sref">u8 /a>  a href="+code=ds_pos_bit" class="sref">ds_pos_bit /a>;	  41 /a>};	  42 /a>	  43 /a>#define  a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=_id" class="sref">_id /a>,  a href="+code=_reg" class="sref">_reg /a>,  a href="+code=_pos" class="sref">_pos /a>)         \	  44 /a>        {                                       \	  45 /a>                . a href="+code=reg_add" class="sref">reg_add /a> =  a href="+code=RC5T583_" class="sref">RC5T583_ /a>##_reg,      \	  46 /a>                . a href="+code=ds_pos_bit" class="sref">ds_pos_bit /a> =  a href="+code=_pos" class="sref">_pos /a>,             \	  47 /a>        }	  48 /a>	  49 /a>static struct  a href="+code=deepsleep_control_da.a" class="sref">deepsleep_control_da.a /a>  a href="+code=deepsleep_da.a" class="sref">deepsleep_da.a /a>[] = {	  50 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=DC0" class="sref">DC0 /a>,  a href="+code=SLPSEQ1" class="sref">SLPSEQ1 /a>, 0),	  51 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=DC1" class="sref">DC1 /a>,  a href="+code=SLPSEQ1" class="sref">SLPSEQ1 /a>, 4),	  52 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=DC2" class="sref">DC2 /a>,  a href="+code=SLPSEQ2" class="sref">SLPSEQ2 /a>, 0),	  53 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=DC3" class="sref">DC3 /a>,  a href="+code=SLPSEQ2" class="sref">SLPSEQ2 /a>, 4),	  54 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=LDO0" class="sref">LDO0 /a>,  a href="+code=SLPSEQ3" class="sref">SLPSEQ3 /a>, 0),	  55 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=LDO1" class="sref">LDO1 /a>,  a href="+code=SLPSEQ3" class="sref">SLPSEQ3 /a>, 4),	  56 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=LDO2" class="sref">LDO2 /a>,  a href="+code=SLPSEQ4" class="sref">SLPSEQ4 /a>, 0),	  57 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=LDO3" class="sref">LDO3 /a>,  a href="+code=SLPSEQ4" class="sref">SLPSEQ4 /a>, 4),	  58 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=LDO4" class="sref">LDO4 /a>,  a href="+code=SLPSEQ5" class="sref">SLPSEQ5 /a>, 0),	  59 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=LDO5" class="sref">LDO5 /a>,  a href="+code=SLPSEQ5" class="sref">SLPSEQ5 /a>, 4),	  60 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=LDO6" class="sref">LDO6 /a>,  a href="+code=SLPSEQ6" class="sref">SLPSEQ6 /a>, 0),	  61 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=LDO7" class="sref">LDO7 /a>,  a href="+code=SLPSEQ6" class="sref">SLPSEQ6 /a>, 4),	  62 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=LDO8" class="sref">LDO8 /a>,  a href="+code=SLPSEQ7" class="sref">SLPSEQ7 /a>, 0),	  63 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=LDO9" class="sref">LDO9 /a>,  a href="+code=SLPSEQ7" class="sref">SLPSEQ7 /a>, 4),	  64 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=PSO0" class="sref">PSO0 /a>,  a href="+code=SLPSEQ8" class="sref">SLPSEQ8 /a>, 0),	  65 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=PSO1" class="sref">PSO1 /a>,  a href="+code=SLPSEQ8" class="sref">SLPSEQ8 /a>, 4),	  66 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=PSO2" class="sref">PSO2 /a>,  a href="+code=SLPSEQ9" class="sref">SLPSEQ9 /a>, 0),	  67 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=PSO3" class="sref">PSO3 /a>,  a href="+code=SLPSEQ9" class="sref">SLPSEQ9 /a>, 4),	  68 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=PSO4" class="sref">PSO4 /a>,  a href="+code=SLPSEQ10" class="sref">SLPSEQ10 /a>, 0),	  69 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=PSO5" class="sref">PSO5 /a>,  a href="+code=SLPSEQ10" class="sref">SLPSEQ10 /a>, 4),	  70 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=PSO6" class="sref">PSO6 /a>,  a href="+code=SLPSEQ11" class="sref">SLPSEQ11 /a>, 0),	  71 /a>         a href="+code=DEEPSLEEP_INIT" class="sref">DEEPSLEEP_INIT /a>( a href="+code=PSO7" class="sref">PSO7 /a>,  a href="+code=SLPSEQ11" class="sref">SLPSEQ11 /a>, 4),	  72 /a>};	  73 /a>	  74 /a>#define  a href="+code=EXT_PWR_REQ" class="sref">EXT_PWR_REQ /a>             \	  75 /a>        ( a href="+code=RC5T583_EXT_PWRREQ1_CONTROL" class="sref">RC5T583_EXT_PWRREQ1_CONTROL /a> |  a href="+code=RC5T583_EXT_PWRREQ2_CONTROL" class="sref">RC5T583_EXT_PWRREQ2_CONTROL /a>)	  76 /a>	  77 /a>static struct  a href="+code=mfd_cell" class="sref">mfd_cell /a>  a href="+code=rc5t583_subdevs" class="sref">rc5t583_subdevs /a>[] = {	  78 /a>        {. a href="+code=nam/" class="sref">nam/ /a> =  spa" class="string">"rc5t583-gpio" /spa"
,},	  79 /a>        {. a href="+code=nam/" class="sref">nam/ /a> =  spa" class="string">"rc5t583-regulator" /spa"
,},	  80 /a>        {. a href="+code=nam/" class="sref">nam/ /a> =  spa" class="string">"rc5t583-rtc" /spa"
,      },	  81 /a>        {. a href="+code=nam/" class="sref">nam/ /a> =  spa" class="string">"rc5t583-key" /spa"
,      }	  82 /a>};	  83 /a>	  84 /a>static int  a href="+code=__rc5t583_set_ext_pwrreq1_control" class="sref">__rc5t583_set_ext_pwrreq1_control /a>(struct  a href="+code=devic/" class="sref">devic/ /a> * a href="+code=dev" class="sref">dev /a>,	  85 /a>        int  a href="+code=id" class="sref">id /a>, int  a href="+code=ext_pwr" class="sref">ext_pwr /a>, int  a href="+code=slots" class="sref">slots /a>)	  86 /a>{	  87 /a>        int  a href="+code=ret" class="sref">ret /a>;	  88 /a>         a href="+code=uint8_t" class="sref">uint8_t /a>  a href="+code=sleepseq_val" class="sref">sleepseq_val /a> = 0;	  89 /a>        unsigned int  a href="+code=en_bit" class="sref">en_bit /a>;	  90 /a>        unsigned int  a href="+code=slot_bit" class="sref">slot_bit /a>;	  91 /a>	  92 /a>        if ( a href="+code=id" class="sref">id /a> ==  a href="+code=RC5T583_DS_DC0" class="sref">RC5T583_DS_DC0 /a>) {	  93 /a>                 a href="+code=dev_err" class="sref">dev_err /a>( a href="+code=dev" class="sref">dev /a>,  spa" class="string">"PWRREQ1 is invalid control for rail %d\n" /spa"
,  a href="+code=id" class="sref">id /a>);	  94 /a>                return - a href="+code=EINVAL" class="sref">EINVAL /a>;	  95 /a>        }	  96 /a>	  97 /a>         a href="+code=en_bit" class="sref">en_bit /a> =  a href="+code=deepsleep_da.a" class="sref">deepsleep_da.a /a>[ a href="+code=id" class="sref">id /a>]. a href="+code=ds_pos_bit" class="sref">ds_pos_bit /a>;	  98 /a>         a href="+code=slot_bit" class="sref">slot_bit /a> =  a href="+code=en_bit" class="sref">en_bit /a> + 1;	  99 /a>         a href="+code=ret" class="sref">ret /a> =  a href="+code=rc5t583_read" class="sref">rc5t583_read /a>( a href="+code=dev" class="sref">dev /a>,  a href="+code=deepsleep_da.a" class="sref">deepsleep_da.a /a>[ a href="+code=id" class="sref">id /a>]. a href="+code=reg_add" class="sref">reg_add /a>, & a href="+code=sleepseq_val" class="sref">sleepseq_val /a>);	 100 /a>        if ( a href="+code=ret" class="sref">ret /a> < 0) {	 101 /a>                 a href="+code=dev_err" class="sref">dev_err /a>( a href="+code=dev" class="sref">dev /a>,  spa" class="string">"Error i" reading reg 0x%x\n" /spa"
,	 102 /a>                                 a href="+code=deepsleep_da.a" class="sref">deepsleep_da.a /a>[ a href="+code=id" class="sref">id /a>]. a href="+code=reg_add" class="sref">reg_add /a>);	 103 /a>                return  a href="+code=ret" class="sref">ret /a>;	 104 /a>        }	 105 /a>	 106 /a>         a href="+code=sleepseq_val" class="sref">sleepseq_val /a> &= ~(0xF <<  a href="+code=en_bit" class="sref">en_bit /a>);	 107 /a>         a href="+code=sleepseq_val" class="sref">sleepseq_val /a> |=  a href="+code=BIT" class="sref">BIT /a>( a href="+code=en_bit" class="sref">en_bit /a>);	 108 /a>         a href="+code=sleepseq_val" class="sref">sleepseq_val /a> |= (( a href="+code=slots" class="sref">slots /a> & 0x7) <<  a href="+code=slot_bit" class="sref">slot_bit /a>);	 109 /a>         a href="+code=ret" class="sref">ret /a> =  a href="+code=rc5t583_set_bits" class="sref">rc5t583_set_bits /a>( a href="+code=dev" class="sref">dev /a>,  a href="+code=RICOH_ONOFFSEL_REG" class="sref">RICOH_ONOFFSEL_REG /a>,  a href="+code=BIT" class="sref">BIT /a>(1));	 110 /a>        if ( a href="+code=ret" class="sref">ret /a> < 0) {	 111 /a>                 a href="+code=dev_err" class="sref">dev_err /a>( a href="+code=dev" class="sref">dev /a>,  spa" class="string">"Error i" upda.1ng the 0x%02x register\n" /spa"
,	 112 /a>                                 a href="+code=RICOH_ONOFFSEL_REG" class="sref">RICOH_ONOFFSEL_REG /a>);	 113 /a>                return  a href="+code=ret" class="sref">ret /a>;	 114 /a>        }	 115 /a>	 116 /a>         a href="+code=ret" class="sref">ret /a> =  a href="+code=rc5t583_writ/" class="sref">rc5t583_writ/ /a>( a href="+code=dev" class="sref">dev /a>,  a href="+code=deepsleep_da.a" class="sref">deepsleep_da.a /a>[ a href="+code=id" class="sref">id /a>]. a href="+code=reg_add" class="sref">reg_add /a>,  a href="+code=sleepseq_val" class="sref">sleepseq_val /a>);	 117 /a>        if ( a href="+code=ret" class="sref">ret /a> < 0) {	 118 /a>                 a href="+code=dev_err" class="sref">dev_err /a>( a href="+code=dev" class="sref">dev /a>,  spa" class="string">"Error i" writing reg 0x%x\n" /spa"
,	 119 /a>                                 a href="+code=deepsleep_da.a" class="sref">deepsleep_da.a /a>[ a href="+code=id" class="sref">id /a>]. a href="+code=reg_add" class="sref">reg_add /a>);	 120 /a>                return  a href="+code=ret" class="sref">ret /a>;	 121 /a>        }	 122 /a>	 123 /a>        if ( a href="+code=id" class="sref">id /a> ==  a href="+code=RC5T583_DS_LDO4" class="sref">RC5T583_DS_LDO4 /a>) {	 124 /a>                 a href="+code=ret" class="sref">ret /a> =  a href="+code=rc5t583_writ/" class="sref">rc5t583_writ/ /a>( a href="+code=dev" class="sref">dev /a>,  a href="+code=RICOH_SWCTL_REG" class="sref">RICOH_SWCTL_REG /a>, 0x1);	 125 /a>                if ( a href="+code=ret" class="sref">ret /a> < 0)	 126 /a>                         a href="+code=dev_err" class="sref">dev_err /a>( a href="+code=dev" class="sref">dev /a>,  spa" class="string">"Error i" writing reg 0x%x\n" /spa"
,	 127 /a>                                 a href="+code=RICOH_SWCTL_REG" class="sref">RICOH_SWCTL_REG /a>);	 128 /a>        }	 129 /a>        return  a href="+code=ret" class="sref">ret /a>;	 130 /a>}	 131 /a>	 132 /a>static int  a href="+code=__rc5t583_set_ext_pwrreq2_control" class="sref">__rc5t583_set_ext_pwrreq2_control /a>(struct  a href="+code=devic/" class="sref">devic/ /a> * a href="+code=dev" class="sref">dev /a>,	 133 /a>        int  a href="+code=id" class="sref">id /a>, int  a href="+code=ext_pwr" class="sref">ext_pwr /a>)	 134 /a>{	 135 /a>        int  a href="+code=ret" class="sref">ret /a>;	 136 /a>	 137 /a>        if ( a href="+code=id" class="sref">id /a> !=  a href="+code=RC5T583_DS_DC0" class="sref">RC5T583_DS_DC0 /a>) {	 138 /a>                 a href="+code=dev_err" class="sref">dev_err /a>( a href="+code=dev" class="sref">dev /a>,  spa" class="string">"PWRREQ2 is invalid control for rail %d\n" /spa"
,  a href="+code=id" class="sref">id /a>);	 139 /a>                return - a href="+code=EINVAL" class="sref">EINVAL /a>;	 140 /a>        }	 141 /a>	 142 /a>         a href="+code=ret" class="sref">ret /a> =  a href="+code=rc5t583_set_bits" class="sref">rc5t583_set_bits /a>( a href="+code=dev" class="sref">dev /a>,  a href="+code=RICOH_ONOFFSEL_REG" class="sref">RICOH_ONOFFSEL_REG /a>,  a href="+code=BIT" class="sref">BIT /a>(2));	 143 /a>        if ( a href="+code=ret" class="sref">ret /a> < 0)	 144 /a>                 a href="+code=dev_err" class="sref">dev_err /a>( a href="+code=dev" class="sref">dev /a>,  spa" class="string">"Error i" upda.1ng the ONOFFSEL 0x10 register\n" /spa"
);	 145 /a>        return  a href="+code=ret" class="sref">ret /a>;	 146 /a>}	 147 /a>	 148 /a>int  a href="+code=rc5t583_ext_power_req_config" class="sref">rc5t583_ext_power_req_config /a>(struct  a href="+code=devic/" class="sref">devic/ /a> * a href="+code=dev" class="sref">dev /a>, int  a href="+code=ds_id" class="sref">ds_id /a>,	 149 /a>        int  a href="+code=ext_pwr_req" class="sref">ext_pwr_req /a>, int  a href="+code=deepsleep_slot_nr" class="sref">deepsleep_slot_nr /a>)	 150 /a>{	 151 /a>        if (( a href="+code=ext_pwr_req" class="sref">ext_pwr_req /a> &  a href="+code=EXT_PWR_REQ" class="sref">EXT_PWR_REQ /a>) ==  a href="+code=EXT_PWR_REQ" class="sref">EXT_PWR_REQ /a>)	 152 /a>                return - a href="+code=EINVAL" class="sref">EINVAL /a>;	 153 /a>	 154 /a>        if ( a href="+code=ext_pwr_req" class="sref">ext_pwr_req /a> &  a href="+code=RC5T583_EXT_PWRREQ1_CONTROL" class="sref">RC5T583_EXT_PWRREQ1_CONTROL /a>)	 155 /a>                return  a href="+code=__rc5t583_set_ext_pwrreq1_control" class="sref">__rc5t583_set_ext_pwrreq1_control /a>( a href="+code=dev" class="sref">dev /a>,  a href="+code=ds_id" class="sref">ds_id /a>,	 156 /a>                                 a href="+code=ext_pwr_req" class="sref">ext_pwr_req /a>,  a href="+code=deepsleep_slot_nr" class="sref">deepsleep_slot_nr /a>);	 157 /a>	 158 /a>        if ( a href="+code=ext_pwr_req" class="sref">ext_pwr_req /a> &  a href="+code=RC5T583_EXT_PWRREQ2_CONTROL" class="sref">RC5T583_EXT_PWRREQ2_CONTROL /a>)	 159 /a>                return  a href="+code=__rc5t583_set_ext_pwrreq2_control" class="sref">__rc5t583_set_ext_pwrreq2_control /a>( a href="+code=dev" class="sref">dev /a>,	 160 /a>                         a href="+code=ds_id" class="sref">ds_id /a>,  a href="+code=ext_pwr_req" class="sref">ext_pwr_req /a>);	 161 /a>        return 0;	 162 /a>}	 163 /a> a href="+code=EXPORT_SYMBOL" class="sref">EXPORT_SYMBOL /a>( a href="+code=rc5t583_ext_power_req_config" class="sref">rc5t583_ext_power_req_config /a>);	 164 /a>	 165 /a>static int  a href="+code=rc5t583_clear_ext_power_req" class="sref">rc5t583_clear_ext_power_req /a>(struct  a href="+code=rc5t583" class="sref">rc5t583 /a> * a href="+code=rc5t583" class="sref">rc5t583 /a>,	 166 /a>        struct  a href="+code=rc5t583_platform_da.a" class="sref">rc5t583_platform_da.a /a> * a href="+code=pda.a" class="sref">pda.a /a>)	 167 /a>{	 168 /a>        int  a href="+code=ret" class="sref">ret /a>;	 169 /a>        int  a href="+code=i" class="sref">i /a>;	 170 /a>         a href="+code=uint8_t" class="sref">uint8_t /a>  a href="+code=on_off_val" class="sref">on_off_val /a> = 0;	 171 /a>	 172 /a>         spa" class="comment">/*  Clear ONOFFSEL register */ /spa"
	 173 /a>        if ( a href="+code=pda.a" class="sref">pda.a /a>-> a href="+code=enable_shutdown" class="sref">enable_shutdown /a>)	 174 /a>                 a href="+code=on_off_val" class="sref">on_off_val /a> = 0x1;	 175 /a>	 176 /a>         a href="+code=ret" class="sref">ret /a> =  a href="+code=rc5t583_writ/" class="sref">rc5t583_writ/ /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=dev" class="sref">dev /a>,  a href="+code=RICOH_ONOFFSEL_REG" class="sref">RICOH_ONOFFSEL_REG /a>,  a href="+code=on_off_val" class="sref">on_off_val /a>);	 177 /a>        if ( a href="+code=ret" class="sref">ret /a> < 0)	 178 /a>                 a href="+code=dev_warn" class="sref">dev_warn /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=dev" class="sref">dev /a>,  spa" class="string">"Error i" writing reg %d error: %d\n" /spa"
,	 179 /a>                                         a href="+code=RICOH_ONOFFSEL_REG" class="sref">RICOH_ONOFFSEL_REG /a>,  a href="+code=ret" class="sref">ret /a>);	 180 /a>	 181 /a>         a href="+code=ret" class="sref">ret /a> =  a href="+code=rc5t583_writ/" class="sref">rc5t583_writ/ /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=dev" class="sref">dev /a>,  a href="+code=RICOH_SWCTL_REG" class="sref">RICOH_SWCTL_REG /a>, 0x0);	 182 /a>        if ( a href="+code=ret" class="sref">ret /a> < 0)	 183 /a>                 a href="+code=dev_warn" class="sref">dev_warn /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=dev" class="sref">dev /a>,  spa" class="string">"Error i" writing reg %d error: %d\n" /spa"
,	 184 /a>                                         a href="+code=RICOH_SWCTL_REG" class="sref">RICOH_SWCTL_REG /a>,  a href="+code=ret" class="sref">ret /a>);	 185 /a>	 186 /a>         spa" class="comment">/* Clear sleep sequence register */ /spa"
	 187 /a>        for ( a href="+code=i" class="sref">i /a> =  a href="+code=RC5T583_SLPSEQ1" class="sref">RC5T583_SLPSEQ1 /a>;  a href="+code=i" class="sref">i /a> <=  a href="+code=RC5T583_SLPSEQ11" class="sref">RC5T583_SLPSEQ11 /a>; ++ a href="+code=i" class="sref">i /a>) {	 188 /a>                 a href="+code=ret" class="sref">ret /a> =  a href="+code=rc5t583_writ/" class="sref">rc5t583_writ/ /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=dev" class="sref">dev /a>,  a href="+code=i" class="sref">i /a>, 0x0);	 189 /a>                if ( a href="+code=ret" class="sref">ret /a> < 0)	 190 /a>                         a href="+code=dev_warn" class="sref">dev_warn /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=dev" class="sref">dev /a>,	 191 /a>                                 spa" class="string">"Error i" writing reg 0x%02x error: %d\n" /spa"
,	 192 /a>                                 a href="+code=i" class="sref">i /a>,  a href="+code=ret" class="sref">ret /a>);	 193 /a>        }	 194 /a>        return 0;	 195 /a>}	 196 /a>	 197 /a>static  a href="+code=bool" class="sref">bool /a>  a href="+code=volatile_reg" class="sref">volatile_reg /a>(struct  a href="+code=devic/" class="sref">devic/ /a> * a href="+code=dev" class="sref">dev /a>, unsigned int  a href="+code=reg" class="sref">reg /a>)	 198 /a>{	 199 /a>         spa" class="comment">/* Enable caching i" interrupt registers */ /spa"
	 200 /a>        switch ( a href="+code=reg" class="sref">reg /a>) {	 201 /a>        case  a href="+code=RC5T583_INT_EN_SYS1" class="sref">RC5T583_INT_EN_SYS1 /a>:	 202 /a>        case  a href="+code=RC5T583_INT_EN_SYS2" class="sref">RC5T583_INT_EN_SYS2 /a>:	 203 /a>        case  a href="+code=RC5T583_INT_EN_DCDC" class="sref">RC5T583_INT_EN_DCDC /a>:	 204 /a>        case  a href="+code=RC5T583_INT_EN_RTC" class="sref">RC5T583_INT_EN_RTC /a>:	 205 /a>        case  a href="+code=RC5T583_INT_EN_ADC1" class="sref">RC5T583_INT_EN_ADC1 /a>:	 206 /a>        case  a href="+code=RC5T583_INT_EN_ADC2" class="sref">RC5T583_INT_EN_ADC2 /a>:	 207 /a>        case  a href="+code=RC5T583_INT_EN_ADC3" class="sref">RC5T583_INT_EN_ADC3 /a>:	 208 /a>        case  a href="+code=RC5T583_GPIO_GPEDGE1" class="sref">RC5T583_GPIO_GPEDGE1 /a>:	 209 /a>        case  a href="+code=RC5T583_GPIO_GPEDGE2" class="sref">RC5T583_GPIO_GPEDGE2 /a>:	 210 /a>        case  a href="+code=RC5T583_GPIO_EN_INT" class="sref">RC5T583_GPIO_EN_INT /a>:	 211 /a>                return  a href="+code=fals/" class="sref">fals/ /a>;	 212 /a>	 213 /a>        case  a href="+code=RC5T583_GPIO_MON_IOIN" class="sref">RC5T583_GPIO_MON_IOIN /a>:	 214 /a>                 spa" class="comment">/* This is gpio input register */ /spa"
	 215 /a>                return  a href="+code=tru/" class="sref">tru/ /a>;	 216 /a>	 217 /a>        default:	 218 /a>                 spa" class="comment">/* Enable caching i" gpio registers */ /spa"
	 219 /a>                if (( a href="+code=reg" class="sref">reg /a> >=  a href="+code=RC5T583_GPIO_IOSEL" class="sref">RC5T583_GPIO_IOSEL /a>) &&	 220 /a>                                ( a href="+code=reg" class="sref">reg /a> <=  a href="+code=RC5T583_GPIO_GPOFUNC" class="sref">RC5T583_GPIO_GPOFUNC /a>))	 221 /a>                        return  a href="+code=fals/" class="sref">fals/ /a>;	 222 /a>	 223 /a>                 spa" class="comment">/* Enable caching i" sleep seq registers */ /spa"
	 224 /a>                if (( a href="+code=reg" class="sref">reg /a> >=  a href="+code=RC5T583_SLPSEQ1" class="sref">RC5T583_SLPSEQ1 /a>) && ( a href="+code=reg" class="sref">reg /a> <=  a href="+code=RC5T583_SLPSEQ11" class="sref">RC5T583_SLPSEQ11 /a>))	 225 /a>                        return  a href="+code=fals/" class="sref">fals/ /a>;	 226 /a>	 227 /a>                 spa" class="comment">/* Enable caching of regulator registers */ /spa"
	 228 /a>                if (( a href="+code=reg" class="sref">reg /a> >=  a href="+code=RC5T583_REG_DC0CTL" class="sref">RC5T583_REG_DC0CTL /a>) && ( a href="+code=reg" class="sref">reg /a> <=  a href="+code=RC5T583_REG_SR3CTL" class="sref">RC5T583_REG_SR3CTL /a>))	 229 /a>                        return  a href="+code=fals/" class="sref">fals/ /a>;	 230 /a>                if (( a href="+code=reg" class="sref">reg /a> >=  a href="+code=RC5T583_REG_LDOEN1" class="sref">RC5T583_REG_LDOEN1 /a>) &&	 231 /a>                                        ( a href="+code=reg" class="sref">reg /a> <=  a href="+code=RC5T583_REG_LDO9DAC_DS" class="sref">RC5T583_REG_LDO9DAC_DS /a>))	 232 /a>                        return  a href="+code=fals/" class="sref">fals/ /a>;	 233 /a>	 234 /a>                break;	 235 /a>        }	 236 /a>	 237 /a>        return  a href="+code=tru/" class="sref">tru/ /a>;	 238 /a>}	 239 /a>	 240 /a>static const struct  a href="+code=regmap_config" class="sref">regmap_config /a>  a href="+code=rc5t583_regmap_config" class="sref">rc5t583_regmap_config /a> = {	 241 /a>        . a href="+code=reg_bits" class="sref">reg_bits /a> = 8,	 242 /a>        . a href="+code=val_bits" class="sref">val_bits /a> = 8,	 243 /a>        . a href="+code=volatile_reg" class="sref">volatile_reg /a> =  a href="+code=volatile_reg" class="sref">volatile_reg /a>,	 244 /a>        . a href="+code=max_register" class="sref">max_register /a> =  a href="+code=RC5T583_MAX_REGS" class="sref">RC5T583_MAX_REGS /a>,	 245 /a>        . a href="+code=num_reg_defaults_raw" class="sref">num_reg_defaults_raw /a> =  a href="+code=RC5T583_MAX_REGS" class="sref">RC5T583_MAX_REGS /a>,	 246 /a>        . a href="+code=cache_typ/" class="sref">cache_typ/ /a> =  a href="+code=REGCACHE_RBTREE" class="sref">REGCACHE_RBTREE /a>,	 247 /a>};	 248 /a>	 249 /a>static int  a href="+code=rc5t583_i2c_prob/" class="sref">rc5t583_i2c_prob/ /a>(struct  a href="+code=i2c_client" class="sref">i2c_client /a> * a href="+code=i2c" class="sref">i2c /a>,	 250 /a>                              const struct  a href="+code=i2c_devic/_id" class="sref">i2c_devic/_id /a> * a href="+code=id" class="sref">id /a>)	 251 /a>{	 252 /a>        struct  a href="+code=rc5t583" class="sref">rc5t583 /a> * a href="+code=rc5t583" class="sref">rc5t583 /a>;	 253 /a>        struct  a href="+code=rc5t583_platform_da.a" class="sref">rc5t583_platform_da.a /a> * a href="+code=pda.a" class="sref">pda.a /a> =  a href="+code=i2c" class="sref">i2c /a>-> a href="+code=dev" class="sref">dev /a>. a href="+code=platform_da.a" class="sref">platform_da.a /a>;	 254 /a>        int  a href="+code=ret" class="sref">ret /a>;	 255 /a>         a href="+code=bool" class="sref">bool /a>  a href="+code=irq_init_success" class="sref">irq_init_success /a> =  a href="+code=fals/" class="sref">fals/ /a>;	 256 /a>	 257 /a>        if (! a href="+code=pda.a" class="sref">pda.a /a>) {	 258 /a>                 a href="+code=dev_err" class="sref">dev_err /a>(& a href="+code=i2c" class="sref">i2c /a>-> a href="+code=dev" class="sref">dev /a>,  spa" class="string">"Err: Platform da.a not found\n" /spa"
);	 259 /a>                return - a href="+code=EINVAL" class="sref">EINVAL /a>;	 260 /a>        }	 261 /a>	 262 /a>         a href="+code=rc5t583" class="sref">rc5t583 /a> =  a href="+code=devm_kzalloc" class="sref">devm_kzalloc /a>(& a href="+code=i2c" class="sref">i2c /a>-> a href="+code=dev" class="sref">dev /a>, sizeof(struct  a href="+code=rc5t583" class="sref">rc5t583 /a>),  a href="+code=GFP_KERNEL" class="sref">GFP_KERNEL /a>);	 263 /a>        if (! a href="+code=rc5t583" class="sref">rc5t583 /a>) {	 264 /a>                 a href="+code=dev_err" class="sref">dev_err /a>(& a href="+code=i2c" class="sref">i2c /a>-> a href="+code=dev" class="sref">dev /a>,  spa" class="string">"Memory allocation failed\n" /spa"
);	 265 /a>                return - a href="+code=ENOMEM" class="sref">ENOMEM /a>;	 266 /a>        }	 267 /a>	 268 /a>         a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=dev" class="sref">dev /a> = & a href="+code=i2c" class="sref">i2c /a>-> a href="+code=dev" class="sref">dev /a>;	 269 /a>         a href="+code=i2c_set_clientda.a" class="sref">i2c_set_clientda.a /a>( a href="+code=i2c" class="sref">i2c /a>,  a href="+code=rc5t583" class="sref">rc5t583 /a>);	 270 /a>	 271 /a>         a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=regmap" class="sref">regmap /a> =  a href="+code=devm_regmap_init_i2c" class="sref">devm_regmap_init_i2c /a>( a href="+code=i2c" class="sref">i2c /a>, & a href="+code=rc5t583_regmap_config" class="sref">rc5t583_regmap_config /a>);	 272 /a>        if ( a href="+code=IS_ERR" class="sref">IS_ERR /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=regmap" class="sref">regmap /a>)) {	 273 /a>                 a href="+code=ret" class="sref">ret /a> =  a href="+code=PTR_ERR" class="sref">PTR_ERR /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=regmap" class="sref">regmap /a>);	 274 /a>                 a href="+code=dev_err" class="sref">dev_err /a>(& a href="+code=i2c" class="sref">i2c /a>-> a href="+code=dev" class="sref">dev /a>,  spa" class="string">"regmap initialization failed: %d\n" /spa"
,  a href="+code=ret" class="sref">ret /a>);	 275 /a>                return  a href="+code=ret" class="sref">ret /a>;	 276 /a>        }	 277 /a>	 278 /a>         a href="+code=ret" class="sref">ret /a> =  a href="+code=rc5t583_clear_ext_power_req" class="sref">rc5t583_clear_ext_power_req /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>,  a href="+code=pda.a" class="sref">pda.a /a>);	 279 /a>        if ( a href="+code=ret" class="sref">ret /a> < 0)	 280 /a>                return  a href="+code=ret" class="sref">ret /a>;	 281 /a>	 282 /a>        if ( a href="+code=i2c" class="sref">i2c /a>-> a href="+code=irq" class="sref">irq /a>) {	 283 /a>                 a href="+code=ret" class="sref">ret /a> =  a href="+code=rc5t583_irq_init" class="sref">rc5t583_irq_init /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>,  a href="+code=i2c" class="sref">i2c /a>-> a href="+code=irq" class="sref">irq /a>,  a href="+code=pda.a" class="sref">pda.a /a>-> a href="+code=irq_bas/" class="sref">irq_bas/ /a>);	 284 /a>                 spa" class="comment">/* Still continue with warning, if irq init fails */ /spa"
	 285 /a>                if ( a href="+code=ret" class="sref">ret /a>)	 286 /a>                         a href="+code=dev_warn" class="sref">dev_warn /a>(& a href="+code=i2c" class="sref">i2c /a>-> a href="+code=dev" class="sref">dev /a>,  spa" class="string">"IRQ init failed: %d\n" /spa"
,  a href="+code=ret" class="sref">ret /a>);	 287 /a>                else	 288 /a>                         a href="+code=irq_init_success" class="sref">irq_init_success /a> =  a href="+code=tru/" class="sref">tru/ /a>;	 289 /a>        }	 290 /a>	 291 /a>         a href="+code=ret" class="sref">ret /a> =  a href="+code=mfd_add_devic/s" class="sref">mfd_add_devic/s /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=dev" class="sref">dev /a>, -1,  a href="+code=rc5t583_subdevs" class="sref">rc5t583_subdevs /a>,	 292 /a>                               a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE /a>( a href="+code=rc5t583_subdevs" class="sref">rc5t583_subdevs /a>),  a href="+code=NULL" class="sref">NULL /a>, 0,  a href="+code=NULL" class="sref">NULL /a>);	 293 /a>        if ( a href="+code=ret" class="sref">ret /a>) {	 294 /a>                 a href="+code=dev_err" class="sref">dev_err /a>(& a href="+code=i2c" class="sref">i2c /a>-> a href="+code=dev" class="sref">dev /a>,  spa" class="string">"add mfd devic/s failed: %d\n" /spa"
,  a href="+code=ret" class="sref">ret /a>);	 295 /a>                goto  a href="+code=err_add_devs" class="sref">err_add_devs /a>;	 296 /a>        }	 297 /a>	 298 /a>        return 0;	 299 /a>	 300 /a> a href="+code=err_add_devs" class="sref">err_add_devs /a>:	 301 /a>        if ( a href="+code=irq_init_success" class="sref">irq_init_success /a>)	 302 /a>                 a href="+code=rc5t583_irq_exit" class="sref">rc5t583_irq_exit /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>);	 303 /a>        return  a href="+code=ret" class="sref">ret /a>;	 304 /a>}	 305 /a>	 306 /a>static int   a href="+code=rc5t583_i2c_remov/" class="sref">rc5t583_i2c_remov/ /a>(struct  a href="+code=i2c_client" class="sref">i2c_client /a> * a href="+code=i2c" class="sref">i2c /a>)	 307 /a>{	 308 /a>        struct  a href="+code=rc5t583" class="sref">rc5t583 /a> * a href="+code=rc5t583" class="sref">rc5t583 /a> =  a href="+code=i2c_get_clientda.a" class="sref">i2c_get_clientda.a /a>( a href="+code=i2c" class="sref">i2c /a>);	 309 /a>	 310 /a>         a href="+code=mfd_remov/_devic/s" class="sref">mfd_remov/_devic/s /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>-> a href="+code=dev" class="sref">dev /a>);	 311 /a>         a href="+code=rc5t583_irq_exit" class="sref">rc5t583_irq_exit /a>( a href="+code=rc5t583" class="sref">rc5t583 /a>);	 312 /a>        return 0;	 313 /a>}	 314 /a>	 315 /a>static const struct  a href="+code=i2c_devic/_id" class="sref">i2c_devic/_id /a>  a href="+code=rc5t583_i2c_id" class="sref">rc5t583_i2c_id /a>[] = {	 316 /a>        {. a href="+code=nam/" class="sref">nam/ /a> =  spa" class="string">"rc5t583" /spa"
, . a href="+code=driver_da.a" class="sref">driver_da.a /a> = 0},	 317 /a>        {}	 318 /a>};	 319 /a>	 320 /a> a href="+code=MODULE_DEVICE_TABLE" class="sref">MODULE_DEVICE_TABLE /a>( a href="+code=i2c" class="sref">i2c /a>,  a href="+code=rc5t583_i2c_id" class="sref">rc5t583_i2c_id /a>);	 321 /a>	 322 /a>static struct  a href="+code=i2c_driver" class="sref">i2c_driver /a>  a href="+code=rc5t583_i2c_driver" class="sref">rc5t583_i2c_driver /a> = {	 323 /a>        . a href="+code=driver" class="sref">driver /a> = {	 324 /a>                   . a href="+code=nam/" class="sref">nam/ /a> =  spa" class="string">"rc5t583" /spa"
,	 325 /a>                   . a href="+code=owner" class="sref">owner /a> =  a href="+code=THIS_MODULE" class="sref">THIS_MODULE /a>,	 326 /a>                   },	 327 /a>        . a href="+code=prob/" class="sref">prob/ /a> =  a href="+code=rc5t583_i2c_prob/" class="sref">rc5t583_i2c_prob/ /a>,	 328 /a>        . a href="+code=remov/" class="sref">remov/ /a> =  a href="+code=rc5t583_i2c_remov/" class="sref">rc5t583_i2c_remov/ /a>,	 329 /a>        . a href="+code=id_table" class="sref">id_table /a> =  a href="+code=rc5t583_i2c_id" class="sref">rc5t583_i2c_id /a>,	 330 /a>};	 331 /a>	 332 /a>static int  a href="+code=__init" class="sref">__init /a>  a href="+code=rc5t583_i2c_init" class="sref">rc5t583_i2c_init /a>(void)	 333 /a>{	 334 /a>        return  a href="+code=i2c_add_driver" class="sref">i2c_add_driver /a>(& a href="+code=rc5t583_i2c_driver" class="sref">rc5t583_i2c_driver /a>);	 335 /a>}	 336 /a> a href="+code=subsys_initcall" class="sref">subsys_initcall /a>( a href="+code=rc5t583_i2c_init" class="sref">rc5t583_i2c_init /a>);	 337 /a>	 338 /a>static void  a href="+code=__exit" class="sref">__exit /a>  a href="+code=rc5t583_i2c_exit" class="sref">rc5t583_i2c_exit /a>(void)	 339 /a>{	 340 /a>         a href="+code=i2c_del_driver" class="sref">i2c_del_driver /a>(& a href="+code=rc5t583_i2c_driver" class="sref">rc5t583_i2c_driver /a>);	 341 /a>}	 342 /a>	 343 /a> a href="+code=module_exit" class="sref">module_exit /a>( a href="+code=rc5t583_i2c_exit" class="sref">rc5t583_i2c_exit /a>);	 344 /a>	 345 /a> a href="+code=MODULE_AUTHOR" class="sref">MODULE_AUTHOR /a>( spa" class="string">"Laxma" Dewanga" <ldewanga"@nvidia.com>" /spa"
);	 346 /a> a href="+code=MODULE_DESCRIPTION" class="sref">MODULE_DESCRIPTION /a>( spa" class="string">"RICOH RC5T583 power ma"agement system devic/ driver" /spa"
);	 347 /a> a href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSE /a>( spa" class="string">"GPL v2" /spa"
);	 348 /a>
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