linux/drivers/watchdog/omap_wdt.c
<<
>>
Prefs
   1/*
   2 * omap_wdt.c
   3 *
   4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
   5 *
   6 * Author: MontaVista Software, Inc.
   7 *       <gdavis@mvista.com> or <source@mvista.com>
   8 *
   9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
  10 * terms of the GNU General Public License version 2. This program is
  11 * licensed "as is" without any warranty of any kind, whether express
  12 * or implied.
  13 *
  14 * History:
  15 *
  16 * 20030527: George G. Davis <gdavis@mvista.com>
  17 *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
  18 *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
  19 *      Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
  20 *
  21 * Copyright (c) 2004 Texas Instruments.
  22 *      1. Modified to support OMAP1610 32-KHz watchdog timer
  23 *      2. Ported to 2.6 kernel
  24 *
  25 * Copyright (c) 2005 David Brownell
  26 *      Use the driver model and standard identifiers; handle bigger timeouts.
  27 */
  28
  29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30
  31#include <linux/module.h>
  32#include <linux/types.h>
  33#include <linux/kernel.h>
  34#include <linux/mm.h>
  35#include <linux/watchdog.h>
  36#include <linux/reboot.h>
  37#include <linux/init.h>
  38#include <linux/err.h>
  39#include <linux/platform_device.h>
  40#include <linux/moduleparam.h>
  41#include <linux/io.h>
  42#include <linux/slab.h>
  43#include <linux/pm_runtime.h>
  44#include <linux/platform_data/omap-wd-timer.h>
  45
  46#include "omap_wdt.h"
  47
  48static unsigned timer_margin;
  49module_param(timer_margin, uint, 0);
  50MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  51
  52struct omap_wdt_dev {
  53        void __iomem    *base;          /* physical */
  54        struct device   *dev;
  55        bool            omap_wdt_users;
  56        struct resource *mem;
  57        int             wdt_trgr_pattern;
  58        struct mutex    lock;           /* to avoid races with PM */
  59};
  60
  61static void omap_wdt_reload(struct omap_wdt_dev *wdev)
  62{
  63        void __iomem    *base = wdev->base;
  64
  65        /* wait for posted write to complete */
  66        while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  67                cpu_relax();
  68
  69        wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
  70        __raw_writel(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
  71
  72        /* wait for posted write to complete */
  73        while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  74                cpu_relax();
  75        /* reloaded WCRR from WLDR */
  76}
  77
  78static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  79{
  80        void __iomem *base = wdev->base;
  81
  82        /* Sequence to enable the watchdog */
  83        __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
  84        while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  85                cpu_relax();
  86
  87        __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
  88        while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  89                cpu_relax();
  90}
  91
  92static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  93{
  94        void __iomem *base = wdev->base;
  95
  96        /* sequence required to disable watchdog */
  97        __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  98        while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  99                cpu_relax();
 100
 101        __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
 102        while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
 103                cpu_relax();
 104}
 105
 106static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
 107                                   unsigned int timeout)
 108{
 109        u32 pre_margin = GET_WLDR_VAL(timeout);
 110        void __iomem *base = wdev->base;
 111
 112        /* just count up at 32 KHz */
 113        while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
 114                cpu_relax();
 115
 116        __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
 117        while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
 118                cpu_relax();
 119}
 120
 121static int omap_wdt_start(struct watchdog_device *wdog)
 122{
 123        struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 124        void __iomem *base = wdev->base;
 125
 126        mutex_lock(&wdev->lock);
 127
 128        wdev->omap_wdt_users = true;
 129
 130        pm_runtime_get_sync(wdev->dev);
 131
 132        /* initialize prescaler */
 133        while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
 134                cpu_relax();
 135
 136        __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
 137        while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
 138                cpu_relax();
 139
 140        omap_wdt_set_timer(wdev, wdog->timeout);
 141        omap_wdt_reload(wdev); /* trigger loading of new timeout value */
 142        omap_wdt_enable(wdev);
 143
 144        mutex_unlock(&wdev->lock);
 145
 146        return 0;
 147}
 148
 149static int omap_wdt_stop(struct watchdog_device *wdog)
 150{
 151        struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 152
 153        mutex_lock(&wdev->lock);
 154        omap_wdt_disable(wdev);
 155        pm_runtime_put_sync(wdev->dev);
 156        wdev->omap_wdt_users = false;
 157        mutex_unlock(&wdev->lock);
 158        return 0;
 159}
 160
 161static int omap_wdt_ping(struct watchdog_device *wdog)
 162{
 163        struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 164
 165        mutex_lock(&wdev->lock);
 166        omap_wdt_reload(wdev);
 167        mutex_unlock(&wdev->lock);
 168
 169        return 0;
 170}
 171
 172static int omap_wdt_set_timeout(struct watchdog_device *wdog,
 173                                unsigned int timeout)
 174{
 175        struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 176
 177        mutex_lock(&wdev->lock);
 178        omap_wdt_disable(wdev);
 179        omap_wdt_set_timer(wdev, timeout);
 180        omap_wdt_enable(wdev);
 181        omap_wdt_reload(wdev);
 182        wdog->timeout = timeout;
 183        mutex_unlock(&wdev->lock);
 184
 185        return 0;
 186}
 187
 188static const struct watchdog_info omap_wdt_info = {
 189        .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
 190        .identity = "OMAP Watchdog",
 191};
 192
 193static const struct watchdog_ops omap_wdt_ops = {
 194        .owner          = THIS_MODULE,
 195        .start          = omap_wdt_start,
 196        .stop           = omap_wdt_stop,
 197        .ping           = omap_wdt_ping,
 198        .set_timeout    = omap_wdt_set_timeout,
 199};
 200
 201static int omap_wdt_probe(struct platform_device *pdev)
 202{
 203        struct omap_wd_timer_platform_data *pdata = pdev->dev.platform_data;
 204        bool nowayout = WATCHDOG_NOWAYOUT;
 205        struct watchdog_device *omap_wdt;
 206        struct resource *res, *mem;
 207        struct omap_wdt_dev *wdev;
 208        u32 rs;
 209        int ret;
 210
 211        omap_wdt = devm_kzalloc(&pdev->dev, sizeof(*omap_wdt), GFP_KERNEL);
 212        if (!omap_wdt)
 213                return -ENOMEM;
 214
 215        /* reserve static register mappings */
 216        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 217        if (!res)
 218                return -ENOENT;
 219
 220        mem = devm_request_mem_region(&pdev->dev, res->start,
 221                                      resource_size(res), pdev->name);
 222        if (!mem)
 223                return -EBUSY;
 224
 225        wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
 226        if (!wdev)
 227                return -ENOMEM;
 228
 229        wdev->omap_wdt_users    = false;
 230        wdev->mem               = mem;
 231        wdev->dev               = &pdev->dev;
 232        wdev->wdt_trgr_pattern  = 0x1234;
 233        mutex_init(&wdev->lock);
 234
 235        wdev->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
 236        if (!wdev->base)
 237                return -ENOMEM;
 238
 239        omap_wdt->info        = &omap_wdt_info;
 240        omap_wdt->ops         = &omap_wdt_ops;
 241        omap_wdt->min_timeout = TIMER_MARGIN_MIN;
 242        omap_wdt->max_timeout = TIMER_MARGIN_MAX;
 243
 244        if (timer_margin >= TIMER_MARGIN_MIN &&
 245            timer_margin <= TIMER_MARGIN_MAX)
 246                omap_wdt->timeout = timer_margin;
 247        else
 248                omap_wdt->timeout = TIMER_MARGIN_DEFAULT;
 249
 250        watchdog_set_drvdata(omap_wdt, wdev);
 251        watchdog_set_nowayout(omap_wdt, nowayout);
 252
 253        platform_set_drvdata(pdev, omap_wdt);
 254
 255        pm_runtime_enable(wdev->dev);
 256        pm_runtime_get_sync(wdev->dev);
 257
 258        if (pdata && pdata->read_reset_sources)
 259                rs = pdata->read_reset_sources();
 260        else
 261                rs = 0;
 262        omap_wdt->bootstatus = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ?
 263                                WDIOF_CARDRESET : 0;
 264
 265        omap_wdt_disable(wdev);
 266
 267        ret = watchdog_register_device(omap_wdt);
 268        if (ret) {
 269                pm_runtime_disable(wdev->dev);
 270                return ret;
 271        }
 272
 273        pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
 274                __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
 275                omap_wdt->timeout);
 276
 277        pm_runtime_put_sync(wdev->dev);
 278
 279        return 0;
 280}
 281
 282static void omap_wdt_shutdown(struct platform_device *pdev)
 283{
 284        struct watchdog_device *wdog = platform_get_drvdata(pdev);
 285        struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 286
 287        mutex_lock(&wdev->lock);
 288        if (wdev->omap_wdt_users) {
 289                omap_wdt_disable(wdev);
 290                pm_runtime_put_sync(wdev->dev);
 291        }
 292        mutex_unlock(&wdev->lock);
 293}
 294
 295static int omap_wdt_remove(struct platform_device *pdev)
 296{
 297        struct watchdog_device *wdog = platform_get_drvdata(pdev);
 298        struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 299
 300        pm_runtime_disable(wdev->dev);
 301        watchdog_unregister_device(wdog);
 302
 303        return 0;
 304}
 305
 306#ifdef  CONFIG_PM
 307
 308/* REVISIT ... not clear this is the best way to handle system suspend; and
 309 * it's very inappropriate for selective device suspend (e.g. suspending this
 310 * through sysfs rather than by stopping the watchdog daemon).  Also, this
 311 * may not play well enough with NOWAYOUT...
 312 */
 313
 314static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
 315{
 316        struct watchdog_device *wdog = platform_get_drvdata(pdev);
 317        struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 318
 319        mutex_lock(&wdev->lock);
 320        if (wdev->omap_wdt_users) {
 321                omap_wdt_disable(wdev);
 322                pm_runtime_put_sync(wdev->dev);
 323        }
 324        mutex_unlock(&wdev->lock);
 325
 326        return 0;
 327}
 328
 329static int omap_wdt_resume(struct platform_device *pdev)
 330{
 331        struct watchdog_device *wdog = platform_get_drvdata(pdev);
 332        struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 333
 334        mutex_lock(&wdev->lock);
 335        if (wdev->omap_wdt_users) {
 336                pm_runtime_get_sync(wdev->dev);
 337                omap_wdt_enable(wdev);
 338                omap_wdt_reload(wdev);
 339        }
 340        mutex_unlock(&wdev->lock);
 341
 342        return 0;
 343}
 344
 345#else
 346#define omap_wdt_suspend        NULL
 347#define omap_wdt_resume         NULL
 348#endif
 349
 350static const struct of_device_id omap_wdt_of_match[] = {
 351        { .compatible = "ti,omap3-wdt", },
 352        {},
 353};
 354MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
 355
 356static struct platform_driver omap_wdt_driver = {
 357        .probe          = omap_wdt_probe,
 358        .remove         = omap_wdt_remove,
 359        .shutdown       = omap_wdt_shutdown,
 360        .suspend        = omap_wdt_suspend,
 361        .resume         = omap_wdt_resume,
 362        .driver         = {
 363                .owner  = THIS_MODULE,
 364                .name   = "omap_wdt",
 365                .of_match_table = omap_wdt_of_match,
 366        },
 367};
 368
 369module_platform_driver(omap_wdt_driver);
 370
 371MODULE_AUTHOR("George G. Davis");
 372MODULE_LICENSE("GPL");
 373MODULE_ALIAS("platform:omap_wdt");
 374
lxr.linux.no kindly hosted by Redpill Linpro AS, provider of Linux consulting and operations services since 1995.