linux/drivers/scsi/mac53c94.c
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g the earernal SCSI chain. er.
#is()ude <c53c94.c#is()udesi/mac/kernel.h> i/mac/kernel.hala>pan mc53c94.c#L1" id="L1" class="line" 1name="L1"">
#is()ude <c53c94.c#is()udesi/mac/delay.h> i/mac/delay.hala>pan mc53c94.c#L1" id="L1" class="line" 12ame="L112>
#is()ude <c53c94.c#is()udesi/mac/_loos.h> i/mac/_loos.hala>pan mc53c94.c#L1" id="L1" class="line" 13ame="L113>
#is()ude <c53c94.c#is()udesi/mac/str g.h> i/mac/str g.hala>pan mc53c94.c#L1" id="L1" class="line" 14ame="L114>
#is()ude <c53c94.c#is()udesi/mac/slab.h> i/mac/slab.hala>pan mc53c94.c#L1" id="L1" class="line" 15ame="L115>
#is()ude <c53c94.c#is()udesi/mac/blkdev.h> i/mac/blkdev.hala>pan mc53c94.c#L1" id="L1" class="line" 16ame="L116>
#is()ude <c53c94.c#is()udesi/mac/proc_fs.h> i/mac/proc_fs.hala>pan mc53c94.c#L1" id="L1" class="line" 17ame="L117>
#is()ude <c53c94.c#is()udesi/mac/stat.h> i/mac/stat.hala>pan mc53c94.c#L1" id="L1" class="line" 18ame="L118>
#is()ude <c53c94.c#is()udesi/mac/spinlock.h> i/mac/spinlock.hala>pan mc53c94.c#L1" id="L1" class="line" 19ame="L119>
#is()ude <c53c94.c#is()udesi/mac/interrupt.h> i/mac/interrupt.hala>pan mc53c94.c#L1" id="L1" class="line" 20ame="L120>
#is()ude <c53c94.c#is()udesi/mac/module.h> i/mac/module.hala>pan mc53c94.c#L1" id="L1" class="line" 2name="L12">
#is()ude <c53c94.c#+ambig=is()udesasm-alpha/dbdma.h|is()udesasm-arm/dbdma.h|is()udesasm-avr32/dbdma.h|is()udesasm-blackfin/dbdma.h|is()udesasm-cris/dbdma.h|is()udesasm-frv/dbdma.h|is()udesasm-generic/dbdma.h|is()udesasm-h8300/dbdma.h|is()udesasm-i386/dbdma.h|is()udesasm-ia64/dbdma.h|is()udesasm-m32r/dbdma.h|is()udesasm-m68k/dbdma.h|is()udesasm-m68knmmmu/dbdma.h|is()udesasm-mips/dbdma.h|is()udesasm-mips64/dbdma.h|is()udesasm-parisc/dbdma.h|is()udesasm-powidpc/dbdma.h|is()udesasm-ppc/dbdma.h|is()udesasm-s390/dbdma.h|is()udesasm-sh/dbdma.h|is()udesasm-sh64/dbdma.h|is()udesasm- pan mc53c94.c#L1" id="L1" class="line" 22ame="L122>
#is()ude <c53c94.c#+ambig=is()udesasm-alpha/io.h|is()udesasm-arm/io.h|is()udesasm-avr32/io.h|is()udesasm-blackfin/io.h|is()udesasm-cris/io.h|is()udesasm-frv/io.h|is()udesasm-generic/io.h|is()udesasm-h8300/io.h|is()udesasm-i386/io.h|is()udesasm-ia64/io.h|is()udesasm-m32r/io.h|is()udesasm-m68k/io.h|is()udesasm-m68knmmmu/io.h|is()udesasm-mips/io.h|is()udesasm-mips64/io.h|is()udesasm-parisc/io.h|is()udesasm-powidpc/io.h|is()udesasm-ppc/io.h|is()udesasm-s390/io.h|is()udesasm-sh/io.h|is()udesasm-sh64/io.h|is()udesasm- pan mc53c94.c#L1" id="L1" class="line" 23ame="L123>
#is()ude <c53c94.c#+ambig=is()udesasm-alpha/pgtable.h|is()udesasm-arm/pgtable.h|is()udesasm-avr32/pgtable.h|is()udesasm-blackfin/pgtable.h|is()udesasm-cris/pgtable.h|is()udesasm-frv/pgtable.h|is()udesasm-generic/pgtable.h|is()udesasm-h8300/pgtable.h|is()udesasm-i386/pgtable.h|is()udesasm-ia64/pgtable.h|is()udesasm-m32r/pgtable.h|is()udesasm-m68k/pgtable.h|is()udesasm-m68knmmmu/pgtable.h|is()udesasm-mips/pgtable.h|is()udesasm-mips64/pgtable.h|is()udesasm-parisc/pgtable.h|is()udesasm-powidpc/pgtable.h|is()udesasm-ppc/pgtable.h|is()udesasm-s390/pgtable.h|is()udesasm-sh/pgtable.h|is()udesasm-sh64/pgtable.h|is()udesasm- pan mc53c94.c#L1" id="L1" class="line" 24ame="L124>
#is()ude <c53c94.c#+ambig=is()udesasm-alpha/prom.h|is()udesasm-arm/prom.h|is()udesasm-avr32/prom.h|is()udesasm-blackfin/prom.h|is()udesasm-cris/prom.h|is()udesasm-frv/prom.h|is()udesasm-generic/prom.h|is()udesasm-h8300/prom.h|is()udesasm-i386/prom.h|is()udesasm-ia64/prom.h|is()udesasm-m32r/prom.h|is()udesasm-m68k/prom.h|is()udesasm-m68knmmmu/prom.h|is()udesasm-mips/prom.h|is()udesasm-mips64/prom.h|is()udesasm-parisc/prom.h|is()udesasm-powidpc/prom.h|is()udesasm-ppc/prom.h|is()udesasm-s390/prom.h|is()udesasm-sh/prom.h|is()udesasm-sh64/prom.h|is()udesasm- pan mc53c94.c#L1" id="L1" class="line" 25ame="L125>
#is()ude <c53c94.c#+ambig=is()udesasm-alpha/pci-bridge.h|is()udesasm-arm/pci-bridge.h|is()udesasm-avr32/pci-bridge.h|is()udesasm-blackfin/pci-bridge.h|is()udesasm-cris/pci-bridge.h|is()udesasm-frv/pci-bridge.h|is()udesasm-generic/pci-bridge.h|is()udesasm-h8300/pci-bridge.h|is()udesasm-i386/pci-bridge.h|is()udesasm-ia64/pci-bridge.h|is()udesasm-m32r/pci-bridge.h|is()udesasm-m68k/pci-bridge.h|is()udesasm-m68knmmmu/pci-bridge.h|is()udesasm-mips/pci-bridge.h|is()udesasm-mips64/pci-bridge.h|is()udesasm-parisc/pci-bridge.h|is()udesasm-powidpc/pci-bridge.h|is()udesasm-ppc/pci-bridge.h|is()udesasm-s390/pci-bridge.h|is()udesasm-sh/pci-bridge.h|is()udesasm-sh64/pci-bridge.h|is()udesasm- pan mc53c94.c#L1" id="L1" class="line" 26ame="L126>
#is()ude <c53c94.c#+ambig=is()udesasm-alpha/lasio.h|is()udesasm-arm/lasio.h|is()udesasm-avr32/lasio.h|is()udesasm-blackfin/lasio.h|is()udesasm-cris/lasio.h|is()udesasm-frv/lasio.h|is()udesasm-generic/lasio.h|is()udesasm-h8300/lasio.h|is()udesasm-i386/lasio.h|is()udesasm-ia64/lasio.h|is()udesasm-m32r/lasio.h|is()udesasm-m68k/lasio.h|is()udesasm-m68knmmmu/lasio.h|is()udesasm-mips/lasio.h|is()udesasm-mips64/lasio.h|is()udesasm-parisc/lasio.h|is()udesasm-powidpc/lasio.h|is()udesasm-ppc/lasio.h|is()udesasm-s390/lasio.h|is()udesasm-sh/lasio.h|is()udesasm-sh64/lasio.h|is()udesasm- pan mc53c94.c#L1" id="L1" class="line" 27ame="L127>
mc53c94.c#L1" id="L1" class="line" 28ame="L128>
#is()ude <c53c94.c#is()udesL1" cL1" .h> L1" cL1" .hala>pan mc53c94.c#L1" id="L1" class="line" 29ame="L129>
#is()ude <c53c94.c#is()udesL1" cL1" _cmnd.h> L1" cL1" _cmnd.hala>pan mc53c94.c#L1" id="L1" class="line" 30ame="L130>
#is()ude <c53c94.c#is()udesL1" cL1" _device.h> L1" cL1" _device.hala>pan mc53c94.c#L1" id="L1" class="line" 3name="L13">
#is()ude <c53c94.c#is()udesL1" cL1" _host.h> L1" cL1" _host.hala>pan mc53c94.c#L1" id="L1" class="line" 32ame="L132>
mc53c94.c#L1" id="L1" class="line" 33ame="L133>
#is()ude "c53c94.c#L1" id="L1" class="linh> lass="linhala>pquot;mc53c94.c#L1" id="L1" class="line" 34ame="L134>
mc53c94.c#L1" id="L1" class="line" 35ame="L135>
enumdrivers/scscode=fsc_phase > 94.">fsc_phaseala> {mc53c94.c#L1" id="L1" class="line" 36ame="L136>
rivers/scscode=idle > 94.">idleala>,mc53c94.c#L1" id="L1" class="line" 37ame="L137>
rivers/scscode= 94."> ,mc53c94.c#L1" id="L1" class="line" 38ame="L138>
rivers/scscode=datai 94.">datai ,mc53c94.c#L1" id="L1" class="line" 39ame="L139>
rivers/scscode=9mmaleri 94.">9mmaleri ,mc53c94.c#L1" id="L1" class="line" 40ame="L140>
rivers/scscode=busf94ei 94.">busf94ei ,mc53c94.c#L1" id="L1" class="line" 4name="L14">
};mc53c94.c#L1" id="L1" class="line" 42ame="L142>
mc53c94.c#L1" id="L1" class="line" 43ame="L143>
structdrivers/scscode=fsc_state > 94.">fsc_stateala> {mc53c94.c#L1" id="L1" class="line" 44ame="L144>
structddrivers/scscode=lass="li_regs > 94.">lass="li_regsala> rivers/scscode=__iomem > 94.">__iomemala> *rivers/scscode=regs > 94.">regsala>;mc53c94.c#L1" id="L1" class="line" 45ame="L145>
int rivers/scscode=intr > 94.">intrala>;mc53c94.c#L1" id="L1" class="line" 46ame="L146>
structddrivers/scscode=dbdma_regs > 94.">dbdma_regsala> rivers/scscode=__iomem > 94.">__iomemala> *rivers/scscode=dma > 94.">dmaala>;mc53c94.c#L1" id="L1" class="line" 47ame="L147>
int rivers/scscode=dmaintr > 94.">dmaintrala>;mc53c94.c#L1" id="L1" class="line" 48ame="L148>
int rivers/scscode=clk_f94q/s > 94.">9lk_f94qala>;mc53c94.c#L1" id="L1" class="line" 49ame="L149>
structddrivers/scscode=S1" _Hlse;" > 94.">S1" _Hlseala> *rivers/scscode=hlse;" > 94.">hlseala>;mc53c94.c#L1" id="L1" class="line" 50ame="L150>
structdrivers/scscode= 1" _cmnd/s > 94."> 1" _cmndala> *rivers/scscode=request_q/s > 94.">request_qala>;mc53c94.c#L1" id="L1" class="line" 5name="L15">
structdrivers/scscode= 1" _cmnd/s > 94."> 1" _cmndala> *rivers/scscode=request_qtail/s > 94.">request_qtailala>;mc53c94.c#L1" id="L1" class="line" 52ame="L152>
structdrivers/scscode= 1" _cmnd/s > 94."> 1" _cmndala> *rivers/scscode=current_94q/s > 94.">9urrent_94qala>; fsc_phaseala> rivers/scscode=phase > 94.">phaseala>; dbdma_cmdala> *rivers/scscode=dma_cmds > 94.">dma_cmdsala>; dma_cmd_ ceala>;mc53c94.c#L1" id="L1" class="line" 56ame="L156>
structddrivers/scscode=pc _dev > 94.">pc _devala> *rivers/scscode=pdev > 94.">pdevala>;mc53c94.c#L1" id="L1" class="line" 57ame="L157>
rivers/scscode=dma_addr_e;" > 94.">dma_addr_eala> rivers/scscode=dma_addr;" > 94.">dma_addrala>;mc53c94.c#L1" id="L1" class="line" 58ame="L158>
structdrivers/scscode=lasio_dev > 94.">lasio_devala> *rivers/scscode=mdev > 94.">ldevala>;mc53c94.c#L1" id="L1" class="line" 59ame="L159>
};mc53c94.c#L1" id="L1" class="line" 60ame="L160>
mc53c94.c#L1" id="L1" class="line" 6name="L16">
st"> void rivers/scscode=lass="li_inie;" > 94.">lass="li_inieala>(structdrivers/scscode=fsc_state > 94.">fsc_stateala> *);mc53c94.c#L1" id="L1" class="line" 62ame="L162>
st"> void rivers/scscode=lass="li_st"re;" > 94.">lass="li_st"reala>(structdrivers/scscode=fsc_state > 94.">fsc_stateala> *);mc53c94.c#L1" id="L1" class="line" 63ame="L163>
st"> void rivers/scscode=lass="li_interrupt;" > 94.">lass="li_interruptala>(int, void *);mc53c94.c#L1" id="L1" class="line" 64ame="L164>
st"> rivers/scscode=irqtype="_e;" > 94.">irqtype="_eala> rivers/scscode=do_lass="li_interrupt;" > 94.">do_lass="li_interruptala>(int, void *);mc53c94.c#L1" id="L1" class="line" 65ame="L165>
st"> void rivers/scscode=cmd_303b50 > 94.">9md_303bala>(structdrivers/scscode=fsc_state > 94.">fsc_stateala> *, int rivers/scscode=re 94.">re );mc53c94.c#L1" id="L1" class="line" 66ame="L166>
st"> void rivers/scscode=set_dma_cmds > 94.">set_dma_cmdsala>(structdrivers/scscode=fsc_state > 94.">fsc_stateala> *, structdrivers/scscode= 1" _cmnd/s > 94."> 1" _cmndala> *);mc53c94.c#L1" id="L1" class="line" 67ame="L167>
mc53c94.c#L1" id="L1" class="line" 68ame="L168>
mc53c94.c#L1" id="L1" class="line" 69ame="L169>
st"> int rivers/scscode=lass="li_queue_lck;" > 94.">lass="li_queue_lckala>(structdrivers/scscode= 1" _cmnd/s > 94."> 1" _cmndala> *rivers/scscode=cmd/s > 94.">cmdala>, void (*rivers/scscode=d03b50 > 94.">303bala>)(structdrivers/scscode= 1" _cmnd/s > 94."> 1" _cmndala> *))mc53c94.c#L1" id="L1" class="line" 70ame="L170>
{mc53c94.c#L1" id="L1" class="line" 7name="L17">
structdrivers/scscode=fsc_state > 94.">fsc_stateala> *rivers/scscode= tate > 94.">stateala>;mc53c94.c#L1" id="L1" class="line" 72ame="L172>
mc53c94.c#L1" id="L1" class="line" 73ame="L173>
#if 0mc53c94.c#L1" id="L1" class="line" 74ame="L174>
if (rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode= 1_data_direost" /s > 94."> 1_data_direost" ala> ==drivers/scscode=DMA_TO_DEVICE/s > 94.">DMA_TO_DEVICEala>) {mc53c94.c#L1" id="L1" class="line" 75ame="L175>
int rivers/scscode=i;" > 94.">iala>;mc53c94.c#L1" id="L1" class="line" 76ame="L176>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;lass="li_queue %p: 9mmmand is"c 94.">cmdala>);mc53c94.c#L1" id="L1" class="line" 77ame="L177>
"he (rivers/scscode=i;" > 94.">iala> = 0; rivers/scscode=i;" > 94.">iala> < rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=9md_le /s > 94.">9md_le ala>; ++rivers/scscode=i;" > 94.">iala>)mc53c94.c#L1" id="L1" class="line" 78ame="L178>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_CONT;" > 94.">KERN_CONTala> r pquot; %.2x"c 94.">cmdala>-pan rivers/scscode=9mnd/s > 94.">cmndala>[rivers/scscode=i;" > 94.">iala>]);mc53c94.c#L1" id="L1" class="line" 79ame="L179>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_CONT;" > 94.">KERN_CONTala> r pquot;\n"c 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;use_sg=%d request_buffle =%d request_buffer=%p\n"c
rivers/scscode= 1" _sg_couni/s > 94."> 1" _sg_couniala>(rivers/scscode=cmd/s > 94.">cmdala>), rivers/scscode= 1" _buffle /s > 94."> 1" _buffle ala>(rivers/scscode=cmd/s > 94.">cmdala>), rivers/scscode= 1" _sglise;" > 94."> 1" _sgliseala>(rivers/scscode=cmd/s > 94.">cmdala>));mc53c94.c#L1" id="L1" class="line" 82ame="L182>
}mc53c94.c#L1" id="L1" class="line" 83ame="L183>
#endifmc53c94.c#L1" id="L1" class="line" 84ame="L184>
mc53c94.c#L1" id="L1" class="line" 85ame="L185>
rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode= 1" _d03b50 > 94."> 1" _d03bala> = rivers/scscode=d03b50 > 94.">303bala>;mc53c94.c#L1" id="L1" class="line" 86ame="L186>
rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=hlse_scribble > 94.">hlse_scribbleala> = rivers/scscode=NULL > 94.">NULLala>;mc53c94.c#L1" id="L1" class="line" 87ame="L187>
mc53c94.c#L1" id="L1" class="line" 88ame="L188>
rivers/scscode= tate > 94.">stateala> = (structdrivers/scscode=fsc_state > 94.">fsc_stateala> *) rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=device50 > 94.">3eviceala>-pan rivers/scscode=hlse;" > 94.">hlseala>-pan rivers/scscode=hlsedata;" > 94.">hlsedataala>;mc53c94.c#L1" id="L1" class="line" 89ame="L189>
mc53c94.c#L1" id="L1" class="line" 90ame="L190>
if (rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=request_q/s > 94.">request_qala> ==drivers/scscode=NULL > 94.">NULLala>)mc53c94.c#L1" id="L1" class="line" 9name="L19">
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=request_q/s > 94.">request_qala> = rivers/scscode=cmd/s > 94.">cmdala>;mc53c94.c#L1" id="L1" class="line" 92ame="L192>
elsemc53c94.c#L1" id="L1" class="line" 93ame="L193>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=request_qtail/s > 94.">request_qtailala>-pan rivers/scscode=hlse_scribble > 94.">hlse_scribbleala> = (void *) rivers/scscode=cmd/s > 94.">cmdala>;mc53c94.c#L1" id="L1" class="line" 94ame="L194>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=request_qtail/s > 94.">request_qtailala> = rivers/scscode=cmd/s > 94.">cmdala>;mc53c94.c#L1" id="L1" class="line" 95ame="L195>
mc53c94.c#L1" id="L1" class="line" 96ame="L196>
if (rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala> ==drivers/scscode=idle > 94.">idleala>)mc53c94.c#L1" id="L1" class="line" 97ame="L197>
rivers/scscode=lass="li_st"re;" > 94.">lass="li_st"reala>(rivers/scscode= tate > 94.">stateala>);mc53c94.c#L1" id="L1" class="line" 98ame="L198>
mc53c94.c#L1" id="L1" class="line" 99ame="L199>
type="h0 mc53c94.c#L1" id="L1" class="line" 100ame="L1"00>
}mc53c94.c#L1" id="L1" class="line" 10name="L1"0">
mc53c94.c#L1" id="L1" class="line" 102ame="L1102>
st"> rivers/scscode=DEF_SCSI_QCMD/s > 94.">DEF_SCSI_QCMDala>(rivers/scscode=lass="li_queue;" > 94.">lass="li_queueala>)mc53c94.c#L1" id="L1" class="line" 103ame="L1103>
mc53c94.c#L1" id="L1" class="line" 104ame="L1104>
st"> int rivers/scscode=lass="li_hlse_resee;" > 94.">lass="li_hlse_reseeala>(structdrivers/scscode= 1" _cmnd/s > 94."> 1" _cmndala> *rivers/scscode=cmd/s > 94.">cmdala>)mc53c94.c#L1" id="L1" class="line" 105ame="L1105>
r_l05ala>{mc53c94.c#L1" id="L1" class="line" 106ame="L1106>
r_l06ala> structdrivers/scscode=fsc_state > 94.">fsc_stateala> *rivers/scscode= tate > 94.">stateala> = (structdrivers/scscode=fsc_state > 94.">fsc_stateala> *) rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=device50 > 94.">3eviceala>-pan rivers/scscode=hlse;" > 94.">hlseala>-pan rivers/scscode=hlsedata;" > 94.">hlsedataala>;mc53c94.c#L1" id="L1" class="line" 107ame="L1107>
r_l07ala> structdrivers/scscode=lass="li_regs > 94.">lass="li_regsala> rivers/scscode=__iomem > 94.">__iomemala> *rivers/scscode=regs > 94.">regsala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=regs > 94.">regsala>;mc53c94.c#L1" id="L1" class="line" 108ame="L1108>
r_l08ala> structdrivers/scscode=dbdma_regs > 94.">dbdma_regsala> rivers/scscode=__iomem > 94.">__iomemala> *rivers/scscode=dma > 94.">dmaala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma > 94.">dmaala>;mc53c94.c#L1" id="L1" class="line" 109ame="L1109>
r_l09ala> unsigned longdrivers/scscode=flags > 94.">flagsala>;mc53c94.c#L1" id="L1" class="line" 110ame="L1""0>
mc53c94.c#L1" id="L1" class="line" 11name="L1""">
rivers/scscode= pin_lock_irqsave > 94.">spin_lock_irqsaveala>(rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=device50 > 94.">3eviceala>-pan rivers/scscode=hlse;" > 94.">hlseala>-pan rivers/scscode=hlse_lock > 94.">hlse_lockala>, rivers/scscode=flags > 94.">flagsala>);mc53c94.c#L1" id="L1" class="line" 112ame="L1112>
mc53c94.c#L1" id="L1" class="line" 113ame="L1113>
rivers/scscode=writel/s > 94.">writelala>((rivers/scscode=RUN/s > 94.">RUNala>|rivers/scscode=PAUSE/s > 94.">PAUSEala>|rivers/scscode=FLUSH/s > 94.">FLUSHala>|rivers/scscode=WAKE/s > 94.">WAKEala>) << 16, & rivers/scscode=dma > 94.">dmaala>-pan rivers/scscode=9e" rol/s > 94.">ce" rolala>);mc53c94.c#L1" id="L1" class="line" 114ame="L1114>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_SCSI_RESET;" > 94.">CMD_SCSI_RESETala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>); udelayala>(l00); r writebala>(rivers/scscode=CMD_RESET;" > 94.">CMD_RESETala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 117ame="L1117>
rivers/scscode=udelay/s > 94.">udelayala>(20);mc53c94.c#L1" id="L1" class="line" 118ame="L1118>
rivers/scscode=lass="li_inie;" > 94.">lass="li_inieala>(rivers/scscode= tate > 94.">stateala>);mc53c94.c#L1" id="L1" class="line" 119ame="L1119>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_NOP;" > 94.">CMD_NOPala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 120ame="L1120>
mc53c94.c#L1" id="L1" class="line" 12name="L112">
rivers/scscode= pin_unlock_irqrestore > 94.">spin_unlock_irqrestoreala>(rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=device50 > 94.">3eviceala>-pan rivers/scscode=hlse;" > 94.">hlseala>-pan rivers/scscode=hlse_lock > 94.">hlse_lockala>, rivers/scscode=flags > 94.">flagsala>);mc53c94.c#L1" id="L1" class="line" 122ame="L1122>
type="hrivers/scscode=SUCCESS > 94.">SUCCESSala>;mc53c94.c#L1" id="L1" class="line" 123ame="L1123>
}mc53c94.c#L1" id="L1" class="line" 124ame="L1124>
mc53c94.c#L1" id="L1" class="line" 125ame="L1125>
st"> void rivers/scscode=lass="li_inie;" > 94.">lass="li_inieala>(structdrivers/scscode=fsc_state > 94.">fsc_stateala> *rivers/scscode= tate > 94.">stateala>)mc53c94.c#L1" id="L1" class="line" 126ame="L1126>
{mc53c94.c#L1" id="L1" class="line" 127ame="L1127>
structdrivers/scscode=lass="li_regs > 94.">lass="li_regsala> rivers/scscode=__iomem > 94.">__iomemala> *rivers/scscode=regs > 94.">regsala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=regs > 94.">regsala>;mc53c94.c#L1" id="L1" class="line" 128ame="L1128>
structdrivers/scscode=dbdma_regs > 94.">dbdma_regsala> rivers/scscode=__iomem > 94.">__iomemala> *rivers/scscode=dma > 94.">dmaala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma > 94.">dmaala>;mc53c94.c#L1" id="L1" class="line" 129ame="L1129>
int rivers/scscode=x > 94.">xala>;mc53c94.c#L1" id="L1" class="line" 130ame="L1130>
mc53c94.c#L1" id="L1" class="line" 13name="L113">
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=hlse;" > 94.">hlseala>-pan rivers/scscode=e="h_id/s > 94.">e="h_idala> | rivers/scscode=CF1_PAR_ENABLE/s > 94.">CF1_PAR_ENABLEala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9enfig1 > 94.">9enfig1ala>);mc53c94.c#L1" id="L1" class="line" 132ame="L1132>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=TIMO_VAL > 94.">TIMO_VALala>(250), & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=sel_timeoue;" > 94."> el_timeoueala>); r writebala>(rivers/scscode=CLKF_VAL > 94.">CLKF_VALala>(rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=clk_f94q/s > 94.">9lk_f94qala>), & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9lk_factor/s > 94.">9lk_factorala>);mc53c94.c#L1" id="L1" class="line" 134ame="L1134>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CF2_FEATURE_EN/s > 94.">CF2_FEATURE_ENala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9enfig2 > 94.">9enfig2ala>);mc53c94.c#L1" id="L1" class="line" 135ame="L1135>
rivers/scscode=writeb/s > 94.">writebala>(0, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9enfig3 > 94.">9enfig3ala>);mc53c94.c#L1" id="L1" class="line" 136ame="L1136>
rivers/scscode=writeb/s > 94.">writebala>(0, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=sync_period/s > 94."> ync_periodala>);mc53c94.c#L1" id="L1" class="line" 137ame="L1137>
rivers/scscode=writeb/s > 94.">writebala>(0, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=sync_offsee;" > 94.">sync_offseeala>);mc53c94.c#L1" id="L1" class="line" 138ame="L1138>
rivers/scscode=x > 94.">xala> = rivers/scscode=readb/s > 94.">readbala>(& rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=interrupt;" > 94.">interruptala>);mc53c94.c#L1" id="L1" class="line" 139ame="L1139>
rivers/scscode=writel/s > 94.">writelala>((rivers/scscode=RUN/s > 94.">RUNala>|rivers/scscode=PAUSE/s > 94.">PAUSEala>|rivers/scscode=FLUSH/s > 94.">FLUSHala>|rivers/scscode=WAKE/s > 94.">WAKEala>) << 16, & rivers/scscode=dma > 94.">dmaala>-pan rivers/scscode=9e" rol/s > 94.">ce" rolala>);mc53c94.c#L1" id="L1" class="line" 140ame="L1140>
}mc53c94.c#L1" id="L1" class="line" 14name="L114">
mc53c94.c#L1" id="L1" class="line" 142ame="L1142>
94.">lass="li_st"reala>(structdrivers/scscode=fsc_state > 94.">fsc_stateala> *rivers/scscode= tate > 94.">stateala>)mc53c94.c#L1" id="L1" class="line" 147ame="L1147>
{mc53c94.c#L1" id="L1" class="line" 148ame="L1148>
structdrivers/scscode= 1" _cmnd/s > 94."> 1" _cmndala> *rivers/scscode=cmd/s > 94.">cmdala>;mc53c94.c#L1" id="L1" class="line" 149ame="L1149>
structdrivers/scscode=lass="li_regs > 94.">lass="li_regsala> rivers/scscode=__iomem > 94.">__iomemala> *rivers/scscode=regs > 94.">regsala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=regs > 94.">regsala>;mc53c94.c#L1" id="L1" class="line" 150ame="L1150>
int rivers/scscode=i;" > 94.">iala>;mc53c94.c#L1" id="L1" class="line" 15name="L115">
mc53c94.c#L1" id="L1" class="line" 152ame="L1152>
if (rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala> !=drivers/scscode=idle > 94.">idleala> || rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=current_94q/s > 94.">9urrent_94qala> !=drivers/scscode=NULL > 94.">NULLala>)mc53c94.c#L1" id="L1" class="line" 153ame="L1153>
rivers/scscode= 94.">pfoicala>(r pquot;inappropriate lass="li_st"re (state=%p)"c 94.">stateala>);mc53c94.c#L1" id="L1" class="line" 154ame="L1154>
if (rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=request_q/s > 94.">request_qala> ==drivers/scscode=NULL > 94.">NULLala>)mc53c94.c#L1" id="L1" class="line" 155ame="L1155>
type=";mc53c94.c#L1" id="L1" class="line" 156ame="L1156>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=current_94q/s > 94.">9urrent_94qala> = rivers/scscode=cmd/s > 94.">cmdala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=request_q/s > 94.">request_qala>;mc53c94.c#L1" id="L1" class="line" 157ame="L1157>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=request_q/s > 94.">request_qala> = (structdrivers/scscode= 1" _cmnd/s > 94."> 1" _cmndala> *) rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=hlse_scribble > 94.">hlse_scribbleala>;mc53c94.c#L1" id="L1" class="line" 158ame="L1158>
mc53c94.c#L1" id="L1" class="line" 159ame="L1159>
r writebala>(0, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9eune_lo/s > 94.">ceune_loala>);mc53c94.c#L1" id="L1" class="line" 16name="L116">
rivers/scscode=writeb/s > 94.">writebala>(0, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9eune_mid/s > 94.">9eune_midala>);mc53c94.c#L1" id="L1" class="line" 162ame="L1162>
rivers/scscode=writeb/s > 94.">writebala>(0, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9eune_hi;" > 94.">9eune_hiala>);mc53c94.c#L1" id="L1" class="line" 163ame="L1163>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_NOP;" > 94.">CMD_NOPala> + rivers/scscode=CMD_DMA_MODE/s > 94.">CMD_DMA_MODEala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 164ame="L1164>
rivers/scscode=udelay/s > 94.">udelayala>(l);mc53c94.c#L1" id="L1" class="line" 165ame="L1165>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_FLUSH/s > 94.">CMD_FLUSHala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 166ame="L1166>
rivers/scscode=udelay/s > 94.">udelayala>(l);mc53c94.c#L1" id="L1" class="line" 167ame="L1167>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=device50 > 94.">3eviceala>-pan rivers/scscode=id/s > 94.">idala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=dest_id/s > 94.">dest_idala>);mc53c94.c#L1" id="L1" class="line" 168ame="L1168>
rivers/scscode=writeb/s > 94.">writebala>(0, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=sync_period/s > 94."> ync_periodala>);mc53c94.c#L1" id="L1" class="line" 169ame="L1169>
rivers/scscode=writeb/s > 94.">writebala>(0, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=sync_offsee;" > 94.">sync_offseeala>);mc53c94.c#L1" id="L1" class="line" 170ame="L1170>
mc53c94.c#L1" id="L1" class="line" 17name="L117">
r 94.">iala> = 0; rivers/scscode=i;" > 94.">iala> < rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=9md_le /s > 94.">9md_le ala>; ++rivers/scscode=i;" > 94.">iala>)mc53c94.c#L1" id="L1" class="line" 173ame="L1173>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=9mnd/s > 94.">cmndala>[rivers/scscode=i;" > 94.">iala>], & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=fifo/s > 94.">fifoala>);mc53c94.c#L1" id="L1" class="line" 174ame="L1174>
mc53c94.c#L1" id="L1" class="line" 175ame="L1175>
r writebala>(rivers/scscode=CMD_SELECT;" > 94.">CMD_SELECTala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 177ame="L1177>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala> = rivers/scscode=se/fori 94."> ;mc53c94.c#L1" id="L1" class="line" 178ame="L1178>
mc53c94.c#L1" id="L1" class="line" 179ame="L1179>
rivers/scscode=set_dma_cmds > 94.">set_dma_cmdsala>(rivers/scscode= tate > 94.">stateala>, rivers/scscode=cmd/s > 94.">cmdala>);mc53c94.c#L1" id="L1" class="line" 180ame="L1180>
}mc53c94.c#L1" id="L1" class="line" 18name="L118">
mc53c94.c#L1" id="L1" class="line" 182ame="L1182>
st"> rivers/scscode=irqtype="_e;" > 94.">irqtype="_eala> rivers/scscode=do_lass="li_interrupt;" > 94.">do_lass="li_interruptala>(int rivers/scscode=irq;" > 94.">irqala>, void *rivers/scscode=dev_id/s > 94.">dev_idala>)mc53c94.c#L1" id="L1" class="line" 183ame="L1183>
{mc53c94.c#L1" id="L1" class="line" 184ame="L1184>
unsigned longdrivers/scscode=flags > 94.">flagsala>;mc53c94.c#L1" id="L1" class="line" 185ame="L1185>
structdrivers/scscode=Sc" _Hlse;" > 94.">S1" _Hlseala> *rivers/scscode=dev > 94.">devala> = ((structdrivers/scscode=fsc_state > 94.">fsc_stateala> *) rivers/scscode=dev_id/s > 94.">dev_idala>)-pan rivers/scscode=current_94q/s > 94.">9urrent_94qala>-pan rivers/scscode=device50 > 94.">3eviceala>-pan rivers/scscode=hlse;" > 94.">hlseala>;mc53c94.c#L1" id="L1" class="line" 186ame="L1186>
mc53c94.c#L1" id="L1" class="line" 187ame="L1187>
rivers/scscode= pin_lock_irqsave > 94.">spin_lock_irqsaveala>(rivers/scscode=dev > 94.">devala>-pan rivers/scscode=hlse_lock > 94.">hlse_lockala>, rivers/scscode=flags > 94.">flagsala>);mc53c94.c#L1" id="L1" class="line" 188ame="L1188>
rivers/scscode=lass="li_interrupt;" > 94.">lass="li_interruptala>(rivers/scscode=irq;" > 94.">irqala>, rivers/scscode=dev_id/s > 94.">dev_idala>);mc53c94.c#L1" id="L1" class="line" 189ame="L1189>
rivers/scscode=spin_unlock_irqrestore > 94.">spin_unlock_irqrestoreala>(rivers/scscode=dev > 94.">devala>-pan rivers/scscode=hlse_lock > 94.">hlse_lockala>, rivers/scscode=flags > 94.">flagsala>);mc53c94.c#L1" id="L1" class="line" 190ame="L1190>
type="hrivers/scscode=IRQ_HANDLED/s > 94.">IRQ_HANDLEDala>;mc53c94.c#L1" id="L1" class="line" 19name="L119">
}mc53c94.c#L1" id="L1" class="line" 192ame="L1192>
mc53c94.c#L1" id="L1" class="line" 193ame="L1193>
st"> void rivers/scscode=lass="li_interrupt;" > 94.">lass="li_interruptala>(int rivers/scscode=irq;" > 94.">irqala>, void *rivers/scscode=dev_id/s > 94.">dev_idala>)mc53c94.c#L1" id="L1" class="line" 194ame="L1194>
{mc53c94.c#L1" id="L1" class="line" 195ame="L1195>
structdrivers/scscode=fsc_state > 94.">fsc_stateala> *rivers/scscode= tate > 94.">stateala> = (structdrivers/scscode=fsc_state > 94.">fsc_stateala> *) rivers/scscode=dev_id/s > 94.">dev_idala>;mc53c94.c#L1" id="L1" class="line" 196ame="L1196>
structdrivers/scscode=lass="li_regs > 94.">lass="li_regsala> rivers/scscode=__iomem > 94.">__iomemala> *rivers/scscode=regs > 94.">regsala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=regs > 94.">regsala>;mc53c94.c#L1" id="L1" class="line" 197ame="L1197>
structdrivers/scscode=dbdma_regs > 94.">dbdma_regsala> rivers/scscode=__iomem > 94.">__iomemala> *rivers/scscode=dma > 94.">dmaala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma > 94.">dmaala>;mc53c94.c#L1" id="L1" class="line" 198ame="L1198>
structdrivers/scscode= 1" _cmnd/s > 94."> 1" _cmndala> *rivers/scscode=cmd/s > 94.">cmdala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=current_94q/s > 94.">9urrent_94qala>;mc53c94.c#L1" id="L1" class="line" 199ame="L1199>
int rivers/scscode=nb/s > 94.">nbala>, rivers/scscode=stat > 94.">statala>, rivers/scscode=s4q/s > 94.">seqala>, rivers/scscode=intr/s > 94.">intrala>;mc53c94.c#L1" id="L1" class="line" 200ame="L1200>
st"> int rivers/scscode=lass="li_errors > 94.">lass="li_errorsala>;mc53c94.c#L1" id="L1" class="line" 201ame="L120">
mc53c94.c#L1" id="L1" class="line" 202ame="L1202>
r seqala> = rivers/scscode=readb/s > 94.">readbala>(& rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=seqstep/s > 94.">seqstepala>);mc53c94.c#L1" id="L1" class="line" 207ame="L1207>
r_207ala> rivers/scscode= tat > 94.">statala> = rivers/scscode=readb/s > 94.">readbala>(& rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=st"&us > 94.">statusala>);mc53c94.c#L1" id="L1" class="line" 208ame="L1208>
r_208ala> rivers/scscode=intr/s > 94.">intrala> = rivers/scscode=readb/s > 94.">readbala>(& rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=interrupt;" > 94.">interruptala>);mc53c94.c#L1" id="L1" class="line" 209ame="L1209>
r_209ala>mc53c94.c#L1" id="L1" class="line" 210ame="L12"0>
#if 0mc53c94.c#L1" id="L1" class="line" 21name="L12"">
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;lass="li_intr, intr=%x st"&=%x seq=%x phase=%d\n"c intrala>, rivers/scscode=stat > 94.">statala>, rivers/scscode=s4q/s > 94.">seqala>, rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala>);mc53c94.c#L1" id="L1" class="line" 213ame="L1213>
#endifmc53c94.c#L1" id="L1" class="line" 214ame="L1214>
mc53c94.c#L1" id="L1" class="line" 215ame="L1215>
if (rivers/scscode=intr/s > 94.">intrala> & hrivers/scscode=INTR_RESET;" > 94.">INTR_RESETala>) {mc53c94.c#L1" id="L1" class="line" 216ame="L1216>
r 94.">printkala>(rivers/scscode=KERN_INFO;" > 94.">KERN_INFOala> r pquot;external SCSI bus resee detected\n"c writebala>(rivers/scscode=CMD_NOP;" > 94.">CMD_NOPala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 219ame="L1219>
rivers/scscode=writel/s > 94.">writelala>(rivers/scscode=RUN/s > 94.">RUNala> << 16, & rivers/scscode=dma > 94.">dmaala>-pan rivers/scscode=9e" rol/s > 94.">ce" rolala>); r 9md_d03bala>(rivers/scscode= tate > 94.">stateala>, rivers/scscode=DID_RESET;" > 94.">DID_RESETala> << 16);mc53c94.c#L1" id="L1" class="line" 22name="L122">
type=";mc53c94.c#L1" id="L1" class="line" 222ame="L1222>
}mc53c94.c#L1" id="L1" class="line" 223ame="L1223>
if (rivers/scscode=intr/s > 94.">intrala> & hrivers/scscode=INTR_ILL_CMD/s > 94.">INTR_ILL_CMDala>) {mc53c94.c#L1" id="L1" class="line" 224ame="L1224>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_ERR;" > 94.">KERN_ERRala> r pquot;s="li: invalid 9md, intr=%x st"&=%x seq=%x phase=%d\n"c intrala>, rivers/scscode=stat > 94.">statala>, rivers/scscode=s4q/s > 94.">seqala>, rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala>);mc53c94.c#L1" id="L1" class="line" 226ame="L1226>
rivers/scscode=9md_d03b50 > 94.">9md_d03bala>(rivers/scscode= tate > 94.">stateala>, rivers/scscode=DID_ERROR;" > 94.">DID_ERRORala> << 16);mc53c94.c#L1" id="L1" class="line" 227ame="L1227>
type=";mc53c94.c#L1" id="L1" class="line" 228ame="L1228>
}mc53c94.c#L1" id="L1" class="line" 229ame="L1229>
if (rivers/scscode= tat > 94.">statala> & hrivers/scscode=STAT_ERROR;" > 94.">STAT_ERRORala>) {mc53c94.c#L1" id="L1" class="line" 230ame="L1230>
#if 0mc53c94.c#L1" id="L1" class="line" 23name="L123">
r 94.">printkala>(r pquot;s="li: bad error, intr=%x st"&=%x seq=%x phase=%d\n"c intrala>, rivers/scscode=stat > 94.">statala>, rivers/scscode=s4q/s > 94.">seqala>, rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala>);mc53c94.c#L1" id="L1" class="line" 234ame="L1234>
#endifmc53c94.c#L1" id="L1" class="line" 235ame="L1235>
++rivers/scscode=lass="li_errors > 94.">lass="li_errorsala>;mc53c94.c#L1" id="L1" class="line" 236ame="L1236>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_NOP;" > 94.">CMD_NOPala> + rivers/scscode=CMD_DMA_MODE/s > 94.">CMD_DMA_MODEala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 237ame="L1237>
}mc53c94.c#L1" id="L1" class="line" 238ame="L1238>
if (rivers/scscode=cmd/s > 94.">cmdala> == 0) {mc53c94.c#L1" id="L1" class="line" 239ame="L1239>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;s="li: interrupt with no 9mmmand act" i?\n"c
}mc53c94.c#L1" id="L1" class="line" 242ame="L1242>
if (rivers/scscode= tat > 94.">statala> & hrivers/scscode=STAT_PARITY;" > 94.">STAT_PARITYala>) {mc53c94.c#L1" id="L1" class="line" 243ame="L1243>
rivers/scscode= 94.">printkala>(rivers/scscode=KERN_ERR;" > 94.">KERN_ERRala> r pquot;lass="li: parity error\n"c 9md_d03bala>(rivers/scscode= tate > 94.">stateala>, rivers/scscode=DID_PARITY;" > 94.">DID_PARITYala> << 16);mc53c94.c#L1" id="L1" class="line" 245ame="L1245>
type=";mc53c94.c#L1" id="L1" class="line" 246ame="L1246>
}mc53c94.c#L1" id="L1" class="line" 247ame="L1247>
switch (rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala>) {mc53c94.c#L1" id="L1" class="line" 248ame="L1248>
case rivers/scscode=se/fori 94."> :mc53c94.c#L1" id="L1" class="line" 249ame="L1249>
if (rivers/scscode=intr/s > 94.">intrala> & hrivers/scscode=INTR_DISCONNECT;" > 94.">INTR_DISCONNECTala>) {mc53c94.c#L1" id="L1" class="line" 250ame="L1250>
r
rivers/scscode=9md_d03b50 > 94.">9md_d03bala>(rivers/scscode= tate > 94.">stateala>, rivers/scscode=DID_BAD_TARGET;" > 94.">DID_BAD_TARGETala> << 16);mc53c94.c#L1" id="L1" class="line" 252ame="L1252>
type=";mc53c94.c#L1" id="L1" class="line" 253ame="L1253>
}mc53c94.c#L1" id="L1" class="line" 254ame="L1254>
if (rivers/scscode=intr/s > 94.">intrala> !=drivers/scscode=INTR_BUS_SERV;" > 94.">INTR_BUS_SERVala> + rivers/scscode=INTR_DONE/s > 94.">INTR_DONEala>) {mc53c94.c#L1" id="L1" class="line" 255ame="L1255>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;got intr %x dur g s 94.">intrala>);mc53c94.c#L1" id="L1" class="line" 256ame="L1256>
rivers/scscode=9md_d03b50 > 94.">9md_d03bala>(rivers/scscode= tate > 94.">stateala>, rivers/scscode=DID_ERROR;" > 94.">DID_ERRORala> << 16);mc53c94.c#L1" id="L1" class="line" 257ame="L1257>
type=";mc53c94.c#L1" id="L1" class="line" 258ame="L1258>
}mc53c94.c#L1" id="L1" class="line" 259ame="L1259>
if ((rivers/scscode= 4q/s > 94.">seqala> & hrivers/scscode=SS_MASK;" > 94.">SS_MASKala>) !=drivers/scscode=SS_DONE/s > 94.">SS_DONEala>) {mc53c94.c#L1" id="L1" class="line" 260ame="L1260>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;seq step %x after 9mmmand\n"c 94.">seqala>);mc53c94.c#L1" id="L1" class="line" 26name="L126">
rivers/scscode=9md_d03b50 > 94.">9md_d03bala>(rivers/scscode= tate > 94.">stateala>, rivers/scscode=DID_ERROR;" > 94.">DID_ERRORala> << 16);mc53c94.c#L1" id="L1" class="line" 262ame="L1262>
type=";mc53c94.c#L1" id="L1" class="line" 263ame="L1263>
}mc53c94.c#L1" id="L1" class="line" 264ame="L1264>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_NOP;" > 94.">CMD_NOPala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 265ame="L1265>
r statala> & h(rivers/scscode=STAT_MSG;" > 94.">STAT_MSGala>|rivers/scscode=STAT_CD/s > 94.">STAT_CDala>)) == 0mc53c94.c#L1" id="L1" class="line" 267ame="L1267>
& & h(rivers/scscode= 1" _sg_9eune > 94.">s1" _sg_9euneala>(rivers/scscode=cmd/s > 94.">cmdala>) pan 0 || rivers/scscode= 1" _buffle /s > 94."> 1" _buffle ala>(rivers/scscode=cmd/s > 94.">cmdala>))) {mc53c94.c#L1" id="L1" class="line" 268ame="L1268>
rivers/scscode=nb/s > 94.">nbala> = rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=SCp/s > 94.">SCpala>.rivers/scscode=e="h_residual/s > 94.">e="h_residualala>;mc53c94.c#L1" id="L1" class="line" 269ame="L1269>
if (rivers/scscode=nb/s > 94.">nbala> pan 0xfff0)mc53c94.c#L1" id="L1" class="line" 270ame="L1270>
rivers/scscode=nb/s > 94.">nbala> = 0xfff0;mc53c94.c#L1" id="L1" class="line" 27name="L127">
rivers/scscode=9md/s > 94.">cmdala>-pan rivers/scscode=SCp/s > 94.">SCpala>.rivers/scscode=e="h_residual/s > 94.">e="h_residualala> -= rivers/scscode=nb/s > 94.">nbala>;mc53c94.c#L1" id="L1" class="line" 272ame="L1272>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=nb/s > 94.">nbala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9eune_lo/s > 94.">ceune_loala>);mc53c94.c#L1" id="L1" class="line" 273ame="L1273>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=nb/s > 94.">nbala> pan pan 8, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9eune_mid/s > 94.">9eune_midala>);mc53c94.c#L1" id="L1" class="line" 274ame="L1274>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_DMA_MODE/s > 94.">CMD_DMA_MODEala> + rivers/scscode=CMD_NOP;" > 94.">CMD_NOPala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 275ame="L1275>
rivers/scscode=writel/s > 94.">writelala>(rivers/scscode=virt_to_phys > 94.">virt_to_physala>(rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma_cmds > 94.">dma_cmdsala>), & rivers/scscode=dma > 94.">dmaala>-pan rivers/scscode=9mdptr/s > 94.">9mdptrala>);mc53c94.c#L1" id="L1" class="line" 276ame="L1276>
rivers/scscode=writel/s > 94.">writelala>((rivers/scscode=RUN/s > 94.">RUNala> << 16) | rivers/scscode=RUN/s > 94.">RUNala>, & rivers/scscode=dma > 94.">dmaala>-pan rivers/scscode=9e" rol/s > 94.">ce" rolala>);mc53c94.c#L1" id="L1" class="line" 277ame="L1277>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_DMA_MODE/s > 94.">CMD_DMA_MODEala> + rivers/scscode=CMD_XFER_DATA/s > 94.">CMD_XFER_DATAala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 278ame="L1278>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala> = rivers/scscode=datai 94.">datai ;mc53c94.c#L1" id="L1" class="line" 279ame="L1279>
break;mc53c94.c#L1" id="L1" class="line" 280ame="L1280>
} else if ((rivers/scscode= tat > 94.">statala> & hrivers/scscode=STAT_PHASE/s > 94.">STAT_PHASEala>) ==drivers/scscode=STAT_CD/s > 94.">STAT_CDala> + rivers/scscode=STAT_IO;" > 94.">STAT_IOala>) {mc53c94.c#L1" id="L1" class="line" 28name="L128">
r writebala>(rivers/scscode=CMD_I_COMPLETE/s > 94.">CMD_I_COMPLETEala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 283ame="L1283>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala> = rivers/scscode=cempleri 94.">cempleri ;mc53c94.c#L1" id="L1" class="line" 284ame="L1284>
} else {mc53c94.c#L1" id="L1" class="line" 285ame="L1285>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;in unexpected phase %x after 9md\n"c statala> & hrivers/scscode=STAT_PHASE/s > 94.">STAT_PHASEala>);mc53c94.c#L1" id="L1" class="line" 287ame="L1287>
rivers/scscode=9md_d03b50 > 94.">9md_d03bala>(rivers/scscode= tate > 94.">stateala>, rivers/scscode=DID_ERROR;" > 94.">DID_ERRORala> << 16);mc53c94.c#L1" id="L1" class="line" 288ame="L1288>
type=";mc53c94.c#L1" id="L1" class="line" 289ame="L1289>
}mc53c94.c#L1" id="L1" class="line" 290ame="L1290>
break;mc53c94.c#L1" id="L1" class="line" 29name="L129">
mc53c94.c#L1" id="L1" class="line" 292ame="L1292>
case rivers/scscode=datai 94.">datai :mc53c94.c#L1" id="L1" class="line" 293ame="L1293>
if (rivers/scscode=intr/s > 94.">intrala> !=drivers/scscode=INTR_BUS_SERV;" > 94.">INTR_BUS_SERVala>) {mc53c94.c#L1" id="L1" class="line" 294ame="L1294>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;got intr %x before st"&us\n"c 94.">intrala>);mc53c94.c#L1" id="L1" class="line" 295ame="L1295>
rivers/scscode=9md_d03b50 > 94.">9md_d03bala>(rivers/scscode= tate > 94.">stateala>, rivers/scscode=DID_ERROR;" > 94.">DID_ERRORala> << 16);mc53c94.c#L1" id="L1" class="line" 296ame="L1296>
type=";mc53c94.c#L1" id="L1" class="line" 297ame="L1297>
}mc53c94.c#L1" id="L1" class="line" 298ame="L1298>
if (rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=SCp/s > 94.">SCpala>.rivers/scscode=e="h_residual/s > 94.">e="h_residualala> != 0mc53c94.c#L1" id="L1" class="line" 299ame="L1299>
& & h(rivers/scscode= tat > 94.">statala> & h(rivers/scscode=STAT_MSG;" > 94.">STAT_MSGala>|rivers/scscode=STAT_CD/s > 94.">STAT_CDala>)) == 0) {mc53c94.c#L1" id="L1" class="line" 300ame="L1300>
r
rivers/scscode=nb/s > 94.">nbala> = rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=SCp/s > 94.">SCpala>.rivers/scscode=e="h_residual/s > 94.">e="h_residualala>;mc53c94.c#L1" id="L1" class="line" 302ame="L1302>
if (rivers/scscode=nb/s > 94.">nbala> pan 0xfff0)mc53c94.c#L1" id="L1" class="line" 303ame="L1303>
rivers/scscode=nb/s > 94.">nbala> = 0xfff0;mc53c94.c#L1" id="L1" class="line" 304ame="L1304>
rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=SCp/s > 94.">SCpala>.rivers/scscode=e="h_residual/s > 94.">e="h_residualala> -= rivers/scscode=nb/s > 94.">nbala>;mc53c94.c#L1" id="L1" class="line" 305ame="L1305>
r_305ala> rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=nb/s > 94.">nbala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9eune_lo/s > 94.">ceune_loala>);mc53c94.c#L1" id="L1" class="line" 306ame="L1306>
r_306ala> rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=nb/s > 94.">nbala> pan pan 8, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9eune_mid/s > 94.">9eune_midala>);mc53c94.c#L1" id="L1" class="line" 307ame="L1307>
r_307ala> rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_DMA_MODE/s > 94.">CMD_DMA_MODEala> + rivers/scscode=CMD_NOP;" > 94.">CMD_NOPala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 308ame="L1308>
r_308ala> rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_DMA_MODE/s > 94.">CMD_DMA_MODEala> + rivers/scscode=CMD_XFER_DATA/s > 94.">CMD_XFER_DATAala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 309ame="L1309>
r_309ala> break;mc53c94.c#L1" id="L1" class="line" 310ame="L13"0>
}mc53c94.c#L1" id="L1" class="line" 311ame="L13"">
if ((rivers/scscode= tat > 94.">statala> & hrivers/scscode=STAT_PHASE/s > 94.">STAT_PHASEala>) !=drivers/scscode=STAT_CD/s > 94.">STAT_CDala> + rivers/scscode=STAT_IO;" > 94.">STAT_IOala>) {mc53c94.c#L1" id="L1" class="line" 312ame="L1312>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;intr %x before data xfer 9mmplere\n"c 94.">intrala>);mc53c94.c#L1" id="L1" class="line" 313ame="L1313>
}mc53c94.c#L1" id="L1" class="line" 314ame="L1314>
rivers/scscode=writel/s > 94.">writelala>(rivers/scscode=RUN/s > 94.">RUNala> << 16, & rivers/scscode=dma > 94.">dmaala>-pan rivers/scscode=9e" rol/s > 94.">ce" rolala>); r 94.">s1" _dma_unmapala>(rivers/scscode=cmd/s > 94.">cmdala>);mc53c94.c#L1" id="L1" class="line" 316ame="L1316>
r writebala>(rivers/scscode=CMD_I_COMPLETE/s > 94.">CMD_I_COMPLETEala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 318ame="L1318>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala> = rivers/scscode=cempleri 94.">cempleri ;mc53c94.c#L1" id="L1" class="line" 319ame="L1319>
break;mc53c94.c#L1" id="L1" class="line" 320ame="L1320>
case rivers/scscode=cempleri 94.">cempleri :mc53c94.c#L1" id="L1" class="line" 32name="L132">
if (rivers/scscode=intr/s > 94.">intrala> !=drivers/scscode=INTR_DONE/s > 94.">INTR_DONEala>) {mc53c94.c#L1" id="L1" class="line" 322ame="L1322>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;got intr %x on 9mmplerion\n"c 94.">intrala>);mc53c94.c#L1" id="L1" class="line" 323ame="L1323>
rivers/scscode=9md_d03b50 > 94.">9md_d03bala>(rivers/scscode= tate > 94.">stateala>, rivers/scscode=DID_ERROR;" > 94.">DID_ERRORala> << 16);mc53c94.c#L1" id="L1" class="line" 324ame="L1324>
type=";mc53c94.c#L1" id="L1" class="line" 325ame="L1325>
}mc53c94.c#L1" id="L1" class="line" 326ame="L1326>
rivers/scscode=9md/s > 94.">cmdala>-pan rivers/scscode=SCp/s > 94.">SCpala>.rivers/scscode=St"&us > 94.">Statusala> = rivers/scscode=readb/s > 94.">readbala>(& rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=fifo/s > 94.">fifoala>);mc53c94.c#L1" id="L1" class="line" 327ame="L1327>
rivers/scscode=9md/s > 94.">cmdala>-pan rivers/scscode=SCp/s > 94.">SCpala>.rivers/scscode=Message > 94.">Messageala> = rivers/scscode=readb/s > 94.">readbala>(& rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=fifo/s > 94.">fifoala>);mc53c94.c#L1" id="L1" class="line" 328ame="L1328>
rivers/scscode=9md/s > 94.">cmdala>-pan rivers/scscode=result > 94.">resultala> = rivers/scscode=CMD_ACCEPT_MSG;" > 94.">CMD_ACCEPT_MSGala>;mc53c94.c#L1" id="L1" class="line" 329ame="L1329>
rivers/scscode=writeb/s > 94.">writebala>(rivers/scscode=CMD_ACCEPT_MSG;" > 94.">CMD_ACCEPT_MSGala>, & rivers/scscode=regs > 94.">regsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>);mc53c94.c#L1" id="L1" class="line" 330ame="L1330>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala> = rivers/scscode=busfreei 94.">busfreei ;mc53c94.c#L1" id="L1" class="line" 33name="L133">
break;mc53c94.c#L1" id="L1" class="line" 332ame="L1332>
case rivers/scscode=busfreei 94.">busfreei :mc53c94.c#L1" id="L1" class="line" 333ame="L1333>
if (rivers/scscode=intr/s > 94.">intrala> !=drivers/scscode=INTR_DISCONNECT;" > 94.">INTR_DISCONNECTala>) {mc53c94.c#L1" id="L1" class="line" 334ame="L1334>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;got intr %x when expected disconnect\n"c 94.">intrala>);mc53c94.c#L1" id="L1" class="line" 335ame="L1335>
}mc53c94.c#L1" id="L1" class="line" 336ame="L1336>
rivers/scscode=9md_d03b50 > 94.">9md_d03bala>(rivers/scscode= tate > 94.">stateala>, (rivers/scscode=DID_OK;" > 94.">DID_OKala> << 16) + (rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=SCp/s > 94.">SCpala>.rivers/scscode=Message > 94.">Messageala> << 8)mc53c94.c#L1" id="L1" class="line" 337ame="L1337>
+ rivers/scscode=9md/s > 94.">cmdala>-pan rivers/scscode=SCp/s > 94.">SCpala>.rivers/scscode=St"&us > 94.">Statusala>);mc53c94.c#L1" id="L1" class="line" 338ame="L1338>
break;mc53c94.c#L1" id="L1" class="line" 339ame="L1339>
default:mc53c94.c#L1" id="L1" class="line" 340ame="L1340>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_DEBUG;" > 94.">KERN_DEBUGala> r pquot;d03't know about phase %d\n"c 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala>);mc53c94.c#L1" id="L1" class="line" 34name="L134">
}mc53c94.c#L1" id="L1" class="line" 342ame="L1342>
}mc53c94.c#L1" id="L1" class="line" 343ame="L1343>
mc53c94.c#L1" id="L1" class="line" 344ame="L1344>
st"> void rivers/scscode=9md_d03b50 > 94.">9md_d03bala>(structdrivers/scscode=fsc_state > 94.">fsc_stateala> *rivers/scscode= tate > 94.">stateala>, int rivers/scscode=result > 94.">resultala>)mc53c94.c#L1" id="L1" class="line" 345ame="L1345>
{mc53c94.c#L1" id="L1" class="line" 346ame="L1346>
structdrivers/scscode=s1" _cmnd/s > 94."> 1" _cmndala> *rivers/scscode=cmd/s > 94.">cmdala>;mc53c94.c#L1" id="L1" class="line" 347ame="L1347>
mc53c94.c#L1" id="L1" class="line" 348ame="L1348>
rivers/scscode=cmd/s > 94.">cmdala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=current_94q/s > 94.">9urrent_94qala>;mc53c94.c#L1" id="L1" class="line" 349ame="L1349>
if (rivers/scscode=cmd/s > 94.">cmdala> != 0) {mc53c94.c#L1" id="L1" class="line" 350ame="L1350>
rivers/scscode=9md/s > 94.">cmdala>-pan rivers/scscode=result > 94.">resultala> = rivers/scscode=result > 94.">resultala>;mc53c94.c#L1" id="L1" class="line" 35name="L135">
(*rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=s1" _d03b50 > 94.">s1" _d03bala>)(rivers/scscode=cmd/s > 94.">cmdala>);mc53c94.c#L1" id="L1" class="line" 352ame="L1352>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=current_94q/s > 94.">9urrent_94qala> = rivers/scscode=NULL/s > 94.">NULLala>;mc53c94.c#L1" id="L1" class="line" 353ame="L1353>
}mc53c94.c#L1" id="L1" class="line" 354ame="L1354>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=phase > 94.">phaseala> = rivers/scscode=idle > 94.">idleala>;mc53c94.c#L1" id="L1" class="line" 355ame="L1355>
rivers/scscode=lass="li_start > 94.">lass="li_startala>(rivers/scscode= tate > 94.">stateala>);mc53c94.c#L1" id="L1" class="line" 356ame="L1356>
}mc53c94.c#L1" id="L1" class="line" 357ame="L1357>
mc53c94.c#L1" id="L1" class="line" 358ame="L1358>
r
st"> void rivers/scscode=set_dma_cmds > 94.">set_dma_cmdsala>(structdrivers/scscode=fsc_state > 94.">fsc_stateala> *rivers/scscode= tate > 94.">stateala>, structdrivers/scscode=s1" _cmnd/s > 94."> 1" _cmndala> *rivers/scscode=cmd/s > 94.">cmdala>)mc53c94.c#L1" id="L1" class="line" 362ame="L1362>
{mc53c94.c#L1" id="L1" class="line" 363ame="L1363>
int rivers/scscode=i > 94.">iala>, rivers/scscode=dma_cmd > 94.">dma_cmdala>, rivers/scscode=total/s > 94.">eotalala>, rivers/scscode=nse 94.">nse;mc53c94.c#L1" id="L1" class="line" 364ame="L1364>
structdrivers/scscode=s1atterlise > 94.">s1atterliseala> *rivers/scscode= cl/s > 94."> clala>;mc53c94.c#L1" id="L1" class="line" 365ame="L1365>
structdrivers/scscode=dbdma_cmd > 94.">dbdma_cmdala> *rivers/scscode=dcmds > 94.">dcmdsala>;mc53c94.c#L1" id="L1" class="line" 366ame="L1366>
rivers/scscode=dma_addr_e > 94.">dma_addr_eala> rivers/scscode=dma_addr > 94.">dma_addrala>;mc53c94.c#L1" id="L1" class="line" 367ame="L1367>
rivers/scscode=u32>
u32ala> rivers/scscode=dma_le /s > 94.">dma_le ala>;mc53c94.c#L1" id="L1" class="line" 368ame="L1368>
mc53c94.c#L1" id="L1" class="line" 369ame="L1369>
rivers/scscode=nse 94.">nse = rivers/scscode= 1" _dma_map/s > 94.">s1" _dma_mapala>(rivers/scscode=cmd/s > 94.">cmdala>);mc53c94.c#L1" id="L1" class="line" 370ame="L1370>
rivers/scscode=BUG_ON/s > 94.">BUG_ONala>(rivers/scscode=nse 94.">nse < 0);mc53c94.c#L1" id="L1" class="line" 37name="L137">
if (!rivers/scscode=nse 94.">nse)mc53c94.c#L1" id="L1" class="line" 372ame="L1372>
type=";mc53c94.c#L1" id="L1" class="line" 373ame="L1373>
mc53c94.c#L1" id="L1" class="line" 374ame="L1374>
rivers/scscode=dma_cmd > 94.">dma_cmdala> = rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=sc_data_dirforion/s > 94.">s1_data_dirforionala> == rivers/scscode=DMA_TO_DEVICE/s > 94.">DMA_TO_DEVICEala> ?mc53c94.c#L1" id="L1" class="line" 375ame="L1375>
rivers/scscode=OUTPUT_MORE/s > 94.">OUTPUT_MOREala> :drivers/scscode=INPUT_MORE/s > 94.">INPUT_MOREala>;mc53c94.c#L1" id="L1" class="line" 376ame="L1376>
rivers/scscode=dcmds > 94.">dcmdsala> = rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma_cmds > 94.">dma_cmdsala>;mc53c94.c#L1" id="L1" class="line" 377ame="L1377>
rivers/scscode=total/s > 94.">eotalala> = 0;mc53c94.c#L1" id="L1" class="line" 378ame="L1378>
mc53c94.c#L1" id="L1" class="line" 379ame="L1379>
rivers/scscode=s1" _for_each_s 94."> 1" _for_each_s(rivers/scscode=cmd/s > 94.">cmdala>, rivers/scscode= cl/s > 94."> clala>, rivers/scscode=nse 94.">nse, rivers/scscode=i > 94.">iala>) {mc53c94.c#L1" id="L1" class="line" 380ame="L1380>
rivers/scscode=dma_addr > 94.">dma_addrala> = rivers/scscode= g_dma_address > 94.">sg_dma_addressala>(rivers/scscode= cl/s > 94."> clala>);mc53c94.c#L1" id="L1" class="line" 38name="L138">
rivers/scscode=dma_le /s > 94.">dma_le ala> = rivers/scscode= g_dma_le /s > 94."> g_dma_le ala>(rivers/scscode= cl/s > 94."> clala>);mc53c94.c#L1" id="L1" class="line" 382ame="L1382>
if (rivers/scscode=dma_le /s > 94.">dma_le ala> pan 0xffff)mc53c94.c#L1" id="L1" class="line" 383ame="L1383>
rivers/scscode=panic > 94.">panicala>(r pquot;lass="li: s1atterlise elemten pan = 64k"c eotalala> += rivers/scscode=dma_le /s > 94.">dma_le ala>;mc53c94.c#L1" id="L1" class="line" 385ame="L1385>
rivers/scscode= t_le16>
st_le16ala>(& rivers/scscode=dcmds > 94.">dcmdsala>-pan rivers/scscode=req_9eune > 94.">req_9euneala>, rivers/scscode=dma_le /s > 94.">dma_le ala>);mc53c94.c#L1" id="L1" class="line" 386ame="L1386>
rivers/scscode= t_le16>
st_le16ala>(& rivers/scscode=dcmds > 94.">dcmdsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>, rivers/scscode=dma_cmd > 94.">dma_cmdala>);mc53c94.c#L1" id="L1" class="line" 387ame="L1387>
rivers/scscode= t_le32>
t_le32ala>(& rivers/scscode=dcmds > 94.">dcmdsala>-pan rivers/scscode=phy_addr > 94.">phy_addrala>, rivers/scscode=dma_addr > 94.">dma_addrala>);mc53c94.c#L1" id="L1" class="line" 388ame="L1388>
rivers/scscode=dcmds > 94.">dcmdsala>-pan rivers/scscode=xfer_st"&us > 94.">xfer_st"&usala> = 0;mc53c94.c#L1" id="L1" class="line" 389ame="L1389>
++rivers/scscode=dcmds > 94.">dcmdsala>;mc53c94.c#L1" id="L1" class="line" 390ame="L1390>
}mc53c94.c#L1" id="L1" class="line" 39name="L139">
mc53c94.c#L1" id="L1" class="line" 392ame="L1392>
rivers/scscode=dma_cmd > 94.">dma_cmdala> += rivers/scscode=OUTPUT_LAST;" > 94.">OUTPUT_LASTala> - rivers/scscode=OUTPUT_MORE/s > 94.">OUTPUT_MOREala>;mc53c94.c#L1" id="L1" class="line" 393ame="L1393>
rivers/scscode= t_le16>
st_le16ala>(& rivers/scscode=dcmds > 94.">dcmdsala>[-1].rivers/scscode=9emmand/s > 94.">cemmandala>, rivers/scscode=dma_cmd > 94.">dma_cmdala>);mc53c94.c#L1" id="L1" class="line" 394ame="L1394>
rivers/scscode= t_le16>
st_le16ala>(& rivers/scscode=dcmds > 94.">dcmdsala>-pan rivers/scscode=9emmand/s > 94.">cemmandala>, rivers/scscode=DBDMA_STOP;" > 94.">DBDMA_STOPala>);mc53c94.c#L1" id="L1" class="line" 395ame="L1395>
rivers/scscode=cmd/s > 94.">cmdala>-pan rivers/scscode=SCp/s > 94.">SCpala>.rivers/scscode=e="h_residual/s > 94.">e="h_residualala> = rivers/scscode=total/s > 94.">eotalala>;mc53c94.c#L1" id="L1" class="line" 396ame="L1396>
}mc53c94.c#L1" id="L1" class="line" 397ame="L1397>
mc53c94.c#L1" id="L1" class="line" 398ame="L1398>
st"> structdrivers/scscode=s1" _host_template > 94.">s1" _host_templateala> rivers/scscode=lass="li_template > 94.">lass="li_templateala> = {mc53c94.c#L1" id="L1" class="line" 399ame="L1399>
.rivers/scscode=proc_v 1 > 94.">proc_v 1 ala> = r pquot;s="li"c v 1 ala> = r pquot;s=Cli"c
.rivers/scscode=queue9emmand/s > 94.">queue9emmandala> = rivers/scscode=lass="li_queue > 94.">lass="li_queueala>,mc53c94.c#L1" id="L1" class="line" 402ame="L1402>
.rivers/scscode=eh_host_reset_handler > 94.">eh_host_reset_handlerala> = rivers/scscode=lass="li_host_reset > 94.">lass="li_host_resetala>,mc53c94.c#L1" id="L1" class="line" 403ame="L1403>
.rivers/scscode=9an_queue > 94.">9an_queueala> = 1,mc53c94.c#L1" id="L1" class="line" 404ame="L1404>
.rivers/scscode=e="h_id/s > 94.">e="h_idala> = 7,mc53c94.c#L1" id="L1" class="line" 405ame="L1405>
r_405ala> .rivers/scscode=sg_tablesize > 94.">sg_tablesizeala> = rivers/scscode=SG_ALL/s > 94.">SG_ALLala>,mc53c94.c#L1" id="L1" class="line" 406ame="L1406>
r_406ala> .rivers/scscode=9md_per_lu /s > 94.">9md_per_lu ala> = 1,mc53c94.c#L1" id="L1" class="line" 407ame="L1407>
r_407ala> .rivers/scscode=use_clusteri 94.">use_clusteri = rivers/scscode=DISABLE_CLUSTERING;" > 94.">DISABLE_CLUSTERINGala>,mc53c94.c#L1" id="L1" class="line" 408ame="L1408>
r_408ala>};mc53c94.c#L1" id="L1" class="line" 409ame="L1409>
r_409ala>mc53c94.c#L1" id="L1" class="line" 410ame="L14"0>
st"> int rivers/scscode=lass="li_probe > 94.">lass="li_probeala>(structdrivers/scscode=lasio_dev > 94.">lasio_devala> *rivers/scscode=mdev > 94.">ldevala>, ce"st structdrivers/scscode=of_device_id/s > 94.">of_device_idala> *rivers/scscode=match > 94.">latchala>)mc53c94.c#L1" id="L1" class="line" 411ame="L14"">
{mc53c94.c#L1" id="L1" class="line" 412ame="L1412>
structdrivers/scscode=device_node > 94.">device_nodeala> *rivers/scscode=node > 94.">nodeala> = rivers/scscode=lasio_get_of_node > 94.">lasio_get_of_nodeala>(rivers/scscode=mdev > 94.">ldevala>);mc53c94.c#L1" id="L1" class="line" 413ame="L1413>
structdrivers/scscode=pci_dev > 94.">pci_devala> *rivers/scscode=pdev > 94.">pdevala> = rivers/scscode=lasio_get_pci_dev > 94.">lasio_get_pci_devala>(rivers/scscode=mdev > 94.">ldevala>);mc53c94.c#L1" id="L1" class="line" 414ame="L1414>
structdrivers/scscode=fsc_state > 94.">fsc_stateala> *rivers/scscode= tate > 94.">stateala>;mc53c94.c#L1" id="L1" class="line" 415ame="L1415>
structdrivers/scscode=S1" _Hose > 94.">S1" _Hoseala> *rivers/scscode=hose > 94.">hoseala>;mc53c94.c#L1" id="L1" class="line" 416ame="L1416>
void *rivers/scscode=dma_cmd_ 94.">dma_cmd_ ;mc53c94.c#L1" id="L1" class="line" 417ame="L1417>
ce"st unsigned char *rivers/scscode=clkprop/s > 94.">clkpropala>;mc53c94.c#L1" id="L1" class="line" 418ame="L1418>
int rivers/scscode=prople /s > 94.">prople ala>, rivers/scscode=rc > 94.">rcala> = -rivers/scscode=ENODEV;" > 94.">ENODEVala>;mc53c94.c#L1" id="L1" class="line" 419ame="L1419>
mc53c94.c#L1" id="L1" class="line" 420ame="L1420>
if (rivers/scscode=lasio_resource_9eune > 94.">lasio_resource_9euneala>(rivers/scscode=mdev > 94.">ldevala>) != 2 || rivers/scscode=lasio_irq_9eune > 94.">lasio_irq_9euneala>(rivers/scscode=mdev > 94.">ldevala>) != 2) {mc53c94.c#L1" id="L1" class="line" 42name="L142">
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_ERR;" > 94.">KERN_ERRala> r pquot;lass="li: expected 2 addrs and intrs"c pquot; (got %d/%d)\n"c lasio_resource_9euneala>(rivers/scscode=mdev > 94.">ldevala>), rivers/scscode=lasio_irq_9eune > 94.">lasio_irq_9euneala>(rivers/scscode=mdev > 94.">ldevala>));mc53c94.c#L1" id="L1" class="line" 424ame="L1424>
type=" -rivers/scscode=ENODEV;" > 94.">ENODEVala>;mc53c94.c#L1" id="L1" class="line" 425ame="L1425>
}mc53c94.c#L1" id="L1" class="line" 426ame="L1426>
mc53c94.c#L1" id="L1" class="line" 427ame="L1427>
if (rivers/scscode=lasio_request_resources > 94.">lasio_request_resourcesala>(rivers/scscode=mdev > 94.">ldevala>, r pquot;lass="li"c 94.">printkala>(rivers/scscode=KERN_ERR;" > 94.">KERN_ERRala> r pquot;lass="li: unable to request memory resources"c 94.">EBUSYala>;mc53c94.c#L1" id="L1" class="line" 430ame="L1430>
}mc53c94.c#L1" id="L1" class="line" 43name="L143">
mc53c94.c#L1" id="L1" class="line" 432ame="L1432>
rivers/scscode=hose > 94.">hoseala> = rivers/scscode= 1" _host_alloc > 94."> 1" _host_allocala>(& rivers/scscode=lass="li_template > 94.">lass="li_templateala>, sizeof(structdrivers/scscode=fsc_state > 94.">fsc_stateala>));mc53c94.c#L1" id="L1" class="line" 433ame="L1433>
if (rivers/scscode=hose > 94.">hoseala> == rivers/scscode=NULL/s > 94.">NULLala>) {mc53c94.c#L1" id="L1" class="line" 434ame="L1434>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_ERR;" > 94.">KERN_ERRala> r pquot;lass="li: could3't register hose"c rcala> = -rivers/scscode=ENOMEM;" > 94.">ENOMEMala>;mc53c94.c#L1" id="L1" class="line" 436ame="L1436>
gotodrivers/scscode=out_release > 94.">out_releaseala>;mc53c94.c#L1" id="L1" class="line" 437ame="L1437>
}mc53c94.c#L1" id="L1" class="line" 438ame="L1438>
mc53c94.c#L1" id="L1" class="line" 439ame="L1439>
rivers/scscode=state > 94.">stateala> = (structdrivers/scscode=fsc_state > 94.">fsc_stateala> *) rivers/scscode=hose > 94.">hoseala>-pan rivers/scscode=hosedata > 94.">hosedataala>;mc53c94.c#L1" id="L1" class="line" 440ame="L1440>
rivers/scscode=lasio_set_drvdata > 94.">lasio_set_drvdataala>(rivers/scscode=mdev > 94.">ldevala>, rivers/scscode=state > 94.">stateala>);mc53c94.c#L1" id="L1" class="line" 44name="L144">
rivers/scscode=state > 94.">stateala>-pan rivers/scscode=hose > 94.">hoseala> = rivers/scscode=hose > 94.">hoseala>;mc53c94.c#L1" id="L1" class="line" 442ame="L1442>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=pdev > 94.">pdevala> = rivers/scscode=pdev > 94.">pdevala>;mc53c94.c#L1" id="L1" class="line" 443ame="L1443>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=mdev > 94.">ldevala> = rivers/scscode=ldev > 94.">ldevala>;mc53c94.c#L1" id="L1" class="line" 444ame="L1444>
mc53c94.c#L1" id="L1" class="line" 445ame="L1445>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=regs > 94.">regsala> = (structdrivers/scscode=lass="li_regs > 94.">lass="li_regsala> rivers/scscode=__iomem > 94.">__iomemala> *)mc53c94.c#L1" id="L1" class="line" 446ame="L1446>
rivers/scscode=ioremap/s > 94.">ioremapala>(rivers/scscode=masio_resource_start > 94.">lasio_resource_startala>(rivers/scscode=mdev > 94.">ldevala>, 0), 0x1000);mc53c94.c#L1" id="L1" class="line" 447ame="L1447>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=intr/s > 94.">intrala> = rivers/scscode=lasio_irq/s > 94.">lasio_irqala>(rivers/scscode=mdev > 94.">ldevala>, 0);mc53c94.c#L1" id="L1" class="line" 448ame="L1448>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma > 94.">dmaala> = (structdrivers/scscode=dbdma_regs > 94.">dbdma_regsala> rivers/scscode=__iomem > 94.">__iomemala> *)mc53c94.c#L1" id="L1" class="line" 449ame="L1449>
rivers/scscode=ioremap/s > 94.">ioremapala>(rivers/scscode=masio_resource_start > 94.">lasio_resource_startala>(rivers/scscode=mdev > 94.">ldevala>, 1), 0x1000);mc53c94.c#L1" id="L1" class="line" 450ame="L1450>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dmaintr/s > 94.">dmaintrala> = rivers/scscode=lasio_irq/s > 94.">lasio_irqala>(rivers/scscode=mdev > 94.">ldevala>, 1);mc53c94.c#L1" id="L1" class="line" 45name="L145">
if (rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=regs > 94.">regsala> == rivers/scscode=NULL/s > 94.">NULLala> || rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma > 94.">dmaala> == rivers/scscode=NULL/s > 94.">NULLala>) {mc53c94.c#L1" id="L1" class="line" 452ame="L1452>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_ERR;" > 94.">KERN_ERRala> r pquot;lass="li: ioremap failed for %s\n"c nodeala>-pan rivers/scscode=full_v 1 > 94.">full_v 1 ala>);mc53c94.c#L1" id="L1" class="line" 454ame="L1454>
gotodrivers/scscode=out_free > 94.">out_freeala>;mc53c94.c#L1" id="L1" class="line" 455ame="L1455>
}mc53c94.c#L1" id="L1" class="line" 456ame="L1456>
mc53c94.c#L1" id="L1" class="line" 457ame="L1457>
rivers/scscode=clkprop/s > 94.">clkpropala> = rivers/scscode=of_get_property > 94.">of_get_propertyala>(rivers/scscode=node > 94.">nodeala>, r pquot;clock-frequency"c 94.">prople ala>);mc53c94.c#L1" id="L1" class="line" 458ame="L1458>
if (rivers/scscode=clkprop/s > 94.">clkpropala> == rivers/scscode=NULL/s > 94.">NULLala> || rivers/scscode=prople /s > 94.">prople ala> != sizeof(int)) {mc53c94.c#L1" id="L1" class="line" 459ame="L1459>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_ERR;" > 94.">KERN_ERRala> r pquot;%s: ca3't get clock frequency, "c pquot;refum g 25MHz\n"c 94.">nodeala>-pan rivers/scscode=full_v 1 > 94.">full_v 1 ala>);mc53c94.c#L1" id="L1" class="line" 46name="L146">
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=clk_freq/s > 94.">9lk_freqala> = 25000000;mc53c94.c#L1" id="L1" class="line" 462ame="L1462>
} elsemc53c94.c#L1" id="L1" class="line" 463ame="L1463>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=clk_freq/s > 94.">9lk_freqala> = *(int *)rivers/scscode=clkprop/s > 94.">clkpropala>;mc53c94.c#L1" id="L1" class="line" 464ame="L1464>
mc53c94.c#L1" id="L1" class="line" 465ame="L1465>
r dma_cmd_ = rivers/scscode=kmalloc > 94.">kmallocala>((rivers/scscode=hose > 94.">hoseala>-pan rivers/scscode=sg_tablesize > 94.">sg_tablesizeala> + 2) *mc53c94.c#L1" id="L1" class="line" 470ame="L1470>
sizeof(structdrivers/scscode=dbdma_cmd > 94.">dbdma_cmdala>), rivers/scscode=GFP_KERNEL/s > 94.">GFP_KERNELala>);mc53c94.c#L1" id="L1" class="line" 47name="L147">
if (rivers/scscode=dma_cmd_ 94.">dma_cmd_ == 0) {mc53c94.c#L1" id="L1" class="line" 472ame="L1472>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_ERR;" > 94.">KERN_ERRala> r pquot;lass="li: could3't allocate dma "c pquot;cemmand s 94.">nodeala>-pan rivers/scscode=full_v 1 > 94.">full_v 1 ala>);mc53c94.c#L1" id="L1" class="line" 474ame="L1474>
rivers/scscode=rc > 94.">rcala> = -rivers/scscode=ENOMEM;" > 94.">ENOMEMala>;mc53c94.c#L1" id="L1" class="line" 475ame="L1475>
gotodrivers/scscode=out_free > 94.">out_freeala>;mc53c94.c#L1" id="L1" class="line" 476ame="L1476>
}mc53c94.c#L1" id="L1" class="line" 477ame="L1477>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma_cmds > 94.">dma_cmdsala> = (structdrivers/scscode=dbdma_cmd > 94.">dbdma_cmdala> *)rivers/scscode=DBDMA_ALIGN/s > 94.">DBDMA_ALIGNala>(rivers/scscode=dma_cmd_ 94.">dma_cmd_ );mc53c94.c#L1" id="L1" class="line" 478ame="L1478>
rivers/scscode=memset > 94.">lemsetala>(rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma_cmds > 94.">dma_cmdsala>, 0, (rivers/scscode=hose > 94.">hoseala>-pan rivers/scscode=sg_tablesize > 94.">sg_tablesizeala> + 1)mc53c94.c#L1" id="L1" class="line" 479ame="L1479>
* sizeof(structdrivers/scscode=dbdma_cmd > 94.">dbdma_cmdala>));mc53c94.c#L1" id="L1" class="line" 480ame="L1480>
rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma_cmd_ 94.">dma_cmd_ = rivers/scscode=dma_cmd_ 94.">dma_cmd_ ;mc53c94.c#L1" id="L1" class="line" 48name="L148">
mc53c94.c#L1" id="L1" class="line" 482ame="L1482>
rivers/scscode=lass="li_init > 94.">lass="li_initala>(rivers/scscode= tate > 94.">stateala>);mc53c94.c#L1" id="L1" class="line" 483ame="L1483>
mc53c94.c#L1" id="L1" class="line" 484ame="L1484>
if (rivers/scscode=request_irq/s > 94.">request_irqala>(rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=intr/s > 94.">intrala>, rivers/scscode=do_lass="li_interrupe > 94.">do_lass="li_interrupeala>, 0, r pquot;s=Cli"c 94.">stateala>)) {mc53c94.c#L1" id="L1" class="line" 485ame="L1485>
rivers/scscode=printk;" > 94.">printkala>(rivers/scscode=KERN_ERR;" > 94.">KERN_ERRala> r pquot;lass=Cli: ca3't get irq %d for %s\n"c stateala>-pan rivers/scscode=intr/s > 94.">intrala>, rivers/scscode=node > 94.">nodeala>-pan rivers/scscode=full_v 1 > 94.">full_v 1 ala>);mc53c94.c#L1" id="L1" class="line" 487ame="L1487>
gotodrivers/scscode=out_free_dma > 94.">out_free_dmaala>;mc53c94.c#L1" id="L1" class="line" 488ame="L1488>
}mc53c94.c#L1" id="L1" class="line" 489ame="L1489>
mc53c94.c#L1" id="L1" class="line" 490ame="L1490>
rivers/scscode=rc > 94.">rcala> = rivers/scscode= 1" _add_hose > 94."> 1" _add_hoseala>(rivers/scscode=hose > 94.">hoseala>, & rivers/scscode=mdev > 94.">ldevala>-pan rivers/scscode=ofdev > 94.">ofdevala>.rivers/scscode=dev > 94.">devala>);mc53c94.c#L1" id="L1" class="line" 49name="L149">
if (rivers/scscode=rc > 94.">rcala> != 0)mc53c94.c#L1" id="L1" class="line" 492ame="L1492>
gotodrivers/scscode=out_release_irq/s > 94.">out_release_irqala>;mc53c94.c#L1" id="L1" class="line" 493ame="L1493>
mc53c94.c#L1" id="L1" class="line" 494ame="L1494>
rivers/scscode= 1" _s9an_hose > 94."> 1" _s9an_hoseala>(rivers/scscode=hose > 94.">hoseala>);mc53c94.c#L1" id="L1" class="line" 495ame="L1495>
type=" 0;mc53c94.c#L1" id="L1" class="line" 496ame="L1496>
mc53c94.c#L1" id="L1" class="line" 497ame="L1497>
drivers/scscode=out_release_irq/s > 94.">out_release_irqala>:mc53c94.c#L1" id="L1" class="line" 498ame="L1498>
rivers/scscode=free_irq/s > 94.">free_irqala>(rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=intr/s > 94.">intrala>, rivers/scscode= tate > 94.">stateala>);mc53c94.c#L1" id="L1" class="line" 499ame="L1499>
rivers/scscode=out_free_dma > 94.">out_free_dmaala>:mc53c94.c#L1" id="L1" class="line" 500ame="L1500>
rivers/scscode=kfree > 94.">kfreeala>(rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma_cmd_ 94.">dma_cmd_ );mc53c94.c#L1" id="L1" class="line" 501ame="L150">
rivers/scscode=out_free > 94.">out_freeala>:mc53c94.c#L1" id="L1" class="line" 502ame="L1502>
if (rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma > 94.">dmaala> != rivers/scscode=NULL/s > 94.">NULLala>)mc53c94.c#L1" id="L1" class="line" 503ame="L1503>
rivers/scscode=iounmap/s > 94.">iounmapala>(rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=dma > 94.">dmaala>);mc53c94.c#L1" id="L1" class="line" 504ame="L1504>
if (rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=regs > 94.">regsala> != rivers/scscode=NULL/s > 94.">NULLala>)mc53c94.c#L1" id="L1" class="line" 505ame="L1505>
r_505ala> rivers/scscode=iounmap/s > 94.">iounmapala>(rivers/scscode= tate > 94.">stateala>-pan rivers/scscode=regs > 94.">regsala>);mc53c94.c#L1" id="L1" class="line" 506ame="L1506>
r_506ala> rivers/scscode= 1" _host_pue > 94."> 1" _host_pueala>(rivers/scscode=hose > 94.">hoseala>);mc53c94.c#L1" id="L1" class="line" 507ame="L1507>
r_507ala>drivers/scscode=out_release/s > 94.">out_releaseala>:mc53c94.c#L1" id="L1" class="line" 508ame="L1508>
r_508ala> rivers/scscode=masio_release_resources > 94.">lasio_release_resourcesala>(rivers/scscode=mdev > 94.">ldevala>);mc53c94.c#L1" id="L1" class="line" 509ame="L1509>
r_509ala>mc53c94.c#L1" id="L1" class="line" 510ame="L15"0>
type=" rivers/scscode=rc > 94.">rcala>;mc53c94.c#L1" id="L1" class="line" 511ame="L15"">
}mc53c94.c#L1" id="L1" class="line" 512ame="L1512>
mc53c94.c#L1" id="L1" class="line" 513ame="L1513>
st"> int rivers/scscode=lass="li_remove/s > 94.">lass="li_removeala>(structdrivers/scscode=lasio_dev > 94.">lasio_devala> *rivers/scscode=mdev > 94.">ldevala>)mc53c94.c#L1" id="L1" class="line" 514ame="L1514>
{mc53c94.c#L1" id="L1" class="line" 515ame="L1515>
structdrivers/scscode=fsc_state > 94.">fsc_stateala> *rivers/scscode=fp/s > 94.">fpala> = (structdrivers/scscode=fsc_state > 94.">fsc_stateala> *)rivers/scscode=lasio_get_drvdata > 94.">lasio_get_drvdataala>(rivers/scscode=mdev > 94.">ldevala>);mc53c94.c#L1" id="L1" class="line" 516ame="L1516>
structdrivers/scscode=S1" _Hose > 94.">S1" _Hoseala> *rivers/scscode=hose > 94.">hoseala> = rivers/scscode=fp/s > 94.">fpala>-pan rivers/scscode=hose > 94.">hoseala>;mc53c94.c#L1" id="L1" class="line" 517ame="L1517>
mc53c94.c#L1" id="L1" class="line" 518ame="L1518>
rivers/scscode= 1" _remove_hose > 94."> 1" _remove_hoseala>(rivers/scscode=hose > 94.">hoseala>);mc53c94.c#L1" id="L1" class="line" 519ame="L1519>
mc53c94.c#L1" id="L1" class="line" 520ame="L1520>
rivers/scscode=free_irq/s > 94.">free_irqala>(rivers/scscode=fp/s > 94.">fpala>-pan rivers/scscode=intr/s > 94.">intrala>, rivers/scscode=fp/s > 94.">fpala>);mc53c94.c#L1" id="L1" class="line" 52name="L152">
mc53c94.c#L1" id="L1" class="line" 522ame="L1522>
if (rivers/scscode=fp/s > 94.">fpala>-pan rivers/scscode=regs > 94.">regsala>)mc53c94.c#L1" id="L1" class="line" 523ame="L1523>
rivers/scscode=iounmap/s > 94.">iounmapala>(rivers/scscode=fp/s > 94.">fpala>-pan rivers/scscode=regs > 94.">regsala>);mc53c94.c#L1" id="L1" class="line" 524ame="L1524>
if (rivers/scscode=fp/s > 94.">fpala>-pan rivers/scscode=dma > 94.">dmaala>)mc53c94.c#L1" id="L1" class="line" 525ame="L1525>
rivers/scscode=iounmap/s > 94.">iounmapala>(rivers/scscode=fp/s > 94.">fpala>-pan rivers/scscode=dma > 94.">dmaala>);mc53c94.c#L1" id="L1" class="line" 526ame="L1526>
rivers/scscode=kfree > 94.">kfreeala>(rivers/scscode=fp/s > 94.">fpala>-pan rivers/scscode=dma_cmd_ 94.">dma_cmd_ );mc53c94.c#L1" id="L1" class="line" 527ame="L1527>
mc53c94.c#L1" id="L1" class="line" 528ame="L1528>
rivers/scscode= 1" _host_pue > 94."> 1" _host_pueala>(rivers/scscode=hose > 94.">hoseala>);mc53c94.c#L1" id="L1" class="line" 529ame="L1529>
mc53c94.c#L1" id="L1" class="line" 530ame="L1530>
rivers/scscode=lasio_release_resources > 94.">lasio_release_resourcesala>(rivers/scscode=mdev > 94.">ldevala>);mc53c94.c#L1" id="L1" class="line" 53name="L153">
mc53c94.c#L1" id="L1" class="line" 532ame="L1532>
type=" 0;mc53c94.c#L1" id="L1" class="line" 533ame="L1533>
}mc53c94.c#L1" id="L1" class="line" 534ame="L1534>
mc53c94.c#L1" id="L1" class="line" 535ame="L1535>
mc53c94.c#L1" id="L1" class="line" 536ame="L1536>
st"> structdrivers/scscode=of_device_id/s > 94.">of_device_idala> rivers/scscode=lass="li_match > 94.">lass="li_matchala>[] = mc53c94.c#L1" id="L1" class="line" 537ame="L1537>
{mc53c94.c#L1" id="L1" class="line" 538ame="L1538>
{mc53c94.c#L1" id="L1" class="line" 539ame="L1539>
.rivers/scscode=v 1 > 94.">v 1 ala> = r pquot;s="li"c
{},mc53c94.c#L1" id="L1" class="line" 542ame="L1542>
};mc53c94.c#L1" id="L1" class="line" 543ame="L1543>
rivers/scscode=MODULE_DEVICE_TABLE > 94.">MODULE_DEVICE_TABLEala> (rivers/scscode=of/s > 94.">ofala>, rivers/scscode=lass="li_match > 94.">lass="li_matchala>);mc53c94.c#L1" id="L1" class="line" 544ame="L1544>
mc53c94.c#L1" id="L1" class="line" 545ame="L1545>
st"> structdrivers/scscode=lasio_d1" id > 94.">lasio_d1" idala> rivers/scscode=lass="li_d1" id > 94.">lass="li_d1" idala> = mc53c94.c#L1" id="L1" class="line" 546ame="L1546>
{mc53c94.c#L1" id="L1" class="line" 547ame="L1547>
.rivers/scscode=d1" id > 94.">d1" idala> = {mc53c94.c#L1" id="L1" class="line" 548ame="L1548>
.rivers/scscode=v 1 > 94.">v 1 ala> = r pquot;lass="li"c ownidala> = rivers/scscode=THIS_MODULE > 94.">THIS_MODULEala>,mc53c94.c#L1" id="L1" class="line" 550ame="L1550>
.rivers/scscode=of_match_table/s > 94.">of_match_tableala> = rivers/scscode=lass="li_match > 94.">lass="li_matchala>,mc53c94.c#L1" id="L1" class="line" 55name="L155">
},mc53c94.c#L1" id="L1" class="line" 552ame="L1552>
.rivers/scscode=probe > 94.">probeala> = rivers/scscode=lass="li_probe > 94.">lass="li_probeala>,mc53c94.c#L1" id="L1" class="line" 553ame="L1553>
.rivers/scscode=remove/s > 94.">removeala> = rivers/scscode=lass="li_remove/s > 94.">lass="li_removeala>,mc53c94.c#L1" id="L1" class="line" 554ame="L1554>
};mc53c94.c#L1" id="L1" class="line" 555ame="L1555>
mc53c94.c#L1" id="L1" class="line" 556ame="L1556>
mc53c94.c#L1" id="L1" class="line" 557ame="L1557>
st"> int rivers/scscode=__init > 94.">__initala> rivers/scscode=init_lass="li/s > 94.">init_lass="liala>(void)mc53c94.c#L1" id="L1" class="line" 558ame="L1558>
{mc53c94.c#L1" id="L1" class="line" 559ame="L1559>
type=" rivers/scscode=lasio_register_d1" id > 94.">lasio_register_d1" idala>(& rivers/scscode=lass="li_d1" id > 94.">lass="li_d1" idala>);mc53c94.c#L1" id="L1" class="line" 560ame="L1560>
}mc53c94.c#L1" id="L1" class="line" 56name="L156">
mc53c94.c#L1" id="L1" class="line" 562ame="L1562>
st"> void rivers/scscode=__exit > 94.">__exitala> rivers/scscode=exit_lass="li/s > 94.">exit_lass="liala>(void)mc53c94.c#L1" id="L1" class="line" 563ame="L1563>
{mc53c94.c#L1" id="L1" class="line" 564ame="L1564>
type=" rivers/scscode=lasio_unregister_d1" id > 94.">lasio_unregister_d1" idala>(& rivers/scscode=lass="li_d1" id > 94.">lass="li_d1" idala>);mc53c94.c#L1" id="L1" class="line" 565ame="L1565>
}mc53c94.c#L1" id="L1" class="line" 566ame="L1566>
mc53c94.c#L1" id="L1" class="line" 567ame="L1567>
rivers/scscode=lodule_init > 94.">lodule_initala>(rivers/scscode=init_lass="li/s > 94.">init_lass="liala>);mc53c94.c#L1" id="L1" class="line" 568ame="L1568>
rivers/scscode=lodule_exit > 94.">lodule_exitala>(rivers/scscode=exit_lass="li/s > 94.">exit_lass="liala>);mc53c94.c#L1" id="L1" class="line" 569ame="L1569>
mc53c94.c#L1" id="L1" class="line" 570ame="L1570>
rivers/scscode=MODULE_DESCRIPTION/s > 94.">MODULE_DESCRIPTIONala>(r pquot;PowerMac s="li SCSI L1" id"c
rivers/scscode=MODULE_AUTHOR;" > 94.">MODULE_AUTHORala>(r pquot;Paul Mackerras <paulus@samba.orgpan "c MODULE_LICENSEala>(r pquot;GPL"c The original LXR software by the c53c94.c#http://sourceforge.net/projects/lxr">LXR cemmunityala>, e="h experimtenal id=ion by c53c94.c#mailto:lxr@> ux.no">lxr@> ux.noala>.
lxr.> ux.no kindly hoseed by c53c94.c#http://www.redpill-> pro.no">Redpill L pro ASala>, provider of L ux censult g and oper"&gens services since 1995.