linux/drivers/pinctrl/pinctrl-falcon.c
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.4" /spatio /formio a .4" href="../linux+v3.8.6/drivers/pinctrl/pinctrl-falcon.c">.4" img src="../.static/gfx/right.png" alt=">>">.4 /spatio.4 spat class="lxr_search">.4" .4" input typaluhidden" namalunavtarget" on valu">.4" input typalutext" namalusearch" idlusearch">.4" buttptitypalusubmit">Search.4" Prefso /a>.4 /spatio" /divio" form ac/opt="ajax+*" method="post" onsubmit="return false;">.4 input typaluhidden" namaluajax_lookup" idluajax_lookup" on valu">." /formio." div class="headingbottpm">o div idlufile_contents"i
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/a>
spat class="comment">/*
/spatio   2
/a>
spat class="comment"> *  linux/drivers/pinctrl/pinmux-falcon.c
/spatio   3
/a>
spat class="comment"> *  based on linux/drivers/pinctrl/pinmux-pxa910.c
/spatio   4
/a>
spat class="comment"> *
/spatio   5
/a>
spat class="comment"> *  This program is free software; you cat redistribute it and/or modify it
/spatio   6
/a>
spat class="comment"> *  under the terms of the GNU General Public License versopti2 as published
/spatio   7
/a>
spat class="comment"> *  by the Free Software Founda/opt.
/spatio   8
/a>
spat class="comment"> *
/spatio   9
/a>
spat class="comment"> *  Copyright (C) 2012 Thomas Langer <thomas.langer@lantiq.com>
/spatio  .8.1a>
spat class="comment"> *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
/spatio  11
/a>
spat class="comment"> */
/spatio  12
/a>o  13
/a>#include <linux/gpio.h
/a>>o  14
/a>#include <linux/interrupt.h
/a>>o  15
/a>#include <linux/slab.h
/a>>o  16
/a>#include <linux/export.h
/a>>o  17
/a>#include <linux/err.h
/a>>o  18
/a>#include <linux/module.h
/a>>o  19
/a>#include <linux/of.h
/a>>o  20
/a>#include <linux/of_platform.h
/a>>o  21
/a>#include <linux/of_address.h
/a>>o  22
/a>#include <linux/of_gpio.h
/a>>o  23
/a>#include <linux/platform_device.h
/a>>o  24
/a>o  25
/a>#include "pinctrl-lantiq.h
/a>"o  26
/a>o  27
/a>#include <lantiq_soc.h
/a>>o  28
/a>o  29
/a>
spat class="comment">/* Multiplexer Control Register */
/spatio  30
/a>#define 
a href="+code=LTQ_PADC_MUX" class="sref">LTQ_PADC_MUX
/a>(
a href="+code=x" class="sref">x
/a>)         (
a href="+code=x" class="sref">x
/a> * 0x4)o  31
/a>
spat class="comment">/* Pull Up Enable Register */
/spatio  32
/a>#define 
a href="+code=LTQ_PADC_PUEN" class="sref">LTQ_PADC_PUEN
/a>           0x80o  33
/a>
spat class="comment">/* Pull Down Enable Register */
/spatio  34
/a>#define 
a href="+code=LTQ_PADC_PDEN" class="sref">LTQ_PADC_PDEN
/a>           0x84o  35
/a>
spat class="comment">/* Slew Rate Control Register */
/spatio  36
/a>#define 
a href="+code=LTQ_PADC_SRC" class="sref">LTQ_PADC_SRC
/a>            0x88o  37
/a>
spat class="comment">/* Drive Current Control Register */
/spatio  38
/a>#define 
a href="+code=LTQ_PADC_DCC" class="sref">LTQ_PADC_DCC
/a>            0x8Co  39
/a>
spat class="comment">/* Pad Control Availability Register */
/spatio  40
/a>#define 
a href="+code=LTQ_PADC_AVAIL" class="sref">LTQ_PADC_AVAIL
/a>          0xF0o  41
/a>o  42
/a>#define 
a href="+code=pad_r32" class="sref">pad_r32
/a>(
a href="+code=p" class="sref">p
/a>, 
a href="+code=reg" class="sref">reg
/a>)         
a href="+code=ltq_r32" class="sref">ltq_r32
/a>(
a href="+code=p" class="sref">p
/a> + 
a href="+code=reg" class="sref">reg
/a>)o  43
/a>#define 
a href="+code=pad_w32" class="sref">pad_w32
/a>(
a href="+code=p" class="sref">p
/a>, 
a href="+code=val" class="sref">val
/a>, 
a href="+code=reg" class="sref">reg
/a>)    
a href="+code=ltq_w32" class="sref">ltq_w32
/a>(
a href="+code=val" class="sref">val
/a>, 
a href="+code=p" class="sref">p
/a> + 
a href="+code=reg" class="sref">reg
/a>)o  44
/a>#define 
a href="+code=pad_w32_mask" class="sref">pad_w32_mask
/a>(
a href="+code=c" class="sref">c
/a>, 
a href="+code=clear" class="sref">clear
/a>, 
a href="+code=set" class="sref">set
/a>, 
a href="+code=reg" class="sref">reg
/a>) \o  45
/a>                
a href="+code=pad_w32" class="sref">pad_w32
/a>(
a href="+code=c" class="sref">c
/a>, (
a href="+code=pad_r32" class="sref">pad_r32
/a>(
a href="+code=c" class="sref">c
/a>, 
a href="+code=reg" class="sref">reg
/a>) & ~(
a href="+code=clear" class="sref">clear
/a>)) | (
a href="+code=set" class="sref">set
/a>), 
a href="+code=reg" class="sref">reg
/a>)o  46
/a>o  47
/a>#define 
a href="+code=pad_getbit" class="sref">pad_getbit
/a>(
a href="+code=m" class="sref">m
/a>, 
a href="+code=r" class="sref">r
/a>, 
a href="+code=p" class="sref">p
/a>)     (!!(
a href="+code=ltq_r32" class="sref">ltq_r32
/a>(
a href="+code=m" class="sref">m
/a> + 
a href="+code=r" class="sref">r
/a>) & (1 << 
a href="+code=p" class="sref">p
/a>)))o  48
/a>o  49
/a>#define 
a href="+code=PORTS" class="sref">PORTS
/a>                   5o  50
/a>#define 
a href="+code=PINS" class="sref">PINS
/a>                    32o  51
/a>#define 
a href="+code=PORT" class="sref">PORT
/a>(
a href="+code=x" class="sref">x
/a>)                 (
a href="+code=x" class="sref">x
/a> / 
a href="+code=PINS" class="sref">PINS
/a>)o  52
/a>#define 
a href="+code=PORT_PIN" class="sref">PORT_PIN
/a>(
a href="+code=x" class="sref">x
/a>)             (
a href="+code=x" class="sref">x
/a> % 
a href="+code=PINS" class="sref">PINS
/a>)o  53
/a>o  54
/a>#define 
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=a" class="sref">a
/a>, 
a href="+code=f0" class="sref">f0
/a>, 
a href="+code=f1" class="sref">f1
/a>, 
a href="+code=f2" class="sref">f2
/a>, 
a href="+code=f3" class="sref">f3
/a>)           \o  55
/a>{                                               \o  56
/a>        .
a href="+code=nama" class="sref">nama
/a> = #a,                             \o  57
/a>        .
a href="+code=pin" class="sref">pin
/a> = 
a href="+code=a" class="sref">a
/a>,                               \o  58
/a>        .
a href="+code=func" class="sref">func
/a> = {                               \o  59
/a>                
a href="+code=FALCON_MUX_" class="sref">FALCON_MUX_
/a>##f0,                \o  60
/a>                
a href="+code=FALCON_MUX_" class="sref">FALCON_MUX_
/a>##f1,                \o  61
/a>                
a href="+code=FALCON_MUX_" class="sref">FALCON_MUX_
/a>##f2,                \o  62
/a>                
a href="+code=FALCON_MUX_" class="sref">FALCON_MUX_
/a>##f3,                \o  63
/a>        },                                      \o  64
/a>}o  65
/a>o  66
/a>#define 
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
a href="+code=a" class="sref">a
/a>, 
a href="+code=m" class="sref">m
/a>, 
a href="+code=p" class="sref">p
/a>)        \o  67
/a>{                               \o  68
/a>        .
a href="+code=nama" class="sref">nama
/a> = 
a href="+code=a" class="sref">a
/a>,              \o  69
/a>        .
a href="+code=mux" class="sref">mux
/a> = 
a href="+code=FALCON_MUX_" class="sref">FALCON_MUX_
/a>##m,  \o  70
/a>        .
a href="+code=pins" class="sref">pins
/a> = 
a href="+code=p" class="sref">p
/a>,              \o  71
/a>        .
a href="+code=npins" class="sref">npins
/a> = 
a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE
/a>(
a href="+code=p" class="sref">p
/a>), \o  72
/a>}o  73
/a>o  74
/a>enum 
a href="+code=falcon_mux" class="sref">falcon_mux
/a> {o  75
/a>        
a href="+code=FALCON_MUX_GPIO" class="sref">FALCON_MUX_GPIO
/a> = 0,o  76
/a>        
a href="+code=FALCON_MUX_RST" class="sref">FALCON_MUX_RST
/a>,o  77
/a>        
a href="+code=FALCON_MUX_NTR" class="sref">FALCON_MUX_NTR
/a>,o  78
/a>        
a href="+code=FALCON_MUX_MDIO" class="sref">FALCON_MUX_MDIO
/a>,o  79
/a>        
a href="+code=FALCON_MUX_LED" class="sref">FALCON_MUX_LED
/a>,o  80
/a>        
a href="+code=FALCON_MUX_SPI" class="sref">FALCON_MUX_SPI
/a>,o  81
/a>        
a href="+code=FALCON_MUX_ASC" class="sref">FALCON_MUX_ASC
/a>,o  82
/a>        
a href="+code=FALCON_MUX_I2C" class="sref">FALCON_MUX_I2C
/a>,o  83
/a>        
a href="+code=FALCON_MUX_HOSTIF" class="sref">FALCON_MUX_HOSTIF
/a>,o  84
/a>        
a href="+code=FALCON_MUX_SLIC" class="sref">FALCON_MUX_SLIC
/a>,o  85
/a>        
a href="+code=FALCON_MUX_JTAG" class="sref">FALCON_MUX_JTAG
/a>,o  86
/a>        
a href="+code=FALCON_MUX_PCM" class="sref">FALCON_MUX_PCM
/a>,o  87
/a>        
a href="+code=FALCON_MUX_MII" class="sref">FALCON_MUX_MII
/a>,o  88
/a>        
a href="+code=FALCON_MUX_PHY" class="sref">FALCON_MUX_PHY
/a>,o  89
/a>        
a href="+code=FALCON_MUX_NONE" class="sref">FALCON_MUX_NONE
/a> = 0xffff,o  90
/a>};o  91
/a>o  92
/a>static struct 
a href="+code=pinctrl_pin_desc" class="sref">pinctrl_pin_desc
/a> 
a href="+code=falcon_pads" class="sref">falcon_pads
/a>[
a href="+code=PORTS" class="sref">PORTS
/a> * 
a href="+code=PINS" class="sref">PINS
/a>];o  93
/a>static int 
a href="+code=pad_count" class="sref">pad_count
/a>[
a href="+code=PORTS" class="sref">PORTS
/a>];o  94
/a>o  95
/a>static void 
a href="+code=lantiq_load_pin_desc" class="sref">lantiq_load_pin_desc
/a>(struct 
a href="+code=pinctrl_pin_desc" class="sref">pinctrl_pin_desc
/a> *
a href="+code=d" class="sref">d
/a>, int 
a href="+code=bank" class="sref">bank
/a>, int 
a href="+code=len" class="sref">len
/a>)o  96
/a>{o  97
/a>        int 
a href="+code=basa" class="sref">basa
/a> = 
a href="+code=bank" class="sref">bank
/a> * 
a href="+code=PINS" class="sref">PINS
/a>;o  98
/a>        int 
a href="+code=i" class="sref">i
/a>;o  99
/a>o 100
/a>        for (
a href="+code=i" class="sref">i
/a> = 0; 
a href="+code=i" class="sref">i
/a> < 
a href="+code=len" class="sref">len
/a>; 
a href="+code=i" class="sref">i
/a>++) {o 101
/a>                
spat class="comment">/* strlen("ioXYZ") + 1 = 6 */
/spatio 102
/a>                char *
a href="+code=nama" class="sref">nama
/a> = 
a href="+code=kzalloc" class="sref">kzalloc
/a>(6, 
a href="+code=GFP_KERNEL" class="sref">GFP_KERNEL
/a>);o 103
/a>                
a href="+code=snprintf" class="sref">snprintf
/a>(
a href="+code=nama" class="sref">nama
/a>, 6, 
spat class="string">"io%d"basa
/a> + 
a href="+code=i" class="sref">i
/a>);o 104
/a>                
a href="+code=d" class="sref">d
/a>[
a href="+code=i" class="sref">i
/a>].
a href="+code=number" class="sref">number
/a> = 
a href="+code=basa" class="sref">basa
/a> + 
a href="+code=i" class="sref">i
/a>;o 105
/a>                
a href="+code=d" class="sref">d
/a>[
a href="+code=i" class="sref">i
/a>].
a href="+code=nama" class="sref">nama
/a> = 
a href="+code=nama" class="sref">nama
/a>;o 106
/a>        }o 107
/a>        
a href="+code=pad_count" class="sref">pad_count
/a>[
a href="+code=bank" class="sref">bank
/a>] = 
a href="+code=len" class="sref">len
/a>;o 108
/a>}o 109
/a>o 1.8.1a>static struct 
a href="+code=ltq_mfp_pin" class="sref">ltq_mfp_pin
/a> 
a href="+code=falcon_mfp" class="sref">falcon_mfp
/a>[] = {o 111
/a>        
spat class="comment">/*      pin             f0      f1      f2      f3 */
/spatio 112
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO0" class="sref">GPIO0
/a>,       
a href="+code=RST" class="sref">RST
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 113
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO1" class="sref">GPIO1
/a>,       
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 114
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO2" class="sref">GPIO2
/a>,       
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 115
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO3" class="sref">GPIO3
/a>,       
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 116
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO4" class="sref">GPIO4
/a>,       
a href="+code=NTR" class="sref">NTR
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 117
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO5" class="sref">GPIO5
/a>,       
a href="+code=NTR" class="sref">NTR
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 118
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO6" class="sref">GPIO6
/a>,       
a href="+code=RST" class="sref">RST
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 119
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO7" class="sref">GPIO7
/a>,       
a href="+code=MDIO" class="sref">MDIO
/a>,   
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 120
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO8" class="sref">GPIO8
/a>,       
a href="+code=MDIO" class="sref">MDIO
/a>,   
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 121
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO9" class="sref">GPIO9
/a>,       
a href="+code=LED" class="sref">LED
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 122
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO10" class="sref">GPIO10
/a>,      
a href="+code=LED" class="sref">LED
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 123
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO11" class="sref">GPIO11
/a>,      
a href="+code=LED" class="sref">LED
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 124
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO12" class="sref">GPIO12
/a>,      
a href="+code=LED" class="sref">LED
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 125
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO13" class="sref">GPIO13
/a>,      
a href="+code=LED" class="sref">LED
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 126
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO14" class="sref">GPIO14
/a>,      
a href="+code=LED" class="sref">LED
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 127
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO32" class="sref">GPIO32
/a>,      
a href="+code=ASC" class="sref">ASC
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 128
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO33" class="sref">GPIO33
/a>,      
a href="+code=ASC" class="sref">ASC
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 129
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO34" class="sref">GPIO34
/a>,      
a href="+code=SPI" class="sref">SPI
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 130
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO35" class="sref">GPIO35
/a>,      
a href="+code=SPI" class="sref">SPI
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 131
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO36" class="sref">GPIO36
/a>,      
a href="+code=SPI" class="sref">SPI
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 132
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO37" class="sref">GPIO37
/a>,      
a href="+code=SPI" class="sref">SPI
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 133
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO38" class="sref">GPIO38
/a>,      
a href="+code=SPI" class="sref">SPI
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 134
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO39" class="sref">GPIO39
/a>,      
a href="+code=I2C" class="sref">I2C
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 135
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO40" class="sref">GPIO40
/a>,      
a href="+code=I2C" class="sref">I2C
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 136
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO41" class="sref">GPIO41
/a>,      
a href="+code=HOSTIF" class="sref">HOSTIF
/a>, 
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=HOSTIF" class="sref">HOSTIF
/a>, 
a href="+code=JTAG" class="sref">JTAG
/a>),o 137
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO42" class="sref">GPIO42
/a>,      
a href="+code=HOSTIF" class="sref">HOSTIF
/a>, 
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=HOSTIF" class="sref">HOSTIF
/a>, 
a href="+code=NONE" class="sref">NONE
/a>),o 138
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO43" class="sref">GPIO43
/a>,      
a href="+code=SLIC" class="sref">SLIC
/a>,   
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 139
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO44" class="sref">GPIO44
/a>,      
a href="+code=SLIC" class="sref">SLIC
/a>,   
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=PCM" class="sref">PCM
/a>,    
a href="+code=ASC" class="sref">ASC
/a>),o 140
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO45" class="sref">GPIO45
/a>,      
a href="+code=SLIC" class="sref">SLIC
/a>,   
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=PCM" class="sref">PCM
/a>,    
a href="+code=ASC" class="sref">ASC
/a>),o 141
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO64" class="sref">GPIO64
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 142
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO65" class="sref">GPIO65
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 143
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO66" class="sref">GPIO66
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 144
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO67" class="sref">GPIO67
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 145
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO68" class="sref">GPIO68
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 146
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO69" class="sref">GPIO69
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 147
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO70" class="sref">GPIO70
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 148
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO71" class="sref">GPIO71
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 149
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO72" class="sref">GPIO72
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 150
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO73" class="sref">GPIO73
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 151
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO74" class="sref">GPIO74
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 152
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO75" class="sref">GPIO75
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 153
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO76" class="sref">GPIO76
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 154
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO77" class="sref">GPIO77
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 155
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO78" class="sref">GPIO78
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 156
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO79" class="sref">GPIO79
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 157
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO80" class="sref">GPIO80
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 158
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO81" class="sref">GPIO81
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 159
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO82" class="sref">GPIO82
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 160
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO83" class="sref">GPIO83
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 161
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO84" class="sref">GPIO84
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 162
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO85" class="sref">GPIO85
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 163
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO86" class="sref">GPIO86
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 164
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO87" class="sref">GPIO87
/a>,      
a href="+code=MII" class="sref">MII
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 165
/a>        
a href="+code=MFP_FALCON" class="sref">MFP_FALCON
/a>(
a href="+code=GPIO88" class="sref">GPIO88
/a>,      
a href="+code=PHY" class="sref">PHY
/a>,    
a href="+code=GPIO" class="sref">GPIO
/a>,   
a href="+code=NONE" class="sref">NONE
/a>,   
a href="+code=NONE" class="sref">NONE
/a>),o 166
/a>};o 167
/a>o 168
/a>static const unsigned 
a href="+code=pins_por" class="sref">pins_por
/a>[] = {
a href="+code=GPIO0" class="sref">GPIO0
/a>};o 169
/a>static const unsigned 
a href="+code=pins_ntr" class="sref">pins_ntr
/a>[] = {
a href="+code=GPIO4" class="sref">GPIO4
/a>};o 170
/a>static const unsigned 
a href="+code=pins_ntr8k" class="sref">pins_ntr8k
/a>[] = {
a href="+code=GPIO5" class="sref">GPIO5
/a>};o 171
/a>static const unsigned 
a href="+code=pins_hrst" class="sref">pins_hrst
/a>[] = {
a href="+code=GPIO6" class="sref">GPIO6
/a>};o 172
/a>static const unsigned 
a href="+code=pins_mdio" class="sref">pins_mdio
/a>[] = {
a href="+code=GPIO7" class="sref">GPIO7
/a>, 
a href="+code=GPIO8" class="sref">GPIO8
/a>};o 173
/a>static const unsigned 
a href="+code=pins_bled" class="sref">pins_bled
/a>[] = {
a href="+code=GPIO7" class="sref">GPIO7
/a>, 
a href="+code=GPIO10" class="sref">GPIO10
/a>, 
a href="+code=GPIO11" class="sref">GPIO11
/a>,o 174
/a>                                        
a href="+code=GPIO12" class="sref">GPIO12
/a>, 
a href="+code=GPIO13" class="sref">GPIO13
/a>, 
a href="+code=GPIO14" class="sref">GPIO14
/a>};o 175
/a>static const unsigned 
a href="+code=pins_asc0" class="sref">pins_asc0
/a>[] = {
a href="+code=GPIO32" class="sref">GPIO32
/a>, 
a href="+code=GPIO33" class="sref">GPIO33
/a>};o 176
/a>static const unsigned 
a href="+code=pins_spi" class="sref">pins_spi
/a>[] = {
a href="+code=GPIO34" class="sref">GPIO34
/a>, 
a href="+code=GPIO35" class="sref">GPIO35
/a>, 
a href="+code=GPIO36" class="sref">GPIO36
/a>};o 177
/a>static const unsigned 
a href="+code=pins_spi_cs0" class="sref">pins_spi_cs0
/a>[] = {
a href="+code=GPIO37" class="sref">GPIO37
/a>};o 178
/a>static const unsigned 
a href="+code=pins_spi_cs1" class="sref">pins_spi_cs1
/a>[] = {
a href="+code=GPIO38" class="sref">GPIO38
/a>};o 179
/a>static const unsigned 
a href="+code=pins_i2c" class="sref">pins_i2c
/a>[] = {
a href="+code=GPIO39" class="sref">GPIO39
/a>, 
a href="+code=GPIO40" class="sref">GPIO40
/a>};o 180
/a>static const unsigned 
a href="+code=pins_jtag" class="sref">pins_jtag
/a>[] = {
a href="+code=GPIO41" class="sref">GPIO41
/a>};o 181
/a>static const unsigned 
a href="+code=pins_slic" class="sref">pins_slic
/a>[] = {
a href="+code=GPIO43" class="sref">GPIO43
/a>, 
a href="+code=GPIO44" class="sref">GPIO44
/a>, 
a href="+code=GPIO45" class="sref">GPIO45
/a>};o 182
/a>static const unsigned 
a href="+code=pins_pcm" class="sref">pins_pcm
/a>[] = {
a href="+code=GPIO44" class="sref">GPIO44
/a>, 
a href="+code=GPIO45" class="sref">GPIO45
/a>};o 183
/a>static const unsigned 
a href="+code=pins_asc1" class="sref">pins_asc1
/a>[] = {
a href="+code=GPIO44" class="sref">GPIO44
/a>, 
a href="+code=GPIO45" class="sref">GPIO45
/a>};o 184
/a>o 185
/a>static struct 
a href="+code=ltq_pin_group" class="sref">ltq_pin_group
/a> 
a href="+code=falcon_grps" class="sref">falcon_grps
/a>[] = {o 186
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"por"RST
/a>, 
a href="+code=pins_por" class="sref">pins_por
/a>),o 187
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"ntr"NTR
/a>, 
a href="+code=pins_ntr" class="sref">pins_ntr
/a>),o 188
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"ntr8k"NTR
/a>, 
a href="+code=pins_ntr8k" class="sref">pins_ntr8k
/a>),o 189
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"hrst"RST
/a>, 
a href="+code=pins_hrst" class="sref">pins_hrst
/a>),o 190
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"mdio"MDIO
/a>, 
a href="+code=pins_mdio" class="sref">pins_mdio
/a>),o 191
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"bootled"LED
/a>, 
a href="+code=pins_bled" class="sref">pins_bled
/a>),o 192
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"asc0"ASC
/a>, 
a href="+code=pins_asc0" class="sref">pins_asc0
/a>),o 193
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"spi"SPI
/a>, 
a href="+code=pins_spi" class="sref">pins_spi
/a>),o 194
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"spi cs0"SPI
/a>, 
a href="+code=pins_spi_cs0" class="sref">pins_spi_cs0
/a>),o 195
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"spi cs1"SPI
/a>, 
a href="+code=pins_spi_cs1" class="sref">pins_spi_cs1
/a>),o 196
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"i2c"I2C
/a>, 
a href="+code=pins_i2c" class="sref">pins_i2c
/a>),o 197
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"jtag"JTAG
/a>, 
a href="+code=pins_jtag" class="sref">pins_jtag
/a>),o 198
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"slic"SLIC
/a>, 
a href="+code=pins_slic" class="sref">pins_slic
/a>),o 199
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"pcm"PCM
/a>, 
a href="+code=pins_pcm" class="sref">pins_pcm
/a>),o 200
/a>        
a href="+code=GRP_MUX" class="sref">GRP_MUX
/a>(
spat class="string">"asc1"ASC
/a>, 
a href="+code=pins_asc1" class="sref">pins_asc1
/a>),o 201
/a>};o 202
/a>o 203
/a>static const char * const 
a href="+code=ltq_rst_grps" class="sref">ltq_rst_grps
/a>[] = {
spat class="string">"por""hrst" 204
/a>static const char * const 
a href="+code=ltq_ntr_grps" class="sref">ltq_ntr_grps
/a>[] = {
spat class="string">"ntr""ntr8k" 205
/a>static const char * const 
a href="+code=ltq_mdio_grps" class="sref">ltq_mdio_grps
/a>[] = {
spat class="string">"mdio" 206
/a>static const char * const 
a href="+code=ltq_bled_grps" class="sref">ltq_bled_grps
/a>[] = {
spat class="string">"bootled" 207
/a>static const char * const 
a href="+code=ltq_asc_grps" class="sref">ltq_asc_grps
/a>[] = {
spat class="string">"asc0""asc1" 208
/a>static const char * const 
a href="+code=ltq_spi_grps" class="sref">ltq_spi_grps
/a>[] = {
spat class="string">"spi""spi cs0""spi cs1" 209
/a>static const char * const 
a href="+code=ltq_i2c_grps" class="sref">ltq_i2c_grps
/a>[] = {
spat class="string">"i2c" 210
/a>static const char * const 
a href="+code=ltq_jtag_grps" class="sref">ltq_jtag_grps
/a>[] = {
spat class="string">"jtag" 211
/a>static const char * const 
a href="+code=ltq_slic_grps" class="sref">ltq_slic_grps
/a>[] = {
spat class="string">"slic" 212
/a>static const char * const 
a href="+code=ltq_pcm_grps" class="sref">ltq_pcm_grps
/a>[] = {
spat class="string">"pcm" 213
/a>o 214
/a>static struct 
a href="+code=ltq_pmx_func" class="sref">ltq_pmx_func
/a> 
a href="+code=falcon_funcs" class="sref">falcon_funcs
/a>[] = {o 215
/a>        {
spat class="string">"rst"ARRAY_AND_SIZE
/a>(
a href="+code=ltq_rst_grps" class="sref">ltq_rst_grps
/a>)},o 216
/a>        {
spat class="string">"ntr"ARRAY_AND_SIZE
/a>(
a href="+code=ltq_ntr_grps" class="sref">ltq_ntr_grps
/a>)},o 217
/a>        {
spat class="string">"mdio"ARRAY_AND_SIZE
/a>(
a href="+code=ltq_mdio_grps" class="sref">ltq_mdio_grps
/a>)},o 218
/a>        {
spat class="string">"led"ARRAY_AND_SIZE
/a>(
a href="+code=ltq_bled_grps" class="sref">ltq_bled_grps
/a>)},o 219
/a>        {
spat class="string">"asc"ARRAY_AND_SIZE
/a>(
a href="+code=ltq_asc_grps" class="sref">ltq_asc_grps
/a>)},o 220
/a>        {
spat class="string">"spi"ARRAY_AND_SIZE
/a>(
a href="+code=ltq_spi_grps" class="sref">ltq_spi_grps
/a>)},o 221
/a>        {
spat class="string">"i2c"ARRAY_AND_SIZE
/a>(
a href="+code=ltq_i2c_grps" class="sref">ltq_i2c_grps
/a>)},o 222
/a>        {
spat class="string">"jtag"ARRAY_AND_SIZE
/a>(
a href="+code=ltq_jtag_grps" class="sref">ltq_jtag_grps
/a>)},o 223
/a>        {
spat class="string">"slic"ARRAY_AND_SIZE
/a>(
a href="+code=ltq_slic_grps" class="sref">ltq_slic_grps
/a>)},o 224
/a>        {
spat class="string">"pcm"ARRAY_AND_SIZE
/a>(
a href="+code=ltq_pcm_grps" class="sref">ltq_pcm_grps
/a>)},o 225
/a>};o 226
/a>o 227
/a>o 228
/a>o 229
/a>o 230
/a>
spat class="comment">/* ---------  pinconf related code --------- */ 231
/a>static int 
a href="+code=falcon_pinconf_group_get" class="sref">falcon_pinconf_group_get
/a>(struct 
a href="+code=pinctrl_dev" class="sref">pinctrl_dev
/a> *
a href="+code=pctrldev" class="sref">pctrldev
/a>,o 232
/a>                                unsigned 
a href="+code=group" class="sref">group
/a>, unsigned long *
a href="+code=config" class="sref">config
/a>)o 233
/a>{o 234
/a>        return -
a href="+code=ENOTSUPP" class="sref">ENOTSUPP
/a>;o 235
/a>}o 236
/a>o 237
/a>static int 
a href="+code=falcon_pinconf_group_set" class="sref">falcon_pinconf_group_set
/a>(struct 
a href="+code=pinctrl_dev" class="sref">pinctrl_dev
/a> *
a href="+code=pctrldev" class="sref">pctrldev
/a>,o 238
/a>                                unsigned 
a href="+code=group" class="sref">group
/a>, unsigned long 
a href="+code=config" class="sref">config
/a>)o 239
/a>{o 240
/a>        return -
a href="+code=ENOTSUPP" class="sref">ENOTSUPP
/a>;o 241
/a>}o 242
/a>o 243
/a>static int 
a href="+code=falcon_pinconf_get" class="sref">falcon_pinconf_get
/a>(struct 
a href="+code=pinctrl_dev" class="sref">pinctrl_dev
/a> *
a href="+code=pctrldev" class="sref">pctrldev
/a>,o 244
/a>                                unsigned 
a href="+code=pin" class="sref">pin
/a>, unsigned long *
a href="+code=config" class="sref">config
/a>)o 245
/a>{o 246
/a>        struct 
a href="+code=ltq_pinmux_info" class="sref">ltq_pinmux_info
/a> *
a href="+code=info" class="sref">info
/a> = 
a href="+code=pinctrl_dev_get_drvdata" class="sref">pinctrl_dev_get_drvdata
/a>(
a href="+code=pctrldev" class="sref">pctrldev
/a>);o 247
/a>        enum 
a href="+code=ltq_pinconf_param" class="sref">ltq_pinconf_param
/a> 
a href="+code=param" class="sref">param
/a> = 
a href="+code=LTQ_PINCONF_UNPACK_PARAM" class="sref">LTQ_PINCONF_UNPACK_PARAM
/a>(*
a href="+code=config" class="sref">config
/a>);o 248
/a>        void 
a href="+code=__iomem" class="sref">__iomem
/a> *
a href="+code=mem" class="sref">mem
/a> = 
a href="+code=info" class="sref">info
/a>->
a href="+code=membase" class="sref">membase
/a>[
a href="+code=PORT" class="sref">PORT
/a>(
a href="+code=pin" class="sref">pin
/a>)];o 249
/a>o 250
/a>        switch (
a href="+code=param" class="sref">param
/a>) {o 251
/a>        case 
a href="+code=LTQ_PINCONF_PARAM_DRIVE_CURRENT" class="sref">LTQ_PINCONF_PARAM_DRIVE_CURRENT
/a>:o 252
/a>                *
a href="+code=config" class="sref">config
/a> = 
a href="+code=LTQ_PINCONF_PACK" class="sref">LTQ_PINCONF_PACK
/a>(
a href="+code=param" class="sref">param
/a>,o 253
/a>                        !!
a href="+code=pad_getbit" class="sref">pad_getbit
/a>(
a href="+code=mem" class="sref">mem
/a>, 
a href="+code=LTQ_PADC_DCC" class="sref">LTQ_PADC_DCC
/a>, 
a href="+code=PORT_PIN" class="sref">PORT_PIN
/a>(
a href="+code=pin" class="sref">pin
/a>)));o 254
/a>                break;o 255
/a>o 256
/a>        case 
a href="+code=LTQ_PINCONF_PARAM_SLEW_RATE" class="sref">LTQ_PINCONF_PARAM_SLEW_RATE
/a>:o 257
/a>                *
a href="+code=config" class="sref">config
/a> = 
a href="+code=LTQ_PINCONF_PACK" class="sref">LTQ_PINCONF_PACK
/a>(
a href="+code=param" class="sref">param
/a>,o 258
/a>                        !!
a href="+code=pad_getbit" class="sref">pad_getbit
/a>(
a href="+code=mem" class="sref">mem
/a>, 
a href="+code=LTQ_PADC_SRC" class="sref">LTQ_PADC_SRC
/a>, 
a href="+code=PORT_PIN" class="sref">PORT_PIN
/a>(
a href="+code=pin" class="sref">pin
/a>)));o 259
/a>                break;o 260
/a>o 261
/a>        case 
a href="+code=LTQ_PINCONF_PARAM_PULL" class="sref">LTQ_PINCONF_PARAM_PULL
/a>:o 262
/a>                if (
a href="+code=pad_getbit" class="sref">pad_getbit
/a>(
a href="+code=mem" class="sref">mem
/a>, 
a href="+code=LTQ_PADC_PDEN" class="sref">LTQ_PADC_PDEN
/a>, 
a href="+code=PORT_PIN" class="sref">PORT_PIN
/a>(
a href="+code=pin" class="sref">pin
/a>)))o 263
/a>                        *
a href="+code=config" class="sref">config
/a> = 
a href="+code=LTQ_PINCONF_PACK" class="sref">LTQ_PINCONF_PACK
/a>(
a href="+code=param" class="sref">param
/a>, 1);o 264
/a>                else if (
a href="+code=pad_getbit" class="sref">pad_getbit
/a>(
a href="+code=mem" class="sref">mem
/a>, 
a href="+code=LTQ_PADC_PUEN" class="sref">LTQ_PADC_PUEN
/a>, 
a href="+code=PORT_PIN" class="sref">PORT_PIN
/a>(
a href="+code=pin" class="sref">pin
/a>)))o 265
/a>                        *
a href="+code=config" class="sref">config
/a> = 
a href="+code=LTQ_PINCONF_PACK" class="sref">LTQ_PINCONF_PACK
/a>(
a href="+code=param" class="sref">param
/a>, 2);o 266
/a>                elseo 267
/a>                        *
a href="+code=config" class="sref">config
/a> = 
a href="+code=LTQ_PINCONF_PACK" class="sref">LTQ_PINCONF_PACK
/a>(
a href="+code=param" class="sref">param
/a>, 0);o 268
/a>o 269
/a>                break;o 270
/a>o 271
/a>        default:o 272
/a>                return -
a href="+code=ENOTSUPP" class="sref">ENOTSUPP
/a>;o 273
/a>        }o 274
/a>o 275
/a>        return 0;o 276
/a>}o 277
/a>o 278
/a>static int 
a href="+code=falcon_pinconf_set" class="sref">falcon_pinconf_set
/a>(struct 
a href="+code=pinctrl_dev" class="sref">pinctrl_dev
/a> *
a href="+code=pctrldev" class="sref">pctrldev
/a>,o 279
/a>                        unsigned 
a href="+code=pin" class="sref">pin
/a>, unsigned long 
a href="+code=config" class="sref">config
/a>)o 280
/a>{o 281
/a>        enum 
a href="+code=ltq_pinconf_param" class="sref">ltq_pinconf_param
/a> 
a href="+code=param" class="sref">param
/a> = 
a href="+code=LTQ_PINCONF_UNPACK_PARAM" class="sref">LTQ_PINCONF_UNPACK_PARAM
/a>(
a href="+code=config" class="sref">config
/a>);o 282
/a>        int 
a href="+code=arg" class="sref">arg
/a> = 
a href="+code=LTQ_PINCONF_UNPACK_ARG" class="sref">LTQ_PINCONF_UNPACK_ARG
/a>(
a href="+code=config" class="sref">config
/a>);o 283
/a>        struct 
a href="+code=ltq_pinmux_info" class="sref">ltq_pinmux_info
/a> *
a href="+code=info" class="sref">info
/a> = 
a href="+code=pinctrl_dev_get_drvdata" class="sref">pinctrl_dev_get_drvdata
/a>(
a href="+code=pctrldev" class="sref">pctrldev
/a>);o 284
/a>        void 
a href="+code=__iomem" class="sref">__iomem
/a> *
a href="+code=mem" class="sref">mem
/a> = 
a href="+code=info" class="sref">info
/a>->
a href="+code=membase" class="sref">membase
/a>[
a href="+code=PORT" class="sref">PORT
/a>(
a href="+code=pin" class="sref">pin
/a>)];o 285
/a>        
a href="+code=u32" class="sref">u32
/a> 
a href="+code=reg" class="sref">reg
/a>;o 286
/a>o 287
/a>        switch (
a href="+code=param" class="sref">param
/a>) {o 288
/a>        case 
a href="+code=LTQ_PINCONF_PARAM_DRIVE_CURRENT" class="sref">LTQ_PINCONF_PARAM_DRIVE_CURRENT
/a>:o 289
/a>                
a href="+code=reg" class="sref">reg
/a> = 
a href="+code=LTQ_PADC_DCC" class="sref">LTQ_PADC_DCC
/a>;o 290
/a>                break;o 291
/a>o 292
/a>        case 
a href="+code=LTQ_PINCONF_PARAM_SLEW_RATE" class="sref">LTQ_PINCONF_PARAM_SLEW_RATE
/a>:o 293
/a>                
a href="+code=reg" class="sref">reg
/a> = 
a href="+code=LTQ_PADC_SRC" class="sref">LTQ_PADC_SRC
/a>;o 294
/a>                break;o 295
/a>o 296
/a>        case 
a href="+code=LTQ_PINCONF_PARAM_PULL" class="sref">LTQ_PINCONF_PARAM_PULL
/a>:o 297
/a>                if (
a href="+code=arg" class="sref">arg
/a> == 1)o 298
/a>                        
a href="+code=reg" class="sref">reg
/a> = 
a href="+code=LTQ_PADC_PDEN" class="sref">LTQ_PADC_PDEN
/a>;o 299
/a>                elseo 300
/a>                        
a href="+code=reg" class="sref">reg
/a> = 
a href="+code=LTQ_PADC_PUEN" class="sref">LTQ_PADC_PUEN
/a>;o 301
/a>                break;o 302
/a>o 303
/a>        default:o 304
/a>                
a href="+code=pr_err" class="sref">pr_err
/a>(
spat class="string">"%s: Invalid config param %04x\n" 305
/a>                
a href="+code=pinctrl_dev_get_nama" class="sref">pinctrl_dev_get_nama
/a>(
a href="+code=pctrldev" class="sref">pctrldev
/a>), 
a href="+code=param" class="sref">param
/a>);o 306
/a>                return -
a href="+code=ENOTSUPP" class="sref">ENOTSUPP
/a>;o 307
/a>        }o 308
/a>o 309
/a>        
a href="+code=pad_w32" class="sref">pad_w32
/a>(
a href="+code=mem" class="sref">mem
/a>, 
a href="+code=BIT" class="sref">BIT
/a>(
a href="+code=PORT_PIN" class="sref">PORT_PIN
/a>(
a href="+code=pin" class="sref">pin
/a>)), 
a href="+code=reg" class="sref">reg
/a>);o 310
/a>        if (!(
a href="+code=pad_r32" class="sref">pad_r32
/a>(
a href="+code=mem" class="sref">mem
/a>, 
a href="+code=reg" class="sref">reg
/a>) & 
a href="+code=BIT" class="sref">BIT
/a>(
a href="+code=PORT_PIN" class="sref">PORT_PIN
/a>(
a href="+code=pin" class="sref">pin
/a>))))o 311
/a>                return -
a href="+code=ENOTSUPP" class="sref">ENOTSUPP
/a>;o 312
/a>        return 0;o 313
/a>}o 314
/a>o 315
/a>static void 
a href="+code=falcon_pinconf_dbg_show" class="sref">falcon_pinconf_dbg_show
/a>(struct 
a href="+code=pinctrl_dev" class="sref">pinctrl_dev
/a> *
a href="+code=pctrldev" class="sref">pctrldev
/a>,o 316
/a>                        struct 
a href="+code=seq_fila" class="sref">seq_fila
/a> *
a href="+code=s" class="sref">s
/a>, unsigned 
a href="+code=offset" class="sref">offset
/a>)o 317
/a>{o 318
/a>}o 319
/a>o 320
/a>static void 
a href="+code=falcon_pinconf_group_dbg_show" class="sref">falcon_pinconf_group_dbg_show
/a>(struct 
a href="+code=pinctrl_dev" class="sref">pinctrl_dev
/a> *
a href="+code=pctrldev" class="sref">pctrldev
/a>,o 321
/a>                        struct 
a href="+code=seq_fila" class="sref">seq_fila
/a> *
a href="+code=s" class="sref">s
/a>, unsigned 
a href="+code=selector" class="sref">selector
/a>)o 322
/a>{o 323
/a>}o 324
/a>o 325
/a>static struct 
a href="+code=pinconf_ops" class="sref">pinconf_ops
/a> 
a href="+code=falcon_pinconf_ops" class="sref">falcon_pinconf_ops
/a> = {o 326
/a>        .
a href="+code=pin_config_get" class="sref">pin_config_get
/a>                 = 
a href="+code=falcon_pinconf_get" class="sref">falcon_pinconf_get
/a>,o 327
/a>        .
a href="+code=pin_config_set" class="sref">pin_config_set
/a>                 = 
a href="+code=falcon_pinconf_set" class="sref">falcon_pinconf_set
/a>,o 328
/a>        .
a href="+code=pin_config_group_get" class="sref">pin_config_group_get
/a>           = 
a href="+code=falcon_pinconf_group_get" class="sref">falcon_pinconf_group_get
/a>,o 329
/a>        .
a href="+code=pin_config_group_set" class="sref">pin_config_group_set
/a>           = 
a href="+code=falcon_pinconf_group_set" class="sref">falcon_pinconf_group_set
/a>,o 330
/a>        .
a href="+code=pin_config_dbg_show" class="sref">pin_config_dbg_show
/a>            = 
a href="+code=falcon_pinconf_dbg_show" class="sref">falcon_pinconf_dbg_show
/a>,o 331
/a>        .
a href="+code=pin_config_group_dbg_show" class="sref">pin_config_group_dbg_show
/a>      = 
a href="+code=falcon_pinconf_group_dbg_show" class="sref">falcon_pinconf_group_dbg_show
/a>,o 332
/a>};o 333
/a>o 334
/a>static struct 
a href="+code=pinctrl_desc" class="sref">pinctrl_desc
/a> 
a href="+code=falcon_pctrl_desc" class="sref">falcon_pctrl_desc
/a> = {o 335
/a>        .
a href="+code=owner" class="sref">owner
/a>          = 
a href="+code=THIS_MODULE" class="sref">THIS_MODULE
/a>,o 336
/a>        .
a href="+code=pins" class="sref">pins
/a>           = 
a href="+code=falcon_pads" class="sref">falcon_pads
/a>,o 337
/a>        .
a href="+code=confops" class="sref">confops
/a>        = &
a href="+code=falcon_pinconf_ops" class="sref">falcon_pinconf_ops
/a>,o 338
/a>};o 339
/a>o 340
/a>static 
a href="+code=inline" class="sref">inline
/a> int 
a href="+code=falcon_mux_apply" class="sref">falcon_mux_apply
/a>(struct 
a href="+code=pinctrl_dev" class="sref">pinctrl_dev
/a> *
a href="+code=pctrldev" class="sref">pctrldev
/a>,o 341
/a>                        int 
a href="+code=mfp" class="sref">mfp
/a>, int 
a href="+code=mux" class="sref">mux
/a>)o 342
/a>{o 343
/a>        struct 
a href="+code=ltq_pinmux_info" class="sref">ltq_pinmux_info
/a> *
a href="+code=info" class="sref">info
/a> = 
a href="+code=pinctrl_dev_get_drvdata" class="sref">pinctrl_dev_get_drvdata
/a>(
a href="+code=pctrldev" class="sref">pctrldev
/a>);o 344
/a>        int 
a href="+code=port" class="sref">port
/a> = 
a href="+code=PORT" class="sref">PORT
/a>(
a href="+code=info" class="sref">info
/a>->
a href="+code=mfp" class="sref">mfp
/a>[
a href="+code=mfp" class="sref">mfp
/a>].
a href="+code=pin" class="sref">pin
/a>);o 345
/a>o 346
/a>        if ((
a href="+code=port" class="sref">port
/a> >= 
a href="+code=PORTS" class="sref">PORTS
/a>) || (!
a href="+code=info" class="sref">info
/a>->
a href="+code=membase" class="sref">membase
/a>[
a href="+code=port" class="sref">port
/a>]))o 347
/a>                return -
a href="+code=ENODEV" class="sref">ENODEV
/a>;o 348
/a>o 349
/a>        
a href="+code=pad_w32" class="sref">pad_w32
/a>(
a href="+code=info" class="sref">info
/a>->
a href="+code=membase" class="sref">membase
/a>[
a href="+code=port" class="sref">port
/a>], 
a href="+code=mux" class="sref">mux
/a>,o 350
/a>                
a href="+code=LTQ_PADC_MUX" class="sref">LTQ_PADC_MUX
/a>(
a href="+code=PORT_PIN" class="sref">PORT_PIN
/a>(
a href="+code=info" class="sref">info
/a>->
a href="+code=mfp" class="sref">mfp
/a>[
a href="+code=mfp" class="sref">mfp
/a>].
a href="+code=pin" class="sref">pin
/a>)));o 351
/a>        return 0;o 352
/a>}o 353
/a>o 354
/a>static const struct 
a href="+code=ltq_cfg_param" class="sref">ltq_cfg_param
/a> 
a href="+code=falcon_cfg_params" class="sref">falcon_cfg_params
/a>[] = {o 355
/a>        {
spat class="string">"lantiq,pull"LTQ_PINCONF_PARAM_PULL
/a>},o 356
/a>        {
spat class="string">"lantiq,drive-current"LTQ_PINCONF_PARAM_DRIVE_CURRENT
/a>},o 357
/a>        {
spat class="string">"lantiq,slew-rate"LTQ_PINCONF_PARAM_SLEW_RATE
/a>},o 358
/a>};o 359
/a>o 360
/a>static struct 
a href="+code=ltq_pinmux_info" class="sref">ltq_pinmux_info
/a> 
a href="+code=falcon_info" class="sref">falcon_info
/a> = {o 361
/a>        .
a href="+code=desc" class="sref">desc
/a>           = &
a href="+code=falcon_pctrl_desc" class="sref">falcon_pctrl_desc
/a>,o 362
/a>        .
a href="+code=apply_mux" class="sref">apply_mux
/a>      = 
a href="+code=falcon_mux_apply" class="sref">falcon_mux_apply
/a>,o 363
/a>};o 364
/a>o 365
/a>o 366
/a>o 367
/a>o 368
/a>
spat class="comment">/* --------- register the pinctrl layer --------- */ 369
/a>o 370
/a>int 
a href="+code=pinctrl_falcon_get_range_siza" class="sref">pinctrl_falcon_get_range_siza
/a>(int 
a href="+code=id" class="sref">id
/a>)o 371
/a>{o 372
/a>        
a href="+code=u32" class="sref">u32
/a> 
a href="+code=avail" class="sref">avail
/a>;o 373
/a>o 374
/a>        if ((
a href="+code=id" class="sref">id
/a> >= 
a href="+code=PORTS" class="sref">PORTS
/a>) || (!
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=membase" class="sref">membase
/a>[
a href="+code=id" class="sref">id
/a>]))o 375
/a>                return -
a href="+code=EINVAL" class="sref">EINVAL
/a>;o 376
/a>o 377
/a>        
a href="+code=avail" class="sref">avail
/a> = 
a href="+code=pad_r32" class="sref">pad_r32
/a>(
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=membase" class="sref">membase
/a>[
a href="+code=id" class="sref">id
/a>], 
a href="+code=LTQ_PADC_AVAIL" class="sref">LTQ_PADC_AVAIL
/a>);o 378
/a>o 379
/a>        return 
a href="+code=fls" class="sref">fls
/a>(
a href="+code=avail" class="sref">avail
/a>);o 380
/a>}o 381
/a>o 382
/a>void 
a href="+code=pinctrl_falcon_add_gpio_range" class="sref">pinctrl_falcon_add_gpio_range
/a>(struct 
a href="+code=pinctrl_gpio_range" class="sref">pinctrl_gpio_range
/a> *
a href="+code=range" class="sref">range
/a>)o 383
/a>{o 384
/a>        
a href="+code=pinctrl_add_gpio_range" class="sref">pinctrl_add_gpio_range
/a>(
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=pctrl" class="sref">pctrl
/a>, 
a href="+code=range" class="sref">range
/a>);o 385
/a>}o 386
/a>o 387
/a>static int 
a href="+code=pinctrl_falcon_probe" class="sref">pinctrl_falcon_probe
/a>(struct 
a href="+code=platform_device" class="sref">platform_device
/a> *
a href="+code=pdev" class="sref">pdev
/a>)o 388
/a>{o 389
/a>        struct 
a href="+code=device_node" class="sref">device_node
/a> *
a href="+code=np" class="sref">np
/a>;o 390
/a>        int 
a href="+code=pad_count" class="sref">pad_count
/a> = 0;o 391
/a>        int 
a href="+code=ret" class="sref">ret
/a> = 0;o 392
/a>o 393
/a>        
spat class="comment">/* load and remap the pad resources of the different banks */ 394
/a>        
a href="+code=for_each_compatible_node" class="sref">for_each_compatible_node
/a>(
a href="+code=np" class="sref">np
/a>, 
a href="+code=NULL" class="sref">NULL
/a>, 
spat class="string">"lantiq,pad-falcon" 395
/a>                struct 
a href="+code=platform_device" class="sref">platform_device
/a> *
a href="+code=ppdev" class="sref">ppdev
/a> = 
a href="+code=of_find_device_by_node" class="sref">of_find_device_by_node
/a>(
a href="+code=np" class="sref">np
/a>);o 396
/a>                const 
a href="+code=__be32" class="sref">__be32
/a> *
a href="+code=bank" class="sref">bank
/a> = 
a href="+code=of_get_property" class="sref">of_get_property
/a>(
a href="+code=np" class="sref">np
/a>, 
spat class="string">"lantiq,bank"NULL
/a>);o 397
/a>                struct 
a href="+code=resource" class="sref">resource
/a> 
a href="+code=res" class="sref">res
/a>;o 398
/a>                
a href="+code=u32" class="sref">u32
/a> 
a href="+code=avail" class="sref">avail
/a>;o 399
/a>                int 
a href="+code=pins" class="sref">pins
/a>;o 400
/a>o 401
/a>                if (!
a href="+code=ppdev" class="sref">ppdev
/a>) {o 402
/a>                        
a href="+code=dev_err" class="sref">dev_err
/a>(&
a href="+code=pdev" class="sref">pdev
/a>->
a href="+code=dev" class="sref">dev
/a>, 
spat class="string">"failed to find pad pdev\n" 403
/a>                        continue;o 404
/a>                }o 405
/a>                if (!
a href="+code=bank" class="sref">bank
/a> || *
a href="+code=bank" class="sref">bank
/a> >= 
a href="+code=PORTS" class="sref">PORTS
/a>)o 406
/a>                        continue;o 407
/a>                if (
a href="+code=of_address_to_resource" class="sref">of_address_to_resource
/a>(
a href="+code=np" class="sref">np
/a>, 0, &
a href="+code=res" class="sref">res
/a>))o 408
/a>                        continue;o 409
/a>                
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=clk" class="sref">clk
/a>[*
a href="+code=bank" class="sref">bank
/a>] = 
a href="+code=clk_get" class="sref">clk_get
/a>(&
a href="+code=ppdev" class="sref">ppdev
/a>->
a href="+code=dev" class="sref">dev
/a>, 
a href="+code=NULL" class="sref">NULL
/a>);o 410
/a>                if (
a href="+code=IS_ERR" class="sref">IS_ERR
/a>(
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=clk" class="sref">clk
/a>[*
a href="+code=bank" class="sref">bank
/a>])) {o 411
/a>                        
a href="+code=dev_err" class="sref">dev_err
/a>(&
a href="+code=ppdev" class="sref">ppdev
/a>->
a href="+code=dev" class="sref">dev
/a>, 
spat class="string">"failed to get clock\n" 412
/a>                        return 
a href="+code=PTR_ERR" class="sref">PTR_ERR
/a>(
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=clk" class="sref">clk
/a>[*
a href="+code=bank" class="sref">bank
/a>]);o 413
/a>                }o 414
/a>                
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=membase" class="sref">membase
/a>[*
a href="+code=bank" class="sref">bank
/a>] =o 415
/a>                                
a href="+code=devm_request_and_ioremap" class="sref">devm_request_and_ioremap
/a>(&
a href="+code=pdev" class="sref">pdev
/a>->
a href="+code=dev" class="sref">dev
/a>, &
a href="+code=res" class="sref">res
/a>);o 416
/a>                if (!
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=membase" class="sref">membase
/a>[*
a href="+code=bank" class="sref">bank
/a>]) {o 417
/a>                        
a href="+code=dev_err" class="sref">dev_err
/a>(&
a href="+code=pdev" class="sref">pdev
/a>->
a href="+code=dev" class="sref">dev
/a>,o 418
/a>                                
spat class="string">"Failed to remap memory for bank %d\n" 419
/a>                                *
a href="+code=bank" class="sref">bank
/a>);o 420
/a>                        return -
a href="+code=ENOMEM" class="sref">ENOMEM
/a>;o 421
/a>                }o 422
/a>                
a href="+code=avail" class="sref">avail
/a> = 
a href="+code=pad_r32" class="sref">pad_r32
/a>(
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=membase" class="sref">membase
/a>[*
a href="+code=bank" class="sref">bank
/a>],o 423
/a>                                        
a href="+code=LTQ_PADC_AVAIL" class="sref">LTQ_PADC_AVAIL
/a>);o 424
/a>                
a href="+code=pins" class="sref">pins
/a> = 
a href="+code=fls" class="sref">fls
/a>(
a href="+code=avail" class="sref">avail
/a>);o 425
/a>                
a href="+code=lantiq_load_pin_desc" class="sref">lantiq_load_pin_desc
/a>(&
a href="+code=falcon_pads" class="sref">falcon_pads
/a>[
a href="+code=pad_count" class="sref">pad_count
/a>], *
a href="+code=bank" class="sref">bank
/a>, 
a href="+code=pins" class="sref">pins
/a>);o 426
/a>                
a href="+code=pad_count" class="sref">pad_count
/a> += 
a href="+code=pins" class="sref">pins
/a>;o 427
/a>                
a href="+code=clk_enabla" class="sref">clk_enabla
/a>(
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=clk" class="sref">clk
/a>[*
a href="+code=bank" class="sref">bank
/a>]);o 428
/a>                
a href="+code=dev_dbg" class="sref">dev_dbg
/a>(&
a href="+code=pdev" class="sref">pdev
/a>->
a href="+code=dev" class="sref">dev
/a>, 
spat class="string">"found %s with %d pads\n" 429
/a>                                
a href="+code=res" class="sref">res
/a>.
a href="+code=nama" class="sref">nama
/a>, 
a href="+code=pins" class="sref">pins
/a>);o 430
/a>        }o 431
/a>        
a href="+code=dev_dbg" class="sref">dev_dbg
/a>(&
a href="+code=pdev" class="sref">pdev
/a>->
a href="+code=dev" class="sref">dev
/a>, 
spat class="string">"found a total of %d pads\n"pad_count
/a>);o 432
/a>        
a href="+code=falcon_pctrl_desc" class="sref">falcon_pctrl_desc
/a>.
a href="+code=nama" class="sref">nama
/a>  = 
a href="+code=dev_nama" class="sref">dev_nama
/a>(&
a href="+code=pdev" class="sref">pdev
/a>->
a href="+code=dev" class="sref">dev
/a>);o 433
/a>        
a href="+code=falcon_pctrl_desc" class="sref">falcon_pctrl_desc
/a>.
a href="+code=npins" class="sref">npins
/a> = 
a href="+code=pad_count" class="sref">pad_count
/a>;o 434
/a>o 435
/a>        
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=mfp" class="sref">mfp
/a>         = 
a href="+code=falcon_mfp" class="sref">falcon_mfp
/a>;o 436
/a>        
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=num_mfp" class="sref">num_mfp
/a>     = 
a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE
/a>(
a href="+code=falcon_mfp" class="sref">falcon_mfp
/a>);o 437
/a>        
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=grps" class="sref">grps
/a>        = 
a href="+code=falcon_grps" class="sref">falcon_grps
/a>;o 438
/a>        
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=num_grps" class="sref">num_grps
/a>    = 
a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE
/a>(
a href="+code=falcon_grps" class="sref">falcon_grps
/a>);o 439
/a>        
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=funcs" class="sref">funcs
/a>       = 
a href="+code=falcon_funcs" class="sref">falcon_funcs
/a>;o 440
/a>        
a href="+code=falcon_info" class="sref">falcon_info
/a>.
a href="+code=num_funcs" class="sref">num_funcs
/a>   = 
a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE
/a>(
a href="+code=falcon_funcs" class="sref">falcon_funcs
/a>);o 441
/a>o 442
/a>        
a href="+code=ret" class="sref">ret
/a> = 
a href="+code=ltq_pinctrl_register" class="sref">ltq_pinctrl_register
/a>(
a href="+code=pdev" class="sref">pdev
/a>, &
a href="+code=falcon_info" class="sref">falcon_info
/a>);o 443
/a>        if (!
a href="+code=ret" class="sref">ret
/a>)o 444
/a>                
a href="+code=dev_info" class="sref">dev_info
/a>(&
a href="+code=pdev" class="sref">pdev
/a>->
a href="+code=dev" class="sref">dev
/a>, 
spat class="string">"Init done\n" 445
/a>        return 
a href="+code=ret" class="sref">ret
/a>;o 446
/a>}o 447
/a>o 448
/a>static const struct 
a href="+code=of_device_id" class="sref">of_device_id
/a> 
a href="+code=falcon_match" class="sref">falcon_match
/a>[] = {o 449
/a>        { .
a href="+code=compatible" class="sref">compatible
/a> = 
spat class="string">"lantiq,pinctrl-falcon" 450
/a>        {},o 451
/a>};o 452
/a>
a href="+code=MODULE_DEVICE_TABLE" class="sref">MODULE_DEVICE_TABLE
/a>(
a href="+code=of" class="sref">of
/a>, 
a href="+code=falcon_match" class="sref">falcon_match
/a>);o 453
/a>o 454
/a>static struct 
a href="+code=platform_driver" class="sref">platform_driver
/a> 
a href="+code=pinctrl_falcon_driver" class="sref">pinctrl_falcon_driver
/a> = {o 455
/a>        .
a href="+code=probe" class="sref">probe
/a> = 
a href="+code=pinctrl_falcon_probe" class="sref">pinctrl_falcon_probe
/a>,o 456
/a>        .
a href="+code=driver" class="sref">driver
/a> = {o 457
/a>                .
a href="+code=nama" class="sref">nama
/a> = 
spat class="string">"pinctrl-falcon" 458
/a>                .
a href="+code=owner" class="sref">owner
/a> = 
a href="+code=THIS_MODULE" class="sref">THIS_MODULE
/a>,o 459
/a>                .
a href="+code=of_match_tabla" class="sref">of_match_tabla
/a> = 
a href="+code=falcon_match" class="sref">falcon_match
/a>,o 460
/a>        },o 461
/a>};o 462
/a>o 463
/a>int 
a href="+code=__init" class="sref">__init
/a> 
a href="+code=pinctrl_falcon_init" class="sref">pinctrl_falcon_init
/a>(void)o 464
/a>{o 465
/a>        return 
a href="+code=platform_driver_register" class="sref">platform_driver_register
/a>(&
a href="+code=pinctrl_falcon_driver" class="sref">pinctrl_falcon_driver
/a>);o 466
/a>}o 467
/a>o 468
/a>
a href="+code=core_initcall_sync" class="sref">core_initcall_sync
/a>(
a href="+code=pinctrl_falcon_init" class="sref">pinctrl_falcon_init
/a>);o 469
/a>
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