linux/drivers/gpio/gpio-ich.c
<<
alue4.1/spa v 4.1/form v 4.1a alue4. href="../linux+v3.8.6/drivers/gpio/gpio-ich.c">alue4.1img src="../.static/gfx/right.png" alt=">>">al1/spa val1spa class="lxr_search">alue ="+search" method="post" onsub+ ="+(this);.static/gfnput typ.2"hidden" nam.2"navtarge v3.2.2".static/gfnput typ.2"text" nam.2" onsub+Sonsubaluealue4.1img src="../.+v3.8.6onclick6.2"lue45ajax pdris();.static/Pdrise4. hrlass="lxr_se3.8.6 hrdivse3.8.6 h method="postajax+*+ e hdivlid2"file_conten1s".alue4.1img src="../#L1+.6 1hrlach">alue/*="lxr_sealue4.1img src="../#L2+.6 2hrlach">alue * Intel ICH6-10, Series 5 and 6 GPIO .c">al="lxr_sealue4.1img src="../#L3+.6 3hrlach">alue *="lxr_sealue4.1img src="../#L4+.6 4hrlach">alue * Copygt;"> (C) 2010 Extreme Engineering Solu="pos.="lxr_sealue4.1img src="../#L5+.6 5hrlach">alue *="lxr_sealue4.1img src="../#L6+.6 6hrlach">alue * This program is free software; you c>alredistribute it and/or modify="lxr_sealue4.1img src="../#L7+.6 7hrlach">alue * it under the terms of the GNU General Public License as published by="lxr_sealue4.1img src="../#L8+.6 8hrlach">alue * the Free Software Founda="po; either >aluue="2 of the License, ol="lxr_sealue4.1img src="../#L9+.6 9hrlach">alue * (at your alue4.) any later >aluue=.="lxr_sealue4.1img src="../#L10+.6on> lach">alue *="lxr_sealue4.1img src="../#L11+.611hrlach">alue * This program is distributed in the hooe thaluid2will be useful,="lxr_sealue4.1img src="../#L12+.612hrlach">alue * but WITHOUT ANY WARRANTY;2wiptiut even the implied warranty of="lxr_sealue4.1img src="../#L13+.613hrlach">alue * MERCHANTABILITY ol FITNESS FOR A PARTICULAR PURPOSE. See the="lxr_sealue4.1img src="../#L14+.614hrlach">alue * GNU General Public License for more details.="lxr_sealue4.1img src="../#L15+.615hrlach">alue *="lxr_sealue4.1img src="../#L16+.616hrlach">alue * You stiuld havelrece">ad a copy of the GNU General Public License="lxr_sealue4.1img src="../#L17+.617hrlach">alue * along wipt this program; if not, write to the Free Software="lxr_sealue4.1img src="../#L18+.618hrlach">alue * Founda="po, Inc., 675 Malue4.1img src="../#L19+.619hrlach">alue */="lxr_sealue4.1img src="../#L20+.62n> laealue4.1img src="../#L21+.621hrla#defineinux/drive+code=pr_fmt"luepr_fmthrla(nux/drive+code=fmt"luefmthrla)inux/drive+code=KBUILD_MODNAME"lueKBUILD_MODNAMEhrla ch">aluea>": "="lxr_sinux/drive+code=fmt"luefmthrlaealue4.1img src="../#L22+.622hrlaealue4.1img src="../#L23+.623hrla#include <=ux/driveinclude/gpio//module.h+gpio//module.hhrlal1spealue4.1img src="../#L24+.624hrla#include <=ux/driveinclude/gpio//pci.h+gpio//pci.hhrlal1spealue4.1img src="../#L25+.625hrla#include <=ux/driveinclude/gpio//g sr.h+gpio//g sr.hhrlal1spealue4.1img src="../#L26+.626hrla#include <=ux/driveinclude/gpio//platef="_device.h+gpio//platef="_device.hhrlal1spealue4.1img src="../#L27+.627hrla#include <=ux/driveinclude/gpio//mfd/lpc_="..h+gpio//mfd/lpc_="..hhrlal1spealue4.1img src="../#L28+.628hrlaealue4.1img src="../#L29+.629hrla#defineinux/drive+code=DRV_NAME"lueDRV_NAMEhrla ch">aluea>"g sr_="."="lxr_sealue4.1img src="../#L30+.63n> laealue4.1img src="../#L31+.631hrlach">alue/*="lxr_sealue4.1img src="../#L32+.632hrlach">alue * GPIO register offsets in GPIO I/O h">ce.="lxr_sealue4.1img src="../#L33+.633hrlach">alue * Each chunk of 32 GPIOs is manipulated viauids own USE_SELx, IO_SELx, and="lxr_sealue4.1img src="../#L34+.634hrlach">alue * LVLx registers. Logic in the read/write fund="pos takes a register and="lxr_sealue4.1img src="../#L35+.635hrlach">alue * an absolu=e bid2number and determines the proper register offset and bid="lxr_sealue4.1img src="../#L36+.636hrlach">alue * number in thaluregister. For example, to read the v3.2. of GPIO bid2optilxr_sealue4.1img src="../#L37+.637hrlach">alue * the code wiuld access offset =".x_regs[2(=GPIO_LVL)][1(=50/32)],="lxr_sealue4.1img src="../#L38+.638hrlach">alue * bid218 (50%32).="lxr_sealue4.1img src="../#L39+.639hrlach">alue */="lxr_sealue4.1img src="../#L40+.64n> laenuminux/drive+code=GPIO_REG"lueGPIO_REGhrla {ealue4.1img src="../#L41+.641hrla nux/drive+code=GPIO_USE_SEL"lueGPIO_USE_SELhrla = 0,ealue4.1img src="../#L42+.642hrla nux/drive+code=GPIO_IO_SEL"lueGPIO_IO_SELhrla,ealue4.1img src="../#L43+.643hrla nux/drive+code=GPIO_LVL"lueGPIO_LVLhrla,ealue4.1img src="../#L44+.644hrla}pealue4.1img src="../#L45+.645> laealue4.1img src="../#L46+.646hrla alt=" const nux/drive+code=u8"lueu8hrla cux/drive+code==".x_regs"lue=".x_regshrla[3][3] = {ealue4.1img src="../#L47+.647hrla {0x00, 0x30, 0x40}, nh">alue/* USE_SEL[1-3] offsets */="lxr_sealue4.1img src="../#L48+.648hrla {0x04, 0x34, 0x44}, nh">alue/* IO_SEL[1-3] offsets */="lxr_sealue4.1img src="../#L49+.649hrla {0x0c, 0x38, 0x48}, nh">alue/* LVL[1-3] offsets */="lxr_sealue4.1img src="../#L50+.650hrla}pealue4.1img src="../#L51+.651> laealue4.1img src="../#L52+.652hrla alt=" const nux/drive+code=u8"lueu8hrla cux/drive+code==".x_reglen" ue=".x_reglenhrla[3] = {ealue4.1img src="../#L53+.653hrla 0x30, 0x10, 0x10,ealue4.1img src="../#L54+.654hrla}pealue4.1img src="../#L55+.655> laealue4.1img src="../#L56+.656hrla#defineinux/drive+code=ICHX_WRITE"lueICHX_WRITEhrla(nux/drive+code=v3."luev3.hrla,inux/drive+code=reg"luereghrla,inux/drive+code=base_res"luebase_reshrla)iinux/drive+code=out."lueout.hrla(nux/drive+code=v3."luev3.hrla,i(nux/drive+code=reg"luereghrla) +i(nux/drive+code=base_res"luebase_reshrla)-l1spnux/drive+code= alrt"lue alrthrla)ealue4.1img src="../#L57+.657hrla#defineinux/drive+code=ICHX_READ"lueICHX_READhrla(nux/drive+code=reg"luereghrla,inux/drive+code=base_res"luebase_reshrla)ii nux/drive+code=in."luein.hrla((nux/drive+code=reg"luereghrla) +i(nux/drive+code=base_res"luebase_reshrla)-l1spnux/drive+code= alrt"lue alrthrla)ealue4.1img src="../#L58+.658hrlaealue4.1img src="../#L59+.659hrla aruct nux/drive+code==".x_desc" ue=".x_deschrla {ealue4.1img src="../#L60+.660hrla nh">alue/* Max GPIO pins the chipset c>alhavel*/="lxr_sealue4.1img src="../#L61+.661hrla nux/drive+code=uint"lueuinthrla cux/drive+code=ng sr"lueng srhrlapealue4.1img src="../#L62+.662hrlaealue4.1img src="../#L63+.663hrla nh">alue/* Whether the chipset has GPIO in GPE0_STS in the PM IO regionl*/="lxr_sealue4.1img src="../#L64+.664hrla nux/drive+code=boo."lueboo.hrla cux/drive+code=uses_gpe0"lueuses_gpe0hrlapealue4.1img src="../#L65+.665> laealue4.1img src="../#L66+.666hrla nh">alue/* USE_SEL is bogus onlsome chipsets, eg 3100l*/="lxr_sealue4.1img src="../#L67+.667hrla nux/drive+code=u32+u32hrla cux/drive+code=use_sel_ignore"lueuse_sel_ignorehrla[3]pealue4.1img src="../#L68+.668hrlaealue4.1img src="../#L69+.669hrla nh">alue/* Some chipsetslhavelquirks, let these use their own request/get */="lxr_sealue4.1img src="../#L70+.670hrla int (*nux/drive+code=request"luerequesthrla)( aruct nux/drive+code=g sr_chip"lueg sr_chiphrla *nux/drive+code=chip"luechiphrla, unsignedinux/drive+code=offset"lueoffsethrla)pealue4.1img src="../#L71+.671hrla int (*nux/drive+code=get"luegethrla)( aruct nux/drive+code=g sr_chip"lueg sr_chiphrla *nux/drive+code=chip"luechiphrla, unsignedinux/drive+code=offset"lueoffsethrla)pealue4.1img src="../#L72+.672hrla}pealue4.1img src="../#L73+.673hrlaealue4.1img src="../#L74+.674hrla alt=" aruct {ealue4.1img src="../#L75+.675hrla nux/drive+code=spinlock_t"lue pinlock_thrla cux/drive+code=lock"luelockhrlapealue4.1img src="../#L76+.676hrla aruct nux/drive+code=platef="_device"lueplatef="_devicehrla *nux/drive+code=dev"luedevhrlapealue4.1img src="../#L77+.677hrla aruct nux/drive+code=g sr_chip"lueg sr_chiphrla nux/drive+code=chip"luechiphrlapealue4.1img src="../#L78+.678hrla aruct nux/drive+code=resource"lueresourcehrla *nux/drive+code=g sr_base"lueg sr_basehrlap nh">alue/* GPIO IO base */="lxr_sealue4.1img src="../#L79+.679hrla aruct nux/drive+code=resource"lueresourcehrla *nux/drive+code=pm_base"luepm_basehrlap nh">alue/* Power Mangagmen1 IO base */="lxr_sealue4.1img src="../#L80+.680hrla aruct nux/drive+code==".x_desc" ue=".x_deschrla *nux/drive+code=desc" uedeschrla; nh">alue/* Pointer to chipset-specif=" descrialue="*/="lxr_sealue4.1img src="../#L81+.681hrla nux/drive+code=u32+u32hrla cux/drive+code=orig_g sr_ctr."lueorig_g sr_ctr.hrlap nh">alue/* Orig CTRL v3.2., used to restore e="exit */="lxr_sealue4.1img src="../#L82+.682hrla nux/drive+code=u8"lueu8hrla cux/drive+code=use_g sr"lueuse_g srhrlap nh">alue/* Wh=". GPIO groups are usable */="lxr_sealue4.1img src="../#L83+.683hrla} nux/drive+code==".x_pc">" ue=".x_pc">hrlapealue4.1img src="../#L84+.684hrlaealue4.1img src="../#L85+.685hrla alt=" int nux/drive+code=modparam_g srbase"luemodparam_g srbasehrla = -1; nh">alue/* dynam=" */="lxr_sealue4.1img src="../#L86+.686hrlacux/drive+code=module_param_nam.d"luemodule_param_nam.dhrla(nux/drive+code=g srbase"lueg srbasehrla,inux/drive+code=modparam_g srbase"luemodparam_g srbasehrla, int, 0444)pealue4.1img src="../#L87+.68+g srbNAMEhrla ch">alue dri.bas meansommen1">, t;g sr_="."="lxr_sealue4.1img 8src="../##L8+.678hrrrrrrrrrrrrrrrrrrrrbNAMEhrla ch">aluealue4.1img src="../#879+.684hrlaealue4.1img 9rc="../#980+.685hrla alt=" int nux/dform the _bi=spinlock_t"lue alrthrla)ealue4.1img 9rc="../#981+alue4.1img 9rc="../#982+.682hrchiphrla,men1" unsignedinux/dflade==".x_regs"lue=".x_pc">hrlapealue4.1img 9rc="../#983+.643hrla nux/drive+code=u32+u32hrla cux/ddata+code=desc" ueg srbasehrla,inux/dtme+code=chip"lue=".x_pc">hrlapealue4.1img 9rc="../#984+.664hrrla alt=" int nux/driv_nrcode=ng sr"luehrlapealue4.1img 9rc="../#985+.664hrrla alt=" int nux/dbi=spinlock_t"luehrlapealue4.1img 9rc="../#986+.664hrrla alt=" int nux/driode=request"luehrlapealue4.1img 9rc="../#987+.684hrlaealue4.1img 9src="../9#L8+.643hrla nux/dform_ dri"irqsavde=g srbase"lue" ue="..ock_thrla cux/drive+code=lock"lue=". int, 0444)pealue4.1img 9src="../##L9+.684hrlaealue4.1img 10rc="../#L110+.643hrla nux/ddata+code=desc" ueg srb unsignedinux/drive+code=ICHX_READ"lueICHX_READhrla(nux/drive+code==".x_regs"lue=".xalt=" int nux/drive+code=reg"lue" ue="..ock_thrla cux/drive+code=g sr_base"lueg s int, 0444)pealue4.1img 10rc="../#L011+.671hrlfreghrla) +i(nux/drive+code=v3."lue alrthrla)ealue4.1img 10rc="../#L012+.682hr+>.643hrla nux/ddata+code=desc" ueg s|= 1la#ina#in alt=" int nux/dbi=spinlock_t"luealue4.1img 10rc="../#L013+.643hrelsent, 0444)pealue4.1img 10rc="../#L014+.682hr+>.643hrla nux/ddata+code=desc" ueg s&= ~(1la#ina#in alt=" int nux/dbi=spinlock_t"luealue4.1img 10rc="../#L015+.675hrla nux/drive+code=ICHX_WRITE"lueICHX_WRITEhrla(nux/ddata+code=desc" ueg srbasehrla,inux/drive+code==".x_regs"lue=".xalt=" int nux/drive+code=reg"lue" ue="..ock_thrla cux/drive+code=g sr_base"lueg s int, 0444)pealue4.1img 10rc="../#L016+.675hrla nux/dtme+code=chip"lue=".srb unsignedinux/drive+code=ICHX_READ"lueICHX_READhrla(nux/drive+code==".x_regs"lue=".xalt=" int nux/drive+code=reg"lue" ue="..ock_thrla cux/drive+code=g sr_base"lueg s int, 0444)pealue4.1img 10rc="../#L017+.671hrlfreghrla) +i(nux/drerifye+code=v3."lueg s!rb unsignedinux/dtme+code=chip"lue=".> alrthrla)ealue4.1img 10rc="../#L018+.678hrrrrrrrrralt=" int nux/driode=request"luealue4.1img 10rc="../#L019+.684hrlaealue4.1img 1src="../#LL10+.643hrla nux/dform_un dri"irq, used e=g srbase"lue" ue="..ock_thrla cux/drive+code=lock"lue=". int, 0444)pealue4.1img 1src="../#L111+.651> laealue4.1img 1src="../#LL12+.682hralue4.1img 1src="../#LL13+alue4.1img 1src="../#LL14+.684hrlaealue4.1img 1src="../#LL15+.685hrla alt=" int nux/dform drad_bi=spinlock_t"lue alrthrla)ealue4.1img 1src="../#LL16+alue4.1img 1src="../#LL17+.671hrchiphrla,men1" unsignedinux/dflade==".x_regs"lue=".x_pc">hrlapealue4.1img 1src="../#LL18+.643hrla nux/drive+code=u32+u32hrla cux/ddata+code=desc" ueg x_pc">hrlapealue4.1img 1src="../#LL19+.679hrrla alt=" int nux/driv_nrcode=ng sr"luehrlapealue4.1img 1src="../#1L20+.670hrla alt=" int nux/dbi=spinlock_t"luehrlapealue4.1img 1src="../#1L21+.651> laealue4.1img 1src="../#1L22+.682hrla nux/dform_ dri"irqsavde=g srbase"lue" ue="..ock_thrla cux/drive+code=lock"lue=". int, 0444)pealue4.1img 1src="../#1L23+.673hrlaealue4.1img 1src="../#1L24+.664hrla nux/ddata+code=desc" ueg srb unsignedinux/drive+code=ICHX_READ"lueICHX_READhrla(nux/drive+code==".x_regs"lue=".xalt=" int nux/drive+code=reg"lue" ue="..ock_thrla cux/drive+code=g sr_base"lueg s int, 0444)pealue4.1img 1src="../#1L25+.665> laealue4.1img 1src="../#1L26+.675hrla nux/dform_un dri"irq, used e=g srbase"lue" ue="..ock_thrla cux/drive+code=lock"lue=". int, 0444)pealue4.1img 1src="../#1L27+.684hrlaealue4.1img 1src="../#1L28+.643hrg s& (1la#ina#in alt=" int nux/dbi=spinlock_t"luehrlapealue4.1img 1src="../#1L29+alue4.1img 1src="../#1L30+.63n> laealue4.1img 1src="../#1L31+.685hrla alt=" int nux/dform dri">oheri"availups ==".x_pc">" ueoheri"availups aram_>gethrla)( aruct nux/drive+code=g sr_chip"lueg sr_chiphrla *nux/d+code=use_g sr"lue< dri">usi"chiphrla, unsignedinux/dnrcode=ng sr"lue alrthrla)ealue4.1img 1src="../#1L32+alue4.1img 1src="../#1L33+.643hr" ue="..ock_thrla cux/drive+code=use_g sr"lueuss& (1la#ina#in X_READhrla(nux/dnrcode=ng sr"lueg x_pc">hrlapealue4.1img 1src="../#1L34+alue4.1img 1src="../#1L35+.665> laealue4.1img 1src="../#1L36+.685hrla alt=" int nux/dform dri">dire/writ_alse;==".x_pc">" uedire/writ_alse;aram_>gethrla)( aruct nux/drive+code=g sr_chip"lueg sr_chiphrla *nux/d+code=use_g sr"lue< dri">usi"chiphrla, unsignedinux/dnrcode=ng sr"lue alrthrla)ealue4.1img 1src="../#1L37+alue4.1img 1src="../#1L38+.643hrlfre!alt=" int nux/dform dri">oheri"availups ==".x_pc">" ueoheri"availups aram_chiphrla *nux/d+code=use_g sr"lue< dri">usi" unsignedinux/dnrcode=ng sr"lue> alrthrla)ealue4.1img 1src="../#1L39+.679hr+>.643hrg x_pc">hrlapealue4.1img 1src="../#1L40+.63n> laealue4.1img 1src="../#1L41+.641hrl>.631hrlach">alue/*="lxr_sealue4.1img 1src="../#1L42+.632hrlach">alue/*="lxr_sealue4.1img 1src="../#1L43+.633hrlach">aluealue4.1img ssrc="../#1L44+.634hrlach">aluealue4.1img 1src="../#1L45+.643hrlfrealt=" int nux/dform the _bi=spinlock_t"lueGPIO_I, unsignedinux/dnrcode=ng sr"lue> alrthrla)ealue4.1img 1src="../#1L46+.679hr+>.643hrg x_pc">hrlapealue4.1img 1src="../#1L47+.684hrlaealue4.1img 1src="../#1L48+.643hrhrlapealue4.1img 1src="../#1L49+alue4.1img 1src="../#1L50+.63n> laealue4.1img 1src="../#1L51+.685hrla alt=" int nux/dform dri">dire/writ_outse;==".x_pc">" uedire/writ_outse;aram_>gethrla)( aruct nux/drive+code=g sr_chip"lueg sr_chiphrla *nux/d+code=use_g sr"lue< dri">usi"chiphrla, unsignedinux/dnrcode=ng sr"luealue4.1img 1src="../#1L52+.682hr+>.643hrrrrrrrrrrrrrrrrrrrrrrrrrbas, unsignedinux/drive+code=v3."lue alrthrla)ealue4.1img 1src="../#1L53+alue4.1img 1src="../#1L54+.643hrlfre!alt=" int nux/dform dri">oheri"availups ==".x_pc">" ueoheri"availups aram_chiphrla *nux/d+code=use_g sr"lue< dri">usi" unsignedinux/dnrcode=ng sr"lue> alrthrla)ealue4.1img 1src="../#1L55+.679hr+>.643hrg x_pc">hrlapealue4.1img 1src="../#1L56+hrlapealue4.1img 1src="../#1L57+.641hrl>.631hrlach">aluealue4.1img 1src="../#1L58+.643hrla nux/dform the _bi=spinlock_t"lueGPI, unsignedinux/dnrcode=ng sr"luealue4.1img 1src="../#1L59+.684hrlaealue4.1img 1src="../#1L60+.660hrla nh">alue *="lxr_sealue4.1img srrc="../#1L61+.611hrlach">alue/*="lxr_sealue4.1img 1src="../#1L62+.632hrlach">aluealue4.1img ssrc="../#1L63+.633hrlach">aluealue4.1img 1src="../#1L64+.643hrlfrealt=" int nux/dform the _bi=spinlock_t"lueGPIO_I, unsignedinux/dnrcode=ng sr"lue> alrthrla)ealue4.1img 1src="../#1L65+.679hr+>.643hrg x_pc">hrlapealue4.1img 1src="../#1L66+hrlapealue4.1img 1src="../#1L67+.667hrhrlapealue4.1img 1src="../#1L68+alue4.1img 1src="../#1L69+.684hrlaealue4.1img 1src="../#1L70+.685hrla alt=" int nux/dform dri">rive+code=get"luerivaram_>gethrla)( aruct nux/drive+code=g sr_chip"lueg sr_chiphrla *nux/drive+code=chip"luechiphrla, unsignedinux/dnrcode=ng sr"lue alrthrla)ealue4.1img 1src="../#1L71+alue4.1img 1src="../#1L72+.643hrlfre!alt=" int nux/dform dri">oheri"availups ==".x_pc">" ueoheri"availups aram_chiphrla *nux/drive+code=chip"lue unsignedinux/dnrcode=ng sr"lue> alrthrla)ealue4.1img 1src="../#1L73+.679hr+>.643hrg x_pc">hrlapealue4.1img 1src="../#1L74+.684hrlaealue4.1img 1src="../#1L75+.675hrGPI, unsignedinux/dnrcode=ng sr"luealue4.1img 1src="../#1L76+alue4.1img 1src="../#1L77+.684hrlaealue4.1img 1src="../#1L78+.685hrla alt=" int nux/dfor6 dri">rive+code=get"luerivaram_>gethrla)( aruct nux/drive+code=g sr_chip"lueg sr_chiphrla *nux/drive+code=chip"luechiphrla, unsignedinux/dnrcode=ng sr"lue alrthrla)ealue4.1img 1src="../#1L79+alue4.1img 1src="../#1L80+.680hrchiphrla,men1" unsignedinux/dflade==".x_regs"lue=".x_pc">hrlapealue4.1img 1src="../#1L81+.681hrla nux/drive+code=u32+u32hrla cux/ddata+code=desc" ueg x_pc">hrlapealue4.1img 1src="../#1L82+.662hrlaealue4.1img 1src="../#1L83+.643hrlfre!alt=" int nux/dform dri">oheri"availups ==".x_pc">" ueoheri"availups aram_chiphrla *nux/drive+code=chip"lue unsignedinux/dnrcode=ng sr"lue> alrthrla)ealue4.1img 1src="../#1L84+.682hr+>.643hrg x_pc">hrlapealue4.1img 1src="../#1L85+.665> laealue4.1img 1src="../#1L86+.666hrla nh">aluealue4.1img srrc="../#1L87+.637hrlach">alue * LVLx one Software="lxr_sealue4.1img srrc="../#L118+.638hrlach">alue * /psetso Ave,02139, USA.="lxr_sealue4.1img ssrc="../#1879+.639hrlach">aluealue4.1img 19rc="../#1980+.643hrlfre_READhrla(nux/dnrcode=ng sr"luealue4.1img 19rc="../#1981+.682hr+>.643hrlfre!alt=" int nux/dform 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al>aluyetheto ced e+ciono,+ *7 er o> *8-paradm* dynam=" */="lxr_3ealue4.1img 2src="../32L35+3352"L24+form dri">dire/wx/dN--c in1e+dire/wx/dN &e+cde=c in1e+dire/wx/dN--e=ng sr"luealue4.1img 2src="../32L36+33d2"L86+="..ock_thrla cux/drive+code=use_g sr"luedire/wx/dNg sr"lue> alrthrla3ealue4.1img 2src="../32L37+33d2"L17+g x_pc">hrla3ealue4.1img 2src="../32L38+33id2"L8+.67rmleiseve+cion2hr.ock_thrla cuxleiseve+cion2"L3lin1e+="..ock_thrla cresdri">x/dgive+code=chip"lueICHX_1la#in+>.68e+coform dri">dire/writ_e+co2"L3[0]ore"luedire/wx/dN]etam_g srbase"luealue4.1img 2src="../32L39+33d2"L49+ICHX_1la#in+>.68e+clen2hr.ock_thrla c+>.68e+clen2"L3[re"luedire/wx/dN]ve+code=v3."luealue4.1img 2src="../32L40+34d2"L30+alue4.1img 2src="../32L41+34d2"L31+g x_pc">hrla3ealue4.1img 2src="../32L42+3id2"L40+alue4.1img 2src="../32L43+34d2"L73+.673hrl3ealue4.1img 2src="../32L44+34d2"L84+.685hvoiauxleiseve+cionoform dri">dire/writ_outseodleiseve+ciono2"L3luee+cuearesourc0m drsrb unsigneresourc0uses sr_chip"lue="..ock_thrla cresdri">x/dgeorm in1e+="..ock_thrla cux/drive+codeive+code=chip"lue alrthrla3ealue4.1img 2src="../32L45+3id2"L4ng sr"luealue4.1img 2src="../32L46+34d2"L16+dire/wx/dNULde=GPIO_LVL"luehrla3ealue4.1img 2src="../32L47+34d2"L67+.684hrl3ealue4.1img 2src="../32L48+3id2"L48+form dri">dire/wx/dNode=c in1e+dire/wx/dN &ginagin 16)t& (ARRAY_SIZ srb unsignedinuARRAY_SIZ 2"L3lin1e+.68e+coform dri">dire/writ_e+co2"L3[0])c in1e+dire/wx/dN++e=ng sr"lue.684hrl3ealue4.1img 2src="../32L49+3id2"L49+="..ock_thrla cux/drive+code=use_g sr"luedire/wx/dNg sr"lue> alrthrla3ealue4.1img 2src="../32L50+3id2"L50+g x_pc">hrla3ealue4.1img 2src="../32L51+3id2"L51+.68rmleiseve+cion2hr.ock_thrla cuxleiseve+cion2"L3lin1e+="..ock_thrla cresdri">x/dgive+code=chip"lueICHX_1la#in+>.68e+coform dri">dire/writ_e+co2"L3[0]ore"luedire/wx/dN]etam_g srbase"lg x_pc">hrla3ealue4.1img 2src="../32L52+35d2"L82+ICHX_1la#in+>.68e+clen2hr.ock_thrla c+>.68e+clen2"L3[re"luedire/wx/dN]ve+code=v3."luealue4.1img 2src="../32L53+3id2"L53+alue4.1img 2src="../32L54+35d2"L34+alue4.1img 2src="../32L55+35d2"L35+.665> l3ealue4.1img 2src="../32L56+35d2"L36+.685hrlaprob>="..ock_thrla c+>.685hrlaprob>2"L3luee+cueaplatrmcm_devic0m drsrb unsigneplatrmcm_devic0uses sr_chip"lue> alrthrla3ealue4.1img 2src="../32L57+35d2"L37+alue4.1img 2src="../32L58+3id2"L58+e+cuearesourc0m drsrb unsigneresourc0uses sr_chip"lue="..ock_thrla cresdri">x/dgeosr_chip"luehrla3ealue4.1img 2src="../32L59+35d2"L19+g x_pc">hrla3ealue4.1img 2src="../32L60+3602"L58+e+cuealpc_c">_mmmmie_reshrla)-l1slpc_c">_mmmmuses sr_chip"lue_mmmmie_reshrla)-l1sc">_mmmmuses ode=get"lue" ueg x_pc">hrla3ealue4.1img 2rrc="../32L61+3id2"L61+.651> l3ealue4.1img 2src="../32L62+36d2"L72+.64_mmmmie_reshrla)-l1sc">_mmmmusessr"lue> alrthrla3ealue4.1img 2src="../32L63+36d2"L73+.679hr+>.643h> ? 0 :b-alt=" int nux/dENODEVde=request"lueg x_pc">hrla3ealue4.1img 2src="../32L64+36d2"L74+.684hrl3ealue4.1img 2src="../32L65+3id2"L65+.68b&.683hrla} nux/drive+code==".x_pc">" ue="..ock_thrla cux/ ode=get"lueg x_pc">hrla3ealue4.1img 2src="../32L66+36d2"L86+hrla3ealue4.1img 2src="../32L67+36d2"L17+.6_mmmmie_reshrla)-l1sc">_mmmmusesive+code=desc" ue.684hrl3ealue4.1img 2src="../32L68+3id2"L68+.ie_reshrla)-l1sICH_Ifpsetrl>.NODE:2+.662hrl3ealue4.1img 2src="../32L69+36d2"L49+.68b&.683hrla} nux/drive+code==".x_pc">" ue="..ock_thrla cux/drdrive+code=dev"lueg x_pc">hrla3ealue4.1img 2src="../32L70+37d2"L50+g x_pc">hrla3ealue4.1img 2src="../32L71+3id2"L71+.ie_reshrla)-l1sICH_V5trl>.NODE:2+.662hrl3ealue4.1img 2src="../32L72+37d2"L82+.68b&.683hrla} nux/drive+code==".x_pc">" ue="..ock_thrla cux/drdrive+code=dev"lue.65>gethrla)( aruct nux/+>.65>geth7forVde=request"lueg x_pc">hrla3ealue4.1img 2src="../32L73+37d2"L73+g x_pc">hrla3ealue4.1img 2src="../32L74+3742"L71+.ie_reshrla)-l1sICH_V6trl>.NODE:2+.662hrl3ealue4.1img 2src="../32L75+37d2"L65+.68b&.683hrla} nux/drive+code==".x_pc">" ue="..ock_thrla cux/drdrive+code=dev"lueg x_pc">hrla3ealue4.1img 2src="../32L76+37d2"L86+g x_pc">hrla3ealue4.1img 2src="../32L77+3772"L71+.ie_reshrla)-l1sICH_V7trl>.NODE:2+.662hrl3ealue4.1img 2src="../32L78+37id2"L8+.67+>.68b&.683hrla} nux/drive+code==".x_pc">" ue="..ock_thrla cux/drdrive+code=dev"lueg x_pc">hrla3ealue4.1img 2src="../32L79+37d2"L49+g x_pc">hrla3ealue4.1img 2src="../32L80+3802"L71+.ie_reshrla)-l1sICH_V9trl>.NODE:2+.662hrl3ealue4.1img 2src="../32L81+38d2"L51+.682hr+>.643hr unsignedinux/dform code==".x_pc">" ue="..ock_thrla cux/drdrive+code=dev"luegethrla)( aruct nux/df9r6 ri7forVde=request"lueg x_pc">hrla3ealue4.1img 2src="../32L82+38d2"L82+g x_pc">hrla3ealue4.1img 2src="../32L83+3id2"L83+.ie_reshrla)-l1sICH_V10CORPtrl>.NODE:2+.662hrl3ealue4.1img 2src="../32L84+3id2"L84+.682hr+>.643hr unsignedinux/dform code==".x_pc">" ue="..ock_thrla cux/drdrive+code=dev"luegethrla)( aruct nux/df10_corp>geth7forVde=request"lueg x_pc">hrla3ealue4.1img 2src="../32L85+38d2"L65+g x_pc">hrla3ealue4.1img 2src="../32L86+3862"L83+.ie_reshrla)-l1sICH_V10CONStrl>.NODE:2+.662hrl3ealue4.1img 2rrc="../32L87+38d2"L17+.682hr+>.643hr unsignedinux/dform code==".x_pc">" ue="..ock_thrla cux/drdrive+code=dev"luegethrla)( aruct nux/df10_cono>geth7forVde=request"lueg x_pc">hrla3ealue4.1img 2rrc="../32118+38id2"L8+g x_pc">hrla3ealue4.1img 2src="../32879+38d2"L49+.662hrl3ealue4.1img 29rc="../32980+39d2"L50+.679hr+>.643h> ? 0 :b-alt=" int nux/dENODEVde=request"lueg x_pc">hrla3ealue4.1img 29rc="../32981+39d2"L51+alue4.1img 29rc="../32982+3id2"L82+.662hrl3ealue4.1img 29rc="../32983+39d2"L53+" ueg x_pc">hrla3ealue4.1img 29rc="../32984+39d2"L54+="..ock_thrla cresdri">x/dgoode=get"lue.ie_reshrla)-l1sIORESOURCE_>.nux/eorm in1e+.ie_reshrla)-l1sICH_REStrl>.usessVde=request"lueg x_pc">hrla3e.68b&.683hrla} nux/drive+code==".x_pc">" ue="..ock_thrla cux/drive+code=rive+code=get"lue_mmmmusesive+code=desc" ue="..ock_thrla cux/drive+codeVde=request"lueg x_pc">hrla3e" uedire/writ_outseode=reqve+ciono2"L3lr_chip"lue="..ock_thrla cresdri">x/dgeoe=get"luex/dgede=request"lueg x_pc">hrla3ealue4.1img 19rc="../31987+39d2"L17+.68b&.683hrla} nux/drive+code==".x_pc">" ue="..ock_thrla cux/drive+codesVde=request"lueg x_pc">hrla3ealue4.1img 19rc="../3L9#L839id2"L8+> alrthrla3ealue4.1img 19rc="../3L119+39d2"L49+.6errie_reshrla)-l1serrNODEVde=request"lueg x_pc">hrla4ealue4.1img 20rc="../42110+40d2"L70+.63n> l4ealue4.1img 20rc="../42011+4012"L65+.68b&.683hrla} nux/drive+code==".x_pc">" ue="..ock_thrla coutseri">NODE>" ue="..ock_thrla cresdri">x/dgVde=request"lueg x_pc">hrla4e2ux/driv4.c">alue4.1img 29rc="../42012+40d2"L82+.662hrl4ealue4.1img 20rc="../42013+40d2"L83+.643rmc > *7 er o> *8-paradm* dynam=" */="lxr_4ealue4.1img 20rc="../42014+40d2"L74+/bi,odetermmg hrlach/Ohrlaresheir ACPruct nux/dform rive+code=desc" uegethrla)( aruct nux/df9r6 ri7form rive+code=desc" in29+/bi,o5etermmg he==".x_pc">" ue * /psetommen+alue4.eded toalue4.formg 2rrc="8+/bi,o6etermmg he/writ_outse;aramsrode=42"L1440,byomme "> * LVL/bi=s 0 er o1.momenommid2"L5rc="some/drivsets.639hrlach">alue<4uct nux/d4orm rive+code=desc" ueGP2 alwaysgic i 0 oneform dri">dire/w4uealdriv3.c">alue4.1imgealucode=ng sr"luealum drx_pc">hrlapealue4.1img 2sse"lue.6errie_r4v3.c">alu44.1img 2src="../32L10+3142"L7040 x_pc">hrla4ea==".x_pc">" ue.662hrl4ealue441img 2src="../32111+3id24L11+<4e.635 series, 6 se4ies, 344h4series, 33hrC24hrseries64ormc 41.ock_thrla coutseri">NODE>" 2src="../32L59+35d2"L19+.ie_reshrla)-l1sIORESOURCE_>.nux/eorm in1e+.ie_reshrla)-l1sICH_REStrl>.usessVde=request"lueg x_pc">hrla3e.41>> alrthrla3ealue4.12src="../32L59+35d2"L19+.ie_4ue.nux/eorm r_warmg 2src="../32L6 r_warmORESOU6 of dri">GPstring">L79+="..ock_thrla cux/hrla3ea==".x_pc">" ue.662hrl4e.662hrl3edire/writ_outseode=4eqve+41.6_mmmmie_res4++conot c4ar sr_chip"luex/d..ock_thrla cresdri">x/dgive+code=chip"lueICHX_1="../32L59+35d2"L19+dire/wx/hrla3eICHX_1="../32L59+35d2"L19+alue4.1img ssrc="../32L19+3id4"L19+412"L3[re"lueg x_pc">hrla3ealue4.1img 19rc="../31987+39d2"L17+.ie_4u3.c">alu4O_LVL"lue4rla3e41i">="..ock_thrla cux/drdrive+code=de r_warmg 2src="../32L6 r_warmORESOU6 of dri">GPstring">L79+alue441img 2src="../32L21+32d24L81+<42ODEV">g x_pc">hrla3ea==".x_pc">" ue.662hrl4ex/dgode=91"L82+>.682h4+>res422"L82+.662hrl3e.643rmc > *7 er o>.c">alue441img 2src="../32L24+3id24L24+<42orm drsrb&.683hrla} nux/imgealucode=ng sr"luealue4.1img ="../32L59+35d2"L19+.68b&.683hrla} n4..ock_thr4a cux/drive+code=use_g s4"lue<4orm inea==".x_pc">" ue.679hr+>.643h> ? 4ehrla3ealu42onoform dri">dire/writ_outseses porm /drive+code=g sr_chip"lueg sr_chiphr cuusessVde=request"lueg x_pc">hrla3ealue4.1img 29r="../#2L42+alucode=ng sr"lueresh+g x_pc"+g x_pc">hrla3ealue4.1img 29r="../#2L42+alue4e+clen2hr.ock_thrla c+>.48e+cl423ealue4.1img 19rc="../3L119+39d2"L49+.ie_4/drivverr4e_reshrla)-l1sre/drivver4NODEV4e=request"luedrdrive+code=de r_../3L119+39d2"L49+ r_../ORESOU6 of dri">GPstring">L79+alue4.1img 2src="../34L31+343ODEV">g x_pc">hrla3eae+c_../3L119+39d2"L49+e+c_../hrla3e<4x/driv3.c">alue4.1img 2s4c="..432"L82+.662hrl3ealue441img 2src="../32L33+3id24L3 dr4"lib>e+cueare/drivverrie_reshrla)-l1sre/d4ivverrNOD4:2+.43orm drsrb&.683hrla} nux/ r_uest"lueg r_uestORESOU6 of dri">GPstring">L79+g x_pc">hrla3ealue4.1img 29r="../#2L42+alue4.1img 29rrbase"luemodparam in2e+++++++++++++++++++++++++in1e+4eise al>a4uyetheto ced e+ciono,+="..ock_thrla cuxla3eg x_pc">hrla3ealue4.1img 29r="../#2L42+alue4.1img 29rrbase"luemodparadN]etam_g srbase"lg x_pc">hrla3ealue4.1img 29r="../#2L42+alue4.1img 29rmg 2src="../32L14+3id2"L11+d4re/wx43.685hrlaprob>="..4..ock_thr4a cux/drive+code=use_g s4"lue<4orm in1e+.662hrl3ehrla3ealu43form dri">dire/w4hr.ock_th4la cuxleiseve+cion2"L3li41e+ae+c_../3L119+39d2"L49+e+c_../.679hr+>.643h> ? 4+>.68e+cl4n2hr.ock_thrla c+>.68e+c4en2"L4[re"lue="..ock_thrlrb unsigneresourc0uses sr_chip"lue="..ock_thrutseri">NODE>" ue="..ock_thrla cresdri">x/dgVde=request"lueg x_pc">hrla4e2uhrla3eg x_pc">hrla3ealue4.1img 29r1img 19rc="../3L9#L839id2"L8+alue4.1img 2src="../34L41+34d2"L31+alue4.1img 19rc="imgealucode=ng sr"lue.6errie_r4 int nBUS4NODEVde=request"lueg 4436"L31resdri">="..ock_thrla cresdri">x/dgive+code=chip"lueICimgealucode=ng sr"luedire/wx/h in2e+rm in2e+.6errie_r4 c">alue44.1img 2src="../32L43+34d4"L73+44re"luedire/wx/dNrla3eICimgealucode=ng sr"lue.63n> l4edire/writ_outseodl4iseve44e.665> l3ealue4.1img 2src="../32L46+34d4"L16+44.685hrlaprob>="..4dNULde=GP4O_LVL"lue4rla3e44ono2"L3luee+cuearesourc0m drsmovc="../42012+40d2esourc0m drsmovc-l1tadre_reshrla)-lp1spnux/sr"lue> alrthrla3ealue4.1img 2src="../32L57+35d2"L37+alue441img 2src="../32L48+3id24L48+<44ee+cuearesourc0m drsrb4/dNode=c 4n1e+alue4.1img 2src="../32L60+3602"L58+e+cuealpc_c">_mmmmie_4..ock_thr4a cux/drive+code=use_g s4"lue<44.643hr.ock_thrla 4ehrla3ealu44.1img 2src=".code=ng sr"lueresh+g x_pc">hrla3ealue4.1img 29r="../#2L42+="..ock_thrla ue4.1img 19rc="../3L119+39d2"L49+.ie_4+>.68e+cl4n2hr.ock_thrla c+>.68e+c4en2"L4[re"luev_../3L119+39d2"L49+f>v_../hiphr cuusessVde=request"mcm_dhrg x_pc">, U6 of dri">GPstring">L79+.ie_4+vverrNOD4c">alue4.1img 2src="../34L54+345"../32L74+3742"L71+GPstring">L79+="..ock_thrla cux/+.63n> l4ealue441img 2src="../32L56+35d24L36+<45ck_thrla cux/m in29+.662hrl3e.685hrlaprob>2"L3lue.6_mmmmie_res43.c">alue4.1img 2src="../32L58+3id4"L58+451spnux/dn>alucode=ng sr"lue<="..ock_thrlrb unsigneresourc0uses sr_chip"lue="..ock_thrutseri">NODE>" ue="..ock_thrla cresdri">x/dgVde=request"lueg x_pc">hrla4e2uhrla3eg x_pc">hrla3ealue4.1img 29r1img 19rc="../3L9#L839id2"L8+alue4.1img 19rc="imgealucode=ng sr"lue.6errie_r4rrNODEVde4request"lueg x_4c">hr45=request"luedrdrive+code=de>x/dgive+code=chip"lueICimgealucode=ng sr"luedire/wx/h in2e+rm in2e+.6errie_r4eshrla)-l4slpc_c">_mmmmuses sr_chi4"lue<46.1img 2src="../32L51+3id2"L51ENODEV">drdrive+code=de>x)-l1sI_sizICimgealucode=ng sr"luealue441img 2src="../32L62+36d24L72+<4e.64_mmmmie_reshrl4)-l1sc">_4mmmusessr"lue> alrthrla3e+.662hrl3e.662hrl3ealue441img 2src="../32L65+3id24L65+<4e.68b&.683hrla} n4x/drive+c4de==".x_pc">" ue=".4ock_thrla)( aruct nux/+>.65>geth7forthrla3e.amp;x30,f)>> alrthrla3e.> alrcode=ng sr"lue<="..ock_thu31+>.amp;x30,f)>> al="..ock_thu31+>._chip"lise ode=desc" ue.ie_4.c">alue441img 2src="../32L67+36d24L17+<46rm in1e+.amp;x30,f)>> alu31+>._chippppppppp"lise ode=desc" ue.ie_4..c">alue4>_mmmmusesive+code=desc"4ue" ue.amp;x30,f)>> alown>.e==".x"lueTHIS_MODUL+.6errie_r4ensignere4sICH_Ifpsetrl>.NODE:2+alue4.1img 29rm"../31987+39d2"L17+DRV_NAM+.6errie_r4erNODEVde4drive+code==".x_pc">" ue4form 4ri">="..ock_thrm in2e+.662hrlaehr4a3ealue4.1i4g 2sr47"L79+>3ealue4.1ilatrmcm_devic0uses s="..ock_thlatrmcm_devic0uses sr_chip"lue.662hrlaealue44H_V5trl>.NODE:2+.66for6 dri">rive+codmovc="../42012+40d2rsmovchiphform dri+"lue="..ock_thrsmovc="../42012+40d2esourc0m drsmovc-l1tm in2e+.662hrlae_4drive+code==".x_pc">" ue4form 4ri">="rm in2e+.665> l3ehr4a3ealue4.1i4g 2sr47.685hvoiauxleisev4rla)-l1sI4H_V6trl>.NODE:2+module_rthrla3e.amp;x30,f)>> almodule_rthrla3e.-l1tar x/dgo dri">ICimge.amp;x30,f)>> al="..ock_thu31+>._chirm in2e+" ue4form 47.685hrlaprob>="..4 x_pc">hr4a3ealue4.1i4g 2sr4="../3r x/dgo dri">ICMODUL+_AUTHORamp;x30,f)>> alMODUL+_AUTHORORESOU6 of dri">GPstring">L79+aluptys9r@xes-inc.comt_e+L79+.NODE:2+ICMODUL+_DESCRIPTIONamp;x30,f)>> alMODUL+_DESCRIPTIONORESOU6 of dri">GPstring">L79+" ue4form 4736"L3eaMODUL+_LICENS+GPstring">L79+alue4.1i4g 2sr4="../3r x/dgo dri">ICMODUL+_ALIASamp;x30,f)>> alMODUL+_ALIASORESOU6 of dri">GPstring">L79+.NODE:2+
.NOfoo2"r"> The original LXR softwaluebymg 2r in1e+LXR 2 alunity4e2uhrthis exp22"lwayal 2"L68+lxr@DE:ux.non>alu
.NOsubfoo2"r"> lxr.DE:ux.no kindly horc=".bym in1e+Redpill LE:pro ASORES, provid9r of LE:ux+codeulting../32op22a)(alue122/driue1ince 1995.