linux/drivers/cpufreq/cpufreq-cpu0.c
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   1/*
   2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
   3 *
   4 * The OPP code in function cpu0_set_target() is reused from
   5 * drivers/cpufreq/omap-cpufreq.c
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 as
   9 * published by the Free Software Foundation.
  10 */
  11
  12#define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  13
  14#include <linux/clk.h>
  15#include <linux/cpu.h>
  16#include <linux/cpufreq.h>
  17#include <linux/err.h>
  18#include <linux/module.h>
  19#include <linux/of.h>
  20#include <linux/opp.h>
  21#include <linux/regulator/consumer.h>
  22#include <linux/slab.h>
  23
  24static unsigned int transition_latency;
  25static unsigned int voltage_tolerance; /* in percentage */
  26
  27static struct device *cpu_dev;
  28static struct clk *cpu_clk;
  29static struct regulator *cpu_reg;
  30static struct cpufreq_frequency_table *freq_table;
  31
  32static int cpu0_verify_speed(struct cpufreq_policy *policy)
  33{
  34        return cpufreq_frequency_table_verify(policy, freq_table);
  35}
  36
  37static unsigned int cpu0_get_speed(unsigned int cpu)
  38{
  39        return clk_get_rate(cpu_clk) / 1000;
  40}
  41
  42static int cpu0_set_target(struct cpufreq_policy *policy,
  43                           unsigned int target_freq, unsigned int relation)
  44{
  45        struct cpufreq_freqs freqs;
  46        struct opp *opp;
  47        unsigned long freq_Hz, volt = 0, volt_old = 0, tol = 0;
  48        unsigned int index, cpu;
  49        int ret;
  50
  51        ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
  52                                             relation, &index);
  53        if (ret) {
  54                pr_err("failed to match target freqency %d: %d\n",
  55                       target_freq, ret);
  56                return ret;
  57        }
  58
  59        freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  60        if (freq_Hz < 0)
  61                freq_Hz = freq_table[index].frequency * 1000;
  62        freqs.new = freq_Hz / 1000;
  63        freqs.old = clk_get_rate(cpu_clk) / 1000;
  64
  65        if (freqs.old == freqs.new)
  66                return 0;
  67
  68        for_each_online_cpu(cpu) {
  69                freqs.cpu = cpu;
  70                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  71        }
  72
  73        if (cpu_reg) {
  74                rcu_read_lock();
  75                opp = opp_find_freq_ceil(cpu_dev, &freq_Hz);
  76                if (IS_ERR(opp)) {
  77                        rcu_read_unlock();
  78                        pr_err("failed to find OPP for %ld\n", freq_Hz);
  79                        return PTR_ERR(opp);
  80                }
  81                volt = opp_get_voltage(opp);
  82                rcu_read_unlock();
  83                tol = volt * voltage_tolerance / 100;
  84                volt_old = regulator_get_voltage(cpu_reg);
  85        }
  86
  87        pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
  88                 freqs.old / 1000, volt_old ? volt_old / 1000 : -1,
  89                 freqs.new / 1000, volt ? volt / 1000 : -1);
  90
  91        /* scaling up?  scale voltage before frequency */
  92        if (cpu_reg && freqs.new > freqs.old) {
  93                ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  94                if (ret) {
  95                        pr_err("failed to scale voltage up: %d\n", ret);
  96                        freqs.new = freqs.old;
  97                        return ret;
  98                }
  99        }
 100
 101        ret = clk_set_rate(cpu_clk, freqs.new * 1000);
 102        if (ret) {
 103                pr_err("failed to set clock rate: %d\n", ret);
 104                if (cpu_reg)
 105                        regulator_set_voltage_tol(cpu_reg, volt_old, tol);
 106                return ret;
 107        }
 108
 109        /* scaling down?  scale voltage after frequency */
 110        if (cpu_reg && freqs.new < freqs.old) {
 111                ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
 112                if (ret) {
 113                        pr_err("failed to scale voltage down: %d\n", ret);
 114                        clk_set_rate(cpu_clk, freqs.old * 1000);
 115                        freqs.new = freqs.old;
 116                        return ret;
 117                }
 118        }
 119
 120        for_each_online_cpu(cpu) {
 121                freqs.cpu = cpu;
 122                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 123        }
 124
 125        return 0;
 126}
 127
 128static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
 129{
 130        int ret;
 131
 132        if (policy->cpu != 0)
 133                return -EINVAL;
 134
 135        ret = cpufreq_frequency_table_cpuinfo(policy, freq_table);
 136        if (ret) {
 137                pr_err("invalid frequency table: %d\n", ret);
 138                return ret;
 139        }
 140
 141        policy->cpuinfo.transition_latency = transition_latency;
 142        policy->cur = clk_get_rate(cpu_clk) / 1000;
 143
 144        /*
 145         * The driver only supports the SMP configuartion where all processors
 146         * share the clock and voltage and clock.  Use cpufreq affected_cpus
 147         * interface to have all CPUs scaled together.
 148         */
 149        policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
 150        cpumask_setall(policy->cpus);
 151
 152        cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
 153
 154        return 0;
 155}
 156
 157static int cpu0_cpufreq_exit(struct cpufreq_policy *policy)
 158{
 159        cpufreq_frequency_table_put_attr(policy->cpu);
 160
 161        return 0;
 162}
 163
 164static struct freq_attr *cpu0_cpufreq_attr[] = {
 165        &cpufreq_freq_attr_scaling_available_freqs,
 166        NULL,
 167};
 168
 169static struct cpufreq_driver cpu0_cpufreq_driver = {
 170        .flags = CPUFREQ_STICKY,
 171        .verify = cpu0_verify_speed,
 172        .target = cpu0_set_target,
 173        .get = cpu0_get_speed,
 174        .init = cpu0_cpufreq_init,
 175        .exit = cpu0_cpufreq_exit,
 176        .name = "generic_cpu0",
 177        .attr = cpu0_cpufreq_attr,
 178};
 179
 180static int cpu0_cpufreq_driver_init(void)
 181{
 182        struct device_node *np;
 183        int ret;
 184
 185        np = of_find_node_by_path("/cpus/cpu@0");
 186        if (!np) {
 187                pr_err("failed to find cpu0 node\n");
 188                return -ENOENT;
 189        }
 190
 191        cpu_dev = get_cpu_device(0);
 192        if (!cpu_dev) {
 193                pr_err("failed to get cpu0 device\n");
 194                ret = -ENODEV;
 195                goto out_put_node;
 196        }
 197
 198        cpu_dev->of_node = np;
 199
 200        cpu_clk = clk_get(cpu_dev, NULL);
 201        if (IS_ERR(cpu_clk)) {
 202                ret = PTR_ERR(cpu_clk);
 203                pr_err("failed to get cpu0 clock: %d\n", ret);
 204                goto out_put_node;
 205        }
 206
 207        cpu_reg = regulator_get(cpu_dev, "cpu0");
 208        if (IS_ERR(cpu_reg)) {
 209                pr_warn("failed to get cpu0 regulator\n");
 210                cpu_reg = NULL;
 211        }
 212
 213        ret = of_init_opp_table(cpu_dev);
 214        if (ret) {
 215                pr_err("failed to init OPP table: %d\n", ret);
 216                goto out_put_node;
 217        }
 218
 219        ret = opp_init_cpufreq_table(cpu_dev, &freq_table);
 220        if (ret) {
 221                pr_err("failed to init cpufreq table: %d\n", ret);
 222                goto out_put_node;
 223        }
 224
 225        of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
 226
 227        if (of_property_read_u32(np, "clock-latency", &transition_latency))
 228                transition_latency = CPUFREQ_ETERNAL;
 229
 230        if (cpu_reg) {
 231                struct opp *opp;
 232                unsigned long min_uV, max_uV;
 233                int i;
 234
 235                /*
 236                 * OPP is maintained in order of increasing frequency, and
 237                 * freq_table initialised from OPP is therefore sorted in the
 238                 * same order.
 239                 */
 240                for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
 241                        ;
 242                rcu_read_lock();
 243                opp = opp_find_freq_exact(cpu_dev,
 244                                freq_table[0].frequency * 1000, true);
 245                min_uV = opp_get_voltage(opp);
 246                opp = opp_find_freq_exact(cpu_dev,
 247                                freq_table[i-1].frequency * 1000, true);
 248                max_uV = opp_get_voltage(opp);
 249                rcu_read_unlock();
 250                ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
 251                if (ret > 0)
 252                        transition_latency += ret * 1000;
 253        }
 254
 255        ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
 256        if (ret) {
 257                pr_err("failed register driver: %d\n", ret);
 258                goto out_free_table;
 259        }
 260
 261        of_node_put(np);
 262        return 0;
 263
 264out_free_table:
 265        opp_free_cpufreq_table(cpu_dev, &freq_table);
 266out_put_node:
 267        of_node_put(np);
 268        return ret;
 269}
 270late_initcall(cpu0_cpufreq_driver_init);
 271
 272MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
 273MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
 274MODULE_LICENSE("GPL");
 275
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