linux/drivers/edac/i82875p_edac.c
<<
3.10 3.10 3.o/spa> 3.ospa> class="lxr_search">3.10="+search" method="post" onsubmit="return do_search(this);">3.10 phidden" nam> pnavtarget" 2> p">3.10 ptext" nam> psearch" id psearch">3.10 typ> psubmit">Search 3.ospa> class="lxr_prefs" 3.10 3.o/spa> 10 < ="ajax+*" method="post" onsubmit="return false;">3.oinput typ> phidden" nam> pajax_lookup" id pajax_lookup" 2> p">310 <
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pL1">< <1o/a>ospa> class="comment">/*o/spa>
 
pL2">< <2o/a>ospa> class="comment"> * Intel D82875P Memory Controller kernel moduleo/spa>
 
pL3">< <3o/a>ospa> class="comment"> * (C) 2003 Linux Networx (http://lnxi.com)o/spa>
 
pL4">< <4o/a>ospa> class="comment"> * This file may be distributed under the terms of theo/spa>
 
pL5">< <5o/a>ospa> class="comment"> * GNU General Public License.o/spa>
 
pL6">< <6o/a>ospa> class="comment"> *o/spa>
 
pL7">< <7o/a>ospa> class="comment"> * Written by Thayne Harbaugho/spa>
 
pL8">< <8o/a>ospa> class="comment"> * Contributors:o/spa>
 
pL9">< <9o/a>ospa> class="comment"> *      Wang Zhenyu at intel.como/spa>
 
pL10"><   v3a>ospa> class="comment"> *o/spa>
 
pL11">< 11o/a>ospa> class="comment"> * $Id: edac_i82875p.c,v 1.
  	1
 2005/10/05 00:43:44 dsp_llnl Exp $o/spa>
 
pL12">< 12o/a>ospa> class="comment"> *o/spa>
 
pL13">< 13o/a>ospa> class="comment"> * Note: E7210 appears sam> as D82875P - zhenyu.z.wang at intel.como/spa>
 
pL14">< 14o/a>ospa> class="comment"> */o/spa>
 
pL15">< 15o/a> 
pL16">< 16o/a>#include <linux/module.ho/a>> 
pL17">< 17o/a>#include <linux/init.ho/a>> 
pL18">< 18o/a>#include <linux/pci.ho/a>> 
pL19">< 19o/a>#include <linux/pci_ids.ho/a>> 
pL20">< 20o/a>#include <linux/edac.ho/a>> 
pL21">< 21o/a>#include "edac_core.ho/a>" 
pL22">< 22o/a> 
pL23">< 23o/a>#defineI82875P_REVISIONo/a>        ospa> class="string">" Ver: 2.0.2"
 
pL24">< 24o/a>#defineEDAC_MOD_STRo/a>            ospa> class="string">"i82875p_edac"
 
pL25">< 25o/a> 
pL26">< 26o/a>#definei82875p_printko/a>(oa href="+code=level" class="sref">levelo/a>,fmto/a>,argo/a>...) \ 
pL27">< 27o/a>        oa href="+code=edac_printk" class="sref">edac_printko/a>(oa href="+code=level" class="sref">levelo/a>, class="string">"i82875p"
,fmto/a>,<##arg) 
pL28">< 28o/a> 
pL29">< 29o/a>#definei82875p_mc_printko/a>(oa href="+code=mci" class="sref">mcio/a>,levelo/a>,fmto/a>,argo/a>...) \ 
pL30">< 30o/a>        oa href="+code=edac_mc_chipset_printk" class="sref">edac_mc_chipset_printko/a>(oa href="+code=mci" class="sref">mcio/a>,levelo/a>, class="string">"i82875p"
,fmto/a>,<##arg) 
pL31">< 31o/a> 
pL32">< 32o/a>#ifndefPCI_DEVICE_ID_INTEL_82875_0o/a> 
pL33">< 33o/a>#definePCI_DEVICE_ID_INTEL_82875_0o/a>     0x2578 
pL34">< 34o/a>#endif                          ospa> class="comment">/* PCI_DEVICE_ID_INTEL_82875_0 */o/spa>
 
pL35">< 35o/a> 
pL36">< 36o/a>#ifndefPCI_DEVICE_ID_INTEL_82875_6o/a> 
pL37">< 37o/a>#definePCI_DEVICE_ID_INTEL_82875_6o/a>     0x257e 
pL38">< 38o/a>#endif                          ospa> class="comment">/* PCI_DEVICE_ID_INTEL_82875_6 */o/spa>
 
pL39">< 39o/a> 
pL40">< 4 v3a>ospa> class="comment">/* four csrows in dual channel, eight in single channel */o/spa>
 
pL41">< 41o/a>#defineI82875P_NR_DIMMSo/a>                8 
pL42">< 42o/a>#defineI82875P_NR_CSROWSo/a>(oa href="+code=nr_chans" class="sref">nr_chanso/a>)     (oa href="+code=I82875P_NR_DIMMS" class="sref">I82875P_NR_DIMMSo/a> / (oa href="+code=nr_chans" class="sref">nr_chanso/a>)) 
pL43">< 43o/a> 
pL44">< 44o/a>ospa> class="comment">/* Intel 82875p register addresses - device 0 funcion> 0 - DRAM Controller */o/spa>
 
pL45">< 45o/a>#defineI82875P_EAPo/a>             0x58    ospa> class="comment">/* Error Address Pointer (32b)o/spa>
 
pL46">< 46o/a>ospa> class="comment">                                         *o/spa>
 
pL47">< 47o/a>ospa> class="comment">                                         * 31:12 block addresso/spa>
 
pL48">< 48o/a>ospa> class="comment">                                         * 11:0  reservedo/spa>
 
pL49">< 49o/a>ospa> class="comment">                                         */o/spa>
 
pL50">< 50o/a> 
pL51">< 51o/a>#defineI82875P_DERRSYNo/a>         0x5c    ospa> class="comment">/* DRAM Error Syndrome (8b)o/spa>
 
pL52">< 52o/a>ospa> class="comment">                                         *o/spa>
 
pL53">< 53o/a>ospa> class="comment">                                         *  7:0  DRAM ECC Syndromeo/spa>
 
pL54">< 54o/a>ospa> class="comment">                                         */o/spa>
 
pL55">< 55o/a> 
pL56">< 56o/a>#defineI82875P_DESo/a>             0x5d    ospa> class="comment">/* DRAM Error Status (8b)o/spa>
 
pL57">< 57o/a>ospa> class="comment">                                         *o/spa>
 
pL58">< 58o/a>ospa> class="comment">                                         *  7:1  reservedo/spa>
 
pL59">< 59o/a>ospa> class="comment">                                         *  0    Error channel 0/1o/spa>
 
pL60">< 6 v3a>ospa> class="comment">                                         */o/spa>
 
pL61">< 61o/a> 
pL62">< 62o/a>#defineI82875P_ERRSTSo/a>          0xc8    ospa> class="comment">/* Error Status Register (16b)o/spa>
 
pL63">< 63o/a>ospa> class="comment">                                         *o/spa>
 
pL64">< 64o/a>ospa> class="comment">                                         * 15:10 reservedo/spa>
 
pL65">< 65o/a>ospa> class="comment">                                         *  9    non-DRAM lock error (ndlock)o/spa>
 
pL66">< 66o/a>ospa> class="comment">                                         *  8    Sftwr Generated SMIo/spa>
 
pL67">< 67o/a>ospa> class="comment">                                         *  7    ECC UEo/spa>
 
pL68">< 68o/a>ospa> class="comment">                                         *  6    reservedo/spa>
 
pL69">< 69o/a>ospa> class="comment">                                         *  5    MCH detects unimplemented cycleo/spa>
 
pL70">< 7 v3a>ospa> class="comment">                                         *< 4    AGP access outside GAo/spa>
 
pL71">< 71o/a>ospa> class="comment">                                         *< 3    Invalid AGP accesso/spa>
 
pL72">< 72o/a>ospa> class="comment">                                         *  2    Invalid GA translaion> tableo/spa>
 
pL73">< 73o/a>ospa> class="comment">                                         *  1    Unsupported AGP commando/spa>
 
pL74">< 74o/a>ospa> class="comment">                                         *  0    ECC CEo/spa>
 
pL75">< 75o/a>ospa> class="comment">                                         */o/spa>
 
pL76">< 76o/a> 
pL77">< 77o/a>#defineI82875P_ERRCMDo/a>          0xca    ospa> class="comment">/* Error Command (16b)o/spa>
 
pL78">< 78o/a>ospa> class="comment">                                         *o/spa>
 
pL79">< 79o/a>ospa> class="comment">                                         * 15:10 reservedo/spa>
 
pL80">< 8 v3a>ospa> class="comment">                                         *< 9    SERR n> non-DRAM locko/spa>
 
pL81">< 81o/a>ospa> class="comment">                                         *< 8    SERR n> ECC UEo/spa>
 
pL82">< 82o/a>ospa> class="comment">                                         *  7    SERR n> ECC CEo/spa>
 
pL83">< 83o/a>ospa> class="comment">                                         *  6    target abort n> high excetion>o/spa>
 
pL84">< 84o/a>ospa> class="comment">                                         *  5    detect unimplemented cyco/spa>
 
pL85">< 85o/a>ospa> class="comment">                                         *  4    AGP access outside of GAo/spa>
 
pL86">< 86o/a>ospa> class="comment">                                         *  3    SERR n> invalid AGP accesso/spa>
 
pL87">< 87o/a>ospa> class="comment">                                         *  2    invalid translaion> tableo/spa>
 
pL88">< 88o/a>ospa> class="comment">                                         *  1    SERR n> unsupported AGP commando/spa>
 
pL89">< 89o/a>ospa> class="comment">                                         *  0    reservedo/spa>
 
pL90">< 9 v3a>ospa> class="comment">                                         */o/spa>
 
pL91">< 91o/a> 
pL92">< 92o/a>ospa> class="comment">/* Intel 82875p register addresses - device 6 funcion> 0 - DRAM Controller */o/spa>
 
pL93">< 93o/a>#defineI82875P_PCICMD6o/a>         0x04    ospa> class="comment">/* PCI Command Register (16b)o/spa>
 
pL94">< 94o/a>ospa> class="comment">                                         *o/spa>
 
pL95">< 95o/a>ospa> class="comment">                                         * 15:10 reservedo/spa>
 
pL96">< 96o/a>ospa> class="comment">                                         *  9    fast back-to-back - ro 0o/spa>
 
pL97">< 97o/a>ospa> class="comment">                                         *  8    SERR enable - ro 0o/spa>
 
pL98">< 98o/a>ospa> class="comment">                                         *  7    addr/data stepping - ro 0o/spa>
 
pL99">< 99o/a>ospa> class="comment">                                         *  6    parity err enable - ro 0o/spa>
 
pL100"><100o/a>ospa> class="comment">                                         *  5    VGA palette snoop - ro 0o/spa>
 
pL101"><101o/a>ospa> class="comment">                                         *< 4    mem wr & invalidate - ro 0o/spa>
 
pL102"><102o/a>ospa> class="comment">                                         *  3    special cycle - ro 0o/spa>
 
pL103"><103o/a>ospa> class="comment">                                         *  2    bus master - ro 0o/spa>
 
pL104"><104o/a>ospa> class="comment">                                         *  1    mem access dev6 - 0(dis),1(en)o/spa>
 
pL105"><105o/a>ospa> class="comment">                                         *  0    IO access dev3 - 0(dis),1(en)o/spa>
 
pL106"><106o/a>ospa> class="comment">                                         */o/spa>
 
pL107"><107o/a> 
pL108"><108o/a>#defineI82875P_BAR6o/a>            0x10    ospa> class="comment">/* Mem Delays Base ADDR Reg (32b)o/spa>
 
pL109"><109o/a>ospa> class="comment">                                         *o/spa>
 
pL110"><1  v3a>ospa> class="comment">                                         * 31:12 mem base addr [31:12]o/spa>
 
pL111"><111o/a>ospa> class="comment">                                         * 11:4  address mask - ro 0o/spa>
 
pL112"><112o/a>ospa> class="comment">                                         *  3    prefetchable - ro 0(non),1(pre)o/spa>
 
pL113"><113o/a>ospa> class="comment">                                         *  2:1  mem typ> - ro 0o/spa>
 
pL114"><114o/a>ospa> class="comment">                                         *  0    mem spac> - ro 0o/spa>
 
pL115"><115o/a>ospa> class="comment">                                         */o/spa>
 
pL116"><116o/a> 
pL117"><117o/a>ospa> class="comment">/* Intel 82875p MMIO register spac> - device 0 funcion> 0 - MMR spac> */o/spa>
 
pL118"><118o/a> 
pL119"><119o/a>#defineI82875P_DRB_SHIFTo/a> 26    ospa> class="comment">/* 64MiB grain */o/spa>
 
pL120"><120o/a>#defineI82875P_DRBo/a>             0x00    ospa> class="comment">/* DRAM Row Boundary (8b x 8)o/spa>
 
pL121"><121o/a>ospa> class="comment">                                         *o/spa>
 
pL122"><122o/a>ospa> class="comment">                                         *  7    reservedo/spa>
 
pL123"><123o/a>ospa> class="comment">                                         *  6:0  64MiB row boundary addro/spa>
 
pL124"><124o/a>ospa> class="comment">                                         */o/spa>
 
pL125"><125o/a> 
pL126"><126o/a>#defineI82875P_DRAo/a>             0x10    ospa> class="comment">/* DRAM Row Attribute (4b x 8)o/spa>
 
pL127"><127o/a>ospa> class="comment">                                         *o/spa>
 
pL128"><128o/a>ospa> class="comment">                                         *  7    reservedo/spa>
 
pL129"><129o/a>ospa> class="comment">                                         *  6:4  row attr row 1o/spa>
 
pL130"><130o/a>ospa> class="comment">                                         *  3    reservedo/spa>
 
pL131"><131o/a>ospa> class="comment">                                         *< 2:0  row attr row 0o/spa>
 
pL132"><132o/a>ospa> class="comment">                                         *o/spa>
 
pL133"><133o/a>ospa> class="comment">                                         * 000 =  4KiBo/spa>
 
pL134"><134o/a>ospa> class="comment">                                         * 001 =  8KiBo/spa>
 
pL135"><135o/a>ospa> class="comment">                                         * 010 = 16KiBo/spa>
 
pL136"><136o/a>ospa> class="comment">                                         * 011 = 32KiBo/spa>
 
pL137"><137o/a>ospa> class="comment">                                         */o/spa>
 
pL138"><138o/a> 
pL139"><139o/a>#defineI82875P_DRCo/a>             0x68    ospa> class="comment">/* DRAM Controller Mode (32b)o/spa>
 
pL140"><14 v3a>ospa> class="comment">                                         *o/spa>
 
pL141"><141o/a>ospa> class="comment">                                         *<31:30 reservedo/spa>
 
pL142"><142o/a>ospa> class="comment">                                         * 29    init completeo/spa>
 
pL143"><143o/a>ospa> class="comment">                                         * 28:23 reservedo/spa>
 
pL144"><144o/a>ospa> class="comment">                                         * 22:21 nr chan 00=1,01=2o/spa>
 
pL145"><145o/a>ospa> class="comment">                                         * 20    reservedo/spa>
 
pL146"><146o/a>ospa> class="comment">                                         * 19:18 Data Integ Mode 00=none,01=ecco/spa>
 
pL147"><147o/a>ospa> class="comment">                                         * 17:11 reservedo/spa>
 
pL148"><148o/a>ospa> class="comment">                                         * 10:8  refresh modeo/spa>
 
pL149"><149o/a>ospa> class="comment">                                         *  7    reservedo/spa>
 
pL150"><150o/a>ospa> class="comment">                                         *  6:4  mode selecto/spa>
 
pL151"><151o/a>ospa> class="comment">                                         *< 3:2  reservedo/spa>
 
pL152"><152o/a>ospa> class="comment">                                         *  1:0  DRAM typ> 01=DDRo/spa>
 
pL153"><153o/a>ospa> class="comment">                                         */o/spa>
 
pL154"><154o/a> 
pL155"><155o/a>enumi82875p_chipso/a> { 
pL156"><156o/a>        oa href="+code=I82875P" class="sref">I82875Po/a> = 0, 
pL157"><157o/a>}; 
pL158"><158o/a> 
pL159"><159o/a>structi82875p_pvto/a> { 
pL160"><160o/a>        structpci_devo/a> *oa href="+code=ovrfl_pdev" class="sref">ovrfl_pdevo/a>; 
pL161"><161o/a>        void__iomemo/a> *oa href="+code=ovrfl_window" class="sref">ovrfl_windowo/a>; 
pL162"><162o/a>}; 
pL163"><163o/a> 
pL164"><164o/a>structi82875p_dev_infoo/a> { 
pL165"><165o/a>        const char *oa href="+code=ctl_nam>" class="sref">ctl_nam>o/a>; 
pL166"><166o/a>}; 
pL167"><167o/a> 
pL168"><168o/a>structi82875p_error_infoo/a> { 
pL169"><169o/a>        oa href="+code=u16" class="sref">u16o/a> oa href="+code=errsts" class="sref">errstso/a>; 
pL170"><170o/a>        oa href="+code=u32" class="sref">u32o/a> oa href="+code=eap" class="sref">eapo/a>; 
pL171"><171o/a>        oa href="+code=u8" class="sref">u8o/a> oa href="+code=des" class="sref">deso/a>; 
pL172"><172o/a>        oa href="+code=u8" class="sref">u8o/a> oa href="+code=derrsyn" class="sref">derrsyno/a>; 
pL173"><173o/a>        oa href="+code=u16" class="sref">u16o/a> oa href="+code=errsts2" class="sref">errsts2o/a>; 
pL174"><174o/a>}; 
pL175"><175o/a> 
pL176"><176o/a>static const structi82875p_dev_infoo/a> oa href="+code=i82875p_devs" class="sref">i82875p_devso/a>[] = { 
pL177"><177o/a>        [oa href="+code=I82875P" class="sref">I82875Po/a>] = { 
pL178"><178o/a>                .oa href="+code=ctl_nam>" class="sref">ctl_nam>o/a> = ospa> class="string">"i82875p"
}, 
pL179"><179o/a>}; 
pL180"><180o/a> 
pL181"><181o/a>static structpci_devo/a> *oa href="+code=mci_pdev" class="sref">mci_pdevo/a>;        ospa> class="comment">/* init dev: in case that AGP code haso/spa>
 
pL182"><182o/a>ospa> class="comment">                                         * already registered drivero/spa>
 
pL183"><183o/a>ospa> class="comment">                                         */o/spa>
 
pL184"><184o/a> 
pL185"><185o/a>static structedac_pci_ctl_infoo/a> *oa href="+code=i82875p_pci" class="sref">i82875p_pcio/a>; 
pL186"><186o/a> 
pL187"><187o/a>static voidi82875p_get_error_infoo/a>(structmem_ctl_infoo/a> *oa href="+code=mci" class="sref">mcio/a>, 
pL188"><188o/a>                                structi82875p_error_infoo/a> *oa href="+code=info" class="sref">infoo/a>) 
pL189"><189o/a>{ 
pL190"><190o/a>        structpci_devo/a> *oa href="+code=pdev" class="sref">pdevo/a>; 
pL191"><191o/a> 
pL192"><192o/a>        oa href="+code=pdev" class="sref">pdevo/a> = oa href="+code=to_pci_dev" class="sref">to_pci_devo/a>(oa href="+code=mci" class="sref">mcio/a>->oa href="+code=pdev" class="sref">pdevo/a>); 
pL193"><193o/a> 
pL194"><194o/a>        ospa> class="comment">/*o/spa>
 
pL195"><195o/a>ospa> class="comment">         * This is a mess because there is no atomic way to read all theo/spa>
 
pL196"><196o/a>ospa> class="comment">         * registers at once and the registers ca> transiion> from CE beingo/spa>
 
pL197"><197o/a>ospa> class="comment">         * overwritten by UE.o/spa>
 
pL198"><198o/a>ospa> class="comment">         */o/spa>
 
pL199"><199o/a>        oa href="+code=pci_read_config_word" class="sref">pci_read_config_wordo/a>(oa href="+code=pdev" class="sref">pdevo/a>,I82875P_ERRSTSo/a>, &oa href="+code=info" class="sref">infoo/a>->oa href="+code=errsts" class="sref">errstso/a>); 
pL200"><200o/a> 
pL201"><201o/a>        if (!(oa href="+code=info" class="sref">infoo/a>->oa href="+code=errsts" class="sref">errstso/a> & 0x0081)) 
pL202"><202o/a>                return; 
pL203"><203o/a> 
pL204"><204o/a>        oa href="+code=pci_read_config_dword" class="sref">pci_read_config_dwordo/a>(oa href="+code=pdev" class="sref">pdevo/a>,I82875P_EAPo/a>, &oa href="+code=info" class="sref">infoo/a>->oa href="+code=eap" class="sref">eapo/a>); 
pL205"><205o/a>        oa href="+code=pci_read_config_byt>" class="sref">pci_read_config_byt>o/a>(oa href="+code=pdev" class="sref">pdevo/a>,I82875P_DESo/a>, &oa href="+code=info" class="sref">infoo/a>->oa href="+code=des" class="sref">deso/a>); 
pL206"><206o/a>        oa href="+code=pci_read_config_byt>" class="sref">pci_read_config_byt>o/a>(oa href="+code=pdev" class="sref">pdevo/a>,I82875P_DERRSYNo/a>, &oa href="+code=info" class="sref">infoo/a>->oa href="+code=derrsyn" class="sref">derrsyno/a>); 
pL207"><207o/a>        oa href="+code=pci_read_config_word" class="sref">pci_read_config_wordo/a>(oa href="+code=pdev" class="sref">pdevo/a>,I82875P_ERRSTSo/a>, &oa href="+code=info" class="sref">infoo/a>->oa href="+code=errsts2" class="sref">errsts2o/a>); 
pL208"><208o/a> 
pL209"><209o/a>        ospa> class="comment">/*o/spa>
 
pL210"><2  v3a>ospa> class="comment">         * If the error is the sam> then we ca> for both reads the>o/spa>
 
pL211"><211o/a>ospa> class="comment">         * the first set of reads is valid.  If there is a change the>o/spa>
 
pL212"><212o/a>ospa> class="comment">         * there is a CE no info and the second set of reads is valido/spa>
 
pL213"><213o/a>ospa> class="comment">         * and should be UE info.o/spa>
 
pL214"><214o/a>ospa> class="comment">         */o/spa>
 
pL215"><215o/a>        if ((oa href="+code=info" class="sref">infoo/a>->oa href="+code=errsts" class="sref">errstso/a> ^infoo/a>->oa href="+code=errsts2" class="sref">errsts2o/a>) & 0x0081) { 
pL216"><216o/a>                oa href="+code=pci_read_config_dword" class="sref">pci_read_config_dwordo/a>(oa href="+code=pdev" class="sref">pdevo/a>,I82875P_EAPo/a>, &oa href="+code=info" class="sref">infoo/a>->oa href="+code=eap" class="sref">eapo/a>); 
pL217"><217o/a>                oa href="+code=pci_read_config_byt>" class="sref">pci_read_config_byt>o/a>(oa href="+code=pdev" class="sref">pdevo/a>,I82875P_DESo/a>, &oa href="+code=info" class="sref">infoo/a>->oa href="+code=des" class="sref">deso/a>); 
pL218"><218o/a>                oa href="+code=pci_read_config_byt>" class="sref">pci_read_config_byt>o/a>(oa href="+code=pdev" class="sref">pdevo/a>,I82875P_DERRSYNo/a>, &oa href="+code=info" class="sref">infoo/a>->oa href="+code=derrsyn" class="sref">derrsyno/a>); 
pL219"><219o/a>        } 
pL220"><220o/a> 
pL221"><221o/a>        oa href="+code=pci_write_bits16" class="sref">pci_write_bits16o/a>(oa href="+code=pdev" class="sref">pdevo/a>,I82875P_ERRSTSo/a>, 0x0081, 0x0081); 
pL222"><222o/a>} 
pL223"><223o/a> 
pL224"><224o/a>static inti82875p_process_error_infoo/a>(structmem_ctl_infoo/a> *oa href="+code=mci" class="sref">mcio/a>, 
pL225"><225o/a>                                structi82875p_error_infoo/a> *oa href="+code=info" class="sref">infoo/a>, 
pL226"><226o/a>                                inthandle_errorso/a>) 
pL227"><227o/a>{ 
pL228"><228o/a>        introwo/a>,multi_chano/a>; 
pL229"><229o/a> 
pL230"><230o/a>        oa href="+code=multi_chan" class="sref">multi_chano/a> = oa href="+code=mci" class="sref">mcio/a>->oa href="+code=csrows" class="sref">csrowso/a>[0]->oa href="+code=nr_channels" class="sref">nr_channelso/a> - 1; 
pL231"><231o/a> 
pL232"><232o/a>        if (!(oa href="+code=info" class="sref">infoo/a>->oa href="+code=errsts" class="sref">errstso/a> & 0x0081)) 
pL233"><233o/a>                return 0; 
pL234"><234o/a> 
pL235"><235o/a>        if (!oa href="+code=handle_errors" class="sref">handle_errorso/a>) 
pL236"><236o/a>                return 1; 
pL237"><237o/a> 
pL238"><238o/a>        if ((oa href="+code=info" class="sref">infoo/a>->oa href="+code=errsts" class="sref">errstso/a> ^infoo/a>->oa href="+code=errsts2" class="sref">errsts2o/a>) & 0x0081) { 
pL239"><239o/a>                oa href="+code=edac_mc_handle_error" class="sref">edac_mc_handle_erroro/a>(oa href="+code=HW_EVENT_ERR_UNCORRECTED" class="sref">HW_EVENT_ERR_UNCORRECTEDo/a>,mcio/a>, 1, 0, 0, 0, 
pL240"><240o/a>                                     -1, -1, -1, 
pL241"><241o/a>                                     ospa> class="string">"UE overwrote CE"
, ospa> class="string">""
); 
pL242"><242o/a>                oa href="+code=info" class="sref">infoo/a>->oa href="+code=errsts" class="sref">errstso/a> = oa href="+code=info" class="sref">infoo/a>->oa href="+code=errsts2" class="sref">errsts2o/a>; 
pL243"><243o/a>        } 
pL244"><244o/a> 
pL245"><245o/a>        oa href="+code=info" class="sref">infoo/a>->oa href="+code=eap" class="sref">eapo/a> >>= oa href="+code=PAGE_SHIFT" class="sref">PAGE_SHIFTo/a>; 
pL246"><246o/a>        oa href="+code=row" class="sref">rowo/a> = oa href="+code=edac_mc_find_csrow_by_pag>" class="sref">edac_mc_find_csrow_by_pag>o/a>(oa href="+code=mci" class="sref">mcio/a>, oa href="+code=info" class="sref">infoo/a>->oa href="+code=eap" class="sref">eapo/a>); 
pL247"><247o/a> 
pL248"><248o/a>        if (oa href="+code=info" class="sref">infoo/a>->oa href="+code=errsts" class="sref">errstso/a> & 0x0080) 
pL249"><249o/a>                oa href="+code=edac_mc_handle_error" class="sref">edac_mc_handle_erroro/a>(oa href="+code=HW_EVENT_ERR_UNCORRECTED" class="sref">HW_EVENT_ERR_UNCORRECTEDo/a>,mcio/a>, 1, 
pL250"><250o/a>                                     oa href="+code=info" class="sref">infoo/a>->oa href="+code=eap" class="sref">eapo/a>, 0, 0, 
pL251"><251o/a>                                     oa href="+code=row" class="sref">rowo/a>,<-1, -1, 
pL252"><252o/a>                                     ospa> class="string">"i82875p UE"
, ospa> class="string">""
); 
pL253"><253o/a>        else 
pL254"><254o/a>                oa href="+code=edac_mc_handle_error" class="sref">edac_mc_handle_erroro/a>(oa href="+code=HW_EVENT_ERR_CORRECTED" class="sref">HW_EVENT_ERR_CORRECTEDo/a>,mcio/a>, 1, 
pL255"><255o/a>                                     oa href="+code=info" class="sref">infoo/a>->oa href="+code=eap" class="sref">eapo/a>, 0, oa href="+code=info" class="sref">infoo/a>->oa href="+code=derrsyn" class="sref">derrsyno/a>, 
pL256"><256o/a>                                     oa href="+code=row" class="sref">rowo/a>,multi_chano/a> ? (oa href="+code=info" class="sref">infoo/a>->oa href="+code=des" class="sref">deso/a> & 0x1) : 0, 
pL257"><257o/a>                                     -1, ospa> class="string">"i82875p CE"
, ospa> class="string">""
); 
pL258"><258o/a> 
pL259"><259o/a>        return 1; 
pL260"><260o/a>} 
pL261"><261o/a> 
pL262"><262o/a>static voidi82875p_checko/a>(structmem_ctl_infoo/a> *oa href="+code=mci" class="sref">mcio/a>) 
pL263"><263o/a>{ 
pL264"><264o/a>        structi82875p_error_infoo/a> oa href="+code=info" class="sref">infoo/a>; 
pL265"><265o/a> 
pL266"><266o/a>        oa href="+code=edac_dbg" class="sref">edac_dbgo/a>(1, ospa> class="string">"MC%d\n"
, oa href="+code=mci" class="sref">mcio/a>->oa href="+code=mc_idx" class="sref">mc_idxo/a>); 
pL267"><267o/a>        oa href="+code=i82875p_get_error_info" class="sref">i82875p_get_error_infoo/a>(oa href="+code=mci" class="sref">mcio/a>, &oa href="+code=info" class="sref">infoo/a>); 
pL268"><268o/a>        oa href="+code=i82875p_process_error_info" class="sref">i82875p_process_error_infoo/a>(oa href="+code=mci" class="sref">mcio/a>, &oa href="+code=info" class="sref">infoo/a>, 1); 
pL269"><269o/a>} 
pL270"><270o/a> 
pL271"><271o/a>ospa> class="comment">/* Return 0 on success or 1 on failure. */o/spa>
 
pL272"><272o/a>static inti82875p_setup_overfl_devo/a>(structpci_devo/a> *oa href="+code=pdev" class="sref">pdevo/a>, 
pL273"><273o/a>                                structpci_devo/a> **oa href="+code=ovrfl_pdev" class="sref">ovrfl_pdevo/a>, 
pL274"><274o/a>                                void__iomemo/a> **oa href="+code=ovrfl_window" class="sref">ovrfl_windowo/a>) 
pL275"><275o/a>{ 
pL276"><276o/a>        structpci_devo/a> *oa href="+code=dev" class="sref">devo/a>; 
pL277"><277o/a>        void__iomemo/a> *oa href="+code=window" class="sref">windowo/a>; 
pL278"><278o/a>        interro/a>; 
pL279"><279o/a> 
pL280"><280o/a>        *oa href="+code=ovrfl_pdev" class="sref">ovrfl_pdevo/a> = oa href="+code=NULL" class="sref">NULLo/a>; 
pL281"><281o/a>        *oa href="+code=ovrfl_window" class="sref">ovrfl_windowo/a> = oa href="+code=NULL" class="sref">NULLo/a>; 
pL282"><282o/a>        oa href="+code=dev" class="sref">devo/a> = oa href="+code=pci_get_device" class="sref">pci_get_deviceo/a>(oa href="+code=PCI_VEND_DEV" class="sref">PCI_VEND_DEVo/a>(oa href="+code=INTEL" class="sref">INTELo/a>, 82875_6), oa href="+code=NULL" class="sref">NULLo/a>); 
pL283"><283o/a> 
pL284"><284o/a>        if (oa href="+code=dev" class="sref">devo/a> == oa href="+code=NULL" class="sref">NULLo/a>) { 
pL285"><285o/a>                ospa> class="comment">/* Intel tells BIOS developers to hide device 6 whicho/spa>
 
pL286"><286o/a>ospa> class="comment">                 * configures the overflow device access containingo/spa>
 
pL287"><287o/a>ospa> class="comment">                 * the DRBs - this is where we expose device 6.o/spa>
 
pL288"><288o/a>ospa> class="comment">                 * http://www.x86-secret.com/articles/tweak/pat/patsecrets-2.htmo/spa>
 
pL289"><289o/a>ospa> class="comment">                 */o/spa>
 
pL290"><290o/a>                oa href="+code=pci_write_bits8" class="sref">pci_write_bits8o/a>(oa href="+code=pdev" class="sref">pdevo/a>,<0xf4,<0x2,<0x2); 
pL291"><291o/a>                oa href="+code=dev" class="sref">devo/a> = oa href="+code=pci_scan_single_device" class="sref">pci_scan_single_deviceo/a>(oa href="+code=pdev" class="sref">pdevo/a>->oa href="+code=bus" class="sref">buso/a>,PCI_DEVFNo/a>(6,<0)); 
pL292"><292o/a> 
pL293"><293o/a>                if (oa href="+code=dev" class="sref">devo/a> == oa href="+code=NULL" class="sref">NULLo/a>) 
pL294"><294o/a>                        return 1; 
pL295"><295o/a> 
pL296"><296o/a>                oa href="+code=err" class="sref">erro/a> = oa href="+code=pci_bus_add_device" class="sref">pci_bus_add_deviceo/a>(oa href="+code=dev" class="sref">devo/a>); 
pL297"><297o/a>                if (oa href="+code=err" class="sref">erro/a>) { 
pL298"><298o/a>                        oa href="+code=i82875p_printk" class="sref">i82875p_printko/a>(oa href="+code=KERN_ERR" class="sref">KERN_ERRo/a>, 
pL299"><299o/a>                                ospa> class="string">"%s(): pci_bus_add_device() Failed\n"
, 
pL300"><300o/a>                                oa href="+code=__func__" class="sref">__func__o/a>); 
pL301"><301o/a>                } 
pL302"><302o/a>                oa href="+code=pci_bus_assign_resources" class="sref">pci_bus_assign_resourceso/a>(oa href="+code=dev" class="sref">devo/a>->oa href="+code=bus" class="sref">buso/a>); 
pL303"><303o/a>        } 
pL304"><304o/a> 
pL305"><305o/a>        *oa href="+code=ovrfl_pdev" class="sref">ovrfl_pdevo/a> = oa href="+code=dev" class="sref">devo/a>; 
pL306"><306o/a> 
pL307"><307o/a>        if (oa href="+code=pci_enable_device" class="sref">pci_enable_deviceo/a>(oa href="+code=dev" class="sref">devo/a>)) { 
pL308"><308o/a>                oa href="+code=i82875p_printk" class="sref">i82875p_printko/a>(oa href="+code=KERN_ERR" class="sref">KERN_ERRo/a>, ospa> class="string">"%s(): Failed to enable overflow "
 
pL309"><309o/a>                        ospa> class="string">"device\n"
, oa href="+code=__func__" class="sref">__func__o/a>); 
pL310"><310o/a>                return 1; 
pL311"><311o/a>        } 
pL312"><312o/a> 
pL313"><313o/a>        if (oa href="+code=pci_request_regions" class="sref">pci_request_regionso/a>(oa href="+code=dev" class="sref">devo/a>, oa href="+code=pci_nam>" class="sref">pci_nam>o/a>(oa href="+code=dev" class="sref">devo/a>))) { 
pL314"><314o/a>#ifdef oa href="+code=CORRECT_BIOS" class="sref">CORRECT_BIOSo/a> 
pL315"><315o/a>                goto oa href="+code=fail0" class="sref">fail0o/a>; 
pL316"><316o/a>#endif 
pL317"><317o/a>        } 
pL318"><318o/a> 
pL319"><319o/a>        ospa> class="comment">/* cache is irrelevant for PCI bus reads/writes */o/spa>
 
pL320"><320o/a>        oa href="+code=window" class="sref">windowo/a> = oa href="+code=pci_ioremap_bar" class="sref">pci_ioremap_baro/a>(oa href="+code=dev" class="sref">devo/a>, 0); 
pL321"><321o/a>        if (oa href="+code=window" class="sref">windowo/a> == oa href="+code=NULL" class="sref">NULLo/a>) { 
pL322"><322o/a>                oa href="+code=i82875p_printk" class="sref">i82875p_printko/a>(oa href="+code=KERN_ERR" class="sref">KERN_ERRo/a>, ospa> class="string">"%s(): Failed to ioremap bar6\n"
, 
pL323"><323o/a>                        oa href="+code=__func__" class="sref">__func__o/a>); 
pL324"><324o/a>                goto oa href="+code=fail1" class="sref">fail1o/a>; 
pL325"><325o/a>        } 
pL326"><326o/a> 
pL327"><327o/a>        *oa href="+code=ovrfl_window" class="sref">ovrfl_windowo/a> = oa href="+code=window" class="sref">windowo/a>; 
pL328"><328o/a>        return 0; 
pL329"><329o/a> 
pL330"><330o/a>oa href="+code=fail1" class="sref">fail1o/a>: 
pL331"><331o/a>        oa href="+code=pci_release_regions" class="sref">pci_release_regionso/a>(oa href="+code=dev" class="sref">devo/a>); 
pL332"><332o/a> 
pL333"><333o/a>#ifdef oa href="+code=CORRECT_BIOS" class="sref">CORRECT_BIOSo/a> 
pL334"><334o/a>oa href="+code=fail0" class="sref">fail0o/a>: 
pL335"><335o/a>        oa href="+code=pci_disable_device" class="sref">pci_disable_deviceo/a>(oa href="+code=dev" class="sref">devo/a>); 
pL336"><336o/a>#endif 
pL337"><337o/a>        ospa> class="comment">/* NOTE: the ovrfl proc entry and pci_dev are intentionally left */o/spa>
 
pL338"><338o/a>        return 1; 
pL339"><339o/a>} 
pL340"><340o/a> 
pL341"><341o/a>ospa> class="comment">/* Return 1 if dual channel mode is active.  Else return 0. */o/spa>
 
pL342"><342o/a>static oa href="+code=inline" class="sref">inlineo/a> intdual_channel_activeo/a>(oa href="+code=u32" class="sref">u32o/a> oa href="+code=drc" class="sref">drco/a>) 
pL343"><343o/a>{ 
pL344"><344o/a>        return (oa href="+code=drc" class="sref">drco/a> >> 21) & 0x1; 
pL345"><345o/a>} 
pL346"><346o/a> 
pL347"><347o/a>static voidi82875p_init_csrowso/a>(structmem_ctl_infoo/a> *oa href="+code=mci" class="sref">mcio/a>, 
pL348"><348o/a>                                structpci_devo/a> *oa href="+code=pdev" class="sref">pdevo/a>, 
pL349"><349o/a>                                void__iomemo/a> *ovrfl_windowo/a>, oa href="+code=u32" class="sref">u32o/a> oa href="+code=drc" class="sref">drco/a>) 
pL350"><350o/a>{ 
pL351"><351o/a>        structcsrow_infoo/a> *oa href="+code=csrow" class="sref">csrowo/a>; 
pL352"><352o/a>        structdimm_infoo/a> *oa href="+code=dimm" class="sref">dimmo/a>; 
pL353"><353o/a>        unsignednr_chanso/a> = oa href="+code=dual_channel_active" class="sref">dual_channel_activeo/a>(oa href="+code=drc" class="sref">drco/a>) + 1; 
pL354"><354o/a>        unsignedlast_cumul_sizeo/a>; 
pL355"><355o/a>        oa href="+code=u8" class="sref">u8o/a> oa href="+code=value" class="sref">valueo/a>; 
pL356"><356o/a>        oa href="+code=u32" class="sref">u32o/a> oa href="+code=drc_ddim" class="sref">drc_ddimo/a>;           ospa> class="comment">/* DRAM Data Integrity Mode 0=none,2=edac */o/spa>
 
pL357"><357o/a>        oa href="+code=u32" class="sref">u32o/a> oa href="+code=cumul_size" class="sref">cumul_sizeo/a>, oa href="+code=nr_pag>s" class="sref">nr_pag>so/a>; 
pL358"><358o/a>        intindexo/a>, oa href="+code=j" class="sref">jo/a>; 
pL359"><359o/a> 
pL360"><360o/a>        oa href="+code=drc_ddim" class="sref">drc_ddimo/a> = (oa href="+code=drc" class="sref">drco/a> >> 18) & 0x1; 
pL361"><361o/a>        oa href="+code=last_cumul_size" class="sref">last_cumul_sizeo/a> = 0; 
pL362"><362o/a> 
pL363"><363o/a>        ospa> class="comment">/* The dram row boundary (DRB) reg values are boundary addresso/spa>
 
pL364"><364o/a>ospa> class="comment">         * for each DRAM row with a granularity of 32 or 64MB (single/dualo/spa>
 
pL365"><365o/a>ospa> class="comment">         * channel operation).  DRB regs are cumulative; therefore DRB7 willo/spa>
 
pL366"><366o/a>ospa> class="comment">         * contain the total memory contained
 
pL367"><367o/a>ospa> class="comment">         */o/spa>
 
pL368"><368o/a> 
pL369"><369o/a>        for (oa href="+code=index" class="sref">indexo/a> = 0;indexo/a> <mcio/a>->oa href="+code=nr_csrows" class="sref">nr_csrowso/a>; oa href="+code=index" class="sref">indexo/a>++) { 
pL370"><370o/a>                oa href="+code=csrow" class="sref">csrowo/a> = oa href="+code=mci" class="sref">mcio/a>->oa href="+code=csrows" class="sref">csrowso/a>[oa href="+code=index" class="sref">indexo/a>]; 
pL371"><371o/a> 
pL372"><372o/a>                oa href="+code=value" class="sref">valueo/a> = oa href="+code=readb" class="sref">readbo/a>(oa href="+code=ovrfl_window" class="sref">ovrfl_windowo/a> +I82875P_DRBo/a> +indexo/a>); 
pL373"><373o/a>                oa href="+code=cumul_size" class="sref">cumul_sizeo/a> = oa href="+code=value" class="sref">valueo/a> <<<(oa href="+code=I82875P_DRB_SHIFT" class="sref">I82875P_DRB_SHIFTo/a> - oa href="+code=PAGE_SHIFT" class="sref">PAGE_SHIFTo/a>); 
pL374"><374o/a>                oa href="+code=edac_dbg" class="sref">edac_dbgo/a>(3, ospa> class="string">"(%d) cumul_size 0x%x\n"
, oa href="+code=index" class="sref">indexo/a>, oa href="+code=cumul_size" class="sref">cumul_sizeo/a>); 
pL375"><375o/a>                if (oa href="+code=cumul_size" class="sref">cumul_sizeo/a> == oa href="+code=last_cumul_size" class="sref">last_cumul_sizeo/a>) 
pL376"><376o/a>                        continue;       ospa> class="comment">/* not populated<*/o/spa>
 
pL377"><377o/a> 
pL378"><378o/a>                oa href="+code=csrow" class="sref">csrowo/a>->oa href="+code=first_pag>" class="sref">first_pag>o/a> = oa href="+code=last_cumul_size" class="sref">last_cumul_sizeo/a>; 
pL379"><379o/a>                oa href="+code=csrow" class="sref">csrowo/a>->oa href="+code=last_pag>" class="sref">last_pag>o/a> = oa href="+code=cumul_size" class="sref">cumul_sizeo/a> - 1; 
pL380"><380o/a>                oa href="+code=nr_pag>s" class="sref">nr_pag>so/a> = oa href="+code=cumul_size" class="sref">cumul_sizeo/a> - oa href="+code=last_cumul_size" class="sref">last_cumul_sizeo/a>; 
pL381"><381o/a>                oa href="+code=last_cumul_size" class="sref">last_cumul_sizeo/a> = oa href="+code=cumul_size" class="sref">cumul_sizeo/a>; 
pL382"><382o/a> 
pL383"><383o/a>                for (oa href="+code=j" class="sref">jo/a> = 0;jo/a> <nr_chanso/a>;jo/a>++) { 
pL384"><384o/a>                        oa href="+code=dimm" class="sref">dimmo/a> = oa href="+code=csrow" class="sref">csrowo/a>->oa href="+code=channels" class="sref">channelso/a>[oa href="+code=j" class="sref">jo/a>]->oa href="+code=dimm" class="sref">dimmo/a>; 
pL385"><385o/a> 
pL386"><386o/a>                        oa href="+code=dimm" class="sref">dimmo/a>->oa href="+code=nr_pag>s" class="sref">nr_pag>so/a> = oa href="+code=nr_pag>s" class="sref">nr_pag>so/a> /nr_chanso/a>; 
pL387"><387o/a>                        oa href="+code=dimm" class="sref">dimmo/a>->oa href="+code=grain" class="sref">graino/a> = 1 <<<12;  ospa> class="comment">/* I82875P_EAP has 4KiB reolution<*/o/spa>
 
pL388"><388o/a>                        oa href="+code=dimm" class="sref">dimmo/a>->oa href="+code=mtype" class="sref">mtypeo/a> = oa href="+code=MEM_DDR" class="sref">MEM_DDRo/a>; 
pL389"><389o/a>                        oa href="+code=dimm" class="sref">dimmo/a>->oa href="+code=dtype" class="sref">dtypeo/a> = oa href="+code=DEV_UNKNOWN" class="sref">DEV_UNKNOWNo/a>; 
pL390"><390o/a>                        oa href="+code=dimm" class="sref">dimmo/a>->oa href="+code=edac_mode" class="sref">edac_modeo/a> = oa href="+code=drc_ddim" class="sref">drc_ddimo/a> ? oa href="+code=EDAC_SECDED" class="sref">EDAC_SECDEDo/a> : oa href="+code=EDAC_NONE" class="sref">EDAC_NONEo/a>; 
pL391"><391o/a>                } 
pL392"><392o/a>        } 
pL393"><393o/a>} 
pL394"><394o/a> 
pL395"><395o/a>static inti82875p_probe1o/a>(structpci_devo/a> *oa href="+code=pdev" class="sref">pdevo/a>, intdev_idxo/a>) 
pL396"><396o/a>{ 
pL397"><397o/a>        intrco/a> = -oa href="+code=ENODEV" class="sref">ENODEVo/a>; 
pL398"><398o/a>        structmem_ctl_infoo/a> *oa href="+code=mci" class="sref">mcio/a>; 
pL399"><399o/a>        structedac_mc_layero/a> oa href="+code=layers" class="sref">layerso/a>[2]; 
pL400"><400o/a>        structi82875p_pvto/a> *oa href="+code=pvt" class="sref">pvto/a>; 
pL401"><401o/a>        structpci_devo/a> *oa href="+code=ovrfl_pdev" class="sref">ovrfl_pdevo/a>; 
pL402"><402o/a>        void__iomemo/a> *oa href="+code=ovrfl_window" class="sref">ovrfl_windowo/a>; 
pL403"><403o/a>        oa href="+code=u32" class="sref">u32o/a> oa href="+code=drc" class="sref">drco/a>; 
pL404"><404o/a>        oa href="+code=u32" class="sref">u32o/a> oa href="+code=nr_chans" class="sref">nr_chanso/a>; 
pL405"><405o/a>        structi82875p_error_infoo/a> oa href="+code=discard" class="sref">discardo/a>; 
pL406"><406o/a> 
pL407"><407o/a>        oa href="+code=edac_dbg" class="sref">edac_dbgo/a>(0, ospa> class="string">"\n"
); 
pL408"><408o/a> 
pL409"><409o/a>        oa href="+code=ovrfl_pdev" class="sref">ovrfl_pdevo/a> = oa href="+code=pci_get_device" class="sref">pci_get_deviceo/a>(oa href="+code=PCI_VEND_DEV" class="sref">PCI_VEND_DEVo/a>(oa href="+code=INTEL" class="sref">INTELo/a>, 82875_6), oa href="+code=NULL" class="sref">NULLo/a>); 
pL410"><410o/a> 
pL411"><411o/a>        if (oa href="+code=i82875p_setup_overfl_dev" class="sref">i82875p_setup_overfl_devo/a>(oa href="+code=pdev" class="sref">pdevo/a>, &oa href="+code=ovrfl_pdev" class="sref">ovrfl_pdevo/a>, &oa href="+code=ovrfl_window" class="sref">ovrfl_windowo/a>)) 
pL412"><412o/a>                return -oa href="+code=ENODEV" class="sref">ENODEVo/a>; 
pL413"><413o/a>        oa href="+code=drc" class="sref">drco/a> = oa href="+code=readl" class="sref">readlo/a>(oa href="+code=ovrfl_window" class="sref">ovrfl_windowo/a> +I82875P_DRCo/a>); 
pL414"><414o/a>        oa href="+code=nr_chans" class="sref">nr_chanso/a> = oa href="+code=dual_channel_active" class="sref">dual_channel_activeo/a>(oa href="+code=drc" class="sref">drco/a>) + 1; 
pL415"><415o/a> 
pL416"><416o/a>        oa href="+code=layers" class="sref">layerso/a>[0].oa href="+code=type" class="sref">typeo/a> = oa href="+code=EDAC_MC_LAYER_CHIP_SELECT" class="sref">EDAC_MC_LAYER_CHIP_SELECTo/a>; 
pL417"><417o/a>        oa href="+code=layers" class="sref">layerso/a>[0].oa href="+code=size" class="sref">sizeo/a> = oa href="+code=I82875P_NR_CSROWS" class="sref">I82875P_NR_CSROWSo/a>(oa href="+code=nr_chans" class="sref">nr_chanso/a>); 
pL418"><418o/a>        oa href="+code=layers" class="sref">layerso/a>[0].oa href="+code=is_virt_csrow" class="sref">is_virt_csrowo/a> = oa href="+code=true" class="sref">trueo/a>; 
pL419"><419o/a>        oa href="+code=layers" class="sref">layerso/a>[1].oa href="+code=type" class="sref">typeo/a> = oa href="+code=EDAC_MC_LAYER_CHANNEL" class="sref">EDAC_MC_LAYER_CHANNELo/a>; 
pL420"><420o/a>        oa href="+code=layers" class="sref">layerso/a>[1].oa href="+code=size" class="sref">sizeo/a> = oa href="+code=nr_chans" class="sref">nr_chanso/a>; 
pL421"><421o/a>        oa href="+code=layers" class="sref">layerso/a>[1].oa href="+code=is_virt_csrow" class="sref">is_virt_csrowo/a> = oa href="+code=fals>" class="sref">fals>o/a>; 
pL422"><422o/a>        oa href="+code=mci" class="sref">mcio/a> = oa href="+code=edac_mc_alloc" class="sref">edac_mc_alloco/a>(0, oa href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZEo/a>(oa href="+code=layers" class="sref">layerso/a>), oa href="+code=layers" class="sref">layerso/a>, sizeof(*oa href="+code=pvt" class="sref">pvto/a>e" nam>
pL282"><282o/a>        oa href="+c423" id
pL4      ospa> class="comme323"><323o/a>        4              ode=!mci" class="sref">mcio/a> = oa href="+coivers/edac/i82875p_edac.c#L384" id
pL384" 4lass="lin4" nam>
pL324"><324o/a>  4     4       goto oa href="+rc" class="sref">rco/a> = -oa href="+code=ENODEV" class="sreMEMENODEVo/a>; 
pL325"><325o/a>  4     4 fail0o/a>; 
pL326"><326o/a> <4 href42 href="+code=ers/edac/i82875p_edac.c#L394" id
pL394" 4lass="lin4" nam>
pL327"><327o/a>  4     42drivers/edac/i82875p_edac.c#L378" id
pL378" 4lass="lin4" nam>
pL328"><328o/a>  4     42 href="+code=layers" class="="sref">edac_dbgo/a>(3, ospa> class="string">"(%d) cumul_(str ef=); 
pL329"><329o/a> <4 href42 href="+code=layers" class="f">mcio/a>->oa href="+code=csrows" class="ef">pdevo/a>, &oa href=odecode=ovrfl_window" cef">pdevo/a>->oa href="+code=bus" class="sref">devo/a>; 
pL330"><330o/a>oa4href=43 href="+code=layers" class="f">mcio/a>->oa href="+code=mc_idx" class="sref=_capmtypeo/a> = oa href=_cap"+code=MEM_DDR" class="sreFLAGef">MEM_DDRo/a>; drivers/edac/i82875p_edac.c#L306" id
pL306" 4lass="line" nam>
pL331"><331o/a>  4     4a href="+code=pci_release_regf">mcio/a>->oa href="+code=mc_idx" class=" ospaa hrcapmtypeo/a> = oa  ospaa hrcap"+code=EDAC_MC_LAYER_CHANNEFLAGeef">EDAC_NONEo/a>; "+cod|=EDAC_MC_LAYER_CHANNEFLAGesref">EDAC_SECDEDo/a> : oaFLAGesref">drivers/edac/i82875p_edac.c#L306" id
pL306" 4lass="line" nam>
pL332"><332o/a> <4 href43 href="+code=mci" class="sref">mcio/a> = oa href="+cocode=mc_idx" class=" ospaaapmtypeo/a> = oa  ospaaap"+code=EDAC_MC_LAYER_CHANNEFLAGe"sref">DEV_UNKNOWNo/a>HANNEFLAGe"sref">drivers/edac/i82875p_edac.c#L306" id
pL306" 4lospa> cla" nam>
pL333"><333o/a>#i4def o43 href="+code=drc" class="sref">mcio/a>->oa href="+code=mc_idx" class="sodref">pci_nam>o/a>(oasodref">"+code=EDAC_MC_LAYER_CHANNELOD_ST>MEM_DDRo/a>; drivers/edac/i82875p_edac.c#L306" id
pL306" 4lass="lin4" nam>
pL334"><334o/a>oa4href=43 href="+code=nr_chans" classf">mcio/a>->oa href="+code=mc_idx" class="sodrv">edac_mc_layero/sodrv">"+code=I82875P_NR_CSROWS" clasREVISIO>DEV_UNKNOWNo/a>WS" clasREVISIO>drivers/edac/i82875p_edac.c#L306" id
pL306" 4lass="line" nam>
pL335"><335o/a>  4     4a href="+code=pci_disable_devf">mcio/a>->oa href="+code=csrows" class="s href">pci_nam>o/a>(oas href">"+code=I82875P_NR_CSROL306" idf=">i82875p_init_csrowso/a>f=">="+cobus" class="sref">ef">dev_idxo/a>) pci_nam>o/a>(oas href">"+coers/edac/i82875p_edac.c#L306" id
pL306" 4lass="lin4" nam>
pL336"><336o/a>#e4dif <43 href="+code=layers" class="f">mcio/a>->oa href="+code=csrows" class=" hreef">pci_nam>o/a>(oa hreef">"+code=pci_get_device" claef">pci_nam>o/a>(oa href="+code=dev" class="sreef">pdevo/a>->oa href="+vers/edac/i82875p_edac.c#L408" id
pL408" class="lin4" nam>
pL337"><337o/a>  4     43 href="+code=layers" class="f">mcio/a> = oa href="+cocode=mc_idx" class=" ospaahec>i82875p_printko ospaahec>"+code=I82875P_NR_CSROL306" idahec>i82875p_printkoL306" idahec>"+coers/edac/i82875p_edac.c#L306" id
pL306" 4lass="lin4" nam>
pL338"><338o/a>  4     43 href="+code=layers" class="f">mcio/a>->oa href="+code=csrows" class="s hrhref_to_phy>channelso/a>[oa  hrhref_to_phy>"+code=I82875P_NR_CSROef">NULLo/a>; 
pL339"><339o/a>} 4a hre43 href="+code=layers" class="="sref">edac_dbgo/a>(3, ospa> class="string">"(%d) cumul_(str pL2); 
pL340"><340o/a> <4 href44 href="+code=layers" class="f">pvto/a>e" nam>
pL282">ode="+code=i82875p_pvt" class="sref">i82875p_pvto/a> *oa href="+code=)layers" class="f">mcio/a>->oa href="+code=csrows" class="evtref">i82875p_error_ievtref">drivers/edac/i82875p_edac.c#L282" id
pL282" 4lass="lin4" nam>
pL341"><341o/a>os4a> cl44 href="+code=pci_release_regi">pvto/a>e" nam>
pL282">code=csrows" class="ss="sref">ovrfl_pdevo/a> = oa href="+code=pci_get_device"ss="sref">ovrfl_pdevo/a>; 
pL342"><342o/a>st4tic o44 href="+code=mci" class="srei">pvto/a>e" nam>
pL282">code=csrows" class="ss="srsref">ovrfl_windowo/a> = oa href="+code=window" class="lass="sref">ovrfl_windowo/a>; 
pL343"><343o/a>{ 4a hre44 href="+code=drc" class="srerows" class="sref">i82875p_init_csrowso/a>(structmcio/a>->oa href="+e=pci_nam>" class=f">pdevo/a>, &oa href="+window" class="lass="sref">ovrfl_windowo/a>; drco/a>) + 1; 
pL344"><344o/a>  4     44 href="+code=nr_chans" classL403" idoa hss="sref">i82875p_error_infoo/a> oa hss="sref">href=layers" class="f">mcio/a>->oa href="+e=code=ovrfl_window" c"sref">discardo/a>; /* I82875P_EAP hasclear countp_eref="drivers/edac/i82875p_edac.c#L388" id
pL388" 4lass="lin4" nam>
pL345"><345o/a>} 4a hre44drivers/edac/i82875p_edac.c#L416" id
pL416" class="lin4" nam>
pL346"><346o/a> <4 href44 href="+code=lment">/* I82875P_EAP hasHevice 6* Iume thatce 6href ne5p_ see multipl lefstances(sine ex="drivers/edac/i82875p_edac.c#L388" id
pL388" 4lass="lin4" nam>
pL347"><347o/a>st4tic v44s="comment">         */o/spa>
 hf="ow" r6\n&0f="drivers/edac/i82875p_edac.c#L367" id
pL367" 4lass="lin4" nam>
pL348"><348o/a>  4     44s="comment">                 * http:ef="drivers/edac/i82875p_edac.c#L388" id
pL388" 4lass="lin4" nam>
pL349"><349o/a>  4     4              ode=err" class="sref>(0, oa dd, oedac_mc_alloco/a>(0, oa dd, ohref=layers" class="f">mcio/a>->oa href="+rivers/edac/i82875p_edac.c#L314" id
pL314" 4lass="lin4" nam>
pL350"><350o/a>{ 4a hre45      oa href="+code=nr_pag>s" class="sref">edac_dbgo/a>(3, ospa> class="string">"(%d) cumul_fp bar6a>(0, oa dd, o()); 
pL351"><351o/a>  4     45      } fail1o/a>; 
pL352"><352o/a>  4     45
pL353"><353o/a>  4     4nsigners/edac/i82875p_edac.c#L393" id
pL393" 4lass="lin4" nam>
pL354"><354o/a>  4     4nsigned/* I82875P_EAP has hrefat7;d genericwritel eirol ef">:ef="drivers/edac/i82875p_edac.c#L388" id
pL388" 4lass="lin4" nam>
pL355"><355o/a>  4     4a href="+code=u8" class="sref *oa href">mcio/a>->oa  *oa href">"+code=edac_mc_alloc" class hrecreate_genericaa hedac_dbgo/a>(3, ospa hrecreate_genericaa hlass=code=ovrfl_window" cef">pdevo/a>->oa href="+code=bus" class="sref">devo/a>; 
pL356"><356o/a>  4     4a href="+code=ode=!mci" class="sre *oa href">mcio/a>->oa  *oa href">"+coivers/edac/i82875p_edac.c#L314" id
pL314" 4lass="lin4" nam>
pL357"><357o/a>  4     45              oa hrefovrfl_window" ceref">i82875p_printkoref="+code=KERN_ERR" class="sreWARNINGi82875p_printko="sreWARNINGigners/edac/i82875p_edac.c#L393" id
pL393" 4lass="lin4" nam>
pL358"><358o/a>  4     45              oa href="+code=ding">"%s(): Failed to ioremU"de=createwritel eirol, 
pL359"><359o/a> <4 href45              oa href="+code=dimm" class="sr="sref">__func__o/a>); 
pL360"><360o/a>  4     46      oa href="+code=nr_pag>s" classeref">i82875p_printkoref="+code=KERN_ERR" class="sreWARNINGi82875p_printko="sreWARNINGigners/edac/i82875p_edac.c#L393" id
pL393" 4lass="lin4" nam>
pL361"><361o/a>  4     46      } "%s(): Failed to ioremritess="s report via HANN*/o/svo/a>, 
pL362"><362o/a> <4 href46      return -oa href="+code=dimm" class="sr="sref">__func__o/a>); 
pL363"><363o/a>  4     4spa> class="coers/edac/i82875p_edac.c#L393" id
pL393" 4lass="lin4" nam>
pL364"><364o/a>os4a> cl46drivers/edac/i82875p_edac.c#L395" id
pL395" 4lass="lin4" nam>
pL365"><365o/a>os4a> cl465igned/* I82875P_EAP hasoa ne ex far  intitd t9;s successful:ef="drivers/edac/i82875p_edac.c#L388" id
pL388" 4lass="lin4" nam>
pL366"><366o/a>os4a> cl46 href="+code=layers" class="="sref">edac_dbgo/a>(3, ospa> class="string">"(%d) cumul_success); 
pL367"><367o/a>os4a> cl46             ef="drivers/edac/i82875p_edac.c#L329" id
pL329" 4lass="lin4" nam>
pL368"><368o/a> <4 href4"drivers/edac/i82875p_edac.c#L369" id
pL369" 4lass="lin4" nam>
pL369"><369o/a>  4     4or (oafail1" class="sref">fail1o/a>; 
pL370"><370o/a>  4     47 href="+code=layers" class="a>(0, oafre>edac_modeo/a> = oa hroafre>href=layers" class="f">mcio/a>->oa href="+rers/edac/i82875p_edac.c#L329" id
pL329" 4lass="lin4" nam>
pL371"><371o/a> <4 href4"drivers/edac/i82875p_edac.c#L372" id
pL372" 4lass="lin4" nam>
pL372"><372o/a>  4     4      fail0" class="sref">fail0o/a>; 
pL373"><373o/a>  4     47 href="+code=drc" class="srerounmapmtypeo/a> = oa rounmaphref=layers" class="lass="sref">ovrfl_windowo/a>)) 
pL374"><374o/a>  4     47 href="+code=nr_chans" classions" class="sref">pci_release_regionso/a>(oa href="+code=dev" class="sress="sref">ovrfl_pdevo/a>; 
pL375"><375o/a>  4     47drivers/edac/i82875p_edac.c#L416" id
pL416" class="lin4" nam>
pL376"><376o/a>  4     47 href="+code=layers" class="ice" class="sref">pci_disable_deviceo/a>(oa href="+code=dev" class="sress="sref">ovrfl_pdevo/a>; 
pL377"><377o/a> <4 href47pa> class="comment">/* NOTE: the ovrfl proc entry and pci_dev are intentionally left */o/spa>
 
pL378"><378o/a>  4     47turn 1; rco/a> = -oa href="+cers/edac/i82875p_edac.c#L329" id
pL329" 4lass="lin4" nam>
pL379"><379o/a>  4     47"drivers/edac/i82875p_edac.c#L340" id
pL340" 4lass="lin4" nam>
pL380"><380o/a>  4     48drivers/edac/i82875p_edac.c#L411" id
pL411" class="lin4" nam>
pL381"><381o/a>  4     48s="comment">/* Return 1 if duaef="drs count (ode== 0),e/dunege DRB oness="s ef="drivers/edac/i82875p_edac.c#L338" id
pL338" 4lass="lin4" nam>
pL382"><382o/a> <4 href48href="+code=ode=i82875p_probe1" class="(struon>pci_disable_dev class="(struon>code="+code=pci_dev" class="sref">pci_devo/a> *oa href="+code=pdev" class="sref">pdevo/a>, 
pL383"><383o/a>  4     4       for (oa href="+++++++++++++l est="+code=pci_dev" class="sref">="+_i>discardo/a>; ="+_i>+code=pdev" class="sr1 ifdac_modeo/a> = n282">
pL384"><384o/a>  4     4      ers/edac/i82875p_edac.c#L314" id
pL314" 4lass="lin4" nam>
pL385"><385o/a> <4 href485ignedrco/a> = -oa href="+cers/edac/i82875p_edac.c#L329" id
pL329" 4lass="lin4" nam>
pL386"><386o/a>  4     48drivers/edac/i82875p_edac.c#L407" id
pL407" class="lin4" nam>
pL387"><387o/a>  4     48 href="+code=edac_dbg" class="sref">edac_dbgo/a>(0, ospa> class="string">"\n"
); 
pL388"><388o/a>  4     48 href="+code=layers" class="/a>(structef">i82875p_printko/a>(oa href="+code=KERN_ERR" class="sreINFOi82875p_printko="sreINFOdriv"+wing">"(%d) cumul_(a>(oa  (str on>); 
pL389"><389o/a>  4     48drivers/edac/i82875p_edac.c#L360" id
pL360" 4lass="lin4" nam>
pL390"><390o/a>  4     4              ode=err" class="sre"sreenass="sref">pci_disable_deviceoenass="sref">code=dev" class="sreef">pdevo/a>->oa href="+v+code=0
pL391"><391o/a>  4     4       } 
pL392"><392o/a>  4     49drivers/edac/i82875p_edac.c#L383" id
pL383" 4lass="lin4" nam>
pL393"><393o/a>} 4a hre49 href="+code=drc" class="sre">rco/a> = -oa href="+codelayers" class="/a>(structef">i82875p_probe1o/a>(struct" class=f">pdevo/a>, &oa href="+window" class="1 ifdac_modeo/a> = n282">code=bus" class="sref875p__datadrco/a>) + 1; 
pL394"><394o/a> <4 href4"drivers/edac/i82875p_edac.c#L395" id
pL395" 4lass="lin4" nam>
pL395"><395o/a>st4tic i495            ode=err" class="srehreref">ovrfl_pdevo/a>;hreref">="+code=I82875P_NR_CSROef">NULLo/a>; 
pL396"><396o/a>{ 4a hre49              oa hreferr" class="srehreref">ovrfl_pdevo/a>;hreref">="+cod=pci_dev" class="sref"> oa discardo/a>;  oa code=dev" class="sreef">pdevo/a>->oa href="+vers/edac/i82875p_edac.c#L329" id
pL329" 4lass="lin4" nam>
pL397"><397o/a>  4     49drivers/edac/i82875p_edac.c#L378" id
pL378" 4lass="lin4" nam>
pL398"><398o/a>  4     49turn 1; rco/a> = -oa href="+cers/edac/i82875p_edac.c#L329" id
pL329" 4lass="lin4" nam>
pL399"><399o/a>  4     49"drivers/edac/i82875p_edac.c#L340" id
pL340" 5lass="lin5" nam>
pL400"><400o/a>  5     50drivers/edac/i82875p_edac.c#L411" id
pL411" 5lass="lin5" nam>
pL401"><401o/a>  5     5tructpci_disable_dev class="removeuon>code="+code=pci_dev" class="sref">pci_devo/a> *oa href="+code=pdev" class="sref">pdevo/a>, 
pL402"><402o/a>  5     5oid
pL403"><403o/a>  5     5a href="+code="+code=mem_ctl_info" class="sref">mem_ctl_infoo/a> *oa href="+code=mci" class="sref">mcio/a>; 
pL404"><404o/a>  5     5a href="+code="+code=i82875p_pvt" class="sref">i82875p_pvto/a> *oa href="+code=pvt" class="sref">pvto/a>; NULLo/a>; 
pL405"><405o/a>  5     50drivers/edac/i82875p_edac.c#L416" id
pL416" 5lass="lin5" nam>
pL406"><406o/a> <5 href50 href="+code=layers" class="="sref">edac_dbgo/a>(3, ospa> class="string">"\n"
); 
pL407"><407o/a>  5     50drivers/edac/i82875p_edac.c#L378" id
pL378" 5lass="lin5" nam>
pL408"><408o/a> <5 href508            ode=err" class="sre *oa href">mcio/a>->oa  *oa href">"+coirs/edac/i82875p_edac.c#L378" id
pL378" 5l9ss="lin5" nam>
pL399"><399o/a>  5     50              oa hrefedac_mc_alloc" class hreo/a>(oa genericaa hedac_dbgo/a>(3, ospa hreo/a>(oa genericaa hcode=dev" class="sre *oa href">mcio/a>->oa  *oa href">"+coiers/edac/i82875p_edac.c#L408" id
pL408" 5lass="lin5" nam>
pL410"><410o/a> <5 href5"drivers/edac/i82875p_edac.c#L411" id
pL411" 5lass="lin5" nam>
pL411"><411o/a>  5     5f (oa href="+code==layers" class="f">mcio/a>->oa href="+de=edac_mc_alloc" class="sdel, oedac_mc_alloco/a>(0, oadel, olass=code=ovrfl_window" cef">pdevo/a>->oa href="+code=bus" class="sref">devo/a>; NULLo/a>; 
pL412"><412o/a>  5     5       return -oa href="+coders/edac/i82875p_edac.c#L408" id
pL408" 5lass="lin5" nam>
pL413"><413o/a>  5     51signers/edac/i82875p_edac.c#L393" id
pL393" 5lass="lin5" nam>
pL414"><414o/a>  5     5a href="+code=nr_chans" classf">pvto/a>e" nam>
pL282">ode="+code=i82875p_pvt" class="sref">i82875p_pvto/a> *oa href="+code=)layers" class="f">mcio/a>->oa href="+code=csrows" class="evtref">i82875p_error_ievtref">drivers/edac/i82875p_edac.c#L282" id
pL282" 5lass="lin5" nam>
pL415"><415o/a> <5 href5"drivers/edac/i82875p_edac.c#L416" id
pL416" 5lass="lin5" nam>
pL416"><416o/a>  5     51 href="+code=ode=nr_chans" classf">pvto/a>e" nam>
pL282">code=csrows" class="ss="srsref">ovrfl_windowo/a> = oa href="+co
pL417"><417o/a>  5     51              oa hrefovrfl_window" crounmapmtypeo/a> = oa rounmaphref=layers" class="f">pvto/a>e" nam>
pL282">code=csrows" class="ss="srsref">ovrfl_windowo/a> = oa href="+co
pL418"><418o/a>  5     51drivers/edac/i82875p_edac.c#L369" id
pL369" 5lass="lin5" nam>
pL419"><419o/a>  5     51             ode=err" class="srei">pvto/a>e" nam>
pL282">code=csrows" class="ss="sref">ovrfl_pdevo/a> = oa href="+coivers/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL420"><420o/a>  5     5a href#ifdeffovrfl_window" cCORRECT_BIO>I82875P_NR_CSROCORRECT_BIO>rivers/edac/i82875p_edac.c#L369" id
pL369" 5lass="lin5" nam>
pL421"><421o/a>  5     52      oa href="+code=last_cumul_sizeions" class="sref">pci_release_regionso/a>(oa href="+code=dev" class="srei">pvto/a>e" nam>
pL282">code=csrows" class="ss="sref">ovrfl_pdevo/a> = oa href="+coiers/edac/i82875p_edac.c#L282" id
pL282" 5lass="lin5" nam>
pL422"><422o/a>  5     5a href#endodeeeeeeeeeeeeeeeeeeeeeeeeeemment">/* Return 1 if duCORRECT_BIO> ef="drivers/edac/i82875p_edac.c#L338" id
pL338" 5 ospa> cl5ss="comme323"><323o/a>  5     52      for (oa href="+layers" class="ice" class="sref">pci_disable_deviceo/a>(oa href="+code=dev" class="srei">pvto/a>e" nam>
pL282">code=csrows" class="ss="sref">ovrfl_pdevo/a> = oa href="+coiers/edac/i82875p_edac.c#L282" id
pL282" 5lass="lin5" nam>
pL324"><324o/a>  5     5       goto oa href="+rc" class="sref"sref"> pu discardo/a>;  pu code=dev" class="srei">pvto/a>e" nam>
pL282">code=csrows" class="ss="sref">ovrfl_pdevo/a> = oa href="+coiers/edac/i82875p_edac.c#L282" id
pL282" 5lass="lin5" nam>
pL325"><325o/a>  5     5 
pL326"><326o/a> <5 href52drivers/edac/i82875p_edac.c#L407" id
pL407" 5lass="lin5" nam>
pL327"><327o/a>  5     52 href="+code=edac_dbg" class="sre oafre>edac_modeo/a> = oa hroafre>href=layers" class="f">mcio/a>->oa href="+rers/edac/i82875p_edac.c#L329" id
pL329" 5lass="lin5" nam>
pL328"><328o/a>  5     52 hrefers/edac/i82875p_edac.c#L340" id
pL340" 5lass="lin5" nam>
pL329"><329o/a> <5 href52drivers/edac/i82875p_edac.c#L360" id
pL360" 5lass="lin5" nam>
pL330"><330o/a>oa5href=53 hrefhref="+layers" class="DEFINE_>(oaDEVICE_TABLEmcio/a>->oa DEFINE_>(oaDEVICE_TABLEcode=dev" class="sre *oa href">_tbhedac_dbgo/a>(3, *oa href">_tbh"+coiv=vers/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL331"><331o/a>  5     5a href="+code=ers/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL332"><332o/a> <5 href53 href="+code=+layers" class="lass="sref">PCI_VEND_DEVo/a>(oa href="+code=INTEL" class="sref">INTELo/a>, 82875_6), oa href="+c0de=layers" class=">(oaANY_I>EDAC_SECDEDo/a>>(oaANY_I>ref="+window" class=">(oaANY_I>EDAC_SECDEDo/a>>(oaANY_I>ref="+0"+0"rs/edac/i82875p_edac.c#L314" id
pL314" 5lospa> cl5" nam>
pL333"><333o/a>#i5def o53 href="+code==I82875P_NR_CSROWS" claINTELo/a>, 82875S" clahrefe"rs/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL334"><334o/a>oa5href=53 href="+code=ers/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL335"><335o/a>  5     5a href="+code=+0"rs/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL336"><336o/a>#e5dif <53 href="+code= }eeeeeeeeeeeeeeeeeeeeeemment">/* Return 1 if du 0 termin
pL337"><337o/a>  5     53 href}ers/edac/i82875p_edac.c#L329" id
pL329" 5lass="lin5" nam>
pL338"><338o/a>  5     53drivers/edac/i82875p_edac.c#L369" id
pL369" 5lass="lin5" nam>
pL339"><339o/a>} 5a hre53r (oafail1" class="sMODULEaDEVICE_TABLEmcio/a>->oa MODULEaDEVICE_TABLEcode=dev" class="srei">mcio/a>->oa pref="+e=pci_nam>" class *oa href">_tbhedac_dbgo/a>(3, *oa href">_tbh"+coiers/edac/i82875p_edac.c#L329" id
pL329" 5lass="lin5" nam>
pL340"><340o/a> <5 href54drivers/edac/i82875p_edac.c#L411" id
pL411" 5lass="lin5" nam>
pL341"><341o/a>os5a> cl54ruct" class *oa href875p_discardo/a>; odeers/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL342"><342o/a>st5tic o54 href="+code==is_virt_csrow" ef">pci_nam>o/a>(oaef">"+code=EDAC_MC_LAYER_CHANNELOD_ST>MEM_DDRo/a>; driv"rs/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL343"><343o/a>{ 5a hre54 href="+code==is_virt_csrow" ct; code"rs/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL344"><344o/a>  5     54 href="+code==is_virt_csrow" removerco/a> = -oa hreemove="+codelayers" class="/a>(struremoveuon>pci_disable_dev class="removeuon>code"rs/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL345"><345o/a>} 5a hre545href="+code==is_virt_csrow" id_t(oa pci_disable_dev d_t(oa ="+codelayers" class="/a>(struc">_tbhedac_dbgo/a>(3, *oa href">_tbh"+co"rs/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL346"><346o/a> <5 href54 href}ers/edac/i82875p_edac.c#L329" id
pL329" 5lass="lin5" nam>
pL347"><347o/a>st5tic v54drivers/edac/i82875p_edac.c#L378" id
pL378" 5lass="lin5" nam>
pL348"><348o/a>  5     54s="co"+code=ode=i82875p_probe1"_"(stredac_dbgo/a>(3,_"(strhref=pci_nam>" class *oa hre(stredac_dbgo/a>(3, *oa hre(strcode=code
pL349"><349o/a>  5     5      ers/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL350"><350o/a>{ 5a hre55      oa hrefode=i82875p_probe1"ionsooedac_mc_alloco/ionsoodrivers/edac/i82875p_edac.c#L282" id
pL282" 5lass="lin5" nam>
pL351"><351o/a>  5     55drivers/edac/i82875p_edac.c#L372" id
pL372" 5lass="lin5" nam>
pL352"><352o/a>  5     55 href="+code=mci" class="sre="sref">edac_dbgo/a>(3, ospa> class="string">"(%d) cumul_); 
pL353"><353o/a>  5     5nsigners/edac/i82875p_edac.c#L393" id
pL393" 5lass="lin5" nam>
pL354"><354o/a>  5     5nsigned/* Return 1 if du Ensure thatcentrOPSTATEse rset correctly+codePOLLe/duNMI ef="drivers/edac/i82875p_edac.c#L338" id
pL338" 5lass="lin5" nam>
pL355"><355o/a>  5     5a href="+codecsrows" class="sp"+coee(stredac_dbgo/a>(3,sp"+coee(strlass=vers/edac/i82875p_edac.c#L408" id
pL408" 5lass="lin5" nam>
pL356"><356o/a>  5     55drivers/edac/i82875p_edac.c#L407" id
pL407" 5lass="lin5" nam>
pL357"><357o/a>  5     55 href="+code=edac_dbg" classionsooedac_mc_alloco/ionsoodrivod=pci_dev" class="srehrefstp__d875p_discardo/a>; ; vers/edac/i82875p_edac.c#L408" id
pL408" 5lass="lin5" nam>
pL358"><358o/a>  5     55drivers/edac/i82875p_edac.c#L369" id
pL369" 5lass="lin5" nam>
pL359"><359o/a> <5 href55             ode=err" class="sreionsooedac_mc_alloco/ionsoodrivocode=0
pL360"><360o/a>  5     56      oa href="+code=code=fail0" class="sref">fail0o/a>; 
pL361"><361o/a>  5     56drivers/edac/i82875p_edac.c#L372" id
pL372" 5lass="lin5" nam>
pL362"><362o/a> <5 href56      return ode=err" class="srehreref">ovrfl_pdevo/a>;hreref">="+code=I82875P_NR_CSROef">NULLo/a>; 
pL363"><363o/a>  5     56      for (oa href="+layers" class="hreref">ovrfl_pdevo/a>;hreref">="+cod=pci_dev" class="sress="sref">pci_get_deviceo/a>(oa href="+code=PCI_VEND_DEV" class="srOR_ID_ref">INTELo/a>, 8287lass="srOR_ID_ref">"+co"rs/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL364"><364o/a>os5a> cl56      goto oa href="+++++++++++++++++++++++++PCI_VEND_DEV" classDEVICE_ID_ref">_ef="+c0INTELo/a>, 8287lassDEVICE_ID_ref">_ef="+c0f="+e=pci_nam>" classef">NULLo/a>); 
pL365"><365o/a>os5a> cl56drivers/edac/i82875p_edac.c#L416" id
pL416" 5lass="lin5" nam>
pL366"><366o/a>os5a> cl56              oa hrefode=!mci" class="sref">ref">ovrfl_pdevo/a>;hreref">="+c
pL367"><367o/a>os5a> cl56              oa href++++++++PCI_VEND_DEV" c="sref">edac_dbgo/a>(3, ospa> class="string">"\n"
(oa  /a>(oa href="+ ref=); 
pL368"><368o/a> <5 href56              oa href="+code=ddac_dbg" classionsooedac_mc_alloco/ionsoodrivod==ENODEV" class="sref">ENODEVo/a>; 
pL369"><369o/a>  5     56              oa href="+code=code=fail1" class="sref">fail1o/a>; 
pL370"><370o/a>  5     57      oa href="+code=ers/edac/i82875p_edac.c#L340" id
pL340" 5lass="lin5" nam>
pL371"><371o/a> <5 href5"drivers/edac/i82875p_edac.c#L372" id
pL372" 5lass="lin5" nam>
pL372"><372o/a>  5     57      return -oa hrefedac_dbg" classionsooedac_mc_alloco/ionsoodrivod=pci_dev" class= class="(struon>pci_disable_dev class="(struon>code=mci" class="sref">ref">ovrfl_pdevo/a>;hreref">="+ce=pci_nam>" class *oa href">_tbhedac_dbgo/a>(3, *oa href">_tbh"+coiers/edac/i82875p_edac.c#L329" id
pL329" 5lass="lin5" nam>
pL373"><373o/a>  5     57signers/edac/i82875p_edac.c#L393" id
pL393" 5lass="lin5" nam>
pL374"><374o/a>  5     57      goto oa href="+ode=err" class="sreionsooedac_mc_alloco/ionsoodrivocode=0
pL375"><375o/a>  5     57edac_dbgo/a>(3, ospa> class="string">"\n"
(oa  (str ref=); 
pL376"><376o/a>  5     57              oa href="+code=ddac_dbg" classionsooedac_mc_alloco/ionsoodrivod==ENODEV" class="sref">ENODEVo/a>; 
pL377"><377o/a> <5 href57              oa href++++++++code=fail1" class="sref">fail1o/a>; 
pL378"><378o/a>  5     57              oa hrefers/edac/i82875p_edac.c#L340" id
pL340" 5lass="lin5" nam>
pL379"><379o/a>  5     57             ers/edac/i82875p_edac.c#L340" id
pL340" 5lass="lin5" nam>
pL380"><380o/a>  5     58drivers/edac/i82875p_edac.c#L411" id
pL411" 5lass="lin5" nam>
pL381"><381o/a>  5     58 href="+code=ef="drivers/edac/i82875p_edac.c#L329" id
pL329" 5lass="lin5" nam>
pL382"><382o/a> <5 href58drivers/edac/i82875p_edac.c#L383" id
pL383" 5lass="lin5" nam>
pL383"><383o/a>  5     5      fail1" class="sref">fail1o/a>; 
pL384"><384o/a>  5     58 href="+code=nr_chans" classionsunhrefstp__d875p_discardo/a>; ; vers/edac/i82875p_edac.c#L408" id
pL408" 5lass="lin5" nam>
pL385"><385o/a> <5 href58drivers/edac/i82875p_edac.c#L416" id
pL416" 5lass="lin5" nam>
pL386"><386o/a>  5     58drivefail0" class="sref">fail0o/a>; 
pL387"><387o/a>  5     58 href="+code=ode=err" class="srehreref">ovrfl_pdevo/a>;hreref">="+co!e=I82875P_NR_CSROef">NULLo/a>; 
pL388"><388o/a>  5     58              oa hrefrc" class="sref"sref"> pu discardo/a>;  pu code=dev" class="sref">ref">ovrfl_pdevo/a>;hreref">="+c
pL389"><389o/a>  5     58drivers/edac/i82875p_edac.c#L360" id
pL360" 5lass="lin5" nam>
pL390"><390o/a>  5     5              ef="dridev" class="sreionsooedac_mc_alloco/ionsoodrivers/edac/i82875p_edac.c#L282" id
pL282" 5lass="lin5" nam>
pL391"><391o/a>  5     5      ers/edac/i82875p_edac.c#L340" id
pL340" 5lass="lin5" nam>
pL392"><392o/a>  5     59drivers/edac/i82875p_edac.c#L383" id
pL383" 5lass="lin5" nam>
pL393"><393o/a>} 5a hre59 hrefhref="+code=i82875p_init_cs__extredac_dbgo/a>(3,_"extrhref=pci_nam>" class *oa hreextredac_dbgo/a>(3, *oa hreextrcode=code
pL394"><394o/a> <5 href59     ers/edac/i82875p_edac.c#L314" id
pL314" 5lass="lin5" nam>
pL395"><395o/a>st5tic i595            mci" class="sre="sref">edac_dbgo/a>(3, ospa> class="string">"(%d) cumul_); 
pL396"><396o/a>{ 5a hre59drivers/edac/i82875p_edac.c#L407" id
pL407" 5lass="lin5" nam>
pL397"><397o/a>  5     59 href="+code=edac_dbg" class/a>(struremoveuon>pci_disable_dev class="removeuon>code=dev" class="sref">ref">ovrfl_pdevo/a>;hreref">="+c
pL398"><398o/a>  5     59 href="+code=layers" class=""sref"> pu discardo/a>;  pu code=dev" class="sref">ref">ovrfl_pdevo/a>;hreref">="+c
pL399"><399o/a>  5     59drivers/edac/i82875p_edac.c#L360" id
pL360" 6lass="lin6" nam>
pL400"><400o/a>  6     60 href="+code=layers" class="fonsunhrefstp__d875p_discardo/a>; ; vers/edac/i82875p_edac.c#L408" id
pL408" 6lass="lin6" nam>
pL401"><401o/a>  6     60drivers/edac/i82875p_edac.c#L372" id
pL372" 6lass="lin6" nam>
pL402"><402o/a>  6     6oid
pL403"><403o/a>  6     60signers/edac/i82875p_edac.c#L393" id
pL393" 6lass="lin6" nam>
pL404"><404o/a>  6     6a hrefdev" class="srefodulee(stredac_dbgo/a>(3,fodulee(strcode=dev" class="sre *oa hre(stredac_dbgo/a>(3, *oa hre(strcodevers/edac/i82875p_edac.c#L408" id
pL408" 6l5ss="lin6" nam>
pL395"><395o/a>st6     60drivedev" class="srefoduleeextredac_dbgo/a>(3,foduleeextrcode=dev" class="sre *oa hreextredac_dbgo/a>(3, *oa hreextrcodevers/edac/i82875p_edac.c#L408" id
pL408" 6l6ss="lin6" nam>
pL396"><396o/a>{ 6 href60drivers/edac/i82875p_edac.c#L407" id
pL407" 6lass="lin6" nam>
pL407"><407o/a>  6     60drivedev" class="sreMODULEaLICENSEmcio/a>->oa MODULEaLICENSEcode=ding">"(%d) cumul_GPL 
pL408"><408o/a> <6 href608    dev" class="sreMODULEaAUTHO>MEM_DDRo/a>; code=ding">"(%d) cumul_Linux Networx (http://lnxi.com) Thayne Harbaugh 
pL399"><399o/a>  6     60r (oafail1" class="sMODULEaDESCRIPTIO>DEV_UNKNOWNo/a>MODULEaDESCRIPTIO>code=ding">"(%d) cumul_MC support codeIntelref="+nd
pL410"><410o/a> <6 href6"drivers/edac/i82875p_edac.c#L411" id
pL411" 6lass="lin6" nam>
pL411"><411o/a>  6     6f (oa dev" class="srefoduleeparamedac_dbgo/a>(3,foduleeparamcode=dev" class="sre ospaop_"+coeedac_dbgo/a>(3, ospaop_"+coe="+ce=int, 0444vers/edac/i82875p_edac.c#L408" id
pL408" 6lass="lin6" nam>
pL412"><412o/a>  6     61     fail0" class="sMODULEaPARMaDESCDEV_UNKNOWNo/a>MODULEaPARMaDESCcode=dev" class="sre ospaop_"+coeedac_dbgo/a>(3, ospaop_"+coe="+ce=ding">"(%d) cumul_HANN*Er="s Report7;d "+coe: 0=Poll,1=NMI 
pL413"><413o/a>  6     61signe


pL41footp_"> undaoriginal LXR softwly lbycentrs/edac/i8http://sourco/spge.net/projects/lx_">LXR urn ustry="+ce=e ex experi 1 ial 5p_eionlbycs/edac/i8mailto:lx_@linux.no">lx_@linux.no="+c. pL41subfootp_"> lx_.linux.no kindlalhosa hrbycs/edac/i8http://www.redpill-linpro.no">Redpill Linpro AS="+ce=provider(sinLinux l esulti;d intopera/o/s rserf="+ rsince 1995.