linux/drivers/ata/pata_pdc2027x.c
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p p1t/a>tspa2 class="comment">/*t/spa2="p p2t/a>tspa2 class="comment"> *opPromise PATA TX2/TX4/TX2000/133 IDE driver for pdc20268 to pdc20277.t/spa2="p p3t/a>tspa2 class="comment"> *t/spa2="p p4t/a>tspa2 class="comment"> *opThis program is free software; you ca2 redistribute it and/ort/spa2="p p5t/a>tspa2 class="comment"> *opmodify it under the terms of the GNU General Public Licenset/spa2="p p6t/a>tspa2 class="comment"> *opas published by the Free Software Foundaue=2; either verse=2t/spa2="p p7t/a>tspa2 class="comment"> *op2 of the License, or (at your 2aue=2) any later verse=2.t/spa2="p p8t/a>tspa2 class="comment"> *t/spa2="p p9t/a>tspa2 class="comment"> *opPorted to libata by:t/spa2="p io2aa>tspa2 class="comment"> *opAlbert Lee <albertcc@tw.ibm.com> IBM Corporaue=2t/spa2="p 11t/a>tspa2 class="comment"> *t/spa2="p 12t/a>tspa2 class="comment"> *opCopyright (C) 1998-2002             Andre Hedrick <andre@linux-ide.org>t/spa2="p 13t/a>tspa2 class="comment"> *opPorte=2spCopyright (C) 1999pPromise Technology, Inc.t/spa2="p 14t/a>tspa2 class="comment"> *t/spa2="p 15t/a>tspa2 class="comment"> *opAuthor: Frank Tierna2 (frankt@promise.com)t/spa2="p 16t/a>tspa2 class="comment"> *opReleased under terms of General Public Licenset/spa2="p 17t/a>tspa2 class="comment"> *t/spa2="p 18t/a>tspa2 class="comment"> *t/spa2="p 19t/a>tspa2 class="comment"> *oplibata documentaue=2 is available via 'make {ps|pdf}docs',t/spa2="p 2o2aa>tspa2 class="comment"> *opas Documentaue=2/DocBook/libata.*t/spa2="p 21t/a>tspa2 class="comment"> *t/spa2="p 22t/a>tspa2 class="comment"> *opHardware informaue=2 only available under NDA.t/spa2="p 23t/a>tspa2 class="comment"> *t/spa2="p 24t/a>tspa2 class="comment"> */t/spa2="p 25t/a>#include <linux/kernel.ht/a>>"p 26t/a>#include <linux/module.ht/a>>"p 27t/a>#include <linux/pci.ht/a>>"p 28t/a>#include <linux/init.ht/a>>"p 29t/a>#include <linux/blkdev.ht/a>>"p 30t/a>#include <linux/delay.ht/a>>"p 31t/a>#include <linux/device.ht/a>>"p 32t/a>#include <scsi/scsi.ht/a>>"p 33t/a>#include <scsi/scsi_host.ht/a>>"p 34t/a>#include <scsi/scsi_cmnd.ht/a>>"p 35t/a>#include <linux/libata.ht/a>>"p 36t/a>"p 37t/a>#definepta href="+code=DRV_NAME" class="sref">DRV_NAMEt/a>        tspa2 class="string">"pata_pdc2027x"t/spa2="p 38t/a>#definepta href="+code=DRV_VERSION" class="sref">DRV_VERSIONt/a>     tspa2 class="string">"1.0"t/spa2="p 39t/a>#undefpta href="+code=PDC_DEBUG" class="sref">PDC_DEBUGt/a>"p 40t/a>"p 41t/a>#ifdefpta href="+code=PDC_DEBUG" class="sref">PDC_DEBUGt/a>"p 42t/a>#definepta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(ta href="+code=fmt" class="sref">fmtt/a>,pta href="+code=args" class="sref">argst/a>...)pta href="+code=printk" class="sref">printkt/a>(ta href="+code=KERN_ERR" class="sref">KERN_ERRt/a> tspa2 class="string">"%s: "t/spa2=pta href="+code=fmt" class="sref">fmtt/a>,pta href="+code=__func__" class="sref">__func__t/a>,p##pta href="+code=args" class="sref">argst/a>)"p 43t/a>#else"p 44t/a>#definepta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(ta href="+code=fmt" class="sref">fmtt/a>,pta href="+code=args" class="sref">argst/a>...)"p 45t/a>#endif"p 46t/a>"p 47t/a>enum {"p 48t/a>        ta href="+code=PDC_MMIO_BAR" class="sref">PDC_MMIO_BARt/a>            = 5,"p 49t/a>"p 50t/a>        ta href="+code=PDC_UDMA_100" class="sref">PDC_UDMA_100t/a>            = 0,"p 51t/a>        ta href="+code=PDC_UDMA_133" class="sref">PDC_UDMA_133t/a>            = 1,"p 52t/a>"p 53t/a>        ta href="+code=PDC_100_MHZ" class="sref">PDC_100_MHZt/a>             = 100000000,"p 54t/a>        ta href="+code=PDC_133_MHZ" class="sref">PDC_133_MHZt/a>             = 133333333,"p 55t/a>"p 56t/a>        ta href="+code=PDC_SYS_CTL" class="sref">PDC_SYS_CTLt/a>             = 0x1100,"p 57t/a>        ta href="+code=PDC_ATA_CTL" class="sref">PDC_ATA_CTLt/a>             = 0x1104,"p 58t/a>        ta href="+code=PDC_GLOBAL_CTL" class="sref">PDC_GLOBAL_CTLt/a>          = 0x1108,"p 59t/a>        ta href="+code=PDC_CTCR0" class="sref">PDC_CTCR0t/a>               = 0x110C,"p 60t/a>        ta href="+code=PDC_CTCR1" class="sref">PDC_CTCR1t/a>               = 0x1110,"p 61t/a>        ta href="+code=PDC_BYTE_COUNT" class="sref">PDC_BYTE_COUNTt/a>          = 0x1120,"p 62t/a>        ta href="+code=PDC_PLL_CTL" class="sref">PDC_PLL_CTLt/a>             = 0x1202,"p 63t/a>};"p 64t/a>"p 65t/a>static intpta href="+code=pdc2027x_init_one" class="sref">pdc2027x_init_onet/a>(structpta href="+code=pci_dev" class="sref">pci_devt/a> *ta href="+code=pdev" class="sref">pdevt/a>, const structpta href="+code=pci_device_id" class="sref">pci_device_idt/a> *ta href="+code=ent" class="sref">entt/a>);"p 66t/a>static intpta href="+code=pdc2027x_reinit_one" class="sref">pdc2027x_reinit_onet/a>(structpta href="+code=pci_dev" class="sref">pci_devt/a> *ta href="+code=pdev" class="sref">pdevt/a>);"p 67t/a>static intpta href="+code=pdc2027x_prereset" class="sref">pdc2027x_preresett/a>(structpta href="+code=ata_link" class="sref">ata_linkt/a> *ta href="+code=link" class="sref">linkt/a>, unsigned longpta href="+code=deadline" class="sref">deadlinet/a>);"p 68t/a>static voidpta href="+code=pdc2027x_set_piomode" class="sref">pdc2027x_set_piomodet/a>(structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a>, structpta href="+code=ata_device" class="sref">ata_devicet/a> *ta href="+code=adev" class="sref">adevt/a>);"p 69t/a>static voidpta href="+code=pdc2027x_set_dmamode" class="sref">pdc2027x_set_dmamodet/a>(structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a>, structpta href="+code=ata_device" class="sref">ata_devicet/a> *ta href="+code=adev" class="sref">adevt/a>);"p 70t/a>static intpta href="+code=pdc2027x_check_atapi_dma" class="sref">pdc2027x_check_atapi_dmat/a>(structpta href="+code=ata_queued_cmd" class="sref">ata_queued_cmdt/a> *ta href="+code=qc" class="sref">qct/a>);"p 71t/a>static unsigned longpta href="+code=pdc2027x_mode_filter" class="sref">pdc2027x_mode_filtert/a>(structpta href="+code=ata_device" class="sref">ata_devicet/a> *ta href="+code=adev" class="sref">adevt/a>, unsigned longpta href="+code=mask" class="sref">maskt/a>);"p 72t/a>static intpta href="+code=pdc2027x_cable_detect" class="sref">pdc2027x_cable_detectt/a>(structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a>);"p 73t/a>static intpta href="+code=pdc2027x_set_mode" class="sref">pdc2027x_set_modet/a>(structpta href="+code=ata_link" class="sref">ata_linkt/a> *ta href="+code=link" class="sref">linkt/a>, structpta href="+code=ata_device" class="sref">ata_devicet/a> **ta href="+code=r_failed" class="sref">r_failedt/a>);"p 74t/a>"p 75t/a>tspa2 class="comment">/*t/spa2="p 76t/a>tspa2 class="comment"> *oATA TimingpTables based on 133MHz controller clock.t/spa2="p 77t/a>tspa2 class="comment"> *oThese tables are only used when the controller is in 133MHz clock.t/spa2="p 78t/a>tspa2 class="comment"> * If the controller is in 100MHz clock, the ASIC hardware willt/spa2="p 79t/a>tspa2 class="comment"> *oset the timingpregisters automauecally when "set feature" commandt/spa2="p 8o2aa>tspa2 class="comment"> *ois issued to the device. However, if the controller clockois 133MHz,t/spa2="p 81t/a>tspa2 class="comment"> * the followingptables must be used.t/spa2="p 82t/a>tspa2 class="comment"> */t/spa2="p 83t/a>static structpta href="+code=pdc2027x_pio_timing" class="sref">pdc2027x_pio_timingt/a> {"p 84t/a>        ta href="+code=u8" class="sref">u8t/a> ta href="+code=e=2o"0" class="sref">e=2o"0t/a>,pta href="+code=e=2o"1" class="sref">e=2o"1t/a>,pta href="+code=e=2o"2" class="sref">e=2o"2t/a>;"p 85t/a>}pta href="+code=pdc2027x_pio_timing_tbl" class="sref">pdc2027x_pio_timing_tblt/a> [] = {"p 86t/a>        { 0xfb, 0x2b, 0xac }, tspa2 class="comment">/* PIOpmode 0 */t/spa2="p 87t/a>        { 0x46, 0x29, 0xa4 }, tspa2 class="comment">/* PIOpmode 1 */t/spa2="p 88t/a>        { 0x23, 0x26, 0x64 }, tspa2 class="comment">/* PIOpmode 2 */t/spa2="p 89t/a>        { 0x27, 0x0d, 0x35 }, tspa2 class="comment">/* PIOpmode 3, IORDY on,pPrefetch off */t/spa2="p 90t/a>        { 0x23, 0x09, 0x25 }, tspa2 class="comment">/* PIOpmode 4, IORDY on,pPrefetch off */t/spa2="p 91t/a>};"p 92t/a>"p 93t/a>static structpta href="+code=pdc2027x_mdma_timing" class="sref">pdc2027x_mdma_timingt/a> {"p 94t/a>        ta href="+code=u8" class="sref">u8t/a> ta href="+code=e=2o"0" class="sref">e=2o"0t/a>,pta href="+code=e=2o"1" class="sref">e=2o"1t/a>;"p 95t/a>}pta href="+code=pdc2027x_mdma_timing_tbl" class="sref">pdc2027x_mdma_timing_tblt/a> [] = {"p 96t/a>        { 0xdf, 0x5f }, tspa2 class="comment">/* MDMApmode 0 */t/spa2="p 97t/a>        { 0x6b, 0x27 }, tspa2 class="comment">/* MDMApmode 1 */t/spa2="p 98t/a>        { 0x69, 0x25 }, tspa2 class="comment">/* MDMApmode 2 */t/spa2="p 99t/a>};"p100t/a>"p101t/a>static structpta href="+code=pdc2027x_udma_timing" class="sref">pdc2027x_udma_timingt/a> {"p102t/a>        ta href="+code=u8" class="sref">u8t/a> ta href="+code=e=2o"0" class="sref">e=2o"0t/a>,pta href="+code=e=2o"1" class="sref">e=2o"1t/a>,pta href="+code=e=2o"2" class="sref">e=2o"2t/a>;"p103t/a>}pta href="+code=pdc2027x_udma_timing_tbl" class="sref">pdc2027x_udma_timing_tblt/a> [] = {"p104t/a>        { 0x4a, 0x0f, 0xd5 }, tspa2 class="comment">/* UDMApmode 0 */t/spa2="p105t/a>        { 0x3a, 0x0a, 0xd0 }, tspa2 class="comment">/* UDMApmode 1 */t/spa2="p106t/a>        { 0x2a, 0x07, 0xcd }, tspa2 class="comment">/* UDMApmode 2 */t/spa2="p107t/a>        { 0x1a, 0x05, 0xcd }, tspa2 class="comment">/* UDMApmode 3 */t/spa2="p108t/a>        { 0x1a, 0x03, 0xcd }, tspa2 class="comment">/* UDMApmode 4 */t/spa2="p109t/a>        { 0x1a, 0x02, 0xcb }, tspa2 class="comment">/* UDMApmode 5 */t/spa2="p110t/a>        { 0x1a, 0x01, 0xcb }, tspa2 class="comment">/* UDMApmode 6 */t/spa2="p111t/a>};"p112t/a>"p113t/a>static const structpta href="+code=pci_device_id" class="sref">pci_device_idt/a> ta href="+code=pdc2027x_pci_tbl" class="sref">pdc2027x_pci_tblt/a>[] = {"p114t/a>        { ta href="+code=PCI_VDEVICE" class="sref">PCI_VDEVICEt/a>(ta href="+code=PROMISE" class="sref">PROMISEt/a>,pta href="+code=PCI_DEVICE_ID_PROMISE_20268" class="sref">PCI_DEVICE_ID_PROMISE_20268t/a>),pta href="+code=PDC_UDMA_100" class="sref">PDC_UDMA_100t/a> },"p115t/a>        { ta href="+code=PCI_VDEVICE" class="sref">PCI_VDEVICEt/a>(ta href="+code=PROMISE" class="sref">PROMISEt/a>,pta href="+code=PCI_DEVICE_ID_PROMISE_20269" class="sref">PCI_DEVICE_ID_PROMISE_20269t/a>),pta href="+code=PDC_UDMA_133" class="sref">PDC_UDMA_133t/a> },"p116t/a>        { ta href="+code=PCI_VDEVICE" class="sref">PCI_VDEVICEt/a>(ta href="+code=PROMISE" class="sref">PROMISEt/a>,pta href="+code=PCI_DEVICE_ID_PROMISE_20270" class="sref">PCI_DEVICE_ID_PROMISE_20270t/a>),pta href="+code=PDC_UDMA_100" class="sref">PDC_UDMA_100t/a> },"p117t/a>        { ta href="+code=PCI_VDEVICE" class="sref">PCI_VDEVICEt/a>(ta href="+code=PROMISE" class="sref">PROMISEt/a>,pta href="+code=PCI_DEVICE_ID_PROMISE_20271" class="sref">PCI_DEVICE_ID_PROMISE_20271t/a>),pta href="+code=PDC_UDMA_133" class="sref">PDC_UDMA_133t/a> },"p118t/a>        { ta href="+code=PCI_VDEVICE" class="sref">PCI_VDEVICEt/a>(ta href="+code=PROMISE" class="sref">PROMISEt/a>,pta href="+code=PCI_DEVICE_ID_PROMISE_20275" class="sref">PCI_DEVICE_ID_PROMISE_20275t/a>),pta href="+code=PDC_UDMA_133" class="sref">PDC_UDMA_133t/a> },"p119t/a>        { ta href="+code=PCI_VDEVICE" class="sref">PCI_VDEVICEt/a>(ta href="+code=PROMISE" class="sref">PROMISEt/a>,pta href="+code=PCI_DEVICE_ID_PROMISE_20276" class="sref">PCI_DEVICE_ID_PROMISE_20276t/a>),pta href="+code=PDC_UDMA_133" class="sref">PDC_UDMA_133t/a> },"p120t/a>        { ta href="+code=PCI_VDEVICE" class="sref">PCI_VDEVICEt/a>(ta href="+code=PROMISE" class="sref">PROMISEt/a>,pta href="+code=PCI_DEVICE_ID_PROMISE_20277" class="sref">PCI_DEVICE_ID_PROMISE_20277t/a>),pta href="+code=PDC_UDMA_133" class="sref">PDC_UDMA_133t/a> },"p121t/a>"p122t/a>        { }     tspa2 class="comment">/* terminate list */t/spa2="p123t/a>};"p124t/a>"p125t/a>static structpta href="+code=pci_driver" class="sref">pci_drivert/a> ta href="+code=pdc2027x_pci_driver" class="sref">pdc2027x_pci_drivert/a> = {"p126t/a>        .ta href="+code=nam"" class="sref">nam"t/a>                   =pta href="+code=DRV_NAME" class="sref">DRV_NAMEt/a>,"p127t/a>        .ta href="+code=id_table" class="sref">id_tablet/a>               =pta href="+code=pdc2027x_pci_tbl" class="sref">pdc2027x_pci_tblt/a>,"p128t/a>        .ta href="+code=probe" class="sref">probet/a>                  =pta href="+code=pdc2027x_init_one" class="sref">pdc2027x_init_onet/a>,"p129t/a>        .ta href="+code=remove" class="sref">removet/a>                 =pta href="+code=ata_pci_remove_one" class="sref">ata_pci_remove_onet/a>,"p130t/a>#ifdefpta href="+code=CONFIG_PM" class="sref">CONFIG_PMt/a>"p131t/a>        .ta href="+code=suspend" class="sref">suspendt/a>                =pta href="+code=ata_pci_device_suspend" class="sref">ata_pci_device_suspendt/a>,"p132t/a>        .ta href="+code=resum"" class="sref">resum"t/a>                 =pta href="+code=pdc2027x_reinit_one" class="sref">pdc2027x_reinit_onet/a>,"p133t/a>#endif"p134t/a>};"p135t/a>"p136t/a>static structpta href="+code=scsi_host_template" class="sref">scsi_host_templatet/a> ta href="+code=pdc2027x_sht" class="sref">pdc2027x_shtt/a> = {"p137t/a>        ta href="+code=ATA_BMDMA_SHT" class="sref">ATA_BMDMA_SHTt/a>(ta href="+code=DRV_NAME" class="sref">DRV_NAMEt/a>),"p138t/a>};"p139t/a>"p140t/a>static structpta href="+code=ata_port_operaue=2s" class="sref">ata_port_operaue=2st/a> ta href="+code=pdc2027x_pata100_ops" class="sref">pdc2027x_pata100_opst/a> = {"p141t/a>        .ta href="+code=inherits" class="sref">inheritst/a>               =p&ta href="+code=ata_bmdma_port_ops" class="sref">ata_bmdma_port_opst/a>,"p142t/a>        .ta href="+code=check_atapi_dma" class="sref">check_atapi_dmat/a>        =pta href="+code=pdc2027x_check_atapi_dma" class="sref">pdc2027x_check_atapi_dmat/a>,"p143t/a>        .ta href="+code=cable_detect" class="sref">cable_detectt/a>           =pta href="+code=pdc2027x_cable_detect" class="sref">pdc2027x_cable_detectt/a>,"p144t/a>        .ta href="+code=prereset" class="sref">preresett/a>               =pta href="+code=pdc2027x_prereset" class="sref">pdc2027x_preresett/a>,"p145t/a>};"p146t/a>"p147t/a>static structpta href="+code=ata_port_operaue=2s" class="sref">ata_port_operaue=2st/a> ta href="+code=pdc2027x_pata133_ops" class="sref">pdc2027x_pata133_opst/a> = {"p148t/a>        .ta href="+code=inherits" class="sref">inheritst/a>               =p&ta href="+code=pdc2027x_pata100_ops" class="sref">pdc2027x_pata100_opst/a>,"p149t/a>        .ta href="+code=mode_filter" class="sref">mode_filtert/a>            =pta href="+code=pdc2027x_mode_filter" class="sref">pdc2027x_mode_filtert/a>,"p150t/a>        .ta href="+code=set_piomode" class="sref">set_piomodet/a>            =pta href="+code=pdc2027x_set_piomode" class="sref">pdc2027x_set_piomodet/a>,"p151t/a>        .ta href="+code=set_dmamode" class="sref">set_dmamodet/a>            =pta href="+code=pdc2027x_set_dmamode" class="sref">pdc2027x_set_dmamodet/a>,"p152t/a>        .ta href="+code=set_mode" class="sref">set_modet/a>               =pta href="+code=pdc2027x_set_mode" class="sref">pdc2027x_set_modet/a>,"p153t/a>};"p154t/a>"p155t/a>static structpta href="+code=ata_port_info" class="sref">ata_port_infot/a> ta href="+code=pdc2027x_port_info" class="sref">pdc2027x_port_infot/a>[] = {"p156t/a>        tspa2 class="comment">/* PDC_UDMA_100 */t/spa2="p157t/a>        {"p158t/a>                .ta href="+code=flags" class="sref">flagst/a>          =pta href="+code=ATA_FLAG_SLAVE_POSS" class="sref">ATA_FLAG_SLAVE_POSSt/a>,"p159t/a>                .ta href="+code=pio_mask" class="sref">pio_maskt/a>       =pta href="+code=ATA_PIO4" class="sref">ATA_PIO4t/a>,"p160t/a>                .ta href="+code=mwdma_mask" class="sref">mwdma_maskt/a>     =pta href="+code=ATA_MWDMA2" class="sref">ATA_MWDMA2t/a>,"p161t/a>                .ta href="+code=udma_mask" class="sref">udma_maskt/a>      =pta href="+code=ATA_UDMA5" class="sref">ATA_UDMA5t/a>,"p162t/a>                .ta href="+code=port_ops" class="sref">port_opst/a>       =p&ta href="+code=pdc2027x_pata100_ops" class="sref">pdc2027x_pata100_opst/a>,"p163t/a>        },"p164t/a>        tspa2 class="comment">/* PDC_UDMA_133 */t/spa2="p165t/a>        {"p166t/a>                .ta href="+code=flags" class="sref">flagst/a>          =pta href="+code=ATA_FLAG_SLAVE_POSS" class="sref">ATA_FLAG_SLAVE_POSSt/a>,"p167t/a>                .ta href="+code=pio_mask" class="sref">pio_maskt/a>       =pta href="+code=ATA_PIO4" class="sref">ATA_PIO4t/a>,"p168t/a>                .ta href="+code=mwdma_mask" class="sref">mwdma_maskt/a>     =pta href="+code=ATA_MWDMA2" class="sref">ATA_MWDMA2t/a>,"p169t/a>                .ta href="+code=udma_mask" class="sref">udma_maskt/a>      =pta href="+code=ATA_UDMA6" class="sref">ATA_UDMA6t/a>,"p170t/a>                .ta href="+code=port_ops" class="sref">port_opst/a>       =p&ta href="+code=pdc2027x_pata133_ops" class="sref">pdc2027x_pata133_opst/a>,"p171t/a>        },"p172t/a>};"p173t/a>"p174t/a>ta href="+code=MODULE_AUTHOR" class="sref">MODULE_AUTHORt/a>(tspa2 class="string">"Andre Hedrick, Frank Tierna2,pAlbert Lee"t/spa2=);"p175t/a>ta href="+code=MODULE_DESCRIPTION" class="sref">MODULE_DESCRIPTIONt/a>(tspa2 class="string">"libata driver module for Promise PDC20268 to PDC20277"t/spa2=);"p176t/a>ta href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSEt/a>(tspa2 class="string">"GPL"t/spa2=);"p177t/a>ta href="+code=MODULE_VERSION" class="sref">MODULE_VERSIONt/a>(ta href="+code=DRV_VERSION" class="sref">DRV_VERSIONt/a>);"p178t/a>ta href="+code=MODULE_DEVICE_TABLE" class="sref">MODULE_DEVICE_TABLEt/a>(ta href="+code=pci" class="sref">pcit/a>,pta href="+code=pdc2027x_pci_tbl" class="sref">pdc2027x_pci_tblt/a>);"p179t/a>"p18o2aa>tspa2 class="comment">/**t/spa2="p181t/a>tspa2 class="comment"> *      port_mmio - Get the MMIO address of PDC2027x extendedpregisterst/spa2="p182t/a>tspa2 class="comment"> *      @ap:pPortt/spa2="p183t/a>tspa2 class="comment"> *op    @offset: offset from mmio baset/spa2="p184t/a>tspa2 class="comment"> */t/spa2="p185t/a>static ta href="+code=inline" class="sref">inlinet/a> voidpta href="+code=__iomem" class="sref">__iomemt/a> *ta href="+code=port_mmio" class="sref">port_mmiot/a>(structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a>, unsigned intpta href="+code=offset" class="sref">offsett/a>)"p186t/a>{"p187t/a>        returnpta href="+code=ap" class="sref">apt/a>->ta href="+code=host" class="sref">hostt/a>->ta href="+code=iomap" class="sref">iomapt/a>[ta href="+code=PDC_MMIO_BAR" class="sref">PDC_MMIO_BARt/a>] +pta href="+code=ap" class="sref">apt/a>->ta href="+code=port_no" class="sref">port_not/a> * 0x100 +pta href="+code=offset" class="sref">offsett/a>;"p188t/a>}"p189t/a>"p19o2aa>tspa2 class="comment">/**t/spa2="p191t/a>tspa2 class="comment"> *      dev_mmio - Get the MMIO address of PDC2027x extendedpregisterst/spa2="p192t/a>tspa2 class="comment"> *      @ap:pPortt/spa2="p193t/a>tspa2 class="comment"> *op    @adev: devicet/spa2="p194t/a>tspa2 class="comment"> *op    @offset: offset from mmio baset/spa2="p195t/a>tspa2 class="comment"> */t/spa2="p196t/a>static ta href="+code=inline" class="sref">inlinet/a> voidpta href="+code=__iomem" class="sref">__iomemt/a> *ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a>, structpta href="+code=ata_device" class="sref">ata_devicet/a> *ta href="+code=adev" class="sref">adevt/a>, unsigned intpta href="+code=offset" class="sref">offsett/a>)"p197t/a>{"p198t/a>        ta href="+code=u8" class="sref">u8t/a> ta href="+code=adj" class="sref">adjt/a> = (ta href="+code=adev" class="sref">adevt/a>->ta href="+code=devno" class="sref">devnot/a>) ? 0x08 : 0x00;"p199t/a>        returnpta href="+code=port_mmio" class="sref">port_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=offset" class="sref">offsett/a>) +pta href="+code=adj" class="sref">adjt/a>;"p200t/a>}"p201t/a>"p202t/a>tspa2 class="comment">/**t/spa2="p203t/a>tspa2 class="comment"> *op    pdc2027x_pata_cable_detect - Probe host controller cable detect infot/spa2="p204t/a>tspa2 class="comment"> *op    @ap:pPort for which cable detect infoois desiredt/spa2="p205t/a>tspa2 class="comment"> *t/spa2="p206t/a>tspa2 class="comment"> *ooooooRead 80c cable indicator from Promise extendedpregister.t/spa2="p207t/a>tspa2 class="comment"> *ooooooThis registerois latched when the system is reset.t/spa2="p208t/a>tspa2 class="comment"> *t/spa2="p209t/a>tspa2 class="comment"> *ooooooLOCKING:t/spa2="p21o2aa>tspa2 class="comment"> *ooooooNone (inherited from caller).t/spa2="p211t/a>tspa2 class="comment"> */t/spa2="p212t/a>static intpta href="+code=pdc2027x_cable_detect" class="sref">pdc2027x_cable_detectt/a>(structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a>)"p213t/a>{"p214t/a>        ta href="+code=u32" class="sref">u32t/a> ta href="+code=cgcr" class="sref">cgcrt/a>;"p215t/a>"p216t/a>        tspa2 class="comment">/* check cable detect results */t/spa2="p217t/a>        ta href="+code=cgcr" class="sref">cgcrt/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=port_mmio" class="sref">port_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=PDC_GLOBAL_CTL" class="sref">PDC_GLOBAL_CTLt/a>));"p218t/a>        if (ta href="+code=cgcr" class="sref">cgcrt/a> & (1 << 26))"p219t/a>                goto ta href="+code=cbl40" class="sref">cbl40t/a>;"p220t/a>"p221t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"No cable or 80-conductor cable on port %d\n"t/spa2=, ta href="+code=ap" class="sref">apt/a>->ta href="+code=port_no" class="sref">port_not/a>);"p222t/a>"p223t/a>        returnpta href="+code=ATA_CBL_PATA80" class="sref">ATA_CBL_PATA80t/a>;"p224t/a>ta href="+code=cbl40" class="sref">cbl40t/a>:"p225t/a>        ta href="+code=printk" class="sref">printkt/a>(ta href="+code=KERN_INFO" class="sref">KERN_INFOt/a> ta href="+code=DRV_NAME" class="sref">DRV_NAMEt/a> tspa2 class="string">": 40-conductor cable detected on port %d\n"t/spa2=, ta href="+code=ap" class="sref">apt/a>->ta href="+code=port_no" class="sref">port_not/a>);"p226t/a>        returnpta href="+code=ATA_CBL_PATA40" class="sref">ATA_CBL_PATA40t/a>;"p227t/a>}"p228t/a>"p229t/a>tspa2 class="comment">/**t/spa2="p23o2aa>tspa2 class="comment"> *opdc2027x_port_enabled - Check PDCoATA control registeroto see whether the port is enabled.t/spa2="p231t/a>tspa2 class="comment"> * @ap:pPort to checkt/spa2="p232t/a>tspa2 class="comment"> */t/spa2="p233t/a>static ta href="+code=inline" class="sref">inlinet/a> intpta href="+code=pdc2027x_port_enabled" class="sref">pdc2027x_port_enabledt/a>(structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a>)"p234t/a>{"p235t/a>        returnpta href="+code=ioread8" class="sref">ioread8t/a>(ta href="+code=port_mmio" class="sref">port_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=PDC_ATA_CTL" class="sref">PDC_ATA_CTLt/a>)) & 0x02;"p236t/a>}"p237t/a>"p238t/a>tspa2 class="comment">/**t/spa2="p239t/a>tspa2 class="comment"> *oooooopdc2027x_prereset - prereset for PATA host controllert/spa2="p24o2aa>tspa2 class="comment"> *oooooo@link: Target linkt/spa2="p241t/a>tspa2 class="comment"> *      @deadline: deadline jiffies for the operaue=2t/spa2="p242t/a>tspa2 class="comment"> *t/spa2="p243t/a>tspa2 class="comment"> *op    Probeinit includingpcable detecte=2.t/spa2="p244t/a>tspa2 class="comment"> *t/spa2="p245t/a>tspa2 class="comment"> *ooooooLOCKING:t/spa2="p246t/a>tspa2 class="comment"> *ooooooNone (inherited from caller).t/spa2="p247t/a>tspa2 class="comment"> */t/spa2="p248t/a>"p249t/a>static intpta href="+code=pdc2027x_prereset" class="sref">pdc2027x_preresett/a>(structpta href="+code=ata_link" class="sref">ata_linkt/a> *ta href="+code=link" class="sref">linkt/a>, unsigned longpta href="+code=deadline" class="sref">deadlinet/a>)"p250t/a>{"p251t/a>        tspa2 class="comment">/* Check whether port enabled */t/spa2="p252t/a>        if (!ta href="+code=pdc2027x_port_enabled" class="sref">pdc2027x_port_enabledt/a>(ta href="+code=link" class="sref">linkt/a>->ta href="+code=ap" class="sref">apt/a>))"p253t/a>                returnp-ta href="+code=ENOENT" class="sref">ENOENTt/a>;"p254t/a>        returnpta href="+code=ata_sff_prereset" class="sref">ata_sff_preresett/a>(ta href="+code=link" class="sref">linkt/a>, ta href="+code=deadline" class="sref">deadlinet/a>);"p255t/a>}"p256t/a>"p257t/a>tspa2 class="comment">/**t/spa2="p258t/a>tspa2 class="comment"> * ooooopdc2720x_mode_filteroooo-       mode selecte=2 filtert/spa2="p259t/a>tspa2 class="comment"> *oooooo@adev: ATA devicet/spa2="p26o2aa>tspa2 class="comment"> *oooooo@mask: list of modes proposedt/spa2="p261t/a>tspa2 class="comment"> *t/spa2="p262t/a>tspa2 class="comment"> *      BlockoUDMAp=2 devices that cause trouble with this controller.t/spa2="p263t/a>tspa2 class="comment"> */t/spa2="p264t/a>"p265t/a>static unsigned longpta href="+code=pdc2027x_mode_filter" class="sref">pdc2027x_mode_filtert/a>(structpta href="+code=ata_device" class="sref">ata_devicet/a> *ta href="+code=adev" class="sref">adevt/a>, unsigned longpta href="+code=mask" class="sref">maskt/a>)"p266t/a>{"p267t/a>        unsigned charpta href="+code=model_num" class="sref">model_numt/a>[ta href="+code=ATA_ID_PROD_LEN" class="sref">ATA_ID_PROD_LENt/a> + 1];"p268t/a>        structpta href="+code=ata_device" class="sref">ata_devicet/a> *ta href="+code=pair" class="sref">pairt/a> =pta href="+code=ata_dev_pair" class="sref">ata_dev_pairt/a>(ta href="+code=adev" class="sref">adevt/a>);"p269t/a>"p270t/a>        if (ta href="+code=adev" class="sref">adevt/a>->ta href="+code=class" class="sref">classt/a> !=pta href="+code=ATA_DEV_ATA" class="sref">ATA_DEV_ATAt/a> ||pta href="+code=adev" class="sref">adevt/a>->ta href="+code=devno" class="sref">devnot/a> == 0 ||pta href="+code=pair" class="sref">pairt/a> ==pta href="+code=NULL" class="sref">NULLt/a>)"p271t/a>                returnpta href="+code=mask" class="sref">maskt/a>;"p272t/a>"p273t/a>        tspa2 class="comment">/* Check for slave of a Maxtor at UDMA6 */t/spa2="p274t/a>        ta href="+code=ata_id_c_string" class="sref">ata_id_c_stringt/a>(ta href="+code=pair" class="sref">pairt/a>->ta href="+code=id" class="sref">idt/a>, ta href="+code=model_num" class="sref">model_numt/a>, ta href="+code=ATA_ID_PROD" class="sref">ATA_ID_PRODt/a>,"p275t/a>                          ta href="+code=ATA_ID_PROD_LEN" class="sref">ATA_ID_PROD_LENt/a> + 1);"p276t/a>        tspa2 class="comment">/* If the masterois a maxtor in UDMA6 then the slave should not use UDMAp6 */t/spa2="p277t/a>        if (ta href="+code=strstr" class="sref">strstrt/a>(ta href="+code=model_num" class="sref">model_numt/a>, tspa2 class="string">"Maxtor"t/spa2=) ==pta href="+code=NULL" class="sref">NULLt/a> && ta href="+code=pair" class="sref">pairt/a>->ta href="+code=dma_mode" class="sref">dma_modet/a> ==pta href="+code=XFER_UDMA_6" class="sref">XFER_UDMA_6t/a>)"p278t/a>                ta href="+code=mask" class="sref">maskt/a> &= ~ (1 << (6 +pta href="+code=ATA_SHIFT_UDMA" class="sref">ATA_SHIFT_UDMAt/a>));"p279t/a>"p280t/a>        returnpta href="+code=mask" class="sref">maskt/a>;"p281t/a>}"p282t/a>"p283t/a>tspa2 class="comment">/**t/spa2="p284t/a>tspa2 class="comment"> * ooooopdc2027x_set_piomode - Initialize host controller PATA PIO timingst/spa2="p285t/a>tspa2 class="comment"> *oooooo@ap:pPort to configuret/spa2="p286t/a>tspa2 class="comment"> *oooooo@adev: umt/spa2="p287t/a>tspa2 class="comment"> *t/spa2="p288t/a>tspa2 class="comment"> * oooooSet PIO mode for device.t/spa2="p289t/a>tspa2 class="comment"> *t/spa2="p29o2aa>tspa2 class="comment"> *ooooooLOCKING:t/spa2="p291t/a>tspa2 class="comment"> *      None (inherited from caller).t/spa2="p292t/a>tspa2 class="comment"> */t/spa2="p293t/a>"p294t/a>static voidpta href="+code=pdc2027x_set_piomode" class="sref">pdc2027x_set_piomodet/a>(structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a>, structpta href="+code=ata_device" class="sref">ata_devicet/a> *ta href="+code=adev" class="sref">adevt/a>)"p295t/a>{"p296t/a>        unsigned intpta href="+code=pio" class="sref">piot/a> =pta href="+code=adev" class="sref">adevt/a>->ta href="+code=pio_mode" class="sref">pio_modet/a> -pta href="+code=XFER_PIO_0" class="sref">XFER_PIO_0t/a>;"p297t/a>        ta href="+code=u32" class="sref">u32t/a> ta href="+code=ctcr0" class="sref">ctcr0t/a>, ta href="+code=ctcr1" class="sref">ctcr1t/a>;"p298t/a>"p299t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"adev->pio_mode[%X]\n"t/spa2=, ta href="+code=adev" class="sref">adevt/a>->ta href="+code=pio_mode" class="sref">pio_modet/a>);"p300t/a>"p301t/a>        tspa2 class="comment">/* Sanity check */t/spa2="p302t/a>        if (ta href="+code=pio" class="sref">piot/a> > 4) {"p303t/a>                ta href="+code=printk" class="sref">printkt/a>(ta href="+code=KERN_ERR" class="sref">KERN_ERRt/a> ta href="+code=DRV_NAME" class="sref">DRV_NAMEt/a> tspa2 class="string">": Unknown pio mode [%d] ignored\n"t/spa2=, ta href="+code=pio" class="sref">piot/a>);"p304t/a>                return;"p305t/a>"p306t/a>        }"p307t/a>"p308t/a>        tspa2 class="comment">/* Set the PIO timingpregisters usingpvalue table for 133MHz */t/spa2="p309t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Set pio regs... \n"t/spa2=);"p310t/a>"p311t/a>        ta href="+code=ctcr0" class="sref">ctcr0t/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=adev" class="sref">adevt/a>, ta href="+code=PDC_CTCR0" class="sref">PDC_CTCR0t/a>));"p312t/a>        ta href="+code=ctcr0" class="sref">ctcr0t/a> &= 0xffff0000;"p313t/a>        ta href="+code=ctcr0" class="sref">ctcr0t/a> |=pta href="+code=pdc2027x_pio_timing_tbl" class="sref">pdc2027x_pio_timing_tblt/a>[ta href="+code=pio" class="sref">piot/a>].ta href="+code=value0" class="sref">value0t/a> |"p314t/a>                (ta href="+code=pdc2027x_pio_timing_tbl" class="sref">pdc2027x_pio_timing_tblt/a>[ta href="+code=pio" class="sref">piot/a>].ta href="+code=value1" class="sref">value1t/a> << 8);"p315t/a>        ta href="+code=iowrite32" class="sref">iowrite32t/a>(ta href="+code=ctcr0" class="sref">ctcr0t/a>, ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=adev" class="sref">adevt/a>, ta href="+code=PDC_CTCR0" class="sref">PDC_CTCR0t/a>));"p316t/a>"p317t/a>        ta href="+code=ctcr1" class="sref">ctcr1t/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=adev" class="sref">adevt/a>, ta href="+code=PDC_CTCR1" class="sref">PDC_CTCR1t/a>));"p318t/a>        ta href="+code=ctcr1" class="sref">ctcr1t/a> &= 0x00ffffff;"p319t/a>        ta href="+code=ctcr1" class="sref">ctcr1t/a> |= (ta href="+code=pdc2027x_pio_timing_tbl" class="sref">pdc2027x_pio_timing_tblt/a>[ta href="+code=pio" class="sref">piot/a>].ta href="+code=value2" class="sref">value2t/a> << 24);"p320t/a>        ta href="+code=iowrite32" class="sref">iowrite32t/a>(ta href="+code=ctcr1" class="sref">ctcr1t/a>, ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=adev" class="sref">adevt/a>, ta href="+code=PDC_CTCR1" class="sref">PDC_CTCR1t/a>));"p321t/a>"p322t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Set pio regs done\n"t/spa2=);"p323t/a>"p324t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Set to pio mode[%u] \n"t/spa2=, ta href="+code=pio" class="sref">piot/a>);"p325t/a>}"p326t/a>"p327t/a>tspa2 class="comment">/**t/spa2="p328t/a>tspa2 class="comment"> * ooooopdc2027x_set_dmamode - Initialize host controller PATA UDMAptimingst/spa2="p329t/a>tspa2 class="comment"> *oooooo@ap:pPort to configuret/spa2="p33o2aa>tspa2 class="comment"> *oooooo@adev: umt/spa2="p331t/a>tspa2 class="comment"> *t/spa2="p332t/a>tspa2 class="comment"> *ooooooSet UDMApmode for device.t/spa2="p333t/a>tspa2 class="comment"> *t/spa2="p334t/a>tspa2 class="comment"> * oooooLOCKING:t/spa2="p335t/a>tspa2 class="comment"> *ooooooNone (inherited from caller).t/spa2="p336t/a>tspa2 class="comment"> */t/spa2="p337t/a>static voidpta href="+code=pdc2027x_set_dmamode" class="sref">pdc2027x_set_dmamodet/a>(structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a>, structpta href="+code=ata_device" class="sref">ata_devicet/a> *ta href="+code=adev" class="sref">adevt/a>)"p338t/a>{"p339t/a>        unsigned intpta href="+code=dma_mode" class="sref">dma_modet/a> =pta href="+code=adev" class="sref">adevt/a>->ta href="+code=dma_mode" class="sref">dma_modet/a>;"p340t/a>        ta href="+code=u32" class="sref">u32t/a> ta href="+code=ctcr0" class="sref">ctcr0t/a>, ta href="+code=ctcr1" class="sref">ctcr1t/a>;"p341t/a>"p342t/a>        if ((ta href="+code=dma_mode" class="sref">dma_modet/a> >=pta href="+code=XFER_UDMA_0" class="sref">XFER_UDMA_0t/a>) &&"p343t/a>           (ta href="+code=dma_mode" class="sref">dma_modet/a> <=pta href="+code=XFER_UDMA_6" class="sref">XFER_UDMA_6t/a>)) {"p344t/a>                tspa2 class="comment">/* Set the UDMAptimingpregisters with value table for 133MHz */t/spa2="p345t/a>                unsigned intpta href="+code=udma_mode" class="sref">udma_modet/a> =pta href="+code=dma_mode" class="sref">dma_modet/a> & 0x07;"p346t/a>"p347t/a>                if (ta href="+code=dma_mode" class="sref">dma_modet/a> ==pta href="+code=XFER_UDMA_2" class="sref">XFER_UDMA_2t/a>) {"p348t/a>                        tspa2 class="comment">/*t/spa2="p349t/a>tspa2 class="comment">                         * Turnpoff tHOLD.t/spa2="p35o2aa>tspa2 class="comment">                         * If tHOLDois '1', the hardware will add half clock for data holdptime.t/spa2="p351t/a>tspa2 class="comment">                         * This code segment seems to be no effect. tHOLDowill be overwritten below.t/spa2="p352t/a>tspa2 class="comment">                         */t/spa2="p353t/a>                        ta href="+code=ctcr1" class="sref">ctcr1t/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=adev" class="sref">adevt/a>, ta href="+code=PDC_CTCR1" class="sref">PDC_CTCR1t/a>));"p354t/a>                        ta href="+code=iowrite32" class="sref">iowrite32t/a>(ta href="+code=ctcr1" class="sref">ctcr1t/a> & ~(1 << 7), ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=adev" class="sref">adevt/a>, ta href="+code=PDC_CTCR1" class="sref">PDC_CTCR1t/a>));"p355t/a>                }"p356t/a>"p357t/a>                ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Set udma regs... \n"t/spa2=);"p358t/a>"p359t/a>                ta href="+code=ctcr1" class="sref">ctcr1t/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=adev" class="sref">adevt/a>, ta href="+code=PDC_CTCR1" class="sref">PDC_CTCR1t/a>));"p360t/a>                ta href="+code=ctcr1" class="sref">ctcr1t/a> &= 0xff000000;"p361t/a>                ta href="+code=ctcr1" class="sref">ctcr1t/a> |= ta href="+code=pdc2027x_udma_timing_tbl" class="sref">pdc2027x_udma_timing_tblt/a>[ta href="+code=udma_mode" class="sref">udma_modet/a>].ta href="+code=value0" class="sref">value0t/a> |"p362t/a>                        (ta href="+code=pdc2027x_udma_timing_tbl" class="sref">pdc2027x_udma_timing_tblt/a>[ta href="+code=udma_mode" class="sref">udma_modet/a>].ta href="+code=value1" class="sref">value1t/a> << 8) |"p363t/a>                        (ta href="+code=pdc2027x_udma_timing_tbl" class="sref">pdc2027x_udma_timing_tblt/a>[ta href="+code=udma_mode" class="sref">udma_modet/a>].ta href="+code=value2" class="sref">value2t/a> << 16);"p364t/a>                ta href="+code=iowrite32" class="sref">iowrite32t/a>(ta href="+code=ctcr1" class="sref">ctcr1t/a>, ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=adev" class="sref">adevt/a>, ta href="+code=PDC_CTCR1" class="sref">PDC_CTCR1t/a>));"p365t/a>"p366t/a>                ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Set udma regs done\n"t/spa2=);"p367t/a>"p368t/a>                ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Set to udma mode[%u] \n"t/spa2=, ta href="+code=udma_mode" class="sref">udma_modet/a>);"p369t/a>"p370t/a>        } else  if ((ta href="+code=dma_mode" class="sref">dma_modet/a> >=pta href="+code=XFER_MW_DMA_0" class="sref">XFER_MW_DMA_0t/a>) &&"p371t/a>                   (ta href="+code=dma_mode" class="sref">dma_modet/a> <=pta href="+code=XFER_MW_DMA_2" class="sref">XFER_MW_DMA_2t/a>)) {"p372t/a>                tspa2 class="comment">/* Set the MDMAptimingpregisters with value table for 133MHz */t/spa2="p373t/a>                unsigned intpta href="+code=mdma_mode" class="sref">mdma_modet/a> =pta href="+code=dma_mode" class="sref">dma_modet/a> & 0x07;"p374t/a>"p375t/a>                ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Set mdma regs... \n"t/spa2=);"p376t/a>                ta href="+code=ctcr0" class="sref">ctcr0t/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=adev" class="sref">adevt/a>, ta href="+code=PDC_CTCR0" class="sref">PDC_CTCR0t/a>));"p377t/a>"p378t/a>                ta href="+code=ctcr0" class="sref">ctcr0t/a> &= 0x0000ffff;"p379t/a>                ta href="+code=ctcr0" class="sref">ctcr0t/a> |=p(ta href="+code=pdc2027x_mdma_timing_tbl" class="sref">pdc2027x_mdma_timing_tblt/a>[ta href="+code=mdma_mode" class="sref">mdma_modet/a>].ta href="+code=value0" class="sref">value0t/a> << 16) |"p380t/a>                        (ta href="+code=pdc2027x_mdma_timing_tbl" class="sref">pdc2027x_mdma_timing_tblt/a>[ta href="+code=mdma_mode" class="sref">mdma_modet/a>].ta href="+code=value1" class="sref">value1t/a> << 24);"p381t/a>"p382t/a>                ta href="+code=iowrite32" class="sref">iowrite32t/a>(ta href="+code=ctcr0" class="sref">ctcr0t/a>, ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=adev" class="sref">adevt/a>, ta href="+code=PDC_CTCR0" class="sref">PDC_CTCR0t/a>));"p383t/a>                ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Set mdma regs done\n"t/spa2=);"p384t/a>"p385t/a>                ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Set to mdma mode[%u] \n"t/spa2=, ta href="+code=mdma_mode" class="sref">mdma_modet/a>);"p386t/a>        } else {"p387t/a>                ta href="+code=printk" class="sref">printkt/a>(ta href="+code=KERN_ERR" class="sref">KERN_ERRt/a> ta href="+code=DRV_NAME" class="sref">DRV_NAMEt/a> tspa2 class="string">": Unknown dma mode [%u] ignored\n"t/spa2=, ta href="+code=dma_mode" class="sref">dma_modet/a>);"p388t/a>        }"p389t/a>}"p390t/a>"p391t/a>tspa2 class="comment">/**t/spa2="p392t/a>tspa2 class="comment"> *      pdc2027x_set_mode - Set the timingpregisters back to correct values.t/spa2="p393t/a>tspa2 class="comment"> *op    @link: link to configuret/spa2="p394t/a>tspa2 class="comment"> * ooooo@r_failed: Returned device for failuret/spa2="p395t/a>tspa2 class="comment"> *t/spa2="p396t/a>tspa2 class="comment"> *ooooooThe pdc2027x hardware will look at "SET FEATURES" and change the timingpregisterst/spa2="p397t/a>tspa2 class="comment"> *ooooooautomatically.oThe values set by the hardware might be incorrect, under 133Mhz PLL.t/spa2="p398t/a>tspa2 class="comment"> * oooooThis functe=2 overwrites the possibly incorrect values set by the hardware to be correct.t/spa2="p399t/a>tspa2 class="comment"> */t/spa2="p400t/a>static intpta href="+code=pdc2027x_set_mode" class="sref">pdc2027x_set_modet/a>(structpta href="+code=ata_link" class="sref">ata_linkt/a> *ta href="+code=link" class="sref">linkt/a>, structpta href="+code=ata_device" class="sref">ata_devicet/a> **ta href="+code=r_failed" class="sref">r_failedt/a>)"p401t/a>{"p402t/a>        structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a> =pta href="+code=link" class="sref">linkt/a>->ta href="+code=ap" class="sref">apt/a>;"p403t/a>        structpta href="+code=ata_device" class="sref">ata_devicet/a> *ta href="+code=dev" class="sref">devt/a>;"p404t/a>        intpta href="+code=rc" class="sref">rct/a>;"p405t/a>"p406t/a>        ta href="+code=rc" class="sref">rct/a> =pta href="+code=ata_do_set_mode" class="sref">ata_do_set_modet/a>(ta href="+code=link" class="sref">linkt/a>, ta href="+code=r_failed" class="sref">r_failedt/a>);"p407t/a>        if (ta href="+code=rc" class="sref">rct/a> < 0)"p408t/a>                returnpta href="+code=rc" class="sref">rct/a>;"p409t/a>"p410t/a>        ta href="+code=ata_for_each_dev" class="sref">ata_for_each_devt/a>(ta href="+code=dev" class="sref">devt/a>, ta href="+code=link" class="sref">linkt/a>, ta href="+code=ENABLED" class="sref">ENABLEDt/a>) {"p411t/a>                ta href="+code=pdc2027x_set_piomode" class="sref">pdc2027x_set_piomodet/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=dev" class="sref">devt/a>);"p412t/a>"p413t/a>                tspa2 class="comment">/*t/spa2="p414t/a>tspa2 class="comment">                 * Enable prefetch if the device support PIO only.t/spa2="p415t/a>tspa2 class="comment">                 */t/spa2="p416t/a>                if (ta href="+code=dev" class="sref">devt/a>->ta href="+code=xfer_shift" class="sref">xfer_shiftt/a> ==pta href="+code=ATA_SHIFT_PIO" class="sref">ATA_SHIFT_PIOt/a>) {"p417t/a>                        ta href="+code=u32" class="sref">u32t/a> ta href="+code=ctcr1" class="sref">ctcr1t/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=dev" class="sref">devt/a>, ta href="+code=PDC_CTCR1" class="sref">PDC_CTCR1t/a>));"p418t/a>                        ta href="+code=ctcr1" class="sref">ctcr1t/a> |=p(1 << 25);"p419t/a>                        ta href="+code=iowrite32" class="sref">iowrite32t/a>(ta href="+code=ctcr1" class="sref">ctcr1t/a>, ta href="+code=dev_mmio" class="sref">dev_mmiot/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=dev" class="sref">devt/a>, ta href="+code=PDC_CTCR1" class="sref">PDC_CTCR1t/a>));"p420t/a>"p421t/a>                        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Turnpon prefetch\n"t/spa2=);"p422t/a>                } else {"p423t/a>                        ta href="+code=pdc2027x_set_dmamode" class="sref">pdc2027x_set_dmamodet/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=dev" class="sref">devt/a>);"p424t/a>                }"p425t/a>        }"p426t/a>        returnp0;"p427t/a>}"p428t/a>"p429t/a>tspa2 class="comment">/**t/spa2="p43o2aa>tspa2 class="comment"> *oooooopdc2027x_check_atapi_dma - Check whether ATAPI DMApcan be supported for this commandt/spa2="p431t/a>tspa2 class="comment"> *oooooo@qc: Metadata associated with taskfile to checkt/spa2="p432t/a>tspa2 class="comment"> *t/spa2="p433t/a>tspa2 class="comment"> *ooooooLOCKING:t/spa2="p434t/a>tspa2 class="comment"> * oooooNone (inherited from caller).t/spa2="p435t/a>tspa2 class="comment"> *t/spa2="p436t/a>tspa2 class="comment"> * oooooRETURNS: 0 when ATAPI DMApcan be usedt/spa2="p437t/a>tspa2 class="comment"> *ooooooooooooooo1 otherwiset/spa2="p438t/a>tspa2 class="comment"> */t/spa2="p439t/a>static intpta href="+code=pdc2027x_check_atapi_dma" class="sref">pdc2027x_check_atapi_dmat/a>(structpta href="+code=ata_queued_cmd" class="sref">ata_queued_cmdt/a> *ta href="+code=qc" class="sref">qct/a>)"p440t/a>{"p441t/a>        structpta href="+code=scsi_cmnd" class="sref">scsi_cmndt/a> *ta href="+code=cmd" class="sref">cmdt/a> =pta href="+code=qc" class="sref">qct/a>->ta href="+code=scsicmd" class="sref">scsicmdt/a>;"p442t/a>        ta href="+code=u8" class="sref">u8t/a> *ta href="+code=scsicmd" class="sref">scsicmdt/a> =pta href="+code=cmd" class="sref">cmdt/a>->ta href="+code=cmnd" class="sref">cmndt/a>;"p443t/a>        intpta href="+code=rc" class="sref">rct/a> =p1; tspa2 class="comment">/* atapi dma off by default */t/spa2="p444t/a>"p445t/a>        tspa2 class="comment">/*t/spa2="p446t/a>tspa2 class="comment">         * This workaroundois from Promise's GPL driver.t/spa2="p447t/a>tspa2 class="comment">         * If ATAPI DMApis used for commands not in thet/spa2="p448t/a>tspa2 class="comment">         * followingpwhite list, say MODE_SENSE and REQUEST_SENSE,t/spa2="p449t/a>tspa2 class="comment">         * pdc2027x might hit the irq lost problem.t/spa2="p45o2aa>tspa2 class="comment">         */t/spa2="p451t/a>        switch (ta href="+code=scsicmd" class="sref">scsicmdt/a>[0]) {"p452t/a>        casepta href="+code=READ_10" class="sref">READ_10t/a>:"p453t/a>        casepta href="+code=WRITE_10" class="sref">WRITE_10t/a>:"p454t/a>        casepta href="+code=READ_12" class="sref">READ_12t/a>:"p455t/a>        casepta href="+code=WRITE_12" class="sref">WRITE_12t/a>:"p456t/a>        casepta href="+code=READ_6" class="sref">READ_6t/a>:"p457t/a>        casepta href="+code=WRITE_6" class="sref">WRITE_6t/a>:"p458t/a>        casep0xad: tspa2 class="comment">/* READ_DVD_STRUCTURE */t/spa2="p459t/a>        casep0xbe: tspa2 class="comment">/* READ_CD */t/spa2="p460t/a>                tspa2 class="comment">/* ATAPI DMApis ok */t/spa2="p461t/a>                ta href="+code=rc" class="sref">rct/a> =p0;"p462t/a>                break;"p463t/a>        default:"p464t/a>                ;"p465t/a>        }"p466t/a>"p467t/a>        returnpta href="+code=rc" class="sref">rct/a>;"p468t/a>}"p469t/a>"p47o2aa>tspa2 class="comment">/**t/spa2="p471t/a>tspa2 class="comment"> *opdc_read_counter - Read the ctr countert/spa2="p472t/a>tspa2 class="comment"> * @host: target ATA hostt/spa2="p473t/a>tspa2 class="comment"> */t/spa2="p474t/a>"p475t/a>static longpta href="+code=pdc_read_counter" class="sref">pdc_read_countert/a>(structpta href="+code=ata_host" class="sref">ata_hostt/a> *ta href="+code=host" class="sref">hostt/a>)"p476t/a>{"p477t/a>        voidpta href="+code=__iomem" class="sref">__iomemt/a> *ta href="+code=mmio_base" class="sref">mmio_baset/a> =pta href="+code=host" class="sref">hostt/a>->ta href="+code=iomap" class="sref">iomapt/a>[ta href="+code=PDC_MMIO_BAR" class="sref">PDC_MMIO_BARt/a>];"p478t/a>        longpta href="+code=counter" class="sref">countert/a>;"p479t/a>        intpta href="+code=retry" class="sref">retryt/a> =p1;"p480t/a>        ta href="+code=u32" class="sref">u32t/a> ta href="+code=bccrl" class="sref">bccrlt/a>, ta href="+code=bccrh" class="sref">bccrht/a>, ta href="+code=bccrlv" class="sref">bccrlvt/a>, ta href="+code=bccrhv" class="sref">bccrhvt/a>;"p481t/a>"p482t/a>ta href="+code=retry" class="sref">retryt/a>:"p483t/a>        ta href="+code=bccrl" class="sref">bccrlt/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_BYTE_COUNT" class="sref">PDC_BYTE_COUNTt/a>) & 0x7fff;"p484t/a>        ta href="+code=bccrh" class="sref">bccrht/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_BYTE_COUNT" class="sref">PDC_BYTE_COUNTt/a> + 0x100) & 0x7fff;"p485t/a>"p486t/a>        tspa2 class="comment">/* Read the counter values again for verificate=2 */t/spa2="p487t/a>        ta href="+code=bccrlv" class="sref">bccrlvt/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_BYTE_COUNT" class="sref">PDC_BYTE_COUNTt/a>) & 0x7fff;"p488t/a>        ta href="+code=bccrhv" class="sref">bccrhvt/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_BYTE_COUNT" class="sref">PDC_BYTE_COUNTt/a> + 0x100) & 0x7fff;"p489t/a>"p490t/a>        ta href="+code=counter" class="sref">countert/a> =p(ta href="+code=bccrh" class="sref">bccrht/a> << 15) | ta href="+code=bccrl" class="sref">bccrlt/a>;"p491t/a>"p492t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"bccrh [%X] bccrl [%X]\n"t/spa2=, ta href="+code=bccrh" class="sref">bccrht/a>,  ta href="+code=bccrl" class="sref">bccrlt/a>);"p493t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"bccrhv[%X] bccrlv[%X]\n"t/spa2=, ta href="+code=bccrhv" class="sref">bccrhvt/a>, ta href="+code=bccrlv" class="sref">bccrlvt/a>);"p494t/a>"p495t/a>        tspa2 class="comment">/*t/spa2="p496t/a>tspa2 class="comment">         *oThe 30-bit decreasingpcounter are read by 2 pieces.t/spa2="p497t/a>tspa2 class="comment">         *oIncorrect value may be read when both bccrh and bccrl are changing.t/spa2="p498t/a>tspa2 class="comment">         *oEx. When 7900 decrease to 78FF, wrongpvalue 7800 might be read.t/spa2="p499t/a>tspa2 class="comment">         */t/spa2="p500t/a>        if (ta href="+code=retry" class="sref">retryt/a> && !(ta href="+code=bccrh" class="sref">bccrht/a> ==pta href="+code=bccrhv" class="sref">bccrhvt/a> && ta href="+code=bccrl" class="sref">bccrlt/a> >=pta href="+code=bccrlv" class="sref">bccrlvt/a>)) {"p501t/a>                ta href="+code=retry" class="sref">retryt/a>--;"p502t/a>                ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"rereadingpcounter\n"t/spa2=);"p503t/a>                goto ta href="+code=retry" class="sref">retryt/a>;"p504t/a>        }"p505t/a>"p506t/a>        returnpta href="+code=counter" class="sref">countert/a>;"p507t/a>}"p508t/a>"p509t/a>tspa2 class="comment">/**t/spa2="p51o2aa>tspa2 class="comment"> *oadjust_pll - Adjust the PLL input clock in Hz.t/spa2="p511t/a>tspa2 class="comment"> *t/spa2="p512t/a>tspa2 class="comment"> * @pdc_controller: controller specific informate=2t/spa2="p513t/a>tspa2 class="comment"> *o@host: target ATA hostt/spa2="p514t/a>tspa2 class="comment"> * @pll_clock:oThe input of PLL in HZt/spa2="p515t/a>tspa2 class="comment"> */t/spa2="p516t/a>static voidpta href="+code=pdc_adjust_pll" class="sref">pdc_adjust_pllt/a>(structpta href="+code=ata_host" class="sref">ata_hostt/a> *ta href="+code=host" class="sref">hostt/a>, longpta href="+code=pll_clock" class="sref">pll_clockt/a>, unsigned intpta href="+code=board_idx" class="sref">board_idxt/a>)"p517t/a>{"p518t/a>        voidpta href="+code=__iomem" class="sref">__iomemt/a> *ta href="+code=mmio_base" class="sref">mmio_baset/a> =pta href="+code=host" class="sref">hostt/a>->ta href="+code=iomap" class="sref">iomapt/a>[ta href="+code=PDC_MMIO_BAR" class="sref">PDC_MMIO_BARt/a>];"p519t/a>        ta href="+code=u16" class="sref">u16t/a> ta href="+code=pll_ctl" class="sref">pll_ctlt/a>;"p520t/a>        longpta href="+code=pll_clock_khz" class="sref">pll_clock_khzt/a> =pta href="+code=pll_clock" class="sref">pll_clockt/a> / 1000;"p521t/a>        longpta href="+code=pout_required" class="sref">pout_requiredt/a> =pta href="+code=board_idx" class="sref">board_idxt/a>? ta href="+code=PDC_133_MHZ" class="sref">PDC_133_MHZt/a>:ta href="+code=PDC_100_MHZ" class="sref">PDC_100_MHZt/a>;"p522t/a>        longpta href="+code=rate=" class="sref">rate=t/a> =pta href="+code=pout_required" class="sref">pout_requiredt/a> /pta href="+code=pll_clock_khz" class="sref">pll_clock_khzt/a>;"p523t/a>        intpta href="+code=F" class="sref">Ft/a>, ta href="+code=R" class="sref">Rt/a>;"p524t/a>"p525t/a>        tspa2 class="comment">/* Sanity check */t/spa2="p526t/a>        if (ta href="+code=unlikely" class="sref">unlikelyt/a>(ta href="+code=pll_clock_khz" class="sref">pll_clock_khzt/a> < 5000L || ta href="+code=pll_clock_khz" class="sref">pll_clock_khzt/a> > 70000L)) {"p527t/a>                ta href="+code=printk" class="sref">printkt/a>(ta href="+code=KERN_ERR" class="sref">KERN_ERRt/a> ta href="+code=DRV_NAME" class="sref">DRV_NAMEt/a> tspa2 class="string">": InvalidpPLL input clock %ldkHz, give up!\n"t/spa2=, ta href="+code=pll_clock_khz" class="sref">pll_clock_khzt/a>);"p528t/a>                return;"p529t/a>        }"p530t/a>"p531t/a>#ifdef ta href="+code=PDC_DEBUG" class="sref">PDC_DEBUGt/a>"p532t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"pout_requiredpis %ld\n"t/spa2=, ta href="+code=pout_required" class="sref">pout_requiredt/a>);"p533t/a>"p534t/a>        tspa2 class="comment">/* Show the current clock value of PLL controlpregistert/spa2="p535t/a>tspa2 class="comment">         * (maybe already configured by the firmware)t/spa2="p536t/a>tspa2 class="comment">         */t/spa2="p537t/a>        ta href="+code=pll_ctl" class="sref">pll_ctlt/a> =pta href="+code=ioread16" class="sref">ioread16t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_PLL_CTL" class="sref">PDC_PLL_CTLt/a>);"p538t/a>"p539t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"pll_ctl[%X]\n"t/spa2=, ta href="+code=pll_ctl" class="sref">pll_ctlt/a>);"p540t/a>#endif"p541t/a>"p542t/a>        tspa2 class="comment">/*t/spa2="p543t/a>tspa2 class="comment">         * Calculate the rate= of F, R and ODt/spa2="p544t/a>tspa2 class="comment">         * POUT =p(F + 2) /p(( R + 2) * NO)t/spa2="p545t/a>tspa2 class="comment">         */t/spa2="p546t/a>        if (ta href="+code=rate=" class="sref">rate=t/a> < 8600L) { tspa2 class="comment">/* 8.6x */t/spa2="p547t/a>                tspa2 class="comment">/* UsingpNO = 0x01, R = 0x0D */t/spa2="p548t/a>                ta href="+code=R" class="sref">Rt/a> = 0x0d;"p549t/a>        } else if (ta href="+code=rate=" class="sref">rate=t/a> < 12900L) { tspa2 class="comment">/* 12.9x */t/spa2="p550t/a>                tspa2 class="comment">/* UsingpNO = 0x01, R = 0x08 */t/spa2="p551t/a>                ta href="+code=R" class="sref">Rt/a> = 0x08;"p552t/a>        } else if (ta href="+code=rate=" class="sref">rate=t/a> < 16100L) { tspa2 class="comment">/* 16.1x */t/spa2="p553t/a>                tspa2 class="comment">/* UsingpNO = 0x01, R = 0x06 */t/spa2="p554t/a>                ta href="+code=R" class="sref">Rt/a> = 0x06;"p555t/a>        } else if (ta href="+code=rate=" class="sref">rate=t/a> < 64000L) { tspa2 class="comment">/* 64x */t/spa2="p556t/a>                ta href="+code=R" class="sref">Rt/a> = 0x00;"p557t/a>        } else {"p558t/a>                tspa2 class="comment">/* Invalidprate= */t/spa2="p559t/a>                ta href="+code=printk" class="sref">printkt/a>(ta href="+code=KERN_ERR" class="sref">KERN_ERRt/a> ta href="+code=DRV_NAME" class="sref">DRV_NAMEt/a> tspa2 class="string">": Invalidprate= %ld, give up!\n"t/spa2=, ta href="+code=rate=" class="sref">rate=t/a>);"p560t/a>                return;"p561t/a>        }"p562t/a>"p563t/a>        ta href="+code=F" class="sref">Ft/a> =p(ta href="+code=rate=" class="sref">rate=t/a> *p(ta href="+code=R" class="sref">Rt/a>+2)) / 1000 - 2;"p564t/a>"p565t/a>        if (ta href="+code=unlikely" class="sref">unlikelyt/a>(ta href="+code=F" class="sref">Ft/a> < 0 || ta href="+code=F" class="sref">Ft/a> > 127)) {"p566t/a>                tspa2 class="comment">/* InvalidpF */t/spa2="p567t/a>                ta href="+code=printk" class="sref">printkt/a>(ta href="+code=KERN_ERR" class="sref">KERN_ERRt/a> ta href="+code=DRV_NAME" class="sref">DRV_NAMEt/a> tspa2 class="string">": F[%d] invalid!\n"t/spa2=, ta href="+code=F" class="sref">Ft/a>);"p568t/a>                return;"p569t/a>        }"p570t/a>"p571t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"F[%d] R[%d] rate=*1000[%ld]\n"t/spa2=, ta href="+code=F" class="sref">Ft/a>, ta href="+code=R" class="sref">Rt/a>, ta href="+code=rate=" class="sref">rate=t/a>);"p572t/a>"p573t/a>        ta href="+code=pll_ctl" class="sref">pll_ctlt/a> =p(ta href="+code=R" class="sref">Rt/a> << 8) | ta href="+code=F" class="sref">Ft/a>;"p574t/a>"p575t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"Writingppll_ctl[%X]\n"t/spa2=, ta href="+code=pll_ctl" class="sref">pll_ctlt/a>);"p576t/a>"p577t/a>        ta href="+code=iowrite16" class="sref">iowrite16t/a>(ta href="+code=pll_ctl" class="sref">pll_ctlt/a>, ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_PLL_CTL" class="sref">PDC_PLL_CTLt/a>);"p578t/a>        ta href="+code=ioread16" class="sref">ioread16t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_PLL_CTL" class="sref">PDC_PLL_CTLt/a>); tspa2 class="comment">/* flush */t/spa2="p579t/a>"p580t/a>        tspa2 class="comment">/* Wait the PLL circuit to be stable */t/spa2="p581t/a>        ta href="+code=mdelay" class="sref">mdelayt/a>(30);"p582t/a>"p583t/a>#ifdef ta href="+code=PDC_DEBUG" class="sref">PDC_DEBUGt/a>"p584t/a>        tspa2 class="comment">/*t/spa2="p585t/a>tspa2 class="comment">         *  Show the current clock value of PLL controlpregistert/spa2="p586t/a>tspa2 class="comment">         *o(maybe configured by the firmware)t/spa2="p587t/a>tspa2 class="comment">         */t/spa2="p588t/a>        ta href="+code=pll_ctl" class="sref">pll_ctlt/a> =pta href="+code=ioread16" class="sref">ioread16t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_PLL_CTL" class="sref">PDC_PLL_CTLt/a>);"p589t/a>"p590t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"pll_ctl[%X]\n"t/spa2=, ta href="+code=pll_ctl" class="sref">pll_ctlt/a>);"p591t/a>#endif"p592t/a>"p593t/a>        return;"p594t/a>}"p595t/a>"p596t/a>tspa2 class="comment">/**t/spa2="p597t/a>tspa2 class="comment"> * detect_pll_input_clock - Detect the PLL input clock in Hz.t/spa2="p598t/a>tspa2 class="comment"> *o@host: target ATA hostt/spa2="p599t/a>tspa2 class="comment"> *oEx. 16949000 on 33MHz PCI bus for pdc20275.t/spa2="p60o2aa>tspa2 class="comment"> *oooooHalf of the PCI clock.t/spa2="p601t/a>tspa2 class="comment"> */t/spa2="p602t/a>static longpta href="+code=pdc_detect_pll_input_clock" class="sref">pdc_detect_pll_input_clockt/a>(structpta href="+code=ata_host" class="sref">ata_hostt/a> *ta href="+code=host" class="sref">hostt/a>)"p603t/a>{"p604t/a>        voidpta href="+code=__iomem" class="sref">__iomemt/a> *ta href="+code=mmio_base" class="sref">mmio_baset/a> =pta href="+code=host" class="sref">hostt/a>->ta href="+code=iomap" class="sref">iomapt/a>[ta href="+code=PDC_MMIO_BAR" class="sref">PDC_MMIO_BARt/a>];"p605t/a>        ta href="+code=u32" class="sref">u32t/a> ta href="+code=scr" class="sref">scrt/a>;"p606t/a>        longpta href="+code=start_count" class="sref">start_countt/a>, ta href="+code=end_count" class="sref">end_countt/a>;"p607t/a>        structpta href="+code=timeval" class="sref">timevalt/a> ta href="+code=start_time" class="sref">start_timet/a>, ta href="+code=end_time" class="sref">end_timet/a>;"p608t/a>        longpta href="+code=pll_clock" class="sref">pll_clockt/a>, ta href="+code=usec_elapsed" class="sref">usec_elapsedt/a>;"p609t/a>"p610t/a>        tspa2 class="comment">/* Start the test mode */t/spa2="p611t/a>        ta href="+code=scr" class="sref">scrt/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_SYS_CTL" class="sref">PDC_SYS_CTLt/a>);"p612t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"scr[%X]\n"t/spa2=, ta href="+code=scr" class="sref">scrt/a>);"p613t/a>        ta href="+code=iowrite32" class="sref">iowrite32t/a>(ta href="+code=scr" class="sref">scrt/a> | (0x01 << 14), ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_SYS_CTL" class="sref">PDC_SYS_CTLt/a>);"p614t/a>        ta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_SYS_CTL" class="sref">PDC_SYS_CTLt/a>); tspa2 class="comment">/* flush */t/spa2="p615t/a>"p616t/a>        tspa2 class="comment">/* Read current counter value */t/spa2="p617t/a>        ta href="+code=start_count" class="sref">start_countt/a> =pta href="+code=pdc_read_counter" class="sref">pdc_read_countert/a>(ta href="+code=host" class="sref">hostt/a>);"p618t/a>        ta href="+code=do_gettimeofday" class="sref">do_gettimeofdayt/a>(&ta href="+code=start_time" class="sref">start_timet/a>);"p619t/a>"p620t/a>        tspa2 class="comment">/* Let the counter run for 100 ms. */t/spa2="p621t/a>        ta href="+code=mdelay" class="sref">mdelayt/a>(100);"p622t/a>"p623t/a>        tspa2 class="comment">/* Read the counter values again */t/spa2="p624t/a>        ta href="+code=end_count" class="sref">end_countt/a> =pta href="+code=pdc_read_counter" class="sref">pdc_read_countert/a>(ta href="+code=host" class="sref">hostt/a>);"p625t/a>        ta href="+code=do_gettimeofday" class="sref">do_gettimeofdayt/a>(&ta href="+code=end_time" class="sref">end_timet/a>);"p626t/a>"p627t/a>        tspa2 class="comment">/* Stop the test mode */t/spa2="p628t/a>        ta href="+code=scr" class="sref">scrt/a> =pta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_SYS_CTL" class="sref">PDC_SYS_CTLt/a>);"p629t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"scr[%X]\n"t/spa2=, ta href="+code=scr" class="sref">scrt/a>);"p630t/a>        ta href="+code=iowrite32" class="sref">iowrite32t/a>(ta href="+code=scr" class="sref">scrt/a> & ~(0x01 << 14), ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_SYS_CTL" class="sref">PDC_SYS_CTLt/a>);"p631t/a>        ta href="+code=ioread32" class="sref">ioread32t/a>(ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=PDC_SYS_CTL" class="sref">PDC_SYS_CTLt/a>); tspa2 class="comment">/* flush */t/spa2="p632t/a>"p633t/a>        tspa2 class="comment">/* calculate the input clock in Hz */t/spa2="p634t/a>        ta href="+code=usec_elapsed" class="sref">usec_elapsedt/a> =p(ta href="+code=end_time" class="sref">end_timet/a>.ta href="+code=tv_sec" class="sref">tv_sect/a> - ta href="+code=start_time" class="sref">start_timet/a>.ta href="+code=tv_sec" class="sref">tv_sect/a>) * 1000000 +"p635t/a>                (ta href="+code=end_time" class="sref">end_timet/a>.ta href="+code=tv_usec" class="sref">tv_usect/a> - ta href="+code=start_time" class="sref">start_timet/a>.ta href="+code=tv_usec" class="sref">tv_usect/a>);"p636t/a>"p637t/a>        ta href="+code=pll_clock" class="sref">pll_clockt/a> =p((ta href="+code=start_count" class="sref">start_countt/a> - ta href="+code=end_count" class="sref">end_countt/a>) & 0x3fffffff) / 100 *"p638t/a>                (100000000 /pta href="+code=usec_elapsed" class="sref">usec_elapsedt/a>);"p639t/a>"p640t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"start[%ld] end[%ld] \n"t/spa2=, ta href="+code=start_count" class="sref">start_countt/a>, ta href="+code=end_count" class="sref">end_countt/a>);"p641t/a>        ta href="+code=PDPRINTK" class="sref">PDPRINTKt/a>(tspa2 class="string">"PLL input clock[%ld]Hz\n"t/spa2=, ta href="+code=pll_clock" class="sref">pll_clockt/a>);"p642t/a>"p643t/a>        return ta href="+code=pll_clock" class="sref">pll_clockt/a>;"p644t/a>}"p645t/a>"p646t/a>tspa2 class="comment">/**t/spa2="p647t/a>tspa2 class="comment"> * pdc_hardware_init - Initialize the hardware.t/spa2="p648t/a>tspa2 class="comment"> *o@host: target ATA hostt/spa2="p649t/a>tspa2 class="comment"> *o@board_idx: board identifiert/spa2="p65o2aa>tspa2 class="comment"> */t/spa2="p651t/a>static intpta href="+code=pdc_hardware_init" class="sref">pdc_hardware_initt/a>(structpta href="+code=ata_host" class="sref">ata_hostt/a> *ta href="+code=host" class="sref">hostt/a>, unsigned intpta href="+code=board_idx" class="sref">board_idxt/a>)"p652t/a>{"p653t/a>        longpta href="+code=pll_clock" class="sref">pll_clockt/a>;"p654t/a>"p655t/a>        tspa2 class="comment">/*t/spa2="p656t/a>tspa2 class="comment">         *oDetect PLL input clock rate.t/spa2="p657t/a>tspa2 class="comment">         *oOn some system, where PCI bus is runningpat non-standard clock rate.t/spa2="p658t/a>tspa2 class="comment">         *oEx. 25MHz or 40MHz, we have to adjust the cycle_time.t/spa2="p659t/a>tspa2 class="comment">         *oThe pdc20275 controller employs PLL circuit to help correct timingpregisters setting.t/spa2="p66o2aa>tspa2 class="comment">         */t/spa2="p661t/a>        ta href="+code=pll_clock" class="sref">pll_clockt/a> =pta href="+code=pdc_detect_pll_input_clock" class="sref">pdc_detect_pll_input_clockt/a>(ta href="+code=host" class="sref">hostt/a>);"p662t/a>"p663t/a>        ta href="+code=dev_info" class="sref">dev_infot/a>(ta href="+code=host" class="sref">hostt/a>->ta href="+code=dev" class="sref">devt/a>, tspa2 class="string">"PLL input clock %ld kHz\n"t/spa2=, ta href="+code=pll_clock" class="sref">pll_clockt/a>/1000);"p664t/a>"p665t/a>        tspa2 class="comment">/* Adjust PLL controlpregister */t/spa2="p666t/a>        ta href="+code=pdc_adjust_pll" class="sref">pdc_adjust_pllt/a>(ta href="+code=host" class="sref">hostt/a>, ta href="+code=pll_clock" class="sref">pll_clockt/a>, ta href="+code=board_idx" class="sref">board_idxt/a>);"p667t/a>"p668t/a>        return 0;"p669t/a>}"p670t/a>"p671t/a>tspa2 class="comment">/**t/spa2="p672t/a>tspa2 class="comment"> * pdc_ata_setup_port - setup the mmio addresst/spa2="p673t/a>tspa2 class="comment"> *o@port:pata ioports to setupt/spa2="p674t/a>tspa2 class="comment"> * @base: base addresst/spa2="p675t/a>tspa2 class="comment"> */t/spa2="p676t/a>static voidpta href="+code=pdc_ata_setup_port" class="sref">pdc_ata_setup_portt/a>(structpta href="+code=ata_ioports" class="sref">ata_ioportst/a> *ta href="+code=port" class="sref">portt/a>, voidpta href="+code=__iomem" class="sref">__iomemt/a> *ta href="+code=base" class="sref">baset/a>)"p677t/a>{"p678t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=cmd_addr" class="sref">cmd_addrt/a>          ="p679t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=data_addr" class="sref">data_addrt/a>         =pta href="+code=base" class="sref">baset/a>;"p680t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=feature_addr" class="sref">feature_addrt/a>      ="p681t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=error_addr" class="sref">error_addrt/a>        =pta href="+code=base" class="sref">baset/a> + 0x05;"p682t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=nsect_addr" class="sref">nsect_addrt/a>        =pta href="+code=base" class="sref">baset/a> + 0x0a;"p683t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=lbal_addr" class="sref">lbal_addrt/a>         =pta href="+code=base" class="sref">baset/a> + 0x0f;"p684t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=lbam_addr" class="sref">lbam_addrt/a>         =pta href="+code=base" class="sref">baset/a> + 0x10;"p685t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=lbah_addr" class="sref">lbah_addrt/a>         =pta href="+code=base" class="sref">baset/a> + 0x15;"p686t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=device_addr" class="sref">device_addrt/a>       =pta href="+code=base" class="sref">baset/a> + 0x1a;"p687t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=command_addr" class="sref">command_addrt/a>      ="p688t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=status_addr" class="sref">status_addrt/a>       =pta href="+code=base" class="sref">baset/a> + 0x1f;"p689t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=altstatus_addr" class="sref">altstatus_addrt/a>    ="p690t/a>        ta href="+code=port" class="sref">portt/a>->ta href="+code=ctl_addr" class="sref">ctl_addrt/a>          =pta href="+code=base" class="sref">baset/a> + 0x81a;"p691t/a>}"p692t/a>"p693t/a>tspa2 class="comment">/**t/spa2="p694t/a>tspa2 class="comment"> * pdc2027x_init_one - PCI probe functiont/spa2="p695t/a>tspa2 class="comment"> * Called when a2 instance of PCI adapter is inserted.t/spa2="p696t/a>tspa2 class="comment"> *oThis function checks whether the hardware is supported,t/spa2="p697t/a>tspa2 class="comment"> * initialize hardware and register a2 instance of ata_host tot/spa2="p698t/a>tspa2 class="comment"> *olibata.  (implements structppci_driver.probe() )t/spa2="p699t/a>tspa2 class="comment"> *t/spa2="p70o2aa>tspa2 class="comment"> *o@pdev: instance of pci_dev foundt/spa2="p701t/a>tspa2 class="comment"> * @ent:  matchingpentry in the id_tbl[]t/spa2="p702t/a>tspa2 class="comment"> */t/spa2="p703t/a>static intpta href="+code=pdc2027x_init_one" class="sref">pdc2027x_init_onet/a>(structpta href="+code=pci_dev" class="sref">pci_devt/a> *ta href="+code=pdev" class="sref">pdevt/a>,"p704t/a>                             const structpta href="+code=pci_device_id" class="sref">pci_device_idt/a> *ta href="+code=ent" class="sref">entt/a>)"p705t/a>{"p706t/a>        static const unsigned longpta href="+code=cmd_offset" class="sref">cmd_offsett/a>[] =p{ 0x17c0, 0x15c0 };"p707t/a>        static const unsigned longpta href="+code=bmdma_offset" class="sref">bmdma_offsett/a>[] =p{ 0x1000, 0x1008 };"p708t/a>        unsigned intpta href="+code=board_idx" class="sref">board_idxt/a> =p(unsigned int) ta href="+code=ent" class="sref">entt/a>->ta href="+code=driver_data" class="sref">driver_datat/a>;"p709t/a>        const structpta href="+code=ata_port_info" class="sref">ata_port_infot/a> *ta href="+code=ppi" class="sref">ppit/a>[] ="p710t/a>                { &ta href="+code=pdc2027x_port_info" class="sref">pdc2027x_port_infot/a>[ta href="+code=board_idx" class="sref">board_idxt/a>], ta href="+code=NULL" class="sref">NULLt/a> };"p711t/a>        structpta href="+code=ata_host" class="sref">ata_hostt/a> *ta href="+code=host" class="sref">hostt/a>;"p712t/a>        voidpta href="+code=__iomem" class="sref">__iomemt/a> *ta href="+code=mmio_base" class="sref">mmio_baset/a>;"p713t/a>        intpta href="+code=i" class="sref">it/a>, ta href="+code=rc" class="sref">rct/a>;"p714t/a>"p715t/a>        ta href="+code=ata_print_version_once" class="sref">ata_print_version_oncet/a>(&ta href="+code=pdev" class="sref">pdevt/a>->ta href="+code=dev" class="sref">devt/a>, ta href="+code=DRV_VERSION" class="sref">DRV_VERSIONt/a>);"p716t/a>"p717t/a>        tspa2 class="comment">/* alloc host */t/spa2="p718t/a>        ta href="+code=host" class="sref">hostt/a> =pta href="+code=ata_host_alloc_pinfo" class="sref">ata_host_alloc_pinfot/a>(&ta href="+code=pdev" class="sref">pdevt/a>->ta href="+code=dev" class="sref">devt/a>, ta href="+code=ppi" class="sref">ppit/a>, 2);"p719t/a>        if (!ta href="+code=host" class="sref">hostt/a>)"p720t/a>                return -ta href="+code=ENOMEM" class="sref">ENOMEMt/a>;"p721t/a>"p722t/a>        tspa2 class="comment">/* acquire resources and fill host */t/spa2="p723t/a>        ta href="+code=rc" class="sref">rct/a> =pta href="+code=pcim_enable_device" class="sref">pcim_enable_devicet/a>(ta href="+code=pdev" class="sref">pdevt/a>);"p724t/a>        if (ta href="+code=rc" class="sref">rct/a>)"p725t/a>                return ta href="+code=rc" class="sref">rct/a>;"p726t/a>"p727t/a>        ta href="+code=rc" class="sref">rct/a> =pta href="+code=pcim_iomap_regions" class="sref">pcim_iomap_regionst/a>(ta href="+code=pdev" class="sref">pdevt/a>, 1 << ta href="+code=PDC_MMIO_BAR" class="sref">PDC_MMIO_BARt/a>, ta href="+code=DRV_NAME" class="sref">DRV_NAMEt/a>);"p728t/a>        if (ta href="+code=rc" class="sref">rct/a>)"p729t/a>                return ta href="+code=rc" class="sref">rct/a>;"p730t/a>        ta href="+code=host" class="sref">hostt/a>->ta href="+code=iomap" class="sref">iomapt/a> =pta href="+code=pcim_iomap_table" class="sref">pcim_iomap_tablet/a>(ta href="+code=pdev" class="sref">pdevt/a>);"p731t/a>"p732t/a>        ta href="+code=rc" class="sref">rct/a> =pta href="+code=pci_set_dma_mask" class="sref">pci_set_dma_maskt/a>(ta href="+code=pdev" class="sref">pdevt/a>, ta href="+code=ATA_DMA_MASK" class="sref">ATA_DMA_MASKt/a>);"p733t/a>        if (ta href="+code=rc" class="sref">rct/a>)"p734t/a>                return ta href="+code=rc" class="sref">rct/a>;"p735t/a>"p736t/a>        ta href="+code=rc" class="sref">rct/a> =pta href="+code=pci_set_consistent_dma_mask" class="sref">pci_set_consistent_dma_maskt/a>(ta href="+code=pdev" class="sref">pdevt/a>, ta href="+code=ATA_DMA_MASK" class="sref">ATA_DMA_MASKt/a>);"p737t/a>        if (ta href="+code=rc" class="sref">rct/a>)"p738t/a>                return ta href="+code=rc" class="sref">rct/a>;"p739t/a>"p740t/a>        ta href="+code=mmio_base" class="sref">mmio_baset/a> =pta href="+code=host" class="sref">hostt/a>->ta href="+code=iomap" class="sref">iomapt/a>[ta href="+code=PDC_MMIO_BAR" class="sref">PDC_MMIO_BARt/a>];"p741t/a>"p742t/a>        for (ta href="+code=i" class="sref">it/a> =p0; ta href="+code=i" class="sref">it/a> < 2; ta href="+code=i" class="sref">it/a>++) {"p743t/a>                structpta href="+code=ata_port" class="sref">ata_portt/a> *ta href="+code=ap" class="sref">apt/a> =pta href="+code=host" class="sref">hostt/a>->ta href="+code=ports" class="sref">portst/a>[ta href="+code=i" class="sref">it/a>];"p744t/a>"p745t/a>                ta href="+code=pdc_ata_setup_port" class="sref">pdc_ata_setup_portt/a>(&ta href="+code=ap" class="sref">apt/a>->ta href="+code=ioaddr" class="sref">ioaddrt/a>, ta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=cmd_offset" class="sref">cmd_offsett/a>[ta href="+code=i" class="sref">it/a>]);"p746t/a>                ta href="+code=ap" class="sref">apt/a>->ta href="+code=ioaddr" class="sref">ioaddrt/a>.ta href="+code=bmdma_addr" class="sref">bmdma_addrt/a> =pta href="+code=mmio_base" class="sref">mmio_baset/a> + ta href="+code=bmdma_offset" class="sref">bmdma_offsett/a>[ta href="+code=i" class="sref">it/a>];"p747t/a>"p748t/a>                ta href="+code=ata_port_pbar_desc" class="sref">ata_port_pbar_desct/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=PDC_MMIO_BAR" class="sref">PDC_MMIO_BARt/a>, -1, tspa2 class="string">"mmio"t/spa2=);"p749t/a>                ta href="+code=ata_port_pbar_desc" class="sref">ata_port_pbar_desct/a>(ta href="+code=ap" class="sref">apt/a>, ta href="+code=PDC_MMIO_BAR" class="sref">PDC_MMIO_BARt/a>, ta href="+code=cmd_offset" class="sref">cmd_offsett/a>[ta href="+code=i" class="sref">it/a>], tspa2 class="string">"cmd"t/spa2=);"p750t/a>        }"p751t/a>"p752t/a>        tspa2 class="comment">//pci_enable_intx(pdev);t/spa2="p753t/a>"p754t/a>        tspa2 class="comment">/* initialize adapter */t/spa2="p755t/a>        if (ta href="+code=pdc_hardware_init" class="sref">pdc_hardware_initt/a>(ta href="+code=host" class="sref">hostt/a>, ta href="+code=board_idx" class="sref">board_idxt/a>) !=p0)"p756t/a>                return -ta href="+code=EIO" class="sref">EIOt/a>;"p757t/a>"p758t/a>        ta href="+code=pci_set_master" class="sref">pci_set_mastert/a>(ta href="+code=pdev" class="sref">pdevt/a>);"p759t/a>        return ta href="+code=ata_host_activate" class="sref">ata_host_activatet/a>(ta href="+code=host" class="sref">hostt/a>, ta href="+code=pdev" class="sref">pdevt/a>->ta href="+code=irq" class="sref">irqt/a>, ta href="+code=ata_bmdma_interrupt" class="sref">ata_bmdma_interruptt/a>,"p760t/a>                                 ta href="+code=IRQF_SHARED" class="sref">IRQF_SHAREDt/a>, &ta href="+code=pdc2027x_sht" class="sref">pdc2027x_shtt/a>);"p761t/a>}"p762t/a>"p763t/a>#ifdef ta href="+code=CONFIG_PM" class="sref">CONFIG_PMt/a>"p764t/a>static intpta href="+code=pdc2027x_reinit_one" class="sref">pdc2027x_reinit_onet/a>(structpta href="+code=pci_dev" class="sref">pci_devt/a> *ta href="+code=pdev" class="sref">pdevt/a>)"p765t/a>{"p766t/a>        structpta href="+code=ata_host" class="sref">ata_hostt/a> *ta href="+code=host" class="sref">hostt/a> =pta href="+code=dev_get_drvdata" class="sref">dev_get_drvdatat/a>(&ta href="+code=pdev" class="sref">pdevt/a>->ta href="+code=dev" class="sref">devt/a>);"p767t/a>        unsigned intpta href="+code=board_idx" class="sref">board_idxt/a>;"p768t/a>        intpta href="+code=rc" class="sref">rct/a>;"p769t/a>"p770t/a>        ta href="+code=rc" class="sref">rct/a> =pta href="+code=ata_pci_device_do_resume" class="sref">ata_pci_device_do_resumet/a>(ta href="+code=pdev" class="sref">pdevt/a>);"p771t/a>        if (ta href="+code=rc" class="sref">rct/a>)"p772t/a>                return ta href="+code=rc" class="sref">rct/a>;"p773t/a>"p774t/a>        if (ta href="+code=pdev" class="sref">pdevt/a>->ta href="+code=device" class="sref">devicet/a> ==pta href="+code=PCI_DEVICE_ID_PROMISE_20268" class="sref">PCI_DEVICE_ID_PROMISE_20268t/a> ||"p775t/a>            ta href="+code=pdev" class="sref">pdevt/a>->ta href="+code=device" class="sref">devicet/a> ==pta href="+code=PCI_DEVICE_ID_PROMISE_20270" class="sref">PCI_DEVICE_ID_PROMISE_20270t/a>)"p776t/a>                ta href="+code=board_idx" class="sref">board_idxt/a> =pta href="+code=PDC_UDMA_100" class="sref">PDC_UDMA_100t/a>;"p777t/a>        else"p778t/a>                ta href="+code=board_idx" class="sref">board_idxt/a> =pta href="+code=PDC_UDMA_133" class="sref">PDC_UDMA_133t/a>;"p779t/a>"p780t/a>        if (ta href="+code=pdc_hardware_init" class="sref">pdc_hardware_initt/a>(ta href="+code=host" class="sref">hostt/a>, ta href="+code=board_idx" class="sref">board_idxt/a>))"p781t/a>                return -ta href="+code=EIO" class="sref">EIOt/a>;"p782t/a>"p783t/a>        ta href="+code=ata_host_resume" class="sref">ata_host_resumet/a>(ta href="+code=host" class="sref">hostt/a>);"p784t/a>        return 0;"p785t/a>}"p786t/a>#endif"p787t/a>"p788t/a>ta href="+code=module_pci_driver" class="sref">module_pci_drivert/a>(ta href="+code=pdc2027x_pci_driver" class="sref">pdc2027x_pci_drivert/a>);"p789t/a>
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