linux/drivers/mfd/sta2x11-mfd.c
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   1/*
   2 * Copyright (c) 2009-2011 Wind River Systems, Inc.
   3 * Copyright (c) 2011 ST Microelectronics (Alessandro Rubini, Davide Ciminaghi)
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License version 2 as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  12 * See the GNU General Public License for more details.
  13 *
  14 * You should have received a copy of the GNU General Public License
  15 * along with this program; if not, write to the Free Software
  16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17 *
  18 */
  19
  20#include <linux/kernel.h>
  21#include <linux/module.h>
  22#include <linux/spinlock.h>
  23#include <linux/errno.h>
  24#include <linux/device.h>
  25#include <linux/slab.h>
  26#include <linux/list.h>
  27#include <linux/io.h>
  28#include <linux/ioport.h>
  29#include <linux/pci.h>
  30#include <linux/seq_file.h>
  31#include <linux/platform_device.h>
  32#include <linux/mfd/core.h>
  33#include <linux/mfd/sta2x11-mfd.h>
  34#include <linux/regmap.h>
  35
  36#include <asm/sta2x11.h>
  37
  38static inline int __reg_within_range(unsigned int r,
  39                                     unsigned int start,
  40                                     unsigned int end)
  41{
  42        return ((r >= start) && (r <= end));
  43}
  44
  45/* This describes STA2X11 MFD chip for us, we may have several */
  46struct sta2x11_mfd {
  47        struct sta2x11_instance *instance;
  48        struct regmap *regmap[sta2x11_n_mfd_plat_devs];
  49        spinlock_t lock[sta2x11_n_mfd_plat_devs];
  50        struct list_head list;
  51        void __iomem *regs[sta2x11_n_mfd_plat_devs];
  52};
  53
  54static LIST_HEAD(sta2x11_mfd_list);
  55
  56/* Three functions to act on the list */
  57static struct sta2x11_mfd *sta2x11_mfd_find(struct pci_dev *pdev)
  58{
  59        struct sta2x11_instance *instance;
  60        struct sta2x11_mfd *mfd;
  61
  62        if (!pdev && !list_empty(&sta2x11_mfd_list)) {
  63                pr_warning("%s: Unspecified device, "
  64                            "using first instance\n", __func__);
  65                return list_entry(sta2x11_mfd_list.next,
  66                                  struct sta2x11_mfd, list);
  67        }
  68
  69        instance = sta2x11_get_instance(pdev);
  70        if (!instance)
  71                return NULL;
  72        list_for_each_entry(mfd, &sta2x11_mfd_list, list) {
  73                if (mfd->instance == instance)
  74                        return mfd;
  75        }
  76        return NULL;
  77}
  78
  79static int sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)
  80{
  81        int i;
  82        struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
  83        struct sta2x11_instance *instance;
  84
  85        if (mfd)
  86                return -EBUSY;
  87        instance = sta2x11_get_instance(pdev);
  88        if (!instance)
  89                return -EINVAL;
  90        mfd = kzalloc(sizeof(*mfd), flags);
  91        if (!mfd)
  92                return -ENOMEM;
  93        INIT_LIST_HEAD(&mfd->list);
  94        for (i = 0; i < ARRAY_SIZE(mfd->lock); i++)
  95                spin_lock_init(&mfd->lock[i]);
  96        mfd->instance = instance;
  97        list_add(&mfd->list, &sta2x11_mfd_list);
  98        return 0;
  99}
 100
 101static int mfd_remove(struct pci_dev *pdev)
 102{
 103        struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
 104
 105        if (!mfd)
 106                return -ENODEV;
 107        list_del(&mfd->list);
 108        kfree(mfd);
 109        return 0;
 110}
 111
 112/* This function is exported and is not expected to fail */
 113u32 __sta2x11_mfd_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val,
 114                       enum sta2x11_mfd_plat_dev index)
 115{
 116        struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
 117        u32 r;
 118        unsigned long flags;
 119        void __iomem *regs;
 120
 121        if (!mfd) {
 122                dev_warn(&pdev->dev, ": can't access sctl regs\n");
 123                return 0;
 124        }
 125
 126        regs = mfd->regs[index];
 127        if (!regs) {
 128                dev_warn(&pdev->dev, ": system ctl not initialized\n");
 129                return 0;
 130        }
 131        spin_lock_irqsave(&mfd->lock[index], flags);
 132        r = readl(regs + reg);
 133        r &= ~mask;
 134        r |= val;
 135        if (mask)
 136                writel(r, regs + reg);
 137        spin_unlock_irqrestore(&mfd->lock[index], flags);
 138        return r;
 139}
 140EXPORT_SYMBOL(__sta2x11_mfd_mask);
 141
 142int sta2x11_mfd_get_regs_data(struct platform_device *dev,
 143                              enum sta2x11_mfd_plat_dev index,
 144                              void __iomem **regs,
 145                              spinlock_t **lock)
 146{
 147        struct pci_dev *pdev = *(struct pci_dev **)(dev->dev.platform_data);
 148        struct sta2x11_mfd *mfd;
 149
 150        if (!pdev)
 151                return -ENODEV;
 152        mfd = sta2x11_mfd_find(pdev);
 153        if (!mfd)
 154                return -ENODEV;
 155        if (index >= sta2x11_n_mfd_plat_devs)
 156                return -ENODEV;
 157        *regs = mfd->regs[index];
 158        *lock = &mfd->lock[index];
 159        pr_debug("%s %d *regs = %p\n", __func__, __LINE__, *regs);
 160        return *regs ? 0 : -ENODEV;
 161}
 162EXPORT_SYMBOL(sta2x11_mfd_get_regs_data);
 163
 164/*
 165 * Special sta2x11-mfd regmap lock/unlock functions
 166 */
 167
 168static void sta2x11_regmap_lock(void *__lock)
 169{
 170        spinlock_t *lock = __lock;
 171        spin_lock(lock);
 172}
 173
 174static void sta2x11_regmap_unlock(void *__lock)
 175{
 176        spinlock_t *lock = __lock;
 177        spin_unlock(lock);
 178}
 179
 180/* OTP (one time programmable registers do not require locking */
 181static void sta2x11_regmap_nolock(void *__lock)
 182{
 183}
 184
 185static const char *sta2x11_mfd_names[sta2x11_n_mfd_plat_devs] = {
 186        [sta2x11_sctl] = STA2X11_MFD_SCTL_NAME,
 187        [sta2x11_apbreg] = STA2X11_MFD_APBREG_NAME,
 188        [sta2x11_apb_soc_regs] = STA2X11_MFD_APB_SOC_REGS_NAME,
 189        [sta2x11_scr] = STA2X11_MFD_SCR_NAME,
 190};
 191
 192static bool sta2x11_sctl_writeable_reg(struct device *dev, unsigned int reg)
 193{
 194        return !__reg_within_range(reg, SCTL_SCPCIECSBRST, SCTL_SCRSTSTA);
 195}
 196
 197static struct regmap_config sta2x11_sctl_regmap_config = {
 198        .reg_bits = 32,
 199        .reg_stride = 4,
 200        .val_bits = 32,
 201        .lock = sta2x11_regmap_lock,
 202        .unlock = sta2x11_regmap_unlock,
 203        .max_register = SCTL_SCRSTSTA,
 204        .writeable_reg = sta2x11_sctl_writeable_reg,
 205};
 206
 207static bool sta2x11_scr_readable_reg(struct device *dev, unsigned int reg)
 208{
 209        return (reg == STA2X11_SECR_CR) ||
 210                __reg_within_range(reg, STA2X11_SECR_FVR0, STA2X11_SECR_FVR1);
 211}
 212
 213static bool sta2x11_scr_writeable_reg(struct device *dev, unsigned int reg)
 214{
 215        return false;
 216}
 217
 218static struct regmap_config sta2x11_scr_regmap_config = {
 219        .reg_bits = 32,
 220        .reg_stride = 4,
 221        .val_bits = 32,
 222        .lock = sta2x11_regmap_nolock,
 223        .unlock = sta2x11_regmap_nolock,
 224        .max_register = STA2X11_SECR_FVR1,
 225        .readable_reg = sta2x11_scr_readable_reg,
 226        .writeable_reg = sta2x11_scr_writeable_reg,
 227};
 228
 229static bool sta2x11_apbreg_readable_reg(struct device *dev, unsigned int reg)
 230{
 231        /* Two blocks (CAN and MLB, SARAC) 0x100 bytes apart */
 232        if (reg >= APBREG_BSR_SARAC)
 233                reg -= APBREG_BSR_SARAC;
 234        switch (reg) {
 235        case APBREG_BSR:
 236        case APBREG_PAER:
 237        case APBREG_PWAC:
 238        case APBREG_PRAC:
 239        case APBREG_PCG:
 240        case APBREG_PUR:
 241        case APBREG_EMU_PCG:
 242                return true;
 243        default:
 244                return false;
 245        }
 246}
 247
 248static bool sta2x11_apbreg_writeable_reg(struct device *dev, unsigned int reg)
 249{
 250        if (reg >= APBREG_BSR_SARAC)
 251                reg -= APBREG_BSR_SARAC;
 252        if (!sta2x11_apbreg_readable_reg(dev, reg))
 253                return false;
 254        return reg != APBREG_PAER;
 255}
 256
 257static struct regmap_config sta2x11_apbreg_regmap_config = {
 258        .reg_bits = 32,
 259        .reg_stride = 4,
 260        .val_bits = 32,
 261        .lock = sta2x11_regmap_lock,
 262        .unlock = sta2x11_regmap_unlock,
 263        .max_register = APBREG_EMU_PCG_SARAC,
 264        .readable_reg = sta2x11_apbreg_readable_reg,
 265        .writeable_reg = sta2x11_apbreg_writeable_reg,
 266};
 267
 268static bool sta2x11_apb_soc_regs_readable_reg(struct device *dev,
 269                                              unsigned int reg)
 270{
 271        return reg <= PCIE_SoC_INT_ROUTER_STATUS3_REG ||
 272                __reg_within_range(reg, DMA_IP_CTRL_REG, SPARE3_RESERVED) ||
 273                __reg_within_range(reg, MASTER_LOCK_REG,
 274                                   SYSTEM_CONFIG_STATUS_REG) ||
 275                reg == MSP_CLK_CTRL_REG ||
 276                __reg_within_range(reg, COMPENSATION_REG1, TEST_CTL_REG);
 277}
 278
 279static bool sta2x11_apb_soc_regs_writeable_reg(struct device *dev,
 280                                               unsigned int reg)
 281{
 282        if (!sta2x11_apb_soc_regs_readable_reg(dev, reg))
 283                return false;
 284        switch (reg) {
 285        case PCIE_COMMON_CLOCK_CONFIG_0_4_0:
 286        case SYSTEM_CONFIG_STATUS_REG:
 287        case COMPENSATION_REG1:
 288        case PCIE_SoC_INT_ROUTER_STATUS0_REG...PCIE_SoC_INT_ROUTER_STATUS3_REG:
 289        case PCIE_PM_STATUS_0_PORT_0_4...PCIE_PM_STATUS_7_0_EP4:
 290                return false;
 291        default:
 292                return true;
 293        }
 294}
 295
 296static struct regmap_config sta2x11_apb_soc_regs_regmap_config = {
 297        .reg_bits = 32,
 298        .reg_stride = 4,
 299        .val_bits = 32,
 300        .lock = sta2x11_regmap_lock,
 301        .unlock = sta2x11_regmap_unlock,
 302        .max_register = TEST_CTL_REG,
 303        .readable_reg = sta2x11_apb_soc_regs_readable_reg,
 304        .writeable_reg = sta2x11_apb_soc_regs_writeable_reg,
 305};
 306
 307static struct regmap_config *
 308sta2x11_mfd_regmap_configs[sta2x11_n_mfd_plat_devs] = {
 309        [sta2x11_sctl] = &sta2x11_sctl_regmap_config,
 310        [sta2x11_apbreg] = &sta2x11_apbreg_regmap_config,
 311        [sta2x11_apb_soc_regs] = &sta2x11_apb_soc_regs_regmap_config,
 312        [sta2x11_scr] = &sta2x11_scr_regmap_config,
 313};
 314
 315/* Probe for the four platform devices */
 316
 317static int sta2x11_mfd_platform_probe(struct platform_device *dev,
 318                                      enum sta2x11_mfd_plat_dev index)
 319{
 320        struct pci_dev **pdev;
 321        struct sta2x11_mfd *mfd;
 322        struct resource *res;
 323        const char *name = sta2x11_mfd_names[index];
 324        struct regmap_config *regmap_config = sta2x11_mfd_regmap_configs[index];
 325
 326        pdev = dev->dev.platform_data;
 327        mfd = sta2x11_mfd_find(*pdev);
 328        if (!mfd)
 329                return -ENODEV;
 330        if (!regmap_config)
 331                return -ENODEV;
 332
 333        res = platform_get_resource(dev, IORESOURCE_MEM, 0);
 334        if (!res)
 335                return -ENOMEM;
 336
 337        if (!request_mem_region(res->start, resource_size(res), name))
 338                return -EBUSY;
 339
 340        mfd->regs[index] = ioremap(res->start, resource_size(res));
 341        if (!mfd->regs[index]) {
 342                release_mem_region(res->start, resource_size(res));
 343                return -ENOMEM;
 344        }
 345        regmap_config->lock_arg = &mfd->lock;
 346        /*
 347           No caching, registers could be reached both via regmap and via
 348           void __iomem *
 349        */
 350        regmap_config->cache_type = REGCACHE_NONE;
 351        mfd->regmap[index] = devm_regmap_init_mmio(&dev->dev, mfd->regs[index],
 352                                                   regmap_config);
 353        WARN_ON(!mfd->regmap[index]);
 354
 355        return 0;
 356}
 357
 358static int sta2x11_sctl_probe(struct platform_device *dev)
 359{
 360        return sta2x11_mfd_platform_probe(dev, sta2x11_sctl);
 361}
 362
 363static int sta2x11_apbreg_probe(struct platform_device *dev)
 364{
 365        return sta2x11_mfd_platform_probe(dev, sta2x11_apbreg);
 366}
 367
 368static int sta2x11_apb_soc_regs_probe(struct platform_device *dev)
 369{
 370        return sta2x11_mfd_platform_probe(dev, sta2x11_apb_soc_regs);
 371}
 372
 373static int sta2x11_scr_probe(struct platform_device *dev)
 374{
 375        return sta2x11_mfd_platform_probe(dev, sta2x11_scr);
 376}
 377
 378/* The three platform drivers */
 379static struct platform_driver sta2x11_sctl_platform_driver = {
 380        .driver = {
 381                .name   = STA2X11_MFD_SCTL_NAME,
 382                .owner  = THIS_MODULE,
 383        },
 384        .probe          = sta2x11_sctl_probe,
 385};
 386
 387static int __init sta2x11_sctl_init(void)
 388{
 389        pr_info("%s\n", __func__);
 390        return platform_driver_register(&sta2x11_sctl_platform_driver);
 391}
 392
 393static struct platform_driver sta2x11_platform_driver = {
 394        .driver = {
 395                .name   = STA2X11_MFD_APBREG_NAME,
 396                .owner  = THIS_MODULE,
 397        },
 398        .probe          = sta2x11_apbreg_probe,
 399};
 400
 401static int __init sta2x11_apbreg_init(void)
 402{
 403        pr_info("%s\n", __func__);
 404        return platform_driver_register(&sta2x11_platform_driver);
 405}
 406
 407static struct platform_driver sta2x11_apb_soc_regs_platform_driver = {
 408        .driver = {
 409                .name   = STA2X11_MFD_APB_SOC_REGS_NAME,
 410                .owner  = THIS_MODULE,
 411        },
 412        .probe          = sta2x11_apb_soc_regs_probe,
 413};
 414
 415static int __init sta2x11_apb_soc_regs_init(void)
 416{
 417        pr_info("%s\n", __func__);
 418        return platform_driver_register(&sta2x11_apb_soc_regs_platform_driver);
 419}
 420
 421static struct platform_driver sta2x11_scr_platform_driver = {
 422        .driver = {
 423                .name = STA2X11_MFD_SCR_NAME,
 424                .owner = THIS_MODULE,
 425        },
 426        .probe = sta2x11_scr_probe,
 427};
 428
 429static int __init sta2x11_scr_init(void)
 430{
 431        pr_info("%s\n", __func__);
 432        return platform_driver_register(&sta2x11_scr_platform_driver);
 433}
 434
 435
 436/*
 437 * What follows are the PCI devices that host the above pdevs.
 438 * Each logic block is 4kB and they are all consecutive: we use this info.
 439 */
 440
 441/* Mfd 0 device */
 442
 443/* Mfd 0, Bar 0 */
 444enum mfd0_bar0_cells {
 445        STA2X11_GPIO_0 = 0,
 446        STA2X11_GPIO_1,
 447        STA2X11_GPIO_2,
 448        STA2X11_GPIO_3,
 449        STA2X11_SCTL,
 450        STA2X11_SCR,
 451        STA2X11_TIME,
 452};
 453/* Mfd 0 , Bar 1 */
 454enum mfd0_bar1_cells {
 455        STA2X11_APBREG = 0,
 456};
 457#define CELL_4K(_name, _cell) { \
 458                .name = _name, \
 459                .start = _cell * 4096, .end = _cell * 4096 + 4095, \
 460                .flags = IORESOURCE_MEM, \
 461                }
 462
 463static const struct resource gpio_resources[] = {
 464        {
 465                /* 4 consecutive cells, 1 driver */
 466                .name = STA2X11_MFD_GPIO_NAME,
 467                .start = 0,
 468                .end = (4 * 4096) - 1,
 469                .flags = IORESOURCE_MEM,
 470        }
 471};
 472static const struct resource sctl_resources[] = {
 473        CELL_4K(STA2X11_MFD_SCTL_NAME, STA2X11_SCTL),
 474};
 475static const struct resource scr_resources[] = {
 476        CELL_4K(STA2X11_MFD_SCR_NAME, STA2X11_SCR),
 477};
 478static const struct resource time_resources[] = {
 479        CELL_4K(STA2X11_MFD_TIME_NAME, STA2X11_TIME),
 480};
 481
 482static const struct resource apbreg_resources[] = {
 483        CELL_4K(STA2X11_MFD_APBREG_NAME, STA2X11_APBREG),
 484};
 485
 486#define DEV(_name, _r) \
 487        { .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, }
 488
 489static struct mfd_cell sta2x11_mfd0_bar0[] = {
 490        /* offset 0: we add pdata later */
 491        DEV(STA2X11_MFD_GPIO_NAME, gpio_resources),
 492        DEV(STA2X11_MFD_SCTL_NAME, sctl_resources),
 493        DEV(STA2X11_MFD_SCR_NAME,  scr_resources),
 494        DEV(STA2X11_MFD_TIME_NAME, time_resources),
 495};
 496
 497static struct mfd_cell sta2x11_mfd0_bar1[] = {
 498        DEV(STA2X11_MFD_APBREG_NAME, apbreg_resources),
 499};
 500
 501/* Mfd 1 devices */
 502
 503/* Mfd 1, Bar 0 */
 504enum mfd1_bar0_cells {
 505        STA2X11_VIC = 0,
 506};
 507
 508/* Mfd 1, Bar 1 */
 509enum mfd1_bar1_cells {
 510        STA2X11_APB_SOC_REGS = 0,
 511};
 512
 513static const struct resource vic_resources[] = {
 514        CELL_4K(STA2X11_MFD_VIC_NAME, STA2X11_VIC),
 515};
 516
 517static const struct resource apb_soc_regs_resources[] = {
 518        CELL_4K(STA2X11_MFD_APB_SOC_REGS_NAME, STA2X11_APB_SOC_REGS),
 519};
 520
 521static struct mfd_cell sta2x11_mfd1_bar0[] = {
 522        DEV(STA2X11_MFD_VIC_NAME, vic_resources),
 523};
 524
 525static struct mfd_cell sta2x11_mfd1_bar1[] = {
 526        DEV(STA2X11_MFD_APB_SOC_REGS_NAME, apb_soc_regs_resources),
 527};
 528
 529
 530static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state)
 531{
 532        pci_save_state(pdev);
 533        pci_disable_device(pdev);
 534        pci_set_power_state(pdev, pci_choose_state(pdev, state));
 535
 536        return 0;
 537}
 538
 539static int sta2x11_mfd_resume(struct pci_dev *pdev)
 540{
 541        int err;
 542
 543        pci_set_power_state(pdev, 0);
 544        err = pci_enable_device(pdev);
 545        if (err)
 546                return err;
 547        pci_restore_state(pdev);
 548
 549        return 0;
 550}
 551
 552struct sta2x11_mfd_bar_setup_data {
 553        struct mfd_cell *cells;
 554        int ncells;
 555};
 556
 557struct sta2x11_mfd_setup_data {
 558        struct sta2x11_mfd_bar_setup_data bars[2];
 559};
 560
 561#define STA2X11_MFD0 0
 562#define STA2X11_MFD1 1
 563
 564static struct sta2x11_mfd_setup_data mfd_setup_data[] = {
 565        /* Mfd 0: gpio, sctl, scr, timers / apbregs */
 566        [STA2X11_MFD0] = {
 567                .bars = {
 568                        [0] = {
 569                                .cells = sta2x11_mfd0_bar0,
 570                                .ncells = ARRAY_SIZE(sta2x11_mfd0_bar0),
 571                        },
 572                        [1] = {
 573                                .cells = sta2x11_mfd0_bar1,
 574                                .ncells = ARRAY_SIZE(sta2x11_mfd0_bar1),
 575                        },
 576                },
 577        },
 578        /* Mfd 1: vic / apb-soc-regs */
 579        [STA2X11_MFD1] = {
 580                .bars = {
 581                        [0] = {
 582                                .cells = sta2x11_mfd1_bar0,
 583                                .ncells = ARRAY_SIZE(sta2x11_mfd1_bar0),
 584                        },
 585                        [1] = {
 586                                .cells = sta2x11_mfd1_bar1,
 587                                .ncells = ARRAY_SIZE(sta2x11_mfd1_bar1),
 588                        },
 589                },
 590        },
 591};
 592
 593static void sta2x11_mfd_setup(struct pci_dev *pdev,
 594                              struct sta2x11_mfd_setup_data *sd)
 595{
 596        int i, j;
 597        for (i = 0; i < ARRAY_SIZE(sd->bars); i++)
 598                for (j = 0; j < sd->bars[i].ncells; j++) {
 599                        sd->bars[i].cells[j].pdata_size = sizeof(pdev);
 600                        sd->bars[i].cells[j].platform_data = &pdev;
 601                }
 602}
 603
 604static int sta2x11_mfd_probe(struct pci_dev *pdev,
 605                             const struct pci_device_id *pci_id)
 606{
 607        int err, i;
 608        struct sta2x11_mfd_setup_data *setup_data;
 609
 610        dev_info(&pdev->dev, "%s\n", __func__);
 611
 612        err = pci_enable_device(pdev);
 613        if (err) {
 614                dev_err(&pdev->dev, "Can't enable device.\n");
 615                return err;
 616        }
 617
 618        err = pci_enable_msi(pdev);
 619        if (err)
 620                dev_info(&pdev->dev, "Enable msi failed\n");
 621
 622        setup_data = pci_id->device == PCI_DEVICE_ID_STMICRO_GPIO ?
 623                &mfd_setup_data[STA2X11_MFD0] :
 624                &mfd_setup_data[STA2X11_MFD1];
 625
 626        /* platform data is the pci device for all of them */
 627        sta2x11_mfd_setup(pdev, setup_data);
 628
 629        /* Record this pdev before mfd_add_devices: their probe looks for it */
 630        if (!sta2x11_mfd_find(pdev))
 631                sta2x11_mfd_add(pdev, GFP_ATOMIC);
 632
 633        /* Just 2 bars for all mfd's at present */
 634        for (i = 0; i < 2; i++) {
 635                err = mfd_add_devices(&pdev->dev, -1,
 636                                      setup_data->bars[i].cells,
 637                                      setup_data->bars[i].ncells,
 638                                      &pdev->resource[i],
 639                                      0, NULL);
 640                if (err) {
 641                        dev_err(&pdev->dev,
 642                                "mfd_add_devices[%d] failed: %d\n", i, err);
 643                        goto err_disable;
 644                }
 645        }
 646
 647        return 0;
 648
 649err_disable:
 650        mfd_remove_devices(&pdev->dev);
 651        pci_disable_device(pdev);
 652        pci_disable_msi(pdev);
 653        return err;
 654}
 655
 656static DEFINE_PCI_DEVICE_TABLE(sta2x11_mfd_tbl) = {
 657        {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)},
 658        {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIC)},
 659        {0,},
 660};
 661
 662static struct pci_driver sta2x11_mfd_driver = {
 663        .name =         "sta2x11-mfd",
 664        .id_table =     sta2x11_mfd_tbl,
 665        .probe =        sta2x11_mfd_probe,
 666        .suspend =      sta2x11_mfd_suspend,
 667        .resume =       sta2x11_mfd_resume,
 668};
 669
 670static int __init sta2x11_mfd_init(void)
 671{
 672        pr_info("%s\n", __func__);
 673        return pci_register_driver(&sta2x11_mfd_driver);
 674}
 675
 676/*
 677 * All of this must be ready before "normal" devices like MMCI appear.
 678 * But MFD (the pci device) can't be too early. The following choice
 679 * prepares platform drivers very early and probe the PCI device later,
 680 * but before other PCI devices.
 681 */
 682subsys_initcall(sta2x11_apbreg_init);
 683subsys_initcall(sta2x11_sctl_init);
 684subsys_initcall(sta2x11_apb_soc_regs_init);
 685subsys_initcall(sta2x11_scr_init);
 686rootfs_initcall(sta2x11_mfd_init);
 687
 688MODULE_LICENSE("GPL v2");
 689MODULE_AUTHOR("Wind River");
 690MODULE_DESCRIPTION("STA2x11 mfd for GPIO, SCTL and APBREG");
 691MODULE_DEVICE_TABLE(pci, sta2x11_mfd_tbl);
 692
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