linux/drivers/crypto/picoxcell_crypto.c
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   1/*
   2 * Copyright (c) 2010-2011 Picochip Ltd., Jamie Iles
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 *
  14 * You should have received a copy of the GNU General Public License
  15 * along with this program; if not, write to the Free Software
  16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  17 */
  18#include <crypto/aead.h>
  19#include <crypto/aes.h>
  20#include <crypto/algapi.h>
  21#include <crypto/authenc.h>
  22#include <crypto/des.h>
  23#include <crypto/md5.h>
  24#include <crypto/sha.h>
  25#include <crypto/internal/skcipher.h>
  26#include <linux/clk.h>
  27#include <linux/crypto.h>
  28#include <linux/delay.h>
  29#include <linux/dma-mapping.h>
  30#include <linux/dmapool.h>
  31#include <linux/err.h>
  32#include <linux/init.h>
  33#include <linux/interrupt.h>
  34#include <linux/io.h>
  35#include <linux/list.h>
  36#include <linux/module.h>
  37#include <linux/of.h>
  38#include <linux/platform_device.h>
  39#include <linux/pm.h>
  40#include <linux/rtnetlink.h>
  41#include <linux/scatterlist.h>
  42#include <linux/sched.h>
  43#include <linux/slab.h>
  44#include <linux/timer.h>
  45
  46#include "picoxcell_crypto_regs.h"
  47
  48/*
  49 * The threshold for the number of entries in the CMD FIFO available before
  50 * the CMD0_CNT interrupt is raised. Increasing this value will reduce the
  51 * number of interrupts raised to the CPU.
  52 */
  53#define CMD0_IRQ_THRESHOLD   1
  54
  55/*
  56 * The timeout period (in jiffies) for a PDU. When the the number of PDUs in
  57 * flight is greater than the STAT_IRQ_THRESHOLD or 0 the timer is disabled.
  58 * When there are packets in flight but lower than the threshold, we enable
  59 * the timer and at expiry, attempt to remove any processed packets from the
  60 * queue and if there are still packets left, schedule the timer again.
  61 */
  62#define PACKET_TIMEOUT      1
  63
  64/* The priority to register each algorithm with. */
  65#define SPACC_CRYPTO_ALG_PRIORITY       10000
  66
  67#define SPACC_CRYPTO_KASUMI_F8_KEY_LEN  16
  68#define SPACC_CRYPTO_IPSEC_CIPHER_PG_SZ 64
  69#define SPACC_CRYPTO_IPSEC_HASH_PG_SZ   64
  70#define SPACC_CRYPTO_IPSEC_MAX_CTXS     32
  71#define SPACC_CRYPTO_IPSEC_FIFO_SZ      32
  72#define SPACC_CRYPTO_L2_CIPHER_PG_SZ    64
  73#define SPACC_CRYPTO_L2_HASH_PG_SZ      64
  74#define SPACC_CRYPTO_L2_MAX_CTXS        128
  75#define SPACC_CRYPTO_L2_FIFO_SZ         128
  76
  77#define MAX_DDT_LEN                     16
  78
  79/* DDT format. This must match the hardware DDT format exactly. */
  80struct spacc_ddt {
  81        dma_addr_t      p;
  82        u32             len;
  83};
  84
  85/*
  86 * Asynchronous crypto request structure.
  87 *
  88 * This structure defines a request that is either queued for processing or
  89 * being processed.
  90 */
  91struct spacc_req {
  92        struct list_head                list;
  93        struct spacc_engine             *engine;
  94        struct crypto_async_request     *req;
  95        int                             result;
  96        bool                            is_encrypt;
  97        unsigned                        ctx_id;
  98        dma_addr_t                      src_addr, dst_addr;
  99        struct spacc_ddt                *src_ddt, *dst_ddt;
 100        void                            (*complete)(struct spacc_req *req);
 101
 102        /* AEAD specific bits. */
 103        u8                              *giv;
 104        size_t                          giv_len;
 105        dma_addr_t                      giv_pa;
 106};
 107
 108struct spacc_engine {
 109        void __iomem                    *regs;
 110        struct list_head                pending;
 111        int                             next_ctx;
 112        spinlock_t                      hw_lock;
 113        int                             in_flight;
 114        struct list_head                completed;
 115        struct list_head                in_progress;
 116        struct tasklet_struct           complete;
 117        unsigned long                   fifo_sz;
 118        void __iomem                    *cipher_ctx_base;
 119        void __iomem                    *hash_key_base;
 120        struct spacc_alg                *algs;
 121        unsigned                        num_algs;
 122        struct list_head                registered_algs;
 123        size_t                          cipher_pg_sz;
 124        size_t                          hash_pg_sz;
 125        const char                      *name;
 126        struct clk                      *clk;
 127        struct device                   *dev;
 128        unsigned                        max_ctxs;
 129        struct timer_list               packet_timeout;
 130        unsigned                        stat_irq_thresh;
 131        struct dma_pool                 *req_pool;
 132};
 133
 134/* Algorithm type mask. */
 135#define SPACC_CRYPTO_ALG_MASK           0x7
 136
 137/* SPACC definition of a crypto algorithm. */
 138struct spacc_alg {
 139        unsigned long                   ctrl_default;
 140        unsigned long                   type;
 141        struct crypto_alg               alg;
 142        struct spacc_engine             *engine;
 143        struct list_head                entry;
 144        int                             key_offs;
 145        int                             iv_offs;
 146};
 147
 148/* Generic context structure for any algorithm type. */
 149struct spacc_generic_ctx {
 150        struct spacc_engine             *engine;
 151        int                             flags;
 152        int                             key_offs;
 153        int                             iv_offs;
 154};
 155
 156/* Block cipher context. */
 157struct spacc_ablk_ctx {
 158        struct spacc_generic_ctx        generic;
 159        u8                              key[AES_MAX_KEY_SIZE];
 160        u8                              key_len;
 161        /*
 162         * The fallback cipher. If the operation can't be done in hardware,
 163         * fallback to a software version.
 164         */
 165        struct crypto_ablkcipher        *sw_cipher;
 166};
 167
 168/* AEAD cipher context. */
 169struct spacc_aead_ctx {
 170        struct spacc_generic_ctx        generic;
 171        u8                              cipher_key[AES_MAX_KEY_SIZE];
 172        u8                              hash_ctx[SPACC_CRYPTO_IPSEC_HASH_PG_SZ];
 173        u8                              cipher_key_len;
 174        u8                              hash_key_len;
 175        struct crypto_aead              *sw_cipher;
 176        size_t                          auth_size;
 177        u8                              salt[AES_BLOCK_SIZE];
 178};
 179
 180static int spacc_ablk_submit(struct spacc_req *req);
 181
 182static inline struct spacc_alg *to_spacc_alg(struct crypto_alg *alg)
 183{
 184        return alg ? container_of(alg, struct spacc_alg, alg) : NULL;
 185}
 186
 187static inline int spacc_fifo_cmd_full(struct spacc_engine *engine)
 188{
 189        u32 fifo_stat = readl(engine->regs + SPA_FIFO_STAT_REG_OFFSET);
 190
 191        return fifo_stat & SPA_FIFO_CMD_FULL;
 192}
 193
 194/*
 195 * Given a cipher context, and a context number, get the base address of the
 196 * context page.
 197 *
 198 * Returns the address of the context page where the key/context may
 199 * be written.
 200 */
 201static inline void __iomem *spacc_ctx_page_addr(struct spacc_generic_ctx *ctx,
 202                                                unsigned indx,
 203                                                bool is_cipher_ctx)
 204{
 205        return is_cipher_ctx ? ctx->engine->cipher_ctx_base +
 206                        (indx * ctx->engine->cipher_pg_sz) :
 207                ctx->engine->hash_key_base + (indx * ctx->engine->hash_pg_sz);
 208}
 209
 210/* The context pages can only be written with 32-bit accesses. */
 211static inline void memcpy_toio32(u32 __iomem *dst, const void *src,
 212                                 unsigned count)
 213{
 214        const u32 *src32 = (const u32 *) src;
 215
 216        while (count--)
 217                writel(*src32++, dst++);
 218}
 219
 220static void spacc_cipher_write_ctx(struct spacc_generic_ctx *ctx,
 221                                   void __iomem *page_addr, const u8 *key,
 222                                   size_t key_len, const u8 *iv, size_t iv_len)
 223{
 224        void __iomem *key_ptr = page_addr + ctx->key_offs;
 225        void __iomem *iv_ptr = page_addr + ctx->iv_offs;
 226
 227        memcpy_toio32(key_ptr, key, key_len / 4);
 228        memcpy_toio32(iv_ptr, iv, iv_len / 4);
 229}
 230
 231/*
 232 * Load a context into the engines context memory.
 233 *
 234 * Returns the index of the context page where the context was loaded.
 235 */
 236static unsigned spacc_load_ctx(struct spacc_generic_ctx *ctx,
 237                               const u8 *ciph_key, size_t ciph_len,
 238                               const u8 *iv, size_t ivlen, const u8 *hash_key,
 239                               size_t hash_len)
 240{
 241        unsigned indx = ctx->engine->next_ctx++;
 242        void __iomem *ciph_page_addr, *hash_page_addr;
 243
 244        ciph_page_addr = spacc_ctx_page_addr(ctx, indx, 1);
 245        hash_page_addr = spacc_ctx_page_addr(ctx, indx, 0);
 246
 247        ctx->engine->next_ctx &= ctx->engine->fifo_sz - 1;
 248        spacc_cipher_write_ctx(ctx, ciph_page_addr, ciph_key, ciph_len, iv,
 249                               ivlen);
 250        writel(ciph_len | (indx << SPA_KEY_SZ_CTX_INDEX_OFFSET) |
 251               (1 << SPA_KEY_SZ_CIPHER_OFFSET),
 252               ctx->engine->regs + SPA_KEY_SZ_REG_OFFSET);
 253
 254        if (hash_key) {
 255                memcpy_toio32(hash_page_addr, hash_key, hash_len / 4);
 256                writel(hash_len | (indx << SPA_KEY_SZ_CTX_INDEX_OFFSET),
 257                       ctx->engine->regs + SPA_KEY_SZ_REG_OFFSET);
 258        }
 259
 260        return indx;
 261}
 262
 263/* Count the number of scatterlist entries in a scatterlist. */
 264static int sg_count(struct scatterlist *sg_list, int nbytes)
 265{
 266        struct scatterlist *sg = sg_list;
 267        int sg_nents = 0;
 268
 269        while (nbytes > 0) {
 270                ++sg_nents;
 271                nbytes -= sg->length;
 272                sg = sg_next(sg);
 273        }
 274
 275        return sg_nents;
 276}
 277
 278static inline void ddt_set(struct spacc_ddt *ddt, dma_addr_t phys, size_t len)
 279{
 280        ddt->p = phys;
 281        ddt->len = len;
 282}
 283
 284/*
 285 * Take a crypto request and scatterlists for the data and turn them into DDTs
 286 * for passing to the crypto engines. This also DMA maps the data so that the
 287 * crypto engines can DMA to/from them.
 288 */
 289static struct spacc_ddt *spacc_sg_to_ddt(struct spacc_engine *engine,
 290                                         struct scatterlist *payload,
 291                                         unsigned nbytes,
 292                                         enum dma_data_direction dir,
 293                                         dma_addr_t *ddt_phys)
 294{
 295        unsigned nents, mapped_ents;
 296        struct scatterlist *cur;
 297        struct spacc_ddt *ddt;
 298        int i;
 299
 300        nents = sg_count(payload, nbytes);
 301        mapped_ents = dma_map_sg(engine->dev, payload, nents, dir);
 302
 303        if (mapped_ents + 1 > MAX_DDT_LEN)
 304                goto out;
 305
 306        ddt = dma_pool_alloc(engine->req_pool, GFP_ATOMIC, ddt_phys);
 307        if (!ddt)
 308                goto out;
 309
 310        for_each_sg(payload, cur, mapped_ents, i)
 311                ddt_set(&ddt[i], sg_dma_address(cur), sg_dma_len(cur));
 312        ddt_set(&ddt[mapped_ents], 0, 0);
 313
 314        return ddt;
 315
 316out:
 317        dma_unmap_sg(engine->dev, payload, nents, dir);
 318        return NULL;
 319}
 320
 321static int spacc_aead_make_ddts(struct spacc_req *req, u8 *giv)
 322{
 323        struct aead_request *areq = container_of(req->req, struct aead_request,
 324                                                 base);
 325        struct spacc_engine *engine = req->engine;
 326        struct spacc_ddt *src_ddt, *dst_ddt;
 327        unsigned ivsize = crypto_aead_ivsize(crypto_aead_reqtfm(areq));
 328        unsigned nents = sg_count(areq->src, areq->cryptlen);
 329        dma_addr_t iv_addr;
 330        struct scatterlist *cur;
 331        int i, dst_ents, src_ents, assoc_ents;
 332        u8 *iv = giv ? giv : areq->iv;
 333
 334        src_ddt = dma_pool_alloc(engine->req_pool, GFP_ATOMIC, &req->src_addr);
 335        if (!src_ddt)
 336                return -ENOMEM;
 337
 338        dst_ddt = dma_pool_alloc(engine->req_pool, GFP_ATOMIC, &req->dst_addr);
 339        if (!dst_ddt) {
 340                dma_pool_free(engine->req_pool, src_ddt, req->src_addr);
 341                return -ENOMEM;
 342        }
 343
 344        req->src_ddt = src_ddt;
 345        req->dst_ddt = dst_ddt;
 346
 347        assoc_ents = dma_map_sg(engine->dev, areq->assoc,
 348                sg_count(areq->assoc, areq->assoclen), DMA_TO_DEVICE);
 349        if (areq->src != areq->dst) {
 350                src_ents = dma_map_sg(engine->dev, areq->src, nents,
 351                                      DMA_TO_DEVICE);
 352                dst_ents = dma_map_sg(engine->dev, areq->dst, nents,
 353                                      DMA_FROM_DEVICE);
 354        } else {
 355                src_ents = dma_map_sg(engine->dev, areq->src, nents,
 356                                      DMA_BIDIRECTIONAL);
 357                dst_ents = 0;
 358        }
 359
 360        /*
 361         * Map the IV/GIV. For the GIV it needs to be bidirectional as it is
 362         * formed by the crypto block and sent as the ESP IV for IPSEC.
 363         */
 364        iv_addr = dma_map_single(engine->dev, iv, ivsize,
 365                                 giv ? DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
 366        req->giv_pa = iv_addr;
 367
 368        /*
 369         * Map the associated data. For decryption we don't copy the
 370         * associated data.
 371         */
 372        for_each_sg(areq->assoc, cur, assoc_ents, i) {
 373                ddt_set(src_ddt++, sg_dma_address(cur), sg_dma_len(cur));
 374                if (req->is_encrypt)
 375                        ddt_set(dst_ddt++, sg_dma_address(cur),
 376                                sg_dma_len(cur));
 377        }
 378        ddt_set(src_ddt++, iv_addr, ivsize);
 379
 380        if (giv || req->is_encrypt)
 381                ddt_set(dst_ddt++, iv_addr, ivsize);
 382
 383        /*
 384         * Now map in the payload for the source and destination and terminate
 385         * with the NULL pointers.
 386         */
 387        for_each_sg(areq->src, cur, src_ents, i) {
 388                ddt_set(src_ddt++, sg_dma_address(cur), sg_dma_len(cur));
 389                if (areq->src == areq->dst)
 390                        ddt_set(dst_ddt++, sg_dma_address(cur),
 391                                sg_dma_len(cur));
 392        }
 393
 394        for_each_sg(areq->dst, cur, dst_ents, i)
 395                ddt_set(dst_ddt++, sg_dma_address(cur),
 396                        sg_dma_len(cur));
 397
 398        ddt_set(src_ddt, 0, 0);
 399        ddt_set(dst_ddt, 0, 0);
 400
 401        return 0;
 402}
 403
 404static void spacc_aead_free_ddts(struct spacc_req *req)
 405{
 406        struct aead_request *areq = container_of(req->req, struct aead_request,
 407                                                 base);
 408        struct spacc_alg *alg = to_spacc_alg(req->req->tfm->__crt_alg);
 409        struct spacc_ablk_ctx *aead_ctx = crypto_tfm_ctx(req->req->tfm);
 410        struct spacc_engine *engine = aead_ctx->generic.engine;
 411        unsigned ivsize = alg->alg.cra_aead.ivsize;
 412        unsigned nents = sg_count(areq->src, areq->cryptlen);
 413
 414        if (areq->src != areq->dst) {
 415                dma_unmap_sg(engine->dev, areq->src, nents, DMA_TO_DEVICE);
 416                dma_unmap_sg(engine->dev, areq->dst,
 417                             sg_count(areq->dst, areq->cryptlen),
 418                             DMA_FROM_DEVICE);
 419        } else
 420                dma_unmap_sg(engine->dev, areq->src, nents, DMA_BIDIRECTIONAL);
 421
 422        dma_unmap_sg(engine->dev, areq->assoc,
 423                     sg_count(areq->assoc, areq->assoclen), DMA_TO_DEVICE);
 424
 425        dma_unmap_single(engine->dev, req->giv_pa, ivsize, DMA_BIDIRECTIONAL);
 426
 427        dma_pool_free(engine->req_pool, req->src_ddt, req->src_addr);
 428        dma_pool_free(engine->req_pool, req->dst_ddt, req->dst_addr);
 429}
 430
 431static void spacc_free_ddt(struct spacc_req *req, struct spacc_ddt *ddt,
 432                           dma_addr_t ddt_addr, struct scatterlist *payload,
 433                           unsigned nbytes, enum dma_data_direction dir)
 434{
 435        unsigned nents = sg_count(payload, nbytes);
 436
 437        dma_unmap_sg(req->engine->dev, payload, nents, dir);
 438        dma_pool_free(req->engine->req_pool, ddt, ddt_addr);
 439}
 440
 441/*
 442 * Set key for a DES operation in an AEAD cipher. This also performs weak key
 443 * checking if required.
 444 */
 445static int spacc_aead_des_setkey(struct crypto_aead *aead, const u8 *key,
 446                                 unsigned int len)
 447{
 448        struct crypto_tfm *tfm = crypto_aead_tfm(aead);
 449        struct spacc_aead_ctx *ctx = crypto_tfm_ctx(tfm);
 450        u32 tmp[DES_EXPKEY_WORDS];
 451
 452        if (unlikely(!des_ekey(tmp, key)) &&
 453            (crypto_aead_get_flags(aead)) & CRYPTO_TFM_REQ_WEAK_KEY) {
 454                tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
 455                return -EINVAL;
 456        }
 457
 458        memcpy(ctx->cipher_key, key, len);
 459        ctx->cipher_key_len = len;
 460
 461        return 0;
 462}
 463
 464/* Set the key for the AES block cipher component of the AEAD transform. */
 465static int spacc_aead_aes_setkey(struct crypto_aead *aead, const u8 *key,
 466                                 unsigned int len)
 467{
 468        struct crypto_tfm *tfm = crypto_aead_tfm(aead);
 469        struct spacc_aead_ctx *ctx = crypto_tfm_ctx(tfm);
 470
 471        /*
 472         * IPSec engine only supports 128 and 256 bit AES keys. If we get a
 473         * request for any other size (192 bits) then we need to do a software
 474         * fallback.
 475         */
 476        if (len != AES_KEYSIZE_128 && len != AES_KEYSIZE_256) {
 477                /*
 478                 * Set the fallback transform to use the same request flags as
 479                 * the hardware transform.
 480                 */
 481                ctx->sw_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
 482                ctx->sw_cipher->base.crt_flags |=
 483                        tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
 484                return crypto_aead_setkey(ctx->sw_cipher, key, len);
 485        }
 486
 487        memcpy(ctx->cipher_key, key, len);
 488        ctx->cipher_key_len = len;
 489
 490        return 0;
 491}
 492
 493static int spacc_aead_setkey(struct crypto_aead *tfm, const u8 *key,
 494                             unsigned int keylen)
 495{
 496        struct spacc_aead_ctx *ctx = crypto_aead_ctx(tfm);
 497        struct spacc_alg *alg = to_spacc_alg(tfm->base.__crt_alg);
 498        struct rtattr *rta = (void *)key;
 499        struct crypto_authenc_key_param *param;
 500        unsigned int authkeylen, enckeylen;
 501        int err = -EINVAL;
 502
 503        if (!RTA_OK(rta, keylen))
 504                goto badkey;
 505
 506        if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
 507                goto badkey;
 508
 509        if (RTA_PAYLOAD(rta) < sizeof(*param))
 510                goto badkey;
 511
 512        param = RTA_DATA(rta);
 513        enckeylen = be32_to_cpu(param->enckeylen);
 514
 515        key += RTA_ALIGN(rta->rta_len);
 516        keylen -= RTA_ALIGN(rta->rta_len);
 517
 518        if (keylen < enckeylen)
 519                goto badkey;
 520
 521        authkeylen = keylen - enckeylen;
 522
 523        if (enckeylen > AES_MAX_KEY_SIZE)
 524                goto badkey;
 525
 526        if ((alg->ctrl_default & SPACC_CRYPTO_ALG_MASK) ==
 527            SPA_CTRL_CIPH_ALG_AES)
 528                err = spacc_aead_aes_setkey(tfm, key + authkeylen, enckeylen);
 529        else
 530                err = spacc_aead_des_setkey(tfm, key + authkeylen, enckeylen);
 531
 532        if (err)
 533                goto badkey;
 534
 535        memcpy(ctx->hash_ctx, key, authkeylen);
 536        ctx->hash_key_len = authkeylen;
 537
 538        return 0;
 539
 540badkey:
 541        crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
 542        return -EINVAL;
 543}
 544
 545static int spacc_aead_setauthsize(struct crypto_aead *tfm,
 546                                  unsigned int authsize)
 547{
 548        struct spacc_aead_ctx *ctx = crypto_tfm_ctx(crypto_aead_tfm(tfm));
 549
 550        ctx->auth_size = authsize;
 551
 552        return 0;
 553}
 554
 555/*
 556 * Check if an AEAD request requires a fallback operation. Some requests can't
 557 * be completed in hardware because the hardware may not support certain key
 558 * sizes. In these cases we need to complete the request in software.
 559 */
 560static int spacc_aead_need_fallback(struct spacc_req *req)
 561{
 562        struct aead_request *aead_req;
 563        struct crypto_tfm *tfm = req->req->tfm;
 564        struct crypto_alg *alg = req->req->tfm->__crt_alg;
 565        struct spacc_alg *spacc_alg = to_spacc_alg(alg);
 566        struct spacc_aead_ctx *ctx = crypto_tfm_ctx(tfm);
 567
 568        aead_req = container_of(req->req, struct aead_request, base);
 569        /*
 570         * If we have a non-supported key-length, then we need to do a
 571         * software fallback.
 572         */
 573        if ((spacc_alg->ctrl_default & SPACC_CRYPTO_ALG_MASK) ==
 574            SPA_CTRL_CIPH_ALG_AES &&
 575            ctx->cipher_key_len != AES_KEYSIZE_128 &&
 576            ctx->cipher_key_len != AES_KEYSIZE_256)
 577                return 1;
 578
 579        return 0;
 580}
 581
 582static int spacc_aead_do_fallback(struct aead_request *req, unsigned alg_type,
 583                                  bool is_encrypt)
 584{
 585        struct crypto_tfm *old_tfm = crypto_aead_tfm(crypto_aead_reqtfm(req));
 586        struct spacc_aead_ctx *ctx = crypto_tfm_ctx(old_tfm);
 587        int err;
 588
 589        if (ctx->sw_cipher) {
 590                /*
 591                 * Change the request to use the software fallback transform,
 592                 * and once the ciphering has completed, put the old transform
 593                 * back into the request.
 594                 */
 595                aead_request_set_tfm(req, ctx->sw_cipher);
 596                err = is_encrypt ? crypto_aead_encrypt(req) :
 597                    crypto_aead_decrypt(req);
 598                aead_request_set_tfm(req, __crypto_aead_cast(old_tfm));
 599        } else
 600                err = -EINVAL;
 601
 602        return err;
 603}
 604
 605static void spacc_aead_complete(struct spacc_req *req)
 606{
 607        spacc_aead_free_ddts(req);
 608        req->req->complete(req->req, req->result);
 609}
 610
 611static int spacc_aead_submit(struct spacc_req *req)
 612{
 613        struct crypto_tfm *tfm = req->req->tfm;
 614        struct spacc_aead_ctx *ctx = crypto_tfm_ctx(tfm);
 615        struct crypto_alg *alg = req->req->tfm->__crt_alg;
 616        struct spacc_alg *spacc_alg = to_spacc_alg(alg);
 617        struct spacc_engine *engine = ctx->generic.engine;
 618        u32 ctrl, proc_len, assoc_len;
 619        struct aead_request *aead_req =
 620                container_of(req->req, struct aead_request, base);
 621
 622        req->result = -EINPROGRESS;
 623        req->ctx_id = spacc_load_ctx(&ctx->generic, ctx->cipher_key,
 624                ctx->cipher_key_len, aead_req->iv, alg->cra_aead.ivsize,
 625                ctx->hash_ctx, ctx->hash_key_len);
 626
 627        /* Set the source and destination DDT pointers. */
 628        writel(req->src_addr, engine->regs + SPA_SRC_PTR_REG_OFFSET);
 629        writel(req->dst_addr, engine->regs + SPA_DST_PTR_REG_OFFSET);
 630        writel(0, engine->regs + SPA_OFFSET_REG_OFFSET);
 631
 632        assoc_len = aead_req->assoclen;
 633        proc_len = aead_req->cryptlen + assoc_len;
 634
 635        /*
 636         * If we aren't generating an IV, then we need to include the IV in the
 637         * associated data so that it is included in the hash.
 638         */
 639        if (!req->giv) {
 640                assoc_len += crypto_aead_ivsize(crypto_aead_reqtfm(aead_req));
 641                proc_len += crypto_aead_ivsize(crypto_aead_reqtfm(aead_req));
 642        } else
 643                proc_len += req->giv_len;
 644
 645        /*
 646         * If we are decrypting, we need to take the length of the ICV out of
 647         * the processing length.
 648         */
 649        if (!req->is_encrypt)
 650                proc_len -= ctx->auth_size;
 651
 652        writel(proc_len, engine->regs + SPA_PROC_LEN_REG_OFFSET);
 653        writel(assoc_len, engine->regs + SPA_AAD_LEN_REG_OFFSET);
 654        writel(ctx->auth_size, engine->regs + SPA_ICV_LEN_REG_OFFSET);
 655        writel(0, engine->regs + SPA_ICV_OFFSET_REG_OFFSET);
 656        writel(0, engine->regs + SPA_AUX_INFO_REG_OFFSET);
 657
 658        ctrl = spacc_alg->ctrl_default | (req->ctx_id << SPA_CTRL_CTX_IDX) |
 659                (1 << SPA_CTRL_ICV_APPEND);
 660        if (req->is_encrypt)
 661                ctrl |= (1 << SPA_CTRL_ENCRYPT_IDX) | (1 << SPA_CTRL_AAD_COPY);
 662        else
 663                ctrl |= (1 << SPA_CTRL_KEY_EXP);
 664
 665        mod_timer(&engine->packet_timeout, jiffies + PACKET_TIMEOUT);
 666
 667        writel(ctrl, engine->regs +         
        retur= -EINPROGRESS;
}

static int rad_submit" class="sref">spac">rad_submel(struct spacc_req *req;
;
static void spacpushel(struct spacc_engine *engine)
        struct spacc_req *req;

      whileif (!engine->             p;engine->  (1 &l> = engine->
              ++p;engine->               *req = engine->spacc_req,
                                      *                req->engine->;
;
                req->result t rad_submit" class="sref">spac">rad_submelreq;
      a>}
}

/*
/* Supif an AEAD requesforhe processi. This will configurake th">engi, c_lo/*
coextce an, thea>srSet th">packhe processi./*
/*


 */
static int spacc_aead Supel(struct aead_request *req *giv,
                          , unsigned alg_typebool is_encrypt)
        struct crypto_alg *alg = req->base.tfm->__crt_alg;
        struct spacc_engine *engine = to_spacc_alg(alg->engine;
        struct spacc_req *aead_requese=ctx" class="sref">aead_requese=celreq;
        int err = -EINPROGRESS;
      , unsignelongnt       , unsigne> ivsize = crypto_aead_ivsize(crypto_aead_reqtfm(req));

        giv = giv        giv_len = ivsize        req >(&req->base        is_encrypt = is_encrypt        result = -        engine = engine;
        complete = spacc_aead_complete;

        if (spacc_aeae nedo_fallback" class="sref">spacc_aeae nedo_fallbafm(                return spacc_aead_do_fallbackreq *alg_typeis_encrypt;

        spacc_aeamakree_ddts" class="sref">spacc_aeamakree_ddfm(giv;

        err = -EINPROGRESS;
        in_lock_irqsaveer(&engine->        if (spacfifo_cmedoulool" class="sref">spacfifo_cmedoulofm(engine          p;engine->  (1g< engine->                if f (req->base.              a>        err = -              a>        rtorete" class="sref">in_unlock_irq">rtoreer(&engine->                      goto                 a>}
                engine->        } el ) {
                engine->               *spacpushel(engine      a>}
        rtorete" class="sref">in_unlock_irq">rtoreer(&engine->;
      goto   
        spacc_aead_free_ddts(        return err;
}
;
static int aead_request *req)
        struct crypto_aefm" class="sref">crypto_aest *crypto_aead_reqtfm(req;
        struct crypto_tfm" class="sref">crypto_tfm *tfm = crypto_aeaeqtfm" class="sref">crypto_aeaeqtfm(        struct spacc_alg *alg = to_spacc_alg(tfm->__crt_alg;

        return spacc_aead Supelreq *alg->}
}
static int aeagdrencryad_request *req)
        struct crypto_aefm" class="sref">crypto_aest *tfm = aeagdrencryad_re=tfm" class="sref">aeagdrencryad_re=tfm(req;
        struct spacc_aead_ctx *ctx = tfm;
        ivsize = crypto_aead_ivsize(tfm;
        struct spacc_alg *alg = to_spacc_alg(tfm->base.__crt_alg;
      , unsigne>         beL607req;

        req->req.eq *ctx->ivsize;
        ivsize        if (ivsize                req->giv(0, ivsize                      a>}
        req = tbeL664" class="srefepu_">tbeL6fm(req->req        req->giv + ivsizereq
        return spacc_aead Supel(&req->reqreq->givalg->}
;
static int spacc_aeae decryts(struct aead_request *req)
        struct crypto_aefm" class="sref">crypto_aest *crypto_aead_reqtfm(req;
        struct crypto_tfm" class="sref">crypto_tfm *tfm = crypto_aeaeqtfm" class="sref">crypto_aeaeqtfm(        struct spacc_alg *alg = to_spacc_alg(tfm->__crt_alg;

        return spacc_aead Supelreq *alg->}
}
/*
coext. This is responsiblesforhallocayptiIn the
coext.he
 */
static int spacc_aeadra_initts(struct crypto_tfm" class="sref">crypto_tfm *tfm)
        struct spacc_aead_ctx *ctx = tad_ctx" class="srefe=crypt">tad_cze(tfm;
        struct crypto_alg *alg = tfm->__crt_alg;
        struct spacc_alg *spacc_alg = to_spacc_alg(alg;
        struct spacc_engine *engine = spacc_alg->engine;
;
        ctx->.spacc_alg->        ctx->.engine = engine;
        ctx-> = cryptollocto_aefm" class="sref">cryptollocto_aelg(alg->a_" naiv(>;
                                         t;                                         t;        if (ctx->              t;engine->                       t;alg->a_" naiv;
               *ctx-> =       a>}
        ctx->.spacc_alg->        ctx->.spacc_alg->
        ctx->ctx->
        tfm->tto_aelg.spacc_req
        retur0));
}
;
/*
coext. This is c_faneew thethe transform is d_fro/*
ce anmuuesf_frethe o_fallba cipher.he
 */
static void spacc_aeadra_exitts(struct crypto_tfm" class="sref">crypto_tfm *tfm)
        struct spacc_aead_ctx *ctx = tad_ctx" class="srefe=crypt">tad_cze(tfm;

        if (ctx->
                cryptd_freo_aelg(ctx->;
        ctx-> = }

/*
/* Sethe DES keysforha;block cipherctransform. This also performs weak key/*
/checkptiIifethe transform has   requeneeit.he
 */
en831"738a>    ic int spacc_aeaddeselcrypto_tfm"ablklg" class="sref"w_cipto_tfm"ablklg" cl *crypclass="srefu8st *spac/sp(str href="drivers/crypto/picoxcell_crypto.c8L601" id=7L632"8class="line" name=7L632"83261<8a>               *      href="drivers/crypto/picoxcell_crypto.c8L620" id=7L634"8class="line" name=7L634"83654<8a>        crypto_tfm" class="sref">crypto_tfm *tfm = crypto_aeaeqblklg" cl" class="sref">crypto_aeaeqblklg" cl" cl(        struct crypc_aead_blk" class="sref">spacc_aead_blk" cl *ctx = tad_ctx" class="srefe=crypt">tad_cze(tfm;
        spac ml    [ref="+code=tfm"ysf_EXPKEY_WORDlass="sref">EINPysf_EXPKEY_WORDl    ] href="drivers/crypto/picoxcell_crypto.c8L621" id=8L627" class="line" name=7L637"83657<8a>
            EINPysf3_EDE_KEY_SIZE>;
                              t;        retu href="drivers/crypto/picoxcell_crypto.c8L626" id=7L642"8class="line" name=7L642"8 642<84}
spac cs_e/sp(spac ml     href="+code=alg"/spass="sref">spac/sp(str))p;                href="+code=crypto_aead_blklg" cl"g                tfm->                return       a>}

        ctx->spac/sp(str href="+code=alg"/spass="sref">spac/sp(str href="+codv_len" class="srefv_len        ctx->giv_/sp" cl = ;

            r0));
stat href="drivers/crypto/picoxcell_crypto.c7L568"8id=7L654"8class="line" name=7L654"8 654<85>

ce anmue DES kerha;blockA">cS cipherctrans. Somkerha;/a>gths are not suppor.he
 */
/* Setpan>
    ic int spacc_aeadaeselcrypto_tfm"ablklg" class="sref"w_cipto_tfm"ablklg" cl *crypclass="srefu8st *spac/sp(str href="drivers/crypto/picoxcell_crypto.c8
              t; 
        struct crypto_tfm *tfm = crypto_aeaeqblklg" cl" class="sref">crypto_aeaeqblklg" cl" cl(        crypc_aead_blk" class="sref">spacc_aead_blk" cl *ctx = tad_ctx" class="srefe=crypt">tad_cze(tfm;
        if (err = -            cS_MAX_KEY_SIZEass="sref">EINP>cS_MAX_KEY_SIZE>;
                    ref="+codlist_ato_aeaeqblklg" cl"l;
                    rn         
        retun class="comment"* De span>
}
/* Seeeeeeeee* IPSec ne only suppor.s 128uuesf256 bit">cS /sps. If we g DEaan>
/*


            cS_KEYSIZE_12lass="srefu8stcS_KEYSIZE_12l ivsi cS_KEYSIZE_2class="lineu8stcS_KEYSIZE_2a>     ;                ref="+code=ctx" class="sref">ctx->;
                    n class="comment"* De span>
/checccccccccccccccccmue DES keba cipherorm has   to uso_falls7L5 eneeit.;b" cl asan>
 */
}
 */
               *ctx-> = <;base.                ctx-> = <;base.                        base.                err = -spacto_aeaeqblklg" cl"lctx-> = < href="+code=alg"/spass="sref">spac/sp(str href="+codv_len" class="srefv_len                    err = -ahref="drivers/crypto/picoxcell_crypto.c8L601" id=7L588"8class="line" name=7L588"8 588<88>                                     stru} elso_cS_KEYSIZE_12lass="srefu8stcS_KEYSIZE_12l ivsi cS_KEYSIZE_2class="lineu8stcS_KEYSIZE_2a>     ;              t;ctx->
                    ref="+codv_len" class="sref">err = -        ctx->spac/sp(str href="+code=alg"/spass="sref">spac/sp(str href="+codv_len" class="srefv_len        ctx->giv_/sp" cl = ;
    ref="+codoutts"herl            err = -i ctx->;
                    ref="+code=tfm" class="sref">tfm;
<;                tfm->              t;ctx-> = <;base.        retu href="drivers/crypto/picoxcell_crypto.c8L626"9id=8L602"9class="line" name=8L602"90261<90}
      a>}
err = - href="drivers/crypto/picoxcell_crypto.c8L615"9i4=8L593"9class="line" name=7L594"90654<9a>     href="drivers/crypto/picoxcell_crypto.c8L626"9i5=8L593"9class="line" name=7L595"90665<90;

spacc_aeadkasumi_f8elcrypto_tfm"ablklg" class="sref"w_cipto_tfm"ablklg" cl *                                      t. s href="+cod">crypclass="srefu8st *spac/sp(str hgne>         struct crypto_tfm *tfm = crypto_aeaeqblklg" cl" class="sref">crypto_aeaeqblklg" cl" cl(        struct spacc_aead_blk" cl *ctx = tad_ctx" class="srefe=crypt">tad_cze(tfm;
        retuerr = -cS_MAX_KEY_SIZEass="sref">EINP>cS_MAX_KEY_SIZE>;
                    ref="+codlist_ato_aeaeqblklg" cl"l;
                err = -                spacoul;
      a>}

        ctx->spac/sp(str href="+code=alg"/spass="sref">spac/sp(str href="+codv_len" class="srefv_len        ctx->giv_/sp" cl = ;

    ref="+codoutts"oulass="sref">spacoul;
      a>}
err = - href="drivers/crypto/picoxcell_crypto.c8L615"9id=8L624"9class="line" name=8L624"92654<92>     href="drivers/crypto/picoxcell_crypto.c8L626"9id=8L625"9class="line" name=8L625"9 625<92;

spacc_aead_blk"_fal_ba ciphe(struct crypc_req" class="sref">spacc_reqreq)
        struct spacc_aead_blk" cl *ctx = < href="drivers/crypto/picoxcell_crypto.c8L615"9id=8L619"9class="line" name=8L629"92659<92>        struct crypto_tfm *tfm = cryp class="sref">req->req->tfm = < href="drivers/crypto/picoxcell_crypto.c8L615"9id=8L630"9class="line" name=8L630"93570<93>        struct crypto_alg *alg = req->req->tfm = <;__crt_alg;
en931"7393>        struct spacc_alg *spacc_alg = to_spacc_alg(alg;
        ctx = tad_ctx" class="srefe=crypt">tad_cze(tfm;

        strurn spacc_alg->;
                EINPSPA_CTRL_CIPHSYNC97El = -i                             ref="+cod__beL6 class="sref">ctx->giv_/sp" cl = cS_KEYSIZE_12l ivsi                             ref="+cod__beL6 class="sref">ctx->giv_/sp" cl = cS_KEYSIZE_2a>    hhref="drivers/crypto/picoxcell_crypto.c8L615"9id=8L619"9class="line" name=7L639"93629<93>     href="drivers/crypto/picoxcell_crypto.c8L626"9id=7L640"9class="line" name=7L640"9 640<94>
    ic int  basec_aeadrblk" ompletl(struct crypc_req" class="sref">spacc_reqreq)
        crypqblklg" cl"eneeit.ass="sref">algreq< blk" cl =                     ref="+cod__beL6 onta nar_ofass="sref">ctxreq->req->,hct crypqblklg" cl"eneeit.ass="sref">algbase.            req< blk" cl = <;req< blk" cl = <;alg                    ref="+codlist_ac_req<_aelgddlass="sref">spacc_aead_aelgddl(req-> href="+codv_len" class="sref">req->spaccrlgddl-> href="+codv_len" class="sref">req->req< blk" cl = <;                                   ref="+codv_len" blk" class="sref">req< blk" cl = <;EINPDMA__NEDEVICE.                spacc_aead_aelgddl(req-> href="+codv_len" class="sref">req->spacdt.gddl-> href="+codv_len" class="sref">req->req< blk" cl = <;alg              t;req< blk" cl = <;EINPDMA_FROMEDEVICE.        retu  elsohref="drivers/crypto/picoxcell_crypto.c8L604"9id=7L642"9class="line" name=7L652"9 652<95>               *spacc_aead_aelgddl(req-> href="+codv_len" class="sref">req->spacdt.gddl-> href="+codv_len" class="sref">req->req< blk" cl = <;alg                req< blk" cl = <;
        req->req->base ompletl(struref="+code=tfm" class="sref">req->req->,href="+code=tfm" class="sref">req->     href="drivers/crypto/picoxcell_crypto.c8L626"9id=8L627"9class="line" name=7L657"95607<95>
static voidspacc_aeadrblk"submcl(struct crypc_req" class="sref">spacc_reqreq)
        struct crypto_tfm *tfm = cryp class="sref">req->req->tfm = < href="drivers/crypto/picoxcell_crypto.c8L615"9id=7L661"9class="line" name=7L661"96651<96>        struct spacc_aead_blk" cl *ctx = tad_ctx" class="srefe=crypt">tad_cze(tfm;
        struct algreq< blk" cl = algreq->req->a href="drivers/crypto/picoxcell_crypto.c8L604"9id=7L643"9class="line" name=7L663"96653<9a>        crypto_alg" class="sref">crypto_alg *alg = req->req->tfm = <;__crt_alg;
        if (ct spacc_alg *spacc_alg = to_spacc_alg(alg;
        struct crypc_aeadneass="sref">spacc_alg *spacne *ctx->spacne *        
            ref="+code=giv" class="sref">req->crypttx_il *spacc_aeadlotx" cl(ctx->ctx->spac/sp(str href="drivers/crypto/picoxcell_crypto.c7L638"9id=7L659"9class="line" name=7L569"96629<96>                ctx->giv_/sp" cl = < href="+codv_len" blk" class="sref">req< blk" cl = <;reqalg;
<;req              t;
req->ass="sref">spacne *        req->ass="sref">spacne *        ass="sref">spacne *        req< blk" cl = <;ass="sref">spacne *            ref="+code=ctx"writelass="srefsasueqwritel(stru0 href="+codv_len"neass="sref">spacne *            ref="+code=giv"writelass="srefsasueqwritel(stru0 href="+codv_len"neass="sref">spacne *        ass="sref">spacne *
spacc_alg->req->crypttx_il *               *req->req                
        spacne *spac_alket_timcoul(    href="drivers/crypto/picoxcell_crypto.c7L591"9id=8L627"9class="line" name=7L587"98597<98>            ref="+code=ctx"writelass="srefsasueqwritel(struref="+codmemcpkctrlass="srefsasueqctrl *ass="sref">spacne *
        strurn EINPROGPROGRESl *     href="drivers/crypto/picoxcell_crypto.c8L626"9id=7L591"9class="line" name=7L591"99100<99>
spacc_aead_blk"do_ba ciphe(struct algreq->,href="drivers/crypto/picoxcell_crypto.c8L622"9id=7L583"9class="line" name=7L593"99573<99>                 ass="sref">spac cl_typ> *req     href="drivers/crypto/picoxcell_crypto.c8L620"9id=7L595"9class="line" name=7L595"99665<99>        struct crypto_alg" class="sref">crypto_tfm *crypold" cl *                ref="+cod">crypto_alg" blklg" cl" class="sref">crypto_aeaeqblklg" cl" cl( class="sref">crypto_aeaeqblklg" cl"/a> cl(struref="+code=tfm" class="sref">req->aa href="drivers/crypto/picoxcell_crypto.c7L591"9id=7L587"9class="line" name=7L597"99597<9a>            ct spacc_aead_blk" cl *ctx = tad_ctx" class="srefe=crypt">tad_cze(crypold" cl *            err = - href="drivers/crypto/picoxcell_crypto.c7L591"9id=7L569"9class="line" name=7L599"99917<99>    href="drivers/crypto/picoxcell_crypto.c7L591"10id=8L600"10id=8s="line" name=7L599"10id=>10id            ctx->
ref="drivers/crypto/picoxcell_crypto.c7L591"10i1=8L600"10ilass="line" name=7L591"10ila>10i>                    rn 10i}
10i>        
10i>
10i>
10i6
10i7
10i>            ref="+code=giv"/blklg" cl"eneeit._lcryp/blklg" cl"eneeit._lreq->,href="+code=tfm" class="sref">ctx->
10i>        err = -reqreq< o_aeaeqblklg" cl"ento.c7(struref="+code=tfm" class="sref">req->a :href="drivers/crypto/picoxcell_crypto.c7L636"101d=8L600"10class="line" name=8L610"10cla>10cl              t;req< o_aeaeqblklg" cl"deto.c7(struref="+code=tfm" class="sref">req->a href="drivers/crypto/picoxcell_crypto.c8L615"1011=8L600"10class="line" name=8L611"10cla>10c1        cryp/blklg" cl"eneeit._lreq->,href="+code=tfm"__ o_aeaeqblklg" cl"cat.ass="sref">alg<__ o_aeaeqblklg" cl"cat.(crypold" cl *10c}
10c>      a>}
err = - href="drivers/crypto/picoxcell_crypto.c8L615"10c4=8L600"10class="line" name=8L614"10cla>10c>     href="drivers/crypto/picoxcell_crypto.c8L626"10c5=8L600"10class="line" name=8L615"10cla>10c;
10c>
spacc_aead_blk"lalgreq->,hgne> ass="sref">spac cl_typ> *10c>                                ref="+codv_len"boolass="srefsasueqbool     ref="+code=tfm"is_ento.c7ass="sref">req101 {
101>        struct crypto_alg *alg = req->base.tfm = <;__crt_alg;
10cl            ct ass="sref">spacc_alg *spacne *to_spacc_alg(alg;
spacne *10c>        struct spacc_reqspacdev" cl *ctxreq->a href="drivers/crypto/picoxcell_crypto.c8L615"1022=8L600"10class="line" name=8L622"10cla>10c>            gne> 10c3            err = -10c>
10c>        spacdev" cl *req->            = ;req->base.10c>        spacdev" cl *reqreq10c>            ref="+code=ctx"dev" class="sref">spacdev" cl *ass="sref">spacne *spacne *10c>            ref="+code=giv"dev" class="sref">spacdev" cl *base ompletl(str       = ref="+code=__crc_aeadrblk" ompletlass="sref">basec_aeadrblk" ompletl(str href="drivers/crypto/picoxcell_crypto.c7L591"10c9=8L600"10class="line" name=8L629"10cla>10c>        spacdev" cl *EINPROGPROGRESl *10cl
en10=en>10c>        retuspacunlikelp(struref="+code=tfm"c_aeac_blk"_fal_ba cipheass="sref">spacc_aead_blk"_fal_ba ciphe(struref="+codmemcpkdev" class="sref">spacdev" cl *10c>               *spacc_aead_blk"do_ba ciphe(struref="+code=tfm" class="sref">req->,href="+code=tfm" cl_typ>ass="sref">spac cl_typ> *req10c3
10c>        
10c>. If we shareefalls7L6 sourceuuesan>
10c6
10c7
10c8        retureq->spaccrl = req->spacdt. *10c>                spacdev" cl *spaccrlgddl-> = ref="+code=__crc_aeadsl_togddlass="sref">spacc_aeadsl_togddl(struref="+code=tfm"neass="sref">spacne *req->spaccrl = < href="drivers/crypto/picoxcell_crypto.c7L636"104d=8L600"10class="line" name=7L640"10cla>10cl                            ref="+codv_len" class="sref">req->EINPDMA__NEDEVICE.spacdev" cl *10c>                    spacdev" cl *spaccrlgddl-> href="drivers/crypto/picoxcell_crypto.c7L575"1042=8L600"10class="line" name=7L642"10cla>10c>               *spacoul;
10c3
10c>                    ref="+cod__beL6dev" class="sref">spacdev" cl *spacdt.gddl-> = ref="+code=__crc_aeadsl_togddlass="sref">spacc_aeadsl_togddl(struref="+code=tfm"neass="sref">spacne *req->alg10c>                req->EINPDMA_FROMEDEVICE.spacdev" cl *10c>                spacdev" cl *spacdt.gddl-> href="drivers/crypto/picoxcell_crypto.c7L575"1047=8L600"10class="line" name=7L647"10cla>10c>                             spacould_aelghrl;
10c8        retu  elsoa href="drivers/crypto/picoxcell_crypto.c8L600"1049=8L600"10class="line" name=7L649"10cla>10c>                spacdev" cl *spacdt.gddl-> = ref="+code=__crc_aeadsl_togddlass="sref">spacc_aeadsl_togddl(struref="+code=tfm"neass="sref">spacne *req->alg10cl                req->spacdev" cl *10c>                    spacdev" cl *spacdt.gddl-> href="drivers/crypto/picoxcell_crypto.c7L575"1052=8L600"10class="line" name=7L652"10cla>10c>               *spacoul;
10c3
10c>                    ref="+cod__beL6dev" class="sref">spacdev" cl *spaccrlgddl-> = ref="+code=__cr" class="srefNULLeq;
10c>                spacdev" cl *spacdev" cl *10c>             href="drivers/crypto/picoxcell_crypto.c8L626"1057=8L600"10class="line" name=7L657"10cla>10c>
10c>            ref="+code=giv" class="sref">err = -EINPROGPROGRESl *10c>        basec_in_lock_irqsavl(stru;spacne *spachw_lock(10cl        
10c1 will aeaepDES keoperationenow. If it won'DES knan>
10c2
10c3ors
10c>
10c>            spacunlikelp(struref="+code=tfm"c_aeacfifo_cmd_fullass="srefsasueqc_aeacfifo_cmd_full(struref="+code=tfm"neass="sref">spacne *10c>                ref="+cod">crypneass="sref">spacne *reqcrypneass="sref">spacne *10c>                    req->base.10c>                            ref="+cod__beL6 class="sref">err = -EINPRBUSY *10c>                basec_in_unlock_irqrestorl(stru;spacne *spachw_lock(10cl                             10c>                     href="drivers/crypto/picoxcell_crypto.c8L626"1072=8L600"10class="line" name=7L572"10cla>10c>               *spacdev" cl *ass="sref">spacne *spac_neding(10c3              elsoa href="drivers/crypto/picoxcell_crypto.c8L600"1074=8L600"10class="line" name=7L574"10cla>10c>                    ref="+cod__beL6listgadd_tpilass="srefflareSlistgadd_tpil(stru;spacdev" cl *ass="sref">spacne *spac_neding(10c>                ass="sref">spacne *10c>             href="drivers/crypto/picoxcell_crypto.c8L626"1077=8L600"10class="line" name=7L577"10cla>10c>            ref="+code=ctx"spin_unlock_irqrestorlass="sref">basec_in_unlock_irqrestorl(stru;spacne *spachw_lock(10c>
10c>             spacoul;
10cl
10c110c2            ref="+code=giv"c_req<_aelgddlass="sref">spacc_aead_aelgddl(spacdev" cl *spacdev" cl *spacdt.gddl-> href="+codv_len"dev" class="sref">spacdev" cl *req->alg10c>                req->req->spaccrl = req->spacdt. *10c>                    hhhhhhhref="+codv_len"DMA_BIDIRECTIONAlass="srefNULLeqDMA_BIDIRECTIONAl.EINPDMA_FROMEDEVICE.10c5spacould_aelghrl;
10c>            req->spaccrl = req->spacdt. *10c>                    ref="+code=giv"c_req<_aelgddlass="sref">spacc_aead_aelgddl(spacdev" cl *spacdev" cl *spaccrlgddl-> href="+codv_len"dev" class="sref">spacdev" cl *10c>                            hhhhhhhref="+codv_len" class="sref">req->spaccrl = <  ref="+codv_len" class="sref">req->EINPDMA__NEDEVICE.10c9spacoul;
10cl            rn err = - href="drivers/crypto/picoxcell_crypto.c8L615"1091=8L600"10class="line" name=7L591"10cla>10c110c}
10c>    ic int spacc_aeadrblk"toa"incl(crypto_tfm *tfm = 10c>     href="drivers/crypto/picoxcell_crypto.c8L620"10c5=8L600"10class="line" name=7L595"10cla>10c>        struct crypc_aead blk" class="sref">spacc_aead_blk" cl *ctx = tad_ctx" class="srefe=crypt">tad_cze(tfm;
10c6        struct crypt">tad_ class="sref">crypto_alg *alg = tfm = <;__crt_alg;
10c>            ct spacc_alg *spacc_alg = to_spacc_alg(alg;
10c8            ct ass="sref">spacc_alg *spacne *spacc_alg->spacne *10c>    href="drivers/crypto/picoxcell_crypto.c7L591"11id=8L600"11id=8s="line" name=7L599"11id=>11id            ref="+code=ctx" class="sref">ctx = <;spacc_alg->spactyp> *11i>            ref="+code=ctx" class="sref">ctx = <;spacne *spacne *1102            alg;
<;;
110>                ctx = <;
tad_alloc"ablklg" class="sref"w_cipto>tad_alloc"ablklg" cl(alg;
<;110>                    hhhhhhh     110>                ctx->
110>                giv_dev"warl(struref="+code=tfm"neass="sref">spacne *giv_dev(110>                                 alg;
<;110>                            ref="+cod__beL6 class="sref">ctx = <;
110>                11cl             href="drivers/crypto/picoxcell_crypto.c8L626"1111=8L600"11class="line" name=8L611"11cla>11c1        ctx = <;spacc_alg->1112            ref="+code=giv" class="sref">ctx = <;spacc_alg->1113
1114            ref="+code=giv" class="sref">tfm = <;spacc_req11c;
111>            rn 11c>     href="drivers/crypto/picoxcell_crypto.c8L626"1118=8L600"11class="line" name=7L598"111la>111>
111>    ic int voi href="+codv_len"c_aeadrblk"toa"exclass="sref">spacc_aeadrblk"toa"excl(crypto_tfm *tfm = 11cl     href="drivers/crypto/picoxcell_crypto.c8L600"11c1=8L600"11class="line" name=8L621"11cla>11c>        struct spacc_aead_blk" cl *ctx = tad_ctx" class="srefe=crypt">tad_cze(tfm;
112}
11c3            ctx->
112>                    ref="+cod__beL6t">tad__aelgablklg" class="sref"w_cipto>tad__aelgablklg" cl(ctx->
11c>        ctx = <;
11c>     href="drivers/crypto/picoxcell_crypto.c8L626"1127=8L600"11class="line" name=8L627"11cla>112>
11c>    ic int reqalgreq-> href="drivers/crypto/picoxcell_crypto.c7L583"1129=8L600"11class="line" name=8L629"11cla>11c>     href="drivers/crypto/picoxcell_crypto.c8L600"113d=8L600"11class="line" name=8L630"11cla>113l            ct tad_ablklg" cl(
tad_ablklg" cl"/a> class="sref">crypto_aeaeqblklg" cl"/a> cl(struref="+code=tfm" class="sref">req->a href="drivers/crypto/picoxcell_crypto.c8L615"1131=8L600"11=engine" class="sref">en11=en>113>        struct crypto_tfm *tfm = tad_ablklg" cl" class="sref">crypto_aeaeqblklg" cl" cl(
11c>            ct spacc_alg *alg = to_spacc_alg(tfm = <;__crt_alg;
11c3
11c>        spacc_aead_blk"lreq->,href="+code=tfm" class="sref">alg;
<;spactyp> *11c>11c611c7reqalgreq-> href="drivers/crypto/picoxcell_crypto.c7L583"1138=8L600"11class="line" name=7L638"11cla>113 {
113>        struct tad_ablklg" cl(
tad_ablklg" cl"/a> class="sref">crypto_aeaeqblklg" cl"/a> cl(struref="+code=tfm" class="sref">req->a href="drivers/crypto/picoxcell_crypto.c7L579"114d=8L600"11class="line" name=7L640"11cla>114l            ct crypto_tfm *tfm = tad_ablklg" cl" class="sref">crypto_aeaeqblklg" cl" cl(
114>        struct spacc_alg *alg = to_spacc_alg(tfm = <;__crt_alg;
114}
114>      a>}
spacc_aead_blk"lreq->,href="+code=tfm" class="sref">alg;
<;spactyp> *114>     href="drivers/crypto/picoxcell_crypto.c8L626"11c5=8L600"11class="line" name=7L645"11cla>114;
114>
spacinl/a>     spacc_aeacsifo_sc i_emptp(ass="sref">spacc_alg *spacne *11c>     href="drivers/crypto/picoxcell_crypto.c7L579"11c8=8L600"11class="line" name=7L648"11cla>11c8        return ass="sref">spacne *11c>                EINPSPA_FIFO_STAT_EMPTY;
11cl     href="drivers/crypto/picoxcell_crypto.c8L626"1151=8L600"11class="line" name=7L651"11cla>11c>    href="drivers/crypto/picoxcell_crypto.c8L626"1152=8L600"11class="line" name=7L652"11cla>11c>    ic int voi href="+codv_len"c_aeadprocess_doa>ass="sref">spacc_alg(ass="sref">spacc_alg *spacne *11c3
11c>            ct spacc_reqreq-> href="drivers/crypto/picoxcell_crypto.c8L615"1155=8L600"11class="line" name=7L655"11cla>11c>            gne> 1156115>            ref="+code=ctx"spin_lock_irqsavlass="sref">basec_in_lock_irqsavl(stru;spacne *spachw_lock(115>
11c>        spacc_aeacsifo_sc i_emptp(spacne *116l                    ref="+code=req" class="sref">req->a href="+code=tfm"listgfirstgentrpass="sref">spaclistgfirstgentrp(stru;spacne *spacin_progress(spacc_req116>                                           ref="+code=tfm"listass="sref">spaclist(116>               *req->ass="sref">spacne *116>                spacne *req116>
116>                
11c>                ass="sref">spacne *11c>                    ref="+code=cryp class="sref">req->ass="sref">spacne *11c>                         ref="+code=spacSPA_STATUS_RES_CODE_MASKass="srefflareSSPA_STATUS_RES_CODE_MASK *crypSPA_STATUS_RES_CODE_OFFSETass="srefflareSSPA_STATUS_RES_CODE_OFFSET     href="drivers/crypto/picoxcell_crypto.c7L591"1169=8L600"11class="line" name=7L569"11cla>116>    href="drivers/crypto/picoxcell_crypto.c7L591"117d=8L600"11class="line" name=7L570"11cla>11cl                    r class="comment"* De span>
1171orssc iusuintoefallsc ndard POSIXs/a>oran>
1172crys an>
1173
11c>                    spacunlikelp(struref="+code=tfm" class="sref">req->11c>                req->117>                crypSPA_STATUS_ICV_FAIlass="srefNULLeqSPA_STATUS_ICV_FAIl    :href="drivers/crypto/picoxcell_crypto.c7L636"1177=8L600"11class="line" name=7L577"11cla>117>                                 req->117>                            hhhhhhh break href="drivers/crypto/picoxcell_crypto.c7L591"1179=8L600"11class="line" name=7L579"11cla>117>    href="drivers/crypto/picoxcell_crypto.c7L591"118d=8L600"11class="line" name=7L580"11cla>118l                            case ref="+cod">crypSPA_STATUS_MEMORY_ERRORass="srefflareSSPA_STATUS_MEMORY_ERROR    :href="drivers/crypto/picoxcell_crypto.c7L636"1181=8L600"11class="line" name=7L581"11cla>118>                                    ref="+cod">crypdev"warlass="sref">giv_dev"warl(struref="+code=tfm"neass="sref">spacne *giv_dev(118>               *11c>                cryp class="sref">req->11c>                    hhhhhhhhhhhhhhhhbreak href="drivers/crypto/picoxcell_crypto.c7L591"1185=8L600"11class="line" name=7L585"11cla>118;
118>                crypSPA_STATUS_BLOCK_ERRORass="srefflareSSPA_STATUS_BLOCK_ERROR    :href="drivers/crypto/picoxcell_crypto.c7L636"1187=8L600"11class="line" name=7L587"11cla>11c>                    hhhhhhh         ref="+cod">crypdev"warlass="sref">giv_dev"warl(struref="+code=tfm"neass="sref">spacne *giv_dev(11c>                            hhhhhhhh         r class="commct inga>"blocks/a>orst iggered\n"an>
118>                cryp class="sref">req->119l                                    break href="drivers/crypto/picoxcell_crypto.c7L591"1191=8L600"11class="line" name=7L591"11cla>119>                             href="drivers/crypto/picoxcell_crypto.c8L626"1192=8L600"11class="line" name=7L592"11cla>119>               *1193             href="drivers/crypto/picoxcell_crypto.c8L626"1194=8L600"11class="line" name=7L594"11cla>119>
119>        ass="sref">spactasklet_schedul>(stru;spacne *1196119>            ref="+code=ctx"spin_unlock_irqrestorlass="sref">basec_in_unlock_irqrestorl(stru;spacne *spachw_lock(11c8     href="drivers/crypto/picoxcell_crypto.c8L626"1199=8L600"11class="line" name=7L599"11cla>11c>    href="drivers/crypto/picoxcell_crypto.c7L591"12id=8L600"12id=8s="line" name=7L599"12id=>12id    ic int ref="+codiv_offirqre reqspacc_reqspacirq(str, voi hhref="+code=req"devass="sref">giv_dev(12i>     href="drivers/crypto/picoxcell_crypto.c8L600"12i2=8L600"12ilass="line" name=7L592"12ila>120>            ct ass="sref">spacc_alg *spacne *ass="sref">spacc_alg *giv_dev(120>            ref="+code=ctx"uclass="line">spacuc>     ref="+code=crypc_alg"irq_sc iass="sref">spacc_algass="sref">spacne *120>
120>        spacc_algass="sref">spacne *120>            ref="+code=crypc_alg"process_doa>ass="sref">spacc_alg(spacne *120>
1208        return spacIRQ_HANDLED(120>     href="drivers/crypto/picoxcell_crypto.c8L626"121d=8L600"12class="line" name=8L610"12cla>121l
12c1    ic int voi href="+codv_len"c_aeadpacket_timeoulass="sref">spacc_aeadpacket_timeoul( giv_data(1212     href="drivers/crypto/picoxcell_crypto.c8L600"1213=8L600"12class="line" name=8L613"12cla>1213            ct ass="sref">spacc_alg *spacne *ass="sref">spacc_alg *giv_data(121>
121>        ass="sref">spacc_alg(spacne *121>     href="drivers/crypto/picoxcell_crypto.c8L626"12c7=8L600"12class="line" name=8L617"12cla>121>
121>    ic int spacc_aeadreq_submcl(spacc_reqreq-> href="drivers/crypto/picoxcell_crypto.c7L583"1219=8L600"12class="line" name=8L619"12cla>121>     href="drivers/crypto/picoxcell_crypto.c8L600"122d=8L600"12class="line" name=8L620"12cla>122l            ct crypto_alg *alg = req->req->tfm = <;__crt_alg;
122>    href="drivers/crypto/picoxcell_crypto.c8L626"1222=8L600"12class="line" name=8L622"12cla>1222            spac_ALG_NEALG_TYPE_AEAD = alg;
<;122>                spacc_aead_ead_submcl(struref="+code=tfm" class="sref">req->  href="drivers/crypto/picoxcell_crypto.c7L526"1224=8L600"12class="line" name=8L624"12cla>122>            elsohref="drivers/crypto/picoxcell_crypto.c7L526"1225=8L600"12class="line" name=8L625"12cla>122>                spacc_aead_blk"lubmcl(struref="+code=tfm" class="sref">req->  href="drivers/crypto/picoxcell_crypto.c7L526"1226=8L600"12class="line" name=8L626"12cla>12c>     href="drivers/crypto/picoxcell_crypto.c8L626"1227=8L600"12class="line" name=8L627"12cla>122>
12c>    ic int voi href="+codv_len"c_aeadc_aeadtompletlass="sref"w_cipc_aeadc_aeadtompletl( giv_data(12c>     href="drivers/crypto/picoxcell_crypto.c8L600"123d=8L600"12class="line" name=8L630"12cla>123l            ct ass="sref">spacc_alg *spacne *ass="sref">spacc_alg *giv_data(en12=en>123>        struct spacc_reqreq->, href="+code=tfm" mpass="sref">spac mp(12c>            gne> 123>            ref="+code=ctx"LIST_HEADass="sref">spacLIST_HEAD(struref="+code=tfm" ompletldass="sref"w_ciptompletld(123>
123>        basec_in_lock_irqsavl(stru;spacne *spachw_lock(12c6123>            ref="+code=ctx"listgsplice"inclass="sref">spaclistgsplice"incl(stru;spacne *1238        spacc_algspacne *123>        struass="sref">spacne *req124l                    ref="+code=req"mod_timelass="sref"w_cipmod_timel(stru;spacne *spacpacket_timeoul(124>    href="drivers/crypto/picoxcell_crypto.c8L626"1242=8L600"12class="line" name=7L642"12cla>1242            ref="+code=giv"spin_unlock_irqrestorlass="sref">basec_in_unlock_irqrestorl(stru;spacne *spachw_lock(1243
1244            ref="+code=giv"listgfor_eachgentrp_saf>ass="sref">spaclistgfor_eachgentrp_saf>(struref="+code=tfm" class="sref">req-> href="+codv_len" mpass="sref">spac mp(spaclist(124>                req->124>                req->req->  href="drivers/crypto/picoxcell_crypto.c7L526"1247=8L600"12class="line" name=7L647"12cla>124>             href="drivers/crypto/picoxcell_crypto.c8L626"12c8=8L600"12class="line" name=7L648"12cla>1248     href="drivers/crypto/picoxcell_crypto.c8L626"12c9=8L600"12class="line" name=7L649"12cla>124>    href="drivers/crypto/picoxcell_crypto.c7L591"125d=8L600"12class="line" name=7L650"12cla>12cl    #ifdefhref="+codENCRYO_ONFIG_PMass="srefflareS_ONFIG_PM    href="drivers/crypto/picoxcell_crypto.c7L591"1251=8L600"12class="line" name=7L651"12cla>1251    ic int giv_device);
< href="+code=req"devass="sref">giv_dev(1252     href="drivers/crypto/picoxcell_crypto.c8L600"1253=8L600"12class="line" name=7L653"12cla>1253            ct giv_platform_device);
< href="+code=req"pdevass="sref">giv_pdev(giv_ acplatform_device(giv_dev(12c>            ct ass="sref">spacc_alg *spacne *giv_platform_get_drvdata(giv_pdev(125;
125>            r class="comment"* De span>
125>    n class="comment"* De  eeeeeeee* We only supportlsc ndby mode. All we have to do is gato_fallclockstoan>
125>

12c>    n class="comment"* De  eeeeeeee* on again an>
126l    n class="comment"* De  eeeeeeee*pan>
126>            ref="+code=giv"tlk"disabl>ass="sref">spactlk"disabl>(spacne *spactlk(126}
126>      a>}
126>     href="drivers/crypto/picoxcell_crypto.c8L626"1265=8L600"12class="line" name=7L665"12cla>126;
1266    ic int giv_device);
< href="+code=req"devass="sref">giv_dev(126>     href="drivers/crypto/picoxcell_crypto.c7L579"1268=8L600"12class="line" name=7L568"12cla>12c>            ct giv_platform_device);
< href="+code=req"pdevass="sref">giv_pdev(giv_ acplatform_device(giv_dev(126>        struct ass="sref">spacc_alg *spacne *giv_platform_get_drvdata(giv_pdev(127l
1271      a>}
ass="sref">spactlk"enabl>(spacne *spactlk(12721273
12c>    ic int constuct 12c>            href="+code=__crsuspendass="sref"w_cipcuspend(127>            href="+code=__crresuL5ass="srefflareS csuL5(127>    } href="drivers/crypto/picoxcell_crypto.c7L526"1278=8L600"12class="line" name=7L578"12cla>127>    #endifhr class="comment"* De sp _ONFIG_PMe*pan>
127>    href="drivers/crypto/picoxcell_crypto.c7L591"128d=8L600"12class="line" name=7L580"12cla>128d    ic int ref="+codiv_offinl/a>ass="sref">spacinl/a>     ct ass="sref">spacc_alg *ass="sref">spacc_alg(giv_device);
< href="+code=req"devass="sref">giv_dev(128>     href="drivers/crypto/picoxcell_crypto.c8L600"1282=8L600"12class="line" name=7L582"12cla>128>            rn giv_dev(giv_platform_get_drvdata(giv_ acplatform_device(giv_dev(12c>     href="drivers/crypto/picoxcell_crypto.c8L626"1284=8L600"12class="line" name=7L584"12cla>128>
128;
reqgiv_device);
< href="+code=req"devass="sref">giv_dev(128>                12c>                    hhhhhhh                   char href="+code=req"bufass="sref"w_cipbuf(128 {
128>        struct ass="sref">spacc_alg *spacne *ass="sref">spacc_alg(giv_dev(129l
1291      a>}
"%u\n"an>
ass="sref">spacne *12921293
1294
reqbasec_alggiv_device);
< href="+code=req"devass="sref">giv_dev(129>        129>                reqgiv_lel(129>     href="drivers/crypto/picoxcell_crypto.c7L579"12c8=8L600"12class="line" name=7L598"12cla>129>            ct ass="sref">spacc_alg *spacne *ass="sref">spacc_alg(giv_dev(129>        strugne> 130l
1301      a>}
130>               *1303
1304            ref="+code=giv"t="+shass="sref"w_cipt="+sh(spacs="mp(ass="sref">spacne *spacsifo_sz(130;
130>            ref="+code=crypneass="sref">spacne *130>            ref="+code=ctx"writelass="srefflareSwritel(struref="+code=crypneass="sref">spacne *crypSPA_IRQ_CTRL_STAT_CNT_OFFSETass="srefflareSSPA_IRQ_CTRL_STAT_CNT_OFFSET(130>                   ref="+code=crypneass="sref">spacne *130>    href="drivers/crypto/picoxcell_crypto.c7L591"131d=8L600"13class="line" name=8L610"13cla>131l            rn giv_lel(13c1     href="drivers/crypto/picoxcell_crypto.c8L626"1312=8L600"13class="line" name=8L612"13cla>131>    ic int ref="+code=giv"DEVICE_ATTRass="srefflareSDEVICE_ATTR(struref="+code=crypsc i_irq_t="+shass="sref"w_cipsc i_irq_t="+sh(131>                basec_alg131>
131;
alg" clsass="sref">spacipseg" cls    []  h href="drivers/crypto/picoxcell_crypto.c7L579"13c6=8L600"13class="line" name=8L616"13cla>131>             href="drivers/crypto/picoxcell_crypto.c7L579"13c7=8L600"13class="line" name=8L617"13cla>131>                    href="+code=__crctrl131>                    href="+code=__crkey_offsass="sref">spackey_offs(131>                spaciv_offs(132l                    href="+code=__cr class="sref">alg = 132>                            href="+code=__crcra_=8L6ass="srefsasueqcra_=8L6(132>               *132>                spaccra_prioritp(132>                132>                132>                132>                    hhhhhhh              ref="+code=tfm"_ALG_NEALG_NEED_FALLBACKass="srefflareS_ALG_NEALG_NEED_FALLBACK(132>                            href="+code=__crcra_blocksizeass="srefflareSaea"blocksize(132>                alg133l                            href="+code=__crcra_typeass="srefflareSaea"type(en13=en>133>                            href="+code=__crcra_modul>ass="sref">spaccra_modul>(133>               *spaccra_ blkciphcr = 133>                algalg133>                    hhhhhhhhhhhhhhhhhref="+code=__crento.c7ass="sref">spacneto.c7 *spacc_alg133>                spacdeto.c7 *spacc_alg133>                133>                    hhhhhhh         href="+code=__crmax_keysizeass="srefflareSmax_keysize(133>                            hhhhhhhhhref="+code=__crivsizeass="srefflareSivsize(133>                134l                    hhhhhhhhhref="+code=__crcra_inclass="sref">spaccra_incl *spacc_alg134>                            href="+code=__crcra_exclass="sref">spaccra_excl *spacc_alg134>               *1343              href="drivers/crypto/picoxcell_crypto.c7L636"1344=8L600"13class="line" name=7L644"13cla>1344             href="drivers/crypto/picoxcell_crypto.c7L579"13c5=8L600"13class="line" name=7L645"13cla>134>                spackey_offs(134>                spaciv_offs(134>                    href="+code=__crctrl134>                    href="+code=__cr class="sref">alg = 134>                135l                    hhhhhhhhhref="+code=__crcra_ers/cr_=8L6ass="srefsasueqcra_ers/cr_=8L6(135>                            href="+code=__crcra_prioritpass="sref">spaccra_prioritp(135>               *135>                135>                    hhhhhhhhhhhhhhhhref="+code=tfm"_ALG_NEALG_ASYNCass="srefflareS_ALG_NEALG_ASYNC(135>                135>                alg135>                    hhhhhhh href="+code=__crcra_typeass="srefflareSaea"type(135>                            href="+code=__crcra_modul>ass="sref">spaccra_modul>(135>                spaccra_ blkciphcr = 136l                    hhhhhhhh    algalg136>                                spacneto.c7 *spacc_alg136>               *spacdeto.c7 *spacc_alg136>                136>                    hhhhhhhhhhhhhhhhhref="+code=__crmax_keysizeass="srefflareSmax_keysize(136>                136>                spaccra_incl *spacc_alg136>                    hhhhhhh href="+code=__crcra_exclass="sref">spaccra_excl *spacc_alg136>                      href="drivers/crypto/picoxcell_crypto.c7L636"13c9=8L600"13class="line" name=7L569"13cla>136>        stru  href="drivers/crypto/picoxcell_crypto.c7L636"137d=8L600"13class="line" name=7L570"13cla>137l             href="drivers/crypto/picoxcell_crypto.c7L579"1371=8L600"13class="line" name=7L571"13cla>137>                    href="+code=__crkey_offsass="sref">spackey_offs(137>               *spaciv_offs(137>                137>                    href="+code=__cr class="sref">alg = 137>                137>                137>                    hhhhhhh href="+code=__crcra_prioritpass="sref">spaccra_prioritp(137>                            href="+code=__crcra_s" class="srefflareSaea"s" cl(137>                138l                    hhhhhhhh    138>                            href="+code=__crcra_blocksizeass="srefflareSaea"blocksize(138>               *alg138>                138>                spaccra_modul>(138>                spaccra_ blkciphcr = 138>                algalg13c>                    hhhhhhh         href="+code=__crento.c7ass="sref">spacneto.c7 *spacc_alg138>                            hhhhhhhhhref="+code=__crdeto.c7ass="sref">spacdeto.c7 *spacc_alg138>                139l                    hhhhhhhh    139>                                139>               *139>                spaccra_incl *spacc_alg139>                spaccra_excl *spacc_alg139>        139>              href="drivers/crypto/picoxcell_crypto.c7L636"1397=8L600"13class="line" name=7L597"13cla>139>             href="drivers/crypto/picoxcell_crypto.c7L579"13c8=8L600"13class="line" name=7L598"13cla>139>                    href="+code=__crkey_offsass="sref">spackey_offs(139>                spaciv_offs(140l                    href="+code=__crctrl140>                    href="+code=__cr class="sref">alg = 140>               *140>                140>                spaccra_prioritp(140>                140>                140>                    hhhhhhh                 ref="+code=tfm"_ALG_NEALG_KERN_DRIVER_ONLYass="srefflareS_ALG_NEALG_KERN_DRIVER_ONLY(140>                   hhhhhhhhhhref="+code=__crcra_blocksizeass="srefflareSaea"blocksize(140>                alg141l                            href="+code=__crcra_typeass="srefflareSaea"type(141>                            href="+code=__crcra_modul>ass="sref">spaccra_modul>(141>               *spaccra_ blkciphcr = 141>                algalg141>                    hhhhhhhhhhhhhhhhhref="+code=__crento.c7ass="sref">spacneto.c7 *spacc_alg141>                spacdeto.c7 *spacc_alg141>                141>                        141>                              href="drivers/crypto/picoxcell_crypto.c7L636"1419=8L600"14class="line" name=8L619"14cla>141>                spaccra_incl *spacc_alg142l                    hhhhhhhhhref="+code=__crcra_exclass="sref">spaccra_excl *spacc_alg142>                      href="drivers/crypto/picoxcell_crypto.c7L636"14c2=8L600"14class="line" name=8L622"14cla>142>              href="drivers/crypto/picoxcell_crypto.c7L636"14c3=8L600"14class="line" name=8L623"14cla>142>             href="drivers/crypto/picoxcell_crypto.c7L579"1424=8L600"14class="line" name=8L624"14cla>142>                spackey_offs(142>                spaciv_offs(142>                142>                    href="+code=__cr class="sref">alg = 142>                            href="+code=__crcra_=8L6ass="srefsasueqcra_=8L6(142>                143l                            href="+code=__crcra_prioritpass="sref">spaccra_prioritp(en14=en>143>                            href="+code=__crcra_s" class="srefflareSaea"s" cl(143>               *143>                143>                    hhhhhhhhhref="+code=__crcra_blocksizeass="srefflareSaea"blocksize(143>                alg143>                143>                    hhhhhhh href="+code=__crcra_modul>ass="sref">spaccra_modul>(143>                            href="+code=__crcra_ blkciphcrass="sref">spaccra_ blkciphcr = 143>                algalg144l                    hhhhhhhh        href="+code=__crento.c7ass="sref">spacneto.c7 *spacc_alg144>                                    href="+code=__crdeto.c7ass="sref">spacdeto.c7 *spacc_alg144>               *144>                144>                    hhhhhhhhhhhhhhhhhref="+code=__crivsizeass="srefflareSivsize(144>                144>                spaccra_incl *spacc_alg144>                    hhhhhhhhhref="+code=__crcra_exclass="sref">spaccra_excl *spacc_alg144>                      href="drivers/crypto/picoxcell_crypto.c7L636"1449=8L600"14class="line" name=7L649"14cla>144>        stru  href="drivers/crypto/picoxcell_crypto.c7L636"145d=8L600"14class="line" name=7L650"14cla>145l             href="drivers/crypto/picoxcell_crypto.c7L579"1451=8L600"14class="line" name=7L651"14cla>145>                    href="+code=__crkey_offsass="sref">spackey_offs(145>               *spaciv_offs(145>                145>                    href="+code=__cr class="sref">alg = 145>                145>                145>                    hhhhhhh href="+code=__crcra_prioritpass="sref">spaccra_prioritp(145>                            href="+code=__crcra_s" class="srefflareSaea"s" cl(145>                146l                    hhhhhhhh    146>                            href="+code=__crcra_blocksizeass="srefflareSaea"blocksize(146>               *alg146>                146>                    hhhhhhhhhref="+code=__crcra_modul>ass="sref">spaccra_modul>(146>                spaccra_ blkciphcr = 146>                algalg146>                    hhhhhhh hhhhhhhhhref="+code=__crento.c7ass="sref">spacneto.c7 *spacc_alg146>                    hhhhhhh hhhhhhhhhref="+code=__crdeto.c7ass="sref">spacdeto.c7 *spacc_alg146>                147l                    hhhhhhhh    147>                              href="drivers/crypto/picoxcell_crypto.c7L636"1472=8L600"14class="line" name=7L572"14cla>147>               *spaccra_incl *spacc_alg147>                spaccra_excl *spacc_alg147>                      href="drivers/crypto/picoxcell_crypto.c7L636"1475=8L600"14class="line" name=7L575"14cla>147>              href="drivers/crypto/picoxcell_crypto.c7L636"1476=8L600"14class="line" name=7L576"14cla>147>             href="drivers/crypto/picoxcell_crypto.c7L579"1477=8L600"14class="line" name=7L577"14cla>147>                    href="+code=__crctrl147>                                    ref="+code=tfm"SPA_CTRL_HASHEALG_SHAass="srefflareSSPA_CTRL_HASHEALG_SHA(147>                spackey_offs(148l                    href="+code=__criv_offsass="sref">spaciv_offs(148>                    href="+code=__cr class="sref">alg = 148>               *148>                148>                spaccra_prioritp(148>                148>                14c>                    hhhhhhh         hhhhhhhhref="+code=tfm"_ALG_NEALG_KERN_DRIVER_ONLYass="srefflareS_ALG_NEALG_KERN_DRIVER_ONLY(148>                            href="+code=__crcra_blocksizeass="srefflareSaea"blocksize(148>                alg149l                    hhhhhhhhhref="+code=__crcra_typeass="srefflareSaea"type(149>                            href="+code=__crcra_modul>ass="sref">spaccra_modul>(149>               *spaccra_ ead = 149>                algalg149>                149>        spacneto.c7 *spacc_alg149>                spacdeto.c7 *spacc_alg149>                    hhhhhhh hhhhhhhhhref="+code=__crgs/cnto.c7ass="sref">spacgs/cnto.c7 *spacc_alg149>                    hhhhhhh hhhhhhhhhref="+code=__crivsizeass="srefflareSivsize(149>                150l                              href="drivers/crypto/picoxcell_crypto.c7L636"15i1=8L600"15ilass="line" name=7L591"15ila>150>                    hhhhhhhhhref="+code=__crcra_inclass="sref">spaccra_incl *spacc_alg150>               *spaccra_excl *spacc_alg150>                150>              href="drivers/crypto/picoxcell_crypto.c7L636"15i5=8L600"15ilass="line" name=7L595"15ila>150>             href="drivers/crypto/picoxcell_crypto.c7L579"15i6=8L600"15ilass="line" name=7L596"15ila>150>                150>                    hhhhhhh         ref="+code=tfm"SPA_CTRL_HASHEALG_SHA2class="lineflareSSPA_CTRL_HASHEALG_SHA25>     |href="drivers/crypto/picoxcell_crypto.c7L579"15i8=8L600"15ilass="line" name=7L598"15ila>150>                   hhhhhhhhh        ref="+code=tfm"SPA_CTRL_HASHEMODE_HMACass="srefflareSSPA_CTRL_HASHEMODE_HMAC(150>                spackey_offs(151l                    href="+code=__criv_offsass="sref">spaciv_offs(151>                    href="+code=__cr class="sref">alg = 151>               *151>                151>                    hhhhhhhhhref="+code=__crcra_prioritpass="sref">spaccra_prioritp(151>                151>                151>                        151>                            href="+code=__crcra_blocksizeass="srefflareSaea"blocksize(151>                alg152l                    hhhhhhhhhref="+code=__crcra_typeass="srefflareSaea"type(152>                    hhhhhhhhhref="+code=__crcra_modul>ass="sref">spaccra_modul>(152>               *spaccra_ ead = 152>                algalg152>                152>                spacneto.c7 *spacc_alg152>                spacdeto.c7 *spacc_alg152>                                    href="+code=__crgs/cnto.c7ass="sref">spacgs/cnto.c7 *spacc_alg152>                                    href="+code=__crivsizeass="srefflareSivsize(152>                _DIGEST_SIZEass="srefflareSSHA25>_DIGEST_SIZE(153l                              href="drivers/crypto/picoxcell_crypto.c7L636"1531=8L600"15=engine" class="sref">en15=en>153>                            href="+code=__crcra_inclass="sref">spaccra_incl *spacc_alg153>               *spaccra_excl *spacc_alg153>                153>              href="drivers/crypto/picoxcell_crypto.c7L636"1535=8L600"15class="line" name=7L635"15cla>153>             href="drivers/crypto/picoxcell_crypto.c7L579"1536=8L600"15class="line" name=7L636"15cla>153>                spackey_offs(153>                    href="+code=__criv_offsass="sref">spaciv_offs(153>                    href="+code=__crctrl153>                154l                    href="+code=__cr class="sref">alg = 154>                            href="+code=__crcra_=8L6ass="srefsasueqcra_=8L6(154>               *154>                spaccra_prioritp(154>                    hhhhhhhhhref="+code=__crcra_s" class="srefflareSaea"s" cl(154>                154>                154>                    hhhhhhhhhref="+code=__crcra_blocksizeass="srefflareSaea"blocksize(154>                    hhhhhhhhhref="+code=__crcra_ctxsizeass="srefflareSaea"ctxsize(alg154>                155l                    hhhhhhhhhref="+code=__crcra_modul>ass="sref">spaccra_modul>(155>                    hhhhhhhhhref="+code=__crcra_ eadass="sref">spaccra_ ead = 155>               *algalg155>                155>                            hhhhhhhhhref="+code=__crento.c7ass="sref">spacneto.c7 *spacc_alg155>                spacdeto.c7 *spacc_alg155>                spacgs/cnto.c7 *spacc_alg155>                    hhhhhhh hhhhhhhhhref="+code=__crivsizeass="srefflareSivsize(155>                            hhhhhhhhhref="+code=__crmaxauthsizeass="srefflareSmaxauthsize(155>                156l                    hhhhhhhhhref="+code=__crcra_inclass="sref">spaccra_incl *spacc_alg156>                            href="+code=__crcra_exclass="sref">spaccra_excl *spacc_alg156>               *156>              href="drivers/crypto/picoxcell_crypto.c7L636"1564=8L600"15class="line" name=7L664"15cla>156>             href="drivers/crypto/picoxcell_crypto.c7L579"1565=8L600"15class="line" name=7L665"15cla>156>                spackey_offs(156>                spaciv_offs(156>                    href="+code=__crctrl156>                    hhhhhhh hhhhhhhhref="+code=tfm"SPA_CTRL_HASHEALG_SHAass="srefflareSSPA_CTRL_HASHEALG_SHA(156>                alg = 157l                    hhhhhhhhhref="+code=__crcra_=8L6ass="srefsasueqcra_=8L6(157>                            href="+code=__crcra_ers/cr_=8L6ass="srefsasueqcra_ers/cr_=8L6(157>               *spaccra_prioritp(157>                157>                                            ref="+code=tfm"_ALG_NEALG_ASYNCass="srefflareS_ALG_NEALG_ASYNC(157>                157>                157>                        alg157>                            href="+code=__crcra_typeass="srefflareSaea"type(157>                spaccra_modul>(158l                            href="+code=__crcra_ eadass="sref">spaccra_ ead = 158>                                    href="+code=__crsetkeyass="sref">algalg158>               *158>                spacneto.c7 *spacc_alg158>                spacdeto.c7 *spacc_alg158>                spacgs/cnto.c7 *spacc_alg158>                15c>                    hhhhhhh         href="+code=__crmaxauthsizeass="srefflareSmaxauthsize(158>                              href="drivers/crypto/picoxcell_crypto.c7L636"1589=8L600"15class="line" name=7L589"15cla>158>                spaccra_incl *spacc_alg159l                    hhhhhhhhhref="+code=__crcra_exclass="sref">spaccra_excl *spacc_alg159>                      href="drivers/crypto/picoxcell_crypto.c7L636"1592=8L600"15class="line" name=7L592"15cla>159>              href="drivers/crypto/picoxcell_crypto.c7L636"1593=8L600"15class="line" name=7L593"15cla>159>             href="drivers/crypto/picoxcell_crypto.c7L579"1594=8L600"15class="line" name=7L594"15cla>159>                spackey_offs(159>        spaciv_offs(159>                159>                    hhhhhhh hhhhhhhhref="+code=tfm"SPA_CTRL_HASHEALG_SHA2class="lineflareSSPA_CTRL_HASHEALG_SHA25>     |href="drivers/crypto/picoxcell_crypto.c7L579"1598=8L600"15class="line" name=7L598"15cla>159>                    hhhhhhh hhhhhhhhref="+code=tfm"SPA_CTRL_HASHEMODE_HMACass="srefflareSSPA_CTRL_HASHEMODE_HMAC(159>                alg = 160l                            href="+code=__crcra_=8L6ass="srefsasueqcra_=8L6(160>                    hhhhhhhhhref="+code=__crcra_ers/cr_=8L6ass="srefsasueqcra_ers/cr_=8L6(160>               *spaccra_prioritp(160>                160>                                            ref="+code=tfm"_ALG_NEALG_ASYNCass="srefflareS_ALG_NEALG_ASYNC(160>                160>                160>                    hhhhhhh href="+code=__crcra_ctxsizeass="srefflareSaea"ctxsize(alg160>                   hhhhhhhhhhref="+code=__crcra_typeass="srefflareSaea"type(160>                spaccra_modul>(161l                    hhhhhhhhhref="+code=__crcra_ eadass="sref">spaccra_ ead = 161>                            hhhhhhhhhref="+code=__crsetkeyass="sref">algalg161>               *161>                spacneto.c7 *spacc_alg161>                    hhhhhhhhhhhhhhhhhref="+code=__crdeto.c7ass="sref">spacdeto.c7 *spacc_alg161>                spacgs/cnto.c7 *spacc_alg161>                161>                        _DIGEST_SIZEass="srefflareSSHA25>_DIGEST_SIZE(161>                              href="drivers/crypto/picoxcell_crypto.c7L636"1619=8L600"16class="line" name=8L619"16cla>161>                spaccra_incl *spacc_alg162l                    hhhhhhhhhref="+code=__crcra_exclass="sref">spaccra_excl *spacc_alg162>                      href="drivers/crypto/picoxcell_crypto.c7L636"16c2=8L600"16class="line" name=8L622"16cla>162>              href="drivers/crypto/picoxcell_crypto.c7L636"16c3=8L600"16class="line" name=8L623"16cla>162>             href="drivers/crypto/picoxcell_crypto.c7L579"1624=8L600"16class="line" name=8L624"16cla>162>                spackey_offs(162>                spaciv_offs(162>                162>                                    ref="+code=tfm"SPA_CTRL_HASHEALG_MD5ass="srefflareSSPA_CTRL_HASHEALG_MD5(162>                    href="+code=__cr class="sref">alg = 162>                163l                            href="+code=__crcra_ers/cr_=8L6ass="srefsasueqcra_ers/cr_=8L6(en16=en>163>                            href="+code=__crcra_prioritpass="sref">spaccra_prioritp(163>               *163>                163>                                            ref="+code=tfm"_ALG_NEALG_KERN_DRIVER_ONLYass="srefflareS_ALG_NEALG_KERN_DRIVER_ONLY(163>                163>                alg163>                    hhhhhhhhhref="+code=__crcra_typeass="srefflareSaea"type(163>                    hhhhhhhhhref="+code=__crcra_modul>ass="sref">spaccra_modul>(163>                spaccra_ ead = 164l                        algalg164>                                164>               *spacneto.c7 *spacc_alg164>                spacdeto.c7 *spacc_alg164>                    hhhhhhhh    spacgs/cnto.c7 *spacc_alg164>                164>                164>                    hhhhhhhh  href="drivers/crypto/picoxcell_crypto.c7L636"1648=8L600"16class="line" name=7L648"16cla>164>                    hhhhhhhhhref="+code=__crcra_inclass="sref">spaccra_incl *spacc_alg164>                spaccra_excl *spacc_alg165l                      href="drivers/crypto/picoxcell_crypto.c7L636"1651=8L600"16class="line" name=7L651"16cla>165>              href="drivers/crypto/picoxcell_crypto.c7L636"1652=8L600"16class="line" name=7L652"16cla>165>    };href="drivers/crypto/picoxcell_crypto.c7L636"1653=8L600"16class="line" name=7L653"16cla>165>    href="drivers/crypto/picoxcell_crypto.c7L636"1654=8L600"16class="line" name=7L654"16cla>165>    static ct alg165>             href="drivers/crypto/picoxcell_crypto.c7L579"1656=8L600"16class="line" name=7L656"16cla>165>                spackey_offs(165>                    href="+code=__criv_offsass="sref">spaciv_offs(165>                    href="+code=__crctrl165>                166l                    href="+code=__cr class="sref">alg = 166>                            href="+code=__crcra_=8L6ass="srefsasueqcra_=8L6(166>               *166>                spaccra_prioritp(166>                    hhhhhhhhhref="+code=__crcra_s" class="srefflareSaea"s" cl(166>                166>                166>                    hhhhhhhhhref="+code=__crcra_blocksizeass="srefflareSaea"blocksize(166>                    hhhhhhh href="+code=__crcra_ctxsizeass="srefflareSaea"ctxsize(alg166>                167l                    hhhhhhhhhref="+code=__crcra_modul>ass="sref">spaccra_modul>(167>                            href="+code=__crcra_ blkciphcrass="sref">spaccra_ blkciphcr = 167>               *algalg167>                spacneto.c7 *spacc_alg167>                                    href="+code=__crdeto.c7ass="sref">spacdeto.c7 *spacc_alg167>                167>                167>                        167>                              href="drivers/crypto/picoxcell_crypto.c7L636"1679=8L600"16class="line" name=7L579"16cla>167>                spaccra_incl *spacc_alg168l                            href="+code=__crcra_exclass="sref">spaccra_excl *spacc_alg168>                      href="drivers/crypto/picoxcell_crypto.c7L636"1682=8L600"16class="line" name=7L582"16cla>168>              href="drivers/crypto/picoxcell_crypto.c7L636"1683=8L600"16class="line" name=7L583"16cla>168>    };href="drivers/crypto/picoxcell_crypto.c7L636"1684=8L600"16class="line" name=7L584"16cla>168>    href="drivers/crypto/picoxcell_crypto.c7L636"1685=8L600"16class="line" name=7L585"16cla>168>    #ifdefhref="+code=tfm"_ONFIG_OFass="srefflareS_ONFIG_OF    href="drivers/crypto/picoxcell_crypto.c7L636"1686=8L600"16class="line" name=7L586"16cla>168>    static const ct spacof"device_id     ref="+code=crypc_alg16c>            { href="+code=__crcompatibleass="srefflareScompatible(168>            { href="+code=__crcompatibleass="srefflareScompatible(168>            {}href="drivers/crypto/picoxcell_crypto.c7L636"169d=8L600"16class="line" name=7L590"16cla>169l    };href="drivers/crypto/picoxcell_crypto.c7L636"1691=8L600"16class="line" name=7L591"16cla>169>    #elsehr class="commcomment">/* _ONFIG_OF */an>
169>    #def na ref="+code=crypc_alg169>    #endifhr class="commcomment">/* _ONFIG_OF */an>
169>    href="drivers/crypto/picoxcell_crypto.c7L636"1695=8L600"16class="line" name=7L595"16cla>169>    static ref="+code=crypboolass="srefflareSbool     ref="+code=crypc_alg169>                169>     href="drivers/crypto/picoxcell_crypto.c7L579"1698=8L600"16class="line" name=7L598"16cla>169>            const ct spacplatform"device_id     *ref="+code=crypplatidass="sref">spacplatid = spacplatform"get"device_id    href="+code=cryppdevass="srefflareSpdev(169>    href="drivers/crypto/picoxcell_crypto.c7L636"17id=8L600"17id=8s="line" name=7L599"17id=>170l            ifhhref="+code=crypplatidass="sref">spacplatid = spacplatid = <->href="+code=cryp=8L6ass="srefsasueq=8L6(170>                    return ref="+code=crypt 170>    href="drivers/crypto/picoxcell_crypto.c7L636"17i3=8L600"17ilass="line" name=7L593"17ila>170>    #ifdefhref="+code=tfm"_ONFIG_OFass="srefflareS_ONFIG_OF    href="drivers/crypto/picoxcell_crypto.c7L636"17i4=8L600"17ilass="line" name=7L594"17ila>170>            ifhhref="+code=crypof"device_is_compatibleass="srefflareSof"device_is_compatible    href="+code=cryppdevass="srefflareSpdev(170>                170>    #endifhr class="commcomment">/* _ONFIG_OF */an>
170>    href="drivers/crypto/picoxcell_crypto.c7L636"17i8=8L600"17ilass="line" name=7L598"17ila>170>            return ref="+code=crypfalseass="srefflareSfalse    ;href="drivers/crypto/picoxcell_crypto.c7L636"17i9=8L600"17ilass="line" name=7L599"17ila>170>    }href="drivers/crypto/picoxcell_crypto.c7L636"171d=8L600"17class="line" name=8L610"17cla>171l    href="drivers/crypto/picoxcell_crypto.c7L636"1711=8L600"17class="line" name=8L611"17cla>171>    static in href="+code=crypc_alg"probeass="srefflareSc_alg171>     href="drivers/crypto/picoxcell_crypto.c7L579"1713=8L600"17class="line" name=8L613"17cla>171>            in href="+code=crypiass="srefflareSi(spacerr(spacret = 171>            ct 171>            ct 171>                171>            ifhh!ref="+code=crypeng naass="srefflareSeng na     href="drivers/crypto/picoxcell_crypto.c7L636"17c8=8L600"17class="line" name=7L598"171la>171>                    return -ref="+code=crypENOMEMass="srefflareSENOMEM    ;href="drivers/crypto/picoxcell_crypto.c7L636"17c9=8L600"17class="line" name=8L619"17cla>171>    href="drivers/crypto/picoxcell_crypto.c7L636"172d=8L600"17class="line" name=8L620"17cla>172l            ifhhref="+code=crypc_alg172>                    ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypmax_ctxsass="srefflareSmax_ctxs             href="+code=tfm"SPACC__ALG_NEIPSEC_MAX_CTXSass="srefflareSSPACC__ALG_NEIPSEC_MAX_CTXS    ;href="drivers/crypto/picoxcell_crypto.c7L636"17c2=8L600"17class="line" name=8L622"17cla>172>               *172>                172>                172>                172>                172>            } elsehifhhref="+code=crypc_alg172>                    ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypmax_ctxsass="srefflareSmax_ctxs             href="+code=tfm"SPACC__ALG_NEL2_MAX_CTXSass="srefflareSSPACC__ALG_NEL2_MAX_CTXS    ;href="drivers/crypto/picoxcell_crypto.c7L636"17c9=8L600"17class="line" name=8L629"17cla>172>                173l                    ref="+code=crypeng naass="srefflareSeng na    ->href="+code=cryphash_pg_szass="srefflareShash_pg_sz           href="+code=tfm"SPACC__ALG_NEL2_HASHEPG_SZass="srefflareSSPACC__ALG_NEL2_HASHEPG_SZ    ;href="drivers/crypto/picoxcell_crypto.c7L636"1731=8L600"17=engine" class="sref">en17=en>173>                    ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypfifo_szass="srefflareSfifo_sz              href="+code=tfm"SPACC__ALG_NEL2_FIFO_SZass="srefflareSSPACC__ALG_NEL2_FIFO_SZ    ;href="drivers/crypto/picoxcell_crypto.c7L636"1732=8L600"17class="line" name=7L632"17cla>173>               *173>                173>            } elseh href="drivers/crypto/picoxcell_crypto.c7L579"1735=8L600"17class="line" name=7L635"17cla>173>                173>            }href="drivers/crypto/picoxcell_crypto.c7L636"1737=8L600"17class="line" name=7L637"17cla>173>    href="drivers/crypto/picoxcell_crypto.c7L636"1738=8L600"17class="line" name=7L638"17cla>173>            ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypn8L6ass="srefsasueq=8L6(173>    href="drivers/crypto/picoxcell_crypto.c7L636"174d=8L600"17class="line" name=7L640"17cla>174l            ref="+code=crypmemass="srefflareSmem(174>            ref="+code=crypirqass="srefflareSirq    a href="+code=crypplatform"get"resourceass="srefflareSplatform"get"resource    href="+code=cryppdevass="srefflareSpdev(174>            ifhh!ref="+code=crypmemass="srefflareSmem(174>                spacdev_err    h;174>                    return -ref="+code=crypENXIOass="srefflareSENXIO    ;href="drivers/crypto/picoxcell_crypto.c7L636"17c5=8L600"17class="line" name=7L645"17cla>174>            }href="drivers/crypto/picoxcell_crypto.c7L636"1746=8L600"17class="line" name=7L646"17cla>174>    href="drivers/crypto/picoxcell_crypto.c7L636"1747=8L600"17class="line" name=7L647"17cla>174>            ifhh!ref="+code=crypdevm_request_mem_regionass="srefflareSdevm_request_mem_region    h;spacctarl(174>                    hhhhhhhh         174>                175l    href="drivers/crypto/picoxcell_crypto.c7L636"1751=8L600"17class="line" name=7L651"17cla>175>            ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypreglass="srefflareSregl      href="+code=crypdevm_ioremapass="srefflareSdevm_ioremap    h;spacctarl(175>            ifhh!ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypreglass="srefflareSregl    )h href="drivers/crypto/picoxcell_crypto.c7L579"1753=8L600"17class="line" name=7L653"17cla>175>                spacdev_err    h;175>                    return -ref="+code=crypENOMEMass="srefflareSENOMEM    ;href="drivers/crypto/picoxcell_crypto.c7L636"1755=8L600"17class="line" name=7L655"17cla>175>            }href="drivers/crypto/picoxcell_crypto.c7L636"1756=8L600"17class="line" name=7L656"17cla>175>    href="drivers/crypto/picoxcell_crypto.c7L636"1757=8L600"17class="line" name=7L657"17cla>175>            ifhhref="+code=crypdevm_request_irqass="srefflareSdevm_request_irq    h;spacctarl(175>                             175>                spacdev_err    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypdevass="srefflareSdev(176l                    return -ref="+code=crypEBUSYass="srefflareSEBUSY    ;href="drivers/crypto/picoxcell_crypto.c7L636"1761=8L600"17class="line" name=7L661"17cla>176>            }href="drivers/crypto/picoxcell_crypto.c7L636"1762=8L600"17class="line" name=7L662"17cla>176>    href="drivers/crypto/picoxcell_crypto.c7L636"1763=8L600"17class="line" name=7L663"17cla>176>            ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypdevass="srefflareSdev(176>            ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypciphcr_ctx_baseass="srefflareSciphcr_ctx_base      href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypreglass="srefflareSregl     +href="+code=tfm"SPA_CIPHEKEY_BASE_REG_OFFSETass="srefflareSSPA_CIPHEKEY_BASE_REG_OFFSET(176>            ref="+code=crypeng naass="srefflareSeng na    ->href="+code=cryphash_key_baseass="srefflareShash_key_base        href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypreglass="srefflareSregl     +href="+code=tfm"SPA_HASHEKEY_BASE_REG_OFFSETass="srefflareSSPA_HASHEKEY_BASE_REG_OFFSET(176>    href="drivers/crypto/picoxcell_crypto.c7L636"1767=8L600"17class="line" name=7L667"17cla>176>            ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypreq_poolass="srefflareSreq_pool      href="+code=crypdmam_poolptoeat6ass="srefsasueqdmam_poolptoeat6    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypn8L6ass="srefsasueq=8L6(176>                    ref="+code=crypMAX_DDT_LENass="srefflareSMAX_DDT_LEN     *hsizeofhct spacc_alg176>            ifhh!ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypreq_poolass="srefflareSreq_pool     href="drivers/crypto/picoxcell_crypto.c7L636"177d=8L600"17class="line" name=7L570"17cla>177l                    return -ref="+code=crypENOMEMass="srefflareSENOMEM    ;href="drivers/crypto/picoxcell_crypto.c7L636"1771=8L600"17class="line" name=7L571"17cla>177>    href="drivers/crypto/picoxcell_crypto.c7L636"1772=8L600"17class="line" name=7L572"17cla>177>            ref="+code=crypc_in_lock_inclass="sref">spacc_in_lock_incl    h;177>    href="drivers/crypto/picoxcell_crypto.c7L636"1774=8L600"17class="line" name=7L574"17cla>177>            ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypclkass="srefflareSclk      href="+code=crypclk"getass="srefflareSclk"get    h;177>            ifhhref="+code=crypIS_ERRass="srefflareSIS_ERR    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypclkass="srefflareSclk     )h href="drivers/crypto/picoxcell_crypto.c7L579"1776=8L600"17class="line" name=7L576"17cla>177>                spacdev_info    h;177>                    ref="+code=crypdevice_remove_fileass="srefflareSdevice_remove_file    h;spacdev_attr_stat177>                    return ref="+code=crypPTR_ERRass="srefflareSPTR_ERR    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypclkass="srefflareSclk     ;href="drivers/crypto/picoxcell_crypto.c7L636"1779=8L600"17class="line" name=7L579"17cla>177>            }href="drivers/crypto/picoxcell_crypto.c7L636"178d=8L600"17class="line" name=7L580"17cla>178l    href="drivers/crypto/picoxcell_crypto.c7L636"1781=8L600"17class="line" name=7L581"17cla>178>            ifhhref="+code=crypclk"cnableass="srefflareSclk"cnable    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypclkass="srefflareSclk     )h href="drivers/crypto/picoxcell_crypto.c7L579"1782=8L600"17class="line" name=7L582"17cla>178>               *spacdev_info    h;178>                178>                    return -ref="+code=crypEIOass="srefflareSEIO    ;href="drivers/crypto/picoxcell_crypto.c7L636"1785=8L600"17class="line" name=7L585"17cla>178>            }href="drivers/crypto/picoxcell_crypto.c7L636"1786=8L600"17class="line" name=7L586"17cla>178>    href="drivers/crypto/picoxcell_crypto.c7L636"1787=8L600"17class="line" name=7L587"17cla>178>            ref="+code=cryperrass="sref">spacerr(spacdev_attr_stat178>            ifhhref="+code=cryperrass="sref">spacerr(178>                179l                    ref="+code=crypclk"putass="srefflareSclk"put    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypclkass="srefflareSclk     ;href="drivers/crypto/picoxcell_crypto.c7L636"1791=8L600"17class="line" name=7L591"17cla>179>                    return ref="+code=cryperrass="sref">spacerr(1792            }href="drivers/crypto/picoxcell_crypto.c7L636"1793=8L600"17class="line" name=7L593"17cla>179>    href="drivers/crypto/picoxcell_crypto.c7L636"1794=8L600"17class="line" name=7L594"17cla>179>    href="drivers/crypto/picoxcell_crypto.c7L636"1795=8L600"17class="line" name=7L595"17cla>179>            r class="commcomment">/*an>
179>    r class="commcomment">         * Use lasIRQ t="+shold of 50% as a defaucl. This seems to be lan>
179>    r class="commcomment">         * oeasonable trade off of lat6ncy against t="oughput but clasbe  >
179>    r class="commcomment">         * changed at runtime.  >
179>    r class="commcomment">         */an>
180l            ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypstatspacstat180>    href="drivers/crypto/picoxcell_crypto.c7L636"18i2=8L600"18ilass="line" name=7L592"18ila>1802            r class="commcomment">/*an>
180>    r class="commcomment">         * Configure the in errupts. We only use the STAT_CNT in errupt as we  >
180>    r class="commcomment">         * only submit a new packet for processing when we complete laother in  >
180>    r class="commcomment">         * the queue. This minimizes time spent in the in errupt handler.  >
180>    r class="commcomment">         */an>
180>            ref="+code=crypwritelass="srefflareSwritel    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypstatspacstat180>                   ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypreglass="srefflareSregl     +href="+code=tfm"SPA_IRQ_CTRL_REG_OFFSETass="srefflareSSPA_IRQ_CTRL_REG_OFFSET     ;href="drivers/crypto/picoxcell_crypto.c7L636"18i9=8L600"18ilass="line" name=7L599"18ila>1809            ref="+code=crypwritelass="srefflareSwritel    href="+code=crypSPA_IRQ_EN_STAT_ENass="srefflareSSPA_IRQ_EN_STAT_EN     |href="+code=tfm"SPA_IRQ_EN_GLBL_ENass="srefflareSSPA_IRQ_EN_GLBL_EN(181l                   ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypreglass="srefflareSregl     +href="+code=tfm"SPA_IRQ_EN_REG_OFFSETass="srefflareSSPA_IRQ_EN_REG_OFFSET     ;href="drivers/crypto/picoxcell_crypto.c7L636"1811=8L600"18class="line" name=8L611"18cla>181>    href="drivers/crypto/picoxcell_crypto.c7L636"1812=8L600"18class="line" name=8L612"18cla>181>            ref="+code=crypcetup_timerass="sref">spaccetup_timer    h;181>                181>    href="drivers/crypto/picoxcell_crypto.c7L636"18c5=8L600"18class="line" name=8L615"18cla>181>            ref="+code=crypINIT_LIST_HEADass="srefflareSINIT_LIST_HEAD    h;181>            ref="+code=crypINIT_LIST_HEADass="srefflareSINIT_LIST_HEAD    h;spaccompleted     ;href="drivers/crypto/picoxcell_crypto.c7L636"1817=8L600"18class="line" name=8L617"18cla>181>            ref="+code=crypINIT_LIST_HEADass="srefflareSINIT_LIST_HEAD    h;181>            ref="+code=crypeng naass="srefflareSeng na    ->href="+code=crypin1819            ref="+code=cryptasklet_inclass="sref">spactasklet_incl    h;spaccomplete(spacc_alg182l                         (unsigned long)ref="+code=crypeng naass="srefflareSeng na     ;href="drivers/crypto/picoxcell_crypto.c7L636"18c1=8L600"18class="line" name=8L621"18cla>182>    href="drivers/crypto/picoxcell_crypto.c7L636"18c2=8L600"18class="line" name=8L622"18cla>182>            ref="+code=crypplatform"set"drvdataass="srefflareSplatform"set"drvdata    href="+code=cryppdevass="srefflareSpdev(182>    href="drivers/crypto/picoxcell_crypto.c7L636"18c4=8L600"18class="line" name=8L624"18cla>182>            ref="+code=crypINIT_LIST_HEADass="srefflareSINIT_LIST_HEAD    h;182>            for href="+code=crypiass="srefflareSi(182>                182>                    ref="+code=cryperrass="sref">spacerr(spacco.c7L_register"_cl    h;spac_cl     ;href="drivers/crypto/picoxcell_crypto.c7L636"18c8=8L600"18class="line" name=8L628"18cla>182>                    ifhh!ref="+code=cryperrass="sref">spacerr(182>                183l                                          ;en18=en>183>                            ref="+code=crypretass="sref">spacret = 183>               *183>                spacerr(183>                            ref="+code=crypdev_errass="sref">spacdev_err    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypdevass="srefflareSdev(183>                spac_cl    href="+code=__crcra_=8L6ass="srefsasueqcra_=8L6     ;href="drivers/crypto/picoxcell_crypto.c7L636"1836=8L600"18class="line" name=7L636"18cla>183>                183>                            ref="+code=crypdev_dblass="sref">spacdev_dbl    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypdevass="srefflareSdev(183>                    hhhhhhhh        ref="+code=crypeng naass="srefflareSeng na    ->href="+code=cryp_cllass="srefflareS_cll    [ref="+code=crypiass="srefflareSi(spac_cl    href="+code=__crcra_=8L6ass="srefsasueqcra_=8L6     ;href="drivers/crypto/picoxcell_crypto.c7L636"1839=8L600"18class="line" name=7L639"18cla>183>            }href="drivers/crypto/picoxcell_crypto.c7L636"184d=8L600"18class="line" name=7L640"18cla>184l    href="drivers/crypto/picoxcell_crypto.c7L636"1841=8L600"18class="line" name=7L641"18cla>184>            return ref="+code=crypretass="sref">spacret = <;href="drivers/crypto/picoxcell_crypto.c7L636"1842=8L600"18class="line" name=7L642"18cla>184>    }href="drivers/crypto/picoxcell_crypto.c7L636"1843=8L600"18class="line" name=7L643"18cla>184>    href="drivers/crypto/picoxcell_crypto.c7L636"1844=8L600"18class="line" name=7L644"18cla>184>    static in href="+code=crypc_alg"removeass="sref">spacc_alg184>     href="drivers/crypto/picoxcell_crypto.c7L579"1846=8L600"18class="line" name=7L646"18cla>184>            ct spacc_alg"_cl     *ref="+code=cryp_class="sref">spac_cl    , *ref="+code=crypnextass="sref">spacnext = <;href="drivers/crypto/picoxcell_crypto.c7L636"1847=8L600"18class="line" name=7L647"18cla>184>            ct 184>    href="drivers/crypto/picoxcell_crypto.c7L636"1849=8L600"18class="line" name=7L649"18cla>1849            ref="+code=crypdel_timer_syncass="srefflareSdel_timer_sync    h;185l            ref="+code=crypdevice_remove_fileass="srefflareSdevice_remove_file    h;spacdev_attr_stat185>    href="drivers/crypto/picoxcell_crypto.c7L636"1852=8L600"18class="line" name=7L652"18cla>185>            ref="+code=cryplist_for_each_entry_safeass="srefflareSlist_for_each_entry_safe    href="+code=cryp_class="sref">spac_cl    , ref="+code=crypnextass="sref">spacnext = <,h;185>                spac_cl    ->href="+code=crypentryass="srefflareSentry(185>                    ref="+code=crypto.c7L_unregister"_class="sref">spacco.c7L_unregister"_cl    h;spac_cl    ->href="+code=cryp_class="sref">spac_cl     ;href="drivers/crypto/picoxcell_crypto.c7L636"1855=8L600"18class="line" name=7L655"18cla>185>            }href="drivers/crypto/picoxcell_crypto.c7L636"1856=8L600"18class="line" name=7L656"18cla>185>    href="drivers/crypto/picoxcell_crypto.c7L636"1857=8L600"18class="line" name=7L657"18cla>185>            ref="+code=crypclk"disableass="srefflareSclk"disable    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypclkass="srefflareSclk     ;href="drivers/crypto/picoxcell_crypto.c7L636"1858=8L600"18class="line" name=7L658"18cla>185>            ref="+code=crypclk"putass="srefflareSclk"put    href="+code=crypeng naass="srefflareSeng na    ->href="+code=crypclkass="srefflareSclk     ;href="drivers/crypto/picoxcell_crypto.c7L636"1859=8L600"18class="line" name=7L659"18cla>185>    href="drivers/crypto/picoxcell_crypto.c7L636"186d=8L600"18class="line" name=7L660"18cla>186l            return 0;href="drivers/crypto/picoxcell_crypto.c7L636"1861=8L600"18class="line" name=7L661"18cla>186>    }href="drivers/crypto/picoxcell_crypto.c7L636"1862=8L600"18class="line" name=7L662"18cla>186>    href="drivers/crypto/picoxcell_crypto.c7L636"1863=8L600"18class="line" name=7L663"18cla>186>    static const ct spacplatform"device_id     ref="+code=crypc_alg"id_tableass="srefflareSc_alg186>            {hr class="commct inga>"xcelchip,s_alg-ipsec"an>
186>            {hr class="commct inga>"xcelchip,s_alg-l2"an>
1866            {h}href="drivers/crypto/picoxcell_crypto.c7L636"1867=8L600"18class="line" name=7L667"18cla>186>    };href="drivers/crypto/picoxcell_crypto.c7L636"1868=8L600"18class="line" name=7L568"18cla>186>    href="drivers/crypto/picoxcell_crypto.c7L636"18c9=8L600"18class="line" name=7L569"18cla>186>    static ct spacplatform"drs/cr     ref="+code=crypc_alg"drs/crass="sref">spacc_alg"drs/cr      h href="drivers/crypto/picoxcell_crypto.c7L579"187d=8L600"18class="line" name=7L570"18cla>187l            href="+code=__crprobeass="srefflareSprobe               href="+code=crypc_alg1871            href="+code=__crremoveass="sref">spacremove              href="+code=crypc_algspacc_alg187>            href="+code=__crdrs/crass="sref">spacdrs/cr              h href="drivers/crypto/picoxcell_crypto.c7L579"1873=8L600"18class="line" name=7L573"18cla>187>                187>    #ifdefhref="+code=crypCONFIG_PMass="srefflareSCONFIG_PM    href="drivers/crypto/picoxcell_crypto.c7L636"1875=8L600"18class="line" name=7L575"18cla>187>                187>    #endif r class="commcomment">/* CONFIG_PM */an>
187>                    href="+code=__crof_match_tableass="srefflareSof_match_table      href="+code=crypc_alg187>            },href="drivers/crypto/picoxcell_crypto.c7L636"1879=8L600"18class="line" name=7L579"18cla>187>            href="+code=__crid_tableass="srefflareSid_table            href="+code=crypc_alg188l    };href="drivers/crypto/picoxcell_crypto.c7L636"1881=8L600"18class="line" name=7L581"18cla>188>    href="drivers/crypto/picoxcell_crypto.c7L636"1882=8L600"18class="line" name=7L582"18cla>188>    ref="+code=crypmodule_platform"drs/crass="sref">spacmodule_platform"drs/cr    href="+code=crypc_alg"drs/crass="sref">spacc_alg"drs/cr     ;href="drivers/crypto/picoxcell_crypto.c7L636"1883=8L600"18class="line" name=7L583"18cla>188>    href="drivers/crypto/picoxcell_crypto.c7L636"1884=8L600"18class="line" name=7L584"18cla>188>    ref="+code=crypMODULE_LICENSEass="sref">spacMODULE_LICENSE    hr class="commct inga>"GPL"an>
188>    ref="+code=crypMODULE_AUTHORass="srefflareSMODULE_AUTHOR    hr class="commct inga>"Jamie Iles"an>
188>    
The original LXR software by the ref="drivhttp://sourceforge.net/projects/lxra>LXR community(lxr@" nux.no h
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