linux/lib/swiotlb.c
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   1/*
   2 * Dynamic DMA mapping support.
   3 *
   4 * This implementation is a fallback for platforms that do not support
   5 * I/O TLBs (aka DMA address translation hardware).
   6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
   7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
   8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
   9 *      David Mosberger-Tang <davidm@hpl.hp.com>
  10 *
  11 * 03/05/07 davidm      Switch from PCI-DMA to generic device DMA API.
  12 * 00/12/13 davidm      Rename to swiotlb.c and add mark_clean() to avoid
  13 *                      unnecessary i-cache flushing.
  14 * 04/07/.. ak          Better overflow handling. Assorted fixes.
  15 * 05/09/10 linville    Add support for syncing ranges, support syncing for
  16 *                      DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17 * 08/12/11 beckyb      Add highmem support
  18 */
  19
  20#include <linux/cache.h>
  21#include <linux/dma-mapping.h>
  22#include <linux/mm.h>
  23#include <linux/export.h>
  24#include <linux/spinlock.h>
  25#include <linux/string.h>
  26#include <linux/swiotlb.h>
  27#include <linux/pfn.h>
  28#include <linux/types.h>
  29#include <linux/ctype.h>
  30#include <linux/highmem.h>
  31#include <linux/gfp.h>
  32
  33#include <asm/io.h>
  34#include <asm/dma.h>
  35#include <asm/scatterlist.h>
  36
  37#include <linux/init.h>
  38#include <linux/bootmem.h>
  39#include <linux/iommu-helper.h>
  40
  41#define OFFSET(val,align) ((unsigned long)      \
  42                           ( (val) & ( (align) - 1)))
  43
  44#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  45
  46/*
  47 * Minimum IO TLB size to bother booting with.  Systems with mainly
  48 * 64bit capable cards will only lightly use the swiotlb.  If we can't
  49 * allocate a contiguous 1MB, we're probably in trouble anyway.
  50 */
  51#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  52
  53int swiotlb_force;
  54
  55/*
  56 * Used to do a quick range check in swiotlb_tbl_unmap_single and
  57 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
  58 * API.
  59 */
  60static char *io_tlb_start, *io_tlb_end;
  61
  62/*
  63 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
  64 * io_tlb_end.  This is command line adjustable via setup_io_tlb_npages.
  65 */
  66static unsigned long io_tlb_nslabs;
  67
  68/*
  69 * When the IOMMU overflows we return a fallback buffer. This sets the size.
  70 */
  71static unsigned long io_tlb_overflow = 32*1024;
  72
  73static void *io_tlb_overflow_buffer;
  74
  75/*
  76 * This is a free list describing the number of free entries available from
  77 * each index
  78 */
  79static unsigned int *io_tlb_list;
  80static unsigned int io_tlb_index;
  81
  82/*
  83 * We need to save away the original address corresponding to a mapped entry
  84 * for the sync operations.
  85 */
  86static phys_addr_t *io_tlb_orig_addr;
  87
  88/*
  89 * Protect the above data structures in the map and unmap calls
  90 */
  91static DEFINE_SPINLOCK(io_tlb_lock);
  92
  93static int late_alloc;
  94
  95static int __init
  96setup_io_tlb_npages(char *str)
  97{
  98        if (isdigit(*str)) {
  99                io_tlb_nslabs = simple_strtoul(str, &str, 0);
 100                /* avoid tail segment of size < IO_TLB_SEGSIZE */
 101                io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
 102        }
 103        if (*str == ',')
 104                ++str;
 105        if (!strcmp(str, "force"))
 106                swiotlb_force = 1;
 107
 108        return 1;
 109}
 110__setup("swiotlb=", setup_io_tlb_npages);
 111/* make io_tlb_overflow tunable too? */
 112
 113unsigned long swiotlb_nr_tbl(void)
 114{
 115        return io_tlb_nslabs;
 116}
 117EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
 118/* Note that this doesn't work with highmem page */
 119static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
 120                                      volatile void *address)
 121{
 122        return phys_to_dma(hwdev, virt_to_phys(address));
 123}
 124
 125void swiotlb_print_info(void)
 126{
 127        unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
 128        phys_addr_t pstart, pend;
 129
 130        pstart = virt_to_phys(io_tlb_start);
 131        pend = virt_to_phys(io_tlb_end);
 132
 133        printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
 134               (unsigned long long)pstart, (unsigned long long)pend - 1,
 135               bytes >> 20, io_tlb_start, io_tlb_end - 1);
 136}
 137
 138void __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
 139{
 140        unsigned long i, bytes;
 141
 142        bytes = nslabs << IO_TLB_SHIFT;
 143
 144        io_tlb_nslabs = nslabs;
 145        io_tlb_start = tlb;
 146        io_tlb_end = io_tlb_start + bytes;
 147
 148        /*
 149         * Allocate and initialize the free list array.  This array is used
 150         * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
 151         * between io_tlb_start and io_tlb_end.
 152         */
 153        io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
 154        for (i = 0; i < io_tlb_nslabs; i++)
 155                io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
 156        io_tlb_index = 0;
 157        io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
 158
 159        /*
 160         * Get the overflow emergency buffer
 161         */
 162        io_tlb_overflow_buffer = alloc_bootmem_low_pages(PAGE_ALIGN(io_tlb_overflow));
 163        if (!io_tlb_overflow_buffer)
 164                panic("Cannot allocate SWIOTLB overflow buffer!\n");
 165        if (verbose)
 166                swiotlb_print_info();
 167}
 168
 169/*
 170 * Statically reserve bounce buffer space and initialize bounce buffer data
 171 * structures for the software IO TLB used to implement the DMA API.
 172 */
 173static void __init
 174swiotlb_init_with_default_size(size_t default_size, int verbose)
 175{
 176        unsigned long bytes;
 177
 178        if (!io_tlb_nslabs) {
 179                io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
 180                io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
 181        }
 182
 183        bytes = io_tlb_nslabs << IO_TLB_SHIFT;
 184
 185        /*
 186         * Get IO TLB memory from the low pages
 187         */
 188        io_tlb_start = alloc_bootmem_low_pages(PAGE_ALIGN(bytes));
 189        if (!io_tlb_start)
 190                panic("Cannot allocate SWIOTLB buffer");
 191
 192        swiotlb_init_with_tbl(io_tlb_start, io_tlb_nslabs, verbose);
 193}
 194
 195void __init
 196swiotlb_init(int verbose)
 197{
 198        swiotlb_init_with_default_size(64 * (1<<20), verbose);  /* default to 64MB */
 199}
 200
 201/*
 202 * Systems with larger DMA zones (those that don't support ISA) can
 203 * initialize the swiotlb later using the slab allocator if needed.
 204 * This should be just like above, but with some error catching.
 205 */
 206int
 207swiotlb_late_init_with_default_size(size_t default_size)
 208{
 209        unsigned long bytes, req_nslabs = io_tlb_nslabs;
 210        unsigned int order;
 211        int rc = 0;
 212
 213        if (!io_tlb_nslabs) {
 214                io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
 215                io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
 216        }
 217
 218        /*
 219         * Get IO TLB memory from the low pages
 220         */
 221        order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
 222        io_tlb_nslabs = SLABS_PER_PAGE << order;
 223        bytes = io_tlb_nslabs << IO_TLB_SHIFT;
 224
 225        while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
 226                io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
 227                                                        order);
 228                if (io_tlb_start)
 229                        break;
 230                order--;
 231        }
 232
 233        if (!io_tlb_start) {
 234                io_tlb_nslabs = req_nslabs;
 235                return -ENOMEM;
 236        }
 237        if (order != get_order(bytes)) {
 238                printk(KERN_WARNING "Warning: only able to allocate %ld MB "
 239                       "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
 240                io_tlb_nslabs = SLABS_PER_PAGE << order;
 241        }
 242        rc = swiotlb_late_init_with_tbl(io_tlb_start, io_tlb_nslabs);
 243        if (rc)
 244                free_pages((unsigned long)io_tlb_start, order);
 245        return rc;
 246}
 247
 248int
 249swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
 250{
 251        unsigned long i, bytes;
 252
 253        bytes = nslabs << IO_TLB_SHIFT;
 254
 255        io_tlb_nslabs = nslabs;
 256        io_tlb_start = tlb;
 257        io_tlb_end = io_tlb_start + bytes;
 258
 259        memset(io_tlb_start, 0, bytes);
 260
 261        /*
 262         * Allocate and initialize the free list array.  This array is used
 263         * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
 264         * between io_tlb_start and io_tlb_end.
 265         */
 266        io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
 267                                      get_order(io_tlb_nslabs * sizeof(int)));
 268        if (!io_tlb_list)
 269                goto cleanup2;
 270
 271        for (i = 0; i < io_tlb_nslabs; i++)
 272                io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
 273        io_tlb_index = 0;
 274
 275        io_tlb_orig_addr = (phys_addr_t *)
 276                __get_free_pages(GFP_KERNEL,
 277                                 get_order(io_tlb_nslabs *
 278                                           sizeof(phys_addr_t)));
 279        if (!io_tlb_orig_addr)
 280                goto cleanup3;
 281
 282        memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
 283
 284        /*
 285         * Get the overflow emergency buffer
 286         */
 287        io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
 288                                                  get_order(io_tlb_overflow));
 289        if (!io_tlb_overflow_buffer)
 290                goto cleanup4;
 291
 292        swiotlb_print_info();
 293
 294        late_alloc = 1;
 295
 296        return 0;
 297
 298cleanup4:
 299        free_pages((unsigned long)io_tlb_orig_addr,
 300                   get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
 301        io_tlb_orig_addr = NULL;
 302cleanup3:
 303        free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
 304                                                         sizeof(int)));
 305        io_tlb_list = NULL;
 306cleanup2:
 307        io_tlb_end = NULL;
 308        io_tlb_start = NULL;
 309        io_tlb_nslabs = 0;
 310        return -ENOMEM;
 311}
 312
 313void __init swiotlb_free(void)
 314{
 315        if (!io_tlb_overflow_buffer)
 316                return;
 317
 318        if (late_alloc) {
 319                free_pages((unsigned long)io_tlb_overflow_buffer,
 320                           get_order(io_tlb_overflow));
 321                free_pages((unsigned long)io_tlb_orig_addr,
 322                           get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
 323                free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
 324                                                                 sizeof(int)));
 325                free_pages((unsigned long)io_tlb_start,
 326                           get_order(io_tlb_nslabs << IO_TLB_SHIFT));
 327        } else {
 328                free_bootmem_late(__pa(io_tlb_overflow_buffer),
 329                                  PAGE_ALIGN(io_tlb_overflow));
 330                free_bootmem_late(__pa(io_tlb_orig_addr),
 331                                  PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
 332                free_bootmem_late(__pa(io_tlb_list),
 333                                  PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
 334                free_bootmem_late(__pa(io_tlb_start),
 335                                  PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
 336        }
 337        io_tlb_nslabs = 0;
 338}
 339
 340static int is_swiotlb_buffer(phys_addr_t paddr)
 341{
 342        return paddr >= virt_to_phys(io_tlb_start) &&
 343                paddr < virt_to_phys(io_tlb_end);
 344}
 345
 346/*
 347 * Bounce: copy the swiotlb buffer back to the original dma location
 348 */
 349void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
 350                    enum dma_data_direction dir)
 351{
 352        unsigned long pfn = PFN_DOWN(phys);
 353
 354        if (PageHighMem(pfn_to_page(pfn))) {
 355                /* The buffer does not have a mapping.  Map it in and copy */
 356                unsigned int offset = phys & ~PAGE_MASK;
 357                char *buffer;
 358                unsigned int sz = 0;
 359                unsigned long flags;
 360
 361                while (size) {
 362                        sz = min_t(size_t, PAGE_SIZE - offset, size);
 363
 364                        local_irq_save(flags);
 365                        buffer = kmap_atomic(pfn_to_page(pfn));
 366                        if (dir == DMA_TO_DEVICE)
 367                                memcpy(dma_addr, buffer + offset, sz);
 368                        else
 369                                memcpy(buffer + offset, dma_addr, sz);
 370                        kunmap_atomic(buffer);
 371                        local_irq_restore(flags);
 372
 373                        size -= sz;
 374                        pfn++;
 375                        dma_addr += sz;
 376                        offset = 0;
 377                }
 378        } else {
 379                if (dir == DMA_TO_DEVICE)
 380                        memcpy(dma_addr, phys_to_virt(phys), size);
 381                else
 382                        memcpy(phys_to_virt(phys), dma_addr, size);
 383        }
 384}
 385EXPORT_SYMBOL_GPL(swiotlb_bounce);
 386
 387void *swiotlb_tbl_map_single(struct device *hwdev, dma_addr_t tbl_dma_addr,
 388                             phys_addr_t phys, size_t size,
 389                             enum dma_data_direction dir)
 390{
 391        unsigned long flags;
 392        char *dma_addr;
 393        unsigned int nslots, stride, index, wrap;
 394        int i;
 395        unsigned long mask;
 396        unsigned long offset_slots;
 397        unsigned long max_slots;
 398
 399        mask = dma_get_seg_boundary(hwdev);
 400
 401        tbl_dma_addr &= mask;
 402
 403        offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
 404
 405        /*
 406         * Carefully handle integer overflow which can occur when mask == ~0UL.
 407         */
 408        max_slots = mask + 1
 409                    ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
 410                    : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
 411
 412        /*
 413         * For mappings greater than a page, we limit the stride (and
 414         * hence alignment) to a page size.
 415         */
 416        nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
 417        if (size > PAGE_SIZE)
 418                stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
 419        else
 420                stride = 1;
 421
 422        BUG_ON(!nslots);
 423
 424        /*
 425         * Find suitable number of IO TLB entries size that will fit this
 426         * request and allocate a buffer from that IO TLB pool.
 427         */
 428        spin_lock_irqsave(&io_tlb_lock, flags);
 429        index = ALIGN(io_tlb_index, stride);
 430        if (index >= io_tlb_nslabs)
 431                index = 0;
 432        wrap = index;
 433
 434        do {
 435                while (iommu_is_span_boundary(index, nslots, offset_slots,
 436                                              max_slots)) {
 437                        index += stride;
 438                        if (index >= io_tlb_nslabs)
 439                                index = 0;
 440                        if (index == wrap)
 441                                goto not_found;
 442                }
 443
 444                /*
 445                 * If we find a slot that indicates we have 'nslots' number of
 446                 * contiguous buffers, we allocate the buffers from that slot
 447                 * and mark the entries as '0' indicating unavailable.
 448                 */
 449                if (io_tlb_list[index] >= nslots) {
 450                        int count = 0;
 451
 452                        for (i = index; i < (int) (index + nslots); i++)
 453                                io_tlb_list[i] = 0;
 454                        for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
 455                                io_tlb_list[i] = ++count;
 456                        dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
 457
 458                        /*
 459                         * Update the indices to avoid searching in the next
 460                         * round.
 461                         */
 462                        io_tlb_index = ((index + nslots) < io_tlb_nslabs
 463                                        ? (index + nslots) : 0);
 464
 465                        goto found;
 466                }
 467                index += stride;
 468                if (index >= io_tlb_nslabs)
 469                        index = 0;
 470        } while (index != wrap);
 471
 472not_found:
 473        spin_unlock_irqrestore(&io_tlb_lock, flags);
 474        return NULL;
 475found:
 476        spin_unlock_irqrestore(&io_tlb_lock, flags);
 477
 478        /*
 479         * Save away the mapping from the original address to the DMA address.
 480         * This is needed when we sync the memory.  Then we sync the buffer if
 481         * needed.
 482         */
 483        for (i = 0; i < nslots; i++)
 484                io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
 485        if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
 486                swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
 487
 488        return dma_addr;
 489}
 490EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
 491
 492/*
 493 * Allocates bounce buffer and returns its kernel virtual address.
 494 */
 495
 496static void *
 497map_single(struct device *hwdev, phys_addr_t phys, size_t size,
 498           enum dma_data_direction dir)
 499{
 500        dma_addr_t start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start);
 501
 502        return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
 503}
 504
 505/*
 506 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
 507 */
 508void
 509swiotlb_tbl_unmap_single(struct device *hwdev, char *dma_addr, size_t size,
 510                        enum dma_data_direction dir)
 511{
 512        unsigned long flags;
 513        int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
 514        int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
 515        phys_addr_t phys = io_tlb_orig_addr[index];
 516
 517        /*
 518         * First, sync the memory before unmapping the entry
 519         */
 520        if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
 521                swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
 522
 523        /*
 524         * Return the buffer to the free list by setting the corresponding
 525         * entries to indicate the number of contiguous entries available.
 526         * While returning the entries to the free list, we merge the entries
 527         * with slots below and above the pool being returned.
 528         */
 529        spin_lock_irqsave(&io_tlb_lock, flags);
 530        {
 531                count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
 532                         io_tlb_list[index + nslots] : 0);
 533                /*
 534                 * Step 1: return the slots to the free list, merging the
 535                 * slots with superceeding slots
 536                 */
 537                for (i = index + nslots - 1; i >= index; i--)
 538                        io_tlb_list[i] = ++count;
 539                /*
 540                 * Step 2: merge the returned slots with the preceding slots,
 541                 * if available (non zero)
 542                 */
 543                for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
 544                        io_tlb_list[i] = ++count;
 545        }
 546        spin_unlock_irqrestore(&io_tlb_lock, flags);
 547}
 548EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
 549
 550void
 551swiotlb_tbl_sync_single(struct device *hwdev, char *dma_addr, size_t size,
 552                        enum dma_data_direction dir,
 553                        enum dma_sync_target target)
 554{
 555        int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
 556        phys_addr_t phys = io_tlb_orig_addr[index];
 557
 558        phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
 559
 560        switch (target) {
 561        case SYNC_FOR_CPU:
 562                if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
 563                        swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
 564                else
 565                        BUG_ON(dir != DMA_TO_DEVICE);
 566                break;
 567        case SYNC_FOR_DEVICE:
 568                if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
 569                        swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
 570                else
 571                        BUG_ON(dir != DMA_FROM_DEVICE);
 572                break;
 573        default:
 574                BUG();
 575        }
 576}
 577EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
 578
 579void *
 580swiotlb_alloc_coherent(struct device *hwdev, size_t size,
 581                       dma_addr_t *dma_handle, gfp_t flags)
 582{
 583        dma_addr_t dev_addr;
 584        void *ret;
 585        int order = get_order(size);
 586        u64 dma_mask = DMA_BIT_MASK(32);
 587
 588        if (hwdev && hwdev->coherent_dma_mask)
 589                dma_mask = hwdev->coherent_dma_mask;
 590
 591        ret = (void *)__get_free_pages(flags, order);
 592        if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) {
 593                /*
 594                 * The allocated memory isn't reachable by the device.
 595                 */
 596                free_pages((unsigned long) ret, order);
 597                ret = NULL;
 598        }
 599        if (!ret) {
 600                /*
 601                 * We are either out of memory or the device can't DMA to
 602                 * GFP_DMA memory; fall back on map_single(), which
 603                 * will grab memory from the lowest available address range.
 604                 */
 605                ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
 606                if (!ret)
 607                        return NULL;
 608        }
 609
 610        memset(ret, 0, size);
 611        dev_addr = swiotlb_virt_to_bus(hwdev, ret);
 612
 613        /* Confirm address can be DMA'd by device */
 614        if (dev_addr + size - 1 > dma_mask) {
 615                printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
 616                       (unsigned long long)dma_mask,
 617                       (unsigned long long)dev_addr);
 618
 619                /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
 620                swiotlb_tbl_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
 621                return NULL;
 622        }
 623        *dma_handle = dev_addr;
 624        return ret;
 625}
 626EXPORT_SYMBOL(swiotlb_alloc_coherent);
 627
 628void
 629swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
 630                      dma_addr_t dev_addr)
 631{
 632        phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
 633
 634        WARN_ON(irqs_disabled());
 635        if (!is_swiotlb_buffer(paddr))
 636                free_pages((unsigned long)vaddr, get_order(size));
 637        else
 638                /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
 639                swiotlb_tbl_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
 640}
 641EXPORT_SYMBOL(swiotlb_free_coherent);
 642
 643static void
 644swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
 645             int do_panic)
 646{
 647        /*
 648         * Ran out of IOMMU space for this operation. This is very bad.
 649         * Unfortunately the drivers cannot handle this operation properly.
 650         * unless they check for dma_mapping_error (most don't)
 651         * When the mapping is small enough return a static buffer to limit
 652         * the damage, or panic when the transfer is too big.
 653         */
 654        printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
 655               "device %s\n", size, dev ? dev_name(dev) : "?");
 656
 657        if (size <= io_tlb_overflow || !do_panic)
 658                return;
 659
 660        if (dir == DMA_BIDIRECTIONAL)
 661                panic("DMA: Random memory could be DMA accessed\n");
 662        if (dir == DMA_FROM_DEVICE)
 663                panic("DMA: Random memory could be DMA written\n");
 664        if (dir == DMA_TO_DEVICE)
 665                panic("DMA: Random memory could be DMA read\n");
 666}
 667
 668/*
 669 * Map a single buffer of the indicated size for DMA in streaming mode.  The
 670 * physical address to use is returned.
 671 *
 672 * Once the device is given the dma address, the device owns this memory until
 673 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
 674 */
 675dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
 676                            unsigned long offset, size_t size,
 677                            enum dma_data_direction dir,
 678                            struct dma_attrs *attrs)
 679{
 680        phys_addr_t phys = page_to_phys(page) + offset;
 681        dma_addr_t dev_addr = phys_to_dma(dev, phys);
 682        void *map;
 683
 684        BUG_ON(dir == DMA_NONE);
 685        /*
 686         * If the address happens to be in the device's DMA window,
 687         * we can safely return the device addr and not worry about bounce
 688         * buffering it.
 689         */
 690        if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
 691                return dev_addr;
 692
 693        /*
 694         * Oh well, have to allocate and map a bounce buffer.
 695         */
 696        map = map_single(dev, phys, size, dir);
 697        if (!map) {
 698                swiotlb_full(dev, size, dir, 1);
 699                map = io_tlb_overflow_buffer;
 700        }
 701
 702        dev_addr = swiotlb_virt_to_bus(dev, map);
 703
 704        /*
 705         * Ensure that the address returned is DMA'ble
 706         */
 707        if (!dma_capable(dev, dev_addr, size)) {
 708                swiotlb_tbl_unmap_single(dev, map, size, dir);
 709                dev_addr = swiotlb_virt_to_bus(dev, io_tlb_overflow_buffer);
 710        }
 711
 712        return dev_addr;
 713}
 714EXPORT_SYMBOL_GPL(swiotlb_map_page);
 715
 716/*
 717 * Unmap a single streaming mode DMA translation.  The dma_addr and size must
 718 * match what was provided for in a previous swiotlb_map_page call.  All
 719 * other usages are undefined.
 720 *
 721 * After this call, reads by the cpu to the buffer are guaranteed to see
 722 * whatever the device wrote there.
 723 */
 724static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
 725                         size_t size, enum dma_data_direction dir)
 726{
 727        phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
 728
 729        BUG_ON(dir == DMA_NONE);
 730
 731        if (is_swiotlb_buffer(paddr)) {
 732                swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
 733                return;
 734        }
 735
 736        if (dir != DMA_FROM_DEVICE)
 737                return;
 738
 739        /*
 740         * phys_to_virt doesn't work with hihgmem page but we could
 741         * call dma_mark_clean() with hihgmem page here. However, we
 742         * are fine since dma_mark_clean() is null on POWERPC. We can
 743         * make dma_mark_clean() take a physical address if necessary.
 744         */
 745        dma_mark_clean(phys_to_virt(paddr), size);
 746}
 747
 748void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
 749                        size_t size, enum dma_data_direction dir,
 750                        struct dma_attrs *attrs)
 751{
 752        unmap_single(hwdev, dev_addr, size, dir);
 753}
 754EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
 755
 756/*
 757 * Make physical memory consistent for a single streaming mode DMA translation
 758 * after a transfer.
 759 *
 760 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
 761 * using the cpu, yet do not wish to teardown the dma mapping, you must
 762 * call this function before doing so.  At the next point you give the dma
 763 * address back to the card, you must first perform a
 764 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
 765 */
 766static void
 767swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
 768                    size_t size, enum dma_data_direction dir,
 769                    enum dma_sync_target target)
 770{
 771        phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
 772
 773        BUG_ON(dir == DMA_NONE);
 774
 775        if (is_swiotlb_buffer(paddr)) {
 776                swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir,
 777                                       target);
 778                return;
 779        }
 780
 781        if (dir != DMA_FROM_DEVICE)
 782                return;
 783
 784        dma_mark_clean(phys_to_virt(paddr), size);
 785}
 786
 787void
 788swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
 789                            size_t size, enum dma_data_direction dir)
 790{
 791        swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
 792}
 793EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
 794
 795void
 796swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
 797                               size_t size, enum dma_data_direction dir)
 798{
 799        swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
 800}
 801EXPORT_SYMBOL(swiotlb_sync_single_for_device);
 802
 803/*
 804 * Map a set of buffers described by scatterlist in streaming mode for DMA.
 805 * This is the scatter-gather version of the above swiotlb_map_page
 806 * interface.  Here the scatter gather list elements are each tagged with the
 807 * appropriate dma address and length.  They are obtained via
 808 * sg_dma_{address,length}(SG).
 809 *
 810 * NOTE: An implementation may be able to use a smaller number of
 811 *       DMA address/length pairs than there are SG table elements.
 812 *       (for example via virtual mapping capabilities)
 813 *       The routine returns the number of addr/length pairs actually
 814 *       used, at most nents.
 815 *
 816 * Device ownership issues as mentioned above for swiotlb_map_page are the
 817 * same here.
 818 */
 819int
 820swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
 821                     enum dma_data_direction dir, struct dma_attrs *attrs)
 822{
 823        struct scatterlist *sg;
 824        int i;
 825
 826        BUG_ON(dir == DMA_NONE);
 827
 828        for_each_sg(sgl, sg, nelems, i) {
 829                phys_addr_t paddr = sg_phys(sg);
 830                dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
 831
 832                if (swiotlb_force ||
 833                    !dma_capable(hwdev, dev_addr, sg->length)) {
 834                        void *map = map_single(hwdev, sg_phys(sg),
 835                                               sg->length, dir);
 836                        if (!map) {
 837                                /* Don't panic here, we expect map_sg users
 838                                   to do proper error handling. */
 839                                swiotlb_full(hwdev, sg->length, dir, 0);
 840                                swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
 841                                                       attrs);
 842                                sgl[0].dma_length = 0;
 843                                return 0;
 844                        }
 845                        sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
 846                } else
 847                        sg->dma_address = dev_addr;
 848                sg->dma_length = sg->length;
 849        }
 850        return nelems;
 851}
 852EXPORT_SYMBOL(swiotlb_map_sg_attrs);
 853
 854int
 855swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
 856               enum dma_data_direction dir)
 857{
 858        return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
 859}
 860EXPORT_SYMBOL(swiotlb_map_sg);
 861
 862/*
 863 * Unmap a set of streaming mode DMA translations.  Again, cpu read rules
 864 * concerning calls here are the same as for swiotlb_unmap_page() above.
 865 */
 866void
 867swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
 868                       int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
 869{
 870        struct scatterlist *sg;
 871        int i;
 872
 873        BUG_ON(dir == DMA_NONE);
 874
 875        for_each_sg(sgl, sg, nelems, i)
 876                unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
 877
 878}
 879EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
 880
 881void
 882swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
 883                 enum dma_data_direction dir)
 884{
 885        return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
 886}
 887EXPORT_SYMBOL(swiotlb_unmap_sg);
 888
 889/*
 890 * Make physical memory consistent for a set of streaming mode DMA translations
 891 * after a transfer.
 892 *
 893 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
 894 * and usage.
 895 */
 896static void
 897swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
 898                int nelems, enum dma_data_direction dir,
 899                enum dma_sync_target target)
 900{
 901        struct scatterlist *sg;
 902        int i;
 903
 904        for_each_sg(sgl, sg, nelems, i)
 905                swiotlb_sync_single(hwdev, sg->dma_address,
 906                                    sg->dma_length, dir, target);
 907}
 908
 909void
 910swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
 911                        int nelems, enum dma_data_direction dir)
 912{
 913        swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
 914}
 915EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
 916
 917void
 918swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
 919                           int nelems, enum dma_data_direction dir)
 920{
 921        swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
 922}
 923EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
 924
 925int
 926swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
 927{
 928        return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
 929}
 930EXPORT_SYMBOL(swiotlb_dma_mapping_error);
 931
 932/*
 933 * Return whether the given device DMA address mask can be supported
 934 * properly.  For example, if your device can only drive the low 24-bits
 935 * during bus mastering, then you would pass 0x00ffffff as the mask to
 936 * this function.
 937 */
 938int
 939swiotlb_dma_supported(struct device *hwdev, u64 mask)
 940{
 941        return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
 942}
 943EXPORT_SYMBOL(swiotlb_dma_supported);
 944
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