linux/Documentation/intel_txt.txt
<<
>>
Prefs
   1Intel(R) TXT Overview:
   2=====================
   3
   4Intel's technology for safer computing, Intel(R) Trusted Execution
   5Technology (Intel(R) TXT), defines platform-level enhancements that
   6provide the building blocks for creating trusted platforms.
   7
   8Intel TXT was formerly known by the code name LaGrande Technology (LT).
   9
  10Intel TXT in Brief:
  11o  Provides dynamic root of trust for measurement (DRTM)
  12o  Data protection in case of improper shutdown
  13o  Measurement and verification of launched environment
  14
  15Intel TXT is part of the vPro(TM) brand and is also available some
  16non-vPro systems.  It is currently available on desktop systems
  17based on the Q35, X38, Q45, and Q43 Express chipsets (e.g. Dell
  18Optiplex 755, HP dc7800, etc.) and mobile systems based on the GM45,
  19PM45, and GS45 Express chipsets.
  20
  21For more information, see http://www.intel.com/technology/security/.
  22This site also has a link to the Intel TXT MLE Developers Manual,
  23which has been updated for the new released platforms.
  24
  25Intel TXT has been presented at various events over the past few
  26years, some of which are:
  27      LinuxTAG 2008:
  28          http://www.linuxtag.org/2008/en/conf/events/vp-donnerstag.html
  29      TRUST2008:
  30          http://www.trust-conference.eu/downloads/Keynote-Speakers/
  31          3_David-Grawrock_The-Front-Door-of-Trusted-Computing.pdf
  32      IDF, Shanghai:
  33          http://www.prcidf.com.cn/index_en.html
  34      IDFs 2006, 2007 (I'm not sure if/where they are online)
  35
  36Trusted Boot Project Overview:
  37=============================
  38
  39Trusted Boot (tboot) is an open source, pre-kernel/VMM module that
  40uses Intel TXT to perform a measured and verified launch of an OS
  41kernel/VMM.
  42
  43It is hosted on SourceForge at http://sourceforge.net/projects/tboot.
  44The mercurial source repo is available at http://www.bughost.org/
  45repos.hg/tboot.hg.
  46
  47Tboot currently supports launching Xen (open source VMM/hypervisor
  48w/ TXT support since v3.2), and now Linux kernels.
  49
  50
  51Value Proposition for Linux or "Why should you care?"
  52=====================================================
  53
  54While there are many products and technologies that attempt to
  55measure or protect the integrity of a running kernel, they all
  56assume the kernel is "good" to begin with.  The Integrity
  57Measurement Architecture (IMA) and Linux Integrity Module interface
  58are examples of such solutions.
  59
  60To get trust in the initial kernel without using Intel TXT, a
  61static root of trust must be used.  This bases trust in BIOS
  62starting at system reset and requires measurement of all code
  63executed between system reset through the completion of the kernel
  64boot as well as data objects used by that code.  In the case of a
  65Linux kernel, this means all of BIOS, any option ROMs, the
  66bootloader and the boot config.  In practice, this is a lot of
  67code/data, much of which is subject to change from boot to boot
  68(e.g. changing NICs may change option ROMs).  Without reference
  69hashes, these measurement changes are difficult to assess or
  70confirm as benign.  This process also does not provide DMA
  71protection, memory configuration/alias checks and locks, crash
  72protection, or policy support.
  73
  74By using the hardware-based root of trust that Intel TXT provides,
  75many of these issues can be mitigated.  Specifically: many
  76pre-launch components can be removed from the trust chain, DMA
  77protection is provided to all launched components, a large number
  78of platform configuration checks are performed and values locked,
  79protection is provided for any data in the event of an improper
  80shutdown, and there is support for policy-based execution/verification.
  81This provides a more stable measurement and a higher assurance of
  82system configuration and initial state than would be otherwise
  83possible.  Since the tboot project is open source, source code for
  84almost all parts of the trust chain is available (excepting SMM and
  85Intel-provided firmware).
  86
  87How Does it Work?
  88=================
  89
  90o  Tboot is an executable that is launched by the bootloader as
  91   the "kernel" (the binary the bootloader executes).
  92o  It performs all of the work necessary to determine if the
  93   platform supports Intel TXT and, if so, executes the GETSEC[SENTER]
  94   processor instruction that initiates the dynamic root of trust.
  95   -  If tboot determines that the system does not support Intel TXT
  96      or is not configured correctly (e.g. the SINIT AC Module was
  97      incorrect), it will directly launch the kernel with no changes
  98      to any state.
  99   -  Tboot will output various information about its progress to the
 100      terminal, serial port, and/or an in-memory log; the output
 101      locations can be configured with a command line switch.
 102o  The GETSEC[SENTER] instruction will return control to tboot and
 103   tboot then verifies certain aspects of the environment (e.g. TPM NV
 104   lock, e820 table does not have invalid entries, etc.).
 105o  It will wake the APs from the special sleep state the GETSEC[SENTER]
 106   instruction had put them in and place them into a wait-for-SIPI
 107   state.
 108   -  Because the processors will not respond to an INIT or SIPI when
 109      in the TXT environment, it is necessary to create a small VT-x
 110      guest for the APs.  When they run in this guest, they will
 111      simply wait for the INIT-SIPI-SIPI sequence, which will cause
 112      VMEXITs, and then disable VT and jump to the SIPI vector.  This
 113      approach seemed like a better choice than having to insert
 114      special code into the kernel's MP wakeup sequence.
 115o  Tboot then applies an (optional) user-defined launch policy to
 116   verify the kernel and initrd.
 117   -  This policy is rooted in TPM NV and is described in the tboot
 118      project.  The tboot project also contains code for tools to
 119      create and provision the policy.
 120   -  Policies are completely under user control and if not present
 121      then any kernel will be launched.
 122   -  Policy action is flexible and can include halting on failures
 123      or simply logging them and continuing.
 124o  Tboot adjusts the e820 table provided by the bootloader to reserve
 125   its own location in memory as well as to reserve certain other
 126   TXT-related regions.
 127o  As part of its launch, tboot DMA protects all of RAM (using the
 128   VT-d PMRs).  Thus, the kernel must be booted with 'intel_iommu=on'
 129   in order to remove this blanket protection and use VT-d's
 130   page-level protection.
 131o  Tboot will populate a shared page with some data about itself and
 132   pass this to the Linux kernel as it transfers control.
 133   -  The location of the shared page is passed via the boot_params
 134      struct as a physical address.
 135o  The kernel will look for the tboot shared page address and, if it
 136   exists, map it.
 137o  As one of the checks/protections provided by TXT, it makes a copy
 138   of the VT-d DMARs in a DMA-protected region of memory and verifies
 139   them for correctness.  The VT-d code will detect if the kernel was
 140   launched with tboot and use this copy instead of the one in the
 141   ACPI table.
 142o  At this point, tboot and TXT are out of the picture until a
 143   shutdown (S<n>)
 144o  In order to put a system into any of the sleep states after a TXT
 145   launch, TXT must first be exited.  This is to prevent attacks that
 146   attempt to crash the system to gain control on reboot and steal
 147   data left in memory.
 148   -  The kernel will perform all of its sleep preparation and
 149      populate the shared page with the ACPI data needed to put the
 150      platform in the desired sleep state.
 151   -  Then the kernel jumps into tboot via the vector specified in the
 152      shared page.
 153   -  Tboot will clean up the environment and tation/iTXT, then   141   ACPI tabled 153   -  Tboot will clean 1141"> I tabled 153   -  Tboot will clean 114ef="Do.6.15.3"
	  >
  v2.6.15.3d="L143" n62ss="loot and steal
 149      populate xThis is trnel, they all
 151   -  Then the kernel jumps into tboot control ith.  The Integrity
 14e="L65">  65132"> 13txt.txone"a>non-vPro systems.  It is currently availx Integri1ty Module interface
 113   -  Tboup" name"a>"> Oxt.txt#L_txt.txt#L110" non-vPro systems.  It is currently availxe ACPI da60" class="line" name="L160"> 15cumentationtxt.txt#Lame113edt.txt#L98"ame113etxt#L_PM PCRs_txt.txt#non-vPro systems.  It is currently availout using1 Intel TXT, a
o="L113"non-vPro systems.  It is currently availo via the rust in BIOS
  64boot as well as data objects used by th1easuremen1t of all code
 1n"L147ye" name= id=""lin m+seamethnteme="boot as well as data objects used by th1e6.15.3"
	 In the case of a
non-vPro systems.  It is currently avail6able on deesktop systems
   -  Tbotxt.txt#Lam-e2" idixtedt. 118      project.  The tboot project alschange fr1om boot to boot
 1y.txta" cls="L96" 47s="linel_txt.txt.txt#L96"wid="happens name="L14" class="li3"> 5o  The kernel will look for the tbootifficult 1to assess or
  xt.txt#L2="line" MAC 40" ctel_txt./a>o  The kernel will look for the tbootoes not p1rovide DMA
o  The kernel will look for the tbootcasuremen1ation/intel_txt.txt#L73"1 id="17mentatia>s="linelretnamt.txtt.txt#L#L49" id="Lo  The kernel will look for the tbootcent and t74" class="line" name="L174"> 174By using the hardware-based root of tru1st that I1ntel TXT provides,
o  Provides dynamic root of trust for meom the tr1ust chain, DMA
  53
Intel TXT was formerly known by the code n1rformed a1nd values locked,
  49
Intel TXT in Brief:
   them for correctness.  The VT-d co and a hi1gher assurance of
o  Provides dynamic root of trust for mementation1/intel_txt.txt#L86" id="1L86" 185"L143" n62intitld="L133".7.129-tip w/. 118      project.  The tboot project als87" id="L187" class="line" name="L187"> 186"L143" n62in ="L95"(hd0,0o  In order to put a system into any n/intel_t1xt.txt#L88" id="L88" cla1ss="l187"L143" n62in =3" n62ss="lo ">  46o  In order to put a system into any ne systems  based on the GM45,
  40/vmtheuz-.7.129-tip " name="L129">="L/a>o  In order to put a system into any nhe event190" class="line" name="L190"> 189"L143" n62in =3" n62n62in ="L95=LABEL=/ rhgbass=sole=tnaS0,115200 3/a>o  In order to put a system into any hed by th1e bootloader as
  40/"> 117-.7.129-tip.img/a>o  In order to put a system into any hand a hi1ader executes).
  40/Q35_name=_17.BINboot as well as data objects used by th1y to dete1rmine if the
  61  7ssp name="ms.uclass="l6"> 52"2" id=En" idline" name="L5"> non-vPro systems.  It is currently avail entation1ot support Intel TXT
Tec="L9">   9      populate the shared page with t.g. the S1INIT AC Module was
  1gen#L1c x86ame="L96"( id="Low.maximum123" idil>  7n#non-vPro systems.  It is currently availch the ke1rnel with no changes
 1"Documt.txt#LL115" ss="line"2   -  Policy action is flexible and 2n in-memo2y log; the output
 "14For more information, see   97.L17" id=ame="L1c d="L115>  20 152      shared page.
  1ation/intel_tinte.L17" id=14For more information, see   40signs="linname="L91" cla65" ca_txt.txt#L16"For more information, see  1y.me="L12102" c#L147" id=".L17" id=aigns=For more information, see ame="Lte" name="Lpriellege name=" ixt.tx" id="L1h14For more information, see  ="L13> 100      terminal, serial port, and/or 2 respond 2o an INIT or SIPI when
<2 href2"Docume2" idixt  Tbo class=2name=-guidend/o >      terminal, serial port, and/or 2un in thi2 guest, they will
 118   -  Policy action is flexible and 2IPI seque2ce, which will cause

0" iorigtxt. LXR soft86   -  P id="L44" class="line" name="L44lxr">LXR e" nu> 1yumename="L6ex/a>iy actl"9">ame="assa>   -  Pmailto:lxr@theux.no">lxr@theux.noumen.
52fa0e37893fwhich wsubf129"r">
lxr.theux.no kindef=ceforgeassa>   -  P="line" namredpass-thenam.no">Redpass="L1nam ASumenamintel_tro cl"L133"ss=suname="txt.o/a>am.txsxt#Lviass49" cla1"D5.
52fa0e397/bodye37/  34v>