linux/drivers/regulator/lp8788-buck.c
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   1/*
   2 * TI LP8788 MFD - buck regulator driver
   3 *
   4 * Copyright 2012 Texas Instruments
   5 *
   6 * Author: Milo(Woogyom) Kim <milo.kim@ti.com>
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 *
  12 */
  13
  14#include <linux/module.h>
  15#include <linux/slab.h>
  16#include <linux/err.h>
  17#include <linux/platform_device.h>
  18#include <linux/regulator/driver.h>
  19#include <linux/mfd/lp8788.h>
  20#include <linux/gpio.h>
  21
  22/* register address */
  23#define LP8788_EN_BUCK                  0x0C
  24#define LP8788_BUCK_DVS_SEL             0x1D
  25#define LP8788_BUCK1_VOUT0              0x1E
  26#define LP8788_BUCK1_VOUT1              0x1F
  27#define LP8788_BUCK1_VOUT2              0x20
  28#define LP8788_BUCK1_VOUT3              0x21
  29#define LP8788_BUCK2_VOUT0              0x22
  30#define LP8788_BUCK2_VOUT1              0x23
  31#define LP8788_BUCK2_VOUT2              0x24
  32#define LP8788_BUCK2_VOUT3              0x25
  33#define LP8788_BUCK3_VOUT               0x26
  34#define LP8788_BUCK4_VOUT               0x27
  35#define LP8788_BUCK1_TIMESTEP           0x28
  36#define LP8788_BUCK_PWM                 0x2D
  37
  38/* mask/shift bits */
  39#define LP8788_EN_BUCK1_M               BIT(0)  /* Addr 0Ch */
  40#define LP8788_EN_BUCK2_M               BIT(1)
  41#define LP8788_EN_BUCK3_M               BIT(2)
  42#define LP8788_EN_BUCK4_M               BIT(3)
  43#define LP8788_BUCK1_DVS_SEL_M          0x04    /* Addr 1Dh */
  44#define LP8788_BUCK1_DVS_M              0x03
  45#define LP8788_BUCK1_DVS_S              0
  46#define LP8788_BUCK2_DVS_SEL_M          0x40
  47#define LP8788_BUCK2_DVS_M              0x30
  48#define LP8788_BUCK2_DVS_S              4
  49#define LP8788_BUCK1_DVS_I2C            BIT(2)
  50#define LP8788_BUCK2_DVS_I2C            BIT(6)
  51#define LP8788_BUCK1_DVS_PIN            (0 << 2)
  52#define LP8788_BUCK2_DVS_PIN            (0 << 6)
  53#define LP8788_VOUT_M                   0x1F    /* Addr 1Eh ~ 27h */
  54#define LP8788_STARTUP_TIME_M           0xF8    /* Addr 28h ~ 2Bh */
  55#define LP8788_STARTUP_TIME_S           3
  56#define LP8788_FPWM_BUCK1_M             BIT(0)  /* Addr 2Dh */
  57#define LP8788_FPWM_BUCK1_S             0
  58#define LP8788_FPWM_BUCK2_M             BIT(1)
  59#define LP8788_FPWM_BUCK2_S             1
  60#define LP8788_FPWM_BUCK3_M             BIT(2)
  61#define LP8788_FPWM_BUCK3_S             2
  62#define LP8788_FPWM_BUCK4_M             BIT(3)
  63#define LP8788_FPWM_BUCK4_S             3
  64
  65#define INVALID_ADDR                    0xFF
  66#define LP8788_FORCE_PWM                1
  67#define LP8788_AUTO_PWM                 0
  68#define PIN_LOW                         0
  69#define PIN_HIGH                        1
  70#define ENABLE_TIME_USEC                32
  71
  72#define BUCK_FPWM_MASK(x)               (1 << (x))
  73#define BUCK_FPWM_SHIFT(x)              (x)
  74
  75enum lp8788_dvs_state {
  76        DVS_LOW  = GPIOF_OUT_INIT_LOW,
  77        DVS_HIGH = GPIOF_OUT_INIT_HIGH,
  78};
  79
  80enum lp8788_dvs_mode {
  81        REGISTER,
  82        EXTPIN,
  83};
  84
  85enum lp8788_buck_id {
  86        BUCK1,
  87        BUCK2,
  88        BUCK3,
  89        BUCK4,
  90};
  91
  92struct lp8788_buck {
  93        struct lp8788 *lp;
  94        struct regulator_dev *regulator;
  95        void *dvs;
  96};
  97
  98/* BUCK 1 ~ 4 voltage table */
  99static const int lp8788_buck_vtbl[] = {
 100         500000,  800000,  850000,  900000,  950000, 1000000, 1050000, 1100000,
 101        1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
 102        1550000, 1600000, 1650000, 1700000, 1750000, 1800000, 1850000, 1900000,
 103        1950000, 2000000,
 104};
 105
 106static const u8 buck1_vout_addr[] = {
 107        LP8788_BUCK1_VOUT0, LP8788_BUCK1_VOUT1,
 108        LP8788_BUCK1_VOUT2, LP8788_BUCK1_VOUT3,
 109};
 110
 111static const u8 buck2_vout_addr[] = {
 112        LP8788_BUCK2_VOUT0, LP8788_BUCK2_VOUT1,
 113        LP8788_BUCK2_VOUT2, LP8788_BUCK2_VOUT3,
 114};
 115
 116static void lp8788_buck1_set_dvs(struct lp8788_buck *buck)
 117{
 118        struct lp8788_buck1_dvs *dvs = (struct lp8788_buck1_dvs *)buck->dvs;
 119        enum lp8788_dvs_state pinstate;
 120
 121        if (!dvs)
 122                return;
 123
 124        pinstate = dvs->vsel == DVS_SEL_V0 ? DVS_LOW : DVS_HIGH;
 125        if (gpio_is_valid(dvs->gpio))
 126                gpio_set_value(dvs->gpio, pinstate);
 127}
 128
 129static void lp8788_buck2_set_dvs(struct lp8788_buck *buck)
 130{
 131        struct lp8788_buck2_dvs *dvs = (struct lp8788_buck2_dvs *)buck->dvs;
 132        enum lp8788_dvs_state pin1, pin2;
 133
 134        if (!dvs)
 135                return;
 136
 137        switch (dvs->vsel) {
 138        case DVS_SEL_V0:
 139                pin1 = DVS_LOW;
 140                pin2 = DVS_LOW;
 141                break;
 142        case DVS_SEL_V1:
 143                pin1 = DVS_HIGH;
 144                pin2 = DVS_LOW;
 145                break;
 146        case DVS_SEL_V2:
 147                pin1 = DVS_LOW;
 148                pin2 = DVS_HIGH;
 149                break;
 150        case DVS_SEL_V3:
 151                pin1 = DVS_HIGH;
 152                pin2 = DVS_HIGH;
 153                break;
 154        default:
 155                return;
 156        }
 157
 158        if (gpio_is_valid(dvs->gpio[0]))
 159                gpio_set_value(dvs->gpio[0], pin1);
 160
 161        if (gpio_is_valid(dvs->gpio[1]))
 162                gpio_set_value(dvs->gpio[1], pin2);
 163}
 164
 165static void lp8788_set_dvs(struct lp8788_buck *buck, enum lp8788_buck_id id)
 166{
 167        switch (id) {
 168        case BUCK1:
 169                lp8788_buck1_set_dvs(buck);
 170                break;
 171        case BUCK2:
 172                lp8788_buck2_set_dvs(buck);
 173                break;
 174        default:
 175                break;
 176        }
 177}
 178
 179static enum lp8788_dvs_mode
 180lp8788_get_buck_dvs_ctrl_mode(struct lp8788_buck *buck, enum lp8788_buck_id id)
 181{
 182        u8 val, mask;
 183
 184        switch (id) {
 185        case BUCK1:
 186                mask = LP8788_BUCK1_DVS_SEL_M;
 187                break;
 188        case BUCK2:
 189                mask = LP8788_BUCK2_DVS_SEL_M;
 190                break;
 191        default:
 192                return REGISTER;
 193        }
 194
 195        lp8788_read_byte(buck->lp, LP8788_BUCK_DVS_SEL, &val);
 196
 197        return val & mask ? REGISTER : EXTPIN;
 198}
 199
 200static bool lp8788_is_valid_buck_addr(u8 addr)
 201{
 202        switch (addr) {
 203        case LP8788_BUCK1_VOUT0:
 204        case LP8788_BUCK1_VOUT1:
 205        case LP8788_BUCK1_VOUT2:
 206        case LP8788_BUCK1_VOUT3:
 207        case LP8788_BUCK2_VOUT0:
 208        case LP8788_BUCK2_VOUT1:
 209        case LP8788_BUCK2_VOUT2:
 210        case LP8788_BUCK2_VOUT3:
 211                return true;
 212        default:
 213                return false;
 214        }
 215}
 216
 217static u8 lp8788_select_buck_vout_addr(struct lp8788_buck *buck,
 218                                        enum lp8788_buck_id id)
 219{
 220        enum lp8788_dvs_mode mode = lp8788_get_buck_dvs_ctrl_mode(buck, id);
 221        struct lp8788_buck1_dvs *b1_dvs;
 222        struct lp8788_buck2_dvs *b2_dvs;
 223        u8 val, idx, addr;
 224        int pin1, pin2;
 225
 226        switch (id) {
 227        case BUCK1:
 228                if (mode == EXTPIN) {
 229                        b1_dvs = (struct lp8788_buck1_dvs *)buck->dvs;
 230                        if (!b1_dvs)
 231                                goto err;
 232
 233                        idx = gpio_get_value(b1_dvs->gpio) ? 1 : 0;
 234                } else {
 235                        lp8788_read_byte(buck->lp, LP8788_BUCK_DVS_SEL, &val);
 236                        idx = (val & LP8788_BUCK1_DVS_M) >> LP8788_BUCK1_DVS_S;
 237                }
 238                addr = buck1_vout_addr[idx];
 239                break;
 240        case BUCK2:
 241                if (mode == EXTPIN) {
 242                        b2_dvs = (struct lp8788_buck2_dvs *)buck->dvs;
 243                        if (!b2_dvs)
 244                                goto err;
 245
 246                        pin1 = gpio_get_value(b2_dvs->gpio[0]);
 247                        pin2 = gpio_get_value(b2_dvs->gpio[1]);
 248
 249                        if (pin1 == PIN_LOW && pin2 == PIN_LOW)
 250                                idx = 0;
 251                        else if (pin1 == PIN_LOW && pin2 == PIN_HIGH)
 252                                idx = 2;
 253                        else if (pin1 == PIN_HIGH && pin2 == PIN_LOW)
 254                                idx = 1;
 255                        else
 256                                idx = 3;
 257                } else {
 258                        lp8788_read_byte(buck->lp, LP8788_BUCK_DVS_SEL, &val);
 259                        idx = (val & LP8788_BUCK2_DVS_M) >> LP8788_BUCK2_DVS_S;
 260                }
 261                addr = buck2_vout_addr[idx];
 262                break;
 263        default:
 264                goto err;
 265        }
 266
 267        return addr;
 268err:
 269        return INVALID_ADDR;
 270}
 271
 272static int lp8788_buck12_set_voltage_sel(struct regulator_dev *rdev,
 273                                        unsigned selector)
 274{
 275        struct lp8788_buck *buck = rdev_get_drvdata(rdev);
 276        enum lp8788_buck_id id = rdev_get_id(rdev);
 277        u8 addr;
 278
 279        if (buck->dvs)
 280                lp8788_set_dvs(buck, id);
 281
 282        addr = lp8788_select_buck_vout_addr(buck, id);
 283        if (!lp8788_is_valid_buck_addr(addr))
 284                return -EINVAL;
 285
 286        return lp8788_update_bits(buck->lp, addr, LP8788_VOUT_M, selector);
 287}
 288
 289static int lp8788_buck12_get_voltage_sel(struct regulator_dev *rdev)
 290{
 291        struct lp8788_buck *buck = rdev_get_drvdata(rdev);
 292        enum lp8788_buck_id id = rdev_get_id(rdev);
 293        int ret;
 294        u8 val, addr;
 295
 296        addr = lp8788_select_buck_vout_addr(buck, id);
 297        if (!lp8788_is_valid_buck_addr(addr))
 298                return -EINVAL;
 299
 300        ret = lp8788_read_byte(buck->lp, addr, &val);
 301        if (ret)
 302                return ret;
 303
 304        return val & LP8788_VOUT_M;
 305}
 306
 307static int lp8788_buck_enable_time(struct regulator_dev *rdev)
 308{
 309        struct lp8788_buck *buck = rdev_get_drvdata(rdev);
 310        enum lp8788_buck_id id = rdev_get_id(rdev);
 311        u8 val, addr =  rdev);
 232
 28"sref">ret = lp8788_read_byte(buck->lp, addr, &rdev)
 284                return -EINVAL;
 295
 296      n idx = (val & EINVAL;
 157
 304        returENABLE="lin+USECref="+code=EINVANABLE="lin+USECsref">"> 296      n EINVAL;
 305}
 160
 307static int (struct regulator_dev * 307static in (rdev)
 308{
 309        struct lp8788_buck *buck = rdev_get_drvdata(rdev);
 310        enum lp8788_buck_id id = rdev_get_id(rdev);
 195        u8lpn EINVAL;
 306
 277        mask ss="sFPWM_MASK href="+code=mass="sFPWM_MASKsref">rdev_get_idid);
 226        switch ( 209        casREGULATOR_MODE_FAST href="+code=moREGULATOR_MODE_FAST namss="sref">err:
 230 296      n ) >> ) >>ss="sFPWM_SHIFT href="+code=moss="sFPWM_SHIFTsref">rdev_get_idid);
 231                break;
 209        casREGULATOR_MODE_NORM href="+code=EINVREGULATOR_MODE_NORM h namss="sref">err:
 233 296      n ) >> ) >>ss="sFPWM_SHIFT href="+code=moss="sFPWM_SHIFTsref">rdev_get_idid);
 234                break;
 263        default:
 236                return -EINVAL;
 305}
 288
 269        return lp8788_update_bits(buck->lpEL" class="sPWMP8788_BUCK2_DVS_S" class="sPWM" class="sref">lp; lpn id);
 270}
 281
 307static inid" class="sgs="et_buck_dvs_ctrl_mode" claef="+gs="et_b_buck_enable_time(struct regulator_dev *rdev)
 309        struct lp8788_buck *buck = rdev_get_drvdata(rdev);
 310        enum lp8788_buck_id id = rdev_get_id(rdev);
 296        u8 rdev);
 293        int ret;
 248
        int ret = lp8788_read_byte(buck->lpEL" class="sPWMP8788_BUCK2_DVS_S" class="sPWM" clas"sref">addr, &val);
 301        if (ret)
 251                return ret;
 232
 304        return val &ss="sFPWM_MASK href="+code=mass="sFPWM_MASKsref">rdev_get_id 232
 254                              REGULATOR_MODE_FAST href="+code=moREGULATOR_MODE_FAST namref">REGISTER REGULATOR_MODE_NORM href="+code=EINVREGULATOR_MODE_NORM h namss="sref">ret;
 305}
 306
u8u8lp8788_bp8788_update_bieis>lp8788_b" class="sref">id = lp8788_b_tf">lp8788_update_bit lp8788_b_tf">l" cla         } else {
u8lp8788_buck12_sess="sref">ret = lp8788_buck12_sea         } else {
u8lp8788_buck12_gess="sref">ret = lp8788_buck12_gea         } else {
u8l2_get_voltage_sref">l" class="sref">id = lp= lp= u8l2_get_voltage_sdisf">l" class="sref">id = lp= lp= u8l l " class="sref">id = l p= l p= u8lp8788_buck_enable_tiref">lp8788_bucss="sref">ret = lp8788_buca         } else {
u8ret = u8ret = ret;
 248
(struct u8u8lp8788_bp8788_update_bieis>lp8788_b" class="sref">id = lp8788_b_tf">lp8788_update_bit lp8788_b_tf">l" cla         } else {
u8lp8788_buck12_sess="sref">ret t lp8788_buck1p= lp8788_buck1p= u8lp8788_buck12_gess="sref">ret = lp8788_buck1p= lp8788_buck1p= u8l2_get_voltage_sref">l" class="sref">id = lp= lp= u8l2_get_voltage_sdisf">l" class="sref">id = lp= lp= u8l l " class="sref">id = l p= l p= u8lp8788_buck_enable_tiref">lp8788_bucss="sref">ret = lp8788_buca         } else {
u8ret = u8ret = ret;
 160
(struct u8 233u8"ss="s" 284u8id e  255u8addr, &amel" class="sreoplp8788_update_biel" class="sreopl claa         } else {
 236u8id ARRAY_SIZEp8788_update_biARRAY_SIZEsref">rdev_get_id 257u8lp8788_update_bip878_tf">l_bucss="sref">ret =  298u8ret REGULATOR_VOLTAGEp8788_update_biREGULATOR_VOLTAGE" cla         } else {
 259u8ret THIS_MODULEp8788_update_biTHIS_MODULE" cla         } else {
 230u8lplpret _S" claENass="P8788_BUCK2_DVS_S" claENass="" cla         } else {
 251u8lp; lp; ret _S" claENass="1+code=LP8788_VOUT_M" claENass="1+c" cla         } else {
 284u8"ss="2" 255u8id e  236u8addr, &amel" class="sreoplp8788_update_biel" class="sreopl claa         } else {
 257u8id ARRAY_SIZEp8788_update_biARRAY_SIZEsref">rdev_get_id 298u8lp8788_update_bip878_tf">l_bucss="sref">ret =  259u8ret REGULATOR_VOLTAGEp8788_update_biREGULATOR_VOLTAGE" cla         } else {
 230u8ret THIS_MODULEp8788_update_biTHIS_MODULE" cla         } else {
 251u8lplpret _S" claENass="P8788_BUCK2_DVS_S" claENass="" cla         } else {
 302u8lp; lp; ret _S" claENass="2+code=LP8788_VOUT_M" claENass="2+c" cla         } else {
 255u8"ss="3" 236u8id e  257u8addr, &amel" class="34eoplp8788_update_biel" class="34eopl claa         } else {
 298u8id ARRAY_SIZEp8788_update_biARRAY_SIZEsref">rdev_get_id 259u8lp8788_update_bip878_tf">l_bucss="sref">ret =  230u8ret REGULATOR_VOLTAGEp8788_update_biREGULATOR_VOLTAGE" cla         } else {
 251u8ret THIS_MODULEp8788_update_biTHIS_MODULE" cla         } else {
 302u8ret _S" claK2" 3ass="ode=LP8788_VOUT_M" claK2" 3ass="" cla         } else {
 233u8ret _S" claef="+code=LP8788_VOUT_M" class="sref">L         } else {
 284u8lplpret _S" claENass="P8788_BUCK2_DVS_S" claENass="" cla         } else {
 255u8lp; lp; ret _S" claENass="3+code=LP8788_VOUT_M" claENass="3sref">L         } else {
 298u8"ss="4" 259u8id e L         } else {
 230u8addr, &amel" class="34eoplp8788_update_biel" class="34eopl claa         } else {
 251u8id ARRAY_SIZEp8788_update_biARRAY_SIZEsref">rdev_get_id 302u8lp8788_update_bip878_tf">l_bucss="sref">ret =  233u8ret REGULATOR_VOLTAGEp8788_update_biREGULATOR_VOLTAGE" cla         } else {
 284u8ret THIS_MODULEp8788_update_biTHIS_MODULE" cla         } else {
 255u8ret _S" claK2" 4ass="ode=LP8788_VOUT_M" claK2" 4ass="" cla         } else {
 236u8ret _S" claef="+code=LP8788_VOUT_M" class="sref">L         } else {
 257u8lplpret _S" claENass="P8788_BUCK2_DVS_S" claENass="" cla         } else {
 298u8lp; lp; ret _S" claENass="4+code=LP8788_VOUT_M" claENass="4sref">L         } else {
ret;
 281
 272static in_gpiop 309        struct lp8788_buck * 272static ingpio href="+code=bugpioclas,2char">lp8788_buck83" ode=regulator_d83" _bucss="sref">ret)
 309        strucdevicl2_get_voltage_sdeviclsref">lp8788_buck(rs="sref">ret  *buck->buck->ss="sref">ret;
 295
 297        if gpiopss="sref href="+code=bugpiopss="srefsref">rdev_get_id 257buck->rdev_get_id,="spande=regulatring">"in"sref gpio: %d\n"static ingpio href="+code=bugpioclasss="sref">val);
 298                return -EINVAL;
 305}
 160
 304        retur"srm_gpioprdev_get_id,="2static ingpio href="+code=bugpioclas,2"2static inDVS_LOW href="+code=buDVS_LOWclas,2"2static in83" ode=regulator_d83" _bucs"sref">EINVAL;
 305}
 303
 307static int  309        struct lp8788_buck * 303
 255 310        enum lp8788_buck_id ret)
 309        struct lp8788_buckpcode=rdev_get_drvdapcodesref"s="sref">ret  *buck->buck-&gpcode=rdev_get_drvdapcodesref"sref">EINVAL;
lp8788_buckb1_83" ode=regulator_db1_83" _bucss="spande=regulatring">"_M" claK1_DVS"EINVAL;
lp8788_buckb2_83" ode=regulator_db2_83" _buc[]ss= ="spande=regulatring">"_M" claK2_DVS1""_M" claK2_DVS2"ret;
> 307static ini,="2static ingpio href="+code=bugpioclas,2"2static inn ret;
 281
 226        switch,  209        case         default:
 254static ingpio href="+code=bugpioclas"s="sref">ret pcode=rdev_get_drvdapcodesrefs="sref">buck-&gss="srdvs href="+code=buck" srdvssrefs="sref">buck-&ggpio href="+code=bugpioclasss="sref">ret;
 255static inn ret _gpiop *static ingpio href="+code=bugpioclas,2"2static inb1_83" ode=regulator_db1_83" _bucs"sref">EINVAL;
 236 301        if (ret)
 257                return ret;
 248
 259ret  *buck-&gdvs href="+code=budvssref"s="sref">ret pcode=rdev_get_drvdapcodesrefs="sref">buck-&gss="srdvs href="+code=buck" srdvssrefss="sref">ret;
 230                break;
 209        case         default:
 302        switch,"s=0 ref">val &,"2lDVS_M) >>_M" claNUMass="2+DVSode=LP8788_VOUT_M" claNUMass="2+DVSef">"ref">val &,++a           } else {
 233 254static ingpio href="+code=bugpioclas"s="sref">ret pcode=rdev_get_drvdapcodesrefs="sref">buck-&gss="2rdvs href="+code=buck" 2rdvssrefs="sref">buck-&ggpio href="+code=bugpioclas[f">val &,]            break;
 254       "2static inn ret _gpiop *static ingpio href="+code=bugpioclas,2"2static inb2_83" ode=regulator_db2_83" _buc[f">val &,]s"sref">EINVAL;
 255 301        if (ret)
 236                return ret;
 257 305}
 298ret  *buck-&gdvs href="+code=budvssref"s="sref">ret pcode=rdev_get_drvdapcodesrefs="sref">buck-&gss="2rdvs href="+code=buck" 2rdvssrefss="sref">ret;
 259                break;
 263        default:
 231                break;
 305}
 303
      0            break;
 305}
 306
 307static int  309        struct lp8788_buck * 310        enum lp8788_buck_id ret)
 309        struct lp8788_buckpcode=rdev_get_drvdapcodesref"s="sref">ret  *buck->buck-&gpcode=rdev_get_drvdapcodesref"sref">EINVAL;
buck-&g  u8) >>_M" class="1+DVS_SEL+code=LP8788_VOUT_M" class="1+DVS_SEL+cclas,2"2static in_M" class="2+DVS_SEL+code=LP8788_VOUT_M" class="2+DVS_SEL+cclas }ss="sref">ret;
buck-&g  u8) >>_M" class="1+DVS_PINode=LP8788_VOUT_M" class="1+DVS_PINclas,2"2static in_M" class="2+DVS_PINode=LP8788_VOUT_M" class="2+DVS_PINclas }ss="sref">ret;
buck-&g  u8 263 263) >>_M" class="1+DVS_I2Code=LP8788_VOUT_M" class="1+DVS_I2Cclas,2"2static in_M" class="2+DVS_I2Code=LP8788_VOUT_M" class="2+DVS_I2Cclas }ss="sref">ret;
 303
/* no dvsafor/ss="3, 4 */ 303
 301        ifi id e  id e ss="sref">ret)
 236      0            break;
/* no dvsaprefform code, then dvsawill be selected by I2Ca> gistak; */ 303
 297        if pcode=rdev_get_drvdapcodesrefss="sref">ret)
 230id ss="> 263 263EINVAL;
 281
 2901        ifi id e         if pcode=rdev_get_drvdapcodesrefs="sref">buck-&gss="srdvs href="+code=buck" srdvssref) ||e="L281"> 281
 233        ifi id e         if pcode=rdev_get_drvdapcodesrefs="sref">buck-&gss="2rdvs href="+code=buck" 2rdvssref)ss="sref">ret)
 284id ss="> 263 263EINVAL;
 295
 29a>        struct  *static in> ret)
 257id ss="> 263 263EINVAL;
 248
 269        return lp8788_update_bits(buck->lpEL" class="sDVS_SELode=LP8788_VOUT_M" class="sDVS_SEL" class="sref">lp; static in>  303
 230u8static in> EINVAL;
 281
id ss="> 263 263        default:
 269        return lp8788_update_bits(buck->lpEL" class="sDVS_SELode=LP8788_VOUT_M" class="sDVS_SEL" class="sref">lp; static in>  303
 254       aaaaaaaaaass="sref">u8 263 263static in> EINVAL;
 305}
 306
ret __devini 307static int  309        strucprefform_cevicl2_get_voltage_sprefform_ceviclsref">lp8788_buckpcss="sref">ret)
 309        struct lp8788_buckt;ret ts="sref">buck->.ss="sref">u8s"sref">EINVAL;
> 307static ini id pcs="sref">buck-&gi EINVAL;
 309        struct lp8788_buck *EINVAL;
(struct u8ret;
(struct lp8788_buckrdea href="+code=rdt"sref">ss="sref">ret;
> 307static inn ret;
 295
 *ret tbuck->, sizeof"> 309        struct lpGFP_KERNELode=LP8788_VOUTGFP_KERNELef">s"sref">EINVAL;
 297        if  *ret)
 298                return NOMEcode=LP8788_VOUT NOMEc class="sref">ret;
ret;
buck-&g>(buck->ret = ret;
 281
buck-&gn ret t  *static in> ret;
 301        if (ret)
 284                return ret;
 295
cf _buck_enable_ticf " cl.ss="sref">u8rs="sref">ret t;buck->ss="sref">ret;
cf _buck_enable_ticf " cl.ss="sref">u8rs="sref">ret t;buck-&gpcode=rdev_get_drvdapcodesref"?="sref">ret t;buck-&gpcode=rdev_get_drvdapcodesrefs="sref">buck-&gss="rdode=rdev_get_drvdass="rdodeclas["2static in> ret NULLode=LP8788_VOUTNULLef">ss="sref">ret;
cf _buck_enable_ticf " cl.ss="sref">u8rdode=rdev_get_drvdadtrdodeef">rs="sref">ret  *EINVAL;
cf _buck_enable_ticf " cl.ss="sref">u8ret t;buck-&gr EINVAL;
 160
buck-&grdea href="+code=rdt"sref">ass="sref">id =  gistak href="+code=rdt  gistaksref""sref">addr, &amel" class="_descode=regulator_del" class="=desc" cl["2static in> addr, &amcf _buck_enable_ticf " clsss="sref">ret;
 29">addr, &amIS_ERR_buck_enable_tiIS_ERRsref"lp8788_buckrdea href="+code=rdt"sref">)s           } else {
 233buck-&gn ret PTR_ERR_buck_enable_tiPTR_ERRsref"lp8788_buckrdea href="+code=rdt"sref">)ss="sref">ret;
 284ret trdev_get_idbuck->, 7spande=regulatring">"ss="%d ret;
 255static ini static inn ret;
 236                return ret;
 305}
 248
>(buck-&gass="sref">id =dea href="+code=rdt"sref">ss="sref">ret;
buck-&gprefform_ss="drvcode=rdev_get_drvdaprefform_ss="drvcodep8788_update_bits,2"2static inb*ret;
 281
      0            break;
 305}
 305}
 272static in_=deaexiu8 309        strucprefform_cevicl2_get_voltage_sprefform_ceviclsref">lp8788_buckpcss="sref">ret)
 309        struct lp8788_buck *id prefform_gs="drvcode=rdev_get_drvdaprefform_gs="drvcodep8788_update_bitssss="sref">ret;
 248
prefform_ss="drvcode=rdev_get_drvdaprefform_ss="drvcodep8788_update_bits,2"2static inNULLode=LP8788_VOUTNULLef">sss="sref">ret;
buck->  gistak href="+code=rdt  gistaksref"lp8788_buck *buck-&gsss="sref">ret;
 281
      0            break;
 305}
 305}
u8 305}
u8ret = ret;
u8ret __devexi<_;rdev_get_idu82_get_voltage_sc5" class{="L305"> 305}
 259u8u8ret;
 230u8ret THIS_MODULEp8788_update_biTHIS_MODULE" cla         } else {
ret;
 303
 307static in__iniret)
 305}
                returprefform_c5=> gistak href="+code=rdprefform_c5=> gistaksref""sref">addr, &amel" class="_d52_get_voltage_sel" class="=c5" clsss="sref">ret;
 305}
addr, &amsubsys=inirdev_get_idret;
ret;
u8ret)
 305}
buck-&gprefform_c5=un> gistak href="+code=rdprefform_c5=un> gistaksref""sref">addr, &amel" class="_d52_get_voltage_sel" class="=c5" clsss="sref">ret;
 305}
addr, &ammodule=exirdev_get_idret;
 295
rdev_get_idspande=regulatring">"TI _S" cl ss=" D95ret;
rdev_get_idspande=regulatring">"Milo Kim"ret;
addr, &amMODULEaLICENSEp8788_update_biMODULEaLICENSEsref">spande=regulatring">"GPL"ret;
rdev_get_idspande=regulatring">"prefform:rivers/regu"ret;



The original LXR software by th09 http://sourceforge.net/projects/lxk >LXR communi,2this experimental /a>;ion by mailto:lxk@id=ux.no=rexk@id=ux.no" cl.
exk.id=ux.no kindly hosted by http://www.redpill-id=pro.no=rRedpill Ld=pro ASsref, provider of Ld=ux consulting and oper"L3ons servicls since 1995.