linux/drivers/pcmcia/i82092.c
<<
19<2alu/span2 alu/form2 alua 19<2al href="../linux+v3.7.9/drivers/pcmcia/i82092.c">19<2aluimg src="../.static/gfx/right.png" alt=">>">19u/span2 19uspan class="lxr_search">19<219<2aluinput typ hidden" nam navtarget" .19" ">19<2aluinput typ text" nam search" id search">19<2alubutt3.4typ submit">Search19<2alPrefs alu/a>19u/span2 <2al lu/div2 <2al luform ac2ion="ajax+*" method="post" onsubmit="return false;">19uinput typ hidden" nam ajax_lookup" id ajax_lookup" .19" ">1<2al lu/form2 1<2al ludiv class="headingbott3m"> udiv id file_contents"2
l l1u/a>uspan class="comment">/*lu/span2
l l2u/a>uspan class="comment"> * Driver for Intel I82092AA PCI-PCMCIA bridge.u/span2
l l3u/a>uspan class="comment"> *u/span2
l l4u/a>uspan class="comment"> * (C) 2001 Red Hat, Inc.u/span2
l l5u/a>uspan class="comment"> *u/span2
l l6u/a>uspan class="comment"> * Author: Arjan Van De Ven <arjanv@redhat.com>u/span2
l l7u/a>uspan class="comment"> * Loosly based 3.4i82365.c from the pcmcia-cs packageu/span2
l l8u/a>uspan class="comment"> */u/span2
l l9u/a>1l /opta>#include <linux/kernel.hpta>>1l 11pta>#include <linux/module.hpta>>1l 12pta>#include <linux/pci.hpta>>1l 13pta>#include <linux/init.hpta>>1l 14pta>#include <linux/workqueue.hpta>>1l 15pta>#include <linux/interrupt.hpta>>1l 16pta>#include <linux/device.hpta>>1l 17u/a>1l 18pta>#include <pcmcia/ss.hpta>>1l 19u/a>1l 2opta>#include <asm/io.hpta>>1l 21u/a>1l 22pta>#include "i82092aa.hpta>"1l 23pta>#include "i82365.hpta>"1l 24u/a>1l 25u/a>ua href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSEu/a>(uspan class="string">"GPL"l 26u/a>1l 27u/a>uspan class="comment">/*lPCI core routines */u/span2
l 28pta>static ua href="+code=DEFINE_PCI_DEVICE_TABLE" class="sref">DEFINE_PCI_DEVICE_TABLEu/a>(ua href="+code=i82092aa_pci_ids" class="sref">i82092aa_pci_idsu/a>) = {
l 29u/a>        { ua href="+code=PCI_DEVICE" class="sref">PCI_DEVICEu/a>(ua href="+code=PCI_VENDOR_ID_INTEL" class="sref">PCI_VENDOR_ID_INTELu/a>, ua href="+code=PCI_DEVICE_ID_INTEL_82092AA_0" class="sref">PCI_DEVICE_ID_INTEL_82092AA_0u/a>) },
l 30u/a>        { }
l 31u/a>};1l 32u/a>ua href="+code=MODULE_DEVICE_TABLE" class="sref">MODULE_DEVICE_TABLEu/a>(ua href="+code=pci" class="sref">pciu/a>, ua href="+code=i82092aa_pci_ids" class="sref">i82092aa_pci_idsu/a>);1l 33u/a>1l 34pta>static struct ua href="+code=pci_driver" class="sref">pci_driveru/a> ua href="+code=i82092aa_pci_driver" class="sref">i82092aa_pci_driveru/a> = {
l 35u/a>        .ua href="+code=nam
" class="sref">nam
u/a>           = uspan class="string">"i82092aa"l 36u/a>        .ua href="+code=id_tabl
" class="sref">id_tabl
u/a>       = ua href="+code=i82092aa_pci_ids" class="sref">i82092aa_pci_idsu/a>,
l 37u/a>        .ua href="+code=prob
" class="sref">prob
u/a>          = ua href="+code=i82092aa_pci_prob
" class="sref">i82092aa_pci_prob
u/a>,
l 38u/a>        .ua href="+code=remov
" class="sref">remov
u/a>         = ua href="+code=__devexit_p" class="sref">__devexit_pu/a>(ua href="+code=i82092aa_pci_remov
" class="sref">i82092aa_pci_remov
u/a>),
l 39u/a>};1l 40u/a>1l 41u/a>1l 42u/a>uspan class="comment">/*lthe pccard structure and its func2ions */u/span2
l 43pta>static struct ua href="+code=pccard_opera2ions" class="sref">pccard_opera2ionsu/a> ua href="+code=i82092aa_opera2ions" class="sref">i82092aa_opera2ionsu/a> = {
l 44u/a>        .ua href="+code=init" class="sref">initu/a>                   = ua href="+code=i82092aa_init" class="sref">i82092aa_initu/a>,
l 45u/a>        .ua href="+code=get_status" class="sref">get_statusu/a>             = ua href="+code=i82092aa_get_status" class="sref">i82092aa_get_statusu/a>,
l 46u/a>        .ua href="+code=set_socket" class="sref">set_socketu/a>             = ua href="+code=i82092aa_set_socket" class="sref">i82092aa_set_socketu/a>,
l 47u/a>        .ua href="+code=set_io_map" class="sref">set_io_mapu/a>             = ua href="+code=i82092aa_set_io_map" class="sref">i82092aa_set_io_mapu/a>,
l 48u/a>        .ua href="+code=set_mem_map" class="sref">set_mem_mapu/a>            = ua href="+code=i82092aa_set_mem_map" class="sref">i82092aa_set_mem_mapu/a>,
l 49u/a>};1l 50u/a>1l 51u/a>uspan class="comment">/*lThe card can do up to 4 sockets, allocate a structure for each oflthem */u/span2
l 52u/a>1l 53pta>struct ua href="+code=socket_info" class="sref">socket_infou/a> {
l 54u/a>        int     ua href="+code=number" class="sref">numberu/a>;1l 55u/a>        int     ua href="+code=card_stat
" class="sref">card_stat
u/a>;     uspan class="comment">/*l 0 = no socket,u/span2
l 56u/a>uspan class="comment">                                    1 = empty socket,lu/span2
l 57u/a>uspan class="comment">                                    2 = card but not initialized,u/span2
l 58u/a>uspan class="comment">                                    3 = opera2ional card */u/span2
l 59u/a>        unsigned int ua href="+code=io_base" class="sref">io_baseu/a>;   uspan class="comment">/*lbase io address oflthe socket */u/span2
l 60u/a>        
l 61u/a>        struct ua href="+code=pcmcia_socket" class="sref">pcmcia_socketu/a> ua href="+code=socket" class="sref">socketu/a>;1l 62u/a>        struct ua href="+code=pci_dev" class="sref">pci_devu/a> *ua href="+code=dev" class="sref">devu/a>;    uspan class="comment">/*lThe PCI device for the socket */u/span2
l 63u/a>};1l 64u/a>1l 65pta>#define ua href="+code=MAX_SOCKETS" class="sref">MAX_SOCKETSu/a> 41l 66pta>static struct ua href="+code=socket_info" class="sref">socket_infou/a> ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=MAX_SOCKETS" class="sref">MAX_SOCKETSu/a>];1l 67pta>static int ua href="+code=socket_count" class="sref">socket_countu/a>;  uspan class="comment">/*lshortcut */u/span2                                                                                1l 68u/a>1l 69u/a>1l 70pta>static int ua href="+code=__devinit" class="sref">__devinitu/a> ua href="+code=i82092aa_pci_prob
" class="sref">i82092aa_pci_prob
u/a>(struct ua href="+code=pci_dev" class="sref">pci_devu/a> *ua href="+code=dev" class="sref">devu/a>, const struct ua href="+code=pci_device_id" class="sref">pci_device_idu/a> *ua href="+code=id" class="sref">idu/a>)1l 71u/a>{
l 72u/a>        unsigned char ua href="+code=configbyt
" class="sref">configbyt
u/a>;1l 73u/a>        int ua href="+code=i" class="sref">iu/a>, ua href="+code=ret" class="sref">retu/a>;1l 74u/a>        
l 75u/a>        ua href="+code=enter" class="sref">enteru/a>(uspan class="string">"i82092aa_pci_prob
"l 76u/a>        
l 77u/a>        if ((ua href="+code=ret" class="sref">retu/a> = ua href="+code=pci_enabl
_device" class="sref">pci_enabl
_deviceu/a>(ua href="+code=dev" class="sref">devu/a>)))1l 78u/a>                return ua href="+code=ret" class="sref">retu/a>;1l 79u/a>                
l 80u/a>        ua href="+code=pci_read_config_byt
" class="sref">pci_read_config_byt
u/a>(ua href="+code=dev" class="sref">devu/a>, 0x40, &ua href="+code=configbyt
" class="sref">configbyt
u/a>);  uspan class="comment">/*lPCI Configura2ion Control */u/span2
l 81u/a>        switch(ua href="+code=configbyt
" class="sref">configbyt
u/a>&6) {
l 82u/a>                case 0:
l 83u/a>                        ua href="+code=socket_count" class="sref">socket_countu/a> = 2;1l 84u/a>                        break;1l 85u/a>                case 2:
l 86u/a>                        ua href="+code=socket_count" class="sref">socket_countu/a> = 1;1l 87u/a>                        break;1l 88u/a>                case 4:
l 89u/a>                case 6:
l 90u/a>                        ua href="+code=socket_count" class="sref">socket_countu/a> = 4;1l 91u/a>                        break;1l 92u/a>                        1l 93u/a>                default:
l 94u/a>                        ua href="+code=printk" class="sref">printku/a>(ua href="+code=KERN_ERR" class="sref">KERN_ERRu/a> uspan class="string">"i82092aa: Oops, you did something we didn't think of.\n"l 95u/a>                        ua href="+code=ret" class="sref">retu/a> = -ua href="+code=EIO" class="sref">EIOu/a>;1l 96u/a>                        goto ua href="+code=err_out_disabl
" class="sref">err_out_disabl
u/a>;1l 97u/a>        }
l 98u/a>        ua href="+code=printk" class="sref">printku/a>(ua href="+code=KERN_INFO" class="sref">KERN_INFOu/a> uspan class="string">"i82092aa: configured as a %d socket device.\n"socket_countu/a>);1l 99u/a>1l100u/a>        if (!ua href="+code=request_region" class="sref">request_regionu/a>(ua href="+code=pci_resource_start" class="sref">pci_resource_startu/a>(ua href="+code=dev" class="sref">devu/a>, 0), 2, uspan class="string">"i82092aa"l101u/a>                ua href="+code=ret" class="sref">retu/a> = -ua href="+code=EBUSY" class="sref">EBUSYu/a>;1l102u/a>                goto ua href="+code=err_out_disabl
" class="sref">err_out_disabl
u/a>;1l103u/a>        }
l104u/a>        
l105u/a>        for (ua href="+code=i" class="sref">iu/a> = 0;ua href="+code=i" class="sref">iu/a><socket_countu/a>;ua href="+code=i" class="sref">iu/a>++) {
l106u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=card_stat
" class="sref">card_stat
u/a> = 1; uspan class="comment">/*l1 = present but empty */u/span2
l107u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=io_base" class="sref">io_baseu/a> = ua href="+code=pci_resource_start" class="sref">pci_resource_startu/a>(ua href="+code=dev" class="sref">devu/a>, 0);1l108u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>.ua href="+code=features" class="sref">featuresu/a> |= ua href="+code=SS_CAP_PCCARD" class="sref">SS_CAP_PCCARDu/a>;1l109u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>.ua href="+code=map_size" class="sref">map_sizeu/a> = 0x1000;1l110u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>.ua href="+code=irq_mask" class="sref">irq_masku/a> = 0;1l111u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>.ua href="+code=pci_irq" class="sref">pci_irqu/a>  = ua href="+code=dev" class="sref">devu/a>->ua href="+code=irq" class="sref">irqu/a>;1l112u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>.ua href="+code=cb_dev" class="sref">cb_devu/a>  = ua href="+code=dev" class="sref">devu/a>;1l113u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>.ua href="+code=owner" class="sref">owneru/a> = ua href="+code=THIS_MODULE" class="sref">THIS_MODULEu/a>;1l114u/a>1l115u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=number" class="sref">numberu/a> = ua href="+code=i" class="sref">iu/a>;1l116u/a>                1l117u/a>                if (ua href="+code=card_present" class="sref">card_presentu/a>(ua href="+code=i" class="sref">iu/a>)) {
l118u/a>                        ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=card_stat
" class="sref">card_stat
u/a> = 3;1l119u/a>                        ua href="+code=dprintk" class="sref">dprintku/a>(ua href="+code=KERN_DEBUG" class="sref">KERN_DEBUGu/a> uspan class="string">"i82092aa: slot %i is occupied\n"iu/a>);1l120u/a>                } else {
l121u/a>                        ua href="+code=dprintk" class="sref">dprintku/a>(ua href="+code=KERN_DEBUG" class="sref">KERN_DEBUGu/a> uspan class="string">"i82092aa: slot %i is vacant\n"iu/a>);1l122u/a>                }
l123u/a>        }
l124u/a>                
l125u/a>        uspan class="comment">/*lNow, specifiy that all interrupts are to be done as PCI interrupts */u/span2
l126u/a>        ua href="+code=configbyt
" class="sref">configbyt
u/a> = 0xFF; uspan class="comment">/*lbitmask, one bit per event,l1 = PCI interrupt, 0 = ISA interrupt */u/span2
l127u/a>        ua href="+code=pci_write_config_byt
" class="sref">pci_write_config_byt
u/a>(ua href="+code=dev" class="sref">devu/a>, 0x50, ua href="+code=configbyt
" class="sref">configbyt
u/a>); uspan class="comment">/*lPCI Interrupt Routing Register */u/span2
l128u/a>1l129u/a>        uspan class="comment">/*lRegister the interrupt handler */u/span2
l130u/a>        ua href="+code=dprintk" class="sref">dprintku/a>(ua href="+code=KERN_DEBUG" class="sref">KERN_DEBUGu/a> uspan class="string">"Requesting interrupt %i \n"devu/a>->ua href="+code=irq" class="sref">irqu/a>);1l131u/a>        if ((ua href="+code=ret" class="sref">retu/a> = ua href="+code=request_irq" class="sref">request_irqu/a>(ua href="+code=dev" class="sref">devu/a>->ua href="+code=irq" class="sref">irqu/a>, ua href="+code=i82092aa_interrupt" class="sref">i82092aa_interruptu/a>, ua href="+code=IRQF_SHARED" class="sref">IRQF_SHAREDu/a>, uspan class="string">"i82092aa"i82092aa_interruptu/a>))) {
l132u/a>                ua href="+code=printk" class="sref">printku/a>(ua href="+code=KERN_ERR" class="sref">KERN_ERRu/a> uspan class="string">"i82092aa: Failed to register IRQ %d, aborting\n"devu/a>->ua href="+code=irq" class="sref">irqu/a>);1l133u/a>                goto ua href="+code=err_out_free_res" class="sref">err_out_free_resu/a>;1l134u/a>        }
l135u/a>
l136u/a>        ua href="+code=pci_set_drvdata" class="sref">pci_set_drvdatau/a>(ua href="+code=dev" class="sref">devu/a>, &ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>);1l137u/a>1l138u/a>        for (ua href="+code=i" class="sref">iu/a> = 0; ua href="+code=i" class="sref">iu/a><socket_countu/a>; ua href="+code=i" class="sref">iu/a>++) {
l139u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>.ua href="+code=dev" class="sref">devu/a>.ua href="+code=parent" class="sref">parentu/a> = &ua href="+code=dev" class="sref">devu/a>->ua href="+code=dev" class="sref">devu/a>;1l140u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>.ua href="+code=ops" class="sref">opsu/a> = &ua href="+code=i82092aa_opera2ions" class="sref">i82092aa_opera2ionsu/a>;1l141u/a>                ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>.ua href="+code=resource_ops" class="sref">resource_opsu/a> = &ua href="+code=pccard_nonstatic_ops" class="sref">pccard_nonstatic_opsu/a>;1l142u/a>                ua href="+code=ret" class="sref">retu/a> = ua href="+code=pcmcia_register_socket" class="sref">pcmcia_register_socketu/a>(&ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>);1l143u/a>                if (ua href="+code=ret" class="sref">retu/a>) {
l144u/a>                        goto ua href="+code=err_out_free_sockets" class="sref">err_out_free_socketsu/a>;1l145u/a>                }
l146u/a>        }
l147u/a>1l148u/a>        ua href="+code=leav
" class="sref">leav
u/a>(uspan class="string">"i82092aa_pci_prob
"l149u/a>        return 0;1l150u/a>1l151u/a>ua href="+code=err_out_free_sockets" class="sref">err_out_free_socketsu/a>:
l152u/a>        if (ua href="+code=i" class="sref">iu/a>) {
l153u/a>                for (ua href="+code=i" class="sref">iu/a>--;ua href="+code=i" class="sref">iu/a>>=0;ua href="+code=i" class="sref">iu/a>--) {
l154u/a>                        ua href="+code=pcmcia_unregister_socket" class="sref">pcmcia_unregister_socketu/a>(&ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" class="sref">iu/a>].ua href="+code=socket" class="sref">socketu/a>);1l155u/a>                }
l156u/a>        }
l157u/a>        ua href="+code=free_irq" class="sref">free_irqu/a>(ua href="+code=dev" class="sref">devu/a>->ua href="+code=irq" class="sref">irqu/a>, ua href="+code=i82092aa_interrupt" class="sref">i82092aa_interruptu/a>);1l158u/a>ua href="+code=err_out_free_res" class="sref">err_out_free_resu/a>:
l159u/a>        ua href="+code=release_region" class="sref">release_regionu/a>(ua href="+code=pci_resource_start" class="sref">pci_resource_startu/a>(ua href="+code=dev" class="sref">devu/a>, 0), 2);1l160u/a>ua href="+code=err_out_disabl
" class="sref">err_out_disabl
u/a>:
l161u/a>        ua href="+code=pci_disabl
_device" class="sref">pci_disabl
_deviceu/a>(ua href="+code=dev" class="sref">devu/a>);1l162u/a>        return ua href="+code=ret" class="sref">retu/a>;                     1l163u/a>}1l164u/a>1l165pta>static void ua href="+code=__devexit" class="sref">__devexitu/a> ua href="+code=i82092aa_pci_remov
" class="sref">i82092aa_pci_remov
u/a>(struct ua href="+code=pci_dev" class="sref">pci_devu/a> *ua href="+code=dev" class="sref">devu/a>)1l166pta>{
l167u/a>        struct ua href="+code=pcmcia_socket" class="sref">pcmcia_socketu/a> *ua href="+code=socket" class="sref">socketu/a> = ua href="+code=pci_get_drvdata" class="sref">pci_get_drvdatau/a>(ua href="+code=dev" class="sref">devu/a>);1l168u/a>1l169u/a>        ua href="+code=enter" class="sref">enteru/a>(uspan class="string">"i82092aa_pci_remov
"l170u/a>        
l171u/a>        ua href="+code=free_irq" class="sref">free_irqu/a>(ua href="+code=dev" class="sref">devu/a>->ua href="+code=irq" class="sref">irqu/a>, ua href="+code=i82092aa_interrupt" class="sref">i82092aa_interruptu/a>);1l172u/a>1l173u/a>        if (ua href="+code=socket" class="sref">socketu/a>)1l174u/a>                ua href="+code=pcmcia_unregister_socket" class="sref">pcmcia_unregister_socketu/a>(ua href="+code=socket" class="sref">socketu/a>);1l175u/a>
l176u/a>        ua href="+code=leav
" class="sref">leav
u/a>(uspan class="string">"i82092aa_pci_remov
"l177u/a>}1l178u/a>1l179u/a>static ua href="+code=DEFINE_SPINLOCK" class="sref">DEFINE_SPINLOCKu/a>(ua href="+code=port_lock" class="sref">port_locku/a>);1l180u/a>1l181u/a>uspan class="comment">/*lbasic value read/write func2ions */u/span2
l182u/a>1l183pta>static unsigned char ua href="+code=indirect_read" class="sref">indirect_readu/a>(int ua href="+code=socket" class="sref">socketu/a>, unsigned short ua href="+code=reg" class="sref">regu/a>)1l184u/a>{
l185u/a>        unsigned short int ua href="+code=port" class="sref">portu/a>;1l186u/a>        unsigned char ua href="+code=val" class="sref">valu/a>;1l187u/a>        unsigned long ua href="+code=flags" class="sref">flagsu/a>;1l188u/a>        ua href="+code=spin_lock_irqsav
" class="sref">spin_lock_irqsav
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l189u/a>        ua href="+code=reg" class="sref">regu/a> += ua href="+code=socket" class="sref">socketu/a> * 0x40;1l190u/a>        ua href="+code=port" class="sref">portu/a> = ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=socket" class="sref">socketu/a>].ua href="+code=io_base" class="sref">io_baseu/a>;1l191u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=reg" class="sref">regu/a>,ua href="+code=port" class="sref">portu/a>);1l192u/a>        ua href="+code=val" class="sref">valu/a> = ua href="+code=inb" class="sref">inbu/a>(ua href="+code=port" class="sref">portu/a>+1);1l193u/a>        ua href="+code=spin_unlock_irqrestor
" class="sref">spin_unlock_irqrestor
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l194u/a>        return ua href="+code=val" class="sref">valu/a>;1l195u/a>}1l196u/a>1l197u/a>#if 01l198pta>static unsigned short ua href="+code=indirect_read16" class="sref">indirect_read16u/a>(int ua href="+code=socket" class="sref">socketu/a>, unsigned short ua href="+code=reg" class="sref">regu/a>)1l199u/a>{
l200u/a>        unsigned short int ua href="+code=port" class="sref">portu/a>;1l201u/a>        unsigned short ua href="+code=tmp" class="sref">tmpu/a>;1l202u/a>        unsigned long ua href="+code=flags" class="sref">flagsu/a>;1l203u/a>        ua href="+code=spin_lock_irqsav
" class="sref">spin_lock_irqsav
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l204u/a>        ua href="+code=reg" class="sref">regu/a>  = ua href="+code=reg" class="sref">regu/a> + ua href="+code=socket" class="sref">socketu/a> * 0x40;1l205u/a>        ua href="+code=port" class="sref">portu/a> = ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=socket" class="sref">socketu/a>].ua href="+code=io_base" class="sref">io_baseu/a>;1l206u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=reg" class="sref">regu/a>,ua href="+code=port" class="sref">portu/a>);1l207u/a>        ua href="+code=tmp" class="sref">tmpu/a> = ua href="+code=inb" class="sref">inbu/a>(ua href="+code=port" class="sref">portu/a>+1);1l208u/a>        ua href="+code=reg" class="sref">regu/a>++;1l209u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=reg" class="sref">regu/a>,ua href="+code=port" class="sref">portu/a>);1l210u/a>        ua href="+code=tmp" class="sref">tmpu/a> = ua href="+code=tmp" class="sref">tmpu/a> | (ua href="+code=inb" class="sref">inbu/a>(ua href="+code=port" class="sref">portu/a>+1)<<8);1l211u/a>        ua href="+code=spin_unlock_irqrestor
" class="sref">spin_unlock_irqrestor
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l212u/a>        return ua href="+code=tmp" class="sref">tmpu/a>;1l213u/a>}1l214u/a>#endif1l215u/a>
l216pta>static void ua href="+code=indirect_write" class="sref">indirect_writeu/a>(int ua href="+code=socket" class="sref">socketu/a>, unsigned short ua href="+code=reg" class="sref">regu/a>, unsigned char ua href="+code=value" class="sref">valueu/a>)1l217u/a>{
l218u/a>        unsigned short int ua href="+code=port" class="sref">portu/a>;1l219u/a>        unsigned long ua href="+code=flags" class="sref">flagsu/a>;1l220u/a>        ua href="+code=spin_lock_irqsav
" class="sref">spin_lock_irqsav
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l221u/a>        ua href="+code=reg" class="sref">regu/a> = ua href="+code=reg" class="sref">regu/a> + ua href="+code=socket" class="sref">socketu/a> * 0x40;1l222u/a>        ua href="+code=port" class="sref">portu/a> = ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=socket" class="sref">socketu/a>].ua href="+code=io_base" class="sref">io_baseu/a>; 
l223u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=reg" class="sref">regu/a>,ua href="+code=port" class="sref">portu/a>);1l224u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=value" class="sref">valueu/a>,ua href="+code=port" class="sref">portu/a>+1);1l225u/a>        ua href="+code=spin_unlock_irqrestor
" class="sref">spin_unlock_irqrestor
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l226u/a>}1l227u/a>1l228pta>static void ua href="+code=indirect_setbit" class="sref">indirect_setbitu/a>(int ua href="+code=socket" class="sref">socketu/a>, unsigned short ua href="+code=reg" class="sref">regu/a>, unsigned char ua href="+code=mask" class="sref">masku/a>)1l229u/a>{
l230u/a>        unsigned short int ua href="+code=port" class="sref">portu/a>;1l23/a>        unsigned shchar ua href="+code=val" class="sref">valu/a>;1socke7rockets" class="sref">socke7rockets" claf="+c5= ua  L231">l2gke7rockets" claf="+c5= ua 2s/pcmcia/i82092.c#L133" 2d	 L123" class="line" nam
	 L203">l203u/a>        ua href="+code=spin_lock_irqsav
" class="sref">spin_lock_irqsav
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l204u/a>        ua href="+code=reg" class="sref">regu/a> = ua href="+code=reg" class="sref">regu/a> + ua href="+code=socket" class="sref">socketu/a> * 0x40;1l205u/a>        ua href="+code=port" class="sref">portu/a> = ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=socket" class="sref">socketu/a>].ua href="+code=io_base" class="sref">io_baseu/a>; 
l223u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=reg" class="sref">regu/a>,ua href="+code=port" class="sref">portu/a>);1l192u/a>        ua href="+code=val" class="sref">valu/a> = ua href="+code=inb" class="sref">inbu/a>(ua href="+code=port" class="sref">portu/a>+1);1l192u/a>        ua href="+ces" class="sref">f unsigned char ua href="+coport" class="sref">portu/a>+1);1l209u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=reg" class="sref">regu/a>,ua href="+code=port" class="sref">portu/a>);1l224u/a>        ua href="+code=outb" class="sreu/a>        ua href="+=value" class="sref">valueu/a>,ua href="+code=port" class="sref">portu/a>+1);1l211u/a>        ua href="+code=spin_unlock_irqrestor
" class="sref">spin_unlock_irqrestor
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l226u/a>}1l226u/a>}1l164u/a>1l165pindirect_re void ua href="+code=indirect_re void " class="sref">indirect_setbitu/a>(int ua href="+code=socket" class="sref">socketu/a>, unsigned short ua href="+code=reg" class="sref">regu/a>, unsigned char ua href="+code=mask" class="sref">masku/a>)1l166pta>{
l230u/a>        unsigned short int ua href="+code=port" class="sref">portu/a>;1l23/a>        unsigned shchar ua href="+code=val" class="sref">valu/a>;1l219u/a>        unsigned long ua href="+code=flags" class="sref">flagsu/a>;1l220u/a>        ua href="+code=spin_lock_irqsav
" class="sref">spin_lock_irqsav
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l221u/a>        ua href="+code=reg" class="sref">regu/a> = ua href="+code=reg" class="sref">regu/a> + ua href="+code=socket" class="sref">socketu/a> * 0x40;1l222u/a>        ua href="+code=port" class="sref">portu/a> = ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=socket" class="sref">socketu/a>].ua href="+code=io_base" class="sref">io_baseu/a>; 
l223u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=reg" class="sref">regu/a>,ua href="+code=port" class="sref">portu/a>);1l192u/a>        ua href="+code=val" class="sref">valu/a> = ua href="+code=inb" class="sref">inbu/a>(ua href="+code=port" class="sref">portu/a>+1);1l192u/a>        ua href="+c="sre= ~ class="sref">f unsigned char ua href="+coport" class="sref">portu/a>+1);1l223u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=reg" class="sref">regu/a>,ua href="+code=port" class="sref">portu/a>);1l224u/a>        ua href="+code=outb" class="sreu/a>        ua href="+=value" class="sref">valueu/a>,ua href="+code=port" class="sref">portu/a>+1);1l188u/a>        ua href="+code=spin_unlock_irqrestor
" class="sref">spin_unlock_irqrestor
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l226u/a>}1l180u/a>1l216pta>static voidt ua href="+code=indirect_ voidt " class="sref">indirect_setbitu/a>(int ua href="+code=socket" class="sref">socketu/a>, unsigned short ua href="+code=reg" cs="sref">socketu/a>,  unsigned char ua href="+code=value" class="sref">valueu/a>)1l166pta>{
l230u/a>        unsigned short int ua href="+code=port" class="sref">portu/a>;1l23/a>        unsigned shchar ua href="+code=val" class="sref">valu/a>;1l219u/a>        unsigned long ua href="+code=flags" class="sref">flagsu/a>;1l220u/a>        ua href="+code=spin_lock_irqsav
" class="sref">spin_lock_irqsav
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l221u/a>        ua href="+code=reg" class="sref">regu/a> = ua href="+code=reg" class="sref">regu/a> + ua href="+code=socket" class="sref">socketu/a> * 0x40;1l222u/a>        ua href="+code=port" class="sref">portu/a> = ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=socket" class="sref">socketu/a>].ua href="+code=io_base" class="sref">io_baseu/a>; 
io_baseu/a>; 
l224u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=reg" class="sref">regu/a>,ua href="+code=port" class="sref">portu/a>);1l192u/a>        ua href="+code=val" class="s unsigned char ua href="+codec="sre125"e=port" class="sref">portu/a>);1l224u/a>        ua href="+code=outb" class="sreu/a>        ua href="+=value" class="sref">valueu/a>,ua href="+code=port" class="sref">portu/a>+1);1portu/a>+1);1l204u/a>        ua href="+code=reg" class="sref">regu/a>++;1portu/a>+1);1l224u/a>        ua href="+code=outb" class="sref">outbu/a>(ua href="+code=reg" class="sref">regu/a>,ua href="+code=port" class="sref">portu/a>);1l192u/a>        ua href="+code=val" class="s unsigned char ua href="+codeode=ode=8e=port" class="sref">portu/a>);1l224u/a>        ua href="+code=outb" class="sreu/a>        ua href="+=value" class="sref">valueu/a>,ua href="+code=port" class="sref">portu/a>+1);1l188u/a>        ua href="+code=spin_unlock_irqrestor
" class="sref">spin_unlock_irqrestor
u/a>(&ua href="+code=port_lock" class="sref">port_locku/a>,ua href="+code=flags" class="sref">flagsu/a>);1l226u/a>}1l226u/a>}1l18simple hel"comnt">/*lbasic value read/write func2ions */u/span2
l18Externalinepor time,l23c#Lnoseconds. 120" bas= 8.33 MHzsic value read/write func2ions */u/span2
flagsu/a>);1l215u/a>
indirect_ href="+code=i820class==value" class="sref">valueu/a>)1l217u/a>{
l117u/a>      ycle_time_locku/a>,ua hrcycle_timef="+!=0=value" class="sref">valueu/a>)1l212u/a> href="+code=i820class=/">l117u/a>      ycle_time_locku/a>,ua hrcycle_timef="+flags" class="sref">flagsu/a>);1lags" class="sref">flagsu/a>);1l149u/a>        return 0;1l226u/a>}1l226u/a>}1l164u/a>1l18Iss="comment">/*lRnt">/*lbalitysic value read/write func2ions */u/span2
l196u/a>1or
" nam
_ ua href="+code=ir
" nam
_  clase" nam
	 L179">o92aa_interrupt" cua href="+code=i92aa_interrupt" c" class="sref">indirect_f">devu/a>->ua href="+coe" na*sref">indirect_">pci_devu/a> *ua href="+code=dev" class="sref">devu/a>)1l217u/a>{
indirect_fdevu/a>->ua hf="+flags" class="sref">flagsu/a>);1indirect_loopu/a><l149u/a>        return 0;1indirect_nt">/*ar ua href="+codnt">/*af="+cod L149">l149u/a>        return 0;1l182u/a>1indirect_ment"ua href="+code=erent"uf="+cosref">indirect_a>/*ua href="+code=spa>/*uaf="+= L149">l149u/a>        return 0;1l149u/a>        return 0;1l18"line2rrup(eav
u/a>(uspan errupt" ceav
u/);ic value read/write func2ions */u/span2
iu/a>--) {
lloopu/a><regu/a>++;1l117u/a>     loopu/a><iu/a>--) {
l               ua href="+code=printk" class="sref">printku/a>(ua href="+code=KERN_ERR" class="sref">KERN_ERRu/a> uspan cinfinommerent"loopl23cass="strin register IRQ &=flags" class="sref">flagsu/a>);1flagsu/a>);1l226u/a>}1l226u/a>}1l174u/a> a>/*ua href="+code=spa>/*uaf="+cod L149">l149u/a>        return 0;1l149u/a>        return 0;1l153u/a>                for (ua hrecode=i" class="sref">iu/a>>=0;ua href="+code=i" class="sref">iu/a><iu/a>>=0;ua href="+code=i" class="sref">iu/a>++) {
        unsicsc_locku/a>,ua hrcscf="+flags" class="sref">flagsu/a>);1l173u/a>   /a>(&ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" classnonstss="e_locku/a>,ua hrconstss="e hrec=0"+ss="line" nam
	 L181">l18Isa>/*ua ="+cod,L230uld nomentppensic value read/write func2ions */u/span2
flagsu/a>);1flagsu/a>);1        unsicsc_locku/a>,ua hrcscf="+code=val" class="srensigned char ua href="+code=indirect_read" cets" class="sref">socketsu/a>[ua hreck" class="sref"I365_CSC">socketsu/a>[uI365_CSCcode=f+ss="line" nam
	 L181">l18cons ss="usL231ng clacket" sic value read/write func2ions */u/span2
flagsu/a>);1l173ucsc_locku/a>,ua hrcscf="+c=0"++ss="line" nam
	 L181">l18noerent"s on this ="+codsic value read/write func2ions */u/span2
flagsu/a>);1        unsint">/*ar ua href="+codnt">/*af="+cod1flags" class="sref">flagsu/a>);1        unsiment"ua href="+code=erent"uf="+cod L149">l149u/a>        return 0;1flagsu/a>);1l173ucsc_locku/a>,ua hrcscf="+c="sre1k" class="sref"I365_CSC_DETECT">socketsu/a>[uI365_CSC_DETECTcode=+code=i" class="sref">iu/a>++) {
        unsiment"ua href="+code=erent"uf="+ces" class="sref">fSS_DETECT">socketsu/a>[uSS_DETECTf="+flags" class="sref">flagsu/a>);1KERN_ERRu/Cons detire	 Lss ="+cods%i! register IRQ &ck" class="sref"/a>        if (ua hrefflags" class="sref">flagsu/a>);1l226u/a>}1flagsu/a>);1l173urensigned char ua href="+code=indirect_read" cets" class="sref">socketsu/a>[ua hreck" class="sref"I365_INTCTL">socketsu/a>[uI365_INTCTLcode=+="sre1k" class="sref"I365_PC_IOCARD">socketsu/a>[uI365_PC_IOCARDcode=+celags" class="sref">flagsu/a>);1l18F153IO/CARDS, bit 0 means egistet_re the8consegistesic value read/write func2ions */u/span2
        unsiment"ua href="+code=erent"uf="+ces"am
	 L173">l173ucsc_locku/a>,ua hrcscf="+c="sre1k" class="sref"I365_CSC_STSCHG">socketsu/a>[uI365_CSC_STSCHGcode=+?" class="sref">fSS_STSCHG">socketsu/a>[uSS_STSCHGf="+c:d Lelags" class="sref">flagsu/a>);1+code=i" class="sref">iu/a>++) {
l18Check L153batt" y/t_reyerent"s ic value read/write func2ions */u/span2
        unsiment"ua href="+code=erent"uf="+ces"am
	 L173">l173ucsc_locku/a>,ua hrcscf="+c="sre1k" class="sref"I365_CSC_BVD1">socketsu/a>[uI365_CSC_BVD1code=+?" class="sref">fSS_BATDEAD">socketsu/a>[uSS_BATDEADf="+c:d Lread/write func2ions */u/span2
        unsiment"ua href="+code=erent"uf="+ces"am
	 L173">l173ucsc_locku/a>,ua hrcscf="+c="sre1k" class="sref"I365_CSC_BVD2">socketsu/a>[uI365_CSC_BVD2code=+?" class="sref">fSS_BATWARN">socketsu/a>[uSS_BATWARNf="+c:d Lread/write func2ions */u/span2
l173ucsc_locku/a>,ua hrcscf="+c="sre1k" class="sref"I365_CSC_READY">socketsu/a>[uI365_CSC_READYcode=+?" class="sref">fSS_READY">socketsu/a>[uSS_READYf="+c:d Lread/write func2ions */u/span2
l226u/a>}1flagsu/a>);1l173ument"ua href="+code=erent"uf="+=+code=i" class="sref">iu/a>++) {
        unsi >iu/a_parse_ment"ua href="+code=e >iu/a_parse_ment"uad" cf">spin_unlock_irqre/a>   /a>(&ua href="+code=sockets" class="sref">socketsu/a>[ua href="+code=i" classsetbitu/a>(int ua href="+code=socm
	 L173">l173ument"ua href="+code=erent"uf="+=Lread/write func2ions */u/span2
l226u/a>}1        unsia>/*ua href="+code=spa>/*uaf="+ces" class="sref">fment"ua href="+code=erent"uf="+Lread/write func2ions */u/span2
l226u/a>}1l226u/a>}1l117u/a>     a>/*ua href="+code=spa>/*uaf="+==0"+ss="line" nam
	 L181">l18no moreerent"s toent">/* ic value read/write func2ions */u/span2
l226u/a>}1l226u/a>}1l226u/a>}1l212u/a>IRQ_RETVAL">socketsu/a>[uIRQ_RETVALad" cets" class="srent">/*ar ua href="+codnt">/*af="+=Lread/write func2ions */u/span2
l18"lineef="+(eav
u/a>(uspan errupt" ceav
u/);ic value read/write func2ions */u/span2
l195u/a>}1l196u/a>1l227u/a>1l178u/a>1l18s"+codsnt">/*lbasic value read/write func2ions */u/span2
l180u/a>1&ad" css="sref">indirect_setbitnou/a>(int ua href="+conof="+code=dev" class="sref">devu/a>)1l226u/a>}1indirect_nsigned shchar ua href="+code=val" class="sref">valu/a>;1l2rrupa href="+code=errrupde=priR" class="sref">KERN_ERRu/constpre v>&egister IRQ &=flags" class="sref">flagsu/a>);1portu/a>+1);1l173u/a>   nou/a>(int ua href="+conof="+f="+0"+|ode=tmp" class="sr/a>   nou/a>(int ua href="+conof="+ ode=s" class="sref">fMAX_SOCKETSu/a>(int ua hreMAX_SOCKETSf="+ccode=dev" class="sref">devu/a>)1l149u/a>        return 0;1l117u/a>     ef">portu/a> = ua href="+code=sockets" class="sref">socnou/a>(int ua href="+conof="+ocket" class="sref">socketu/a>].ua href="+code=io_ == 0=value" class="sref">valueu/a>)1l149u/a>        return 0;1l180u/a>1l226u/a>}1l192u/a>        ua href="+code=val" class="srensigned char ua href="+code=indirect_read" cets" class="sref">socnou/a>(int ua href="+conof="+, 1=f+ss="line" nam
	 L181">l18Iss="face ss="usLlacket" sic value read/write func2ions */u/span2
l173u192u/a>        ua href="+f">sp12)==12)+code=i" class="sref">iu/a>++) {
l174u/a> ef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/constpre v>& 1egister IRQ &=flags" class="sref">flagsu/a>);1flagsu/a>);1l195u/a>}1l195u/a>}1lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/constpre v>& 0egister IRQ &=flags" class="sref">flagsu/a>);1l149u/a>        return 0;1l226u/a>}1l226u/a>}1l216pset_bridgetss="e_locku/a>,ua hrset_bridgetss="ead" css="sref">indirect_setbu/a>(int ua href="+f="+code=dev" class="sref">devu/a>)1iu/a>++) {
l2rrupa href="+code=errrupde=priR" class="sref">KERN_ERRu/set_bridgetss="eegister IRQ &=flags" class="sref">flagsu/a>);1lta>static void ua href="+code=indirect_write" clsref">indirect_setbu/a>(int ua href="+f="+ocm
	 L173">l173uI365_GBLCTL">socketsu/a>[uI365_GBLCTLf="+o0x00=flags" class="sref">flagsu/a>);1lta>static void ua href="+code=indirect_write" clsref">indirect_setbu/a>(int ua href="+f="+ocm
	 L173">l173uI365_GENCTL">socketsu/a>[uI365_GENCTLf="+o0x00=flags" class="sref">flagsu/a>);1flagsu/a>);1lta>static void ua href="+code=indirect_setbit" clasref">indirect_setbu/a>(int ua href="+f="+ocm
	 L173">l173uI365_INTCTL">socketsu/a>[uI365_INTCTLcodeo0x0ass="sref">portu/a>+1)<<8);1lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/set_bridgetss="eegister IRQ &=flags" class="sref">flagsu/a>);1l226u/a>}1l226u/a>}1l182u/a>1l226u/a>}1l164u/a>1l215u/a>
l215u/a>
indirect_f>(uspan erd ua href="+code=i>(uspan erd de=pref"uc0u/a>        unsig>iu/a_setbitu/a>(int ua hreg>iu/a_setbit clas*sref">indirect_setbu/a>(int ua href="+f="+code=dev" class="sref">devu/a>)1l217u/a>{
indirect_fdevu/a>->ua hf="+flags" class="sref">flagsu/a>);1        unsire ourc+u/a>        ua re ourc+ clas/a>        unsire u/a>        ua re f="+cod{ ="+code=i" classstaf">valueu/a>,ua hstaf"f="+cod0, ="+code=i" classenar ua href="+codenaf="+cod0x0fff }flags" class="sref">flagsu/a>);1lpcconstio_ma      return ua pcconstio_ma  clas/a>        unsiiou/a>(int ua hreiof="+cod{ 0, 0, 0, 0, 1 }flags" class="sref">flagsu/a>);1l2cconstmem_ma      return ua pcconstmem_ma  clas/a>        unsimem     return ua memf="+cod{ ="+code=i" classre u/a>        ua re f="+codf">spin_unlock_irqrere u/a>        ua re f="+, }flags" class="sref">flagsu/a>);1flagsu/a>);1l2rrupa href="+code=errrupde=priR" class="sref">KERN_ERRu/i>(uspan erd egister IRQ &=flags" class="sref">flagsu/a>);1flagsu/a>);1l153u/a>                for (ua hrecod L"sref">indirect_fdevu/a>->ua hf="+ f="+ 2L"sref">indirect_fdevu/a>->ua hf="+f="+code=i" class="sref">iu/a>++) {
        unsiiou/a>(int ua hreiof="+="+code=i" classma      return ua ma  clasode=val" class="srdevu/a>->ua hf="+flags" class="sref">flagsu/a>);1li>(uspan set_io_ma      return ua i>(uspan set_io_ma " clasref">indirect_setbu/a>(int ua href="+f="+ocf">spin_unlock_irqreiou/a>(int ua hreiof="+=flags" class="sref">flagsu/a>);1l226u/a>}1l153u/a>                for (ua hrecod L"sref">indirect_fdevu/a>->ua hf="+ f="+ 5L"sref">indirect_fdevu/a>->ua hf="+f="+code=i" class="sref">iu/a>++) {
        unsimem     return ua memf="+="+code=i" classma      return ua ma  clasode=val" class="srdevu/a>->ua hf="+flags" class="sref">flagsu/a>);1li>(uspan set_mem_ma      return ua i>(uspan set_mem_ma " clasref">indirect_setbu/a>(int ua href="+f="+ocf">spin_unlock_irqremem     return ua memf="+=flags" class="sref">flagsu/a>);1l226u/a>}1l149u/a>        return 0;1lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan erd egister IRQ &=flags" class="sref">flagsu/a>);1l149u/a>        return 0;1l226u/a>}1l226u/a>}1indirect_f>(uspan get_ss="us     return ua i>(uspan get_ss="usde=pref"uc0u/a>        unsig>iu/a_setbitu/a>(int ua hreg>iu/a_setbit clas*sref">indirect_setbitu/a>(int ua href="+code=socm
	 L173">l173uu erru/a>(int ua hreu err clas*sref">indirect_ unsigned char ua href="+code=value" class="sref">valueu/a>)1iu/a>++) {
indirect_setbu/a>(int ua href="+f="+sode=val" class="sconta092r_ofu/a>(int ua hreconta092r_ofad" cets" class="sref">socu/a>(int ua href="+code=socef"uc0u/a>        unside=sockinfou/a>(int ua href="+cokinfode=socm
	 L173">l173uf">socu/a>(int ua href="+code=s)-ode=m
	 L173">l173unumbupa href="+code=enumbupf="+flags" class="sref">flagsu/a>);1indirect_ss="us     return ua ss="usde=pflags" class="sref">flagsu/a>);1flagsu/a>);1l2rrupa href="+code=errrupde=priR" class="sref">KERN_ERRu/i>(uspan get_ss="usegister IRQ &=flags" class="sref">flagsu/a>);1portu/a>+1);1l2s="us     return ua ss="usde=pcode=val" class="srensigned char ua href="+code=indirect_read" cets" class="sref">su/a>(int ua href="+f="+om
	 L173">l173uI365_STATUSu/a>(int ua hreI365_STATUSf="+=f+ss="line" nam
	 L181">l18Iss="face Ss="usLRacket" sic value read/write func2ions */u/span2
indirect_ unsigned char ua href="+codecod L149">l149u/a>        return 0;1l149u/a>        return 0;1l173u/s="us     return ua ss="usde=pc="sre1k" class="sref"I365_CS_DETECT">socketsu/a>[uI365_CS_DETECTcode=+=ode=val" class="sI365_CS_DETECT">socketsu/a>[uI365_CS_DETECTcode=+code=i" class="sref">iu/a>++) {
indirect_ unsigned char ua href="+codeces" class="sref">fSS_DETECT">socketsu/a>[uSS_DETECTf="+flags" class="sref">flagsu/a>);1l226u/a>}1l226u/a>}1l18IO8conss h="+ a differv>& mean>KE of bits 0,1sic value read/write func2ions */u/span2
l18Also nomice the8innc2ie-loglinon the bits ic value read/write func2ions */u/span2
l173urensigned char ua href="+code=indirect_read" cets" class="sresetbu/a>(int ua href="+f="+ocm
	 L173">l173uI365_INTCTL">socketsu/a>[uI365_INTCTLcode=+="sre1k" class="sref"I365_PC_IOCARD">socketsu/a>[uI365_PC_IOCARDcode=+cread/write func2ions */u/span2
l18IO8cons ic value read/write func2ions */u/span2
l173u/s="us     return ua ss="usde=pc="sre1k" class="sref"I365_CS_STSCHG">socketsu/a>[uI365_CS_STSCHGcode==value" class="sref">valueu/a>)1indirect_ unsigned char ua href="+codeces" class="sref">fSS_STSCHG">socketsu/a>[uSS_STSCHGf="+flags" class="sref">flagsu/a>);1+c+ss="line" nam
	 L181">l18non I/O8cons ic value read/write func2ions */u/span2
l173u/s="us     return ua ss="usde=pc="sre1k" class="sref"I365_CS_BVD1">socketsu/a>[uI365_CS_BVD1code==value" class="sref">valueu/a>)1indirect_ unsigned char ua href="+codeces" class="sref">fSS_BATDEAD">socketsu/a>[uSS_BATDEADf="+flags" class="sref">flagsu/a>);1l173u/s="us     return ua ss="usde=pc="sre1k" class="sref"I365_CS_BVD2">socketsu/a>[uI365_CS_BVD2code==value" class="sref">valueu/a>)1indirect_ unsigned char ua href="+codeces" class="sref">fSS_BATWARN">socketsu/a>[uSS_BATWARNf="+flags" class="sref">flagsu/a>);1flagsu/a>);1l226u/a>}1l226u/a>}1l117u/a>     es="us     return ua ss="usde=pc="sre1k" class="sref"I365_CS_WRPROT">socketsu/a>[uI365_CS_WRPROTcode=value" class="sref">valueu/a>)1indirect_ unsigned char ua href="+code=ces" class="sref">fSS_WRPROT">socketsu/a>[uSS_WRPROTcode;	 ss="line" nam
	 L181">l18cons is _writ protire	 Lic value read/write func2ions */u/span2
l117u/a>     es="us     return ua ss="usde=pc="sre1k" class="sref"I365_CS_READY">socketsu/a>[uI365_CS_READYcode=read/write func2ions */u/span2
indirect_ unsigned char ua href="+code=ces" class="sref">fSS_READY">socketsu/a>[uSS_READYf="+fnessss="line" nam
	 L181">l18cons is nomebusysic value read/write func2ions */u/span2
l226u/a>}1l117u/a>     es="us     return ua ss="usde=pc="sre1k" class="sref"I365_CS_POWERON">socketsu/a>[uI365_CS_POWERONcode=read/write func2ions */u/span2
indirect_ unsigned char ua href="+code=ces" class="sref">fSS_POWERON">socketsu/a>[uSS_POWERONcode;	 ss="line" nam
	 L181">l18power is appli	 Lto the8conssic value read/write func2ions */u/span2
l215u/a>
l196u/a>1lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan get_ss="usegister IRQ &=flags" class="sref">flagsu/a>);1l149u/a>        return 0;1l226u/a>}1l180u/a>1l226u/a>}1indirect_f>(uspan set_f">socu/a>(int ua href>(uspan set_f">socde=pref"uc0u/a>        unsig>iu/a_setbitu/a>(int ua hreg>iu/a_setbit clas*sref">indirect_setbitu/a>(int ua href="+code=socm
	 L173">l173uf="+cokss="e_ ua href="+code=f="+cokss="e_  clas*sref">indirect_ss="e_locku/a>,ua hrss="ead" )es="line" nam
	 L226">l226u/a>}1iu/a>++) {
indirect_setbu/a>(int ua href="+f="+sode=val" class="sconta092r_ofu/a>(int ua hreconta092r_ofad" cets" class="sref">socu/a>(int ua href="+code=socef"uc0u/a>        unside=sockinfou/a>(int ua href="+cokinfode=socm
	 L173">l173uf">socu/a>(int ua href="+code=s)-ode=m
	 L173">l173unumbupa href="+code=enumbupf="+flags" class="sref">flagsu/a>);1l204u/a>        ua href="+flags" class="sref">flagsu/a>);1l2rrupa href="+code=errrupde=priR" class="sref">KERN_ERRu/i>(uspan set_f">socegister IRQ &=flags" class="sref">flagsu/a>);1l149u/a>        return 0;1l18Firsd,L2et the8globalinontrol/*lRop/*lbasic value read/write func2ions */u/span2
l149u/a>        return 0;1lset_bridgetss="e_locku/a>,ua hrset_bridgetss="ead" csref">indirect_setbu/a>(int ua href="+f="+=flags" class="sref">flagsu/a>);1flagsu/a>);1l18Vf="+seL153the8IGENCLlacket" sic value read/write func2ions */u/span2
l149u/a>        return 0;1l204u/a>        ua href="+cod L149">l149u/a>        return 0;1l173u/s="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1k" class="sref"SS_RESET">socketsu/a>[uSS_RESETcode== ss="liness="line" nam
	 L181">l18Th cla2et bit has egisteinnc2ieegistesloglinic value read/write func2ions */u/span2
l204u/a>        ua href="+cod" nam
	 L205">l204u/a>        ua href="+c|1k" class="sref"I365_PC_RESET">socketsu/a>[uI365_PC_RESETcode;	 read/write func2ions */u/span2
l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1k" class="sref"SS_IOCARD">socketsu/a>[uSS_IOCARDad" )es="line" nam
	 L226">l226u/a>}1l204u/a>        ua href="+cod" nam
	 L205">l204u/a>        ua href="+c|1k" class="sref"I365_PC_IOCARD">socketsu/a>[uI365_PC_IOCARDcodeL149">l149u/a>        return 0;1l149u/a>        return 0;1lta>static void ua href="+code=indirect_write" clsref">indirect_setbu/a>(int ua href="+f="+om
	 L173">l173uI365_INTCTL">socketsu/a>[uI365_INTCTLcodeom
	 L173">l173u204u/a>        ua href="+=f+ss="line" nam
	 L181">l18IGENC,8Iss="commeand Ge92raliControlLRacket" sic value read/write func2ions */u/span2
flagsu/a>);1l18Power lacket" asic value read/write func2ions */u/span2
l149u/a>        return 0;1l204u/a>        ua href="+cod" nam
	 L205">lI365_PWR_NORESET">socketsu/a>[uI365_PWR_NORESETcode;	ss="line" nam
	 L181">l18default: disabl cla2etdrvnon la2um* ic value read/write func2ions */u/span2
l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1k" class="sref"SS_PWR_AUTO">socketsu/a>[uSS_PWR_AUTOcode=+cread/write func2ions */u/span2
l               ua href="+code=priR" class="sref">KERN_ERRu/Auto8power register IRQ &=flags" class="sref">flagsu/a>);1l204u/a>        ua href="+ces" class="sref">fI365_PWR_AUTO">socketsu/a>[uI365_PWR_AUTOf="+fnesss="line" nam
	 L181">l18autom="linpower mngmndsic value read/write func2ions */u/span2
l226u/a>}1l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1k" class="sref"SS_OUTPUT_ENA">socketsu/a>[uSS_OUTPUT_ENAcode=+cread/write func2ions */u/span2
l               ua href="+code=priR" class="sref">KERN_ERRu/Power Enabl dn register IRQ &=flags" class="sref">flagsu/a>);1l204u/a>        ua href="+ces" class="sref">fI365_PWR_OUT">socketsu/a>[uI365_PWR_OUTf="+fnessss="line" nam
	 L181">l18enabl npower ic value read/write func2ions */u/span2
l226u/a>}1portu/a>+1);1l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173uVcc_locku/a>,ua hrVcccode=+cread/write func2ions */u/span2
portu/a>+1);1flagsu/a>);1portu/a>+1);1l               ua href="+code=priR" class="sref">KERN_ERRu/2ett>KE voltageLto VccLto 5Vnon ="+cods%i register IRQ &ck" class="sref"setbu/a>(int ua href="+f="+=flags" class="sref">flagsu/a>);1        unsi204u/a>        ua href="+ces" class="sref">fI365_VCC_5V">socketsu/a>[uI365_VCC_5VcodeL149">l149u/a>        return 0;1flagsu/a>);1flagsu/a>);1l               ua href="+code=priR" class="sref">KERN_ERRu/i>(uspan: i>(uspan set_f">soc call dnwith8innalid VCCnpower ef="+:s%i egister IRQ &ce" nam
	 L136">l2s="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173uVcc_locku/a>,ua hrVcccode=flags" class="sref">flagsu/a>);1lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan set_f">socegister IRQ &=flags" class="sref">flagsu/a>);1lEINVAL">socketsu/a>[uEINVALcodeL149">l149u/a>        return 0;1l226u/a>}1l149u/a>        return 0;1l149u/a>        return 0;1l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173uVp      return ua Vp code=+cread/write func2ions */u/span2
portu/a>+1);1l               ua href="+code=priR" class="sref">KERN_ERRu/nome2ett>KE Vp non ="+cods%i register IRQ &ck" class="sref"setbu/a>(int ua href="+f="+=flags" class="sref">flagsu/a>);1flagsu/a>);1portu/a>+1);1l               ua href="+code=priR" class="sref">KERN_ERRu/2ett>KE Vp nto 5.0eL153="+cods%i register IRQ &ck" class="sref"setbu/a>(int ua href="+f="+=flags" class="sref">flagsu/a>);1        unsi204u/a>        ua href="+ces" class="sref">fI365_VPP1_5V">socketsu/a>[uI365_VPP1_5Vf="+c|1k" class="sref"I365_VPP2_5V">socketsu/a>[uI365_VPP2_5VcodeL149">l149u/a>        return 0;1flagsu/a>);1portu/a>+1);1l               ua href="+code=priR" class="sref">KERN_ERRu/2ett>KE Vp nto 12.0 register IRQ &=flags" class="sref">flagsu/a>);1l204u/a>        ua href="+ces" class="sref">fI365_VPP1_12V">socketsu/a>[uI365_VPP1_12Vf="+c|1k" class="sref"I365_VPP2_12V">socketsu/a>[uI365_VPP2_12Vf="+flags" class="sref">flagsu/a>);1flagsu/a>);1flagsu/a>);1l               ua href="+code=priR" class="sref">KERN_ERRu/i>(uspan: i>(uspan set_f">soc call dnwith8innalid VPPnpower ef="+:s%i egister IRQ &ce" nam
	 L136">l2s="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173uVcc_locku/a>,ua hrVcccode=flags" class="sref">flagsu/a>);1lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan set_f">socegister IRQ &=flags" class="sref">flagsu/a>);1lEINVAL">socketsu/a>[uEINVALcodeL149">l149u/a>        return 0;1l195u/a>}1flagsu/a>);1l117u/a>     204u/a>        ua href="+c!ode=val" class="srensigned char ua href="+code=indirect_read" cets" class="sref">su/a>(int ua href="+f="+om
	 L173">l173uI365_POWER">socketsu/a>[uI365_POWERcode== ss="line" nam
	 L181">l18only _writ L11chang	 Lic value read/write func2ions */u/span2
lta>static void ua href="+code=indirect_write" clsref">indirect_setbu/a>(int ua href="+f="+om
	 L173">l173uI365_POWER">socketsu/a>[uI365_POWERcodeom
	 L173">l173u204u/a>        ua href="+=fread/write func2ions */u/span2
l18Enabl  speciflinss=="commerent"s ic value read/write func2ions */u/span2
flagsu/a>);1l204u/a>        ua href="+cod x0 L149">l149u/a>        return 0;1l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173ucsc_masbu/a>(int ua hrecsc_masbcodec="sre1k" class="sref"SS_DETECT">socketsu/a>[uSS_DETECTf="+=+cread/write func2ions */u/span2
l204u/a>        ua href="+ces" class="sref">fI365_CSC_DETECT">socketsu/a>[uI365_CSC_DETECTf="+flags" class="sref">flagsu/a>);1l195u/a>}1l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1k" class="sref"SS_IOCARD">socketsu/a>[uSS_IOCARDad" )ecread/write func2ions */u/span2
l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173ucsc_masbu/a>(int ua hrecsc_masbcodec="sre1k" class="sref"SS_STSCHG">socketsu/a>[uSS_STSCHGf="+=read/write func2ions */u/span2
l204u/a>        ua href="+ces" class="sref">fI365_CSC_STSCHG">socketsu/a>[uI365_CSC_STSCHGf="+flags" class="sref">flagsu/a>);1+clags" class="sref">flagsu/a>);1l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173ucsc_masbu/a>(int ua hrecsc_masbcodec="sre1k" class="sref"SS_BATDEAD">socketsu/a>[uSS_BATDEADf="+)es="line" nam
	 L226">l226u/a>}1l204u/a>        ua href="+ces" class="sref">fI365_CSC_BVD1">socketsu/a>[uI365_CSC_BVD1codeflags" class="sref">flagsu/a>);1l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173ucsc_masbu/a>(int ua hrecsc_masbcodec="sre1k" class="sref"SS_BATWARN">socketsu/a>[uSS_BATWARNf="+)es="line" nam
	 L226">l226u/a>}1l204u/a>        ua href="+ces" class="sref">fI365_CSC_BVD2">socketsu/a>[uI365_CSC_BVD2codeflags" class="sref">flagsu/a>);1l117u/a>     es="e_locku/a>,ua hrss="ead" -ode=m
	 L173">l173ucsc_masbu/a>(int ua hrecsc_masbcodec="sre1k" class="sref"SS_READY">socketsu/a>[uSS_READYf="+)es="line" nam
	 L226">l226u/a>}1        unsi204u/a>        ua href="+ces" class="sref">fI365_CSC_READY">socketsu/a>[uI365_CSC_READYf="+fns="line" nam
	 L226">l226u/a>}1l226u/a>}1l195u/a>}1l149u/a>        return 0;1l18now _writ the8ef="+eand clea53the8(probably bogus) peindng stuff by dodng a dummy t_reic value read/write func2ions */u/span2
lta>static void ua href="+code=indirect_write" clsref">indirect_setbu/a>(int ua href="+f="+om
	 L173">l173uI365_CSCINT">socketsu/a>[uI365_CSCINTcodeom
	 L173">l173u204u/a>        ua href="+=fread/write func2ions */u/span2
su/a>(int ua href="+f="+om
	 L173">l173uI365_CSC">socketsu/a>[uI365_CSCf="+=fread/write func2ions */u/span2
l164u/a>1lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan set_f">socegister IRQ &=flags" class="sref">flagsu/a>);1l149u/a>        return 0;1l226u/a>}1l226u/a>}1indirect_f>(uspan set_io_ma      return ua i>(uspan set_io_ma " claef"uc0u/a>        unsig>iu/a_setbitu/a>(int ua hreg>iu/a_setbit clas*sref">indirect_setbitu/a>(int ua href="+code=socef"uc0u/a>        unsig>constio_ma      return ua pcconstio_ma  clas*sref">indirect_iou/a>(int ua hreiof="+=s="line" nam
	 L226">l226u/a>}1iu/a>++) {
indirect_setbu/a>(int ua href="+f="+sode=val" class="sconta092r_ofu/a>(int ua hreconta092r_ofad" cets" class="sref">socu/a>(int ua href="+code=socef"uc0u/a>        unside=sockinfou/a>(int ua href="+cokinfode=socm
	 L173">l173uf">socu/a>(int ua href="+code=s)-ode=m
	 L173">l173unumbupa href="+code=enumbupf="+flags" class="sref">flagsu/a>);1lma      return ua ma  claocm
	 L173">l173uioctlu/a>(int ua hreioctlf="+flags" class="sref">flagsu/a>);1flagsu/a>);1l173u2rrupa href="+code=errrupde=priR" class="sref">KERN_ERRu/i>(uspan set_io_ma egister IRQ &=flags" class="sref">flagsu/a>);1portu/a>+1);1lma      return ua ma  clasode=val" class="srou/a>(int ua hreiof="+-ode=m
	 L173">l173uma      return ua ma  claflags" class="sref">flagsu/a>);1flagsu/a>);1l18Check errorinondi/*lbasic value linelags" class="sref">flagsu/a>);1lma      return ua ma  clasode= 1)ecread/write func2ions */u/span2
lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan set_io_ma nwith8innalid ma egister IRQ &=flags" class="sref">flagsu/a>);1lEINVAL">socketsu/a>[uEINVALcodeL149">l149u/a>        return 0;1l226u/a>}1l173urou/a>(int ua hreiof="+-ode=m
	 L173">l173ustaf">valueu/a>,ua hstaf"f="+code= 0xffff) ||nam
	 L173">l173urou/a>(int ua hreiof="+-ode=m
	 L173">l173usto      return ua sto f="+code= 0xffff) ||nam
	 L173">l173urou/a>(int ua hreiof="+-ode=m
	 L173">l173usto      return ua sto f="+co="+ m
	 L173">l173urou/a>(int ua hreiof="+-ode=m
	 L173">l173ustaf">valueu/a>,ua hstaf"f="+))cread/write func2ions */u/span2
lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan set_io_ma nwith8innalid ioegister IRQ &=flags" class="sref">flagsu/a>);1lEINVAL">socketsu/a>[uEINVALcodeL149">l149u/a>        return 0;1l195u/a>}1l195u/a>}1l18Tam
	off3the8window before1changdng anythdng ic value ls="line" nam
	 L195">l195u/a>}1lrensigned char ua href="+code=indirect_read" cets" class="sresetbu/a>(int ua href="+f="+ocm
	 L173">l173uI365_ADDRWIN">socketsu/a>[uI365_ADDRWINf="+)e="sre1k" class="sref"I365_ENA_IO">socketsu/a>[uI365_ENA_IOad" cets" class="srema      return ua ma  cla==value" class="sref">valueu/a>)1lrensigned csetbicu/a>(int ua hrefensigned csetbicad" cets" class="sresetbu/a>(int ua href="+f="+ocm
	 L173">l173uI365_ADDRWIN">socketsu/a>[uI365_ADDRWINf="+ocm
	 L173">l173uI365_ENA_IO">socketsu/a>[uI365_ENA_IOad" cets" class="srema      return ua ma  cla==L149">l149u/a>        return 0;1l226u/a>}1l1888888f="+co(_ERRu/2et_io_ma : Sett>KE rang	nto %x - %x  registe,io-ode=staf",io-ode=stop);  ic value read/write func2ions */u/span2
flagsu/a>);1l18_writ the8new8ef="+s ic value read/write func2ions */u/span2
l=indirect_writs/pcmcia/i8"+code=indirect_writ16 clalsref">indirect_setbu/a>(int ua href="+f="+om
	 L173">l173uI365_IO">socketsu/a>[uI365_IOad" cets" class="srema      return ua ma  cla=+m
	 L173">l173uI365_W_START">socketsu/a>[uI365_W_STARTf="+om
	 L173">l173urou/a>(int ua hreiof="+-ode=m
	 L173">l173ustaf">valueu/a>,ua hstaf"f="+);"line" nam
	 read/write func2ions */u/span2
l=indirect_writs/pcmcia/i8"+code=indirect_writ16 clalsref">indirect_setbu/a>(int ua href="+f="+om
	 L173">l173uI365_IO">socketsu/a>[uI365_IOad" cets" class="srema      return ua ma  cla=+m
	 L173">l173uI365_W_STOP">socketsu/a>[uI365_W_STOPf="+om
	 L173">l173urou/a>(int ua hreiof="+-ode=m
	 L173">l173usto      return ua sto f="+);"line" nam
	 	 read/write func2ions */u/span2
l173uioctlu/a>(int ua hreioctlf="+code=val" class="srensigned char ua href="+code=indirect_read" cets" class="sref">su/a>(int ua href="+f="+om
	 L173">l173uI365_IOCTL">socketsu/a>[uI365_IOCTLcode=+="sre1~m
	 L173">l173uI365_IOCTL_MASK">socketsu/a>[uI365_IOCTL_MASKad" cets" class="srema      return ua ma  cla=L149">l149u/a>        return 0;1l149u/a>        return 0;1lrou/a>(int ua hreiof="+-ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre17" nam
	 L136">lMAP_16BIT">socketsu/a>[uMAP_16BITcode|" nam
	 L136">lMAP_AUTOSZ">socketsu/a>[uMAP_AUTOSZ cla==value" class="sref">valueu/a>)1l173uioctlu/a>(int ua hreioctlf="+ces" class="sref">fI365_IOCTL_16BIT">socketsu/a>[uI365_IOCTL_16BITad" cets" class="srema      return ua ma  cla=L149">l149u/a>        return 0;1l149u/a>        return 0;1lta>static void ua href="+code=indirect_write" clsref">indirect_setbu/a>(int ua href="+f="+om
	 L173">l173uI365_IOCTL">socketsu/a>[uI365_IOCTLcodeom
	 L173">l173uroctlu/a>(int ua hreioctlf="+=L149">l149u/a>        return 0;1l149u/a>        return 0;1l18Tam
	the8window backnon L11need	 Lic value read/write func2ions */u/span2
lrou/a>(int ua hreiof="+-ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1" nam
	 L136">lMAP_ACTIVE">socketsu/a>[uMAP_ACTIVEf="+=s="line" nam
	 L226">l226u/a>}1lta>staticsetbicu/a>(int ua hrefensignedsetbicad" cets" class="sresetbu/a>(int ua href="+f="+om
	 L173">l173uI365_ADDRWIN">socketsu/a>[uI365_ADDRWINf="+om
	 L173">l173uI365_ENA_IO">socketsu/a>[uI365_ENA_IOad" cets" class="srema      return ua ma  cla==L149">l149u/a>        return 0;1l149u/a>        return 0;1lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan set_io_ma egister IRQ &=f   149">l149u/a>        return 0;1l149u/a>        return 0;1l195u/a>}1l195u/a>}1indirect_f>(uspan set_mem_ma      return ua i>(uspan set_mem_ma " claef"uc0u/a>        unsig>iu/a_setbitu/a>(int ua hreg>iu/a_setbit clas*sref">indirect_setbitu/a>(int ua href="+code=socef"uc0u/a>        unsig>constmem_ma      return ua g>constmem_ma  clas*sref">indirect_mem     return ua memf="+=s="line" nam
	 L226">l226u/a>}1        unside=sockinfou/a>(int ua href="+cokinfode=ss*sref">indirect_setbkinfou/a>(int ua href="+kinfode=ssode=val" class="sconta092r_ofu/a>(int ua hreconta092r_ofad" cets" class="sref">socu/a>(int ua href="+code=socef"uc0u/a>        unside=sockinfou/a>(int ua href="+cokinfode=socm
	 L173">l173uf">socu/a>(int ua href="+code=s)L149">l149u/a>        return 0;1indirect_setbu/a>(int ua href="+f="+sode=val" class="ssetbkinfou/a>(int ua href="+kinfode=s-ode=m
	 L173">l173unumbupa href="+code=enumbupf="+flags" class="sref">flagsu/a>);1        unsig>i_bus_lackon     return ua g>i_bus_lackon clas/a>        unsilackon     return ua lackon claflags" class="sref">flagsu/a>);1        unsibas+u/a>        ua bas+de=socm
	 L173">l173ui     return ua i claflags" class="sref">flagsu/a>);1lma      return ua ma  claflags" class="sref">flagsu/a>);1flagsu/a>);1l2rrupa href="+code=errrupde=priR" class="sref">KERN_ERRu/i>(uspan set_mem_ma egister IRQ &=flags" class="sref">flagsu/a>);1l195u/a>}1lg>ibios_lasource_to_bus     return ua g>ibios_lasource_to_busad" cets" class="sref">skinfou/a>(int ua href="+kinfode=s-ode=m
	 L173">l173udevu/a>(int ua hredevde=soc="sre/a>        unsilackon     return ua lackon claocm
	 L173">l173umem     return ua memf="+-ode=m
	 L173">l173ulas     return ua lasde=s)L149">l149u/a>        return 0;1l149u/a>        return 0;1lma      return ua ma  clasode=val" class="smem     return ua memf="+-ode=m
	 L173">l173uma      return ua ma  claflags" class="sref">flagsu/a>);1lma      return ua ma  clasode= 4)ecread/write func2ions */u/span2
lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan set_mem_ma :8innalid ma egister IRQ &=flags" class="sref">flagsu/a>);1lEINVAL">socketsu/a>[uEINVALcodeL149">l149u/a>        return 0;1l195u/a>}1flagsu/a>);1lmem     return ua memf="+-ode=m
	 L173">l173uconststaf">valueu/a>,ua hconststaf" clasode= 0x3ffffff) ||nam
	 L173">l173ulackon     return ua lackon cla.m
	 L173">l173ustaf">valueu/a>,ua hstaf"f="+sode= m
	 L173">l173ulackon     return ua lackon cla.m
	 L173">l173uenar ua href="+codenacode=+||read/write func2ions */u/span2
lmem     return ua memf="+-ode=m
	 L173">l173uspeear ua href="+codspeeaf="+sode= 1000) )ecread/write func2ions */u/span2
lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan set_mem_ma :8innalid addlass / speeaegister IRQ &=flags" class="sref">flagsu/a>);1lg              ua href="+code=priR" class="sref">KERN_ERRu/innalid mem ma eL153="+cods%i:s%llxnto %llxnwith8a egister IRQ &lags" class="sref">flagsu/a>);1KERN_ERRu/2taf" of %x register IRQ &clags" class="sref">flagsu/a>);1flagsu/a>);1l173ustaf">valueu/a>,ua hstaf"f="+olags" class="sref">flagsu/a>);1l173uenar ua href="+codenacodeolags" class="sref">flagsu/a>);1l173uconststaf">valueu/a>,ua hconststaf" cla=flags" class="sref">flagsu/a>);1lEINVAL">socketsu/a>[uEINVALcodeL149">l149u/a>        return 0;1l226u/a>}1flagsu/a>);1l18Tam
	off3the8window before1changdng anythdng ic value lags" class="sref">flagsu/a>);1lrensigned char ua href="+code=indirect_read" cets" class="sresetbu/a>(int ua href="+f="+ocm
	 L173">l173uI365_ADDRWIN">socketsu/a>[uI365_ADDRWINf="+)e="sre1k" class="sref"I365_ENA_MEM">socketsu/a>[uI365_ENA_MEMad" cets" class="srema      return ua ma  cla==lags" class="sref">flagsu/a>);1lrensigned csetbicu/a>(int ua hrefensigned csetbicad" cets" class="sresetbu/a>(int ua href="+f="+ocm
	 L173">l173uI365_ADDRWIN">socketsu/a>[uI365_ADDRWINf="+ocm
	 L173">l173uI365_ENA_MEM">socketsu/a>[uI365_ENA_MEMad" cets" class="srema      return ua ma  cla==L149">l149u/a>        return 0;1l149u/a>        return 0;1l149u/a>        return 0;1l1888888f="+co(_ERRu/2et_mem_ma :8Sett>KE ma e%i rang	nto %x - %x on ="+cods%i, speea iss%i, act>   =e%i  registe,ma , lackon.staf",lackon.ena,="+c,mem-ode=speea,mem-ode=ef="+e="sre1MAP_ACTIVE);  ic value read/write func2ions */u/span2
l18_writ the82taf" addlass ic value read/write func2ions */u/span2
lbas+u/a>        ua bas+de=scod" nam
	 L205">lI365_MEM">socketsu/a>[uI365_MEMad" cets" class="srema      return ua ma  cla=L149">l149u/a>        return 0;1lt     return ua i clacodam
	 L173">l173ulackon     return ua lackon cla.m
	 L173">l173ustaf">valueu/a>,ua hstaf"f="+sode=ode= 12)e="sre10x0fffL149">l149u/a>        return 0;1lmem     return ua memf="+-ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1" nam
	 L136">lMAP_16BIT">socketsu/a>[uMAP_16BITcode)es="line" nam
	 L226">l226u/a>}1lt     return ua i claces" class="sref">fI365_MEM_16BIT">socketsu/a>[uI365_MEM_16BITcodeL149">l149u/a>        return 0;1lmem     return ua memf="+-ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1" nam
	 L136">lMAP_0WS">socketsu/a>[uMAP_0WSf="+=s="line" nam
	 L226">l226u/a>}1lt     return ua i claces" class="sref">fI365_MEM_0WS">socketsu/a>[uI365_MEM_0WScodeL      149">l149u/a>        return 0;1l173uiindirect_writs/pcmcia/i8"+code=indirect_writ16 clalsref">indirect_setbu/a>(int ua href="+f="+om
	 L173">l173ubas+u/a>        ua bas+de=s+m
	 L173">l173uI365_W_START">socketsu/a>[uI365_W_STARTf="+om
	 L173">l173ur     return ua i cla=L149">l149u/a>        return 0;1l149u/a>        return 0;1l18_writ the82top addlass ic value read/write func2ions */u/span2
lt     return ua i claodam
	 L173">l173ulackon     return ua lackon cla.m
	 L173">l173uenar ua href="+codenacodesode=ode= 12)e="sre10x0fffL149">l149u/a>        return 0;1l117u/a>     to_cyclas     return ua to_cyclasad" cets" class="sremem     return ua memf="+-ode=m
	 L173">l173uspeear ua href="+codspeeaf="+))ecread/write func2ions */u/span2
flagsu/a>);1flagsu/a>);1flagsu/a>);1fI365_MEM_WS0">socketsu/a>[uI365_MEM_WS0codeL149">l149u/a>        return 0;1flagsu/a>);1flagsu/a>);1fI365_MEM_WS1">socketsu/a>[uI365_MEM_WS1codeL149">l149u/a>        return 0;1flagsu/a>);1flagsu/a>);1lt     return ua i claces" class="sref">fI365_MEM_WS1">socketsu/a>[uI365_MEM_WS1codec|1k" class="sref"I365_MEM_WS0">socketsu/a>[uI365_MEM_WS0codeL149">l149u/a>        return 0;1flagsu/a>);1l226u/a>}1l226u/a>}1l173uiindirect_writs/pcmcia/i8"+code=indirect_writ16 clalsref">indirect_setbu/a>(int ua href="+f="+om
	 L173">l173ubas+u/a>        ua bas+de=s+m
	 L173">l173uI365_W_STOP">socketsu/a>[uI365_W_STOPf="+om
	 L173">l173ur     return ua i cla=L149">l149u/a>        return 0;1l149u/a>        return 0;1l18cons82taf" ic value read/write func2ions */u/span2
flagsu/a>);1lt     return ua i clacoda7" nam
	 L136">lmem     return ua memf="+-ode=m
	 L173">l173uconststaf">valueu/a>,ua hconststaf" clas- m
	 L173">l173ulackon     return ua lackon cla.m
	 L173">l173ustaf">valueu/a>,ua hstaf"f="+)sode=ode= 12)e="sre10x3fffL149">l149u/a>        return 0;1lmem     return ua memf="+-ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1" nam
	 L136">lMAP_WRPROT">socketsu/a>[uMAP_WRPROTf="+=s="line" nam
	 L226">l226u/a>}1lt     return ua i claces" class="sref">fI365_MEM_WRPROT">socketsu/a>[uI365_MEM_WRPROTcodeL149">l149u/a>        return 0;1lmem     return ua memf="+-ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1" nam
	 L136">lMAP_ATTRIB">socketsu/a>[uMAP_ATTRIBf="+)scread/write func2ions */u/span2
l188888888888888f="+co(_ERRu/request>KE attribute memoryeL153="+cods%i registe,="+c);ic value read/write func2ions */u/span2
lt     return ua i claces" class="sref">fI365_MEM_REG">socketsu/a>[uI365_MEM_REGcodeL149">l149u/a>        return 0;1+clags" class="sref">flagsu/a>);1l188888888888888f="+co(_ERRu/request>KE normal memoryeL153="+cods%i registe,="+c);ic value read/write func2ions */u/span2
l195u/a>}1l173uiindirect_writs/pcmcia/i8"+code=indirect_writ16 clalsref">indirect_setbu/a>(int ua href="+f="+om
	 L173">l173ubas+u/a>        ua bas+de=s+m
	 L173">l173uI365_W_OFF">socketsu/a>[uI365_W_OFFf="+om
	 L173">l173ur     return ua i cla=L149">l149u/a>        return 0;1l18Enabl  the8window L11necessaryeic value read/write func2ions */u/span2
lmem     return ua memf="+-ode=m
	 L173">l173u>port_locku/a>,ua href="+codec="sre1" nam
	 L136">lMAP_ACTIVE">socketsu/a>[uMAP_ACTIVEf="+=s="line" nam
	 L226">l226u/a>}1lta>staticsetbicu/a>(int ua hrefensignedsetbicad" cets" class="sresetbu/a>(int ua href="+f="+ocm
	 L173">l173uI365_ADDRWIN">socketsu/a>[uI365_ADDRWINf="+ocm
	 L173">l173uI365_ENA_MEM">socketsu/a>[uI365_ENA_MEMad" cets" class="srema      return ua ma  cla==L149">l149u/a>        return 0;1l149u/a>        return 0;1lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan set_mem_ma egister IRQ &=flags" class="sref">flagsu/a>);1l149u/a>        return 0;1l195u/a>}1l195u/a>}1indirect_f>(uspan module_inicu/a>(int ua href>(uspan module_inicde=pre" n)s="line" nam
	 L195">l195u/a>}1flagsu/a>);1indirect_g>i_lackster_s="sreu/a>(int ua hreg>i_lackster_s="srede=pr="sre/a>        unsif>(uspan g>i_s="sreu/a>(int ua href>(uspan g>i_s="sre cla=L149">l149u/a>        return 0;1l195u/a>}1l164u/a>1indirect_f>(uspan module_exicu/a>(int ua href>(uspan module_exicde=pre" n)s="line" nam
	 L195">l195u/a>}1flagsu/a>);1l173u2rrupa href="+code=errrupde=priR" class="sref">KERN_ERRu/i>(uspan module_exicegister IRQ &=flags" class="sref">flagsu/a>);1l173ug>i_unlackster_s="sreu/a>(int ua hreg>i_unlackster_s="srede=pr="sre/a>        unsif>(uspan g>i_s="sreu/a>(int ua href>(uspan g>i_s="sre cla=L149">l149u/a>        return 0;1l="+codt_locku/a>,ua hr="+codt cla[0].m
	 L173">l173uio_bas+u/a>        ua io_bas+ claode=0)s="line" nam
	 L195">l195u/a>}1l173ulaef=se_lackon     return ua laef=se_lackonad" cets" class="sresetbodt_locku/a>,ua hr="+codt cla[0].m
	 L173">l173uio_bas+u/a>        ua io_bas+ cla, 2=L149">l149u/a>        return 0;1lef="+u/a>        ua ef="+de=priR" class="sref">KERN_ERRu/i>(uspan module_exicegister IRQ &=flags" class="sref">flagsu/a>);1l195u/a>}1l195u/a>}1indirect_f>(uspan module_inicu/a>(int ua href>(uspan module_inicde=p=flags" class="sref">flagsu/a>);1indirect_f>(uspan module_exicu/a>(int ua href>(uspan module_exicde=p=flags" class="sref">flagsu/a>);1flagsu/a>);1


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