linux/drivers/mfd/wm8994-regmap.c
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   1/*
   2 * wm8994-regmap.c  --  Register map data for WM8994 series devices
   3 *
   4 * Copyright 2011 Wolfson Microelectronics PLC.
   5 *
   6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7 *
   8 *  This program is free software; you can redistribute  it and/or modify it
   9 *  under  the terms of  the GNU General  Public License as published by the
  10 *  Free Software Foundation;  either version 2 of the  License, or (at your
  11 *  option) any later version.
  12 *
  13 */
  14
  15#include <linux/mfd/wm8994/core.h>
  16#include <linux/mfd/wm8994/registers.h>
  17#include <linux/regmap.h>
  18#include <linux/device.h>
  19
  20#include "wm8994.h"
  21
  22static struct reg_default wm1811_defaults[] = {
  23        { 0x0001, 0x0000 },    /* R1    - Power Management (1) */
  24        { 0x0002, 0x6000 },    /* R2    - Power Management (2) */
  25        { 0x0003, 0x0000 },    /* R3    - Power Management (3) */
  26        { 0x0004, 0x0000 },    /* R4    - Power Management (4) */
  27        { 0x0005, 0x0000 },    /* R5    - Power Management (5) */
  28        { 0x0006, 0x0000 },    /* R6    - Power Management (6) */
  29        { 0x0015, 0x0000 },    /* R21   - Input Mixer (1) */
  30        { 0x0018, 0x008B },    /* R24   - Left Line Input 1&2 Volume */
  31        { 0x0019, 0x008B },    /* R25   - Left Line Input 3&4 Volume */
  32        { 0x001A, 0x008B },    /* R26   - Right Line Input 1&2 Volume */
  33        { 0x001B, 0x008B },    /* R27   - Right Line Input 3&4 Volume */
  34        { 0x001C, 0x006D },    /* R28   - Left Output Volume */
  35        { 0x001D, 0x006D },    /* R29   - Right Output Volume */
  36        { 0x001E, 0x0066 },    /* R30   - Line Outputs Volume */
  37        { 0x001F, 0x0020 },    /* R31   - HPOUT2 Volume */
  38        { 0x0020, 0x0079 },    /* R32   - Left OPGA Volume */
  39        { 0x0021, 0x0079 },    /* R33   - Right OPGA Volume */
  40        { 0x0022, 0x0003 },    /* R34   - SPKMIXL Attenuation */
  41        { 0x0023, 0x0003 },    /* R35   - SPKMIXR Attenuation */
  42        { 0x0024, 0x0011 },    /* R36   - SPKOUT Mixers */
  43        { 0x0025, 0x0140 },    /* R37   - ClassD */
  44        { 0x0026, 0x0079 },    /* R38   - Speaker Volume Left */
  45        { 0x0027, 0x0079 },    /* R39   - Speaker Volume Right */
  46        { 0x0028, 0x0000 },    /* R40   - Input Mixer (2) */
  47        { 0x0029, 0x0000 },    /* R41   - Input Mixer (3) */
  48        { 0x002A, 0x0000 },    /* R42   - Input Mixer (4) */
  49        { 0x002B, 0x0000 },    /* R43   - Input Mixer (5) */
  50        { 0x002C, 0x0000 },    /* R44   - Input Mixer (6) */
  51        { 0x002D, 0x0000 },    /* R45   - Output Mixer (1) */
  52        { 0x002E, 0x0000 },    /* R46   - Output Mixer (2) */
  53        { 0x002F, 0x0000 },    /* R47   - Output Mixer (3) */
  54        { 0x0030, 0x0000 },    /* R48   - Output Mixer (4) */
  55        { 0x0031, 0x0000 },    /* R49   - Output Mixer (5) */
  56        { 0x0032, 0x0000 },    /* R50   - Output Mixer (6) */
  57        { 0x0033, 0x0000 },    /* R51   - HPOUT2 Mixer */
  58        { 0x0034, 0x0000 },    /* R52   - Line Mixer (1) */
  59        { 0x0035, 0x0000 },    /* R53   - Line Mixer (2) */
  60        { 0x0036, 0x0000 },    /* R54   - Speaker Mixer */
  61        { 0x0037, 0x0000 },    /* R55   - Additional Control */
  62        { 0x0038, 0x0000 },    /* R56   - AntiPOP (1) */
  63        { 0x0039, 0x0000 },    /* R57   - AntiPOP (2) */
  64        { 0x003B, 0x000D },    /* R59   - LDO 1 */
  65        { 0x003C, 0x0003 },    /* R60   - LDO 2 */
  66        { 0x003D, 0x0039 },    /* R61   - MICBIAS1 */
  67        { 0x003E, 0x0039 },    /* R62   - MICBIAS2 */
  68        { 0x004C, 0x1F25 },    /* R76   - Charge Pump (1) */
  69        { 0x004D, 0xAB19 },    /* R77   - Charge Pump (2) */
  70        { 0x0051, 0x0004 },    /* R81   - Class W (1) */
  71        { 0x0055, 0x054A },    /* R85   - DC Servo (2) */
  72        { 0x0059, 0x0000 },    /* R89   - DC Servo (4) */
  73        { 0x0060, 0x0000 },    /* R96   - Analogue HP (1) */
  74        { 0x00C5, 0x0000 },    /* R197  - Class D Test (5) */
  75        { 0x00D0, 0x7600 },    /* R208  - Mic Detect 1 */
  76        { 0x00D1, 0x007F },    /* R209  - Mic Detect 2 */
  77        { 0x0101, 0x8004 },    /* R257  - Control Interface */
  78        { 0x0200, 0x0000 },    /* R512  - AIF1 Clocking (1) */
  79        { 0x0201, 0x0000 },    /* R513  - AIF1 Clocking (2) */
  80        { 0x0204, 0x0000 },    /* R516  - AIF2 Clocking (1) */
  81        { 0x0205, 0x0000 },    /* R517  - AIF2 Clocking (2) */
  82        { 0x0208, 0x0000 },    /* R520  - Clocking (1) */
  83        { 0x0209, 0x0000 },    /* R521  - Clocking (2) */
  84        { 0x0210, 0x0083 },    /* R528  - AIF1 Rate */
  85        { 0x0211, 0x0083 },    /* R529  - AIF2 Rate */
  86        { 0x0220, 0x0000 },    /* R544  - FLL1 Control (1) */
  87        { 0x0221, 0x0000 },    /* R545  - FLL1 Control (2) */
  88        { 0x0222, 0x0000 },    /* R546  - FLL1 Control (3) */
  89        { 0x0223, 0x0000 },    /* R547  - FLL1 Control (4) */
  90        { 0x0224, 0x0C80 },    /* R548  - FLL1 Control (5) */
  91        { 0x0226, 0x0000 },    /* R550  - FLL1 EFS 1 */
  92        { 0x0227, 0x0006 },    /* R551  - FLL1 EFS 2 */
  93        { 0x0240, 0x0000 },    /* R576  - FLL2Control (1) */
  94        { 0x0241, 0x0000 },    /* R577  - FLL2Control (2) */
  95        { 0x0242, 0x0000 },    /* R578  - FLL2Control (3) */
  96        { 0x0243, 0x0000 },    /* R579  - FLL2 Control (4) */
  97        { 0x0244, 0x0C80 },    /* R580  - FLL2Control (5) */
  98        { 0x0246, 0x0000 },    /* R582  - FLL2 EFS 1 */
  99        { 0x0247, 0x0006 },    /* R583  - FLL2 EFS 2 */
 100        { 0x0300, 0x4050 },    /* R768  - AIF1 Control (1) */
 101        { 0x0301, 0x4000 },    /* R769  - AIF1 Control (2) */
 102        { 0x0302, 0x0000 },    /* R770  - AIF1 Master/Slave */
 103        { 0x0303, 0x0040 },    /* R771  - AIF1 BCLK */
 104        { 0x0304, 0x0040 },    /* R772  - AIF1ADC LRCLK */
 105        { 0x0305, 0x0040 },    /* R773  - AIF1DAC LRCLK */
 106        { 0x0306, 0x0004 },    /* R774  - AIF1DAC Data */
 107        { 0x0307, 0x0100 },    /* R775  - AIF1ADC Data */
 108        { 0x0310, 0x4050 },    /* R784  - AIF2 Control (1) */
 109        { 0x0311, 0x4000 },    /* R785  - AIF2 Control (2) */
 110        { 0x0312, 0x0000 },    /* R786  - AIF2 Master/Slave */
 111        { 0x0313, 0x0040 },    /* R787  - AIF2 BCLK */
 112        { 0x0314, 0x0040 },    /* R788  - AIF2ADC LRCLK */
 113        { 0x0315, 0x0040 },    /* R789  - AIF2DAC LRCLK */
 114        { 0x0316, 0x0000 },    /* R790  - AIF2DAC Data */
 115        { 0x0317, 0x0000 },    /* R791  - AIF2ADC Data */
 116        { 0x0318, 0x0003 },    /* R792  - AIF2TX Control */
 117        { 0x0320, 0x0040 },    /* R800  - AIF3 Control (1) */
 118        { 0x0321, 0x0000 },    /* R801  - AIF3 Control (2) */
 119        { 0x0322, 0x0000 },    /* R802  - AIF3DAC Data */
 120        { 0x0323, 0x0000 },    /* R803  - AIF3ADC Data */
 121        { 0x0400, 0x00C0 },    /* R1024 - AIF1 ADC1 Left Volume */
 122        { 0x0401, 0x00C0 },    /* R1025 - AIF1 ADC1 Right Volume */
 123        { 0x0402, 0x00C0 },    /* R1026 - AIF1 DAC1 Left Volume */
 124        { 0x0403, 0x00C0 },    /* R1027 - AIF1 DAC1 Right Volume */
 125        { 0x0410, 0x0000 },    /* R1040 - AIF1 ADC1 Filters */
 126        { 0x0420, 0x0200 },    /* R1056 - AIF1 DAC1 Filters (1) */
 127        { 0x0421, 0x0010 },    /* R1057 - AIF1 DAC1 Filters (2) */
 128        { 0x0430, 0x0068 },    /* R1072 - AIF1 DAC1 Noise Gate */
 129        { 0x0440, 0x0098 },    /* R1088 - AIF1 DRC1 (1) */
 130        { 0x0441, 0x0845 },    /* R1089 - AIF1 DRC1 (2) */
 131        { 0x0442, 0x0000 },    /* R1090 - AIF1 DRC1 (3) */
 132        { 0x0443, 0x0000 },    /* R1091 - AIF1 DRC1 (4) */
 133        { 0x0444, 0x0000 },    /* R1092 - AIF1 DRC1 (5) */
 134        { 0x0480, 0x6318 },    /* R1152 - AIF1 DAC1 EQ Gains (1) */
 135        { 0x0481, 0x6300 },    /* R1153 - AIF1 DAC1 EQ Gains (2) */
 136        { 0x0482, 0x0FCA },    /* R1154 - AIF1 DAC1 EQ Band 1 A */
 137        { 0x0483, 0x0400 },    /* R1155 - AIF1 DAC1 EQ Band 1 B */
 138        { 0x0484, 0x00D8 },    /* R1156 - AIF1 DAC1 EQ Band 1 PG */
 139        { 0x0485, 0x1EB5 },    /* R1157 - AIF1 DAC1 EQ Band 2 A */
 140        { 0x0486, 0xF145 },    /* R1158 - AIF1 DAC1 EQ Band 2 B */
 141        { 0x0487, 0x0B75 },    /* R1159 - AIF1 DAC1 EQ Band 2 C */
 142        { 0x0488, 0x01C5 },    /* R1160 - AIF1 DAC1 EQ Band 2 PG */
 143        { 0x0489, 0x1C58 },    /* R1161 - AIF1 DAC1 EQ Band 3 A */
 144        { 0x048A, 0xF373 },    /* R1162 - AIF1 DAC1 EQ Band 3 B */
 145        { 0x048B, 0x0A54 },    /* R1163 - AIF1 DAC1 EQ Band 3 C */
 146        { 0x048C, 0x0558 },    /* R1164 - AIF1 DAC1 EQ Band 3 PG */
 147        { 0x048D, 0x168E },    /* R1165 - AIF1 DAC1 EQ Band 4 A */
 148        { 0x048E, 0xF829 },    /* R1166 - AIF1 DAC1 EQ Band 4 B */
 149        { 0x048F, 0x07AD },    /* R1167 - AIF1 DAC1 EQ Band 4 C */
 150        { 0x0490, 0x1103 },    /* R1168 - AIF1 DAC1 EQ Band 4 PG */
 151        { 0x0491, 0x0564 },    /* R1169 - AIF1 DAC1 EQ Band 5 A */
 152        { 0x0492, 0x0559 },    /* R1170 - AIF1 DAC1 EQ Band 5 B */
 153        { 0x0493, 0x4000 },    /* R1171 - AIF1 DAC1 EQ Band 5 PG */
 154        { 0x0494, 0x0000 },    /* R1172 - AIF1 DAC1 EQ Band 1 C */
 155        { 0x0500, 0x00C0 },    /* R1280 - AIF2 ADC Left Volume */
 156        { 0x0501, 0x00C0 },    /* R1281 - AIF2 ADC Right Volume */
 157        { 0x0502, 0x00C0 },    /* R1282 - AIF2 DAC Left Volume */
 158        { 0x0503, 0x00C0 },    /* R1283 - AIF2 DAC Right Volume */
 159        { 0x0510, 0x0000 },    /* R1296 - AIF2 ADC Filters */
 160        { 0x0520, 0x0200 },    /* R1312 - AIF2 DAC Filters (1) */
 161        { 0x0521, 0x0010 },    /* R1313 - AIF2 DAC Filters (2) */
 162        { 0x0530, 0x0068 },    /* R1328 - AIF2 DAC Noise Gate */
 163        { 0x0540, 0x0098 },    /* R1344 - AIF2 DRC (1) */
 164        { 0x0541, 0x0845 },    /* R1345 - AIF2 DRC (2) */
 165        { 0x0542, 0x0000 },    /* R1346 - AIF2 DRC (3) */
 166        { 0x0543, 0x0000 },    /* R1347 - AIF2 DRC (4) */
 167        { 0x0544, 0x0000 },    /* R1348 - AIF2 DRC (5) */
 168        { 0x0580, 0x6318 },    /* R1408 - AIF2 EQ Gains (1) */
 169        { 0x0581, 0x6300 },    /* R1409 - AIF2 EQ Gains (2) */
 170        { 0x0582, 0x0FCA },    /* R1410 - AIF2 EQ Band 1 A */
 171        { 0x0583, 0x0400 },    /* R1411 - AIF2 EQ Band 1 B */
 172        { 0x0584, 0x00D8 },    /* R1412 - AIF2 EQ Band 1 PG */
 173        { 0x0585, 0x1EB5 },    /* R1413 - AIF2 EQ Band 2 A */
 174        { 0x0586, 0xF145 },    /* R1414 - AIF2 EQ Band 2 B */
 175        { 0x0587, 0x0B75 },    /* R1415 - AIF2 EQ Band 2 C */
 176        { 0x0588, 0x01C5 },    /* R1416 - AIF2 EQ Band 2 PG */
 177        { 0x0589, 0x1C58 },    /* R1417 - AIF2 EQ Band 3 A */
 178        { 0x058A, 0xF373 },    /* R1418 - AIF2 EQ Band 3 B */
 179        { 0x058B, 0x0A54 },    /* R1419 - AIF2 EQ Band 3 C */
 180        { 0x058C, 0x0558 },    /* R1420 - AIF2 EQ Band 3 PG */
 181        { 0x058D, 0x168E },    /* R1421 - AIF2 EQ Band 4 A */
 182        { 0x058E, 0xF829 },    /* R1422 - AIF2 EQ Band 4 B */
 183        { 0x058F, 0x07AD },    /* R1423 - AIF2 EQ Band 4 C */
 184        { 0x0590, 0x1103 },    /* R1424 - AIF2 EQ Band 4 PG */
 185        { 0x0591, 0x0564 },    /* R1425 - AIF2 EQ Band 5 A */
 186        { 0x0592, 0x0559 },    /* R1426 - AIF2 EQ Band 5 B */
 187        { 0x0593, 0x4000 },    /* R1427 - AIF2 EQ Band 5 PG */
 188        { 0x0594, 0x0000 },    /* R1428 - AIF2 EQ Band 1 C */
 189        { 0x0600, 0x0000 },    /* R1536 - DAC1 Mixer Volumes */
 190        { 0x0601, 0x0000 },    /* R1537 - DAC1 Left Mixer Routing */
 191        { 0x0602, 0x0000 },    /* R1538 - DAC1 Right Mixer Routing */
 192        { 0x0603, 0x0000 },    /* R1539 - AIF2ADC Mixer Volumes */
 193        { 0x0604, 0x0000 },    /* R1540 - AIF2ADC Left Mixer Routing */
 194        { 0x0605, 0x0000 },    /* R1541 - AIF2ADC Right Mixer Routing */
 195        { 0x0606, 0x0000 },    /* R1542 - AIF1 ADC1 Left Mixer Routing */
 196        { 0x0607, 0x0000 },    /* R1543 - AIF1 ADC1 Right Mixer Routing */
 197        { 0x0610, 0x02C0 },    /* R1552 - DAC1 Left Volume */
 198        { 0x0611, 0x02C0 },    /* R1553 - DAC1 Right Volume */
 199        { 0x0612, 0x02C0 },    /* R1554 - AIF2TX Left Volume */
 200        { 0x0613, 0x02C0 },    /* R1555 - AIF2TX Right Volume */
 201        { 0x0614, 0x0000 },    /* R1556 - DAC Softmute */
 202        { 0x0620, 0x0002 },    /* R1568 - Oversampling */
 203        { 0x0621, 0x0000 },    /* R1569 - Sidetone */
 204        { 0x0700, 0x8100 },    /* R1792 - GPIO 1 */
 205        { 0x0701, 0xA101 },    /* R1793 - Pull Control (MCLK2) */
 206        { 0x0702, 0xA101 },    /* R1794 - Pull Control (BCLK2) */
 207        { 0x0703, 0xA101 },    /* R1795 - Pull Control (DACLRCLK2) */
 208        { 0x0704, 0xA101 },    /* R1796 - Pull Control (DACDAT2) */
 209        { 0x0707, 0xA101 },    /* R1799 - GPIO 8 */
 210        { 0x0708, 0xA101 },    /* R1800 - GPIO 9 */
 211        { 0x0709, 0xA101 },    /* R1801 - GPIO 10 */
 212        { 0x070A, 0xA101 },    /* R1802 - GPIO 11 */
 213        { 0x0720, 0x0000 },    /* R1824 - Pull Control (1) */
 214        { 0x0721, 0x0156 },    /* R1825 - Pull Control (2) */
 215        { 0x0732, 0x0000 },    /* R1842 - Interrupt Raw Status 2 */
 216        { 0x0738, 0x07FF },    /* R1848 - Interrupt Status 1 Mask */
 217        { 0x0739, 0xDFEF },    /* R1849 - Interrupt Status 2 Mask */
 218        { 0x0740, 0x0000 },    /* R1856 - Interrupt Control */
 219        { 0x0748, 0x003F },    /* R1864 - IRQ Debounce */
 220};
 221
 222static struct reg_default wm8994_defaults[] = {
 223        { 0x0001, 0x0000 },    /* R1     - Power Management (1) */ 
 224        { 0x0002, 0x6000 },    /* R2     - Power Management (2) */ 
 225        { 0x0003, 0x0000 },    /* R3     - Power Management (3) */ 
 226        { 0x0004, 0x0000 },    /* R4     - Power Management (4) */ 
 227        { 0x0005, 0x0000 },    /* R5     - Power Management (5) */ 
 228        { 0x0006, 0x0000 },    /* R6     - Power Management (6) */ 
 229        { 0x0015, 0x0000 },    /* R21    - Input Mixer (1) */ 
 230        { 0x0018, 0x008B },    /* R24    - Left Line Input 1&2 Volume */ 
 231        { 0x0019, 0x008B },    /* R25    - Left Line Input 3&4 Volume */ 
 232        { 0x001A, 0x008B },    /* R26    - Right Line Input 1&2 Volume */ 
 233        { 0x001B, 0x008B },    /* R27    - Right Line Input 3&4 Volume */ 
 234        { 0x001C, 0x006D },    /* R28    - Left Output Volume */ 
 235        { 0x001D, 0x006D },    /* R29    - Right Output Volume */ 
 236        { 0x001E, 0x0066 },    /* R30    - Line Outputs Volume */ 
 237        { 0x001F, 0x0020 },    /* R31    - HPOUT2 Volume */ 
 238        { 0x0020, 0x0079 },    /* R32    - Left OPGA Volume */ 
 239        { 0x0021, 0x0079 },    /* R33    - Right OPGA Volume */ 
 240        { 0x0022, 0x0003 },    /* R34    - SPKMIXL Attenuation */ 
 241        { 0x0023, 0x0003 },    /* R35    - SPKMIXR Attenuation */ 
 242        { 0x0024, 0x0011 },    /* R36    - SPKOUT Mixers */ 
 243        { 0x0025, 0x0140 },    /* R37    - ClassD */ 
 244        { 0x0026, 0x0079 },    /* R38    - Speaker Volume Left */ 
 245        { 0x0027, 0x0079 },    /* R39    - Speaker Volume Right */ 
 246        { 0x0028, 0x0000 },    /* R40    - Input Mixer (2) */ 
 247        { 0x0029, 0x0000 },    /* R41    - Input Mixer (3) */ 
 248        { 0x002A, 0x0000 },    /* R42    - Input Mixer (4) */ 
 249        { 0x002B, 0x0000 },    /* R43    - Input Mixer (5) */ 
 250        { 0x002C, 0x0000 },    /* R44    - Input Mixer (6) */ 
 251        { 0x002D, 0x0000 },    /* R45    - Output Mixer (1) */ 
 252        { 0x002E, 0x0000 },    /* R46    - Output Mixer (2) */ 
 253        { 0x002F, 0x0000 },    /* R47    - Output Mixer (3) */ 
 254        { 0x0030, 0x0000 },    /* R48    - Output Mixer (4) */ 
 255        { 0x0031, 0x0000 },    /* R49    - Output Mixer (5) */ 
 256        { 0x0032, 0x0000 },    /* R50    - Output Mixer (6) */ 
 257        { 0x0033, 0x0000 },    /* R51    - HPOUT2 Mixer */ 
 258        { 0x0034, 0x0000 },    /* R52    - Line Mixer (1) */ 
 259        { 0x0035, 0x0000 },    /* R53    - Line Mixer (2) */ 
 260        { 0x0036, 0x0000 },    /* R54    - Speaker Mixer */ 
 261        { 0x0037, 0x0000 },    /* R55    - Additional Control */ 
 262        { 0x0038, 0x0000 },    /* R56    - AntiPOP (1) */ 
 263        { 0x0039, 0x0000 },    /* R57    - AntiPOP (2) */ 
 264        { 0x003A, 0x0000 },    /* R58    - MICBIAS */ 
 265        { 0x003B, 0x000D },    /* R59    - LDO 1 */ 
 266        { 0x003C, 0x0003 },    /* R60    - LDO 2 */ 
 267        { 0x004C, 0x1F25 },    /* R76    - Charge Pump (1) */ 
 268        { 0x0051, 0x0004 },    /* R81    - Class W (1) */ 
 269        { 0x0055, 0x054A },    /* R85    - DC Servo (2) */ 
 270        { 0x0057, 0x0000 },    /* R87    - DC Servo (4) */ 
 271        { 0x0060, 0x0000 },    /* R96    - Analogue HP (1) */ 
 272        { 0x0101, 0x8004 },    /* R257   - Control Interface */ 
 273        { 0x0110, 0x0000 },    /* R272   - Write Sequencer Ctrl (1) */ 
 274        { 0x0111, 0x0000 },    /* R273   - Write Sequencer Ctrl (2) */ 
 275        { 0x0200, 0x0000 },    /* R512   - AIF1 Clocking (1) */ 
 276        { 0x0201, 0x0000 },    /* R513   - AIF1 Clocking (2) */ 
 277        { 0x0204, 0x0000 },    /* R516   - AIF2 Clocking (1) */ 
 278        { 0x0205, 0x0000 },    /* R517   - AIF2 Clocking (2) */ 
 279        { 0x0208, 0x0000 },    /* R520   - Clocking (1) */ 
 280        { 0x0209, 0x0000 },    /* R521   - Clocking (2) */ 
 281        { 0x0210, 0x0083 },    /* R528   - AIF1 Rate */ 
 282        { 0x0211, 0x0083 },    /* R529   - AIF2 Rate */ 
 283        { 0x0220, 0x0000 },    /* R544   - FLL1 Control (1) */ 
 284        { 0x0221, 0x0000 },    /* R545   - FLL1 Control (2) */ 
 285        { 0x0222, 0x0000 },    /* R546   - FLL1 Control (3) */ 
 286        { 0x0223, 0x0000 },    /* R547   - FLL1 Control (4) */ 
 287        { 0x0224, 0x0C80 },    /* R548   - FLL1 Control (5) */ 
 288        { 0x0240, 0x0000 },    /* R576   - FLL2 Control (1) */ 
 289        { 0x0241, 0x0000 },    /* R577   - FLL2 Control (2) */ 
 290        { 0x0242, 0x0000 },    /* R578   - FLL2 Control (3) */ 
 291        { 0x0243, 0x0000 },    /* R579   - FLL2 Control (4) */ 
 292        { 0x0244, 0x0C80 },    /* R580   - FLL2 Control (5) */ 
 293        { 0x0300, 0x4050 },    /* R768   - AIF1 Control (1) */ 
 294        { 0x0301, 0x4000 },    /* R769   - AIF1 Control (2) */ 
 295        { 0x0302, 0x0000 },    /* R770   - AIF1 Master/Slave */ 
 296        { 0x0303, 0x0040 },    /* R771   - AIF1 BCLK */ 
 297        { 0x0304, 0x0040 },    /* R772   - AIF1ADC LRCLK */ 
 298        { 0x0305, 0x0040 },    /* R773   - AIF1DAC LRCLK */ 
 299        { 0x0306, 0x0004 },    /* R774   - AIF1DAC Data */ 
 300        { 0x0307, 0x0100 },    /* R775   - AIF1ADC Data */ 
 301        { 0x0310, 0x4050 },    /* R784   - AIF2 Control (1) */ 
 302        { 0x0311, 0x4000 },    /* R785   - AIF2 Control (2) */ 
 303        { 0x0312, 0x0000 },    /* R786   - AIF2 Master/Slave */ 
 304        { 0x0313, 0x0040 },    /* R787   - AIF2 BCLK */ 
 305        { 0x0314, 0x0040 },    /* R788   - AIF2ADC LRCLK */ 
 306        { 0x0315, 0x0040 },    /* R789   - AIF2DAC LRCLK */ 
 307        { 0x0316, 0x0000 },    /* R790   - AIF2DAC Data */ 
 308        { 0x0317, 0x0000 },    /* R791   - AIF2ADC Data */ 
 309        { 0x0400, 0x00C0 },    /* R1024  - AIF1 ADC1 Left Volume */ 
 310        { 0x0401, 0x00C0 },    /* R1025  - AIF1 ADC1 Right Volume */ 
 311        { 0x0402, 0x00C0 },    /* R1026  - AIF1 DAC1 Left Volume */ 
 312        { 0x0403, 0x00C0 },    /* R1027  - AIF1 DAC1 Right Volume */ 
 313        { 0x0404, 0x00C0 },    /* R1028  - AIF1 ADC2 Left Volume */ 
 314        { 0x0405, 0x00C0 },    /* R1029  - AIF1 ADC2 Right Volume */ 
 315        { 0x0406, 0x00C0 },    /* R1030  - AIF1 DAC2 Left Volume */ 
 316        { 0x0407, 0x00C0 },    /* R1031  - AIF1 DAC2 Right Volume */ 
 317        { 0x0410, 0x0000 },    /* R1040  - AIF1 ADC1 Filters */ 
 318        { 0x0411, 0x0000 },    /* R1041  - AIF1 ADC2 Filters */ 
 319        { 0x0420, 0x0200 },    /* R1056  - AIF1 DAC1 Filters (1) */ 
 320        { 0x0421, 0x0010 },    /* R1057  - AIF1 DAC1 Filters (2) */ 
 321        { 0x0422, 0x0200 },    /* R1058  - AIF1 DAC2 Filters (1) */ 
 322        { 0x0423, 0x0010 },    /* R1059  - AIF1 DAC2 Filters (2) */ 
 323        { 0x0440, 0x0098 },    /* R1088  - AIF1 DRC1 (1) */ 
 324        { 0x0441, 0x0845 },    /* R1089  - AIF1 DRC1 (2) */ 
 325        { 0x0442, 0x0000 },    /* R1090  - AIF1 DRC1 (3) */ 
 326        { 0x0443, 0x0000 },    /* R1091  - AIF1 DRC1 (4) */ 
 327        { 0x0444, 0x0000 },    /* R1092  - AIF1 DRC1 (5) */ 
 328        { 0x0450, 0x0098 },    /* R1104  - AIF1 DRC2 (1) */ 
 329        { 0x0451, 0x0845 },    /* R1105  - AIF1 DRC2 (2) */ 
 330        { 0x0452, 0x0000 },    /* R1106  - AIF1 DRC2 (3) */ 
 331        { 0x0453, 0x0000 },    /* R1107  - AIF1 DRC2 (4) */ 
 332        { 0x0454, 0x0000 },    /* R1108  - AIF1 DRC2 (5) */ 
 333        { 0x0480, 0x6318 },    /* R1152  - AIF1 DAC1 EQ Gains (1) */ 
 334        { 0x0481, 0x6300 },    /* R1153  - AIF1 DAC1 EQ Gains (2) */ 
 335        { 0x0482, 0x0FCA },    /* R1154  - AIF1 DAC1 EQ Band 1 A */ 
 336        { 0x0483, 0x0400 },    /* R1155  - AIF1 DAC1 EQ Band 1 B */ 
 337        { 0x0484, 0x00D8 },    /* R1156  - AIF1 DAC1 EQ Band 1 PG */ 
 338        { 0x0485, 0x1EB5 },    /* R1157  - AIF1 DAC1 EQ Band 2 A */ 
 339        { 0x0486, 0xF145 },    /* R1158  - AIF1 DAC1 EQ Band 2 B */ 
 340        { 0x0487, 0x0B75 },    /* R1159  - AIF1 DAC1 EQ Band 2 C */ 
 341        { 0x0488, 0x01C5 },    /* R1160  - AIF1 DAC1 EQ Band 2 PG */ 
 342        { 0x0489, 0x1C58 },    /* R1161  - AIF1 DAC1 EQ Band 3 A */ 
 343        { 0x048A, 0xF373 },    /* R1162  - AIF1 DAC1 EQ Band 3 B */ 
 344        { 0x048B, 0x0A54 },    /* R1163  - AIF1 DAC1 EQ Band 3 C */ 
 345        { 0x048C, 0x0558 },    /* R1164  - AIF1 DAC1 EQ Band 3 PG */ 
 346        { 0x048D, 0x168E },    /* R1165  - AIF1 DAC1 EQ Band 4 A */ 
 347        { 0x048E, 0xF829 },    /* R1166  - AIF1 DAC1 EQ Band 4 B */ 
 348        { 0x048F, 0x07AD },    /* R1167  - AIF1 DAC1 EQ Band 4 C */ 
 349        { 0x0490, 0x1103 },    /* R1168  - AIF1 DAC1 EQ Band 4 PG */ 
 350        { 0x0491, 0x0564 },    /* R1169  - AIF1 DAC1 EQ Band 5 A */ 
 351        { 0x0492, 0x0559 },    /* R1170  - AIF1 DAC1 EQ Band 5 B */ 
 352        { 0x0493, 0x4000 },    /* R1171  - AIF1 DAC1 EQ Band 5 PG */ 
 353        { 0x04A0, 0x6318 },    /* R1184  - AIF1 DAC2 EQ Gains (1) */ 
 354        { 0x04A1, 0x6300 },    /* R1185  - AIF1 DAC2 EQ Gains (2) */ 
 355        { 0x04A2, 0x0FCA },    /* R1186  - AIF1 DAC2 EQ Band 1 A */ 
 356        { 0x04A3, 0x0400 },    /* R1187  - AIF1 DAC2 EQ Band 1 B */ 
 357        { 0x04A4, 0x00D8 },    /* R1188  - AIF1 DAC2 EQ Band 1 PG */ 
 358        { 0x04A5, 0x1EB5 },    /* R1189  - AIF1 DAC2 EQ Band 2 A */ 
 359        { 0x04A6, 0xF145 },    /* R1190  - AIF1 DAC2 EQ Band 2 B */ 
 360        { 0x04A7, 0x0B75 },    /* R1191  - AIF1 DAC2 EQ Band 2 C */ 
 361        { 0x04A8, 0x01C5 },    /* R1192  - AIF1 DAC2 EQ Band 2 PG */ 
 362        { 0x04A9, 0x1C58 },    /* R1193  - AIF1 DAC2 EQ Band 3 A */ 
 363        { 0x04AA, 0xF373 },    /* R1194  - AIF1 DAC2 EQ Band 3 B */ 
 364        { 0x04AB, 0x0A54 },    /* R1195  - AIF1 DAC2 EQ Band 3 C */ 
 365        { 0x04AC, 0x0558 },    /* R1196  - AIF1 DAC2 EQ Band 3 PG */ 
 366        { 0x04AD, 0x168E },    /* R1197  - AIF1 DAC2 EQ Band 4 A */ 
 367        { 0x04AE, 0xF829 },    /* R1198  - AIF1 DAC2 EQ Band 4 B */ 
 368        { 0x04AF, 0x07AD },    /* R1199  - AIF1 DAC2 EQ Band 4 C */ 
 369        { 0x04B0, 0x1103 },    /* R1200  - AIF1 DAC2 EQ Band 4 PG */ 
 370        { 0x04B1, 0x0564 },    /* R1201  - AIF1 DAC2 EQ Band 5 A */ 
 371        { 0x04B2, 0x0559 },    /* R1202  - AIF1 DAC2 EQ Band 5 B */ 
 372        { 0x04B3, 0x4000 },    /* R1203  - AIF1 DAC2 EQ Band 5 PG */ 
 373        { 0x0500, 0x00C0 },    /* R1280  - AIF2 ADC Left Volume */ 
 374        { 0x0501, 0x00C0 },    /* R1281  - AIF2 ADC Right Volume */ 
 375        { 0x0502, 0x00C0 },    /* R1282  - AIF2 DAC Left Volume */ 
 376        { 0x0503, 0x00C0 },    /* R1283  - AIF2 DAC Right Volume */ 
 377        { 0x0510, 0x0000 },    /* R1296  - AIF2 ADC Filters */ 
 378        { 0x0520, 0x0200 },    /* R1312  - AIF2 DAC Filters (1) */ 
 379        { 0x0521, 0x0010 },    /* R1313  - AIF2 DAC Filters (2) */ 
 380        { 0x0540, 0x0098 },    /* R1344  - AIF2 DRC (1) */ 
 381        { 0x0541, 0x0845 },    /* R1345  - AIF2 DRC (2) */ 
 382        { 0x0542, 0x0000 },    /* R1346  - AIF2 DRC (3) */ 
 383        { 0x0543, 0x0000 },    /* R1347  - AIF2 DRC (4) */ 
 384        { 0x0544, 0x0000 },    /* R1348  - AIF2 DRC (5) */ 
 385        { 0x0580, 0x6318 },    /* R1408  - AIF2 EQ Gains (1) */ 
 386        { 0x0581, 0x6300 },    /* R1409  - AIF2 EQ Gains (2) */ 
 387        { 0x0582, 0x0FCA },    /* R1410  - AIF2 EQ Band 1 A */ 
 388        { 0x0583, 0x0400 },    /* R1411  - AIF2 EQ Band 1 B */ 
 389        { 0x0584, 0x00D8 },    /* R1412  - AIF2 EQ Band 1 PG */ 
 390        { 0x0585, 0x1EB5 },    /* R1413  - AIF2 EQ Band 2 A */ 
 391        { 0x0586, 0xF145 },    /* R1414  - AIF2 EQ Band 2 B */ 
 392        { 0x0587, 0x0B75 },    /* R1415  - AIF2 EQ Band 2 C */ 
 393        { 0x0588, 0x01C5 },    /* R1416  - AIF2 EQ Band 2 PG */ 
 394        { 0x0589, 0x1C58 },    /* R1417  - AIF2 EQ Band 3 A */ 
 395        { 0x058A, 0xF373 },    /* R1418  - AIF2 EQ Band 3 B */ 
 396        { 0x058B, 0x0A54 },    /* R1419  - AIF2 EQ Band 3 C */ 
 397        { 0x058C, 0x0558 },    /* R1420  - AIF2 EQ Band 3 PG */ 
 398        { 0x058D, 0x168E },    /* R1421  - AIF2 EQ Band 4 A */ 
 399        { 0x058E, 0xF829 },    /* R1422  - AIF2 EQ Band 4 B */ 
 400        { 0x058F, 0x07AD },    /* R1423  - AIF2 EQ Band 4 C */ 
 401        { 0x0590, 0x1103 },    /* R1424  - AIF2 EQ Band 4 PG */ 
 402        { 0x0591, 0x0564 },    /* R1425  - AIF2 EQ Band 5 A */ 
 403        { 0x0592, 0x0559 },    /* R1426  - AIF2 EQ Band 5 B */ 
 404        { 0x0593, 0x4000 },    /* R1427  - AIF2 EQ Band 5 PG */ 
 405        { 0x0600, 0x0000 },    /* R1536  - DAC1 Mixer Volumes */ 
 406        { 0x0601, 0x0000 },    /* R1537  - DAC1 Left Mixer Routing */ 
 407        { 0x0602, 0x0000 },    /* R1538  - DAC1 Right Mixer Routing */ 
 408        { 0x0603, 0x0000 },    /* R1539  - DAC2 Mixer Volumes */ 
 409        { 0x0604, 0x0000 },    /* R1540  - DAC2 Left Mixer Routing */ 
 410        { 0x0605, 0x0000 },    /* R1541  - DAC2 Right Mixer Routing */ 
 411        { 0x0606, 0x0000 },    /* R1542  - AIF1 ADC1 Left Mixer Routing */ 
 412        { 0x0607, 0x0000 },    /* R1543  - AIF1 ADC1 Right Mixer Routing */ 
 413        { 0x0608, 0x0000 },    /* R1544  - AIF1 ADC2 Left Mixer Routing */ 
 414        { 0x0609, 0x0000 },    /* R1545  - AIF1 ADC2 Right mixer Routing */ 
 415        { 0x0610, 0x02C0 },    /* R1552  - DAC1 Left Volume */ 
 416        { 0x0611, 0x02C0 },    /* R1553  - DAC1 Right Volume */ 
 417        { 0x0612, 0x02C0 },    /* R1554  - DAC2 Left Volume */ 
 418        { 0x0613, 0x02C0 },    /* R1555  - DAC2 Right Volume */ 
 419        { 0x0614, 0x0000 },    /* R1556  - DAC Softmute */ 
 420        { 0x0620, 0x0002 },    /* R1568  - Oversampling */ 
 421        { 0x0621, 0x0000 },    /* R1569  - Sidetone */ 
 422        { 0x0700, 0x8100 },    /* R1792  - GPIO 1 */ 
 423        { 0x0701, 0xA101 },    /* R1793  - GPIO 2 */ 
 424        { 0x0702, 0xA101 },    /* R1794  - GPIO 3 */ 
 425        { 0x0703, 0xA101 },    /* R1795  - GPIO 4 */ 
 426        { 0x0704, 0xA101 },    /* R1796  - GPIO 5 */ 
 427        { 0x0705, 0xA101 },    /* R1797  - GPIO 6 */ 
 428        { 0x0706, 0xA101 },    /* R1798  - GPIO 7 */ 
 429        { 0x0707, 0xA101 },    /* R1799  - GPIO 8 */ 
 430        { 0x0708, 0xA101 },    /* R1800  - GPIO 9 */ 
 431        { 0x0709, 0xA101 },    /* R1801  - GPIO 10 */ 
 432        { 0x070A, 0xA101 },    /* R1802  - GPIO 11 */ 
 433        { 0x0720, 0x0000 },    /* R1824  - Pull Control (1) */ 
 434        { 0x0721, 0x0156 },    /* R1825  - Pull Control (2) */ 
 435        { 0x0738, 0x07FF },    /* R1848  - Interrupt Status 1 Mask */ 
 436        { 0x0739, 0xFFFF },    /* R1849  - Interrupt Status 2 Mask */ 
 437        { 0x0740, 0x0000 },    /* R1856  - Interrupt Control */ 
 438        { 0x0748, 0x003F },    /* R1864  - IRQ Debounce */ 
 439};
 440
 441static struct reg_default wm8958_defaults[] = {
 442        { 0x0001, 0x0000 },    /* R1     - Power Management (1) */
 443        { 0x0002, 0x6000 },    /* R2     - Power Management (2) */
 444        { 0x0003, 0x0000 },    /* R3     - Power Management (3) */
 445        { 0x0004, 0x0000 },    /* R4     - Power Management (4) */
 446        { 0x0005, 0x0000 },    /* R5     - Power Management (5) */
 447        { 0x0006, 0x0000 },    /* R6     - Power Management (6) */
 448        { 0x0015, 0x0000 },    /* R21    - Input Mixer (1) */
 449        { 0x0018, 0x008B },    /* R24    - Left Line Input 1&2 Volume */
 450        { 0x0019, 0x008B },    /* R25    - Left Line Input 3&4 Volume */
 451        { 0x001A, 0x008B },    /* R26    - Right Line Input 1&2 Volume */
 452        { 0x001B, 0x008B },    /* R27    - Right Line Input 3&4 Volume */
 453        { 0x001C, 0x006D },    /* R28    - Left Output Volume */
 454        { 0x001D, 0x006D },    /* R29    - Right Output Volume */
 455        { 0x001E, 0x0066 },    /* R30    - Line Outputs Volume */
 456        { 0x001F, 0x0020 },    /* R31    - HPOUT2 Volume */
 457        { 0x0020, 0x0079 },    /* R32    - Left OPGA Volume */
 458        { 0x0021, 0x0079 },    /* R33    - Right OPGA Volume */
 459        { 0x0022, 0x0003 },    /* R34    - SPKMIXL Attenuation */
 460        { 0x0023, 0x0003 },    /* R35    - SPKMIXR Attenuation */
 461        { 0x0024, 0x0011 },    /* R36    - SPKOUT Mixers */
 462        { 0x0025, 0x0140 },    /* R37    - ClassD */
 463        { 0x0026, 0x0079 },    /* R38    - Speaker Volume Left */
 464        { 0x0027, 0x0079 },    /* R39    - Speaker Volume Right */
 465        { 0x0028, 0x0000 },    /* R40    - Input Mixer (2) */
 466        { 0x0029, 0x0000 },    /* R41    - Input Mixer (3) */
 467        { 0x002A, 0x0000 },    /* R42    - Input Mixer (4) */
 468        { 0x002B, 0x0000 },    /* R43    - Input Mixer (5) */
 469        { 0x002C, 0x0000 },    /* R44    - Input Mixer (6) */
 470        { 0x002D, 0x0000 },    /* R45    - Output Mixer (1) */
 471        { 0x002E, 0x0000 },    /* R46    - Output Mixer (2) */
 472        { 0x002F, 0x0000 },    /* R47    - Output Mixer (3) */
 473        { 0x0030, 0x0000 },    /* R48    - Output Mixer (4) */
 474        { 0x0031, 0x0000 },    /* R49    - Output Mixer (5) */
 475        { 0x0032, 0x0000 },    /* R50    - Output Mixer (6) */
 476        { 0x0033, 0x0000 },    /* R51    - HPOUT2 Mixer */
 477        { 0x0034, 0x0000 },    /* R52    - Line Mixer (1) */
 478        { 0x0035, 0x0000 },    /* R53    - Line Mixer (2) */
 479        { 0x0036, 0x0000 },    /* R54    - Speaker Mixer */
 480        { 0x0037, 0x0000 },    /* R55    - Additional Control */
 481        { 0x0038, 0x0000 },    /* R56    - AntiPOP (1) */
 482        { 0x0039, 0x0180 },    /* R57    - AntiPOP (2) */
 483        { 0x003B, 0x000D },    /* R59    - LDO 1 */
 484        { 0x003C, 0x0005 },    /* R60    - LDO 2 */
 485        { 0x003D, 0x0039 },    /* R61    - MICBIAS1 */
 486        { 0x003E, 0x0039 },    /* R62    - MICBIAS2 */
 487        { 0x004C, 0x1F25 },    /* R76    - Charge Pump (1) */
 488        { 0x004D, 0xAB19 },    /* R77    - Charge Pump (2) */
 489        { 0x0051, 0x0004 },    /* R81    - Class W (1) */
 490        { 0x0055, 0x054A },    /* R85    - DC Servo (2) */
 491        { 0x0057, 0x0000 },    /* R87    - DC Servo (4) */
 492        { 0x0060, 0x0000 },    /* R96    - Analogue HP (1) */
 493        { 0x00C5, 0x0000 },    /* R197   - Class D Test (5) */
 494        { 0x00D0, 0x5600 },    /* R208   - Mic Detect 1 */
 495        { 0x00D1, 0x007F },    /* R209   - Mic Detect 2 */
 496        { 0x0101, 0x8004 },    /* R257   - Control Interface */
 497        { 0x0110, 0x0000 },    /* R272   - Write Sequencer Ctrl (1) */
 498        { 0x0111, 0x0000 },    /* R273   - Write Sequencer Ctrl (2) */
 499        { 0x0200, 0x0000 },    /* R512   - AIF1 Clocking (1) */
 500        { 0x0201, 0x0000 },    /* R513   - AIF1 Clocking (2) */
 501        { 0x0204, 0x0000 },    /* R516   - AIF2 Clocking (1) */
 502        { 0x0205, 0x0000 },    /* R517   - AIF2 Clocking (2) */
 503        { 0x0208, 0x0000 },    /* R520   - Clocking (1) */
 504        { 0x0209, 0x0000 },    /* R521   - Clocking (2) */
 505        { 0x0210, 0x0083 },    /* R528   - AIF1 Rate */
 506        { 0x0211, 0x0083 },    /* R529   - AIF2 Rate */
 507        { 0x0220, 0x0000 },    /* R544   - FLL1 Control (1) */
 508        { 0x0221, 0x0000 },    /* R545   - FLL1 Control (2) */
 509        { 0x0222, 0x0000 },    /* R546   - FLL1 Control (3) */
 510        { 0x0223, 0x0000 },    /* R547   - FLL1 Control (4) */
 511        { 0x0224, 0x0C80 },    /* R548   - FLL1 Control (5) */
 512        { 0x0226, 0x0000 },    /* R550   - FLL1 EFS 1 */
 513        { 0x0227, 0x0006 },    /* R551   - FLL1 EFS 2 */
 514        { 0x0240, 0x0000 },    /* R576   - FLL2Control (1) */
 515        { 0x0241, 0x0000 },    /* R577   - FLL2Control (2) */
 516        { 0x0242, 0x0000 },    /* R578   - FLL2Control (3) */
 517        { 0x0243, 0x0000 },    /* R579   - FLL2 Control (4) */
 518        { 0x0244, 0x0C80 },    /* R580   - FLL2Control (5) */
 519        { 0x0246, 0x0000 },    /* R582   - FLL2 EFS 1 */
 520        { 0x0247, 0x0006 },    /* R583   - FLL2 EFS 2 */
 521        { 0x0300, 0x4050 },    /* R768   - AIF1 Control (1) */
 522        { 0x0301, 0x4000 },    /* R769   - AIF1 Control (2) */
 523        { 0x0302, 0x0000 },    /* R770   - AIF1 Master/Slave */
 524        { 0x0303, 0x0040 },    /* R771   - AIF1 BCLK */
 525        { 0x0304, 0x0040 },    /* R772   - AIF1ADC LRCLK */
 526        { 0x0305, 0x0040 },    /* R773   - AIF1DAC LRCLK */
 527        { 0x0306, 0x0004 },    /* R774   - AIF1DAC Data */
 528        { 0x0307, 0x0100 },    /* R775   - AIF1ADC Data */
 529        { 0x0310, 0x4053 },    /* R784   - AIF2 Control (1) */
 530        { 0x0311, 0x4000 },    /* R785   - AIF2 Control (2) */
 531        { 0x0312, 0x0000 },    /* R786   - AIF2 Master/Slave */
 532        { 0x0313, 0x0040 },    /* R787   - AIF2 BCLK */
 533        { 0x0314, 0x0040 },    /* R788   - AIF2ADC LRCLK */
 534        { 0x0315, 0x0040 },    /* R789   - AIF2DAC LRCLK */
 535        { 0x0316, 0x0000 },    /* R790   - AIF2DAC Data */
 536        { 0x0317, 0x0000 },    /* R791   - AIF2ADC Data */
 537        { 0x0320, 0x0040 },    /* R800   - AIF3 Control (1) */
 538        { 0x0321, 0x0000 },    /* R801   - AIF3 Control (2) */
 539        { 0x0322, 0x0000 },    /* R802   - AIF3DAC Data */
 540        { 0x0323, 0x0000 },    /* R803   - AIF3ADC Data */
 541        { 0x0400, 0x00C0 },    /* R1024  - AIF1 ADC1 Left Volume */
 542        { 0x0401, 0x00C0 },    /* R1025  - AIF1 ADC1 Right Volume */
 543        { 0x0402, 0x00C0 },    /* R1026  - AIF1 DAC1 Left Volume */
 544        { 0x0403, 0x00C0 },    /* R1027  - AIF1 DAC1 Right Volume */
 545        { 0x0404, 0x00C0 },    /* R1028  - AIF1 ADC2 Left Volume */
 546        { 0x0405, 0x00C0 },    /* R1029  - AIF1 ADC2 Right Volume */
 547        { 0x0406, 0x00C0 },    /* R1030  - AIF1 DAC2 Left Volume */
 548        { 0x0407, 0x00C0 },    /* R1031  - AIF1 DAC2 Right Volume */
 549        { 0x0410, 0x0000 },    /* R1040  - AIF1 ADC1 Filters */
 550        { 0x0411, 0x0000 },    /* R1041  - AIF1 ADC2 Filters */
 551        { 0x0420, 0x0200 },    /* R1056  - AIF1 DAC1 Filters (1) */
 552        { 0x0421, 0x0010 },    /* R1057  - AIF1 DAC1 Filters (2) */
 553        { 0x0422, 0x0200 },    /* R1058  - AIF1 DAC2 Filters (1) */
 554        { 0x0423, 0x0010 },    /* R1059  - AIF1 DAC2 Filters (2) */
 555        { 0x0430, 0x0068 },    /* R1072  - AIF1 DAC1 Noise Gate */
 556        { 0x0431, 0x0068 },    /* R1073  - AIF1 DAC2 Noise Gate */
 557        { 0x0440, 0x0098 },    /* R1088  - AIF1 DRC1 (1) */
 558        { 0x0441, 0x0845 },    /* R1089  - AIF1 DRC1 (2) */
 559        { 0x0442, 0x0000 },    /* R1090  - AIF1 DRC1 (3) */
 560        { 0x0443, 0x0000 },    /* R1091  - AIF1 DRC1 (4) */
 561        { 0x0444, 0x0000 },    /* R1092  - AIF1 DRC1 (5) */
 562        { 0x0450, 0x0098 },    /* R1104  - AIF1 DRC2 (1) */
 563        { 0x0451, 0x0845 },    /* R1105  - AIF1 DRC2 (2) */
 564        { 0x0452, 0x0000 },    /* R1106  - AIF1 DRC2 (3) */
 565        { 0x0453, 0x0000 },    /* R1107  - AIF1 DRC2 (4) */
 566        { 0x0454, 0x0000 },    /* R1108  - AIF1 DRC2 (5) */
 567        { 0x0480, 0x6318 },    /* R1152  - AIF1 DAC1 EQ Gains (1) */
 568        { 0x0481, 0x6300 },    /* R1153  - AIF1 DAC1 EQ Gains (2) */
 569        { 0x0482, 0x0FCA },    /* R1154  - AIF1 DAC1 EQ Band 1 A */
 570        { 0x0483, 0x0400 },    /* R1155  - AIF1 DAC1 EQ Band 1 B */
 571        { 0x0484, 0x00D8 },    /* R1156  - AIF1 DAC1 EQ Band 1 PG */
 572        { 0x0485, 0x1EB5 },    /* R1157  - AIF1 DAC1 EQ Band 2 A */
 573        { 0x0486, 0xF145 },    /* R1158  - AIF1 DAC1 EQ Band 2 B */
 574        { 0x0487, 0x0B75 },    /* R1159  - AIF1 DAC1 EQ Band 2 C */
 575        { 0x0488, 0x01C5 },    /* R1160  - AIF1 DAC1 EQ Band 2 PG */
 576        { 0x0489, 0x1C58 },    /* R1161  - AIF1 DAC1 EQ Band 3 A */
 577        { 0x048A, 0xF373 },    /* R1162  - AIF1 DAC1 EQ Band 3 B */
 578        { 0x048B, 0x0A54 },    /* R1163  - AIF1 DAC1 EQ Band 3 C */
 579        { 0x048C, 0x0558 },    /* R1164  - AIF1 DAC1 EQ Band 3 PG */
 580        { 0x048D, 0x168E },    /* R1165  - AIF1 DAC1 EQ Band 4 A */
 581        { 0x048E, 0xF829 },    /* R1166  - AIF1 DAC1 EQ Band 4 B */
 582        { 0x048F, 0x07AD },    /* R1167  - AIF1 DAC1 EQ Band 4 C */
 583        { 0x0490, 0x1103 },    /* R1168  - AIF1 DAC1 EQ Band 4 PG */
 584        { 0x0491, 0x0564 },    /* R1169  - AIF1 DAC1 EQ Band 5 A */
 585        { 0x0492, 0x0559 },    /* R1170  - AIF1 DAC1 EQ Band 5 B */
 586        { 0x0493, 0x4000 },    /* R1171  - AIF1 DAC1 EQ Band 5 PG */
 587        { 0x0494, 0x0000 },    /* R1172  - AIF1 DAC1 EQ Band 1 C */
 588        { 0x04A0, 0x6318 },    /* R1184  - AIF1 DAC2 EQ Gains (1) */
 589        { 0x04A1, 0x6300 },    /* R1185  - AIF1 DAC2 EQ Gains (2) */
 590        { 0x04A2, 0x0FCA },    /* R1186  - AIF1 DAC2 EQ Band 1 A */
 591        { 0x04A3, 0x0400 },    /* R1187  - AIF1 DAC2 EQ Band 1 B */
 592        { 0x04A4, 0x00D8 },    /* R1188  - AIF1 DAC2 EQ Band 1 PG */
 593        { 0x04A5, 0x1EB5 },    /* R1189  - AIF1 DAC2 EQ Band 2 A */
 594        { 0x04A6, 0xF145 },    /* R1190  - AIF1 DAC2 EQ Band 2 B */
 595        { 0x04A7, 0x0B75 },    /* R1191  - AIF1 DAC2 EQ Band 2 C */
 596        { 0x04A8, 0x01C5 },    /* R1192  - AIF1 DAC2 EQ Band 2 PG */
 597        { 0x04A9, 0x1C58 },    /* R1193  - AIF1 DAC2 EQ Band 3 A */
 598        { 0x04AA, 0xF373 },    /* R1194  - AIF1 DAC2 EQ Band 3 B */
 599        { 0x04AB, 0x0A54 },    /* R1195  - AIF1 DAC2 EQ Band 3 C */
 600        { 0x04AC, 0x0558 },    /* R1196  - AIF1 DAC2 EQ Band 3 PG */
 601        { 0x04AD, 0x168E },    /* R1197  - AIF1 DAC2 EQ Band 4 A */
 602        { 0x04AE, 0xF829 },    /* R1198  - AIF1 DAC2 EQ Band 4 B */
 603        { 0x04AF, 0x07AD },    /* R1199  - AIF1 DAC2 EQ Band 4 C */
 604        { 0x04B0, 0x1103 },    /* R1200  - AIF1 DAC2 EQ Band 4 PG */
 605        { 0x04B1, 0x0564 },    /* R1201  - AIF1 DAC2 EQ Band 5 A */
 606        { 0x04B2, 0x0559 },    /* R1202  - AIF1 DAC2 EQ Band 5 B */
 607        { 0x04B3, 0x4000 },    /* R1203  - AIF1 DAC2 EQ Band 5 PG */
 608        { 0x04B4, 0x0000 },    /* R1204  - AIF1 DAC2EQ Band 1 C */
 609        { 0x0500, 0x00C0 },    /* R1280  - AIF2 ADC Left Volume */
 610        { 0x0501, 0x00C0 },    /* R1281  - AIF2 ADC Right Volume */
 611        { 0x0502, 0x00C0 },    /* R1282  - AIF2 DAC Left Volume */
 612        { 0x0503, 0x00C0 },    /* R1283  - AIF2 DAC Right Volume */
 613        { 0x0510, 0x0000 },    /* R1296  - AIF2 ADC Filters */
 614        { 0x0520, 0x0200 },    /* R1312  - AIF2 DAC Filters (1) */
 615        { 0x0521, 0x0010 },    /* R1313  - AIF2 DAC Filters (2) */
 616        { 0x0530, 0x0068 },    /* R1328  - AIF2 DAC Noise Gate */
 617        { 0x0540, 0x0098 },    /* R1344  - AIF2 DRC (1) */
 618        { 0x0541, 0x0845 },    /* R1345  - AIF2 DRC (2) */
 619        { 0x0542, 0x0000 },    /* R1346  - AIF2 DRC (3) */
 620        { 0x0543, 0x0000 },    /* R1347  - AIF2 DRC (4) */
 621        { 0x0544, 0x0000 },    /* R1348  - AIF2 DRC (5) */
 622        { 0x0580, 0x6318 },    /* R1408  - AIF2 EQ Gains (1) */
 623        { 0x0581, 0x6300 },    /* R1409  - AIF2 EQ Gains (2) */
 624        { 0x0582, 0x0FCA },    /* R1410  - AIF2 EQ Band 1 A */
 625        { 0x0583, 0x0400 },    /* R1411  - AIF2 EQ Band 1 B */
 626        { 0x0584, 0x00D8 },    /* R1412  - AIF2 EQ Band 1 PG */
 627        { 0x0585, 0x1EB5 },    /* R1413  - AIF2 EQ Band 2 A */
 628        { 0x0586, 0xF145 },    /* R1414  - AIF2 EQ Band 2 B */
 629        { 0x0587, 0x0B75 },    /* R1415  - AIF2 EQ Band 2 C */
 630        { 0x0588, 0x01C5 },    /* R1416  - AIF2 EQ Band 2 PG */
 631        { 0x0589, 0x1C58 },    /* R1417  - AIF2 EQ Band 3 A */
 632        { 0x058A, 0xF373 },    /* R1418  - AIF2 EQ Band 3 B */
 633        { 0x058B, 0x0A54 },    /* R1419  - AIF2 EQ Band 3 C */
 634        { 0x058C, 0x0558 },    /* R1420  - AIF2 EQ Band 3 PG */
 635        { 0x058D, 0x168E },    /* R1421  - AIF2 EQ Band 4 A */
 636        { 0x058E, 0xF829 },    /* R1422  - AIF2 EQ Band 4 B */
 637        { 0x058F, 0x07AD },    /* R1423  - AIF2 EQ Band 4 C */
 638        { 0x0590, 0x1103 },    /* R1424  - AIF2 EQ Band 4 PG */
 639        { 0x0591, 0x0564 },    /* R1425  - AIF2 EQ Band 5 A */
 640        { 0x0592, 0x0559 },    /* R1426  - AIF2 EQ Band 5 B */
 641        { 0x0593, 0x4000 },    /* R1427  - AIF2 EQ Band 5 PG */
 642        { 0x0594, 0x0000 },    /* R1428  - AIF2 EQ Band 1 C */
 643        { 0x0600, 0x0000 },    /* R1536  - DAC1 Mixer Volumes */
 644        { 0x0601, 0x0000 },    /* R1537  - DAC1 Left Mixer Routing */
 645        { 0x0602, 0x0000 },    /* R1538  - DAC1 Right Mixer Routing */
 646        { 0x0603, 0x0000 },    /* R1539  - DAC2 Mixer Volumes */
 647        { 0x0604, 0x0000 },    /* R1540  - DAC2 Left Mixer Routing */
 648        { 0x0605, 0x0000 },    /* R1541  - DAC2 Right Mixer Routing */
 649        { 0x0606, 0x0000 },    /* R1542  - AIF1 ADC1 Left Mixer Routing */
 650        { 0x0607, 0x0000 },    /* R1543  - AIF1 ADC1 Right Mixer Routing */
 651        { 0x0608, 0x0000 },    /* R1544  - AIF1 ADC2 Left Mixer Routing */
 652        { 0x0609, 0x0000 },    /* R1545  - AIF1 ADC2 Right mixer Routing */
 653        { 0x0610, 0x02C0 },    /* R1552  - DAC1 Left Volume */
 654        { 0x0611, 0x02C0 },    /* R1553  - DAC1 Right Volume */
 655        { 0x0612, 0x02C0 },    /* R1554  - DAC2 Left Volume */
 656        { 0x0613, 0x02C0 },    /* R1555  - DAC2 Right Volume */
 657        { 0x0614, 0x0000 },    /* R1556  - DAC Softmute */
 658        { 0x0620, 0x0002 },    /* R1568  - Oversampling */
 659        { 0x0621, 0x0000 },    /* R1569  - Sidetone */
 660        { 0x0700, 0x8100 },    /* R1792  - GPIO 1 */
 661        { 0x0701, 0xA101 },    /* R1793  - Pull Control (MCLK2) */
 662        { 0x0702, 0xA101 },    /* R1794  - Pull Control (BCLK2) */
 663        { 0x0703, 0xA101 },    /* R1795  - Pull Control (DACLRCLK2) */
 664        { 0x0704, 0xA101 },    /* R1796  - Pull Control (DACDAT2) */
 665        { 0x0705, 0xA101 },    /* R1797  - GPIO 6 */
 666        { 0x0707, 0xA101 },    /* R1799  - GPIO 8 */
 667        { 0x0708, 0xA101 },    /* R1800  - GPIO 9 */
 668        { 0x0709, 0xA101 },    /* R1801  - GPIO 10 */
 669        { 0x070A, 0xA101 },    /* R1802  - GPIO 11 */
 670        { 0x0720, 0x0000 },    /* R1824  - Pull Control (1) */
 671        { 0x0721, 0x0156 },    /* R1825  - Pull Control (2) */
 672        { 0x0738, 0x07FF },    /* R1848  - Interrupt Status 1 Mask */
 673        { 0x0739, 0xFFEF },    /* R1849  - Interrupt Status 2 Mask */
 674        { 0x0740, 0x0000 },    /* R1856  - Interrupt Control */
 675        { 0x0748, 0x003F },    /* R1864  - IRQ Debounce */
 676        { 0x0900, 0x1C00 },    /* R2304  - DSP2_Program */
 677        { 0x0901, 0x0000 },    /* R2305  - DSP2_Config */
 678        { 0x0A0D, 0x0000 },    /* R2573  - DSP2_ExecControl */
 679        { 0x2400, 0x003F },    /* R9216  - MBC Band 1 K (1) */
 680        { 0x2401, 0x8BD8 },    /* R9217  - MBC Band 1 K (2) */
 681        { 0x2402, 0x0032 },    /* R9218  - MBC Band 1 N1 (1) */
 682        { 0x2403, 0xF52D },    /* R9219  - MBC Band 1 N1 (2) */
 683        { 0x2404, 0x0065 },    /* R9220  - MBC Band 1 N2 (1) */
 684        { 0x2405, 0xAC8C },    /* R9221  - MBC Band 1 N2 (2) */
 685        { 0x2406, 0x006B },    /* R9222  - MBC Band 1 N3 (1) */
 686        { 0x2407, 0xE087 },    /* R9223  - MBC Band 1 N3 (2) */
 687        { 0x2408, 0x0072 },    /* R9224  - MBC Band 1 N4 (1) */
 688        { 0x2409, 0x1483 },    /* R9225  - MBC Band 1 N4 (2) */
 689        { 0x240A, 0x0072 },    /* R9226  - MBC Band 1 N5 (1) */
 690        { 0x240B, 0x1483 },    /* R9227  - MBC Band 1 N5 (2) */
 691        { 0x240C, 0x0043 },    /* R9228  - MBC Band 1 X1 (1) */
 692        { 0x240D, 0x3525 },    /* R9229  - MBC Band 1 X1 (2) */
 693        { 0x240E, 0x0006 },    /* R9230  - MBC Band 1 X2 (1) */
 694        { 0x240F, 0x6A4A },    /* R9231  - MBC Band 1 X2 (2) */
 695        { 0x2410, 0x0043 },    /* R9232  - MBC Band 1 X3 (1) */
 696        { 0x2411, 0x6079 },    /* R9233  - MBC Band 1 X3 (2) */
 697        { 0x2412, 0x000C },    /* R9234  - MBC Band 1 Attack (1) */
 698        { 0x2413, 0xCCCD },    /* R9235  - MBC Band 1 Attack (2) */
 699        { 0x2414, 0x0000 },    /* R9236  - MBC Band 1 Decay (1) */
 700        { 0x2415, 0x0800 },    /* R9237  - MBC Band 1 Decay (2) */
 701        { 0x2416, 0x003F },    /* R9238  - MBC Band 2 K (1) */
 702        { 0x2417, 0x8BD8 },    /* R9239  - MBC Band 2 K (2) */
 703        { 0x2418, 0x0032 },    /* R9240  - MBC Band 2 N1 (1) */
 704        { 0x2419, 0xF52D },    /* R9241  - MBC Band 2 N1 (2) */
 705        { 0x241A, 0x0065 },    /* R9242  - MBC Band 2 N2 (1) */
 706        { 0x241B, 0xAC8C },    /* R9243  - MBC Band 2 N2 (2) */
 707        { 0x241C, 0x006B },    /* R9244  - MBC Band 2 N3 (1) */
 708        { 0x241D, 0xE087 },    /* R9245  - MBC Band 2 N3 (2) */
 709        { 0x241E, 0x0072 },    /* R9246  - MBC Band 2 N4 (1) */
 710        { 0x241F, 0x1483 },    /* R9247  - MBC Band 2 N4 (2) */
 711        { 0x2420, 0x0072 },    /* R9248  - MBC Band 2 N5 (1) */
 712        { 0x2421, 0x1483 },    /* R9249  - MBC Band 2 N5 (2) */
 713        { 0x2422, 0x0043 },    /* R9250  - MBC Band 2 X1 (1) */
 714        { 0x2423, 0x3525 },    /* R9251  - MBC Band 2 X1 (2) */
 715        { 0x2424, 0x0006 },    /* R9252  - MBC Band 2 X2 (1) */
 716        { 0x2425, 0x6A4A },    /* R9253  - MBC Band 2 X2 (2) */
 717        { 0x2426, 0x0043 },    /* R9254  - MBC Band 2 X3 (1) */
 718        { 0x2427, 0x6079 },    /* R9255  - MBC Band 2 X3 (2) */
 719        { 0x2428, 0x000C },    /* R9256  - MBC Band 2 Attack (1) */
 720        { 0x2429, 0xCCCD },    /* R9257  - MBC Band 2 Attack (2) */
 721        { 0x242A, 0x0000 },    /* R9258  - MBC Band 2 Decay (1) */
 722        { 0x242B, 0x0800 },    /* R9259  - MBC Band 2 Decay (2) */
 723        { 0x242C, 0x005A },    /* R9260  - MBC_B2_PG2 (1) */
 724        { 0x242D, 0x7EFA },    /* R9261  - MBC_B2_PG2 (2) */
 725        { 0x242E, 0x005A },    /* R9262  - MBC_B1_PG2 (1) */
 726        { 0x242F, 0x7EFA },    /* R9263  - MBC_B1_PG2 (2) */
 727        { 0x2600, 0x00A7 },    /* R9728  - MBC Crossover (1) */
 728        { 0x2601, 0x0D1C },    /* R9729  - MBC Crossover (2) */
 729        { 0x2602, 0x0083 },    /* R9730  - MBC HPF (1) */
 730        { 0x2603, 0x98AD },    /* R9731  - MBC HPF (2) */
 731        { 0x2606, 0x0008 },    /* R9734  - MBC LPF (1) */
 732        { 0x2607, 0xE7A2 },    /* R9735  - MBC LPF (2) */
 733        { 0x260A, 0x0055 },    /* R9738  - MBC RMS Limit (1) */
 734        { 0x260B, 0x8C4B },    /* R9739  - MBC RMS Limit (2) */
 735};
 736
 737static bool wm1811_readable_register(struct device *dev, unsigned int reg)
 738{
 739        switch (reg) {
 740        case WM8994_SOFTWARE_RESET:
 741        case WM8994_POWER_MANAGEMENT_1:
 742        case WM8994_POWER_MANAGEMENT_2:
 743        case WM8994_POWER_MANAGEMENT_3:
 744        case WM8994_POWER_MANAGEMENT_4:
 745        case WM8994_POWER_MANAGEMENT_5:
 746        case WM8994_POWER_MANAGEMENT_6:
 747        case WM8994_INPUT_MIXER_1:
 748        case WM8994_LEFT_LINE_INPUT_1_2_VOLUME:
 749        case WM8994_LEFT_LINE_INPUT_3_4_VOLUME:
 750        case WM8994_RIGHT_LINE_INPUT_1_2_VOLUME:
 751        case WM8994_RIGHT_LINE_INPUT_3_4_VOLUME:
 752        case WM8994_LEFT_OUTPUT_VOLUME:
 753        case WM8994_RIGHT_OUTPUT_VOLUME:
 754        case WM8994_LINE_OUTPUTS_VOLUME:
 755        case WM8994_HPOUT2_VOLUME:
 756        case WM8994_LEFT_OPGA_VOLUME:
 757        case WM8994_RIGHT_OPGA_VOLUME:
 758        case WM8994_SPKMIXL_ATTENUATION:
 759        case WM8994_SPKMIXR_ATTENUATION:
 760        case WM8994_SPKOUT_MIXERS:
 761        case WM8994_CLASSD:
 762        case WM8994_SPEAKER_VOLUME_LEFT:
 763        case WM8994_SPEAKER_VOLUME_RIGHT:
 764        case WM8994_INPUT_MIXER_2:
 765        case WM8994_INPUT_MIXER_3:
 766        case WM8994_INPUT_MIXER_4:
 767        case WM8994_INPUT_MIXER_5:
 768        case WM8994_INPUT_MIXER_6:
 769        case WM8994_OUTPUT_MIXER_1:
 770        case WM8994_OUTPUT_MIXER_2:
 771        case WM8994_OUTPUT_MIXER_3:
 772        case WM8994_OUTPUT_MIXER_4:
 773        case WM8994_OUTPUT_MIXER_5:
 774        case WM8994_OUTPUT_MIXER_6:
 775        case WM8994_HPOUT2_MIXER:
 776        case WM8994_LINE_MIXER_1:
 777        case WM8994_LINE_MIXER_2:
 778        case WM8994_SPEAKER_MIXER:
 779        case WM8994_ADDITIONAL_CONTROL:
 780        case WM8994_ANTIPOP_1:
 781        case WM8994_ANTIPOP_2:
 782        case WM8994_LDO_1:
 783        case WM8994_LDO_2:
 784        case WM8958_MICBIAS1:
 785        case WM8958_MICBIAS2:
 786        case WM8994_CHARGE_PUMP_1:
 787        case WM8958_CHARGE_PUMP_2:
 788        case WM8994_CLASS_W_1:
 789        case WM8994_DC_SERVO_1:
 790        case WM8994_DC_SERVO_2:
 791        case WM8994_DC_SERVO_READBACK:
 792        case WM8994_DC_SERVO_4:
 793        case WM8994_DC_SERVO_4E:
 794        case WM8994_ANALOGUE_HP_1:
 795        case WM8958_MIC_DETECT_1:
 796        case WM8958_MIC_DETECT_2:
 797        case WM8958_MIC_DETECT_3:
 798        case WM8994_CHIP_REVISION:
 799        case WM8994_CONTROL_INTERFACE:
 800        case WM8994_AIF1_CLOCKING_1:
 801        case WM8994_AIF1_CLOCKING_2:
 802        case WM8994_AIF2_CLOCKING_1:
 803        case WM8994_AIF2_CLOCKING_2:
 804        case WM8994_CLOCKING_1:
 805        case WM8994_CLOCKING_2:
 806        case WM8994_AIF1_RATE:
 807        case WM8994_AIF2_RATE:
 808        case WM8994_RATE_STATUS:
 809        case WM8994_FLL1_CONTROL_1:
 810        case WM8994_FLL1_CONTROL_2:
 811        case WM8994_FLL1_CONTROL_3:
 812        case WM8994_FLL1_CONTROL_4:
 813        case WM8994_FLL1_CONTROL_5:
 814        case WM8958_FLL1_EFS_1:
 815        case WM8958_FLL1_EFS_2:
 816        case WM8994_FLL2_CONTROL_1:
 817        case WM8994_FLL2_CONTROL_2:
 818        case WM8994_FLL2_CONTROL_3:
 819        case WM8994_FLL2_CONTROL_4:
 820        case WM8994_FLL2_CONTROL_5:
 821        case WM8958_FLL2_EFS_1:
 822        case WM8958_FLL2_EFS_2:
 823        case WM8994_AIF1_CONTROL_1:
 824        case WM8994_AIF1_CONTROL_2:
 825        case WM8994_AIF1_MASTER_SLAVE:
 826        case WM8994_AIF1_BCLK:
 827        case WM8994_AIF1ADC_LRCLK:
 828        case WM8994_AIF1DAC_LRCLK:
 829        case WM8994_AIF1DAC_DATA:
 830        case WM8994_AIF1ADC_DATA:
 831        case WM8994_AIF2_CONTROL_1:
 832        case WM8994_AIF2_CONTROL_2:
 833        case WM8994_AIF2_MASTER_SLAVE:
 834        case WM8994_AIF2_BCLK:
 835        case WM8994_AIF2ADC_LRCLK:
 836        case WM8994_AIF2DAC_LRCLK:
 837        case WM8994_AIF2DAC_DATA:
 838        case WM8994_AIF2ADC_DATA:
 839        case WM1811_AIF2TX_CONTROL:
 840        case WM8958_AIF3_CONTROL_1:
 841        case WM8958_AIF3_CONTROL_2:
 842        case WM8958_AIF3DAC_DATA:
 843        case WM8958_AIF3ADC_DATA:
 844        case WM8994_AIF1_ADC1_LEFT_VOLUME:
 845        case WM8994_AIF1_ADC1_RIGHT_VOLUME:
 846        case WM8994_AIF1_DAC1_LEFT_VOLUME:
 847        case WM8994_AIF1_DAC1_RIGHT_VOLUME:
 848        case WM8994_AIF1_ADC1_FILTERS:
 849        case WM8994_AIF1_DAC1_FILTERS_1:
 850        case WM8994_AIF1_DAC1_FILTERS_2:
 851        case WM8958_AIF1_DAC1_NOISE_GATE:
 852        case WM8994_AIF1_DRC1_1:
 853        case WM8994_AIF1_DRC1_2:
 854        case WM8994_AIF1_DRC1_3:
 855        case WM8994_AIF1_DRC1_4:
 856        case WM8994_AIF1_DRC1_5:
 857        case WM8994_AIF1_DAC1_EQ_GAINS_1:
 858        case WM8994_AIF1_DAC1_EQ_GAINS_2:
 859        case WM8994_AIF1_DAC1_EQ_BAND_1_A:
 860        case WM8994_AIF1_DAC1_EQ_BAND_1_B:
 861        case WM8994_AIF1_DAC1_EQ_BAND_1_PG:
 862        case WM8994_AIF1_DAC1_EQ_BAND_2_A:
 863        case WM8994_AIF1_DAC1_EQ_BAND_2_B:
 864        case WM8994_AIF1_DAC1_EQ_BAND_2_C:
 865        case WM8994_AIF1_DAC1_EQ_BAND_2_PG:
 866        case WM8994_AIF1_DAC1_EQ_BAND_3_A:
 867        case WM8994_AIF1_DAC1_EQ_BAND_3_B:
 868        case WM8994_AIF1_DAC1_EQ_BAND_3_C:
 869        case WM8994_AIF1_DAC1_EQ_BAND_3_PG:
 870        case WM8994_AIF1_DAC1_EQ_BAND_4_A:
 871        case WM8994_AIF1_DAC1_EQ_BAND_4_B:
 872        case WM8994_AIF1_DAC1_EQ_BAND_4_C:
 873        case WM8994_AIF1_DAC1_EQ_BAND_4_PG:
 874        case WM8994_AIF1_DAC1_EQ_BAND_5_A:
 875        case WM8994_AIF1_DAC1_EQ_BAND_5_B:
 876        case WM8994_AIF1_DAC1_EQ_BAND_5_PG:
 877        case WM8994_AIF1_DAC1_EQ_BAND_1_C:
 878        case WM8994_AIF2_ADC_LEFT_VOLUME:
 879        case WM8994_AIF2_ADC_RIGHT_VOLUME:
 880        case WM8994_AIF2_DAC_LEFT_VOLUME:
 881        case WM8994_AIF2_DAC_RIGHT_VOLUME:
 882        case WM8994_AIF2_ADC_FILTERS:
 883        case WM8994_AIF2_DAC_FILTERS_1:
 884        case WM8994_AIF2_DAC_FILTERS_2:
 885        case WM8958_AIF2_DAC_NOISE_GATE:
 886        case WM8994_AIF2_DRC_1:
 887        case WM8994_AIF2_DRC_2:
 888        case WM8994_AIF2_DRC_3:
 889        case WM8994_AIF2_DRC_4:
 890        case WM8994_AIF2_DRC_5:
 891        case WM8994_AIF2_EQ_GAINS_1:
 892        case WM8994_AIF2_EQ_GAINS_2:
 893        case WM8994_AIF2_EQ_BAND_1_A:
 894        case WM8994_AIF2_EQ_BAND_1_B:
 895        case WM8994_AIF2_EQ_BAND_1_PG:
 896        case WM8994_AIF2_EQ_BAND_2_A:
 897        case WM8994_AIF2_EQ_BAND_2_B:
 898        case WM8994_AIF2_EQ_BAND_2_C:
 899        case WM8994_AIF2_EQ_BAND_2_PG:
 900        case WM8994_AIF2_EQ_BAND_3_A:
 901        case WM8994_AIF2_EQ_BAND_3_B:
 902        case WM8994_AIF2_EQ_BAND_3_C:
 903        case WM8994_AIF2_EQ_BAND_3_PG:
 904        case WM8994_AIF2_EQ_BAND_4_A:
 905        case WM8994_AIF2_EQ_BAND_4_B:
 906        case WM8994_AIF2_EQ_BAND_4_C:
 907        case WM8994_AIF2_EQ_BAND_4_PG:
 908        case WM8994_AIF2_EQ_BAND_5_A:
 909        case WM8994_AIF2_EQ_BAND_5_B:
 910        case WM8994_AIF2_EQ_BAND_5_PG:
 911        case WM8994_AIF2_EQ_BAND_1_C:
 912        case WM8994_DAC1_MIXER_VOLUMES:
 913        case WM8994_DAC1_LEFT_MIXER_ROUTING:
 914        case WM8994_DAC1_RIGHT_MIXER_ROUTING:
 915        case WM8994_DAC2_MIXER_VOLUMES:
 916        case WM8994_DAC2_LEFT_MIXER_ROUTING:
 917        case WM8994_DAC2_RIGHT_MIXER_ROUTING:
 918        case WM8994_AIF1_ADC1_LEFT_MIXER_ROUTING:
 919        case WM8994_AIF1_ADC1_RIGHT_MIXER_ROUTING:
 920        case WM8994_DAC1_LEFT_VOLUME:
 921        case WM8994_DAC1_RIGHT_VOLUME:
 922        case WM8994_DAC2_LEFT_VOLUME:
 923        case WM8994_DAC2_RIGHT_VOLUME:
 924        case WM8994_DAC_SOFTMUTE:
 925        case WM8994_OVERSAMPLING:
 926        case WM8994_SIDETONE:
 927        case WM8994_GPIO_1:
 928        case WM8994_GPIO_2:
 929        case WM8994_GPIO_3:
 930        case WM8994_GPIO_4:
 931        case WM8994_GPIO_5:
 932        case WM8994_GPIO_6:
 933        case WM8994_GPIO_8:
 934        case WM8994_GPIO_9:
 935        case WM8994_GPIO_10:
 936        case WM8994_GPIO_11:
 937        case WM8994_PULL_CONTROL_1:
 938        case WM8994_PULL_CONTROL_2:
 939        case WM8994_INTERRUPT_STATUS_1:
 940        case WM8994_INTERRUPT_STATUS_2:
 941        case WM8994_INTERRUPT_RAW_STATUS_2:
 942        case WM8994_INTERRUPT_STATUS_1_MASK:
 943        case WM8994_INTERRUPT_STATUS_2_MASK:
 944        case WM8994_INTERRUPT_CONTROL:
 945        case WM8994_IRQ_DEBOUNCE:
 946                return true;
 947        default:
 948                return false;
 949        }
 950}
 951
 952static bool wm8994_readable_register(struct device *dev, unsigned int reg)
 953{
 954        switch (reg) {
 955        case WM8994_DC_SERVO_READBACK:
 956        case WM8994_MICBIAS:
 957        case WM8994_WRITE_SEQUENCER_CTRL_1:
 958        case WM8994_WRITE_SEQUENCER_CTRL_2:
 959        case WM8994_AIF1_ADC2_LEFT_VOLUME:
 960        case WM8994_AIF1_ADC2_RIGHT_VOLUME:
 961        case WM8994_AIF1_DAC2_LEFT_VOLUME:
 962        case WM8994_AIF1_DAC2_RIGHT_VOLUME:
 963        case WM8994_AIF1_ADC2_FILTERS:
 964        case WM8994_AIF1_DAC2_FILTERS_1:
 965        case WM8994_AIF1_DAC2_FILTERS_2:
 966        case WM8958_AIF1_DAC2_NOISE_GATE:
 967        case WM8994_AIF1_DRC2_1:
 968        case WM8994_AIF1_DRC2_2:
 969        case WM8994_AIF1_DRC2_3:
 970        case WM8994_AIF1_DRC2_4:
 971        case WM8994_AIF1_DRC2_5:
 972        case WM8994_AIF1_DAC2_EQ_GAINS_1:
 973        case WM8994_AIF1_DAC2_EQ_GAINS_2:
 974        case WM8994_AIF1_DAC2_EQ_BAND_1_A:
 975        case WM8994_AIF1_DAC2_EQ_BAND_1_B:
 976        case WM8994_AIF1_DAC2_EQ_BAND_1_PG:
 977        case WM8994_AIF1_DAC2_EQ_BAND_2_A:
 978        case WM8994_AIF1_DAC2_EQ_BAND_2_B:
 979        case WM8994_AIF1_DAC2_EQ_BAND_2_C:
 980        case WM8994_AIF1_DAC2_EQ_BAND_2_PG:
 981        case WM8994_AIF1_DAC2_EQ_BAND_3_A:
 982        case WM8994_AIF1_DAC2_EQ_BAND_3_B:
 983        case WM8994_AIF1_DAC2_EQ_BAND_3_C:
 984        case WM8994_AIF1_DAC2_EQ_BAND_3_PG:
 985        case WM8994_AIF1_DAC2_EQ_BAND_4_A:
 986        case WM8994_AIF1_DAC2_EQ_BAND_4_B:
 987        case WM8994_AIF1_DAC2_EQ_BAND_4_C:
 988        case WM8994_AIF1_DAC2_EQ_BAND_4_PG:
 989        case WM8994_AIF1_DAC2_EQ_BAND_5_A:
 990        case WM8994_AIF1_DAC2_EQ_BAND_5_B:
 991        case WM8994_AIF1_DAC2_EQ_BAND_5_PG:
 992        case WM8994_AIF1_DAC2_EQ_BAND_1_C:
 993        case WM8994_DAC2_MIXER_VOLUMES:
 994        case WM8994_DAC2_LEFT_MIXER_ROUTING:
 995        case WM8994_DAC2_RIGHT_MIXER_ROUTING:
 996        case WM8994_AIF1_ADC2_LEFT_MIXER_ROUTING:
 997        case WM8994_AIF1_ADC2_RIGHT_MIXER_ROUTING:
 998        case WM8994_DAC2_LEFT_VOLUME:
 999        case WM8994_DAC2_RIGHT_VOLUME:
1000                return true;
1001        default:
1002                return wm1811_readable_register(dev, reg);
1003        }
1004}
1005
1006static bool wm8958_readable_register(struct device *dev, unsigned int reg)
1007{
1008        switch (reg) {
1009        case WM8958_DSP2_PROGRAM:
1010        case WM8958_DSP2_CONFIG:
1011        case WM8958_DSP2_MAGICNUM:
1012        case WM8958_DSP2_RELEASEYEAR:
1013        case WM8958_DSP2_RELEASEMONTHDAY:
1014        case WM8958_DSP2_RELEASETIME:
1015        case WM8958_DSP2_VERMAJMIN:
1016        case WM8958_DSP2_VERBUILD:
1017        case WM8958_DSP2_TESTREG:
1018        case WM8958_DSP2_XORREG:
1019        case WM8958_DSP2_SHIFTMAXX:
1020        case WM8958_DSP2_SHIFTMAXY:
1021        case WM8958_DSP2_SHIFTMAXZ:
1022        case WM8958_DSP2_SHIFTMAXEXTLO:
1023        case WM8958_DSP2_AESSELECT:
1024        case WM8958_DSP2_EXECCONTROL:
1025        case WM8958_DSP2_SAMPLEBREAK:
1026        case WM8958_DSP2_COUNTBREAK:
1027        case WM8958_DSP2_INTSTATUS:
1028        case WM8958_DSP2_EVENTSTATUS:
1029        case WM8958_DSP2_INTMASK:
1030        case WM8958_DSP2_CONFIGDWIDTH:
1031        case WM8958_DSP2_CONFIGINSTR:
1032        case WM8958_DSP2_CONFIGDMEM:
1033        case WM8958_DSP2_CONFIGDELAYS:
1034        case WM8958_DSP2_CONFIGNUMIO:
1035        case WM8958_DSP2_CONFIGEXTDEPTH:
1036        case WM8958_DSP2_CONFIGMULTIPLIER:
1037        case WM8958_DSP2_CONFIGCTRLDWIDTH:
1038        case WM8958_DSP2_CONFIGPIPELINE:
1039        case WM8958_DSP2_SHIFTMAXEXTHI:
1040        case WM8958_DSP2_SWVERSIONREG:
1041        case WM8958_DSP2_CONFIGXMEM:
1042        case WM8958_DSP2_CONFIGYMEM:
1043        case WM8958_DSP2_CONFIGZMEM:
1044        case WM8958_FW_BUILD_1:
1045        case WM8958_FW_BUILD_0:
1046        case WM8958_FW_ID_1:
1047        case WM8958_FW_ID_0:
1048        case WM8958_FW_MAJOR_1:
1049        case WM8958_FW_MAJOR_0:
1050        case WM8958_FW_MINOR_1:
1051        case WM8958_FW_MINOR_0:
1052        case WM8958_FW_PATCH_1:
1053        case WM8958_FW_PATCH_0:
1054        case WM8958_MBC_BAND_1_K_1:
1055        case WM8958_MBC_BAND_1_K_2:
1056        case WM8958_MBC_BAND_1_N1_1:
1057        case WM8958_MBC_BAND_1_N1_2:
1058        case WM8958_MBC_BAND_1_N2_1:
1059        case WM8958_MBC_BAND_1_N2_2:
1060        case WM8958_MBC_BAND_1_N3_1:
1061        case WM8958_MBC_BAND_1_N3_2:
1062        case WM8958_MBC_BAND_1_N4_1:
1063        case WM8958_MBC_BAND_1_N4_2:
1064        case WM8958_MBC_BAND_1_N5_1:
1065        case WM8958_MBC_BAND_1_N5_2:
1066        case WM8958_MBC_BAND_1_X1_1:
1067        case WM8958_MBC_BAND_1_X1_2:
1068        case WM8958_MBC_BAND_1_X2_1:
1069        case WM8958_MBC_BAND_1_X2_2:
1070        case WM8958_MBC_BAND_1_X3_1:
1071        case WM8958_MBC_BAND_1_X3_2:
1072        case WM8958_MBC_BAND_1_ATTACK_1:
1073        case WM8958_MBC_BAND_1_ATTACK_2:
1074        case WM8958_MBC_BAND_1_DECAY_1:
1075        case WM8958_MBC_BAND_1_DECAY_2:
1076        case WM8958_MBC_BAND_2_K_1:
1077        case WM8958_MBC_BAND_2_K_2:
1078        case WM8958_MBC_BAND_2_N1_1:
1079        case WM8958_MBC_BAND_2_N1_2:
1080        case WM8958_MBC_BAND_2_N2_1:
1081        case WM8958_MBC_BAND_2_N2_2:
1082        case WM8958_MBC_BAND_2_N3_1:
1083        case WM8958_MBC_BAND_2_N3_2:
1084        case WM8958_MBC_BAND_2_N4_1:
1085        case WM8958_MBC_BAND_2_N4_2:
1086        case WM8958_MBC_BAND_2_N5_1:
1087        case WM8958_MBC_BAND_2_N5_2:
1088        case WM8958_MBC_BAND_2_X1_1:
1089        case WM8958_MBC_BAND_2_X1_2:
1090        case WM8958_MBC_BAND_2_X2_1:
1091        case WM8958_MBC_BAND_2_X2_2:
1092        case WM8958_MBC_BAND_2_X3_1:
1093        case WM8958_MBC_BAND_2_X3_2:
1094        case WM8958_MBC_BAND_2_ATTACK_1:
1095        case WM8958_MBC_BAND_2_ATTACK_2:
1096        case WM8958_MBC_BAND_2_DECAY_1:
1097        case WM8958_MBC_BAND_2_DECAY_2:
1098        case WM8958_MBC_B2_PG2_1:
1099        case WM8958_MBC_B2_PG2_2:
1100        case WM8958_MBC_B1_PG2_1:
1101        case WM8958_MBC_B1_PG2_2:
1102        case WM8958_MBC_CROSSOVER_1:
1103        case WM8958_MBC_CROSSOVER_2:
1104        case WM8958_MBC_HPF_1:
1105        case WM8958_MBC_HPF_2:
1106        case WM8958_MBC_LPF_1:
1107        case WM8958_MBC_LPF_2:
1108        case WM8958_MBC_RMS_LIMIT_1:
1109        case WM8958_MBC_RMS_LIMIT_2:
1110                return true;
1111        default:
1112                return wm8994_readable_register(dev, reg);
1113        }
1114}
1115
1116static bool wm8994_volatile_register(struct device *dev, unsigned int reg)
1117{
1118        switch (reg) {
1119        case WM8994_SOFTWARE_RESET:
1120        case WM8994_DC_SERVO_1:
1121        case WM8994_DC_SERVO_READBACK:
1122        case WM8994_RATE_STATUS:
1123        case WM8958_MIC_DETECT_3:
1124        case WM8994_DC_SERVO_4E:
1125        case WM8994_INTERRUPT_STATUS_1:
1126        case WM8994_INTERRUPT_STATUS_2:
1127                return true;
1128        default:
1129                return false;
1130        }
1131}
1132
1133static bool wm1811_volatile_register(struct device *dev, unsigned int reg)
1134{
1135        struct wm8994 *wm8994 = dev_get_drvdata(dev);
1136
1137        switch (reg) {
1138        case WM8994_GPIO_6:
1139                if (wm8994->cust_id > 1 || wm8994->revision > 1)
1140                        return true;
1141                else
1142                        return false;
1143        default:
1144                return wm8994_volatile_register(dev, reg);
1145        }
1146}
1147
1148static bool wm8958_volatile_register(struct device *dev, unsigned int reg)
1149{
1150        switch (reg) {
1151        case WM8958_DSP2_MAGICNUM:
1152        case WM8958_DSP2_RELEASEYEAR:
1153        case WM8958_DSP2_RELEASEMONTHDAY:
1154        case WM8958_DSP2_RELEASETIME:
1155        case WM8958_DSP2_VERMAJMIN:
1156        case WM8958_DSP2_VERBUILD:
1157        case WM8958_DSP2_EXECCONTROL:
1158        case WM8958_DSP2_SWVERSIONREG:
1159        case WM8958_DSP2_CONFIGXMEM:
1160        case WM8958_DSP2_CONFIGYMEM:
1161        case WM8958_DSP2_CONFIGZMEM:
1162        case WM8958_FW_BUILD_1:
1163        case WM8958_FW_BUILD_0:
1164        case WM8958_FW_ID_1:
1165        case WM8958_FW_ID_0:
1166        case WM8958_FW_MAJOR_1:
1167        case WM8958_FW_MAJOR_0:
1168        case WM8958_FW_MINOR_1:
1169        case WM8958_FW_MINOR_0:
1170        case WM8958_FW_PATCH_1:
1171        case WM8958_FW_PATCH_0:
1172                return true;
1173        default:
1174                return wm8994_volatile_register(dev, reg);
1175        }
1176}
1177
1178struct regmap_config wm1811_regmap_config = {
1179        .reg_bits = 16,
1180        .val_bits = 16,
1181
1182        .cache_type = REGCACHE_RBTREE,
1183
1184        .reg_defaults = wm1811_defaults,
1185        .num_reg_defaults = ARRAY_SIZE(wm1811_defaults),
1186
1187        .max_register = WM8994_MAX_REGISTER,
1188        .volatile_reg = wm1811_volatile_register,
1189        .readable_reg = wm1811_readable_register,
1190};
1191
1192struct regmap_config wm8994_regmap_config = {
1193        .reg_bits = 16,
1194        .val_bits = 16,
1195
1196        .cache_type = REGCACHE_RBTREE,
1197
1198        .reg_defaults = wm8994_defaults,
1199        .num_reg_defaults = ARRAY_SIZE(wm8994_defaults),
1200
1201        .max_register = WM8994_MAX_REGISTER,
1202        .volatile_reg = wm8994_volatile_register,
1203        .readable_reg = wm8994_readable_register,
1204};
1205
1206struct regmap_config wm8958_regmap_config = {
1207        .reg_bits = 16,
1208        .val_bits = 16,
1209
1210        .cache_type = REGCACHE_RBTREE,
1211
1212        .reg_defaults = wm8958_defaults,
1213        .num_reg_defaults = ARRAY_SIZE(wm8958_defaults),
1214
1215        .max_register = WM8994_MAX_REGISTER,
1216        .volatile_reg = wm8958_volatile_register,
1217        .readable_reg = wm8958_readable_register,
1218};
1219
1220struct regmap_config wm8994_base_regmap_config = {
1221        .reg_bits = 16,
1222        .val_bits = 16,
1223};
1224
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