linux/drivers/hwmon/w83627ehf.c
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   1/*
   2 *  w83627ehf - Driver for the hardware monitoring functionality of
   3 *              the Winbond W83627EHF Super-I/O chip
   4 *  Copyright (C) 2005-2011  Jean Delvare <khali@linux-fr.org>
   5 *  Copyright (C) 2006  Yuan Mu (Winbond),
   6 *                      Rudolf Marek <r.marek@assembler.cz>
   7 *                      David Hubbard <david.c.hubbard@gmail.com>
   8 *                      Daniel J Blueman <daniel.blueman@gmail.com>
   9 *  Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  10 *
  11 *  Shamelessly ripped from the w83627hf driver
  12 *  Copyright (C) 2003  Mark Studebaker
  13 *
  14 *  Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
  15 *  in testing and debugging this driver.
  16 *
  17 *  This driver also supports the W83627EHG, which is the lead-free
  18 *  version of the W83627EHF.
  19 *
  20 *  This program is free software; you can redistribute it and/or modify
  21 *  it under the terms of the GNU General Public License as published by
  22 *  the Free Software Foundation; either version 2 of the License, or
  23 *  (at your option) any later version.
  24 *
  25 *  This program is distributed in the hope that it will be useful,
  26 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  27 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28 *  GNU General Public License for more details.
  29 *
  30 *  You should have received a copy of the GNU General Public License
  31 *  along with this program; if not, write to the Free Software
  32 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  33 *
  34 *  Supports the following chips:
  35 *
  36 *  Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  37 *  w83627ehf   10      5       4       3      0x8850 0x88    0x5ca3
  38 *                                             0x8860 0xa1
  39 *  w83627dhg    9      5       4       3      0xa020 0xc1    0x5ca3
  40 *  w83627dhg-p  9      5       4       3      0xb070 0xc1    0x5ca3
  41 *  w83627uhg    8      2       2       3      0xa230 0xc1    0x5ca3
  42 *  w83667hg     9      5       3       3      0xa510 0xc1    0x5ca3
  43 *  w83667hg-b   9      5       3       4      0xb350 0xc1    0x5ca3
  44 *  nct6775f     9      4       3       9      0xb470 0xc1    0x5ca3
  45 *  nct6776f     9      5       3       9      0xC330 0xc1    0x5ca3
  46 */
  47
  48#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  49
  50#include <linux/module.h>
  51#include <linux/init.h>
  52#include <linux/slab.h>
  53#include <linux/jiffies.h>
  54#include <linux/platform_device.h>
  55#include <linux/hwmon.h>
  56#include <linux/hwmon-sysfs.h>
  57#include <linux/hwmon-vid.h>
  58#include <linux/err.h>
  59#include <linux/mutex.h>
  60#include <linux/acpi.h>
  61#include <linux/io.h>
  62#include "lm75.h"
  63
  64enum kinds {
  65        w83627ehf, w83627dhg, w83627dhg_p, w83627uhg,
  66        w83667hg, w83667hg_b, nct6775, nct6776,
  67};
  68
  69/* used to set data->name = w83627ehf_device_names[data->sio_kind] */
  70static const char * const w83627ehf_device_names[] = {
  71        "w83627ehf",
  72        "w83627dhg",
  73        "w83627dhg",
  74        "w83627uhg",
  75        "w83667hg",
  76        "w83667hg",
  77        "nct6775",
  78        "nct6776",
  79};
  80
  81static unsigned short force_id;
  82module_param(force_id, ushort, 0);
  83MODULE_PARM_DESC(force_id, "Override the detected device ID");
  84
  85static unsigned short fan_debounce;
  86module_param(fan_debounce, ushort, 0);
  87MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  88
  89#define DRVNAME "w83627ehf"
  90
  91/*
  92 * Super-I/O constants and functions
  93 */
  94
  95#define W83627EHF_LD_HWM        0x0b
  96#define W83667HG_LD_VID         0x0d
  97
  98#define SIO_REG_LDSEL           0x07    /* Logical device select */
  99#define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 100#define SIO_REG_EN_VRM10        0x2C    /* GPIO3, GPIO4 selection */
 101#define SIO_REG_ENABLE          0x30    /* Logical device enable */
 102#define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 103#define SIO_REG_VID_CTRL        0xF0    /* VID control */
 104#define SIO_REG_VID_DATA        0xF1    /* VID data */
 105
 106#define SIO_W83627EHF_ID        0x8850
 107#define SIO_W83627EHG_ID        0x8860
 108#define SIO_W83627DHG_ID        0xa020
 109#define SIO_W83627DHG_P_ID      0xb070
 110#define SIO_W83627UHG_ID        0xa230
 111#define SIO_W83667HG_ID         0xa510
 112#define SIO_W83667HG_B_ID       0xb350
 113#define SIO_NCT6775_ID          0xb470
 114#define SIO_NCT6776_ID          0xc330
 115#define SIO_ID_MASK             0xFFF0
 116
 117static inline void
 118superio_outb(int ioreg, int reg, int val)
 119{
 120        outb(reg, ioreg);
 121        outb(val, ioreg + 1);
 122}
 123
 124static inline int
 125superio_inb(int ioreg, int reg)
 126{
 127        outb(reg, ioreg);
 128        return inb(ioreg + 1);
 129}
 130
 131static inline void
 132superio_select(int ioreg, int ld)
 133{
 134        outb(SIO_REG_LDSEL, ioreg);
 135        outb(ld, ioreg + 1);
 136}
 137
 138static inline void
 139superio_enter(int ioreg)
 140{
 141        outb(0x87, ioreg);
 142        outb(0x87, ioreg);
 143}
 144
 145static inline void
 146superio_exit(int ioreg)
 147{
 148        outb(0xaa, ioreg);
 149        outb(0x02, ioreg);
 150        outb(0x02, ioreg + 1);
 151}
 152
 153/*
 154 * ISA constants
 155 */
 156
 157#define IOREGION_ALIGNMENT      (~7)
 158#define IOREGION_OFFSET         5
 159#define IOREGION_LENGTH         2
 160#define ADDR_REG_OFFSET         0
 161#define DATA_REG_OFFSET         1
 162
 163#define W83627EHF_REG_BANK              0x4E
 164#define W83627EHF_REG_CONFIG            0x40
 165
 166/*
 167 * Not currently used:
 168 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 169 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 170 * REG_MAN_ID is at port 0x4f
 171 * REG_CHIP_ID is at port 0x58
 172 */
 173
 174static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
 175static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
 176
 177/* The W83627EHF registers for nr=7,8,9 are in bank 5 */
 178#define W83627EHF_REG_IN_MAX(nr)        ((nr < 7) ? (0x2b + (nr) * 2) : \
 179                                         (0x554 + (((nr) - 7) * 2)))
 180#define W83627EHF_REG_IN_MIN(nr)        ((nr < 7) ? (0x2c + (nr) * 2) : \
 181                                         (0x555 + (((nr) - 7) * 2)))
 182#define W83627EHF_REG_IN(nr)            ((nr < 7) ? (0x20 + (nr)) : \
 183                                         (0x550 + (nr) - 7))
 184
 185static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
 186static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
 187static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
 188static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
 189
 190/* Fan clock dividers are spread over the following five registers */
 191#define W83627EHF_REG_FANDIV1           0x47
 192#define W83627EHF_REG_FANDIV2           0x4B
 193#define W83627EHF_REG_VBAT              0x5D
 194#define W83627EHF_REG_DIODE             0x59
 195#define W83627EHF_REG_SMI_OVT           0x4C
 196
 197/* NCT6775F has its own fan divider registers */
 198#define NCT6775_REG_FANDIV1             0x506
 199#define NCT6775_REG_FANDIV2             0x507
 200#define NCT6775_REG_FAN_DEBOUNCE        0xf0
 201
 202#define W83627EHF_REG_ALARM1            0x459
 203#define W83627EHF_REG_ALARM2            0x45A
 204#define W83627EHF_REG_ALARM3            0x45B
 205
 206#define W83627EHF_REG_CASEOPEN_DET      0x42 /* SMI STATUS #2 */
 207#define W83627EHF_REG_CASEOPEN_CLR      0x46 /* SMI MASK #3 */
 208
 209/* SmartFan registers */
 210#define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
 211#define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
 212
 213/* DC or PWM output fan configuration */
 214static const u8 W83627EHF_REG_PWM_ENABLE[] = {
 215        0x04,                   /* SYS FAN0 output mode and PWM mode */
 216        0x04,                   /* CPU FAN0 output mode and PWM mode */
 217        0x12,                   /* AUX FAN mode */
 218        0x62,                   /* CPU FAN1 mode */
 219};
 220
 221static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
 222static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
 223
 224/* FAN Duty Cycle, be used to control */
 225static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
 226static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
 227static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
 228
 229/* Advanced Fan control, some values are common for all fans */
 230static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
 231static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
 232static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
 233
 234static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
 235                                                = { 0xff, 0x67, 0xff, 0x69 };
 236static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
 237                                                = { 0xff, 0x68, 0xff, 0x6a };
 238
 239static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
 240static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
 241                                                = { 0x68, 0x6a, 0x6c };
 242
 243static const u16 W83627EHF_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 244
 245static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
 246static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
 247static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
 248static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
 249static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
 250static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
 251static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 252static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 253static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 254static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
 255
 256static const u16 NCT6775_REG_TEMP[]
 257        = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
 258static const u16 NCT6775_REG_TEMP_CONFIG[]
 259        = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
 260static const u16 NCT6775_REG_TEMP_HYST[]
 261        = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
 262static const u16 NCT6775_REG_TEMP_OVER[]
 263        = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
 264static const u16 NCT6775_REG_TEMP_SOURCE[]
 265        = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
 266
 267static const char *const w83667hg_b_temp_label[] = {
 268        "SYSTIN",
 269        "CPUTIN",
 270        "AUXTIN",
 271        "AMDTSI",
 272        "PECI Agent 1",
 273        "PECI Agent 2",
 274        "PECI Agent 3",
 275        "PECI Agent 4"
 276};
 277
 278static const char *const nct6775_temp_label[] = {
 279        "",
 280        "SYSTIN",
 281        "CPUTIN",
 282        "AUXTIN",
 283        "AMD SB-TSI",
 284        "PECI Agent 0",
 285        "PECI Agent 1",
 286        "PECI Agent 2",
 287        "PECI Agent 3",
 288        "PECI Agent 4",
 289        "PECI Agent 5",
 290        "PECI Agent 6",
 291        "PECI Agent 7",
 292        "PCH_CHIP_CPU_MAX_TEMP",
 293        "PCH_CHIP_TEMP",
 294        "PCH_CPU_TEMP",
 295        "PCH_MCH_TEMP",
 296        "PCH_DIM0_TEMP",
 297        "PCH_DIM1_TEMP",
 298        "PCH_DIM2_TEMP",
 299        "PCH_DIM3_TEMP"
 300};
 301
 302static const char *const nct6776_temp_label[] = {
 303        "",
 304        "SYSTIN",
 305        "CPUTIN",
 306        "AUXTIN",
 307        "SMBUSMASTER 0",
 308        "SMBUSMASTER 1",
 309        "SMBUSMASTER 2",
 310        "SMBUSMASTER 3",
 311        "SMBUSMASTER 4",
 312        "SMBUSMASTER 5",
 313        "SMBUSMASTER 6",
 314        "SMBUSMASTER 7",
 315        "PECI Agent 0",
 316        "PECI Agent 1",
 317        "PCH_CHIP_CPU_MAX_TEMP",
 318        "PCH_CHIP_TEMP",
 319        "PCH_CPU_TEMP",
 320        "PCH_MCH_TEMP",
 321        "PCH_DIM0_TEMP",
 322        "PCH_DIM1_TEMP",
 323        "PCH_DIM2_TEMP",
 324        "PCH_DIM3_TEMP",
 325        "BYTE_TEMP"
 326};
 327
 328#define NUM_REG_TEMP    ARRAY_SIZE(NCT6775_REG_TEMP)
 329
 330static int is_word_sized(u16 reg)
 331{
 332        return ((((reg & 0xff00) == 0x100
 333              || (reg & 0xff00) == 0x200)
 334             && ((reg & 0x00ff) == 0x50
 335              || (reg & 0x00ff) == 0x53
 336              || (reg & 0x00ff) == 0x55))
 337             || (reg & 0xfff0) == 0x630
 338             || reg == 0x640 || reg == 0x642
 339             || ((reg & 0xfff0) == 0x650
 340                 && (reg & 0x000f) >= 0x06)
 341             || reg == 0x73 || reg == 0x75 || reg == 0x77
 342                );
 343}
 344
 345/*
 346 * Conversions
 347 */
 348
 349/* 1 is PWM mode, output in ms */
 350static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
 351{
 352        return mode ? 100 * reg : 400 * reg;
 353}
 354
 355static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
 356{
 357        return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
 358                                                (msec + 200) / 400), 1, 255);
 359}
 360
 361static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 362{
 363        if (reg == 0 || reg == 255)
 364                return 0;
 365        return 1350000U / (reg << divreg);
 366}
 367
 368static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 369{
 370        if ((reg & 0xff1f) == 0xff1f)
 371                return 0;
 372
 373        reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 374
 375        if (reg == 0)
 376                return 0;
 377
 378        return 1350000U / reg;
 379}
 380
 381static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 382{
 383        if (reg == 0 || reg == 0xffff)
 384                return 0;
 385
 386        /*
 387         * Even though the registers are 16 bit wide, the fan divisor
 388         * still applies.
 389         */
 390        return 1350000U / (reg << divreg);
 391}
 392
 393static inline unsigned int
 394div_from_reg(u8 reg)
 395{
 396        return 1 << reg;
 397}
 398
 399/*
 400 * Some of the voltage inputs have internal scaling, the tables below
 401 * contain 8 (the ADC LSB in mV) * scaling factor * 100
 402 */
 403static const u16 scale_in_common[10] = {
 404        800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800
 405};
 406static const u16 scale_in_w83627uhg[9] = {
 407        800, 800, 3328, 3424, 800, 800, 0, 3328, 3400
 408};
 409
 410static inline long in_from_reg(u8 reg, u8 nr, const u16 *scale_in)
 411{
 412        return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 413}
 414
 415static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scale_in)
 416{
 417        return SENSORS_LIMIT(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0,
 418                             255);
 419}
 420
 421/*
 422 * Data structures and manipulation thereof
 423 */
 424
 425struct w83627ehf_data {
 426        int addr;       /* IO base of hw monitor block */
 427        const char *name;
 428
 429        struct device *hwmon_dev;
 430        struct mutex lock;
 431
 432        u16 reg_temp[NUM_REG_TEMP];
 433        u16 reg_temp_over[NUM_REG_TEMP];
 434        u16 reg_temp_hyst[NUM_REG_TEMP];
 435        u16 reg_temp_config[NUM_REG_TEMP];
 436        u8 temp_src[NUM_REG_TEMP];
 437        const char * const *temp_label;
 438
 439        const u16 *REG_PWM;
 440        const u16 *REG_TARGET;
 441        const u16 *REG_FAN;
 442        const u16 *REG_FAN_MIN;
 443        const u16 *REG_FAN_START_OUTPUT;
 444        const u16 *REG_FAN_STOP_OUTPUT;
 445        const u16 *REG_FAN_STOP_TIME;
 446        const u16 *REG_FAN_MAX_OUTPUT;
 447        const u16 *REG_FAN_STEP_OUTPUT;
 448        const u16 *scale_in;
 449
 450        unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 451        unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 452
 453        struct mutex update_lock;
 454        char valid;             /* !=0 if following fields are valid */
 455        unsigned long last_updated;     /* In jiffies */
 456
 457        /* Register values */
 458        u8 bank;                /* current register bank */
 459        u8 in_num;              /* number of in inputs we have */
 460        u8 in[10];              /* Register value */
 461        u8 in_max[10];          /* Register value */
 462        u8 in_min[10];          /* Register value */
 463        unsigned int rpm[5];
 464        u16 fan_min[5];
 465        u8 fan_div[5];
 466        u8 has_fan;             /* some fan inputs can be disabled */
 467        u8 has_fan_min;         /* some fans don't have min register */
 468        bool has_fan_div;
 469        u8 temp_type[3];
 470        s8 temp_offset[3];
 471        s16 temp[9];
 472        s16 temp_max[9];
 473        s16 temp_max_hyst[9];
 474        u32 alarms;
 475        u8 caseopen;
 476
 477        u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
 478        u8 pwm_enable[4]; /* 1->manual
 479                           * 2->thermal cruise mode (also called SmartFan I)
 480                           * 3->fan speed cruise mode
 481                           * 4->variable thermal cruise (also called
 482                           * SmartFan III)
 483                           * 5->enhanced variable thermal cruise (also called
 484                           * SmartFan IV)
 485                           */
 486        u8 pwm_enable_orig[4];  /* original value of pwm_enable */
 487        u8 pwm_num;             /* number of pwm */
 488        u8 pwm[4];
 489        u8 target_temp[4];
 490        u8 tolerance[4];
 491
 492        u8 fan_start_output[4]; /* minimum fan speed when spinning up */
 493        u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
 494        u8 fan_stop_time[4]; /* time at minimum before disabling fan */
 495        u8 fan_max_output[4]; /* maximum fan speed */
 496        u8 fan_step_output[4]; /* rate of change output value */
 497
 498        u8 vid;
 499        u8 vrm;
 500
 501        u16 have_temp;
 502        u16 have_temp_offset;
 503        u8 in6_skip:1;
 504        u8 temp3_val_only:1;
 505};
 506
 507struct w83627ehf_sio_data {
 508        int sioreg;
 509        enum kinds kind;
 510};
 511
 512/*
 513 * On older chips, only registers 0x50-0x5f are banked.
 514 * On more recent chips, all registers are banked.
 515 * Assume that is the case and set the bank number for each access.
 516 * Cache the bank number so it only needs to be set if it changes.
 517 */
 518static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
 519{
 520        u8 bank = reg >> 8;
 521        if (data->bank != bank) {
 522                outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
 523                outb_p(bank, data->addr + DATA_REG_OFFSET);
 524                data->bank = bank;
 525        }
 526}
 527
 528static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
 529{
 530        int res, word_sized = is_word_sized(reg);
 531
 532        mutex_lock(&data->lock);
 533
 534        w83627ehf_set_bank(data, reg);
 535        outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 536        res = inb_p(data->addr + DATA_REG_OFFSET);
 537        if (word_sized) {
 538                outb_p((reg & 0xff) + 1,
 539                       data->addr + ADDR_REG_OFFSET);
 540                res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 541        }
 542
 543        mutex_unlock(&data->lock);
 544        return res;
 545}
 546
 547static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
 548                                 u16 value)
 549{
 550        int word_sized = is_word_sized(reg);
 551
 552        mutex_lock(&data->lock);
 553
 554        w83627ehf_set_bank(data, reg);
 555        outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 556        if (word_sized) {
 557                outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
 558                outb_p((reg & 0xff) + 1,
 559                       data->addr + ADDR_REG_OFFSET);
 560        }
 561        outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
 562
 563        mutex_unlock(&data->lock);
 564        return 0;
 565}
 566
 567/* We left-align 8-bit temperature values to make the code simpler */
 568static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
 569{
 570        u16 res;
 571
 572        res = w83627ehf_read_value(data, reg);
 573        if (!is_word_sized(reg))
 574                res <<= 8;
 575
 576        return res;
 577}
 578
 579static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
 580                                       u16 value)
 581{
 582        if (!is_word_sized(reg))
 583                value >>= 8;
 584        return w83627ehf_write_value(data, reg, value);
 585}
 586
 587/* This function assumes that the caller holds data->update_lock */
 588static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
 589{
 590        u8 reg;
 591
 592        switch (nr) {
 593        case 0:
 594                reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
 595                    | (data->fan_div[0] & 0x7);
 596                w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 597                break;
 598        case 1:
 599                reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
 600                    | ((data->fan_div[1] << 4) & 0x70);
 601                w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 602                break;
 603        case 2:
 604                reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
 605                    | (data->fan_div[2] & 0x7);
 606                w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 607                break;
 608        case 3:
 609                reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
 610                    | ((data->fan_div[3] << 4) & 0x70);
 611                w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 612                break;
 613        }
 614}
 615
 616/* This function assumes that the caller holds data->update_lock */
 617static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
 618{
 619        u8 reg;
 620
 621        switch (nr) {
 622        case 0:
 623                reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
 624                    | ((data->fan_div[0] & 0x03) << 4);
 625                /* fan5 input control bit is write only, compute the value */
 626                reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 627                w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 628                reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
 629                    | ((data->fan_div[0] & 0x04) << 3);
 630                w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 631                break;
 632        case 1:
 633                reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
 634                    | ((data->fan_div[1] & 0x03) << 6);
 635                /* fan5 input control bit is write only, compute the value */
 636                reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 637                w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 638                reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
 639                    | ((data->fan_div[1] & 0x04) << 4);
 640                w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 641                break;
 642        case 2:
 643                reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
 644                    | ((data->fan_div[2] & 0x03) << 6);
 645                w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
 646                reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
 647                    | ((data->fan_div[2] & 0x04) << 5);
 648                w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 649                break;
 650        case 3:
 651                reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
 652                    | (data->fan_div[3] & 0x03);
 653                w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 654                reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
 655                    | ((data->fan_div[3] & 0x04) << 5);
 656                w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
 657                break;
 658        case 4:
 659                reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
 660                    | ((data->fan_div[4] & 0x03) << 2)
 661                    | ((data->fan_div[4] & 0x04) << 5);
 662                w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 663                break;
 664        }
 665}
 666
 667static void w83627ehf_write_fan_div_common(struct device *dev,
 668                                           struct w83627ehf_data *data, int nr)
 669{
 670        struct w83627ehf_sio_data *sio_data = dev->platform_data;
 671
 672        if (sio_data->kind == nct6776)
 673                ; /* no dividers, do nothing */
 674        else if (sio_data->kind == nct6775)
 675                nct6775_write_fan_div(data, nr);
 676        else
 677                w83627ehf_write_fan_div(data, nr);
 678}
 679
 680static void nct6775_update_fan_div(struct w83627ehf_data *data)
 681{
 682        u8 i;
 683
 684        i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
 685        data->fan_div[0] = i & 0x7;
 686        data->fan_div[1] = (i & 0x70) >> 4;
 687        i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
 688        data->fan_div[2] = i & 0x7;
 689        if (data->has_fan & (1<<3))
 690                data->fan_div[3] = (i & 0x70) >> 4;
 691}
 692
 693static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
 694{
 695        int i;
 696
 697        i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
 698        data->fan_div[0] = (i >> 4) & 0x03;
 699        data->fan_div[1] = (i >> 6) & 0x03;
 700        i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
 701        data->fan_div[2] = (i >> 6) & 0x03;
 702        i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
 703        data->fan_div[0] |= (i >> 3) & 0x04;
 704        data->fan_div[1] |= (i >> 4) & 0x04;
 705        data->fan_div[2] |= (i >> 5) & 0x04;
 706        if (data->has_fan & ((1 << 3) | (1 << 4))) {
 707                i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
 708                data->fan_div[3] = i & 0x03;
 709                data->fan_div[4] = ((i >> 2) & 0x03)
 710                                 | ((i >> 5) & 0x04);
 711        }
 712        if (data->has_fan & (1 << 3)) {
 713                i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
 714                data->fan_div[3] |= (i >> 5) & 0x04;
 715        }
 716}
 717
 718static void w83627ehf_update_fan_div_common(struct device *dev,
 719                                            struct w83627ehf_data *data)
 720{
 721        struct w83627ehf_sio_data *sio_data = dev->platform_data;
 722
 723        if (sio_data->kind == nct6776)
 724                ; /* no dividers, do nothing */
 725        else if (sio_data->kind == nct6775)
 726                nct6775_update_fan_div(data);
 727        else
 728                w83627ehf_update_fan_div(data);
 729}
 730
 731static void nct6775_update_pwm(struct w83627ehf_data *data)
 732{
 733        int i;
 734        int pwmcfg, fanmodecfg;
 735
 736        for (i = 0; i < data->pwm_num; i++) {
 737                pwmcfg = w83627ehf_read_value(data,
 738                                              W83627EHF_REG_PWM_ENABLE[i]);
 739                fanmodecfg = w83627ehf_read_value(data,
 740                                                  NCT6775_REG_FAN_MODE[i]);
 741                data->pwm_mode[i] =
 742                  ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 743                data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
 744                data->tolerance[i] = fanmodecfg & 0x0f;
 745                data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 746        }
 747}
 748
 749static void w83627ehf_update_pwm(struct w83627ehf_data *data)
 750{
 751        int i;
 752        int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
 753
 754        for (i = 0; i < data->pwm_num; i++) {
 755                if (!(data->has_fan & (1 << i)))
 756                        continue;
 757
 758                /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
 759                if (i != 1) {
 760                        pwmcfg = w83627ehf_read_value(data,
 761                                        W83627EHF_REG_PWM_ENABLE[i]);
 762                        tolerance = w83627ehf_read_value(data,
 763                                        W83627EHF_REG_TOLERANCE[i]);
 764                }
 765                data->pwm_mode[i] =
 766                        ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 767                data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
 768                                       & 3) + 1;
 769                data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 770
 771                data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
 772        }
 773}
 774
 775static void w83627ehf_update_pwm_common(struct device *dev,
 776                                        struct w83627ehf_data *data)
 777{
 778        struct w83627ehf_sio_data *sio_data = dev->platform_data;
 779
 780        if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
 781                nct6775_update_pwm(data);
 782        else
 783                w83627ehf_update_pwm(data);
 784}
 785
 786static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
 787{
 788        struct w83627ehf_data *data = dev_get_drvdata(dev);
 789        struct w83627ehf_sio_data *sio_data = dev->platform_data;
 790
 791        int i;
 792
 793        mutex_lock(&data->update_lock);
 794
 795        if (time_after(jiffies, data->last_updated + HZ + HZ/2)
 796         || !data->valid) {
 797                /* Fan clock dividers */
 798                w83627ehf_update_fan_div_common(dev, data);
 799
 800                /* Measured voltages and limits */
 801                for (i = 0; i < data->in_num; i++) {
 802                        if ((i == 6) && data->in6_skip)
 803                                continue;
 804
 805                        data->in[i] = w83627ehf_read_value(data,
 806                                      W83627EHF_REG_IN(i));
 807                        data->in_min[i] = w83627ehf_read_value(data,
 808                                          W83627EHF_REG_IN_MIN(i));
 809                        data->in_max[i] = w83627ehf_read_value(data,
 810                                          W83627EHF_REG_IN_MAX(i));
 811                }
 812
 813                /* Measured fan speeds and limits */
 814                for (i = 0; i < 5; i++) {
 815                        u16 reg;
 816
 817                        if (!(data->has_fan & (1 << i)))
 818                                continue;
 819
 820                        reg = w83627ehf_read_value(data, data->REG_FAN[i]);
 821                        data->rpm[i] = data->fan_from_reg(reg,
 822                                                          data->fan_div[i]);
 823
 824                        if (data->has_fan_min & (1 << i))
 825                                data->fan_min[i] = w83627ehf_read_value(data,
 826                                           data->REG_FAN_MIN[i]);
 827
 828                        /*
 829                         * If we failed to measure the fan speed and clock
 830                         * divider can be increased, let's try that for next
 831                         * time
 832                         */
 833                        if (data->has_fan_div
 834                            && (reg >= 0xff || (sio_data->kind == nct6775
 835                                                && reg == 0x00))
 836                            && data->fan_div[i] < 0x07) {
 837                                dev_dbg(dev, "Increasing fan%d "
 838                                        "clock divider from %u to %u\n",
 839                                        i + 1, div_from_reg(data->fan_div[i]),
 840                                        div_from_reg(data->fan_div[i] + 1));
 841                                data->fan_div[i]++;
 842                                w83627ehf_write_fan_div_common(dev, data, i);
 843                                /* Preserve min limit if possible */
 844                                if ((data->has_fan_min & (1 << i))
 845                                 && data->fan_min[i] >= 2
 846                                 && data->fan_min[i] != 255)
 847                                        w83627ehf_write_value(data,
 848                                                data->REG_FAN_MIN[i],
 849                                                (data->fan_min[i] /= 2));
 850                        }
 851                }
 852
 853                w83627ehf_update_pwm_common(dev, data);
 854
 855                for (i = 0; i < data->pwm_num; i++) {
 856                        if (!(data->has_fan & (1 << i)))
 857                                continue;
 858
 859                        data->fan_start_output[i] =
 860                          w83627ehf_read_value(data,
 861                                               data->REG_FAN_START_OUTPUT[i]);
 862                        data->fan_stop_output[i] =
 863                          w83627ehf_read_value(data,
 864                                               data->REG_FAN_STOP_OUTPUT[i]);
 865                        data->fan_stop_time[i] =
 866                          w83627ehf_read_value(data,
 867                                               data->REG_FAN_STOP_TIME[i]);
 868
 869                        if (data->REG_FAN_MAX_OUTPUT &&
 870                            data->REG_FAN_MAX_OUTPUT[i] != 0xff)
 871                                data->fan_max_output[i] =
 872                                  w83627ehf_read_value(data,
 873                                                data->REG_FAN_MAX_OUTPUT[i]);
 874
 875                        if (data->REG_FAN_STEP_OUTPUT &&
 876                            data->REG_FAN_STEP_OUTPUT[i] != 0xff)
 877                                data->fan_step_output[i] =
 878                                  w83627ehf_read_value(data,
 879                                                data->REG_FAN_STEP_OUTPUT[i]);
 880
 881                        data->target_temp[i] =
 882                                w83627ehf_read_value(data,
 883                                        data->REG_TARGET[i]) &
 884                                        (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
 885                }
 886
 887                /* Measured temperatures and limits */
 888                for (i = 0; i < NUM_REG_TEMP; i++) {
 889                        if (!(data->have_temp & (1 << i)))
 890                                continue;
 891                        data->temp[i] = w83627ehf_read_temp(data,
 892                                                data->reg_temp[i]);
 893                        if (data->reg_temp_over[i])
 894                                data->temp_max[i]
 895                                  = w83627ehf_read_temp(data,
 896                                                data->reg_temp_over[i]);
 897                        if (data->reg_temp_hyst[i])
 898                                data->temp_max_hyst[i]
 899                                  = w83627ehf_read_temp(data,
 900                                                data->reg_temp_hyst[i]);
 901                        if (data->have_temp_offset & (1 << i))
 902                                data->temp_offset[i]
 903                                  = w83627ehf_read_value(data,
 904                                                W83627EHF_REG_TEMP_OFFSET[i]);
 905                }
 906
 907                data->alarms = w83627ehf_read_value(data,
 908                                        W83627EHF_REG_ALARM1) |
 909                               (w83627ehf_read_value(data,
 910                                        W83627EHF_REG_ALARM2) << 8) |
 911                               (w83627ehf_read_value(data,
 912                                        W83627EHF_REG_ALARM3) << 16);
 913
 914                data->caseopen = w83627ehf_read_value(data,
 915                                                W83627EHF_REG_CASEOPEN_DET);
 916
 917                data->last_updated = jiffies;
 918                data->valid = 1;
 919        }
 920
 921        mutex_unlock(&data->update_lock);
 922        return data;
 923}
 924
 925/*
 926 * Sysfs callback functions
 927 */
 928#define show_in_reg(reg) \
 929static ssize_t \
 930show_##reg(struct device *dev, struct device_attribute *attr, \
 931           char *buf) \
 932{ \
 933        struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 934        struct sensor_device_attribute *sensor_attr = \
 935                to_sensor_dev_attr(attr); \
 936        int nr = sensor_attr->index; \
 937        return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr, \
 938                       data->scale_in)); \
 939}
 940show_in_reg(in)
 941show_in_reg(in_min)
 942show_in_reg(in_max)
 943
 944#define store_in_reg(REG, reg) \
 945static ssize_t \
 946store_in_##reg(struct device *dev, struct device_attribute *attr, \
 947               const char *buf, size_t count) \
 948{ \
 949        struct w83627ehf_data *data = dev_get_drvdata(dev); \
 950        struct sensor_device_attribute *sensor_attr = \
 951                to_sensor_dev_attr(attr); \
 952        int nr = sensor_attr->index; \
 953        unsigned long val; \
 954        int err; \
 955        err = kstrtoul(buf, 10, &val); \
 956        if (err < 0) \
 957                return err; \
 958        mutex_lock(&data->update_lock); \
 959        data->in_##reg[nr] = in_to_reg(val, nr, data->scale_in); \
 960        w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
 961                              data->in_##reg[nr]); \
 962        mutex_unlock(&data->update_lock); \
 963        return count; \
 964}
 965
 966store_in_reg(MIN, min)
 967store_in_reg(MAX, max)
 968
 969static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
 970                          char *buf)
 971{
 972        struct w83627ehf_data *data = w83627ehf_update_device(dev);
 973        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 974        int nr = sensor_attr->index;
 975        return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
 976}
 977
 978static struct sensor_device_attribute sda_in_input[] = {
 979        SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
 980        SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
 981        SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
 982        SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
 983        SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
 984        SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
 985        SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
 986        SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
 987        SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
 988        SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
 989};
 990
 991static struct sensor_device_attribute sda_in_alarm[] = {
 992        SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
 993        SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
 994        SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
 995        SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
 996        SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
 997        SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
 998        SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
 999        SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
1000        SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
1001        SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
1002};
1003
1004static struct sensor_device_attribute sda_in_min[] = {
1005        SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
1006        SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
1007        SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
1008        SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
1009        SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
1010        SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
1011        SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
1012        SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
1013        SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
1014        SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
1015};
1016
1017static struct sensor_device_attribute sda_in_max[] = {
1018        SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
1019        SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
1020        SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
1021        SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
1022        SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
1023        SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
1024        SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
1025        SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
1026        SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
1027        SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
1028};
1029
1030static ssize_t
1031show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1032{
1033        struct w83627ehf_data *data = w83627ehf_update_device(dev);
1034        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1035        int nr = sensor_attr->index;
1036        return sprintf(buf, "%d\n", data->rpm[nr]);
1037}
1038
1039static ssize_t
1040show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1041{
1042        struct w83627ehf_data *data = w83627ehf_update_device(dev);
1043        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1044        int nr = sensor_attr->index;
1045        return sprintf(buf, "%d\n",
1046                       data->fan_from_reg_min(data->fan_min[nr],
1047                                              data->fan_div[nr]));
1048}
1049
1050static ssize_t
1051show_fan_div(struct device *dev, struct device_attribute *attr,
1052             char *buf)
1053{
1054        struct w83627ehf_data *data = w83627ehf_update_device(dev);
1055        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1056        int nr = sensor_attr->index;
1057        return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1058}
1059
1060static ssize_t
1061store_fan_min(struct device *dev, struct device_attribute *attr,
1062              const char *buf, size_t count)
1063{
1064        struct w83627ehf_data *data = dev_get_drvdata(dev);
1065        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1066        int nr = sensor_attr->index;
1067        unsigned long val;
1068        int err;
1069        unsigned int reg;
1070        u8 new_div;
1071
1072        err = kstrtoul(buf, 10, &val);
1073        if (err < 0)
1074                return err;
1075
1076        mutex_lock(&data->update_lock);
1077        if (!data->has_fan_div) {
1078                /*
1079                 * Only NCT6776F for now, so we know that this is a 13 bit
1080                 * register
1081                 */
1082                if (!val) {
1083                        val = 0xff1f;
1084                } else {
1085                        if (val > 1350000U)
1086                                val = 135000U;
1087                        val = 1350000U / val;
1088                        val = (val & 0x1f) | ((val << 3) & 0xff00);
1089                }
1090                data->fan_min[nr] = val;
1091                goto done;      /* Leave fan divider alone */
1092        }
1093        if (!val) {
1094                /* No min limit, alarm disabled */
1095                data->fan_min[nr] = 255;
1096                new_div = data->fan_div[nr]; /* No change */
1097                dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1098        } else if ((reg = 1350000U / val) >= 128 * 255) {
1099                /*
1100                 * Speed below this value cannot possibly be represented,
1101                 * even with the highest divider (128)
1102                 */
1103                data->fan_min[nr] = 254;
1104                new_div = 7; /* 128 == (1 << 7) */
1105                dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
1106                         "minimum\n", nr + 1, val,
1107                         data->fan_from_reg_min(254, 7));
1108        } else if (!reg) {
1109                /*
1110                 * Speed above this value cannot possibly be represented,
1111                 * even with the lowest divider (1)
1112                 */
1113                data->fan_min[nr] = 1;
1114                new_div = 0; /* 1 == (1 << 0) */
1115                dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
1116                         "maximum\n", nr + 1, val,
1117                         data->fan_from_reg_min(1, 0));
1118        } else {
1119                /*
1120                 * Automatically pick the best divider, i.e. the one such
1121                 * that the min limit will correspond to a register value
1122                 * in the 96..192 range
1123                 */
1124                new_div = 0;
1125                while (reg > 192 && new_div < 7) {
1126                        reg >>= 1;
1127                        new_div++;
1128                }
1129                data->fan_min[nr] = reg;
1130        }
1131
1132        /*
1133         * Write both the fan clock divider (if it changed) and the new
1134         * fan min (unconditionally)
1135         */
1136        if (new_div != data->fan_div[nr]) {
1137                dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1138                        nr + 1, div_from_reg(data->fan_div[nr]),
1139                        div_from_reg(new_div));
1140                data->fan_div[nr] = new_div;
1141                w83627ehf_write_fan_div_common(dev, data, nr);
1142                /* Give the chip time to sample a new speed value */
1143                data->last_updated = jiffies;
1144        }
1145done:
1146        w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
1147                              data->fan_min[nr]);
1148        mutex_unlock(&data->update_lock);
1149
1150        return count;
1151}
1152
1153static struct sensor_device_attribute sda_fan_input[] = {
1154        SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1155        SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1156        SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1157        SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1158        SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1159};
1160
1161static struct sensor_device_attribute sda_fan_alarm[] = {
1162        SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1163        SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1164        SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1165        SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1166        SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1167};
1168
1169static struct sensor_device_attribute sda_fan_min[] = {
1170        SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1171                    store_fan_min, 0),
1172        SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1173                    store_fan_min, 1),
1174        SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1175                    store_fan_min, 2),
1176        SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1177                    store_fan_min, 3),
1178        SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1179                    store_fan_min, 4),
1180};
1181
1182static struct sensor_device_attribute sda_fan_div[] = {
1183        SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1184        SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1185        SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1186        SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1187        SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1188};
1189
1190static ssize_t
1191show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1192{
1193        struct w83627ehf_data *data = w83627ehf_update_device(dev);
1194        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1195        int nr = sensor_attr->index;
1196        return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1197}
1198
1199#define show_temp_reg(addr, reg) \
1200static ssize_t \
1201show_##reg(struct device *dev, struct device_attribute *attr, \
1202           char *buf) \
1203{ \
1204        struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1205        struct sensor_device_attribute *sensor_attr = \
1206                to_sensor_dev_attr(attr); \
1207        int nr = sensor_attr->index; \
1208        return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->reg[nr])); \
1209}
1210show_temp_reg(reg_temp, temp);
1211show_temp_reg(reg_temp_over, temp_max);
1212show_temp_reg(reg_temp_hyst, temp_max_hyst);
1213
1214#define store_temp_reg(addr, reg) \
1215static ssize_t \
1216store_##reg(struct device *dev, struct device_attribute *attr, \
1217            const char *buf, size_t count) \
1218{ \
1219        struct w83627ehf_data *data = dev_get_drvdata(dev); \
1220        struct sensor_device_attribute *sensor_attr = \
1221                to_sensor_dev_attr(attr); \
1222        int nr = sensor_attr->index; \
1223        int err; \
1224        long val; \
1225        err = kstrtol(buf, 10, &val); \
1226        if (err < 0) \
1227                return err; \
1228        mutex_lock(&data->update_lock); \
1229        data->reg[nr] = LM75_TEMP_TO_REG(val); \
1230        w83627ehf_write_temp(data, data->addr[nr], data->reg[nr]); \
1231        mutex_unlock(&data->update_lock); \
1232        return count; \
1233}
1234store_temp_reg(reg_temp_over, temp_max);
1235store_temp_reg(reg_temp_hyst, temp_max_hyst);
1236
1237static ssize_t
1238show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1239{
1240        struct w83627ehf_data *data = w83627ehf_update_device(dev);
1241        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1242
1243        return sprintf(buf, "%d\n",
1244                       data->temp_offset[sensor_attr->index] * 1000);
1245}
1246
1247static ssize_t
1248store_temp_offset(struct device *dev, struct device_attribute *attr,
1249                  const char *buf, size_t count)
1250{
1251        struct w83627ehf_data *data = dev_get_drvdata(dev);
1252        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1253        int nr = sensor_attr->index;
1254        long val;
1255        int err;
1256
1257        err = kstrtol(buf, 10, &val);
1258        if (err < 0)
1259                return err;
1260
1261        val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1262
1263        mutex_lock(&data->update_lock);
1264        data->temp_offset[nr] = val;
1265        w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[nr], val);
1266        mutex_unlock(&data->update_lock);
1267        return count;
1268}
1269
1270static ssize_t
1271show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1272{
1273        struct w83627ehf_data *data = w83627ehf_update_device(dev);
1274        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1275        int nr = sensor_attr->index;
1276        return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1277}
1278
1279static struct sensor_device_attribute sda_temp_input[] = {
1280        SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
1281        SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
1282        SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
1283        SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
1284        SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
1285        SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
1286        SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
1287        SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
1288        SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
1289};
1290
1291static struct sensor_device_attribute sda_temp_label[] = {
1292        SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1293        SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1294        SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1295        SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1296        SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1297        SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1298        SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1299        SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1300        SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1301};
1302
1303static struct sensor_device_attribute sda_temp_max[] = {
1304        SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
1305                    store_temp_max, 0),
1306        SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
1307                    store_temp_max, 1),
1308        SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
1309                    store_temp_max, 2),
1310        SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
1311                    store_temp_max, 3),
1312        SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
1313                    store_temp_max, 4),
1314        SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
1315                    store_temp_max, 5),
1316        SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
1317                    store_temp_max, 6),
1318        SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
1319                    store_temp_max, 7),
1320        SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
1321                    store_temp_max, 8),
1322};
1323
1324static struct sensor_device_attribute sda_temp_max_hyst[] = {
1325        SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1326                    store_temp_max_hyst, 0),
1327        SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1328                    store_temp_max_hyst, 1),
1329        SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1330                    store_temp_max_hyst, 2),
1331        SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1332                    store_temp_max_hyst, 3),
1333        SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1334                    store_temp_max_hyst, 4),
1335        SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1336                    store_temp_max_hyst, 5),
1337        SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1338                    store_temp_max_hyst, 6),
1339        SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1340                    store_temp_max_hyst, 7),
1341        SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1342                    store_temp_max_hyst, 8),
1343};
1344
1345static struct sensor_device_attribute sda_temp_alarm[] = {
1346        SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1347        SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1348        SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1349};
1350
1351static struct sensor_device_attribute sda_temp_type[] = {
1352        SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1353        SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1354        SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1355};
1356
1357static struct sensor_device_attribute sda_temp_offset[] = {
1358        SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1359                    store_temp_offset, 0),
1360        SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1361                    store_temp_offset, 1),
1362        SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1363                    store_temp_offset, 2),
1364};
1365
1366#define show_pwm_reg(reg) \
1367static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1368                          char *buf) \
1369{ \
1370        struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1371        struct sensor_device_attribute *sensor_attr = \
1372                to_sensor_dev_attr(attr); \
1373        int nr = sensor_attr->index; \
1374        return sprintf(buf, "%d\n", data->reg[nr]); \
1375}
1376
1377show_pwm_reg(pwm_mode)
1378show_pwm_reg(pwm_enable)
1379show_pwm_reg(pwm)
1380
1381static ssize_t
1382store_pwm_mode(struct device *dev, struct device_attribute *attr,
1383                        const char *buf, size_t count)
1384{
1385        struct w83627ehf_data *data = dev_get_drvdata(dev);
1386        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1387        struct w83627ehf_sio_data *sio_data = dev->platform_data;
1388        int nr = sensor_attr->index;
1389        unsigned long val;
1390        int err;
1391        u16 reg;
1392
1393        err = kstrtoul(buf, 10, &val);
1394        if (err < 0)
1395                return err;
1396
1397        if (val > 1)
1398                return -EINVAL;
1399
1400        /* On NCT67766F, DC mode is only supported for pwm1 */
1401        if (sio_data->kind == nct6776 && nr && val != 1)
1402                return -EINVAL;
1403
1404        mutex_lock(&data->update_lock);
1405        reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1406        data->pwm_mode[nr] = val;
1407        reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1408        if (!val)
1409                reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1410        w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1411        mutex_unlock(&data->update_lock);
1412        return count;
1413}
1414
1415static ssize_t
1416store_pwm(struct device *dev, struct device_attribute *attr,
1417                        const char *buf, size_t count)
1418{
1419        struct w83627ehf_data *data = dev_get_drvdata(dev);
1420        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1421        int nr = sensor_attr->index;
1422        unsigned long val;
1423        int err;
1424
1425        err = kstrtoul(buf, 10, &val);
1426        if (err < 0)
1427                return err;
1428
1429        val = SENSORS_LIMIT(val, 0, 255);
1430
1431        mutex_lock(&data->update_lock);
1432        data->pwm[nr] = val;
1433        w83627ehf_write_value(data, data->REG_PWM[nr], val);
1434        mutex_unlock(&data->update_lock);
1435        return count;
1436}
1437
1438static ssize_t
1439store_pwm_enable(struct device *dev, struct device_attribute *attr,
1440                        const char *buf, size_t count)
1441{
1442        struct w83627ehf_data *data = dev_get_drvdata(dev);
1443        struct w83627ehf_sio_data *sio_data = dev->platform_data;
1444        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1445        int nr = sensor_attr->index;
1446        unsigned long val;
1447        int err;
1448        u16 reg;
1449
1450        err = kstrtoul(buf, 10, &val);
1451        if (err < 0)
1452                return err;
1453
1454        if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
1455                return -EINVAL;
1456        /* SmartFan III mode is not supported on NCT6776F */
1457        if (sio_data->kind == nct6776 && val == 4)
1458                return -EINVAL;
1459
1460        mutex_lock(&data->update_lock);
1461        data->pwm_enable[nr] = val;
1462        if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1463                reg = w83627ehf_read_value(data,
1464                                           NCT6775_REG_FAN_MODE[nr]);
1465                reg &= 0x0f;
1466                reg |= (val - 1) << 4;
1467                w83627ehf_write_value(data,
1468                                      NCT6775_REG_FAN_MODE[nr], reg);
1469        } else {
1470                reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1471                reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1472                reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1473                w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1474        }
1475        mutex_unlock(&data->update_lock);
1476        return count;
1477}
1478
1479
1480#define show_tol_temp(reg) \
1481static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1482                                char *buf) \
1483{ \
1484        struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1485        struct sensor_device_attribute *sensor_attr = \
1486                to_sensor_dev_attr(attr); \
1487        int nr = sensor_attr->index; \
1488        return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1489}
1490
1491show_tol_temp(tolerance)
1492show_tol_temp(target_temp)
1493
1494static ssize_t
1495store_target_temp(struct device *dev, struct device_attribute *attr,
1496                        const char *buf, size_t count)
1497{
1498        struct w83627ehf_data *data = dev_get_drvdata(dev);
1499        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1500        int nr = sensor_attr->index;
1501        long val;
1502        int err;
1503
1504        err = kstrtol(buf, 10, &val);
1505        if (err < 0)
1506                return err;
1507
1508        val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1509
1510        mutex_lock(&data->update_lock);
1511        data->target_temp[nr] = val;
1512        w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1513        mutex_unlock(&data->update_lock);
1514        return count;
1515}
1516
1517static ssize_t
1518store_tolerance(struct device *dev, struct device_attribute *attr,
1519                        const char *buf, size_t count)
1520{
1521        struct w83627ehf_data *data = dev_get_drvdata(dev);
1522        struct w83627ehf_sio_data *sio_data = dev->platform_data;
1523        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1524        int nr = sensor_attr->index;
1525        u16 reg;
1526        long val;
1527        int err;
1528
1529        err = kstrtol(buf, 10, &val);
1530        if (err < 0)
1531                return err;
1532
1533        /* Limit the temp to 0C - 15C */
1534        val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1535
1536        mutex_lock(&data->update_lock);
1537        if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1538                /* Limit tolerance further for NCT6776F */
1539                if (sio_data->kind == nct6776 && val > 7)
1540                        val = 7;
1541                reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
1542                reg = (reg & 0xf0) | val;
1543                w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
1544        } else {
1545                reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1546                if (nr == 1)
1547                        reg = (reg & 0x0f) | (val << 4);
1548                else
1549                        reg = (reg & 0xf0) | val;
1550                w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1551        }
1552        data->tolerance[nr] = val;
1553        mutex_unlock(&data->update_lock);
1554        return count;
1555}
1556
1557static struct sensor_device_attribute sda_pwm[] = {
1558        SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1559        SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1560        SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1561        SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1562};
1563
1564static struct sensor_device_attribute sda_pwm_mode[] = {
1565        SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1566                    store_pwm_mode, 0),
1567        SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1568                    store_pwm_mode, 1),
1569        SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1570                    store_pwm_mode, 2),
1571        SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1572                    store_pwm_mode, 3),
1573};
1574
1575static struct sensor_device_attribute sda_pwm_enable[] = {
1576        SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1577                    store_pwm_enable, 0),
1578        SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1579                    store_pwm_enable, 1),
1580        SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1581                    store_pwm_enable, 2),
1582        SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1583                    store_pwm_enable, 3),
1584};
1585
1586static struct sensor_device_attribute sda_target_temp[] = {
1587        SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1588                    store_target_temp, 0),
1589        SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1590                    store_target_temp, 1),
1591        SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1592                    store_target_temp, 2),
1593        SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1594                    store_target_temp, 3),
1595};
1596
1597static struct sensor_device_attribute sda_tolerance[] = {
1598        SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1599                    store_tolerance, 0),
1600        SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1601                    store_tolerance, 1),
1602        SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1603                    store_tolerance, 2),
1604        SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1605                    store_tolerance, 3),
1606};
1607
1608/* Smart Fan registers */
1609
1610#define fan_functions(reg, REG) \
1611static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1612                       char *buf) \
1613{ \
1614        struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1615        struct sensor_device_attribute *sensor_attr = \
1616                to_sensor_dev_attr(attr); \
1617        int nr = sensor_attr->index; \
1618        return sprintf(buf, "%d\n", data->reg[nr]); \
1619} \
1620static ssize_t \
1621store_##reg(struct device *dev, struct device_attribute *attr, \
1622                            const char *buf, size_t count) \
1623{ \
1624        struct w83627ehf_data *data = dev_get_drvdata(dev); \
1625        struct sensor_device_attribute *sensor_attr = \
1626                to_sensor_dev_attr(attr); \
1627        int nr = sensor_attr->index; \
1628        unsigned long val; \
1629        int err; \
1630        err = kstrtoul(buf, 10, &val); \
1631        if (err < 0) \
1632                return err; \
1633        val = SENSORS_LIMIT(val, 1, 255); \
1634        mutex_lock(&data->update_lock); \
1635        data->reg[nr] = val; \
1636        w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1637        mutex_unlock(&data->update_lock); \
1638        return count; \
1639}
1640
1641fan_functions(fan_start_output, FAN_START_OUTPUT)
1642fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1643fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1644fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1645
1646#define fan_time_functions(reg, REG) \
1647static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1648                                char *buf) \
1649{ \
1650        struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1651        struct sensor_device_attribute *sensor_attr = \
1652                to_sensor_dev_attr(attr); \
1653        int nr = sensor_attr->index; \
1654        return sprintf(buf, "%d\n", \
1655                        step_time_from_reg(data->reg[nr], \
1656                                           data->pwm_mode[nr])); \
1657} \
1658\
1659static ssize_t \
1660store_##reg(struct device *dev, struct device_attribute *attr, \
1661                        const char *buf, size_t count) \
1662{ \
1663        struct w83627ehf_data *data = dev_get_drvdata(dev); \
1664        struct sensor_device_attribute *sensor_attr = \
1665                to_sensor_dev_attr(attr); \
1666        int nr = sensor_attr->index; \
1667        unsigned long val; \
1668        int err; \
1669        err = kstrtoul(buf, 10, &val); \
1670        if (err < 0) \
1671                return err; \
1672        val = step_time_to_reg(val, data->pwm_mode[nr]); \
1673        mutex_lock(&data->update_lock); \
1674        data->reg[nr] = val; \
1675        w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1676        mutex_unlock(&data->update_lock); \
1677        return count; \
1678} \
1679
1680fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1681
1682static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1683                         char *buf)
1684{
1685        struct w83627ehf_data *data = dev_get_drvdata(dev);
1686
1687        return sprintf(buf, "%s\n", data->name);
1688}
1689static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1690
1691static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1692        SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1693                    store_fan_stop_time, 3),
1694        SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1695                    store_fan_start_output, 3),
1696        SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1697                    store_fan_stop_output, 3),
1698        SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1699                    store_fan_max_output, 3),
1700        SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1701                    store_fan_step_output, 3),
1702};
1703
1704static struct sensor_device_attribute sda_sf3_arrays_fan3[] = {
1705        SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1706                    store_fan_stop_time, 2),
1707        SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1708                    store_fan_start_output, 2),
1709        SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1710                    store_fan_stop_output, 2),
1711};
1712
1713static struct sensor_device_attribute sda_sf3_arrays[] = {
1714        SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1715                    store_fan_stop_time, 0),
1716        SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1717                    store_fan_stop_time, 1),
1718        SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1719                    store_fan_start_output, 0),
1720        SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1721                    store_fan_start_output, 1),
1722        SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1723                    store_fan_stop_output, 0),
1724        SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1725                    store_fan_stop_output, 1),
1726};
1727
1728
1729/*
1730 * pwm1 and pwm3 don't support max and step settings on all chips.
1731 * Need to check support while generating/removing attribute files.
1732 */
1733static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1734        SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1735                    store_fan_max_output, 0),
1736        SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1737                    store_fan_step_output, 0),
1738        SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1739                    store_fan_max_output, 1),
1740        SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1741                    store_fan_step_output, 1),
1742        SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1743                    store_fan_max_output, 2),
1744        SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1745                    store_fan_step_output, 2),
1746};
1747
1748static ssize_t
1749show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1750{
1751        struct w83627ehf_data *data = dev_get_drvdata(dev);
1752        return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1753}
1754static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1755
1756
1757/* Case open detection */
1758
1759static ssize_t
1760show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
1761{
1762        struct w83627ehf_data *data = w83627ehf_update_device(dev);
1763
1764        return sprintf(buf, "%d\n",
1765                !!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
1766}
1767
1768static ssize_t
1769clear_caseopen(struct device *dev, struct device_attribute *attr,
1770                        const char *buf, size_t count)
1771{
1772        struct w83627ehf_data *data = dev_get_drvdata(dev);
1773        unsigned long val;
1774        u16 reg, mask;
1775
1776        if (kstrtoul(buf, 10, &val) || val != 0)
1777                return -EINVAL;
1778
1779        mask = to_sensor_dev_attr_2(attr)->nr;
1780
1781        mutex_lock(&data->update_lock);
1782        reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1783        w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1784        w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1785        data->valid = 0;        /* Force cache refresh */
1786        mutex_unlock(&data->update_lock);
1787
1788        return count;
1789}
1790
1791static struct sensor_device_attribute_2 sda_caseopen[] = {
1792        SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1793                        clear_caseopen, 0x80, 0x10),
1794        SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1795                        clear_caseopen, 0x40, 0x40),
1796};
1797
1798/*
1799 * Driver and device management
1800 */
1801
1802static void w83627ehf_device_remove_files(struct device *dev)
1803{
1804        /*
1805         * some entries in the following arrays may not have been used in
1806         * device_create_file(), but device_remove_file() will ignore them
1807         */
1808        int i;
1809        struct w83627ehf_data *data = dev_get_drvdata(dev);
1810
1811        for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1812                device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1813        for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1814                struct sensor_device_attribute *attr =
1815                  &sda_sf3_max_step_arrays[i];
1816                if (data->REG_FAN_STEP_OUTPUT &&
1817                    data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1818                        device_remove_file(dev, &attr->dev_attr);
1819        }
1820        for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++)
1821                device_remove_file(dev, &sda_sf3_arrays_fan3[i].dev_attr);
1822        for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1823                device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1824        for (i = 0; i < data->in_num; i++) {
1825                if ((i == 6) && data->in6_skip)
1826                        continue;
1827                device_remove_file(dev, &sda_in_input[i].dev_attr);
1828                device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1829                device_remove_file(dev, &sda_in_min[i].dev_attr);
1830                device_remove_file(dev, &sda_in_max[i].dev_attr);
1831        }
1832        for (i = 0; i < 5; i++) {
1833                device_remove_file(dev, &sda_fan_input[i].dev_attr);
1834                device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1835                device_remove_file(dev, &sda_fan_div[i].dev_attr);
1836                device_remove_file(dev, &sda_fan_min[i].dev_attr);
1837        }
1838        for (i = 0; i < data->pwm_num; i++) {
1839                device_remove_file(dev, &sda_pwm[i].dev_attr);
1840                device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1841                device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1842                device_remove_file(dev, &sda_target_temp[i].dev_attr);
1843                device_remove_file(dev, &sda_tolerance[i].dev_attr);
1844        }
1845        for (i = 0; i < NUM_REG_TEMP; i++) {
1846                if (!(data->have_temp & (1 << i)))
1847                        continue;
1848                device_remove_file(dev, &sda_temp_input[i].dev_attr);
1849                device_remove_file(dev, &sda_temp_label[i].dev_attr);
1850                if (i == 2 && data->temp3_val_only)
1851                        continue;
1852                device_remove_file(dev, &sda_temp_max[i].dev_attr);
1853                device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1854                if (i > 2)
1855                        continue;
1856                device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1857                device_remove_file(dev, &sda_temp_type[i].dev_attr);
1858                device_remove_file(dev, &sda_temp_offset[i].dev_attr);
1859        }
1860
1861        device_remove_file(dev, &sda_caseopen[0].dev_attr);
1862        device_remove_file(dev, &sda_caseopen[1].dev_attr);
1863
1864        device_remove_file(dev, &dev_attr_name);
1865        device_remove_file(dev, &dev_attr_cpu0_vid);
1866}
1867
1868/* Get the monitoring functions started */
1869static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data,
1870                                                   enum kinds kind)
1871{
1872        int i;
1873        u8 tmp, diode;
1874
1875        /* Start monitoring is needed */
1876        tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1877        if (!(tmp & 0x01))
1878                w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1879                                      tmp | 0x01);
1880
1881        /* Enable temperature sensors if needed */
1882        for (i = 0; i < NUM_REG_TEMP; i++) {
1883                if (!(data->have_temp & (1 << i)))
1884                        continue;
1885                if (!data->reg_temp_config[i])
1886                        continue;
1887                tmp = w83627ehf_read_value(data,
1888                                           data->reg_temp_config[i]);
1889                if (tmp & 0x01)
1890                        w83627ehf_write_value(data,
1891                                              data->reg_temp_config[i],
1892                                              tmp & 0xfe);
1893        }
1894
1895        /* Enable VBAT monitoring if needed */
1896        tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1897        if (!(tmp & 0x01))
1898                w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1899
1900        /* Get thermal sensor types */
1901        switch (kind) {
1902        case w83627ehf:
1903                diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1904                break;
1905        case w83627uhg:
1906                diode = 0x00;
1907                break;
1908        default:
1909                diode = 0x70;
1910        }
1911        for (i = 0; i < 3; i++) {
1912                const char *label = NULL;
1913
1914                if (data->temp_label)
1915                        label = data->temp_label[data->temp_src[i]];
1916
1917                /* Digital source overrides analog type */
1918                if (label && strncmp(label, "PECI", 4) == 0)
1919                        data->temp_type[i] = 6;
1920                else if (label && strncmp(label, "AMD", 3) == 0)
1921                        data->temp_type[i] = 5;
1922                else if ((tmp & (0x02 << i)))
1923                        data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1924                else
1925                        data->temp_type[i] = 4; /* thermistor */
1926        }
1927}
1928
1929static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
1930                                   int r1, int r2)
1931{
1932        u16 tmp;
1933
1934        tmp = data->temp_src[r1];
1935        data->temp_src[r1] = data->temp_src[r2];
1936        data->temp_src[r2] = tmp;
1937
1938        tmp = data->reg_temp[r1];
1939        data->reg_temp[r1] = data->reg_temp[r2];
1940        data->reg_temp[r2] = tmp;
1941
1942        tmp = data->reg_temp_over[r1];
1943        data->reg_temp_over[r1] = data->reg_temp_over[r2];
1944        data->reg_temp_over[r2] = tmp;
1945
1946        tmp = data->reg_temp_hyst[r1];
1947        data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];
1948        data->reg_temp_hyst[r2] = tmp;
1949
1950        tmp = data->reg_temp_config[r1];
1951        data->reg_temp_config[r1] = data->reg_temp_config[r2];
1952        data->reg_temp_config[r2] = tmp;
1953}
1954
1955static void __devinit
1956w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
1957{
1958        int i;
1959
1960        for (i = 0; i < n_temp; i++) {
1961                data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1962                data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1963                data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1964                data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1965        }
1966}
1967
1968static void __devinit
1969w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
1970                           struct w83627ehf_data *data)
1971{
1972        int fan3pin, fan4pin, fan4min, fan5pin, regval;
1973
1974        /* The W83627UHG is simple, only two fan inputs, no config */
1975        if (sio_data->kind == w83627uhg) {
1976                data->has_fan = 0x03; /* fan1 and fan2 */
1977                data->has_fan_min = 0x03;
1978                return;
1979        }
1980
1981        superio_enter(sio_data->sioreg);
1982
1983        /* fan4 and fan5 share some pins with the GPIO and serial flash */
1984        if (sio_data->kind == nct6775) {
1985                /* On NCT6775, fan4 shares pins with the fdc interface */
1986                fan3pin = 1;
1987                fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
1988                fan4min = 0;
1989                fan5pin = 0;
1990        } else if (sio_data->kind == nct6776) {
1991                bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
1992
1993                superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1994                regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
1995
1996                if (regval & 0x80)
1997                        fan3pin = gpok;
1998                else
1999                        fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2000
2001                if (regval & 0x40)
2002                        fan4pin = gpok;
2003                else
2004                        fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
2005
2006                if (regval & 0x20)
2007                        fan5pin = gpok;
2008                else
2009                        fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
2010
2011                fan4min = fan4pin;
2012        } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
2013                fan3pin = 1;
2014                fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
2015                fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
2016                fan4min = fan4pin;
2017        } else {
2018                fan3pin = 1;
2019                fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
2020                fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
2021                fan4min = fan4pin;
2022        }
2023
2024        superio_exit(sio_data->sioreg);
2025
2026        data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2027        data->has_fan |= (fan3pin << 2);
2028        data->has_fan_min |= (fan3pin << 2);
2029
2030        if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2031                /*
2032                 * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1
2033                 * register
2034                 */
2035                data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2036                data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2037        } else {
2038                /*
2039                 * It looks like fan4 and fan5 pins can be alternatively used
2040                 * as fan on/off switches, but fan5 control is write only :/
2041                 * We assume that if the serial interface is disabled, designers
2042                 * connected fan5 as input unless they are emitting log 1, which
2043                 * is not the default.
2044                 */
2045                regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
2046                if ((regval & (1 << 2)) && fan4pin) {
2047                        data->has_fan |= (1 << 3);
2048                        data->has_fan_min |= (1 << 3);
2049                }
2050                if (!(regval & (1 << 1)) && fan5pin) {
2051                        data->has_fan |= (1 << 4);
2052                        data->has_fan_min |= (1 << 4);
2053                }
2054        }
2055}
2056
2057static int __devinit w83627ehf_probe(struct platform_device *pdev)
2058{
2059        struct device *dev = &pdev->dev;
2060        struct w83627ehf_sio_data *sio_data = dev->platform_data;
2061        struct w83627ehf_data *data;
2062        struct resource *res;
2063        u8 en_vrm10;
2064        int i, err = 0;
2065
2066        res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2067        if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
2068                err = -EBUSY;
2069                dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2070                        (unsigned long)res->start,
2071                        (unsigned long)res->start + IOREGION_LENGTH - 1);
2072                goto exit;
2073        }
2074
2075        data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),
2076                            GFP_KERNEL);
2077        if (!data) {
2078                err = -ENOMEM;
2079                goto exit_release;
2080        }
2081
2082        data->addr = res->start;
2083        mutex_init(&data->lock);
2084        mutex_init(&data->update_lock);
2085        data->name = w83627ehf_device_names[sio_data->kind];
2086        data->bank = 0xff;              /* Force initial bank selection */
2087        platform_set_drvdata(pdev, data);
2088
2089        /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
2090        data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
2091        /* 667HG, NCT6775F, and NCT6776F have 3 pwms, and 627UHG has only 2 */
2092        switch (sio_data->kind) {
2093        default:
2094                data->pwm_num = 4;
2095                break;
2096        case w83667hg:
2097        case w83667hg_b:
2098        case nct6775:
2099        case nct6776:
2100                data->pwm_num = 3;
2101                break;
2102        case w83627uhg:
2103                data->pwm_num = 2;
2104                break;
2105        }
2106
2107        /* Default to 3 temperature inputs, code below will adjust as needed */
2108        data->have_temp = 0x07;
2109
2110        /* Deal with temperature register setup first. */
2111        if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2112                int mask = 0;
2113
2114                /*
2115                 * Display temperature sensor output only if it monitors
2116                 * a source other than one already reported. Always display
2117                 * first three temperature registers, though.
2118                 */
2119                for (i = 0; i < NUM_REG_TEMP; i++) {
2120                        u8 src;
2121
2122                        data->reg_temp[i] = NCT6775_REG_TEMP[i];
2123                        data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
2124                        data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
2125                        data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
2126
2127                        src = w83627ehf_read_value(data,
2128                                                   NCT6775_REG_TEMP_SOURCE[i]);
2129                        src &= 0x1f;
2130                        if (src && !(mask & (1 << src))) {
2131                                data->have_temp |= 1 << i;
2132                                mask |= 1 << src;
2133                        }
2134
2135                        data->temp_src[i] = src;
2136
2137                        /*
2138                         * Now do some register swapping if index 0..2 don't
2139                         * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
2140                         * Idea is to have the first three attributes
2141                         * report SYSTIN, CPUIN, and AUXIN if possible
2142                         * without overriding the basic system configuration.
2143                         */
2144                        if (i > 0 && data->temp_src[0] != 1
2145                            && data->temp_src[i] == 1)
2146                                w82627ehf_swap_tempreg(data, 0, i);
2147                        if (i > 1 && data->temp_src[1] != 2
2148                            && data->temp_src[i] == 2)
2149                                w82627ehf_swap_tempreg(data, 1, i);
2150                        if (i > 2 && data->temp_src[2] != 3
2151                            && data->temp_src[i] == 3)
2152                                w82627ehf_swap_tempreg(data, 2, i);
2153                }
2154                if (sio_data->kind == nct6776) {
2155                        /*
2156                         * On NCT6776, AUXTIN and VIN3 pins are shared.
2157                         * Only way to detect it is to check if AUXTIN is used
2158                         * as a temperature source, and if that source is
2159                         * enabled.
2160                         *
2161                         * If that is the case, disable in6, which reports VIN3.
2162                         * Otherwise disable temp3.
2163                         */
2164                        if (data->temp_src[2] == 3) {
2165                                u8 reg;
2166
2167                                if (data->reg_temp_config[2])
2168                                        reg = w83627ehf_read_value(data,
2169                                                data->reg_temp_config[2]);
2170                                else
2171                                        reg = 0; /* Assume AUXTIN is used */
2172
2173                                if (reg & 0x01)
2174                                        data->have_temp &= ~(1 << 2);
2175                                else
2176                                        data->in6_skip = 1;
2177                        }
2178                        data->temp_label = nct6776_temp_label;
2179                } else {
2180                        data->temp_label = nct6775_temp_label;
2181                }
2182                data->have_temp_offset = data->have_temp & 0x07;
2183                for (i = 0; i < 3; i++) {
2184                        if (data->temp_src[i] > 3)
2185                                data->have_temp_offset &= ~(1 << i);
2186                }
2187        } else if (sio_data->kind == w83667hg_b) {
2188                u8 reg;
2189
2190                w83627ehf_set_temp_reg_ehf(data, 4);
2191
2192                /*
2193                 * Temperature sources are selected with bank 0, registers 0x49
2194                 * and 0x4a.
2195                 */
2196                reg = w83627ehf_read_value(data, 0x4a);
2197                data->temp_src[0] = reg >> 5;
2198                reg = w83627ehf_read_value(data, 0x49);
2199                data->temp_src[1] = reg & 0x07;
2200                data->temp_src[2] = (reg >> 4) & 0x07;
2201
2202                /*
2203                 * W83667HG-B has another temperature register at 0x7e.
2204                 * The temperature source is selected with register 0x7d.
2205                 * Support it if the source differs from already reported
2206                 * sources.
2207                 */
2208                reg = w83627ehf_read_value(data, 0x7d);
2209                reg &= 0x07;
2210                if (reg != data->temp_src[0] && reg != data->temp_src[1]
2211                    && reg != data->temp_src[2]) {
2212                        data->temp_src[3] = reg;
2213                        data->have_temp |= 1 << 3;
2214                }
2215
2216                /*
2217                 * Chip supports either AUXTIN or VIN3. Try to find out which
2218                 * one.
2219                 */
2220                reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
2221                if (data->temp_src[2] == 2 && (reg & 0x01))
2222                        data->have_temp &= ~(1 << 2);
2223
2224                if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
2225                    || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
2226                        data->in6_skip = 1;
2227
2228                data->temp_label = w83667hg_b_temp_label;
2229                data->have_temp_offset = data->have_temp & 0x07;
2230                for (i = 0; i < 3; i++) {
2231                        if (data->temp_src[i] > 2)
2232                                data->have_temp_offset &= ~(1 << i);
2233                }
2234        } else if (sio_data->kind == w83627uhg) {
2235                u8 reg;
2236
2237                w83627ehf_set_temp_reg_ehf(data, 3);
2238
2239                /*
2240                 * Temperature sources for temp2 and temp3 are selected with
2241                 * bank 0, registers 0x49 and 0x4a.
2242                 */
2243                data->temp_src[0] = 0;  /* SYSTIN */
2244                reg = w83627ehf_read_value(data, 0x49) & 0x07;
2245                /* Adjust to have the same mapping as other source registers */
2246                if (reg == 0)
2247                        data->temp_src[1] = 1;
2248                else if (reg >= 2 && reg <= 5)
2249                        data->temp_src[1] = reg + 2;
2250                else    /* should never happen */
2251                        data->have_temp &= ~(1 << 1);
2252                reg = w83627ehf_read_value(data, 0x4a);
2253                data->temp_src[2] = reg >> 5;
2254
2255                /*
2256                 * Skip temp3 if source is invalid or the same as temp1
2257                 * or temp2.
2258                 */
2259                if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||
2260                    data->temp_src[2] == data->temp_src[0] ||
2261                    ((data->have_temp & (1 << 1)) &&
2262                     data->temp_src[2] == data->temp_src[1]))
2263                        data->have_temp &= ~(1 << 2);
2264                else
2265                        data->temp3_val_only = 1;       /* No limit regs */
2266
2267                data->in6_skip = 1;                     /* No VIN3 */
2268
2269                data->temp_label = w83667hg_b_temp_label;
2270                data->have_temp_offset = data->have_temp & 0x03;
2271                for (i = 0; i < 3; i++) {
2272                        if (data->temp_src[i] > 1)
2273                                data->have_temp_offset &= ~(1 << i);
2274                }
2275        } else {
2276                w83627ehf_set_temp_reg_ehf(data, 3);
2277
2278                /* Temperature sources are fixed */
2279
2280                if (sio_data->kind == w83667hg) {
2281                        u8 reg;
2282
2283                        /*
2284                         * Chip supports either AUXTIN or VIN3. Try to find
2285                         * out which one.
2286                         */
2287                        reg = w83627ehf_read_value(data,
2288                                                W83627EHF_REG_TEMP_CONFIG[2]);
2289                        if (reg & 0x01)
2290                                data->have_temp &= ~(1 << 2);
2291                        else
2292                                data->in6_skip = 1;
2293                }
2294                data->have_temp_offset = data->have_temp & 0x07;
2295        }
2296
2297        if (sio_data->kind == nct6775) {
2298                data->has_fan_div = true;
2299                data->fan_from_reg = fan_from_reg16;
2300                data->fan_from_reg_min = fan_from_reg8;
2301                data->REG_PWM = NCT6775_REG_PWM;
2302                data->REG_TARGET = NCT6775_REG_TARGET;
2303                data->REG_FAN = NCT6775_REG_FAN;
2304                data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2305                data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2306                data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2307                data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2308                data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
2309                data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
2310        } else if (sio_data->kind == nct6776) {
2311                data->has_fan_div = false;
2312                data->fan_from_reg = fan_from_reg13;
2313                data->fan_from_reg_min = fan_from_reg13;
2314                data->REG_PWM = NCT6775_REG_PWM;
2315                data->REG_TARGET = NCT6775_REG_TARGET;
2316                data->REG_FAN = NCT6775_REG_FAN;
2317                data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2318                data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2319                data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2320                data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2321        } else if (sio_data->kind == w83667hg_b) {
2322                data->has_fan_div = true;
2323                data->fan_from_reg = fan_from_reg8;
2324                data->fan_from_reg_min = fan_from_reg8;
2325                data->REG_PWM = W83627EHF_REG_PWM;
2326                data->REG_TARGET = W83627EHF_REG_TARGET;
2327                data->REG_FAN = W83627EHF_REG_FAN;
2328                data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2329                data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2330                data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2331                data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2332                data->REG_FAN_MAX_OUTPUT =
2333                  W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
2334                data->REG_FAN_STEP_OUTPUT =
2335                  W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
2336        } else {
2337                data->has_fan_div = true;
2338                data->fan_from_reg = fan_from_reg8;
2339                data->fan_from_reg_min = fan_from_reg8;
2340                data->REG_PWM = W83627EHF_REG_PWM;
2341                data->REG_TARGET = W83627EHF_REG_TARGET;
2342                data->REG_FAN = W83627EHF_REG_FAN;
2343                data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2344                data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2345                data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2346                data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2347                data->REG_FAN_MAX_OUTPUT =
2348                  W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
2349                data->REG_FAN_STEP_OUTPUT =
2350                  W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
2351        }
2352
2353        /* Setup input voltage scaling factors */
2354        if (sio_data->kind == w83627uhg)
2355                data->scale_in = scale_in_w83627uhg;
2356        else
2357                data->scale_in = scale_in_common;
2358
2359        /* Initialize the chip */
2360        w83627ehf_init_device(data, sio_data->kind);
2361
2362        data->vrm = vid_which_vrm();
2363        superio_enter(sio_data->sioreg);
2364        /* Read VID value */
2365        if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
2366            sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2367                /*
2368                 * W83667HG has different pins for VID input and output, so
2369                 * we can get the VID input values directly at logical device D
2370                 * 0xe3.
2371                 */
2372                superio_select(sio_data->sioreg, W83667HG_LD_VID);
2373                data->vid = superio_inb(sio_data->sioreg, 0xe3);
2374                err = device_create_file(dev, &dev_attr_cpu0_vid);
2375                if (err)
2376                        goto exit_release;
2377        } else if (sio_data->kind != w83627uhg) {
2378                superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2379                if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
2380                        /*
2381                         * Set VID input sensibility if needed. In theory the
2382                         * BIOS should have set it, but in practice it's not
2383                         * always the case. We only do it for the W83627EHF/EHG
2384                         * because the W83627DHG is more complex in this
2385                         * respect.
2386                         */
2387                        if (sio_data->kind == w83627ehf) {
2388                                en_vrm10 = superio_inb(sio_data->sioreg,
2389                                                       SIO_REG_EN_VRM10);
2390                                if ((en_vrm10 & 0x08) && data->vrm == 90) {
2391                                        dev_warn(dev, "Setting VID input "
2392                                                 "voltage to TTL\n");
2393                                        superio_outb(sio_data->sioreg,
2394                                                     SIO_REG_EN_VRM10,
2395                                                     en_vrm10 & ~0x08);
2396                                } else if (!(en_vrm10 & 0x08)
2397                                           && data->vrm == 100) {
2398                                        dev_warn(dev, "Setting VID input "
2399                                                 "voltage to VRM10\n");
2400                                        superio_outb(sio_data->sioreg,
2401                                                     SIO_REG_EN_VRM10,
2402                                                     en_vrm10 | 0x08);
2403                                }
2404                        }
2405
2406                        data->vid = superio_inb(sio_data->sioreg,
2407                                                SIO_REG_VID_DATA);
2408                        if (sio_data->kind == w83627ehf) /* 6 VID pins only */
2409                                data->vid &= 0x3f;
2410
2411                        err = device_create_file(dev, &dev_attr_cpu0_vid);
2412                        if (err)
2413                                goto exit_release;
2414                } else {
2415                        dev_info(dev, "VID pins in output mode, CPU VID not "
2416                                 "available\n");
2417                }
2418        }
2419
2420        if (fan_debounce &&
2421            (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
2422                u8 tmp;
2423
2424                superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2425                tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
2426                if (sio_data->kind == nct6776)
2427                        superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2428                                     0x3e | tmp);
2429                else
2430                        superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2431                                     0x1e | tmp);
2432                pr_info("Enabled fan debounce for chip %s\n", data->name);
2433        }
2434
2435        superio_exit(sio_data->sioreg);
2436
2437        w83627ehf_check_fan_inputs(sio_data, data);
2438
2439        /* Read fan clock dividers immediately */
2440        w83627ehf_update_fan_div_common(dev, data);
2441
2442        /* Read pwm data to save original values */
2443        w83627ehf_update_pwm_common(dev, data);
2444        for (i = 0; i < data->pwm_num; i++)
2445                data->pwm_enable_orig[i] = data->pwm_enable[i];
2446
2447        /* Register sysfs hooks */
2448        for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
2449                err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
2450                if (err)
2451                        goto exit_remove;
2452        }
2453
2454        for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
2455                struct sensor_device_attribute *attr =
2456                  &sda_sf3_max_step_arrays[i];
2457                if (data->REG_FAN_STEP_OUTPUT &&
2458                    data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
2459                        err = device_create_file(dev, &attr->dev_attr);
2460                        if (err)
2461                                goto exit_remove;
2462                }
2463        }
2464        /* if fan3 and fan4 are enabled create the sf3 files for them */
2465        if ((data->has_fan & (1 << 2)) && data->pwm_num >= 3)
2466                for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++) {
2467                        err = device_create_file(dev,
2468                                        &sda_sf3_arrays_fan3[i].dev_attr);
2469                        if (err)
2470                                goto exit_remove;
2471                }
2472        if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
2473                for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
2474                        err = device_create_file(dev,
2475                                        &sda_sf3_arrays_fan4[i].dev_attr);
2476                        if (err)
2477                                goto exit_remove;
2478                }
2479
2480        for (i = 0; i < data->in_num; i++) {
2481                if ((i == 6) && data->in6_skip)
2482                        continue;
2483                if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
2484                        || (err = device_create_file(dev,
2485                                &sda_in_alarm[i].dev_attr))
2486                        || (err = device_create_file(dev,
2487                                &sda_in_min[i].dev_attr))
2488                        || (err = device_create_file(dev,
2489                                &sda_in_max[i].dev_attr)))
2490                        goto exit_remove;
2491        }
2492
2493        for (i = 0; i < 5; i++) {
2494                if (data->has_fan & (1 << i)) {
2495                        if ((err = device_create_file(dev,
2496                                        &sda_fan_input[i].dev_attr))
2497                                || (err = device_create_file(dev,
2498                                        &sda_fan_alarm[i].dev_attr)))
2499                                goto exit_remove;
2500                        if (sio_data->kind != nct6776) {
2501                                err = device_create_file(dev,
2502                                                &sda_fan_div[i].dev_attr);
2503                                if (err)
2504                                        goto exit_remove;
2505                        }
2506                        if (data->has_fan_min & (1 << i)) {
2507                                err = device_create_file(dev,
2508                                                &sda_fan_min[i].dev_attr);
2509                                if (err)
2510                                        goto exit_remove;
2511                        }
2512                        if (i < data->pwm_num &&
2513                                ((err = device_create_file(dev,
2514                                        &sda_pwm[i].dev_attr))
2515                                || (err = device_create_file(dev,
2516                                        &sda_pwm_mode[i].dev_attr))
2517                                || (err = device_create_file(dev,
2518                                        &sda_pwm_enable[i].dev_attr))
2519                                || (err = device_create_file(dev,
2520                                        &sda_target_temp[i].dev_attr))
2521                                || (err = device_create_file(dev,
2522                                        &sda_tolerance[i].dev_attr))))
2523                                goto exit_remove;
2524                }
2525        }
2526
2527        for (i = 0; i < NUM_REG_TEMP; i++) {
2528                if (!(data->have_temp & (1 << i)))
2529                        continue;
2530                err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2531                if (err)
2532                        goto exit_remove;
2533                if (data->temp_label) {
2534                        err = device_create_file(dev,
2535                                                 &sda_temp_label[i].dev_attr);
2536                        if (err)
2537                                goto exit_remove;
2538                }
2539                if (i == 2 && data->temp3_val_only)
2540                        continue;
2541                if (data->reg_temp_over[i]) {
2542                        err = device_create_file(dev,
2543                                &sda_temp_max[i].dev_attr);
2544                        if (err)
2545                                goto exit_remove;
2546                }
2547                if (data->reg_temp_hyst[i]) {
2548                        err = device_create_file(dev,
2549                                &sda_temp_max_hyst[i].dev_attr);
2550                        if (err)
2551                                goto exit_remove;
2552                }
2553                if (i > 2)
2554                        continue;
2555                if ((err = device_create_file(dev,
2556                                &sda_temp_alarm[i].dev_attr))
2557                        || (err = device_create_file(dev,
2558                                &sda_temp_type[i].dev_attr)))
2559                        goto exit_remove;
2560                if (data->have_temp_offset & (1 << i)) {
2561                        err = device_create_file(dev,
2562                                                 &sda_temp_offset[i].dev_attr);
2563                        if (err)
2564                                goto exit_remove;
2565                }
2566        }
2567
2568        err = device_create_file(dev, &sda_caseopen[0].dev_attr);
2569        if (err)
2570                goto exit_remove;
2571
2572        if (sio_data->kind == nct6776) {
2573                err = device_create_file(dev, &sda_caseopen[1].dev_attr);
2574                if (err)
2575                        goto exit_remove;
2576        }
2577
2578        err = device_create_file(dev, &dev_attr_name);
2579        if (err)
2580                goto exit_remove;
2581
2582        data->hwmon_dev = hwmon_device_register(dev);
2583        if (IS_ERR(data->hwmon_dev)) {
2584                err = PTR_ERR(data->hwmon_dev);
2585                goto exit_remove;
2586        }
2587
2588        return 0;
2589
2590exit_remove:
2591        w83627ehf_device_remove_files(dev);
2592exit_release:
2593        platform_set_drvdata(pdev, NULL);
2594        release_region(res->start, IOREGION_LENGTH);
2595exit:
2596        return err;
2597}
2598
2599static int __devexit w83627ehf_remove(struct platform_device *pdev)
2600{
2601        struct w83627ehf_data *data = platform_get_drvdata(pdev);
2602
2603        hwmon_device_unregister(data->hwmon_dev);
2604        w83627ehf_device_remove_files(&pdev->dev);
2605        release_region(data->addr, IOREGION_LENGTH);
2606        platform_set_drvdata(pdev, NULL);
2607
2608        return 0;
2609}
2610
2611static struct platform_driver w83627ehf_driver = {
2612        .driver = {
2613                .owner  = THIS_MODULE,
2614                .name   = DRVNAME,
2615        },
2616        .probe          = w83627ehf_probe,
2617        .remove         = __devexit_p(w83627ehf_remove),
2618};
2619
2620/* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2621static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2622                                 struct w83627ehf_sio_data *sio_data)
2623{
2624        static const char sio_name_W83627EHF[] __initconst = "W83627EHF";
2625        static const char sio_name_W83627EHG[] __initconst = "W83627EHG";
2626        static const char sio_name_W83627DHG[] __initconst = "W83627DHG";
2627        static const char sio_name_W83627DHG_P[] __initconst = "W83627DHG-P";
2628        static const char sio_name_W83627UHG[] __initconst = "W83627UHG";
2629        static const char sio_name_W83667HG[] __initconst = "W83667HG";
2630        static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B";
2631        static const char sio_name_NCT6775[] __initconst = "NCT6775F";
2632        static const char sio_name_NCT6776[] __initconst = "NCT6776F";
2633
2634        u16 val;
2635        const char *sio_name;
2636
2637        superio_enter(sioaddr);
2638
2639        if (force_id)
2640                val = force_id;
2641        else
2642                val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2643                    | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2644        switch (val & SIO_ID_MASK) {
2645        case SIO_W83627EHF_ID:
2646                sio_data->kind = w83627ehf;
2647                sio_name = sio_name_W83627EHF;
2648                break;
2649        case SIO_W83627EHG_ID:
2650                sio_data->kind = w83627ehf;
2651                sio_name = sio_name_W83627EHG;
2652                break;
2653        case SIO_W83627DHG_ID:
2654                sio_data->kind = w83627dhg;
2655                sio_name = sio_name_W83627DHG;
2656                break;
2657        case SIO_W83627DHG_P_ID:
2658                sio_data->kind = w83627dhg_p;
2659                sio_name = sio_name_W83627DHG_P;
2660                break;
2661        case SIO_W83627UHG_ID:
2662                sio_data->kind = w83627uhg;
2663                sio_name = sio_name_W83627UHG;
2664                break;
2665        case SIO_W83667HG_ID:
2666                sio_data->kind = w83667hg;
2667                sio_name = sio_name_W83667HG;
2668                break;
2669        case SIO_W83667HG_B_ID:
2670                sio_data->kind = w83667hg_b;
2671                sio_name = sio_name_W83667HG_B;
2672                break;
2673        case SIO_NCT6775_ID:
2674                sio_data->kind = nct6775;
2675                sio_name = sio_name_NCT6775;
2676                break;
2677        case SIO_NCT6776_ID:
2678                sio_data->kind = nct6776;
2679                sio_name = sio_name_NCT6776;
2680                break;
2681        default:
2682                if (val != 0xffff)
2683                        pr_debug("unsupported chip ID: 0x%04x\n", val);
2684                superio_exit(sioaddr);
2685                return -ENODEV;
2686        }
2687
2688        /* We have a known chip, find the HWM I/O address */
2689        superio_select(sioaddr, W83627EHF_LD_HWM);
2690        val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2691            | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2692        *addr = val & IOREGION_ALIGNMENT;
2693        if (*addr == 0) {
2694                pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2695                superio_exit(sioaddr);
2696                return -ENODEV;
2697        }
2698
2699        /* Activate logical device if needed */
2700        val = superio_inb(sioaddr, SIO_REG_ENABLE);
2701        if (!(val & 0x01)) {
2702                pr_warn("Forcibly enabling Super-I/O. "
2703                        "Sensor is probably unusable.\n");
2704                superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2705        }
2706
2707        superio_exit(sioaddr);
2708        pr_info("Found %s chip at %#x\n", sio_name, *addr);
2709        sio_data->sioreg = sioaddr;
2710
2711        return 0;
2712}
2713
2714/*
2715 * when Super-I/O functions move to a separate file, the Super-I/O
2716 * bus will manage the lifetime of the device and this module will only keep
2717 * track of the w83627ehf driver. But since we platform_device_alloc(), we
2718 * must keep track of the device
2719 */
2720static struct platform_device *pdev;
2721
2722static int __init sensors_w83627ehf_init(void)
2723{
2724        int err;
2725        unsigned short address;
2726        struct resource res;
2727        struct w83627ehf_sio_data sio_data;
2728
2729        /*
2730         * initialize sio_data->kind and sio_data->sioreg.
2731         *
2732         * when Super-I/O functions move to a separate file, the Super-I/O
2733         * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2734         * w83627ehf hardware monitor, and call probe()
2735         */
2736        if (w83627ehf_find(0x2e, &address, &sio_data) &&
2737            w83627ehf_find(0x4e, &address, &sio_data))
2738                return -ENODEV;
2739
2740        err = platform_driver_register(&w83627ehf_driver);
2741        if (err)
2742                goto exit;
2743
2744        pdev = platform_device_alloc(DRVNAME, address);
2745        if (!pdev) {
2746                err = -ENOMEM;
2747                pr_err("Device allocation failed\n");
2748                goto exit_unregister;
2749        }
2750
2751        err = platform_device_add_data(pdev, &sio_data,
2752                                       sizeof(struct w83627ehf_sio_data));
2753        if (err) {
2754                pr_err("Platform data allocation failed\n");
2755                goto exit_device_put;
2756        }
2757
2758        memset(&res, 0, sizeof(res));
2759        res.name = DRVNAME;
2760        res.start = address + IOREGION_OFFSET;
2761        res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2762        res.flags = IORESOURCE_IO;
2763
2764        err = acpi_check_resource_conflict(&res);
2765        if (err)
2766                goto exit_device_put;
2767
2768        err = platform_device_add_resources(pdev, &res, 1);
2769        if (err) {
2770                pr_err("Device resource addition failed (%d)\n", err);
2771                goto exit_device_put;
2772        }
2773
2774        /* platform_device_add calls probe() */
2775        err = platform_device_add(pdev);
2776        if (err) {
2777                pr_err("Device addition failed (%d)\n", err);
2778                goto exit_device_put;
2779        }
2780
2781        return 0;
2782
2783exit_device_put:
2784        platform_device_put(pdev);
2785exit_unregister:
2786        platform_driver_unregister(&w83627ehf_driver);
2787exit:
2788        return err;
2789}
2790
2791static void __exit sensors_w83627ehf_exit(void)
2792{
2793        platform_device_unregister(pdev);
2794        platform_driver_unregister(&w83627ehf_driver);
2795}
2796
2797MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
2798MODULE_DESCRIPTION("W83627EHF driver");
2799MODULE_LICENSE("GPL");
2800
2801module_init(sensors_w83627ehf_init);
2802module_exit(sensors_w83627ehf_exit);
2803
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