linux/drivers/atm/firestream.c
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   1
   2/* drivers/atm/firestream.c - FireStream 155 (MB86697) and
   3 *                            FireStream  50 (MB86695) device driver 
   4 */
   5 
   6/* Written & (C) 2000 by R.E.Wolff@BitWizard.nl 
   7 * Copied snippets from zatm.c by Werner Almesberger, EPFL LRC/ICA 
   8 * and ambassador.c Copyright (C) 1995-1999  Madge Networks Ltd 
   9 */
  10
  11/*
  12  This program is free software; you can redistribute it and/or modify
  13  it under the terms of the GNU General Public License as published by
  14  the Free Software Foundation; either version 2 of the License, or
  15  (at your option) any later version.
  16
  17  This program is distributed in the hope that it will be useful,
  18  but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  GNU General Public License for more details.
  21
  22  You should have received a copy of the GNU General Public License
  23  along with this program; if not, write to the Free Software
  24  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  25
  26  The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
  27  system and in the file COPYING in the Linux kernel source.
  28*/
  29
  30
  31#include <linux/module.h>
  32#include <linux/sched.h>
  33#include <linux/kernel.h>
  34#include <linux/mm.h>
  35#include <linux/pci.h>
  36#include <linux/poison.h>
  37#include <linux/errno.h>
  38#include <linux/atm.h>
  39#include <linux/atmdev.h>
  40#include <linux/sonet.h>
  41#include <linux/skbuff.h>
  42#include <linux/netdevice.h>
  43#include <linux/delay.h>
  44#include <linux/ioport.h> /* for request_region */
  45#include <linux/uio.h>
  46#include <linux/init.h>
  47#include <linux/interrupt.h>
  48#include <linux/capability.h>
  49#include <linux/bitops.h>
  50#include <linux/slab.h>
  51#include <asm/byteorder.h>
  52#include <asm/string.h>
  53#include <asm/io.h>
  54#include <linux/atomic.h>
  55#include <asm/uaccess.h>
  56#include <linux/wait.h>
  57
  58#include "firestream.h"
  59
  60static int loopback = 0;
  61static int num=0x5a;
  62
  63/* According to measurements (but they look suspicious to me!) done in
  64 * '97, 37% of the packets are one cell in size. So it pays to have
  65 * buffers allocated at that size. A large jump in percentage of
  66 * packets occurs at packets around 536 bytes in length. So it also
  67 * pays to have those pre-allocated. Unfortunately, we can't fully
  68 * take advantage of this as the majority of the packets is likely to
  69 * be TCP/IP (As where obviously the measurement comes from) There the
  70 * link would be opened with say a 1500 byte MTU, and we can't handle
  71 * smaller buffers more efficiently than the larger ones. -- REW
  72 */
  73
  74/* Due to the way Linux memory management works, specifying "576" as
  75 * an allocation size here isn't going to help. They are allocated
  76 * from 1024-byte regions anyway. With the size of the sk_buffs (quite
  77 * large), it doesn't pay to allocate the smallest size (64) -- REW */
  78
  79/* This is all guesswork. Hard numbers to back this up or disprove this, 
  80 * are appreciated. -- REW */
  81
  82/* The last entry should be about 64k. However, the "buffer size" is
  83 * passed to the chip in a 16 bit field. I don't know how "65536"
  84 * would be interpreted. -- REW */
  85
  86#define NP FS_NR_FREE_POOLS
  87static int rx_buf_sizes[NP]  = {128,  256,  512, 1024, 2048, 4096, 16384, 65520};
  88/* log2:                 7     8     9    10    11    12    14     16 */
  89
  90#if 0
  91static int rx_pool_sizes[NP] = {1024, 1024, 512, 256,  128,  64,   32,    32};
  92#else
  93/* debug */
  94static int rx_pool_sizes[NP] = {128,  128,  128, 64,   64,   64,   32,    32};
  95#endif
  96/* log2:                 10    10    9    8     7     6     5      5  */
  97/* sumlog2:              17    18    18   18    18    18    19     21 */
  98/* mem allocated:        128k  256k  256k 256k  256k  256k  512k   2M */
  99/* tot mem: almost 4M */
 100
 101/* NP is shorter, so that it fits on a single line. */
 102#undef NP
 103
 104
 105/* Small hardware gotcha:
 106
 107   The FS50 CAM (VP/VC match registers) always take the lowest channel
 108   number that matches. This is not a problem.
 109
 110   However, they also ignore whether the channel is enabled or
 111   not. This means that if you allocate channel 0 to 1.2 and then
 112   channel 1 to 0.0, then disabeling channel 0 and writing 0 to the
 113   match channel for channel 0 will "steal" the traffic from channel
 114   1, even if you correctly disable channel 0.
 115
 116   Workaround: 
 117
 118   - When disabling channels, write an invalid VP/VC value to the
 119   match register. (We use 0xffffffff, which in the worst case 
 120   matches VP/VC = <maxVP>/<maxVC>, but I expect it not to match
 121   anything as some "when not in use, program to 0" bits are now
 122   programmed to 1...)
 123
 124   - Don't initialize the match registers to 0, as 0.0 is a valid
 125   channel.
 126*/
 127
 128
 129/* Optimization hints and tips.
 130
 131   The FireStream chips are very capable of reducing the amount of
 132   "interrupt-traffic" for the CPU. This driver requests an interrupt on EVERY
 133   action. You could try to minimize this a bit. 
 134
 135   Besides that, the userspace->kernel copy and the PCI bus are the
 136   performance limiting issues for this driver.
 137
 138   You could queue up a bunch of outgoing packets without telling the
 139   FireStream. I'm not sure that's going to win you much though. The
 140   Linux layer won't tell us in advance when it's not going to give us
 141   any more packets in a while. So this is tricky to implement right without
 142   introducing extra delays. 
 143  
 144   -- REW
 145 */
 146
 147
 148
 149
 150/* The strings that define what the RX queue entry is all about. */
 151/* Fujitsu: Please tell me which ones can have a pointer to a 
 152   freepool descriptor! */
 153static char *res_strings[] = {
 154        "RX OK: streaming not EOP", 
 155        "RX OK: streaming EOP", 
 156        "RX OK: Single buffer packet", 
 157        "RX OK: packet mode", 
 158        "RX OK: F4 OAM (end to end)", 
 159        "RX OK: F4 OAM (Segment)", 
 160        "RX OK: F5 OAM (end to end)", 
 161        "RX OK: F5 OAM (Segment)", 
 162        "RX OK: RM cell", 
 163        "RX OK: TRANSP cell", 
 164        "RX OK: TRANSPC cell", 
 165        "Unmatched cell", 
 166        "reserved 12", 
 167        "reserved 13", 
 168        "reserved 14", 
 169        "Unrecognized cell", 
 170        "reserved 16", 
 171        "reassemby abort: AAL5 abort", 
 172        "packet purged", 
 173        "packet ageing timeout", 
 174        "channel ageing timeout", 
 175        "calculated length error", 
 176        "programmed length limit error", 
 177        "aal5 crc32 error", 
 178        "oam transp or transpc crc10 error", 
 179        "reserved 25", 
 180        "reserved 26", 
 181        "reserved 27", 
 182        "reserved 28", 
 183        "reserved 29", 
 184        "reserved 30", 
 185        "reassembly abort: no buffers", 
 186        "receive buffer overflow", 
 187        "change in GFC", 
 188        "receive buffer full", 
 189        "low priority discard - no receive descriptor", 
 190        "low priority discard - missing end of packet", 
 191        "reserved 41", 
 192        "reserved 42", 
 193        "reserved 43", 
 194        "reserved 44", 
 195        "reserved 45", 
 196        "reserved 46", 
 197        "reserved 47", 
 198        "reserved 48", 
 199        "reserved 49", 
 200        "reserved 50", 
 201        "reserved 51", 
 202        "reserved 52", 
 203        "reserved 53", 
 204        "reserved 54", 
 205        "reserved 55", 
 206        "reserved 56", 
 207        "reserved 57", 
 208        "reserved 58", 
 209        "reserved 59", 
 210        "reserved 60", 
 211        "reserved 61", 
 212        "reserved 62", 
 213        "reserved 63", 
 214};  
 215
 216static char *irq_bitname[] = {
 217        "LPCO",
 218        "DPCO",
 219        "RBRQ0_W",
 220        "RBRQ1_W",
 221        "RBRQ2_W",
 222        "RBRQ3_W",
 223        "RBRQ0_NF",
 224        "RBRQ1_NF",
 225        "RBRQ2_NF",
 226        "RBRQ3_NF",
 227        "BFP_SC",
 228        "INIT",
 229        "INIT_ERR",
 230        "USCEO",
 231        "UPEC0",
 232        "VPFCO",
 233        "CRCCO",
 234        "HECO",
 235        "TBRQ_W",
 236        "TBRQ_NF",
 237        "CTPQ_E",
 238        "GFC_C0",
 239        "PCI_FTL",
 240        "CSQ_W",
 241        "CSQ_NF",
 242        "EXT_INT",
 243        "RXDMA_S"
 244};
 245
 246
 247#define PHY_EOF -1
 248#define PHY_CLEARALL -2
 249
 250struct reginit_item {
 251        int reg, val;
 252};
 253
 254
 255static struct reginit_item PHY_NTC_INIT[] __devinitdata = {
 256        { PHY_CLEARALL, 0x40 }, 
 257        { 0x12,  0x0001 },
 258        { 0x13,  0x7605 },
 259        { 0x1A,  0x0001 },
 260        { 0x1B,  0x0005 },
 261        { 0x38,  0x0003 },
 262        { 0x39,  0x0006 },   /* changed here to make loopback */
 263        { 0x01,  0x5262 },
 264        { 0x15,  0x0213 },
 265        { 0x00,  0x0003 },
 266        { PHY_EOF, 0},    /* -1 signals end of list */
 267};
 268
 269
 270/* Safetyfeature: If the card interrupts more than this number of times
 271   in a jiffy (1/100th of a second) then we just disable the interrupt and
 272   print a message. This prevents the system from hanging. 
 273
 274   150000 packets per second is close to the limit a PC is going to have
 275   anyway. We therefore have to disable this for production. -- REW */
 276#undef IRQ_RATE_LIMIT // 100
 277
 278/* Interrupts work now. Unlike serial cards, ATM cards don't work all
 279   that great without interrupts. -- REW */
 280#undef FS_POLL_FREQ // 100
 281
 282/* 
 283   This driver can spew a whole lot of debugging output at you. If you
 284   need maximum performance, you should disable the DEBUG define. To
 285   aid in debugging in the field, I'm leaving the compile-time debug
 286   features enabled, and disable them "runtime". That allows me to
 287   instruct people with problems to enable debugging without requiring
 288   them to recompile... -- REW
 289*/
 290#define DEBUG
 291
 292#ifdef DEBUG
 293#define fs_dprintk(f, str...) if (fs_debug & f) printk (str)
 294#else
 295#define fs_dprintk(f, str...) /* nothing */
 296#endif
 297
 298
 299static int fs_keystream = 0;
 300
 301#ifdef DEBUG
 302/* I didn't forget to set this to zero before shipping. Hit me with a stick 
 303   if you get this with the debug default not set to zero again. -- REW */
 304static int fs_debug = 0;
 305#else
 306#define fs_debug 0
 307#endif
 308
 309#ifdef MODULE
 310#ifdef DEBUG 
 311module_param(fs_debug, int, 0644);
 312#endif
 313module_param(loopback, int, 0);
 314module_param(num, int, 0);
 315module_param(fs_keystream, int, 0);
 316/* XXX Add rx_buf_sizes, and rx_pool_sizes As per request Amar. -- REW */
 317#endif
 318
 319
 320#define FS_DEBUG_FLOW    0x00000001
 321#define FS_DEBUG_OPEN    0x00000002
 322#define FS_DEBUG_QUEUE   0x00000004
 323#define FS_DEBUG_IRQ     0x00000008
 324#define FS_DEBUG_INIT    0x00000010
 325#define FS_DEBUG_SEND    0x00000020
 326#define FS_DEBUG_PHY     0x00000040
 327#define FS_DEBUG_CLEANUP 0x00000080
 328#define FS_DEBUG_QOS     0x00000100
 329#define FS_DEBUG_TXQ     0x00000200
 330#define FS_DEBUG_ALLOC   0x00000400
 331#define FS_DEBUG_TXMEM   0x00000800
 332#define FS_DEBUG_QSIZE   0x00001000
 333
 334
 335#define func_enter() fs_dprintk(FS_DEBUG_FLOW, "fs: enter %s\n", __func__)
 336#define func_exit()  fs_dprintk(FS_DEBUG_FLOW, "fs: exit  %s\n", __func__)
 337
 338
 339static struct fs_dev *fs_boards = NULL;
 340
 341#ifdef DEBUG
 342
 343static void my_hd (void *addr, int len)
 344{
 345        int j, ch;
 346        unsigned char *ptr = addr;
 347
 348        while (len > 0) {
 349                printk ("%p ", ptr);
 350                for (j=0;j < ((len < 16)?len:16);j++) {
 351                        printk ("%02x %s", ptr[j], (j==7)?" ":"");
 352                }
 353                for (  ;j < 16;j++) {
 354                        printk ("   %s", (j==7)?" ":"");
 355                }
 356                for (j=0;j < ((len < 16)?len:16);j++) {
 357                        ch = ptr[j];
 358                        printk ("%c", (ch < 0x20)?'.':((ch > 0x7f)?'.':ch));
 359                }
 360                printk ("\n");
 361                ptr += 16;
 362                len -= 16;
 363        }
 364}
 365#else /* DEBUG */
 366static void my_hd (void *addr, int len){}
 367#endif /* DEBUG */
 368
 369/********** free an skb (as per ATM device driver documentation) **********/
 370
 371/* Hmm. If this is ATM specific, why isn't there an ATM routine for this?
 372 * I copied it over from the ambassador driver. -- REW */
 373
 374static inline void fs_kfree_skb (struct sk_buff * skb) 
 375{
 376        if (ATM_SKB(skb)->vcc->pop)
 377                ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
 378        else
 379                dev_kfree_skb_any (skb);
 380}
 381
 382
 383
 384
 385/* It seems the ATM forum recommends this horribly complicated 16bit
 386 * floating point format. Turns out the Ambassador uses the exact same
 387 * encoding. I just copied it over. If Mitch agrees, I'll move it over
 388 * to the atm_misc file or something like that. (and remove it from 
 389 * here and the ambassador driver) -- REW
 390 */
 391
 392/* The good thing about this format is that it is monotonic. So, 
 393   a conversion routine need not be very complicated. To be able to
 394   round "nearest" we need to take along a few extra bits. Lets
 395   put these after 16 bits, so that we can just return the top 16
 396   bits of the 32bit number as the result:
 397
 398   int mr (unsigned int rate, int r) 
 399     {
 400     int e = 16+9;
 401     static int round[4]={0, 0, 0xffff, 0x8000};
 402     if (!rate) return 0;
 403     while (rate & 0xfc000000) {
 404       rate >>= 1;
 405       e++;
 406     }
 407     while (! (rate & 0xfe000000)) {
 408       rate <<= 1;
 409       e--;
 410     }
 411
 412// Now the mantissa is in positions bit 16-25. Excepf for the "hidden 1" that's in bit 26.
 413     rate &= ~0x02000000;
 414// Next add in the exponent
 415     rate |= e << (16+9);
 416// And perform the rounding:
 417     return (rate + round[r]) >> 16;
 418   }
 419
 420   14 lines-of-code. Compare that with the 120 that the Ambassador
 421   guys needed. (would be 8 lines shorter if I'd try to really reduce
 422   the number of lines:
 423
 424   int mr (unsigned int rate, int r) 
 425   {
 426     int e = 16+9;
 427     static int round[4]={0, 0, 0xffff, 0x8000};
 428     if (!rate) return 0;
 429     for (;  rate & 0xfc000000 ;rate >>= 1, e++);
 430     for (;!(rate & 0xfe000000);rate <<= 1, e--);
 431     return ((rate & ~0x02000000) | (e << (16+9)) + round[r]) >> 16;
 432   }
 433
 434   Exercise for the reader: Remove one more line-of-code, without
 435   cheating. (Just joining two lines is cheating). (I know it's
 436   possible, don't think you've beat me if you found it... If you
 437   manage to lose two lines or more, keep me updated! ;-)
 438
 439   -- REW */
 440
 441
 442#define ROUND_UP      1
 443#define ROUND_DOWN    2
 444#define ROUND_NEAREST 3
 445/********** make rate (not quite as much fun as Horizon) **********/
 446
 447static int make_rate(unsigned int rate, int r,
 448                      u16 *bits, unsigned int *actual)
 449{
 450        unsigned char exp = -1; /* hush gcc */
 451        unsigned int man = -1;  /* hush gcc */
 452  
 453        fs_dprintk (FS_DEBUG_QOS, "make_rate %u", rate);
 454  
 455        /* rates in cells per second, ITU format (nasty 16-bit floating-point)
 456           given 5-bit e and 9-bit m:
 457           rate = EITHER (1+m/2^9)*2^e    OR 0
 458           bits = EITHER 1<<14 | e<<9 | m OR 0
 459           (bit 15 is "reserved", bit 14 "non-zero")
 460           smallest rate is 0 (special representation)
 461           largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
 462           smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
 463           simple algorithm:
 464           find position of top bit, this gives e
 465           remove top bit and shift (rounding if feeling clever) by 9-e
 466        */
 467        /* Ambassador ucode bug: please don't set bit 14! so 0 rate not
 468           representable. // This should move into the ambassador driver
 469           when properly merged. -- REW */
 470  
 471        if (rate > 0xffc00000U) {
 472                /* larger than largest representable rate */
 473    
 474                if (r == ROUND_UP) {
 475                        return -EINVAL;
 476                } else {
 477                        exp = 31;
 478                        man = 511;
 479                }
 480    
 481        } else if (rate) {
 482                /* representable rate */
 483    
 484                exp = 31;
 485                man = rate;
 486    
 487                /* invariant: rate = man*2^(exp-31) */
 488                while (!(man & (1<<31))) {
 489                        exp = exp - 1;
 490                        man = man<<1;
 491                }
 492    
 493                /* man has top bit set
 494                   rate = (2^31+(man-2^31))*2^(exp-31)
 495                   rate = (1+(man-2^31)/2^31)*2^exp 
 496                */
 497                man = man<<1;
 498                man &= 0xffffffffU; /* a nop on 32-bit systems */
 499                /* rate = (1+man/2^32)*2^exp
 500    
 501                   exp is in the range 0 to 31, man is in the range 0 to 2^32-1
 502                   time to lose significance... we want m in the range 0 to 2^9-1
 503                   rounding presents a minor problem... we first decide which way
 504                   we are rounding (based on given rounding direction and possibly
 505                   the bits of the mantissa that are to be discarded).
 506                */
 507
 508                switch (r) {
 509                case ROUND_DOWN: {
 510                        /* just truncate */
 511                        man = man>>(32-9);
 512                        break;
 513                }
 514                case ROUND_UP: {
 515                        /* check all bits that we are discarding */
 516                        if (man & (~0U>>9)) {
 517                                man = (man>>(32-9)) + 1;
 518                                if (man == (1<<9)) {
 519                                        /* no need to check for round up outside of range */
 520                                        man = 0;
 521                                        exp += 1;
 522                                }
 523                        } else {
 524                                man = (man>>(32-9));
 525                        }
 526                        break;
 527                }
 528                case ROUND_NEAREST: {
 529                        /* check msb that we are discarding */
 530                        if (man & (1<<(32-9-1))) {
 531                                man = (man>>(32-9)) + 1;
 532                                if (man == (1<<9)) {
 533                                        /* no need to check for round up outside of range */
 534                                        man = 0;
 535                                        exp += 1;
 536                                }
 537                        } else {
 538                                man = (man>>(32-9));
 539                        }
 540                        break;
 541                }
 542                }
 543    
 544        } else {
 545                /* zero rate - not representable */
 546    
 547                if (r == ROUND_DOWN) {
 548                        return -EINVAL;
 549                } else {
 550                        exp = 0;
 551                        man = 0;
 552                }
 553        }
 554  
 555        fs_dprintk (FS_DEBUG_QOS, "rate: man=%u, exp=%hu", man, exp);
 556  
 557        if (bits)
 558                *bits = /* (1<<14) | */ (exp<<9) | man;
 559  
 560        if (actual)
 561                *actual = (exp >= 9)
 562                        ? (1 << exp) + (man << (exp-9))
 563                        : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
 564  
 565        return 0;
 566}
 567
 568
 569
 570
 571/* FireStream access routines */
 572/* For DEEP-DOWN debugging these can be rigged to intercept accesses to
 573   certain registers or to just log all accesses. */
 574
 575static inline void write_fs (struct fs_dev *dev, int offset, u32 val)
 576{
 577        writel (val, dev->base + offset);
 578}
 579
 580
 581static inline u32  read_fs (struct fs_dev *dev, int offset)
 582{
 583        return readl (dev->base + offset);
 584}
 585
 586
 587
 588static inline struct FS_QENTRY *get_qentry (struct fs_dev *dev, struct queue *q)
 589{
 590        return bus_to_virt (read_fs (dev, Q_WP(q->offset)) & Q_ADDR_MASK);
 591}
 592
 593
 594static void submit_qentry (struct fs_dev *dev, struct queue *q, struct FS_QENTRY *qe)
 595{
 596        u32 wp;
 597        struct FS_QENTRY *cqe;
 598
 599        /* XXX Sanity check: the write pointer can be checked to be 
 600           still the same as the value passed as qe... -- REW */
 601        /*  udelay (5); */
 602        while ((wp = read_fs (dev, Q_WP (q->offset))) & Q_FULL) {
 603                fs_dprintk (FS_DEBUG_TXQ, "Found queue at %x full. Waiting.\n", 
 604                            q->offset);
 605                schedule ();
 606        }
 607
 608        wp &= ~0xf;
 609        cqe = bus_to_virt (wp);
 610        if (qe != cqe) {
 611                fs_dprintk (FS_DEBUG_TXQ, "q mismatch! %p %p\n", qe, cqe);
 612        }
 613
 614        write_fs (dev, Q_WP(q->offset), Q_INCWRAP);
 615
 616        {
 617                static int c;
 618                if (!(c++ % 100))
 619                        {
 620                                int rp, wp;
 621                                rp =  read_fs (dev, Q_RP(q->offset));
 622                                wp =  read_fs (dev, Q_WP(q->offset));
 623                                fs_dprintk (FS_DEBUG_TXQ, "q at %d: %x-%x: %x entries.\n", 
 624                                            q->offset, rp, wp, wp-rp);
 625                        }
 626        }
 627}
 628
 629#ifdef DEBUG_EXTRA
 630static struct FS_QENTRY pq[60];
 631static int qp;
 632
 633static struct FS_BPENTRY dq[60];
 634static int qd;
 635static void *da[60];
 636#endif 
 637
 638static void submit_queue (struct fs_dev *dev, struct queue *q, 
 639                          u32 cmd, u32 p1, u32 p2, u32 p3)
 640{
 641        struct FS_QENTRY *qe;
 642
 643        qe = get_qentry (dev, q);
 644        qe->cmd = cmd;
 645        qe->p0 = p1;
 646        qe->p1 = p2;
 647        qe->p2 = p3;
 648        submit_qentry (dev,  q, qe);
 649
 650#ifdef DEBUG_EXTRA
 651        pq[qp].cmd = cmd;
 652        pq[qp].p0 = p1;
 653        pq[qp].p1 = p2;
 654        pq[qp].p2 = p3;
 655        qp++;
 656        if (qp >= 60) qp = 0;
 657#endif
 658}
 659
 660/* Test the "other" way one day... -- REW */
 661#if 1
 662#define submit_command submit_queue
 663#else
 664
 665static void submit_command (struct fs_dev *dev, struct queue *q, 
 666                            u32 cmd, u32 p1, u32 p2, u32 p3)
 667{
 668        write_fs (dev, CMDR0, cmd);
 669        write_fs (dev, CMDR1, p1);
 670        write_fs (dev, CMDR2, p2);
 671        write_fs (dev, CMDR3, p3);
 672}
 673#endif
 674
 675
 676
 677static void process_return_queue (struct fs_dev *dev, struct queue *q)
 678{
 679        long rq;
 680        struct FS_QENTRY *qe;
 681        void *tc;
 682  
 683        while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
 684                fs_dprintk (FS_DEBUG_QUEUE, "reaping return queue entry at %lx\n", rq); 
 685                qe = bus_to_virt (rq);
 686    
 687                fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. (%d)\n", 
 688                            qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
 689
 690                switch (STATUS_CODE (qe)) {
 691                case 5:
 692                        tc = bus_to_virt (qe->p0);
 693                        fs_dprintk (FS_DEBUG_ALLOC, "Free tc: %p\n", tc);
 694                        kfree (tc);
 695                        break;
 696                }
 697    
 698                write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
 699        }
 700}
 701
 702
 703static void process_txdone_queue (struct fs_dev *dev, struct queue *q)
 704{
 705        long rq;
 706        long tmp;
 707        struct FS_QENTRY *qe;
 708        struct sk_buff *skb;
 709        struct FS_BPENTRY *td;
 710
 711        while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
 712                fs_dprintk (FS_DEBUG_QUEUE, "reaping txdone entry at %lx\n", rq); 
 713                qe = bus_to_virt (rq);
 714    
 715                fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x: %d\n", 
 716                            qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
 717
 718                if (STATUS_CODE (qe) != 2)
 719                        fs_dprintk (FS_DEBUG_TXMEM, "queue entry: %08x %08x %08x %08x: %d\n", 
 720                                    qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
 721
 722
 723                switch (STATUS_CODE (qe)) {
 724                case 0x01: /* This is for AAL0 where we put the chip in streaming mode */
 725                        /* Fall through */
 726                case 0x02:
 727                        /* Process a real txdone entry. */
 728                        tmp = qe->p0;
 729                        if (tmp & 0x0f)
 730                                printk (KERN_WARNING "td not aligned: %ld\n", tmp);
 731                        tmp &= ~0x0f;
 732                        td = bus_to_virt (tmp);
 733
 734                        fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p.\n", 
 735                                    td->flags, td->next, td->bsa, td->aal_bufsize, td->skb );
 736      
 737                        skb = td->skb;
 738                        if (skb == FS_VCC (ATM_SKB(skb)->vcc)->last_skb) {
 739                                wake_up_interruptible (& FS_VCC (ATM_SKB(skb)->vcc)->close_wait);
 740                                FS_VCC (ATM_SKB(skb)->vcc)->last_skb = NULL;
 741                        }
 742                        td->dev->ntxpckts--;
 743
 744                        {
 745                                static int c=0;
 746        
 747                                if (!(c++ % 100)) {
 748                                        fs_dprintk (FS_DEBUG_QSIZE, "[%d]", td->dev->ntxpckts);
 749                                }
 750                        }
 751
 752                        atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
 753
 754                        fs_dprintk (FS_DEBUG_TXMEM, "i");
 755                        fs_dprintk (FS_DEBUG_ALLOC, "Free t-skb: %p\n", skb);
 756                        fs_kfree_skb (skb);
 757
 758                        fs_dprintk (FS_DEBUG_ALLOC, "Free trans-d: %p\n", td); 
 759                        memset (td, ATM_POISON_FREE, sizeof(struct FS_BPENTRY));
 760                        kfree (td);
 761                        break;
 762                default:
 763                        /* Here we get the tx purge inhibit command ... */
 764                        /* Action, I believe, is "don't do anything". -- REW */
 765                        ;
 766                }
 767    
 768                write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
 769        }
 770}
 771
 772
 773static void process_incoming (struct fs_dev *dev, struct queue *q)
 774{
 775        long rq;
 776        struct FS_QENTRY *qe;
 777        struct FS_BPENTRY *pe;    
 778        struct sk_buff *skb;
 779        unsigned int channo;
 780        struct atm_vcc *atm_vcc;
 781
 782        while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
 783                fs_dprintk (FS_DEBUG_QUEUE, "reaping incoming queue entry at %lx\n", rq); 
 784                qe = bus_to_virt (rq);
 785    
 786                fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x.  ", 
 787                            qe->cmd, qe->p0, qe->p1, qe->p2);
 788
 789                fs_dprintk (FS_DEBUG_QUEUE, "-> %x: %s\n", 
 790                            STATUS_CODE (qe), 
 791                            res_strings[STATUS_CODE(qe)]);
 792
 793                pe = bus_to_virt (qe->p0);
 794                fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p %p.\n", 
 795                            pe->flags, pe->next, pe->bsa, pe->aal_bufsize, 
 796                            pe->skb, pe->fp);
 797      
 798                channo = qe->cmd & 0xffff;
 799
 800                if (channo < dev->nchannels)
 801                        atm_vcc = dev->atm_vccs[channo];
 802                else
 803                        atm_vcc = NULL;
 804
 805                /* Single buffer packet */
 806                switch (STATUS_CODE (qe)) {
 807                case 0x1:
 808                        /* Fall through for streaming mode */
 809                case 0x2:/* Packet received OK.... */
 810                        if (atm_vcc) {
 811                                skb = pe->skb;
 812                                pe->fp->n--;
 813#if 0
 814                                fs_dprintk (FS_DEBUG_QUEUE, "Got skb: %p\n", skb);
 815                                if (FS_DEBUG_QUEUE & fs_debug) my_hd (bus_to_virt (pe->bsa), 0x20);
 816#endif
 817                                skb_put (skb, qe->p1 & 0xffff); 
 818                                ATM_SKB(skb)->vcc = atm_vcc;
 819                                atomic_inc(&atm_vcc->stats->rx);
 820                                __net_timestamp(skb);
 821                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p (pushed)\n", skb);
 822                                atm_vcc->push (atm_vcc, skb);
 823                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
 824                                kfree (pe);
 825                        } else {
 826                                printk (KERN_ERR "Got a receive on a non-open channel %d.\n", channo);
 827                        }
 828                        break;
 829                case 0x17:/* AAL 5 CRC32 error. IFF the length field is nonzero, a buffer
 830                             has been consumed and needs to be processed. -- REW */
 831                        if (qe->p1 & 0xffff) {
 832                                pe = bus_to_virt (qe->p0);
 833                                pe->fp->n--;
 834                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", pe->skb);
 835                                dev_kfree_skb_any (pe->skb);
 836                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
 837                                kfree (pe);
 838                        }
 839                        if (atm_vcc)
 840                                atomic_inc(&atm_vcc->stats->rx_drop);
 841                        break;
 842                case 0x1f: /*  Reassembly abort: no buffers. */
 843                        /* Silently increment error counter. */
 844                        if (atm_vcc)
 845                                atomic_inc(&atm_vcc->stats->rx_drop);
 846                        break;
 847                default: /* Hmm. Haven't written the code to handle the others yet... -- REW */
 848                        printk (KERN_WARNING "Don't know what to do with RX status %x: %s.\n", 
 849                                STATUS_CODE(qe), res_strings[STATUS_CODE (qe)]);
 850                }
 851                write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
 852        }
 853}
 854
 855
 856
 857#define DO_DIRECTION(tp) ((tp)->traffic_class != ATM_NONE)
 858
 859static int fs_open(struct atm_vcc *atm_vcc)
 860{
 861        struct fs_dev *dev;
 862        struct fs_vcc *vcc;
 863        struct fs_transmit_config *tc;
 864        struct atm_trafprm * txtp;
 865        struct atm_trafprm * rxtp;
 866        /*  struct fs_receive_config *rc;*/
 867        /*  struct FS_QENTRY *qe; */
 868        int error;
 869        int bfp;
 870        int to;
 871        unsigned short tmc0;
 872        short vpi = atm_vcc->vpi;
 873        int vci = atm_vcc->vci;
 874
 875        func_enter ();
 876
 877        dev = FS_DEV(atm_vcc->dev);
 878        fs_dprintk (FS_DEBUG_OPEN, "fs: open on dev: %p, vcc at %p\n", 
 879                    dev, atm_vcc);
 880
 881        if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
 882                set_bit(ATM_VF_ADDR, &atm_vcc->flags);
 883
 884        if ((atm_vcc->qos.aal != ATM_AAL5) &&
 885            (atm_vcc->qos.aal != ATM_AAL2))
 886          return -EINVAL; /* XXX AAL0 */
 887
 888        fs_dprintk (FS_DEBUG_OPEN, "fs: (itf %d): open %d.%d\n", 
 889                    atm_vcc->dev->number, atm_vcc->vpi, atm_vcc->vci);  
 890
 891        /* XXX handle qos parameters (rate limiting) ? */
 892
 893        vcc = kmalloc(sizeof(struct fs_vcc), GFP_KERNEL);
 894        fs_dprintk (FS_DEBUG_ALLOC, "Alloc VCC: %p(%Zd)\n", vcc, sizeof(struct fs_vcc));
 895        if (!vcc) {
 896                clear_bit(ATM_VF_ADDR, &atm_vcc->flags);
 897                return -ENOMEM;
 898        }
 899  
 900        atm_vcc->dev_data = vcc;
 901        vcc->last_skb = NULL;
 902
 903        init_waitqueue_head (&vcc->close_wait);
 904
 905        txtp = &atm_vcc->qos.txtp;
 906        rxtp = &atm_vcc->qos.rxtp;
 907
 908        if (!test_bit(ATM_VF_PARTIAL, &atm_vcc->flags)) {
 909                if (IS_FS50(dev)) {
 910                        /* Increment the channel numer: take a free one next time.  */
 911                        for (to=33;to;to--, dev->channo++) {
 912                                /* We only have 32 channels */
 913                                if (dev->channo >= 32)
 914                                        dev->channo = 0;
 915                                /* If we need to do RX, AND the RX is inuse, try the next */
 916                                if (DO_DIRECTION(rxtp) && dev->atm_vccs[dev->channo])
 917                                        continue;
 918                                /* If we need to do TX, AND the TX is inuse, try the next */
 919                                if (DO_DIRECTION(txtp) && test_bit (dev->channo, dev->tx_inuse))
 920                                        continue;
 921                                /* Ok, both are free! (or not needed) */
 922                                break;
 923                        }
 924                        if (!to) {
 925                                printk ("No more free channels for FS50..\n");
 926                                return -EBUSY;
 927                        }
 928                        vcc->channo = dev->channo;
 929                        dev->channo &= dev->channel_mask;
 930      
 931                } else {
 932                        vcc->channo = (vpi << FS155_VCI_BITS) | (vci);
 933                        if (((DO_DIRECTION(rxtp) && dev->atm_vccs[vcc->channo])) ||
 934                            ( DO_DIRECTION(txtp) && test_bit (vcc->channo, dev->tx_inuse))) {
 935                                printk ("Channel is in use for FS155.\n");
 936                                return -EBUSY;
 937                        }
 938                }
 939                fs_dprintk (FS_DEBUG_OPEN, "OK. Allocated channel %x(%d).\n", 
 940                            vcc->channo, vcc->channo);
 941        }
 942
 943        if (DO_DIRECTION (txtp)) {
 944                tc = kmalloc (sizeof (struct fs_transmit_config), GFP_KERNEL);
 945                fs_dprintk (FS_DEBUG_ALLOC, "Alloc tc: %p(%Zd)\n",
 946                            tc, sizeof (struct fs_transmit_config));
 947                if (!tc) {
 948                        fs_dprintk (FS_DEBUG_OPEN, "fs: can't alloc transmit_config.\n");
 949                        return -ENOMEM;
 950                }
 951
 952                /* Allocate the "open" entry from the high priority txq. This makes
 953                   it most likely that the chip will notice it. It also prevents us
 954                   from having to wait for completion. On the other hand, we may
 955                   need to wait for completion anyway, to see if it completed
 956                   successfully. */
 957
 958                switch (atm_vcc->qos.aal) {
 959                case ATM_AAL2:
 960                case ATM_AAL0:
 961                  tc->flags = 0
 962                    | TC_FLAGS_TRANSPARENT_PAYLOAD
 963                    | TC_FLAGS_PACKET
 964                    | (1 << 28)
 965                    | TC_FLAGS_TYPE_UBR /* XXX Change to VBR -- PVDL */
 966                    | TC_FLAGS_CAL0;
 967                  break;
 968                case ATM_AAL5:
 969                  tc->flags = 0
 970                        | TC_FLAGS_AAL5
 971                        | TC_FLAGS_PACKET  /* ??? */
 972                        | TC_FLAGS_TYPE_CBR
 973                        | TC_FLAGS_CAL0;
 974                  break;
 975                default:
 976                        printk ("Unknown aal: %d\n", atm_vcc->qos.aal);
 977                        tc->flags = 0;
 978                }
 979                /* Docs are vague about this atm_hdr field. By the way, the FS
 980                 * chip makes odd errors if lower bits are set.... -- REW */
 981                tc->atm_hdr =  (vpi << 20) | (vci << 4); 
 982                tmc0 = 0;
 983                {
 984                        int pcr = atm_pcr_goal (txtp);
 985
 986                        fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
 987
 988                        /* XXX Hmm. officially we're only allowed to do this if rounding 
 989                           is round_down -- REW */
 990                        if (IS_FS50(dev)) {
 991                                if (pcr > 51840000/53/8)  pcr = 51840000/53/8;
 992                        } else {
 993                                if (pcr > 155520000/53/8) pcr = 155520000/53/8;
 994                        }
 995                        if (!pcr) {
 996                                /* no rate cap */
 997                                tmc0 = IS_FS50(dev)?0x61BE:0x64c9; /* Just copied over the bits from Fujitsu -- REW */
 998                        } else {
 999                                int r;
1000                                if (pcr < 0) {
1001                                        r = ROUND_DOWN;
1002                                        pcr = -pcr;
1003                                } else {
1004                                        r = ROUND_UP;
1005                                }
1006                                error = make_rate (pcr, r, &tmc0, NULL);
1007                                if (error) {
1008                                        kfree(tc);
1009                                        return error;
1010                                }
1011                        }
1012                        fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
1013                }
1014      
1015                tc->TMC[0] = tmc0 | 0x4000;
1016                tc->TMC[1] = 0; /* Unused */
1017                tc->TMC[2] = 0; /* Unused */
1018                tc->TMC[3] = 0; /* Unused */
1019    
1020                tc->spec = 0;    /* UTOPIA address, UDF, HEC: Unused -> 0 */
1021                tc->rtag[0] = 0; /* What should I do with routing tags??? 
1022                                    -- Not used -- AS -- Thanks -- REW*/
1023                tc->rtag[1] = 0;
1024                tc->rtag[2] = 0;
1025
1026                if (fs_debug & FS_DEBUG_OPEN) {
1027                        fs_dprintk (FS_DEBUG_OPEN, "TX config record:\n");
1028                        my_hd (tc, sizeof (*tc));
1029                }
1030
1031                /* We now use the "submit_command" function to submit commands to
1032                   the firestream. There is a define up near the definition of
1033                   that routine that switches this routine between immediate write
1034                   to the immediate command registers and queuing the commands in
1035                   the HPTXQ for execution. This last technique might be more
1036                   efficient if we know we're going to submit a whole lot of
1037                   commands in one go, but this driver is not setup to be able to
1038                   use such a construct. So it probably doen't matter much right
1039                   now. -- REW */
1040    
1041                /* The command is IMMediate and INQueue. The parameters are out-of-line.. */
1042                submit_command (dev, &dev->hp_txq, 
1043                                QE_CMD_CONFIG_TX | QE_CMD_IMM_INQ | vcc->channo,
1044                                virt_to_bus (tc), 0, 0);
1045
1046                submit_command (dev, &dev->hp_txq, 
1047                                QE_CMD_TX_EN | QE_CMD_IMM_INQ | vcc->channo,
1048                                0, 0, 0);
1049                set_bit (vcc->channo, dev->tx_inuse);
1050        }
1051
1052        if (DO_DIRECTION (rxtp)) {
1053                dev->atm_vccs[vcc->channo] = atm_vcc;
1054
1055                for (bfp = 0;bfp < FS_NR_FREE_POOLS; bfp++)
1056                        if (atm_vcc->qos.rxtp.max_sdu <= dev->rx_fp[bfp].bufsize) break;
1057                if (bfp >= FS_NR_FREE_POOLS) {
1058                        fs_dprintk (FS_DEBUG_OPEN, "No free pool fits sdu: %d.\n", 
1059                                    atm_vcc->qos.rxtp.max_sdu);
1060                        /* XXX Cleanup? -- Would just calling fs_close work??? -- REW */
1061
1062                        /* XXX clear tx inuse. Close TX part? */
1063                        dev->atm_vccs[vcc->channo] = NULL;
1064                        kfree (vcc);
1065                        return -EINVAL;
1066                }
1067
1068                switch (atm_vcc->qos.aal) {
1069                case ATM_AAL0:
1070                case ATM_AAL2:
1071                        submit_command (dev, &dev->hp_txq,
1072                                        QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1073                                        RC_FLAGS_TRANSP |
1074                                        RC_FLAGS_BFPS_BFP * bfp |
1075                                        RC_FLAGS_RXBM_PSB, 0, 0);
1076                        break;
1077                case ATM_AAL5:
1078                        submit_command (dev, &dev->hp_txq,
1079                                        QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1080                                        RC_FLAGS_AAL5 |
1081                                        RC_FLAGS_BFPS_BFP * bfp |
1082                                        RC_FLAGS_RXBM_PSB, 0, 0);
1083                        break;
1084                };
1085                if (IS_FS50 (dev)) {
1086                        submit_command (dev, &dev->hp_txq, 
1087                                        QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1088                                        0x80 + vcc->channo,
1089                                        (vpi << 16) | vci, 0 ); /* XXX -- Use defines. */
1090                }
1091                submit_command (dev, &dev->hp_txq, 
1092                                QE_CMD_RX_EN | QE_CMD_IMM_INQ | vcc->channo,
1093                                0, 0, 0);
1094        }
1095    
1096        /* Indicate we're done! */
1097        set_bit(ATM_VF_READY, &atm_vcc->flags);
1098
1099        func_exit ();
1100        return 0;
1101}
1102
1103
1104static void fs_close(struct atm_vcc *atm_vcc)
1105{
1106        struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1107        struct fs_vcc *vcc = FS_VCC (atm_vcc);
1108        struct atm_trafprm * txtp;
1109        struct atm_trafprm * rxtp;
1110
1111        func_enter ();
1112
1113        clear_bit(ATM_VF_READY, &atm_vcc->flags);
1114
1115        fs_dprintk (FS_DEBUG_QSIZE, "--==**[%d]**==--", dev->ntxpckts);
1116        if (vcc->last_skb) {
1117                fs_dprintk (FS_DEBUG_QUEUE, "Waiting for skb %p to be sent.\n", 
1118                            vcc->last_skb);
1119                /* We're going to wait for the last packet to get sent on this VC. It would
1120                   be impolite not to send them don't you think? 
1121                   XXX
1122                   We don't know which packets didn't get sent. So if we get interrupted in 
1123                   this sleep_on, we'll lose any reference to these packets. Memory leak!
1124                   On the other hand, it's awfully convenient that we can abort a "close" that
1125                   is taking too long. Maybe just use non-interruptible sleep on? -- REW */
1126                interruptible_sleep_on (& vcc->close_wait);
1127        }
1128
1129        txtp = &atm_vcc->qos.txtp;
1130        rxtp = &atm_vcc->qos.rxtp;
1131  
1132
1133        /* See App note XXX (Unpublished as of now) for the reason for the 
1134           removal of the "CMD_IMM_INQ" part of the TX_PURGE_INH... -- REW */
1135
1136        if (DO_DIRECTION (txtp)) {
1137                submit_command (dev,  &dev->hp_txq,
1138                                QE_CMD_TX_PURGE_INH | /*QE_CMD_IMM_INQ|*/ vcc->channo, 0,0,0);
1139                clear_bit (vcc->channo, dev->tx_inuse);
1140        }
1141
1142        if (DO_DIRECTION (rxtp)) {
1143                submit_command (dev,  &dev->hp_txq,
1144                                QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1145                dev->atm_vccs [vcc->channo] = NULL;
1146  
1147                /* This means that this is configured as a receive channel */
1148                if (IS_FS50 (dev)) {
1149                        /* Disable the receive filter. Is 0/0 indeed an invalid receive
1150                           channel? -- REW.  Yes it is. -- Hang. Ok. I'll use -1
1151                           (0xfff...) -- REW */
1152                        submit_command (dev, &dev->hp_txq, 
1153                                        QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1154                                        0x80 + vcc->channo, -1, 0 ); 
1155                }
1156        }
1157
1158        fs_dprintk (FS_DEBUG_ALLOC, "Free vcc: %p\n", vcc);
1159        kfree (vcc);
1160
1161        func_exit ();
1162}
1163
1164
1165static int fs_send (struct atm_vcc *atm_vcc, struct sk_buff *skb)
1166{
1167        struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1168        struct fs_vcc *vcc = FS_VCC (atm_vcc);
1169        struct FS_BPENTRY *td;
1170
1171        func_enter ();
1172
1173        fs_dprintk (FS_DEBUG_TXMEM, "I");
1174        fs_dprintk (FS_DEBUG_SEND, "Send: atm_vcc %p skb %p vcc %p dev %p\n", 
1175                    atm_vcc, skb, vcc, dev);
1176
1177        fs_dprintk (FS_DEBUG_ALLOC, "Alloc t-skb: %p (atm_send)\n", skb);
1178
1179        ATM_SKB(skb)->vcc = atm_vcc;
1180
1181        vcc->last_skb = skb;
1182
1183        td = kmalloc (sizeof (struct FS_BPENTRY), GFP_ATOMIC);
1184        fs_dprintk (FS_DEBUG_ALLOC, "Alloc transd: %p(%Zd)\n", td, sizeof (struct FS_BPENTRY));
1185        if (!td) {
1186                /* Oops out of mem */
1187                return -ENOMEM;
1188        }
1189
1190        fs_dprintk (FS_DEBUG_SEND, "first word in buffer: %x\n", 
1191                    *(int *) skb->data);
1192
1193        td->flags =  TD_EPI | TD_DATA | skb->len;
1194        td->next = 0;
1195        td->bsa  = virt_to_bus (skb->data);
1196        td->skb = skb;
1197        td->dev = dev;
1198        dev->ntxpckts++;
1199
1200#ifdef DEBUG_EXTRA
1201        da[qd] = td;
1202        dq[qd].flags = td->flags;
1203        dq[qd].next  = td->next;
1204        dq[qd].bsa   = td->bsa;
1205        dq[qd].skb   = td->skb;
1206        dq[qd].dev   = td->dev;
1207        qd++;
1208        if (qd >= 60) qd = 0;
1209#endif
1210
1211        submit_queue (dev, &dev->hp_txq, 
1212                      QE_TRANSMIT_DE | vcc->channo,
1213                      virt_to_bus (td), 0, 
1214                      virt_to_bus (td));
1215
1216        fs_dprintk (FS_DEBUG_QUEUE, "in send: txq %d txrq %d\n", 
1217                    read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1218                    read_fs (dev, Q_SA (dev->hp_txq.offset)),
1219                    read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1220                    read_fs (dev, Q_SA (dev->tx_relq.offset)));
1221
1222        func_exit ();
1223        return 0;
1224}
1225
1226
1227/* Some function placeholders for functions we don't yet support. */
1228
1229#if 0
1230static int fs_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
1231{
1232        func_enter ();
1233        func_exit ();
1234        return -ENOIOCTLCMD;
1235}
1236
1237
1238static int fs_getsockopt(struct atm_vcc *vcc,int level,int optname,
1239                         void __user *optval,int optlen)
1240{
1241        func_enter ();
1242        func_exit ();
1243        return 0;
1244}
1245
1246
1247static int fs_setsockopt(struct atm_vcc *vcc,int level,int optname,
1248                         void __user *optval,unsigned int optlen)
1249{
1250        func_enter ();
1251        func_exit ();
1252        return 0;
1253}
1254
1255
1256static void fs_phy_put(struct atm_dev *dev,unsigned char value,
1257                       unsigned long addr)
1258{
1259        func_enter ();
1260        func_exit ();
1261}
1262
1263
1264static unsigned char fs_phy_get(struct atm_dev *dev,unsigned long addr)
1265{
1266        func_enter ();
1267        func_exit ();
1268        return 0;
1269}
1270
1271
1272static int fs_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags)
1273{
1274        func_enter ();
1275        func_exit ();
1276        return 0;
1277};
1278
1279#endif
1280
1281
1282static const struct atmdev_ops ops = {
1283        .open =         fs_open,
1284        .close =        fs_close,
1285        .send =         fs_send,
1286        .owner =        THIS_MODULE,
1287        /* ioctl:          fs_ioctl, */
1288        /* getsockopt:     fs_getsockopt, */
1289        /* setsockopt:     fs_setsockopt, */
1290        /* change_qos:     fs_change_qos, */
1291
1292        /* For now implement these internally here... */  
1293        /* phy_put:        fs_phy_put, */
1294        /* phy_get:        fs_phy_get, */
1295};
1296
1297
1298static void __devinit undocumented_pci_fix (struct pci_dev *pdev)
1299{
1300        u32 tint;
1301
1302        /* The Windows driver says: */
1303        /* Switch off FireStream Retry Limit Threshold 
1304         */
1305
1306        /* The register at 0x28 is documented as "reserved", no further
1307           comments. */
1308
1309        pci_read_config_dword (pdev, 0x28, &tint);
1310        if (tint != 0x80) {
1311                tint = 0x80;
1312                pci_write_config_dword (pdev, 0x28, tint);
1313        }
1314}
1315
1316
1317
1318/**************************************************************************
1319 *                              PHY routines                              *
1320 **************************************************************************/
1321
1322static void __devinit write_phy (struct fs_dev *dev, int regnum, int val)
1323{
1324        submit_command (dev,  &dev->hp_txq, QE_CMD_PRP_WR | QE_CMD_IMM_INQ,
1325                        regnum, val, 0);
1326}
1327
1328static int __devinit init_phy (struct fs_dev *dev, struct reginit_item *reginit)
1329{
1330        int i;
1331
1332        func_enter ();
1333        while (reginit->reg != PHY_EOF) {
1334                if (reginit->reg == PHY_CLEARALL) {
1335                        /* "PHY_CLEARALL means clear all registers. Numregisters is in "val". */
1336                        for (i=0;i<reginit->val;i++) {
1337                                write_phy (dev, i, 0);
1338                        }
1339                } else {
1340                        write_phy (dev, reginit->reg, reginit->val);
1341                }
1342                reginit++;
1343        }
1344        func_exit ();
1345        return 0;
1346}
1347
1348static void reset_chip (struct fs_dev *dev)
1349{
1350        int i;
1351
1352        write_fs (dev, SARMODE0, SARMODE0_SRTS0);
1353
1354        /* Undocumented delay */
1355        udelay (128);
1356
1357        /* The "internal registers are documented to all reset to zero, but 
1358           comments & code in the Windows driver indicates that the pools are
1359           NOT reset. */
1360        for (i=0;i < FS_NR_FREE_POOLS;i++) {
1361                write_fs (dev, FP_CNF (RXB_FP(i)), 0);
1362                write_fs (dev, FP_SA  (RXB_FP(i)), 0);
1363                write_fs (dev, FP_EA  (RXB_FP(i)), 0);
1364                write_fs (dev, FP_CNT (RXB_FP(i)), 0);
1365                write_fs (dev, FP_CTU (RXB_FP(i)), 0);
1366        }
1367
1368        /* The same goes for the match channel registers, although those are
1369           NOT documented that way in the Windows driver. -- REW */
1370        /* The Windows driver DOES write 0 to these registers somewhere in
1371           the init sequence. However, a small hardware-feature, will
1372           prevent reception of data on VPI/VCI = 0/0 (Unless the channel
1373           allocated happens to have no disabled channels that have a lower
1374           number. -- REW */
1375
1376        /* Clear the match channel registers. */
1377        if (IS_FS50 (dev)) {
1378                for (i=0;i<FS50_NR_CHANNELS;i++) {
1379                        write_fs (dev, 0x200 + i * 4, -1);
1380                }
1381        }
1382}
1383
1384static void __devinit *aligned_kmalloc (int size, gfp_t flags, int alignment)
1385{
1386        void  *t;
1387
1388        if (alignment <= 0x10) {
1389                t = kmalloc (size, flags);
1390                if ((unsigned long)t & (alignment-1)) {
1391                        printk ("Kmalloc doesn't align things correctly! %p\n", t);
1392                        kfree (t);
1393                        return aligned_kmalloc (size, flags, alignment * 4);
1394                }
1395                return t;
1396        }
1397        printk (KERN_ERR "Request for > 0x10 alignment not yet implemented (hard!)\n");
1398        return NULL;
1399}
1400
1401static int __devinit init_q (struct fs_dev *dev, 
1402                          struct queue *txq, int queue, int nentries, int is_rq)
1403{
1404        int sz = nentries * sizeof (struct FS_QENTRY);
1405        struct FS_QENTRY *p;
1406
1407        func_enter ();
1408
1409        fs_dprintk (FS_DEBUG_INIT, "Inititing queue at %x: %d entries:\n", 
1410                    queue, nentries);
1411
1412        p = aligned_kmalloc (sz, GFP_KERNEL, 0x10);
1413        fs_dprintk (FS_DEBUG_ALLOC, "Alloc queue: %p(%d)\n", p, sz);
1414
1415        if (!p) return 0;
1416
1417        write_fs (dev, Q_SA(queue), virt_to_bus(p));
1418        write_fs (dev, Q_EA(queue), virt_to_bus(p+nentries-1));
1419        write_fs (dev, Q_WP(queue), virt_to_bus(p));
1420        write_fs (dev, Q_RP(queue), virt_to_bus(p));
1421        if (is_rq) {
1422                /* Configuration for the receive queue: 0: interrupt immediately,
1423                   no pre-warning to empty queues: We do our best to keep the
1424                   queue filled anyway. */
1425                write_fs (dev, Q_CNF(queue), 0 ); 
1426        }
1427
1428        txq->sa = p;
1429        txq->ea = p;
1430        txq->offset = queue; 
1431
1432        func_exit ();
1433        return 1;
1434}
1435
1436
1437static int __devinit init_fp (struct fs_dev *dev, 
1438                           struct freepool *fp, int queue, int bufsize, int nr_buffers)
1439{
1440        func_enter ();
1441
1442        fs_dprintk (FS_DEBUG_INIT, "Inititing free pool at %x:\n", queue);
1443
1444        write_fs (dev, FP_CNF(queue), (bufsize * RBFP_RBS) | RBFP_RBSVAL | RBFP_CME);
1445        write_fs (dev, FP_SA(queue),  0);
1446        write_fs (dev, FP_EA(queue),  0);
1447        write_fs (dev, FP_CTU(queue), 0);
1448        write_fs (dev, FP_CNT(queue), 0);
1449
1450        fp->offset = queue; 
1451        fp->bufsize = bufsize;
1452        fp->nr_buffers = nr_buffers;
1453
1454        func_exit ();
1455        return 1;
1456}
1457
1458
1459static inline int nr_buffers_in_freepool (struct fs_dev *dev, struct freepool *fp)
1460{
1461#if 0
1462        /* This seems to be unreliable.... */
1463        return read_fs (dev, FP_CNT (fp->offset));
1464#else
1465        return fp->n;
1466#endif
1467}
1468
1469
1470/* Check if this gets going again if a pool ever runs out.  -- Yes, it
1471   does. I've seen "receive abort: no buffers" and things started
1472   working again after that...  -- REW */
1473
1474static void top_off_fp (struct fs_dev *dev, struct freepool *fp,
1475                        gfp_t gfp_flags)
1476{
1477        struct FS_BPENTRY *qe, *ne;
1478        struct sk_buff *skb;
1479        int n = 0;
1480        u32 qe_tmp;
1481
1482        fs_dprintk (FS_DEBUG_QUEUE, "Topping off queue at %x (%d-%d/%d)\n", 
1483                    fp->offset, read_fs (dev, FP_CNT (fp->offset)), fp->n, 
1484                    fp->nr_buffers);
1485        while (nr_buffers_in_freepool(dev, fp) < fp->nr_buffers) {
1486
1487                skb = alloc_skb (fp->bufsize, gfp_flags);
1488                fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-skb: %p(%d)\n", skb, fp->bufsize);
1489                if (!skb) break;
1490                ne = kmalloc (sizeof (struct FS_BPENTRY), gfp_flags);
1491                fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-d: %p(%Zd)\n", ne, sizeof (struct FS_BPENTRY));
1492                if (!ne) {
1493                        fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", skb);
1494                        dev_kfree_skb_any (skb);
1495                        break;
1496                }
1497
1498                fs_dprintk (FS_DEBUG_QUEUE, "Adding skb %p desc %p -> %p(%p) ", 
1499                            skb, ne, skb->data, skb->head);
1500                n++;
1501                ne->flags = FP_FLAGS_EPI | fp->bufsize;
1502                ne->next  = virt_to_bus (NULL);
1503                ne->bsa   = virt_to_bus (skb->data);
1504                ne->aal_bufsize = fp->bufsize;
1505                ne->skb = skb;
1506                ne->fp = fp;
1507
1508                /*
1509                 * FIXME: following code encodes and decodes
1510                 * machine pointers (could be 64-bit) into a
1511                 * 32-bit register.
1512                 */
1513
1514                qe_tmp = read_fs (dev, FP_EA(fp->offset));
1515                fs_dprintk (FS_DEBUG_QUEUE, "link at %x\n", qe_tmp);
1516                if (qe_tmp) {
1517                        qe = bus_to_virt ((long) qe_tmp);
1518                        qe->next = virt_to_bus(ne);
1519                        qe->flags &= ~FP_FLAGS_EPI;
1520                } else
1521                        write_fs (dev, FP_SA(fp->offset), virt_to_bus(ne));
1522
1523                write_fs (dev, FP_EA(fp->offset), virt_to_bus (ne));
1524                fp->n++;   /* XXX Atomic_inc? */
1525                write_fs (dev, FP_CTU(fp->offset), 1);
1526        }
1527
1528        fs_dprintk (FS_DEBUG_QUEUE, "Added %d entries. \n", n);
1529}
1530
1531static void __devexit free_queue (struct fs_dev *dev, struct queue *txq)
1532{
1533        func_enter ();
1534
1535        write_fs (dev, Q_SA(txq->offset), 0);
1536        write_fs (dev, Q_EA(txq->offset), 0);
1537        write_fs (dev, Q_RP(txq->offset), 0);
1538        write_fs (dev, Q_WP(txq->offset), 0);
1539        /* Configuration ? */
1540
1541        fs_dprintk (FS_DEBUG_ALLOC, "Free queue: %p\n", txq->sa);
1542        kfree (txq->sa);
1543
1544        func_exit ();
1545}
1546
1547static void __devexit free_freepool (struct fs_dev *dev, struct freepool *fp)
1548{
1549        func_enter ();
1550
1551        write_fs (dev, FP_CNF(fp->offset), 0);
1552        write_fs (dev, FP_SA (fp->offset), 0);
1553        write_fs (dev, FP_EA (fp->offset), 0);
1554        write_fs (dev, FP_CNT(fp->offset), 0);
1555        write_fs (dev, FP_CTU(fp->offset), 0);
1556
1557        func_exit ();
1558}
1559
1560
1561
1562static irqreturn_t fs_irq (int irq, void *dev_id) 
1563{
1564        int i;
1565        u32 status;
1566        struct fs_dev *dev = dev_id;
1567
1568        status = read_fs (dev, ISR);
1569        if (!status)
1570                return IRQ_NONE;
1571
1572        func_enter ();
1573
1574#ifdef IRQ_RATE_LIMIT
1575        /* Aaargh! I'm ashamed. This costs more lines-of-code than the actual 
1576           interrupt routine!. (Well, used to when I wrote that comment) -- REW */
1577        {
1578                static int lastjif;
1579                static int nintr=0;
1580    
1581                if (lastjif == jiffies) {
1582                        if (++nintr > IRQ_RATE_LIMIT) {
1583                                free_irq (dev->irq, dev_id);
1584                                printk (KERN_ERR "fs: Too many interrupts. Turning off interrupt %d.\n", 
1585                                        dev->irq);
1586                        }
1587                } else {
1588                        lastjif = jiffies;
1589                        nintr = 0;
1590                }
1591        }
1592#endif
1593        fs_dprintk (FS_DEBUG_QUEUE, "in intr: txq %d txrq %d\n", 
1594                    read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1595                    read_fs (dev, Q_SA (dev->hp_txq.offset)),
1596                    read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1597                    read_fs (dev, Q_SA (dev->tx_relq.offset)));
1598
1599        /* print the bits in the ISR register. */
1600        if (fs_debug & FS_DEBUG_IRQ) {
1601                /* The FS_DEBUG things are unnecessary here. But this way it is
1602                   clear for grep that these are debug prints. */
1603                fs_dprintk (FS_DEBUG_IRQ,  "IRQ status:");
1604                for (i=0;i<27;i++) 
1605                        if (status & (1 << i)) 
1606                                fs_dprintk (FS_DEBUG_IRQ, " %s", irq_bitname[i]);
1607                fs_dprintk (FS_DEBUG_IRQ, "\n");
1608        }
1609  
1610        if (status & ISR_RBRQ0_W) {
1611                fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (0)!!!!\n");
1612                process_incoming (dev, &dev->rx_rq[0]);
1613                /* items mentioned on RBRQ0 are from FP 0 or 1. */
1614                top_off_fp (dev, &dev->rx_fp[0], GFP_ATOMIC);
1615                top_off_fp (dev, &dev->rx_fp[1], GFP_ATOMIC);
1616        }
1617
1618        if (status & ISR_RBRQ1_W) {
1619                fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (1)!!!!\n");
1620                process_incoming (dev, &dev->rx_rq[1]);
1621                top_off_fp (dev, &dev->rx_fp[2], GFP_ATOMIC);
1622                top_off_fp (dev, &dev->rx_fp[3], GFP_ATOMIC);
1623        }
1624
1625        if (status & ISR_RBRQ2_W) {
1626                fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (2)!!!!\n");
1627                process_incoming (dev, &dev->rx_rq[2]);
1628                top_off_fp (dev, &dev->rx_fp[4], GFP_ATOMIC);
1629                top_off_fp (dev, &dev->rx_fp[5], GFP_ATOMIC);
1630        }
1631
1632        if (status & ISR_RBRQ3_W) {
1633                fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (3)!!!!\n");
1634                process_incoming (dev, &dev->rx_rq[3]);
1635                top_off_fp (dev, &dev->rx_fp[6], GFP_ATOMIC);
1636                top_off_fp (dev, &dev->rx_fp[7], GFP_ATOMIC);
1637        }
1638
1639        if (status & ISR_CSQ_W) {
1640                fs_dprintk (FS_DEBUG_IRQ, "Command executed ok!\n");
1641                process_return_queue (dev, &dev->st_q);
1642        }
1643
1644        if (status & ISR_TBRQ_W) {
1645                fs_dprintk (FS_DEBUG_IRQ, "Data tramsitted!\n");
1646                process_txdone_queue (dev, &dev->tx_relq);
1647        }
1648
1649        func_exit ();
1650        return IRQ_HANDLED;
1651}
1652
1653
1654#ifdef FS_POLL_FREQ
1655static void fs_poll (unsigned long data)
1656{
1657        struct fs_dev *dev = (struct fs_dev *) data;
1658  
1659        fs_irq (0, dev);
1660        dev->timer.expires = jiffies + FS_POLL_FREQ;
1661        add_timer (&dev->timer);
1662}
1663#endif
1664
1665static int __devinit fs_init (struct fs_dev *dev)
1666{
1667        struct pci_dev  *pci_dev;
1668        int isr, to;
1669        int i;
1670
1671        func_enter ();
1672        pci_dev = dev->pci_dev;
1673
1674        printk (KERN_INFO "found a FireStream %d card, base %16llx, irq%d.\n",
1675                IS_FS50(dev)?50:155,
1676                (unsigned long long)pci_resource_start(pci_dev, 0),
1677                dev->pci_dev->irq);
1678
1679        if (fs_debug & FS_DEBUG_INIT)
1680                my_hd ((unsigned char *) dev, sizeof (*dev));
1681
1682        undocumented_pci_fix (pci_dev);
1683
1684        dev->hw_base = pci_resource_start(pci_dev, 0);
1685
1686        dev->base = ioremap(dev->hw_base, 0x1000);
1687
1688        reset_chip (dev);
1689  
1690        write_fs (dev, SARMODE0, 0 
1691                  | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1692                  | (1 * SARMODE0_INTMODE_READCLEAR)
1693                  | (1 * SARMODE0_CWRE)
1694                  | (IS_FS50(dev) ? SARMODE0_PRPWT_FS50_5:
1695                          SARMODE0_PRPWT_FS155_3)
1696                  | (1 * SARMODE0_CALSUP_1)
1697                  | (IS_FS50(dev) ? (0
1698                                   | SARMODE0_RXVCS_32
1699                                   | SARMODE0_ABRVCS_32 
1700                                   | SARMODE0_TXVCS_32):
1701                                  (0
1702                                   | SARMODE0_RXVCS_1k
1703                                   | SARMODE0_ABRVCS_1k 
1704                                   | SARMODE0_TXVCS_1k)));
1705
1706        /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes
1707           1ms. */
1708        to = 100;
1709        while (--to) {
1710                isr = read_fs (dev, ISR);
1711
1712                /* This bit is documented as "RESERVED" */
1713                if (isr & ISR_INIT_ERR) {
1714                        printk (KERN_ERR "Error initializing the FS... \n");
1715                        goto unmap;
1716                }
1717                if (isr & ISR_INIT) {
1718                        fs_dprintk (FS_DEBUG_INIT, "Ha! Initialized OK!\n");
1719                        break;
1720                }
1721
1722                /* Try again after 10ms. */
1723                msleep(10);
1724        }
1725
1726        if (!to) {
1727                printk (KERN_ERR "timeout initializing the FS... \n");
1728                goto unmap;
1729        }
1730
1731        /* XXX fix for fs155 */
1732        dev->channel_mask = 0x1f; 
1733        dev->channo = 0;
1734
1735        /* AN3: 10 */
1736        write_fs (dev, SARMODE1, 0 
1737                  | (fs_keystream * SARMODE1_DEFHEC) /* XXX PHY */
1738                  | ((loopback == 1) * SARMODE1_TSTLP) /* XXX Loopback mode enable... */
1739                  | (1 * SARMODE1_DCRM)
1740                  | (1 * SARMODE1_DCOAM)
1741                  | (0 * SARMODE1_OAMCRC)
1742                  | (0 * SARMODE1_DUMPE)
1743                  | (0 * SARMODE1_GPLEN) 
1744                  | (0 * SARMODE1_GNAM)
1745                  | (0 * SARMODE1_GVAS)
1746                  | (0 * SARMODE1_GPAS)
1747                  | (1 * SARMODE1_GPRI)
1748                  | (0 * SARMODE1_PMS)
1749                  | (0 * SARMODE1_GFCR)
1750                  | (1 * SARMODE1_HECM2)
1751                  | (1 * SARMODE1_HECM1)
1752                  | (1 * SARMODE1_HECM0)
1753                  | (1 << 12) /* That's what hang's driver does. Program to 0 */
1754                  | (0 * 0xff) /* XXX FS155 */);
1755
1756
1757        /* Cal prescale etc */
1758
1759        /* AN3: 11 */
1760        write_fs (dev, TMCONF, 0x0000000f);
1761        write_fs (dev, CALPRESCALE, 0x01010101 * num);
1762        write_fs (dev, 0x80, 0x000F00E4);
1763
1764        /* AN3: 12 */
1765        write_fs (dev, CELLOSCONF, 0
1766                  | (   0 * CELLOSCONF_CEN)
1767                  | (       CELLOSCONF_SC1)
1768                  | (0x80 * CELLOSCONF_COBS)
1769                  | (num  * CELLOSCONF_COPK)  /* Changed from 0xff to 0x5a */
1770                  | (num  * CELLOSCONF_COST));/* after a hint from Hang. 
1771                                               * performance jumped 50->70... */
1772
1773        /* Magic value by Hang */
1774        write_fs (dev, CELLOSCONF_COST, 0x0B809191);
1775
1776        if (IS_FS50 (dev)) {
1777                write_fs (dev, RAS0, RAS0_DCD_XHLT);
1778                dev->atm_dev->ci_range.vpi_bits = 12;
1779                dev->atm_dev->ci_range.vci_bits = 16;
1780                dev->nchannels = FS50_NR_CHANNELS;
1781        } else {
1782                write_fs (dev, RAS0, RAS0_DCD_XHLT 
1783                          | (((1 << FS155_VPI_BITS) - 1) * RAS0_VPSEL)
1784                          | (((1 << FS155_VCI_BITS) - 1) * RAS0_VCSEL));
1785                /* We can chose the split arbitrarily. We might be able to 
1786                   support more. Whatever. This should do for now. */
1787                dev->atm_dev->ci_range.vpi_bits = FS155_VPI_BITS;
1788                dev->atm_dev->ci_range.vci_bits = FS155_VCI_BITS;
1789    
1790                /* Address bits we can't use should be compared to 0. */
1791                write_fs (dev, RAC, 0);
1792
1793                /* Manual (AN9, page 6) says ASF1=0 means compare Utopia address
1794                 * too.  I can't find ASF1 anywhere. Anyway, we AND with just the
1795                 * other bits, then compare with 0, which is exactly what we
1796                 * want. */
1797                write_fs (dev, RAM, (1 << (28 - FS155_VPI_BITS - FS155_VCI_BITS)) - 1);
1798                dev->nchannels = FS155_NR_CHANNELS;
1799        }
1800        dev->atm_vccs = kcalloc (dev->nchannels, sizeof (struct atm_vcc *),
1801                                 GFP_KERNEL);
1802        fs_dprintk (FS_DEBUG_ALLOC, "Alloc atmvccs: %p(%Zd)\n",
1803                    dev->atm_vccs, dev->nchannels * sizeof (struct atm_vcc *));
1804
1805        if (!dev->atm_vccs) {
1806                printk (KERN_WARNING "Couldn't allocate memory for VCC buffers. Woops!\n");
1807                /* XXX Clean up..... */
1808                goto unmap;
1809        }
1810
1811        dev->tx_inuse = kzalloc (dev->nchannels / 8 /* bits/byte */ , GFP_KERNEL);
1812        fs_dprintk (FS_DEBUG_ALLOC, "Alloc tx_inuse: %p(%d)\n", 
1813                    dev->atm_vccs, dev->nchannels / 8);
1814
1815        if (!dev->tx_inuse) {
1816                printk (KERN_WARNING "Couldn't allocate memory for tx_inuse bits!\n");
1817                /* XXX Clean up..... */
1818                goto unmap;
1819        }
1820        /* -- RAS1 : FS155 and 50 differ. Default (0) should be OK for both */
1821        /* -- RAS2 : FS50 only: Default is OK. */
1822
1823        /* DMAMODE, default should be OK. -- REW */
1824        write_fs (dev, DMAMR, DMAMR_TX_MODE_FULL);
1825
1826        init_q (dev, &dev->hp_txq, TX_PQ(TXQ_HP), TXQ_NENTRIES, 0);
1827        init_q (dev, &dev->lp_txq, TX_PQ(TXQ_LP), TXQ_NENTRIES, 0);
1828        init_q (dev, &dev->tx_relq, TXB_RQ, TXQ_NENTRIES, 1);
1829        init_q (dev, &dev->st_q, ST_Q, TXQ_NENTRIES, 1);
1830
1831        for (i=0;i < FS_NR_FREE_POOLS;i++) {
1832                init_fp (dev, &dev->rx_fp[i], RXB_FP(i), 
1833                         rx_buf_sizes[i], rx_pool_sizes[i]);
1834                top_off_fp (dev, &dev->rx_fp[i], GFP_KERNEL);
1835        }
1836
1837
1838        for (i=0;i < FS_NR_RX_QUEUES;i++)
1839                init_q (dev, &dev->rx_rq[i], RXB_RQ(i), RXRQ_NENTRIES, 1);
1840
1841        dev->irq = pci_dev->irq;
1842        if (request_irq (dev->irq, fs_irq, IRQF_SHARED, "firestream", dev)) {
1843                printk (KERN_WARNING "couldn't get irq %d for firestream.\n", pci_dev->irq);
1844                /* XXX undo all previous stuff... */
1845                goto unmap;
1846        }
1847        fs_dprintk (FS_DEBUG_INIT, "Grabbed irq %d for dev at %p.\n", dev->irq, dev);
1848  
1849        /* We want to be notified of most things. Just the statistics count
1850           overflows are not interesting */
1851        write_fs (dev, IMR, 0
1852                  | ISR_RBRQ0_W 
1853                  | ISR_RBRQ1_W 
1854                  | ISR_RBRQ2_W 
1855                  | ISR_RBRQ3_W 
1856                  | ISR_TBRQ_W
1857                  | ISR_CSQ_W);
1858
1859        write_fs (dev, SARMODE0, 0 
1860                  | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1861                  | (1 * SARMODE0_GINT)
1862                  | (1 * SARMODE0_INTMODE_READCLEAR)
1863                  | (0 * SARMODE0_CWRE)
1864                  | (IS_FS50(dev)?SARMODE0_PRPWT_FS50_5: 
1865                                  SARMODE0_PRPWT_FS155_3)
1866                  | (1 * SARMODE0_CALSUP_1)
1867                  | (IS_FS50 (dev)?(0
1868                                    | SARMODE0_RXVCS_32
1869                                    | SARMODE0_ABRVCS_32 
1870                                    | SARMODE0_TXVCS_32):
1871                                   (0
1872                                    | SARMODE0_RXVCS_1k
1873                                    | SARMODE0_ABRVCS_1k 
1874                                    | SARMODE0_TXVCS_1k))
1875                  | (1 * SARMODE0_RUN));
1876
1877        init_phy (dev, PHY_NTC_INIT);
1878
1879        if (loopback == 2) {
1880                write_phy (dev, 0x39, 0x000e);
1881        }
1882
1883#ifdef FS_POLL_FREQ
1884        init_timer (&dev->timer);
1885        dev->timer.data = (unsigned long) dev;
1886        dev->timer.function = fs_poll;
1887        dev->timer.expires = jiffies + FS_POLL_FREQ;
1888        add_timer (&dev->timer);
1889#endif
1890
1891        dev->atm_dev->dev_data = dev;
1892  
1893        func_exit ();
1894        return 0;
1895unmap:
1896        iounmap(dev->base);
1897        return 1;
1898}
1899
1900static int __devinit firestream_init_one (struct pci_dev *pci_dev,
1901                                       const struct pci_device_id *ent) 
1902{
1903        struct atm_dev *atm_dev;
1904        struct fs_dev *fs_dev;
1905        
1906        if (pci_enable_device(pci_dev)) 
1907                goto err_out;
1908
1909        fs_dev = kzalloc (sizeof (struct fs_dev), GFP_KERNEL);
1910        fs_dprintk (FS_DEBUG_ALLOC, "Alloc fs-dev: %p(%Zd)\n",
1911                    fs_dev, sizeof (struct fs_dev));
1912        if (!fs_dev)
1913                goto err_out;
1914        atm_dev = atm_dev_register("fs", &pci_dev->dev, &ops, -1, NULL);
1915        if (!atm_dev)
1916                goto err_out_free_fs_dev;
1917  
1918        fs_dev->pci_dev = pci_dev;
1919        fs_dev->atm_dev = atm_dev;
1920        fs_dev->flags = ent->driver_data;
1921
1922        if (fs_init(fs_dev))
1923                goto err_out_free_atm_dev;
1924
1925        fs_dev->next = fs_boards;
1926        fs_boards = fs_dev;
1927        return 0;
1928
1929 err_out_free_atm_dev:
1930        atm_dev_deregister(atm_dev);
1931 err_out_free_fs_dev:
1932        kfree(fs_dev);
1933 err_out:
1934        return -ENODEV;
1935}
1936
1937static void __devexit firestream_remove_one (struct pci_dev *pdev)
1938{
1939        int i;
1940        struct fs_dev *dev, *nxtdev;
1941        struct fs_vcc *vcc;
1942        struct FS_BPENTRY *fp, *nxt;
1943  
1944        func_enter ();
1945
1946#if 0
1947        printk ("hptxq:\n");
1948        for (i=0;i<60;i++) {
1949                printk ("%d: %08x %08x %08x %08x \n", 
1950                        i, pq[qp].cmd, pq[qp].p0, pq[qp].p1, pq[qp].p2);
1951                qp++;
1952                if (qp >= 60) qp = 0;
1953        }
1954
1955        printk ("descriptors:\n");
1956        for (i=0;i<60;i++) {
1957                printk ("%d: %p: %08x %08x %p %p\n", 
1958                        i, da[qd], dq[qd].flags, dq[qd].bsa, dq[qd].skb, dq[qd].dev);
1959                qd++;
1960                if (qd >= 60) qd = 0;
1961        }
1962#endif
1963
1964        for (dev = fs_boards;dev != NULL;dev=nxtdev) {
1965                fs_dprintk (FS_DEBUG_CLEANUP, "Releasing resources for dev at %p.\n", dev);
1966
1967                /* XXX Hit all the tx channels too! */
1968
1969                for (i=0;i < dev->nchannels;i++) {
1970                        if (dev->atm_vccs[i]) {
1971                                vcc = FS_VCC (dev->atm_vccs[i]);
1972                                submit_command (dev,  &dev->hp_txq,
1973                                                QE_CMD_TX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1974                                submit_command (dev,  &dev->hp_txq,
1975                                                QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1976
1977                        }
1978                }
1979
1980                /* XXX Wait a while for the chip to release all buffers. */
1981
1982                for (i=0;i < FS_NR_FREE_POOLS;i++) {
1983                        for (fp=bus_to_virt (read_fs (dev, FP_SA(dev->rx_fp[i].offset)));
1984                             !(fp->flags & FP_FLAGS_EPI);fp = nxt) {
1985                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1986                                dev_kfree_skb_any (fp->skb);
1987                                nxt = bus_to_virt (fp->next);
1988                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
1989                                kfree (fp);
1990                        }
1991                        fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1992                        dev_kfree_skb_any (fp->skb);
1993                        fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
1994                        kfree (fp);
1995                }
1996
1997                /* Hang the chip in "reset", prevent it clobbering memory that is
1998                   no longer ours. */
1999                reset_chip (dev);
2000
2001                fs_dprintk (FS_DEBUG_CLEANUP, "Freeing irq%d.\n", dev->irq);
2002                free_irq (dev->irq, dev);
2003                del_timer (&dev->timer);
2004
2005                atm_dev_deregister(dev->atm_dev);
2006                free_queue (dev, &dev->hp_txq);
2007                free_queue (dev, &dev->lp_txq);
2008                free_queue (dev, &dev->tx_relq);
2009                free_queue (dev, &dev->st_q);
2010
2011                fs_dprintk (FS_DEBUG_ALLOC, "Free atmvccs: %p\n", dev->atm_vccs);
2012                kfree (dev->atm_vccs);
2013
2014                for (i=0;i< FS_NR_FREE_POOLS;i++)
2015                        free_freepool (dev, &dev->rx_fp[i]);
2016    
2017                for (i=0;i < FS_NR_RX_QUEUES;i++)
2018                        free_queue (dev, &dev->rx_rq[i]);
2019
2020                iounmap(dev->base);
2021                fs_dprintk (FS_DEBUG_ALLOC, "Free fs-dev: %p\n", dev);
2022                nxtdev = dev->next;
2023                kfree (dev);
2024        }
2025
2026        func_exit ();
2027}
2028
2029static struct pci_device_id firestream_pci_tbl[] = {
2030        { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50), FS_IS50},
2031        { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155), FS_IS155},
2032        { 0, }
2033};
2034
2035MODULE_DEVICE_TABLE(pci, firestream_pci_tbl);
2036
2037static struct pci_driver firestream_driver = {
2038        .name           = "firestream",
2039        .id_table       = firestream_pci_tbl,
2040        .probe          = firestream_init_one,
2041        .remove         = __devexit_p(firestream_remove_one),
2042};
2043
2044static int __init firestream_init_module (void)
2045{
2046        int error;
2047
2048        func_enter ();
2049        error = pci_register_driver(&firestream_driver);
2050        func_exit ();
2051        return error;
2052}
2053
2054static void __exit firestream_cleanup_module(void)
2055{
2056        pci_unregister_driver(&firestream_driver);
2057}
2058
2059module_init(firestream_init_module);
2060module_exit(firestream_cleanup_module);
2061
2062MODULE_LICENSE("GPL");
2063
2064
2065
2066
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