linux/sound/sparc/amd7930.c
<<
alue.12/spa v .12/form v .12a alue.1 href="../linux+v3.7.7/sound/sparc/amd7930.c">alue.12img src="../.static/gfx/right.png" alt=">>">al2/spa val2spa class="lxr_search">alue ="+search" method="post" onsubmit="return do_search(this);">alue.12input typ hidden" nam navtarget" n> ">alue.12input typ text" nam search" id search">alue.12butttiotyp submit">Searchalue.1Prefsv .12/a>al2/spa vue.1 12/div vue.1 12form ac > ="ajax+*" method="post" onsubmit="return false;">al2input typ hidden" nam ajax_lookup" id ajax_lookup" n> ">aue.1 12/form vaue.1 12div class="headingbotttm">
v 2div id file_contents"
1 112/a>2spa  class="comment">/*2/spa  v1 122/a>2spa  class="comment"> * Driver for AMD7930 sound chips found tioSparcs.2/spa  v1 132/a>2spa  class="comment"> * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>2/spa  v1 142/a>2spa  class="comment"> *2/spa  v1 152/a>2spa  class="comment"> * Based entirely uptiodrivers/sbus/audio/amd7930.c which is:2/spa  v1 162/a>2spa  class="comment"> * Copyright (C) 1996,1997 Thomas K. Dyas (tdyas@eden.rutgers.edu)2/spa  v1 172/a>2spa  class="comment"> *2/spa  v1 182/a>2spa  class="comment"> * --- Notes from Thomas's originalodriver ---2/spa  v1 192/a>2spa  class="comment"> * This is the lowlevelodriver for the AMD7930 audio chip found tioall2/spa  v1 10"
a>2spa  class="comment"> * sun4c machines and some sun4m machines.2/spa  v1 112/a>2spa  class="comment"> *2/spa  v1 122/a>2spa  class="comment"> * The amd7930 is ac ually an ISDN chip which has a very simple2/spa  v1 132/a>2spa  class="comment"> * integrated audio encoder/decoder. WheioSuiodecided tiowhat chip to2/spa  v1 142/a>2spa  class="comment"> * use for audio, they had the brilliant idea of using the amd7930 and2/spa  v1 152/a>2spa  class="comment"> * only connecting the audio encoder/decoder pins.2/spa  v1 162/a>2spa  class="comment"> *2/spa  v1 172/a>2spa  class="comment"> * Thanks to the AMD engineer who was able to get us the AMD79C.02"spa  v1 182/a>2spa  class="comment"> * databook which has all the programming informaoptioand gaiiotables.2/spa  v1 192/a>2spa  class="comment"> *2/spa  v1 20"
a>2spa  class="comment"> * Advanced Micro Devices' Am79C.0A is an ISDN/audio chip used iiothe2/spa  v1 212/a>2spa  class="comment"> *oSparcStaoptio1+.  The chip provides microphone and speaker interfaces2/spa  v1 222/a>2spa  class="comment"> * which provide mono-channeloaudio at 8K samples per second via either2/spa  v1 232/a>2spa  class="comment"> * 8-bit A-law or 8-bit mu-law encoding.  Also, the chip features an2/spa  v1 242/a>2spa  class="comment"> * ISDN BRI Line Interface Unit (LIU), I.430 S/T physicalointerface,2/spa  v1 252/a>2spa  class="comment"> * which performs basic D channeloLAPD processing and provides raw2/spa  v1 262/a>2spa  class="comment"> * B channelodata.  The digital audio channel, the two ISDN B channels,2/spa  v1 272/a>2spa  class="comment"> * and two 64 Kbps channels to the microprocessor are all interconnected2/spa  v1 282/a>2spa  class="comment"> * via a multiplexer.2/spa  v1 292/a>2spa  class="comment"> * --- End tf notes from Thoamas's originalodriver ---2/spa  v1 30"
a>2spa  class="comment"> */2/spa  v1 312/a>v1 322/a>#include <linux/module.h2/a>>v1 332/a>#include <linux/kernel.h2/a>>v1 342/a>#include <linux/slab.h2/a>>v1 352/a>#include <linux/init.h2/a>>v1 362/a>#include <linux/interrupt.h2/a>>v1 372/a>#include <linux/moduleparam.h2/a>>v1 382/a>#include <linux/of.h2/a>>v1 392/a>#include <linux/of_device.h2/a>>v1 402/a>v1 412/a>#include <sound/core.h2/a>>v1 422/a>#include <sound/pcm.h2/a>>v1 432/a>#include <sound/info.h2/a>>v1 442/a>#include <sound/control.h2/a>>v1 452/a>#include <sound/initval.h2/a>>v1 462/a>v1 472/a>#include <asm/io.h2/a>>v1 482/a>#include <asm/irq.h2/a>>v1 492/a>#include <asm/prom.h2/a>>v1 502/a>v1 512/a>static int12a href="+code=index" class="sref">index2/a>[2a href="+code=SNDRV_CARDS" class="sref">SNDRV_CARDS2/a>] =12a href="+code=SNDRV_DEFAULT_IDX" class="sref">SNDRV_DEFAULT_IDX2/a>;ue.1 12spa  class="comment">/* Index 0-MAX */2/spa  v1 522/a>static char *2a href="+code=id" class="sref">id2/a>[2a href="+code=SNDRV_CARDS" class="sref">SNDRV_CARDS2/a>] =12a href="+code=SNDRV_DEFAULT_STR" class="sref">SNDRV_DEFAULT_STR2/a>;ue.1 112spa  class="comment">/* ID for this card */2/spa  v1 532/a>static 2a href="+code=bool" class="sref">bool2/a> 2a href="+code=enable" class="sref">enable2/a>[2a href="+code=SNDRV_CARDS" class="sref">SNDRV_CARDS2/a>] =12a href="+code=SNDRV_DEFAULT_ENABLE_PNP" class="sref">SNDRV_DEFAULT_ENABLE_PNP2/a>;ue.1 2spa  class="comment">/* Enable this card */2/spa  v1 542/a>v1 552/a>2a href="+code=module_param_array" class="sref">module_param_array2/a>(2a href="+code=index" class="sref">index2/a>, int,12a href="+code=NULL" class="sref">NULL2/a>, 0444);v1 562/a>2a href="+code=MODULE_PARM_DESC" class="sref">MODULE_PARM_DESC2/a>(2a href="+code=index" class="sref">index2/a>, 2spa  class="string">"Index n>
   for SuioAMD7930 soundcard."2/spa  );v1 572/a>2a href="+code=module_param_array" class="sref">module_param_array2/a>(2a href="+code=id" class="sref">id2/a>,12a href="+code=charp" class="sref">charp2/a>,12a href="+code=NULL" class="sref">NULL2/a>, 0444);v1 582/a>2a href="+code=MODULE_PARM_DESC" class="sref">MODULE_PARM_DESC2/a>(2a href="+code=id" class="sref">id2/a>,12spa  class="string">"ID string for SuioAMD7930 soundcard."2/spa  );v1 592/a>2a href="+code=module_param_array" class="sref">module_param_array2/a>(2a href="+code=enable" class="sref">enable2/a>,12a href="+code=bool" class="sref">bool2/a>,12a href="+code=NULL" class="sref">NULL2/a>, 0444);v1 602/a>2a href="+code=MODULE_PARM_DESC" class="sref">MODULE_PARM_DESC2/a>(2a href="+code=enable" class="sref">enable2/a>,12spa  class="string">"Enable SuioAMD7930 soundcard."2/spa  );v1 612/a>2a href="+code=MODULE_AUTHOR" class="sref">MODULE_AUTHOR2/a>(2spa  class="string">"Thomas K. Dyas and David S. Miller"2/spa  );v1 622/a>2a href="+code=MODULE_DESCRIPTION" class="sref">MODULE_DESCRIPTION2/a>(2spa  class="string">"SuioAMD7930"2/spa  );v1 632/a>2a href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSE2/a>(2spa  class="string">"GPL"2/spa  );v1 642/a>2a href="+code=MODULE_SUPPORTED_DEVICE" class="sref">MODULE_SUPPORTED_DEVICE2/a>(2spa  class="string">"{{Sui,AMD7930}}"2/spa  );v1 652/a>v1 662/a>2spa  class="comment">/* Device register layout.  */2/spa  v1 672/a>v1 682/a>2spa  class="comment">/* Register interface presented to the CPU by the amd7930. */2/spa  v1 692/a>#define 2a href="+code=AMD7930_CR" class="sref">AMD7930_CR2/a>      0x00UL          2spa  class="comment">/* Command Register (W) */2/spa  v1 702/a>#define 2a href="+code=AMD7930_IR" class="sref">AMD7930_IR2/a>      2a href="+code=AMD7930_CR" class="sref">AMD7930_CR2/a>      2spa  class="comment">/* Interrupt Register (R) */2/spa  v1 712/a>#define 2a href="+code=AMD7930_DR" class="sref">AMD7930_DR2/a>      0x01UL          2spa  class="comment">/* Data Register (R/W) */2/spa  v1 722/a>#define 2a href="+code=AMD7930_DSR1" class="sref">AMD7930_DSR12/a>    0x02UL          2spa  class="comment">/* D-channeloStaous Register 1 (R) */2/spa  v1 732/a>#define 2a href="+code=AMD7930_DER" class="sref">AMD7930_DER2/a>     0x03UL          2spa  class="comment">/* D-channeloError Register (R) */2/spa  v1 742/a>#define 2a href="+code=AMD7930_DCTB" class="sref">AMD7930_DCTB2/a>    0x04UL          2spa  class="comment">/* D-channeloTransmit Buffer (W) */2/spa  v1 752/a>#define 2a href="+code=AMD7930_DCRB" class="sref">AMD7930_DCRB2/a>    2a href="+code=AMD7930_DCTB" class="sref">AMD7930_DCTB2/a>    2spa  class="comment">/* D-channeloReceive Buffer (R) */2/spa  v1 762/a>#define 2a href="+code=AMD7930_BBTB" class="sref">AMD7930_BBTB2/a>    0x05UL          2spa  class="comment">/* Bb-channeloTransmit Buffer (W) */2/spa  v1 772/a>#define 2a href="+code=AMD7930_BBRB" class="sref">AMD7930_BBRB2/a>    2a href="+code=AMD7930_BBTB" class="sref">AMD7930_BBTB2/a>    2spa  class="comment">/* Bb-channeloReceive Buffer (R) */2/spa  v1 782/a>#define 2a href="+code=AMD7930_BCTB" class="sref">AMD7930_BCTB2/a>    0x06UL          2spa  class="comment">/* Bc-channeloTransmit Buffer (W) */2/spa  v1 792/a>#define 2a href="+code=AMD7930_BCRB" class="sref">AMD7930_BCRB2/a>    2a href="+code=AMD7930_BCTB" class="sref">AMD7930_BCTB2/a>    2spa  class="comment">/* Bc-channeloReceive Buffer (R) */2/spa  v1 802/a>#define 2a href="+code=AMD7930_DSR2" class="sref">AMD7930_DSR22/a>    0x07UL          2spa  class="comment">/* D-channeloStaous Register 2 (R) */2/spa  v1 812/a>v1 822/a>2spa  class="comment">/* Indirect registers iiothe MaiioAudio Processor. */2/spa  v1 832/a>struct12a href="+code=amd7930_map" class="sref">amd7930_map2/a> {v1 842/a>        2a href="+code=__u16" class="sref">__u162/a>   2a href="+code=x" class="sref">x2/a>[8];v1 852/a>        2a href="+code=__u16" class="sref">__u162/a>   2a href="+code=r" class="sref">r2/a>[8];v1 862/a>        2a href="+code=__u16" class="sref">__u162/a>   2a href="+code=gx" class="sref">gx2/a>;v1 872/a>        2a href="+code=__u16" class="sref">__u162/a>   2a href="+code=gr" class="sref">gr2/a>;v1 882/a>        2a href="+code=__u16" class="sref">__u162/a>   2a href="+code=ger" class="sref">ger2/a>;v1 892/a>        2a href="+code=__u16" class="sref">__u162/a>   2a href="+code=stgr" class="sref">stgr2/a>;v1 902/a>        2a href="+code=__u16" class="sref">__u162/a>   2a href="+code=ftgr" class="sref">ftgr2/a>;v1 912/a>        2a href="+code=__u16" class="sref">__u162/a>   2a href="+code=atgr" class="sref">atgr2/a>;v1 922/a>        2a href="+code=__u8" class="sref">__u82/a>    2a href="+code=mmr1" class="sref">mmr12/a>;v1 932/a>        2a href="+code=__u8" class="sref">__u82/a>    2a href="+code=mmr2" class="sref">mmr22/a>;v1 942/a>};v1 952/a>v1 962/a>2spa  class="comment">/* After a  amd7930 interrupt, readingothe Interrupt Register (ir)2/spa  v1 972/a>2spa  class="comment"> * clears the interrupt and returns a bitmask indicating which2/spa  v1 982/a>2spa  class="comment"> * interrupt source(s) require service.2/spa  v1 992/a>2spa  class="comment"> */2/spa  v11002/a>v11012/a>#define 2a href="+code=AMR_IR_DTTHRSH" class="sref">AMR_IR_DTTHRSH2/a>                  0x01 2spa  class="comment">/* D-channeloxmit threshold */2/spa  v11022/a>#define 2a href="+code=AMR_IR_DRTHRSH" class="sref">AMR_IR_DRTHRSH2/a>                  0x02 2spa  class="comment">/* D-channelorecv threshold */2/spa  v11032/a>#define 2a href="+code=AMR_IR_DSRI" class="sref">AMR_IR_DSRI2/a>                     0x04 2spa  class="comment">/* D-channelopacket staous */2/spa  v11042/a>#define 2a href="+code=AMR_IR_DERI" class="sref">AMR_IR_DERI2/a>                     0x08 2spa  class="comment">/* D-channeloerror */2/spa  v11052/a>#define 2a href="+code=AMR_IR_BBUF" class="sref">AMR_IR_BBUF2/a>                     0x10 2spa  class="comment">/* B-channelodata xfer */2/spa  v11062/a>#define 2a href="+code=AMR_IR_LSRI" class="sref">AMR_IR_LSRI2/a>                     0x20 2spa  class="comment">/* LIU staous */2/spa  v11072/a>#define 2a href="+code=AMR_IR_DSR2I" class="sref">AMR_IR_DSR2I2/a>                    0x40 2spa  class="comment">/* D-channelobuffer staous */2/spa  v11082/a>#define 2a href="+code=AMR_IR_MLTFRMI" class="sref">AMR_IR_MLTFRMI2/a>                  0x80 2spa  class="comment">/* multifram  or PP */2/spa  v11092/a>v1110"
a>2spa  class="comment">/* The amd7930 has "indirect registers" which are accessed by writing2/spa  v11112/a>2spa  class="comment"> * the register number into the Command Register and theioreadingoor2/spa  v11122/a>2spa  class="comment"> * writing n>
  s from the Data Register as appropriate. We define the2/spa  v11132/a>2spa  class="comment"> * AMR_* macros to be the indirect register numbers and AM_* macros to2/spa  v11142/a>2spa  class="comment"> * be bits iiowhatever register is referred to.2/spa  v11152/a>2spa  class="comment"> */2/spa  v11162/a>v11172/a>2spa  class="comment">/* Initializaoptio*/2/spa  v11182/a>#define 2a href="+code=AMR_INIT" class="sref">AMR_INIT2/a>                        0x21v11192/a>#define         2a href="+code=AM_INIT_ACTIVE" class="sref">AM_INIT_ACTIVE2/a>                  0x01v11202/a>#define         2a href="+code=AM_INIT_DATAONLY" class="sref">AM_INIT_DATAONLY2/a>                0x02v11212/a>#define         2a href="+code=AM_INIT_POWERDOWN" class="sref">AM_INIT_POWERDOWN2/a>               0x03v11222/a>#define         2a href="+code=AM_INIT_DISABLE_INTS" class="sref">AM_INIT_DISABLE_INTS2/a>            0x04v11232/a>#define 2a href="+code=AMR_INIT2" class="sref">AMR_INIT22/a>                       0x20v11242/a>#define         2a href="+code=AM_INIT2_ENABLE_POWERDOWN" class="sref">AM_INIT2_ENABLE_POWERDOWN2/a>       0x20v11252/a>#define         2a href="+code=AM_INIT2_ENABLE_MULTIFRAME" class="sref">AM_INIT2_ENABLE_MULTIFRAME2/a>      0x10v11262/a>v11272/a>2spa  class="comment">/* Line Interface Unit */2/spa  v11282/a>#define 2a href="+code=AMR_LIU_LSR" class="sref">AMR_LIU_LSR2/a>                     0xA1v11292/a>#define         2a href="+code=AM_LIU_LSR_STATE" class="sref">AM_LIU_LSR_STATE2/a>                0x07v11302/a>#define         2a href="+code=AM_LIU_LSR_F3" class="sref">AM_LIU_LSR_F32/a>                   0x08v11312/a>#define         2a href="+code=AM_LIU_LSR_F7" class="sref">AM_LIU_LSR_F72/a>                   0x10v11322/a>#define         2a href="+code=AM_LIU_LSR_F8" class="sref">AM_LIU_LSR_F82/a>                   0x20v11332/a>#define         2a href="+code=AM_LIU_LSR_HSW" class="sref">AM_LIU_LSR_HSW2/a>                  0x40v11342/a>#define         2a href="+code=AM_LIU_LSR_HSW_CHG" class="sref">AM_LIU_LSR_HSW_CHG2/a>              0x80v11352/a>#define 2a href="+code=AMR_LIU_LPR" class="sref">AMR_LIU_LPR2/a>                     0xA2v11362/a>#define 2a href="+code=AMR_LIU_LMR1" class="sref">AMR_LIU_LMR12/a>                    0xA3v11372/a>#define         2a href="+code=AM_LIU_LMR1_B1_ENABL" class="sref">AM_LIU_LMR1_B1_ENABL2/a>            0x01v11382/a>#define         2a href="+code=AM_LIU_LMR1_B2_ENABL" class="sref">AM_LIU_LMR1_B2_ENABL2/a>            0x02v11392/a>#define         2a href="+code=AM_LIU_LMR1_F_DISABL" class="sref">AM_LIU_LMR1_F_DISABL2/a>            0x04v11402/a>#define         2a href="+code=AM_LIU_LMR1_FA_DISABL" class="sref">AM_LIU_LMR1_FA_DISABL2/a>           0x08v11412/a>#define         2a href="+code=AM_LIU_LMR1_REQ_ACTIV" class="sref">AM_LIU_LMR1_REQ_ACTIV2/a>           0x10v11422/a>#define         2a href="+code=AM_LIU_LMR1_F8_F3" class="sref">AM_LIU_LMR1_F8_F32/a>               0x20v11432/a>#define         2a href="+code=AM_LIU_LMR1_LIU_ENABL" class="sref">AM_LIU_LMR1_LIU_ENABL2/a>           0x40v11442/a>#define 2a href="+code=AMR_LIU_LMR2" class="sref">AMR_LIU_LMR22/a>                    0xA4v11452/a>#define         2a href="+code=AM_LIU_LMR2_DECHO" class="sref">AM_LIU_LMR2_DECHO2/a>               0x01v11462/a>#define         2a href="+code=AM_LIU_LMR2_DLOOP" class="sref">AM_LIU_LMR2_DLOOP2/a>               0x02v11472/a>#define         2a href="+code=AM_LIU_LMR2_DBACKOFF" class="sref">AM_LIU_LMR2_DBACKOFF2/a>            0x04v11482/a>#define         2a href="+code=AM_LIU_LMR2_EN_F3_INT" class="sref">AM_LIU_LMR2_EN_F3_INT2/a>           0x08v11492/a>#define         2a href="+code=AM_LIU_LMR2_EN_F8_INT" class="sref">AM_LIU_LMR2_EN_F8_INT2/a>           0x10v11502/a>#define         2a href="+code=AM_LIU_LMR2_EN_HSW_INT" class="sref">AM_LIU_LMR2_EN_HSW_INT2/a>          0x20v11512/a>#define         2a href="+code=AM_LIU_LMR2_EN_F7_INT" class="sref">AM_LIU_LMR2_EN_F7_INT2/a>           0x40v11522/a>#define 2a href="+code=AMR_LIU_2_4" class="sref">AMR_LIU_2_42/a>                     0xA5v11532/a>#define 2a href="+code=AMR_LIU_MF" class="sref">AMR_LIU_MF2/a>                      0xA6v11542/a>#define 2a href="+code=AMR_LIU_MFSB" class="sref">AMR_LIU_MFSB2/a>                    0xA7v11552/a>#define 2a href="+code=AMR_LIU_MFQB" class="sref">AMR_LIU_MFQB2/a>                    0xA8v11562/a>v11572/a>2spa  class="comment">/* Multiplexor */2/spa  v11582/a>#define 2a href="+code=AMR_MUX_MCR1" class="sref">AMR_MUX_MCR12/a>                    0x41v11592/a>#define 2a href="+code=AMR_MUX_MCR2" class="sref">AMR_MUX_MCR22/a>                    0x42v11602/a>#define 2a href="+code=AMR_MUX_MCR3" class="sref">AMR_MUX_MCR32/a>                    0x43v11612/a>#define         2a href="+code=AM_MUX_CHANNEL_B1" class="sref">AM_MUX_CHANNEL_B12/a>               0x01v11622/a>#define         2a href="+code=AM_MUX_CHANNEL_B2" class="sref">AM_MUX_CHANNEL_B22/a>               0x02v11632/a>#define         2a href="+code=AM_MUX_CHANNEL_Ba" class="sref">AM_MUX_CHANNEL_Ba2/a>               0x03v11642/a>#define         2a href="+code=AM_MUX_CHANNEL_Bb" class="sref">AM_MUX_CHANNEL_Bb2/a>               0x04v11652/a>#define         2a href="+code=AM_MUX_CHANNEL_Bc" class="sref">AM_MUX_CHANNEL_Bc2/a>               0x05v11662/a>#define         2a href="+code=AM_MUX_CHANNEL_Bd" class="sref">AM_MUX_CHANNEL_Bd2/a>               0x06v11672/a>#define         2a href="+code=AM_MUX_CHANNEL_Be" class="sref">AM_MUX_CHANNEL_Be2/a>               0x07v11682/a>#define         2a href="+code=AM_MUX_CHANNEL_Bf" class="sref">AM_MUX_CHANNEL_Bf2/a>               0x08v11692/a>#define 2a href="+code=AMR_MUX_MCR4" class="sref">AMR_MUX_MCR42/a>                    0x44v11702/a>#define         2a href="+code=AM_MUX_MCR4_ENABLE_INTS" class="sref">AM_MUX_MCR4_ENABLE_INTS2/a>         0x08v11712/a>#define         2a href="+code=AM_MUX_MCR4_REVERSE_Bb" class="sref">AM_MUX_MCR4_REVERSE_Bb2/a>          0x10v11722/a>#define         2a href="+code=AM_MUX_MCR4_REVERSE_Bc" class="sref">AM_MUX_MCR4_REVERSE_Bc2/a>          0x20v11732/a>#define 2a href="+code=AMR_MUX_1_4" class="sref">AMR_MUX_1_42/a>                     0x45v11742/a>v11752/a>2spa  class="comment">/* MaiioAudio Processor */2/spa  v11762/a>#define 2a href="+code=AMR_MAP_X" class="sref">AMR_MAP_X2/a>                       0x61v11772/a>#define 2a href="+code=AMR_MAP_R" class="sref">AMR_MAP_R2/a>                       0x62v11782/a>#define 2a href="+code=AMR_MAP_GX" class="sref">AMR_MAP_GX2/a>                      0x63v11792/a>#define 2a href="+code=AMR_MAP_GR" class="sref">AMR_MAP_GR2/a>                      0x64v11802/a>#define 2a href="+code=AMR_MAP_GER" class="sref">AMR_MAP_GER2/a>                     0x65v11812/a>#define 2a href="+code=AMR_MAP_STGR" class="sref">AMR_MAP_STGR2/a>                    0x66v11822/a>#define 2a href="+code=AMR_MAP_FTGR_1_2" class="sref">AMR_MAP_FTGR_1_22/a>                0x67v11832/a>#define 2a href="+code=AMR_MAP_ATGR_1_2" class="sref">AMR_MAP_ATGR_1_22/a>                0x68v11842/a>#define 2a href="+code=AMR_MAP_MMR1" class="sref">AMR_MAP_MMR12/a>                    0x69v11852/a>#define         2a href="+code=AM_MAP_MMR1_ALAW" class="sref">AM_MAP_MMR1_ALAW2/a>                0x01v11862/a>#define         2a href="+code=AM_MAP_MMR1_GX" class="sref">AM_MAP_MMR1_GX2/a>                  0x02v11872/a>#define         2a href="+code=AM_MAP_MMR1_GR" class="sref">AM_MAP_MMR1_GR2/a>                  0x04v11882/a>#define         2a href="+code=AM_MAP_MMR1_GER" class="sref">AM_MAP_MMR1_GER2/a>                 0x08v11892/a>#define         2a href="+code=AM_MAP_MMR1_X" class="sref">AM_MAP_MMR1_X2/a>                   0x10v11902/a>#define         2a href="+code=AM_MAP_MMR1_R" class="sref">AM_MAP_MMR1_R2/a>                   0x20v11912/a>#define         2a href="+code=AM_MAP_MMR1_STG" class="sref">AM_MAP_MMR1_STG2/a>                 0x40v11922/a>#define         2a href="+code=AM_MAP_MMR1_LOOPBACK" class="sref">AM_MAP_MMR1_LOOPBACK2/a>            0x80v11932/a>#define 2a href="+code=AMR_MAP_MMR2" class="sref">AMR_MAP_MMR22/a>                    0x6Av11942/a>#define         2a href="+code=AM_MAP_MMR2_AINB" class="sref">AM_MAP_MMR2_AINB2/a>                0x01v11952/a>#define         2a href="+code=AM_MAP_MMR2_LS" class="sref">AM_MAP_MMR2_LS2/a>                  0x02v11962/a>#define         2a href="+code=AM_MAP_MMR2_ENABLE_DTMF" class="sref">AM_MAP_MMR2_ENABLE_DTMF2/a>         0x04v11972/a>#define         2a href="+code=AM_MAP_MMR2_ENABLE_TONEGEN" class="sref">AM_MAP_MMR2_ENABLE_TONEGEN2/a>      0x08v11982/a>#define         2a href="+code=AM_MAP_MMR2_ENABLE_TONERING" class="sref">AM_MAP_MMR2_ENABLE_TONERING2/a>     0x10v11992/a>#define         2a href="+code=AM_MAP_MMR2_DISABLE_HIGHPASS" class="sref">AM_MAP_MMR2_DISABLE_HIGHPASS2/a>    0x20v12002/a>#define         2a href="+code=AM_MAP_MMR2_DISABLE_AUTOZERO" class="sref">AM_MAP_MMR2_DISABLE_AUTOZERO2/a>    0x40v12012/a>#define 2a href="+code=AMR_MAP_1_10" class="sref">AMR_MAP_1_102/a>                    0x6Bv12022/a>#define 2a href="+code=AMR_MAP_MMR3" class="sref">AMR_MAP_MMR32/a>                    0x6Cv12032/a>#define 2a href="+code=AMR_MAP_STRA" class="sref">AMR_MAP_STRA2/a>                    0x6Dv12042/a>#define 2a href="+code=AMR_MAP_STRF" class="sref">AMR_MAP_STRF2/a>                    0x6Ev12052/a>#define 2a href="+code=AMR_MAP_PEAKX" class="sref">AMR_MAP_PEAKX2/a>                   0x70v12062/a>#define 2a href="+code=AMR_MAP_PEAKR" class="sref">AMR_MAP_PEAKR2/a>                   0x71v12072/a>#define 2a href="+code=AMR_MAP_15_16" class="sref">AMR_MAP_15_162/a>                   0x72v12082/a>v12092/a>2spa  class="comment">/* Data Link Controller */2/spa  v12102/a>#define 2a href="+code=AMR_DLC_FRAR_1_2_3" class="sref">AMR_DLC_FRAR_1_2_32/a>              0x81v12112/a>#define 2a href="+code=AMR_DLC_SRAR_1_2_3" class="sref">AMR_DLC_SRAR_1_2_32/a>              0x82v12122/a>#define 2a href="+code=AMR_DLC_TAR" class="sref">AMR_DLC_TAR2/a>                     0x83v12132/a>#define 2a href="+code=AMR_DLC_DRLR" class="sref">AMR_DLC_DRLR2/a>                    0x84v12142/a>#define 2a href="+code=AMR_DLC_DTCR" class="sref">AMR_DLC_DTCR2/a>                    0x85v12152/a>#define 2a href="+code=AMR_DLC_DMR1" class="sref">AMR_DLC_DMR12/a>                    0x86v12162/a>#define         2a href="+code=AMR_DLC_DMR1_DTTHRSH_INT" class="sref">AMR_DLC_DMR1_DTTHRSH_INT2/a>        0x01v12172/a>#define         2a href="+code=AMR_DLC_DMR1_DRTHRSH_INT" class="sref">AMR_DLC_DMR1_DRTHRSH_INT2/a>        0x02v12182/a>#define         2a href="+code=AMR_DLC_DMR1_TAR_ENABL" class="sref">AMR_DLC_DMR1_TAR_ENABL2/a>          0x04v12192/a>#define         2a href="+code=AMR_DLC_DMR1_EORP_INT" class="sref">AMR_DLC_DMR1_EORP_INT2/a>           0x08v12202/a>#define         2a href="+code=AMR_DLC_DMR1_EN_ADDR1" class="sref">AMR_DLC_DMR1_EN_ADDR12/a>           0x10v12212/a>#define         2a href="+code=AMR_DLC_DMR1_EN_ADDR2" class="sref">AMR_DLC_DMR1_EN_ADDR22/a>           0x20v12222/a>#define         2a href="+code=AMR_DLC_DMR1_EN_ADDR3" class="sref">AMR_DLC_DMR1_EN_ADDR32/a>           0x40v12232/a>#define         2a href="+code=AMR_DLC_DMR1_EN_ADDR4" class="sref">AMR_DLC_DMR1_EN_ADDR42/a>           0x80v12242/a>#define         2a href="+code=AMR_DLC_DMR1_EN_ADDRS" class="sref">AMR_DLC_DMR1_EN_ADDRS2/a>           0xf0v12252/a>#define 2a href="+code=AMR_DLC_DMR2" class="sref">AMR_DLC_DMR22/a>                    0x87v12262/a>#define         2a href="+code=AMR_DLC_DMR2_RABRT_INT" class="sref">AMR_DLC_DMR2_RABRT_INT2/a>          0x01v12272/a>#define         2a href="+code=AMR_DLC_DMR2_RESID_INT" class="sref">AMR_DLC_DMR2_RESID_INT2/a>          0x02v12282/a>#define         2a href="+code=AMR_DLC_DMR2_COLL_INT" class="sref">AMR_DLC_DMR2_COLL_INT2/a>           0x04v12292/a>#define         2a href="+code=AMR_DLC_DMR2_FCS_INT" class="sref">AMR_DLC_DMR2_FCS_INT2/a>            0x08v12302/a>#define         2a href="+code=AMR_DLC_DMR2_OVFL_INT" class="sref">AMR_DLC_DMR2_OVFL_INT2/a>           0x10v12312/a>#define         2a href="+code=AMR_DLC_DMR2_UNFL_INT" class="sref">AMR_DLC_DMR2_UNFL_INT2/a>           0x20v12322/a>#define         2a href="+code=AMR_DLC_DMR2_OVRN_INT" class="sref">AMR_DLC_DMR2_OVRN_INT2/a>           0x40v12332/a>#define         2a href="+code=AMR_DLC_DMR2_UNRN_INT" class="sref">AMR_DLC_DMR2_UNRN_INT2/a>           0x80v12342/a>#define 2a href="+code=AMR_DLC_1_7" class="sref">AMR_DLC_1_72/a>                     0x88v12352/a>#define 2a href="+code=AMR_DLC_DRCR" class="sref">AMR_DLC_DRCR2/a>                    0x89v12362/a>#define 2a href="+code=AMR_DLC_RNGR1" class="sref">AMR_DLC_RNGR12/a>                   0x8Av12372/a>#define 2a href="+code=AMR_DLC_RNGR2" class="sref">AMR_DLC_RNGR22/a>                   0x8Bv12382/a>#define 2a href="+code=AMR_DLC_FRAR4" class="sref">AMR_DLC_FRAR42/a>                   0x8Cv12392/a>#define 2a href="+code=AMR_DLC_SRAR4" class="sref">AMR_DLC_SRAR42/a>                   0x8Dv12402/a>#define 2a href="+code=AMR_DLC_DMR3" class="sref">AMR_DLC_DMR32/a>                    0x8Ev12412/a>#define         2a href="+code=AMR_DLC_DMR3_VA_INT" class="sref">AMR_DLC_DMR3_VA_INT2/a>             0x01v12422/a>#define         2a href="+code=AMR_DLC_DMR3_EOTP_INT" class="sref">AMR_DLC_DMR3_EOTP_INT2/a>           0x02v12432/a>#define         2a href="+code=AMR_DLC_DMR3_LBRP_INT" class="sref">AMR_DLC_DMR3_LBRP_INT2/a>           0x04v12442/a>#define         2a href="+code=AMR_DLC_DMR3_RBA_INT" class="sref">AMR_DLC_DMR3_RBA_INT2/a>            0x08v12452/a>#define         2a href="+code=AMR_DLC_DMR3_LBT_INT" class="sref">AMR_DLC_DMR3_LBT_INT2/a>            0x10v12462/a>#define         2a href="+code=AMR_DLC_DMR3_TBE_INT" class="sref">AMR_DLC_DMR3_TBE_INT2/a>            0x20v12472/a>#define         2a href="+code=AMR_DLC_DMR3_RPLOST_INT" class="sref">AMR_DLC_DMR3_RPLOST_INT2/a>         0x40v12482/a>#define         2a href="+code=AMR_DLC_DMR3_KEEP_FCS" class="sref">AMR_DLC_DMR3_KEEP_FCS2/a>           0x80v12492/a>#define 2a href="+code=AMR_DLC_DMR4" class="sref">AMR_DLC_DMR42/a>                    0x8Fv12502/a>#define         2a href="+code=AMR_DLC_DMR4_RCV_1" class="sref">AMR_DLC_DMR4_RCV_12/a>              0x00v12512/a>#define         2a href="+code=AMR_DLC_DMR4_RCV_2" class="sref">AMR_DLC_DMR4_RCV_22/a>              0x01v12522/a>#define         2a href="+code=AMR_DLC_DMR4_RCV_4" class="sref">AMR_DLC_DMR4_RCV_42/a>              0x02v12532/a>#define         2a href="+code=AMR_DLC_DMR4_RCV_8" class="sref">AMR_DLC_DMR4_RCV_82/a>              0x03v12542/a>#define         2a href="+code=AMR_DLC_DMR4_RCV_16" class="sref">AMR_DLC_DMR4_RCV_162/a>             0x01v12552/a>#define         2a href="+code=AMR_DLC_DMR4_RCV_24" class="sref">AMR_DLC_DMR4_RCV_242/a>             0x02v12562/a>#define         2a href="+code=AMR_DLC_DMR4_RCV_30" class="sref">AMR_DLC_DMR4_RCV_302/a>             0x03v12572/a>#define         2a href="+code=AMR_DLC_DMR4_XMT_1" class="sref">AMR_DLC_DMR4_XMT_12/a>              0x00v12582/a>#define         2a href="+code=AMR_DLC_DMR4_XMT_2" class="sref">AMR_DLC_DMR4_XMT_22/a>              0x04v12592/a>#define         2a href="+code=AMR_DLC_DMR4_XMT_4" class="sref">AMR_DLC_DMR4_XMT_42/a>              0x08v12602/a>#define         2a href="+code=AMR_DLC_DMR4_XMT_8" class="sref">AMR_DLC_DMR4_XMT_82/a>              0x0cv12612/a>#define         2a href="+code=AMR_DLC_DMR4_XMT_10" class="sref">AMR_DLC_DMR4_XMT_102/a>             0x08v12622/a>#define         2a href="+code=AMR_DLC_DMR4_XMT_14" class="sref">AMR_DLC_DMR4_XMT_142/a>             0x0cv12632/a>#define         2a href="+code=AMR_DLC_DMR4_IDLE_MARK" class="sref">AMR_DLC_DMR4_IDLE_MARK2/a>          0x00v12642/a>#define         2a href="+code=AMR_DLC_DMR4_IDLE_FLAG" class="sref">AMR_DLC_DMR4_IDLE_FLAG2/a>          0x10v12652/a>#define         2a href="+code=AMR_DLC_DMR4_ADDR_BOTH" class="sref">AMR_DLC_DMR4_ADDR_BOTH2/a>          0x00v12662/a>#define         2a href="+code=AMR_DLC_DMR4_ADDR_1ST" class="sref">AMR_DLC_DMR4_ADDR_1ST2/a>           0x20v12672/a>#define         2a href="+code=AMR_DLC_DMR4_ADDR_2ND" class="sref">AMR_DLC_DMR4_ADDR_2ND2/a>           0xa0v12682/a>#define         2a href="+code=AMR_DLC_DMR4_CR_ENABLE" class="sref">AMR_DLC_DMR4_CR_ENABLE2/a>          0x40v12692/a>#define 2a href="+code=AMR_DLC_12_15" class="sref">AMR_DLC_12_152/a>                   0x90v12702/a>#define 2a href="+code=AMR_DLC_ASR" class="sref">AMR_DLC_ASR2/a>                     0x91v12712/a>#define 2a href="+code=AMR_DLC_EFCR" class="sref">AMR_DLC_EFCR2/a>                    0x92v12722/a>#define         2a href="+code=AMR_DLC_EFCR_EXTEND_FIFO" class="sref">AMR_DLC_EFCR_EXTEND_FIFO2/a>        0x01v12732/a>#define         2a href="+code=AMR_DLC_EFCR_SEC_PKT_INT" class="sref">AMR_DLC_EFCR_SEC_PKT_INT2/a>        0x02v12742/a>v12752/a>#define 2a href="+code=AMR_DSR1_VADDR" class="sref">AMR_DSR1_VADDR2/a>                  0x01v12762/a>#define 2a href="+code=AMR_DSR1_EORP" class="sref">AMR_DSR1_EORP2/a>                   0x02v12772/a>#define 2a href="+code=AMR_DSR1_PKT_IP" class="sref">AMR_DSR1_PKT_IP2/a>                 0x04v12782/a>#define 2a href="+code=AMR_DSR1_DECHO_ON" class="sref">AMR_DSR1_DECHO_ON2/a>               0x08v12792/a>#define 2a href="+code=AMR_DSR1_DLOOP_ON" class="sref">AMR_DSR1_DLOOP_ON2/a>               0x10v12802/a>#define 2a href="+code=AMR_DSR1_DBACK_OFF" class="sref">AMR_DSR1_DBACK_OFF2/a>              0x20v12812/a>#define 2a href="+code=AMR_DSR1_EOTP" class="sref">AMR_DSR1_EOTP2/a>                   0x40v12822/a>#define 2a href="+code=AMR_DSR1_CXMT_ABRT" class="sref">AMR_DSR1_CXMT_ABRT2/a>              0x80v12832/a>v12842/a>#define 2a href="+code=AMR_DSR2_LBRP" class="sref">AMR_DSR2_LBRP2/a>                   0x01v12852/a>#define 2a href="+code=AMR_DSR2_RBA" class="sref">AMR_DSR2_RBA2/a>                    0x02v12862/a>#define 2a href="+code=AMR_DSR2_RPLOST" class="sref">AMR_DSR2_RPLOST2/a>                 0x04v12872/a>#define 2a href="+code=AMR_DSR2_LAST_BYTE" class="sref">AMR_DSR2_LAST_BYTE2/a>              0x08v12882/a>#define 2a href="+code=AMR_DSR2_TBE" class="sref">AMR_DSR2_TBE2/a>                    0x10v12892/a>#define 2a href="+code=AMR_DSR2_MARK_IDLE" class="sref">AMR_DSR2_MARK_IDLE2/a>              0x20v12902/a>#define 2a href="+code=AMR_DSR2_FLAG_IDLE" class="sref">AMR_DSR2_FLAG_IDLE2/a>              0x40v12912/a>#define 2a href="+code=AMR_DSR2_SECOND_PKT" class="sref">AMR_DSR2_SECOND_PKT2/a>             0x80v12922/a>v12932/a>#define 2a href="+code=AMR_DER_RABRT" class="sref">AMR_DER_RABRT2/a>                   0x01v12942/a>#define 2a href="+code=AMR_DER_RFRAME" class="sref">AMR_DER_RFRAME2/a>                  0x02v12952/a>#define 2a href="+code=AMR_DER_COLLISION" class="sref">AMR_DER_COLLISION2/a>               0x04v12962/a>#define 2a href="+code=AMR_DER_FCS" class="sref">AMR_DER_FCS2/a>                     0x08v12972/a>#define 2a href="+code=AMR_DER_OVFL" class="sref">AMR_DER_OVFL2/a>                    0x10v12982/a>#define 2a href="+code=AMR_DER_UNFL" class="sref">AMR_DER_UNFL2/a>                    0x20v12992/a>#define 2a href="+code=AMR_DER_OVRN" class="sref">AMR_DER_OVRN2/a>                    0x40v13002/a>#define 2a href="+code=AMR_DER_UNRN" class="sref">AMR_DER_UNRN2/a>                    0x80v13012/a>v13022/a>2spa  class="comment">/* Peripheral Port */2/spa  v13032/a>#define 2a href="+code=AMR_PP_PPCR1" class="sref">AMR_PP_PPCR12/a>                    0xC0v13042/a>#define 2a href="+code=AMR_PP_PPSR" class="sref">AMR_PP_PPSR2/a>                     0xC1v13052/a>#define 2a href="+code=AMR_PP_PPIER" class="sref">AMR_PP_PPIER2/a>                    0xC2v13062/a>#define 2a href="+code=AMR_PP_MTDR" class="sref">AMR_PP_MTDR2/a>                     0xC3v13072/a>#define 2a href="+code=AMR_PP_MRDR" class="sref">AMR_PP_MRDR2/a>                     0xC3v13082/a>#define 2a href="+code=AMR_PP_CITDR0" class="sref">AMR_PP_CITDR02/a>                   0xC4v13092/a>#define 2a href="+code=AMR_PP_CIRDR0" class="sref">AMR_PP_CIRDR02/a>                   0xC4v13102/a>#define 2a href="+code=AMR_PP_CITDR1" class="sref">AMR_PP_CITDR12/a>                   0xC5v13112/a>#define 2a href="+code=AMR_PP_CIRDR1" class="sref">AMR_PP_CIRDR12/a>                   0xC5v13122/a>#define 2a href="+code=AMR_PP_PPCR2" class="sref">AMR_PP_PPCR22/a>                    0xC8v13132/a>#define 2a href="+code=AMR_PP_PPCR3" class="sref">AMR_PP_PPCR32/a>                    0xC9v13142/a>v13152/a>struct 2a href="+code=snd_amd7930" class="sref">snd_amd79302/a> {v13162/a>        2a href="+code=spinlock_t" class="sref">spinlock_t2/a>              2a href="+code=lock" class="sref">lock2/a>;v13172/a>        void 2a href="+code=__iomem" class="sref">__iomem2/a>            *2a href="+code=regs" class="sref">regs2/a>;v13182/a>        2a href="+code=u32" class="sref">u322/a>                     2a href="+code=flags" class="sref">flags2/a>;v13192/a>#define 2a href="+code=AMD7930_FLAG_PLAYBACK" class="sref">AMD7930_FLAG_PLAYBACK2/a>   0x00000001v13202/a>#define 2a href="+code=AMD7930_FLAG_CAPTURE" class="sref">AMD7930_FLAG_CAPTURE2/a>    0x00000002v13212/a>v13222/a>        struct 2a href="+code=amd7930_map" class="sref">amd7930_map2/a>      2a href="+code=map" class="sref">map2/a>;v13232/a>v13242/a>        struct 2a href="+code=snd_card" class="sref">snd_card2/a>         *2a href="+code=card" class="sref">card2/a>;v13252/a>        struct 2a href="+code=snd_pcm" class="sref">snd_pcm2/a>          *2a href="+code=pcm" class="sref">pcm2/a>;v13262/a>        struct 2a href="+code=snd_pcm_substream" class="sref">snd_pcm_substream2/a>        *2a href="+code=playback_substream" class="sref">playback_substream2/a>;v13272/a>        struct 2a href="+code=snd_pcm_substream" class="sref">snd_pcm_substream2/a>        *2a href="+code=capture_substream" class="sref">capture_substream2/a>;v13282/a>v13292/a>        2spa  class="comment">/* Playback/Capture buffer state. */2/spa  v13302/a>        unsigned char           *2a href="+code=p_orig" class="sref">p_orig2/a>, *2a href="+code=p_cur" class="sref">p_cur2/a>;v13312/a>        int                     2a href="+code=p_left" class="sref">p_left2/a>;v13322/a>        unsigned char           *2a href="+code=c_orig" class="sref">c_orig2/a>, *2a href="+code=c_cur" class="sref">c_cur2/a>;v13332/a>        int                     2a href="+code=c_left" class="sref">c_left2/a>;v13342/a>v13352/a>        int                     2a href="+code=rgain" class="sref">rgain2/a>;v13362/a>        int                     2a href="+code=pgain" class="sref">pgain2/a>;v13372/a>        int                     2a href="+code=mgain" class="sref">mgain2/a>;v13382/a>v13392/a>        struct 2a href="+code=platform_device" class="sref">platform_device2/a>  *2a href="+code=op" class="sref">op2/a>;v13402/a>        unsigned int            2a href="+code=irq" class="sref">irq2/a>;v13412/a>        struct 2a href="+code=snd_amd7930" class="sref">snd_amd79302/a>      *2a href="+code=next" class="sref">next2/a>;v13422/a>};v13432/a>v13442/a>static struct 2a href="+code=snd_amd7930" class="sref">snd_amd79302/a> *2a href="+code=amd7930_list" class="sref">amd7930_list2/a>;v13452/a>v13462/a>2spa  class="comment">/* Idle the AMD7930 chip.  The amd->lock is not held.  */2/spa  v13472/a>static 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=amd7930_idle" class="sref">amd7930_idle2/a>(struct 2a href="+code=snd_amd7930" class="sref">snd_amd79302/a> *2a href="+code=amd" class="sref">amd2/a>)v13482/a>{v13492/a>        unsigned long 2a href="+code=flags" class="sref">flags2/a>;v13502/a>v13512/a>        2a href="+code=spin_lock_irqsave" class="sref">spin_lock_irqsave2/a>(&2a href="+code=amd" class="sref">amd2/a>->2a href="+code=lock" class="sref">lock2/a>, 2a href="+code=flags" class="sref">flags2/a>);v13522/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(2a href="+code=AMR_INIT" class="sref">AMR_INIT2/a>, 2a href="+code=amd" class="sref">amd2/a>->2a href="+code=regs" class="sref">regs2/a> + 2a href="+code=AMD7930_CR" class="sref">AMD7930_CR2/a>);v13532/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(0, 2a href="+code=amd" class="sref">amd2/a>->2a href="+code=regs" class="sref">regs2/a> + 2a href="+code=AMD7930_DR" class="sref">AMD7930_DR2/a>);v13542/a>        2a href="+code=spin_unlock_irqrestore" class="sref">spin_unlock_irqrestore2/a>(&2a href="+code=amd" class="sref">amd2/a>->2a href="+code=lock" class="sref">lock2/a>, 2a href="+code=flags" class="sref">flags2/a>);v13552/a>}v13562/a>v13572/a>2spa  class="comment">/* Enable chip interrupts.  The amd->lock is not held.  */2/spa  v13582/a>static 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=amd7930_enable_ints" class="sref">amd7930_enable_ints2/a>(struct 2a href="+code=snd_amd7930" class="sref">snd_amd79302/a> *2a href="+code=amd" class="sref">amd2/a>)v13592/a>{v13602/a>        unsigned long 2a href="+code=flags" class="sref">flags2/a>;v13612/a>v13622/a>        2a href="+code=spin_lock_irqsave" class="sref">spin_lock_irqsave2/a>(&2a href="+code=amd" class="sref">amd2/a>->2a href="+code=lock" class="sref">lock2/a>, 2a href="+code=flags" class="sref">flags2/a>);v13632/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(2a href="+code=AMR_INIT" class="sref">AMR_INIT2/a>, 2a href="+code=amd" class="sref">amd2/a>->2a href="+code=regs" class="sref">regs2/a> + 2a href="+code=AMD7930_CR" class="sref">AMD7930_CR2/a>);v13642/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(2a href="+code=AM_INIT_ACTIVE" class="sref">AM_INIT_ACTIVE2/a>, 2a href="+code=amd" class="sref">amd2/a>->2a href="+code=regs" class="sref">regs2/a> + 2a href="+code=AMD7930_DR" class="sref">AMD7930_DR2/a>);v13652/a>        2a href="+code=spin_unlock_irqrestore" class="sref">spin_unlock_irqrestore2/a>(&2a href="+code=amd" class="sref">amd2/a>->2a href="+code=lock" class="sref">lock2/a>, 2a href="+code=flags" class="sref">flags2/a>);v13662/a>}v13672/a>v13682/a>2spa  class="comment">/* Disable chip interrupts.  The amd->lock is not held.  */2/spa  v13692/a>static 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=amd7930_disable_ints" class="sref">amd7930_disable_ints2/a>(struct 2a href="+code=snd_amd7930" class="sref">snd_amd79302/a> *2a href="+code=amd" class="sref">amd2/a>)v13702/a>{v13712/a>        unsigned long 2a href="+code=flags" class="sref">flags2/a>;v13722/a>v13732/a>        2a href="+code=spin_lock_irqsave" class="sref">spin_lock_irqsave2/a>(&2a href="+code=amd" class="sref">amd2/a>->2a href="+code=lock" class="sref">lock2/a>, 2a href="+code=flags" class="sref">flags2/a>);v13742/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(2a href="+code=AMa href="+code=AMR_INIT" class="sref">AMR_INIT2/a>, 2a href="+code=amd" class="sref">amd2/a>->2a href="+code=regs" class="sref">regs2/a> + 2a href="+code=AMD7930_CR" class="sref">AMD7930_CR2/a>);v12792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v12753/a>#d37e" nam 
 L315">13152/a>struct 2a2a href="+code=AMD7930_DR" class="sref">AMD7930_DR2/a>);v13652/a>        2a href="+code=spin_unlock_irqrestore" class="sref">spin_unlock_irqrestore2/a>(&2a hrL276" cla3s="line" nam 
 L276">12732/a>#3efine ="+code=lock" class="sref">lock2/a>77" class3"line" nam 
 L277">127723a>#de377">13372/a>        int                 " class="3ine" nam 
 L278">12782/a3#defi37   0x72v12792/a3#defi3e 2a h72v *2a ne" nam 
 L280">12802/a>3defin3 2a hr72v12832/a>#3efine ass="coef">spinlock_t2/a>    "line" node=A1" id
 L321" class=  "line" node=A1" i"line" nam 
 L369">13692/a>static 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=amd7930_disable_ints" class="sref">a class="l3ne" nam 
 L282">12822/a>3defin3 2a hrnd_amd7930" class="sref">snd_amd793s="sref">3MR_DSR1_CXMT_ABRT2/a>   3     38ap2/a>;v__inline__2"sound/sparc/amd7930.c#L3 = href="sound/sparc/amd7930.c#L365" id
 L365" class="line" nam 
 L3"sound/sparc/amd7930.c#L322" id
 L322" class="line" nam 
 L3L284" cla3s="line" nam 
 L284">12832/a>#38lass="sref">snd_amd79302/a> *2a href="+ L285" cl3ss="line" nam 
 L285">12352/a>38e" nam 
 L315">13152/a>structf">lock2/a>, 2a href="+code=flags" class="sref">flags2/a>);vR2/aG="sref">AMR_MAP_STRF2/a>GX0.c#L374" id
 L374" class="line" nam 
 L374">13742/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(2a href="+code=AMa href="+code=AMR_INIT" class="sref">AMR_INIT2/a>, 86" class3"line" nam 
 L286">128623a>#de387" nam 
 L315">13152/a>structf">lock2/a>, 2a href="+code=flags" class=(="sref">flags2/a"sound/sparc/amd7930.c#L33742/a>        2a hrgxund/sparc/amd79gx" nam742/742/ 0) href=rc/af)AMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v12872/a>3defin38_iomem" class="sref">__iomemtf">lock2/a>, 2a href="+code=flags" class=(="sref">flags2/a"sound/sparc/amd7930.c#L33742/a>        2a hrgxund/sparc/amd79gx" nam742/742/ 8) href=rc/af)AMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v12382/a>3defineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DMR class="l3ne" nam 
 L289">12892/a>3defin390" nam 
 L315">13152/a>structf">lock2/a>, 2a href="+code=flags" class="sref">flags2/a>);vR2/aGss="sref">AMR_PP_MTDR2/aGs0.c#L374" id
 L374" class="line" nam 
 L374">13742/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(2a href="+code=AMa href="+code=AMR_INIT" class="sref">AMR_INIT2/a>,  class="l3ne" nam 
 L290">12902/a>3defin39gs2/a>;vlock2/a>, 2a href="+code=flags" class=(="sref">flags2/a"sound/sparc/amd7930.c#L33742/a>        2a hrgarc/amd7930.c#L3gr" nam742/742/ 0) href=rc/af)AMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v12912/a>#3efine39 href="+code=lock" class="sref">lock2/a>, 2a href="+code=flags" class=(="sref">flags2/a"sound/sparc/amd7930.c#L33742/a>        2a hrgarc/amd7930.c#L3gr" nam742/742/ 8) href=rc/af)AMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v3MR_DSR2_SECOND_PKT2/a>  3     392/a>;v12932/a>#39 href="+code=lock" class="sref">lock2/a>, 2a href="+code=flags" class="sref">flags2/a>);vR2/aSTGss="sref">AMR_PP_MTDR2/aSTGs0.c#L374" id
 L374" class="line" nam 
 L374">13742/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(2a href="+code=AMa href="+code=AMR_INIT" class="sref">AMR_INIT2/a>,  284" cla3="line" nam 
 L294">12943/a>#d39gt;2a href="+code=regs" class="sref">regs2/a> + 2a href="+code=AMD7930(="sref">flags2/a"sound/sparc/amd7930.c#L33742/a>        2a hrstgarc/amd7930.c#L3stga" nam742/742/ 0) href=rc/af)AMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v12952/a3#defi39e" nam 
 L315">13152/a>structf">lock2/a>, 2a href="+code=flags" class=(="sref">flags2/a"sound/sparc/amd7930.c#L33742/a>        2a hrstgarc/amd7930.c#L3stga" nam742/742/ 8) href=rc/af)AMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v13962/a392/a>);v12372/a>39_iomem" class="sref">__iomemtf">lock2/a>, 2a href="+code=flags" class="sref">flags2/a>);vR2/aGss="sref">AMR_PP_PPSRR2/aGss0.c#L374" id
 L374" class="line" nam 
 L374">13742/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(2a href="+code=AMa href="+code=AMR_INIT" class="sref">AMR_INIT2/a>,   class="3ss="line" nam 
 L298">12382/a>399" nam 
 L315">13152/a>structf">lock2/a>, 2a href="+code=flags" class=(="sref">flags2/a"sound/sparc/amd7930.c#L33742/a>        2a hrgearc/amd7930.c#L3gea" nam742/742/ 0) href=rc/af)AMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v12492/a>400" nam 
 L315">13152/a>structf">lock2/a>, 2a href="+code=flags" class=(="sref">flags2/a"sound/sparc/amd7930.c#L33742/a>        2a hrgearc/amd7930.c#L3gea" nam742/742/ 8) href=rc/af)AMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v13402/a>4define 2a href="+code=AMR_DER_UNRN" cla4s="sref">4MR_DER_UNRN2/a>         4     40 href="+code=lock" class="sref">lock2/a>, 2a href="+code=flags" class="sref">flags2/a>);vR2/aMMs="sref">AMR_PP_CITDRR2/aMMs=0.c#L374" id
 L374" class="line" nam 
 L374">13742/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(2a href="+code=AMa href="+code=AMR_INIT" class="sref">AMR_INIT2/a>,4lock2/a>, 2a href="+code=flags" class="sref">flags2/a"sound/sparc/amd7930.c#L33742/a>        2a hrmmr="sref">AMR_PP_Cmmr=ode=AMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v13432/a>40>13332/a>        int                  4
 L304" c4ass="line" nam 
 L304">14042/a40gt;2a href="+code=regs" class="sref">regs2/a> + 2a href="+code=AMD7930_CR" class="sref"DRR2/aMMss="sref">AMR_PP_CIRDR2/aMMss0.c#L374" id
 L374" class="line" nam 
 L374">13742/a>        2a href="+code=sbus_writeb" class="sref">sbus_writeb2/a>(2a href="+code=AMa href="+code=AMR_INIT" class="sref">AMR_INIT2/a>,4<6L304" c4ane" nam 
 L295">12952/a452/a>40e" nam 
 L315">13152/a>structf">lock2/a>, 2a href="+code=flags" class="sref">flags2/a"sound/sparc/amd7930.c#L33742/a>        2a hrmmrs="sref">AMR_PP_mmrsode=AMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v14062/a40fine ="+code=lock" class="sref">lock2/a4
 L307" c4ass="line" nam 
 L307">14072/a407">13372/a>        int                4L308" cla4s="line" nam 
 L308">13042/a>#40   0x72v13042/a>#41 2a h72v13142/a>#412a hr72v4s="line" nam 
 L311">13142/a>#41   0x80v13422/a>4define72v13432/a>4122/a>};v__uLC2a hr="+code=regs" cgxmcoeffund/sparc/amd79gxmcoeff2a h[ 2a] =nam 
 L314">13142/a>v4MR_PP_PPCR32/a>         4     4BLE2/a>       href08,a hrb7c,a hrb51,a hrb45,a hrb42,a hrb3b,a hrb36,a hrb33,m 
 L314">13142/a>v13142/a>v        2a href="+code=4pinlo4k_t" class="sra hr22,a hrb1a,a hraa3,a hraa3,a hrb1c,a hraa6,a hhr2d,a hhr2b,m 
 L314">13142/a>v        void 2a href=4+code4__iomem" class hraab,a hrb12,a hraaa,a hrab2,a hhr32,a hrab4,a hhr3c,a hrabb,m 
 L314">13142/a>v        2a href="+4ode=u419t" class="sra hr42,a hhr44,a hhr51,a hrad5,a hraeb,a hra79,a hra5a,a hra4a,m 
 L314">13142/a>v13192/a>#4efine420" nam 
 L315 hrb03,a hhrc2,a hhrbb,a hra3f,a hra33,a hhrb2,a hh212,a hh213,m 
 L314">13142/a>v13202/a>4defin421iomem" class hra2c,a hh21d,a hra23,a hh21a,a hh222,a hh223,a hh22d,a hh231,m 
 L314">13142/a>v4>AMD7930_FLAG_CAPTURE2/a4    0400000002v13142/a>v        struct 2a href4"+cod423000002v13142/a>v;v13142/a>v4a>        struct 2a href4"+cod42LE2/a>       hrebde,a hhb33,a hhb22,a h9b1d,a h9ab2,a har42,a ha1e5,a h9a3b,m 
 L314">13142/a>v13452/a>        struct 2a h4ef="+42e" nam 
 L315 ha213,a ha1a2,a ha231,a ha2eb,a ha313,a ha334,a ha421,a ha54b,m 
 L314">13142/a>vsnd_p4m_sub42_t" class="sra ada4,a hac23,a hab3b,a haaab,a haa5c,a hb1a3,a hb2ca,a hb3bd,m 
 L314">13142/a>vsnd4pcm_s42_iomem" class hbe24,a hbb2b,a hba33,a hc32b,a hcb5a,a hd2a2,a he31d,a h0808,m 
 L314">13142/a>vcapture4subst429t" class="sra 72ba,a h62c2,a h5c32,a h52db,a h513e,a h4cce,a h43b2,a h4ma3,m 
 L314">13142/a>v13142/a>v13142/a>v13142/a>v13142/a>v;v13142/a>v4"+code=c_left" class="sr4f">c_43LE2/a>       hr1315,a hr2bc,a h127a,r h1235,a hr226,a h11a2,a h1216,a h0a2a,m 
 L314">13142/a>v13142/a>v13142/a>v13142/a>vm439t" class="sra 0322,a h031c,a h02aa,a h02ba,a h02f2,a h0242,a h0232,a h0227,m 
 L314">13142/a>v13142/a>v13142/a>v13142/a>vne443000002v13142/a>v1444000002v13142/a>v13142/a>vam47930_446000002v13142/a>v14462/a42spa  930" class="sref">snd_amd79302/a>  4"sref">am47930_idle2/a>(struct 2a 4ref="447">13372/a>        int                402/a> *2a4href="+code=amd" class="4ref">44a  class="comment">/* Disableconstinterrupts.  The amconstin2a hr="+code=regs" c__uLC_DMR4_RCV_82/a>__uLC2a hr="+code=regs" cgermcoeffund/sparc/amd79germcoeff2a h[] =nam 
 L314">13142/a>vf451iomem" class h331f,a72vamd2/a4->452iomem" class h40dd,a72vamd2/a>->2a hr4f="+c453000002vamd2/a>->2a hr4f="+c454000002vamd2/a4->455" nam 
 L315 h411f,a72vfla456iomem" class h311f,a72v45_t" class="sra 5520,a72vam4ss="line" nam 
 L357">13472/a>45_iomem" class h10dd,a72v *2a4able_ints2/a>(struct 2a 4ref="459t" class="sra 4211,a72v *2a4href="+code=amd" class="4ref">460" nam 
 L315 h410f,a72vf462iomem" class h600b,a72vamd2/a4->463000002vamd2/a>->2a hr4f="+c464000002vamd2/a>->2a hr4f="+c46LE2/a>       hr110f,a72vamd2/a4->466iomem" class h7200,a72vfla46_t" class="sra 2110,a72v46_iomem" class h2200,a72v *2a4s="line" nam 
 L368">13642/a>2469t" class="sra 000b,a72v(struct 2a 4ref="470" nam 
 L315 h000fhref="sound/sparc/amd7930.c18. dB *v *2a4href="+code=amd" class="4ref">4md2/a>930" class="sref">snd_amd79302/a>  4arc/amd7940.c#L371" id
 L371" clas4="lin4" nam 
 L371">13712/a>        unsigned 4ong 2a hr4f="+code=flags" class="s4ef">f47efine72vamd2/a4->4a href72va4d2/a>4>2a72v12754/a>#d47e" naass="coef">spinlock_t2/a>    "line" nupdate1" id
 L321" class=  "line" nupdate1" ilass=" nam 
 L369">13692/a>static 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=amd7930_disable_ints" class="sref">4L276" cla4s="line" nam 
 L276">12742/a>#4efine am 
 L314">13142/a>v127724a>#de47_iomem" classef="sound/sparc/amd7930.c#L321" id
 L321" class="line" nam 
 L32ref">__inline__2"sound/sparc/amd7930.c#L3 = href="sound/sparc/amd7930.c#L365" id
 L365" class="line" nam 
 L3"sound/sparc/amd7930.c#L322" id
 L322" class="line" nam 
 L4" class="4ine" nam 
 L278">12782/a4#defi479t" class="srref""line" nam 
 L3levelund/sparc/amd79levelc#L322" id
 L322" class="line" nam 
 L4" class="4ine" nam 
 L279">12792/a4#defi48 nam 
 L349">13492/a>        unsigned 4"2/a> *2a4ne" nam 
 L280">12802/a>4defin48gs2/a>;v        2a hrgxund/sparc/amd79gx" nam=r="+code=regs" cgxmcoeffund/sparc/amd79gxmcoeff2a h[R_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define " class="line" nam 
 L334">1]22" id
 L322" class="line" nam 
 L4"rc/amd794s="line" nam 
 L281">12842/a>#48 href="+code=lock" class="sr"sound/sparc/amd7930.c#L33742/a>        2a hrstgarc/amd7930.c#L3stga" nam=r="+code=regs" cgxmcoeffund/sparc/amd79gxmcoeff2a h[R_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define+code=pgain" class="sref">pga]22" id
 L322" class="line" nam 
 L4"ng 2a hr4ne" nam 
 L282">12822/a>4defin48 href="+code=lock" class="srlevelund/sparc/amd79levelc#L3m=r="sref">flags2/a2" class="dp75" id
 L312792/a>#define+code=rgain" class="sref">rga *c( 2a ef="+code=regs" clRRAY_SIZEhref="sound/stdsRRAY_SIZElass="sref">flags2/agermcoeffund/sparc/amd79germcoeff2a h)))m742/742/ 822" id
 L322" class="line" nam 
 L4"f="+code4MR_DSR1_CXMT_ABRT2/a>   4     48ap2/a>;vflags2/alevelund/sparc/amd79levelc#L3m742/=  2a)nam 
 L314">13142/a>v12842/a>#48LE2/a>       >;v        2a hrgearc/amd7930.c#L3gea" nam=r="+code=regs" cgermcoeffund/sparc/amd79germcoeff2a h["sref">flags2/alevelund/sparc/amd79levelc#L3m-  2a]22" id
 L322" class="line" nam 
 L4"_TBE_INb4ss="line" nam 
 L285">12452/a>48e" nam 
 L315>;v        2a hrgarc/amd7930.c#L3gr" nam=r="+code=regs" cgxmcoeffund/sparc/amd79gxmcoeff2a h[255]22" id
 L322" class="line" nam 
 L4"276" cla4"line" nam 
 L286">128624a>#de487" nam 
 L315} elsenam 
 L314">13142/a>v12872/a>4defin48_iomem" class>;v        2a hrgearc/amd7930.c#L3gea" nam=r="+code=regs" cgermcoeffund/sparc/amd79germcoeff2a h[0]22" id
 L322" class="line" nam 
 L4" class="4ss="line" nam 
 L288">12482/a>489" nam 
 L315>;v        2a hrgarc/amd7930.c#L3gr" nam=r="+code=regs" cgxmcoeffund/sparc/amd79gxmcoeff2a h["sref">flags2/alevelund/sparc/amd79levelc#L3]22" id
 L322" class="line" nam 
 L4 class="l4ne" nam 
 L289">12892/a>4defin490" nam 
 L315="+code=lock" class="sref">lock2/a4 class="l4ne" nam 
 L290">12902/a>4defin49gs2/a>;v__inline__2/a> void 2a href="+code=am22" id
 L322" class="line" nam 
 L4 rc/amd794e" nam 
 L291">12912/a>#4efine49 href="+code=lock" class="sref">lock2/a4 ng 2a hr4MR_DSR2_SECOND_PKT2/a>  4     492/a>;v12942/a>#4922/a>};vsref">__inline__2dev_i> void 2a href="dev_i>de=amd7930_disable_ints" class="sref">4 284" cla4="line" nam 
 L294">12944/a>#d49gt;2aam 
 L314">13142/a>v12952/a4#defi49de=snd_pcm" class="sref">snd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" cdev_i> void 2a href="dev_i>de=a22" id
 L322" class="line" nam 
 L4 276" cla4ass="line" nam 
 L296">14962/a497" nam 
 L315 class="sref"="+code=regs" celapse> void 2a href="elapse>de=a22" id
 L322" class="line" nam 
 L4 7" class4ss="line" nam 
 L297">12472/a>49_iomem" class="sref">__iomemu8 void 2a href="u82a hr="+code=regs" ciarc/amd7930.c#L3iid
 L332" class="line" nam 
 L332">13324  class="4ss="line" nam 
 L298">12482/a>49efineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM5 L299" cl5ss="line" nam 
 L299">12592/a>500" nam 
 L315">13152/a>struct"line" nref="+code=__inl"line" n"linehref="sound/sparc/amd7930.c#L365" id
 L365" class="line" nam 
 L365">13652/a>        2a hrefm22" id
 L322" class="line" nam 
 L5 L300" cl5ss="line" nam 
 L300">13502/a>5define 2a href="+code=AMR_DER_UNRN" cla5s="sref">5MR_DER_UNRN2/a>         5     50 href="+code=lock" class="srelapse> void 2a href="elapse>de=am=r022" id
 L322" class="line" nam 
 L5 3"sref">5MR_DSR2_SECOND_PKT2/a>  5" id
502/a>;v13532/a>50 href="+code=lock" class="sriarc/amd7930.c#L3iid
 Lm=r="+code=regs" cde=flreada>, 2a href="+code=flreada"lineef">__inline__2/a> void 2a href="+code=ahr9">12792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5I href="sound/stds2/a>;v15042/a50gt;2a href="+ifr="sref">flags2/aiarc/amd7930.c#L3iid
 Lmhref=r="+code=regs" claR13142/a>v12952/a552/a>50e" nam 
 L315>;v13325 7L304" c5ass="line" nam 
 L296">15062/a502/a>);v15072/a50_iomem" class>;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#defineck_irqrestore" class="sref">smhref=r="+code=regs" cla/a>;v;v13142/a>v1252/a>#509" nam 
 L315>;v;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#definep_lef6ref="+code=__inp_lef6c#L3m742/ 0) am 
 L314">13142/a>v13052/a>#510" nam 
 L315>;v;v;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#definep_cuarc/amd7930.c#L3p_cuade=a++3_DMR3_TBE_INT" cSde=AMR_DLCDLo3_DM5LL300" cl5s="line" nam 
 L310">13152/a>#511" nam 
 L315>;v;v;v12792/a>#definep_lef6ref="+code=__inp_lef6c#L3--_DMR3_TBE_INT" cSde=AMR_DLCDLo3_DM5L="sref">5s="line" nam 
 L311">13152/a>#512" nam 
 L315>;v;v;vlock2/a>, 2a href="+code=flags" class="sref">flags2/abyte void 2a href="byted
 LAMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5BBTBhref="sound/stds2/a>;v13522/a>513" nam 
 L315>;v;v;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#definep_lef6ref="+code=__inp_lef6c#L3m==r0md7930_disable_ints" class="sref">5 L313" cl5ss="line" nam 
 L313">13532/a>514" nam 
 L315>;v;v;v;vde=am|=r="+code=regs" cla/a>;v;v         5     51LE2/a>       >;v;v;v;vlock2/a>, 2a href="+code=flags" class=">AMD7930_CR2/a>);v13532/a>        2a href="BBTBhref="sound/stds2/a>;v        2a href="+code=5pinlo5k_t" class="srrrrrrrrr} elserifr="sref">flags2/a/a> void 2a href="+code=ahr9">12792/a>#defineck_irqrestore" class="sref">smhref=r="+code=regs" cla/a>;v;v13142/a>v        void 2a href=5+code51_iomem" class>;v;v, 2a href="+code=flreada"lineef">__inline__2/a> void 2a href="+code=ahr9">12792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5BBRBhref="sound/stds2/a>;v        2a href="+5ode=u519" nam 
 L315>;v;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#definec_lef6ref="+code=__inc_lef6c#L3m742/ 0) am 
 L314">13142/a>v13192/a>#5efine520" nam 
 L315>;v;v;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#definec_cuarc/amd7930.c#L3c_cuade=a++3m=r="+code=regs" cbyte void 2a href="byted
 L332" class="line" nam 
 L332">13325 class="l5ne" nam 
 L320">13202/a>5defin521" nam 
 L315>;v;v;v12792/a>#definec_lef6ref="+code=__inc_lef6c#L3--_DMR3_TBE_INT" cSde=AMR_DLCDLo3_DM5 ="sref">5>AMD7930_FLAG_CAPTURE2/a5    0522" nam 
 L315>;v;v;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#definec_lef6ref="+code=__inc_lef6c#L3m==r0md7930_disable_ints" class="sref">5 L312" cl5a>        struct 2a href5"+cod523" nam 
 L315>;v;v;v;vde=am|=r="+code=regs" cla/a>;v;v;v;vlock2/a5c="sref">5a>        struct 2a href5"+cod52LE2/a>       >;vlock2/a5c6L304" c552/a>        struct 2a h5ef="+52e" nam 
 L315="+code=lock" class="sref">lock2/a5c7L304" c5ream" class="sref">snd_p5m_sub527" nam 
 L315">13152/a>structsref">AMD7ref="+code=__inl"lin">AMD7"linehref="sound/sparc/amd7930.c#L365" id
 L365" class="line" nam 
 L365">13652/a>        2a hrefm22" id
 L322" class="line" nam 
 L5  L307" c5stream" class="sref">snd5pcm_s527">13372/a>        int                5 308" cla5am" class="sref">capture5subst529t" class="srifr="sref">flags2/aelapse> void 2a href="elapse>de=amhref=r="+code=regs" cla/a>;v;v        int                5d7930.c#L529" id
 L329" class="lin5" nam530" nam 
 L315>;vsnd_pcm2/a>   pcm_period_elapse> void 2a href=">   pcm_period_elapse>"lineef">__inline__2/a> void 2a href="+code=ahr9">12792/a>#defineplayback_substreamref="+code=__inplayback_substreamhrefm22" id
 L322" class="line" nam 
 L5/a>      5 unsigned char          5*2a h531iomem" classelseDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM5c#L331" i5
 L331" class="line" nam5
 L33532" nam 
 L315>;vsnd_pcm2/a>   pcm_period_elapse> void 2a href=">   pcm_period_elapse>"lineef">__inline__2/a> void 2a href="+code=ahr9">12792/a>#definecapture_substreamref="+code=__incapture_substreamhrefm22" id
 L322" class="line" nam 
 L5/L312" cl5 unsigned char          5*2a h532/a>;v;vsnd_pcm2/aIRQ_HANDLEDref="+code=__inIRQ_HANDLED_DLo_DMR3_TBE_INT" cSde=AMR_DLCDLo3_DM5/="sref">5"+code=c_left" class="sr5f">c_53LE2/a="+code=lock" class="sref">lock2/a50.c#L335"5id
 L335" class="line" n5m 
 L53e" na"+code=lock" class="sref">lock2/a507L304" c5id
 L336" class="line" n5m 
 L53_t" c};vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=a,5 class="sref"="+code=regs" c="srqrestore" class="srde=a,5ref"="+code=regs" cca> void 2a href="ccode=amd7930_disable_ints" class="sref">50.c#L337"5id
 L337" class="line" n5m 
 L53_iomeam 
 L314">13142/a>vm539t" class="srf="sound/sparc/amd7930.c#L370" id
 L370" class="line" nam 
 L370">13702/a>{va>      540" id
 L340" class="lin5" nam54efine 2a href="+code=AMR_DER_UNRN" cla5>#L331" i5       struct 2a href="+5ode=s54 href="+code=lock" class="sr/amd7930.c#L372" id
 L372" class="line" nam 
 L372">13722/a>v13732/a>        2a href="+code=spin_lock_irqsave" class="sref">spin_lock_irqsave2/a>(&2a h5   *2a hr5f="+code=next" class="sr5f">ne543000002vflags2/aca> void 2a href="ccode=am==r"sref">flags2/aSNDRV_PCM_TRIGGER_STARhref="sound/sparSNDRV_PCM_TRIGGER_STARh_DLo3nam 
 L314">13142/a>v1544" nam 
 L315>;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#defineck_irqrestore" class="sref">smhref=r="+code=regs" c="srqrestore" class="srde=a)3nam 
 L314">13142/a>v5ct 2a href="+code=snd_am57930"54LE2/a>       >;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#defineck_irqrestore" class="sref">sm|=r="+code=regs" c="srqrestore" class="srde=af">spin_lock_irqsave2/a>(&2a h5 .c#L335"530_list" class="sref">am57930_54e" na"+code=lock" class="sref">lock2/a5t7L304" c5ass="line" nam 
 L346">15462/a54_t" class="srrrrrrrrrrrrrrrrr"2vam57930_idle2/a>(struct 2a 5ref="54_iomem" class>;v;vregs2/a> + 2a href="+code=AMD7930_CR" class="sref"DRRUX_MCR4gs2/a> + 2a href"DRRUX_MCR4d
 LAMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="+code=AMa href="+code=AMR_INIT" class="sref">AMR_INIT2/a>,502/a> *2a5href="+code=amd" class="5ref">549" nam 
 L315>;v;vregs2/a> + 2a href="+code=AMD7930_CR" class="sref"RRUX_MCR4_ENABLE_INTShref="+code=AMa hRRUX_MCR4_ENABLE_INTSd
 LAMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="sound/stds2/a>;v;vlock2/a5ong 2a hr5f="+code=flags" class="s5ef">f551iomem" class} elserifr="sref">flags2/aca> void 2a href="ccode=am==r"sref">flags2/aSNDRV_PCM_TRIGGER_STOPref="sound/sparSNDRV_PCM_TRIGGER_STOP_DLo3nam 
 L314">13142/a>vamd2/a5->552" nam 
 L315>;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#defineck_irqrestore" class="sref">smhref=r="+code=regs" c="srqrestore" class="srde=a)nam 
 L314">13142/a>vamd2/a>->2a hr5f="+c553" nam 
 L315>;v;vflags2/a/a> void 2a href="+code=ahr9">12792/a>#defineck_irqrestore" class="sref">smhref== ~="+code=regs" c="srqrestore" class="srde=af">spin_lock_irqsave2/a>(&2a h5o2" id
 L5"sref">amd2/a>->2a hr5f="+c55>13332/a>        int                  5oatic str5amd" class="sref">amd2/a5->55LE2/a>       >;vfla55e" nam 
 L315>;v;vregs2/a> + 2a href="+code=AMD7930_CR" class="sref"DRRUX_MCR4gs2/a> + 2a href"DRRUX_MCR4d
 LAMR_DLC_DMR4_RCV_2" class="dp75" id
 L312792/a>#define 2a h12792/a>#2/a>->2a href="+code=regs" class="s5a href="+code=AMa href="+codDLo3_DMR3_TBE_INT" cSde=AMR_DLCDLo3_DM5a7L304" c5355" class="line" nam 
 5355">55_t" class="srrrrrrrrrrrrrrrrr"f="sound/sparctf">lock2/a>, 2a href="+code=flags" class=">AMD7930_CR2/a>);v13532/a>        2a href="a href="sound/stds2/a>;vam5ss="line" nam 
 L357">13572/a>55_iomem" class>;vlock2/a5o2/a> *2a5able_ints2/a>(struct 2a 5ref="559t" class="sr} elsenam 
 L314">13142/a>v560" nam 
 L315>;vsnd_pcm2/aresul6ref="+code=__inresul6de=am=r-ref">snd_pcm2/aEINVALref="+code=__inEINVALde=af">spin_lock_irqsave2/a>(&2a h5arc/amd7950.c#L360" id
 L360" clas5="lin561000002vlock2/a50#L331" i5f="+code=flags" class="s5ef">f56 href="+code=lock" class="sr/amd7">AMD7_30_DRstor id
 L372" class="lin">AMD7_30_DRstor 2">13722/a>v13732/a>        2a href="+code=spin_lock_irqsave" class="sref">spin_lock_irqsave2/a>(&2a h5a  *2a hr5amd" class="sref">amd2/a5->562/a>;vamd2/a>->2a hr5f="+c56ap2/a>;vsnd_pcm2/aresul6ref="+code=__inresul6de=af">spin_lock_irqsave2/a>(&2a h5aatic str5"sref">amd2/a>->2a hr5f="+c56LE2/a="+code=lock" class="sref">lock2/a5a.c#L335"5amd" class="sref">amd2/a5->56e" na"+code=lock" class="sref">lock2/a5a7L304" c5"+code=flags" class="sre5">fla56_t" c};vsnd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss=",m 
 L314">13142/a>v56_iomem" class>;v;v void 2a href="ccode=amd7930_disable_ints" class="sref">532/a> *2a5s="line" nam 
 L368">13652/a>2569t" cam 
 L314">13142/a>vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   pcm_substream_chiid
 L321" class=>   pcm_substream_chiiD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spin_lock_irqsave2/a>(&2a h502/a> *2a5href="+code=amd" class="5ref">571p2/a>;vsnd_pcm2/aline__" cla_triggearc/amd7930.c#L3line__" cla_triggea"lineef">__inline__2/a> void 2a href="+code=a,5="+code=regs" cla/a>;v;v void 2a href="ccode=amf">spin_lock_irqsave2/a>(&2a h50#L331" i50.c#L371" id
 L371" clas5="lin57 href="+code=lock" class="sref">lock2/a5ong 2a hr5f="+code=flags" class="s5ef">f572/a>;vamd2/a5->574t" c};vsnd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss=",m 
 L314">13142/a>va5d2/a>57LE2/a>       >;v void 2a href="ccode=amd7930_disable_ints" class="sref">53_TBE_INb5="line" nam 
 L275">12755/a>#d57e" naam 
 L314">13142/a>v12752/a>#577" nam 
 L315lass="sref">snd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   pcm_substream_chiid
 L321" class=>   pcm_substream_chiiD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spi314">13142/a>v127725a>#de57_iomem" classDRturnrref">snd_pcm2/aline__" cla_triggearc/amd7930.c#L3line__" cla_triggea"lineef">__inline__2/a> void 2a href="+code=a,5="+code=regs" cla/a>;v;v void 2a href="ccode=amf">spin_lock_irqsave2/a>(&2a h502/a> *2a5ine" nam 
 L278">12782/a5#defi579t" c="+code=lock" class="sref">lock2/a5" class="5ine" nam 
 L279">12792/a5#defi58 nam 
 L349">13492/a>        unsigned 5"2/a> *2a5ne" nam 
 L280">12802/a>5defin58gs2/a};vsnd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss="md7930_disable_ints" class="sref">5"rc/amd795s="line" nam 
 L281">12852/a>#58 hrefam 
 L314">13142/a>v12822/a>5defin58 href="+code=lass="sref">snd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   pcm_substream_chiid
 L321" class=>   pcm_substream_chiiD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spi314">13142/a>vsnd_pcm2/a>   pcm_runtim id
 L372" class=inepcm_runtim ss="sref">__inline__2runtim id
 L372" classruntim ss="s=r="+code=regs" c>ubstreamref="+code=__in>ubstreamss="7930.c#L353" id
 L353untim id
 L372" classruntim ss="f">spi314">13142/a>v12852/a>#58LE2/a>        class="sref"="+code=regs" csiz id
 L372" class=iz de=am=r="+code=regs" c>   pcm_lib_buffer_byten_lock_irqsave" >   pcm_lib_buffer_bytenD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spi314">13142/a>v12552/a>58e" nam 
 L315f="sound/sparc/amd7930.c#L370" id
 L370" class="line" nam 
 L370">13702/a>{v128625a>#de587" nam 
 L315">13152/a>strucu8 void 2a href="u82a hr="+code=regs" cnew_mmr1 void 2a href="new_mmr1nam 
 L370">13702/a>{v12872/a>5defin587">13372/a>        int                5" class="5ss="line" nam 
 L288">12582/a>589" nam 
 L315lock" class="sr/amd7930.c#L372" id
 L372" class="line" nam 
 L372">13722/a>v13732/a>        2a href="+code=spin_lock_irqsave" class="sref">spin_lock_irqsave2/a>(&2a h5 class="l5ne" nam 
 L289">12892/a>5defin59 nam 
 L349">13492/a>        unsigned 5 class="l5ne" nam 
 L290">12902/a>5defin59gs2/a>;v12792/a>#defineck_irqrestore" class="sref">sm|=r="+code=regs" cla/a>;v;v12912/a>#5efine59 nam 
 L371">13712/a>        unsigned 5 ng 2a hr5MR_DSR2_SECOND_PKT2/a>  5     59 href="+code=l2v12952/a>#59 href="+code=lock" class="sr/a> void 2a href="+code=ahr9">12792/a>#definep_orig void 2a href="p_origde=am=r="+code=regs" c/a> void 2a href="+code=ahr9">12792/a>#definep_cuarc/amd7930.c#L3p_cuade=am=r="+code=regs" c3untim id
 L372" classruntim ss="hr9">12792/a>#definedma_   aid
 L372" classdma_   a_DLo_DMR3_TBE_INT" cSde=AMR_DLCDLo3_DM5 a href="5="line" nam 
 L294">12945/a>#d595href="+code=lock" class="sr/a> void 2a href="+code=ahr9">12792/a>#definep_lef6ref="+code=__inp_lef6c#L3m="="+code=regs" csiz id
 L372" class=iz de=a_DMR3_TBE_INT" cSde=AMR_DLCDLo3_DM5 _TBE_INb5ine" nam 
 L295">12952/a5#defi59e" na"+code=lock" class="sref">lock2/a5 276" cla5ass="line" nam 
 L296">15962/a597" nam 
 L315l2v12572/a>59_iomem" class="sref">__iomemnew_mmr1 void 2a href="new_mmr1nam m=r="+code=regs" c/a> void 2a href="+code=ahr9">12792/a>#define"sound/sparc/amd7930.c#L3.12792/a>#define"mr1 void 2a href="mmr1nam 
 L370">13702/a>{v12582/a>599t" class="srifr="sref">flags2/a3untim id
 L372" classruntim ss="hr9">12792/a>#defineformatqrestore" class=ormatnam m==r"sref">flags2/aSNDRV_PCM_FORMAT_A_LAWqrestore" classSNDRV_PCM_FORMAT_A_LAWss="md7930_disable_ints" class="sref">6 L299" cl6ss="line" nam 
 L299">12692/a>600" nam 
 L315>;vsnd_pcm2/anew_mmr1 void 2a href="new_mmr1nam m|=r="+code=regs" cla_MAP_MMR1_ALAWqrestore" classla_MAP_MMR1_ALAWnam 
 L370">13702/a>{v13602/a>601iomem" classelseDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM6s="sref">6MR_DER_UNRN2/a>         6     602" nam 
 L315>;vsnd_pcm2/anew_mmr1 void 2a href="new_mmr1nam mhref== ~="+code=regs" cla_MAP_MMR1_ALAWqrestore" classla_MAP_MMR1_ALAWnam 
 L370">13702/a>{v6MR_DSR2_SECOND_PKT2/a>  6" id
603000002vflags2/anew_mmr1 void 2a href="new_mmr1nam m!=r="+code=regs" c/a> void 2a href="+code=ahr9">12792/a>#define"sound/sparc/amd7930.c#L3.12792/a>#define"mr1 void 2a href="mmr1nam )nam 
 L314">13142/a>v13632/a>60 href="+code=="+code=lock" class="sr/a> void 2a href="+code=ahr9">12792/a>#define"sound/sparc/amd7930.c#L3.12792/a>#define"mr1 void 2a href="mmr1nam m=r="+code=regs" cnew_mmr1 void 2a href="new_mmr1nam 
 L370">13702/a>{v16042/a60LE2/a>       >;vspin_lock_irqsave2/a>(&2a h6<6L304" c6ane" nam 
 L295">12952/a652/a>60e" nam 
 L315="+code=lock" class="sref">lock2/a6 7L304" c6ass="line" nam 
 L296">16062/a602/a>);v16072/a60_iomem" class="sref">__iomem/amd7">AMD7_30_DRstor id
 L372" class="lin">AMD7_30_DRstor 2">13722/a>v13732/a>        2a href="+code=spin_lock_irqsave" class="sref">spin_lock_irqsave2/a>(&2a h6<9L307" c6as="line" nam 
 L298">1262/a>#60efineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM6L309" cla6s="line" nam 
 L309">13062/a>#610" nam 
 L315DRturnr022" id
 L322" class="line" nam 
 L6LL300" cl6s="line" nam 
 L310">13162/a>#611" na="+code=lock" class="sref">lock2/a6L="sref">6s="line" nam 
 L311">13162/a>#61 nam 
 L371">13712/a>        unsigned 6 L312" cl6ss="line" nam 
 L312">13622/a>613" na};vsnd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss="md7930_disable_ints" class="sref">6 L313" cl6ss="line" nam 
 L313">13632/a>614" naam 
 L314">13142/a>v         6     61LE2/a>       lass="sref">snd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   pcm_substream_chiid
 L321" class=>   pcm_substream_chiiD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spi314">13142/a>vsnd_pcm2/a>   pcm_runtim id
 L372" class=inepcm_runtim ss="sref">__inline__2runtim id
 L372" classruntim ss="s=r="+code=regs" c>ubstreamref="+code=__in>ubstreamss="7930.c#L353" id
 L353untim id
 L372" classruntim ss="f">spi314">13142/a>v        2a href="+code=6pinlo617" nam 
 L315 class="sref"="+code=regs" csiz id
 L372" class=iz de=am=r="+code=regs" c>   pcm_lib_buffer_byten_lock_irqsave" >   pcm_lib_buffer_bytenD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spi314">13142/a>v        void 2a href=6+code61_iomem" classf="sound/sparc/amd7930.c#L370" id
 L370" class="line" nam 
 L370">13702/a>{v        2a href="+6ode=u619" nam 
 L315lock" class="sru8 void 2a href="u82a hr="+code=regs" cnew_mmr1 void 2a href="new_mmr1nam 
 L370">13702/a>{v13192/a>#6efine62 nam 
 L349">13492/a>        unsigned 6 class="l6ne" nam 
 L320">13202/a>6defin62gs2/a>;v13722/a>v13732/a>        2a href="+code=spin_lock_irqsave" class="sref">spin_lock_irqsave2/a>(&2a h6 ="sref">6>AMD7930_FLAG_CAPTURE2/a6    062 nam 
 L371">13712/a>        unsigned 6 L312" cl6a>        struct 2a href6"+cod623" nam 
 L315ef="sound/sparc/a> void 2a href="+code=ahr9">12792/a>#defineck_irqrestore" class="sref">sm|=r="+code=regs" cla/a>;v;v13332/a>        int                  6c="sref">6a>        struct 2a href6"+cod62LE2/a>       l2v        struct 2a h6ef="+62e" nam 
 L315ef="sound/sparc/a> void 2a href="+code=ahr9">12792/a>#definec_orig void 2a href="c_origde=am=r="+code=regs" c/a> void 2a href="+code=ahr9">12792/a>#definec_cuarc/amd7930.c#L3c_cuade=am=r="+code=regs" c3untim id
 L372" classruntim ss="hr9">12792/a>#definedma_   aid
 L372" classdma_   a_DLo_DMR3_TBE_INT" cSde=AMR_DLCDLo3_DM6c7L304" c6ream" class="sref">snd_p6m_sub627" nam 
 L315">13152/a>struc/a> void 2a href="+code=ahr9">12792/a>#definec_lef6ref="+code=__inc_lef6c#L3m="="+code=regs" csiz id
 L372" class=iz de=a_DMR3_TBE_INT" cSde=AMR_DLCDLo3_DM6  L307" c6stream" class="sref">snd6pcm_s627">13372/a>        int                6 308" cla6am" class="sref">capture6subst629t" class="srl2v13152/a>strucnew_mmr1 void 2a href="new_mmr1nam m=r="+code=regs" c/a> void 2a href="+code=ahr9">12792/a>#define"sound/sparc/amd7930.c#L3.12792/a>#define"mr1 void 2a href="mmr1nam 
 L370">13702/a>{vflags2/a3untim id
 L372" classruntim ss="hr9">12792/a>#defineformatqrestore" class=ormatnam m==r"sref">flags2/aSNDRV_PCM_FORMAT_A_LAWqrestore" classSNDRV_PCM_FORMAT_A_LAWss="md7930_disable_ints" class="sref">6c#L331" i6
 L331" class="line" nam6
 L33632" nam 
 L315>;vsnd_pcm2/anew_mmr1 void 2a href="new_mmr1nam m|=r="+code=regs" cla_MAP_MMR1_ALAWqrestore" classla_MAP_MMR1_ALAWnam 
 L370">13702/a>{v13702/a>{v6"+code=c_left" class="sr6f">c_63gt;2a href="+ifr="sref">flags2/anew_mmr1 void 2a href="new_mmr1nam m!=r="+code=regs" c/a> void 2a href="+code=ahr9">12792/a>#define"sound/sparc/amd7930.c#L3.12792/a>#define"mr1 void 2a href="mmr1nam )nam 
 L314">13142/a>v;v12792/a>#define"sound/sparc/amd7930.c#L3.12792/a>#define"mr1 void 2a href="mmr1nam m=r="+code=regs" cnew_mmr1 void 2a href="new_mmr1nam 
 L370">13702/a>{vspin_lock_irqsave2/a>(&2a h60.c#L337"6id
 L337" class="line" n6m 
 L63_iomem" class="+code=lock" class="sref">lock2/a6/308" cla6f="+code=mgain" class="s6ef">m63efineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM6>13392/a>6       struct 2a href="+6ode=p640" nam 
 L315">13152/a>struct"lin">AMD7_30_DRstor id
 L372" class="lin">AMD7_30_DRstor 2">13722/a>v13732/a>        2a href="+code=spin_lock_irqsave" class="sref">spin_lock_irqsave2/a>(&2a h6>a>      640" id
 L340" class="lin6" nam64efine 2a href="+code=AMR_DER_UNRN" cla6>#L331" i6       struct 2a href="+6ode=s64 href="+code=DRturnr022" id
 L322" class="line" nam 
 L6   *2a hr6f="+code=next" class="sr6f">ne6430000="+code=lock" class="sref">lock2/a642" id
 L642" class="line" nam 
 L642">164>13332/a>        int                  64="sref">6ct 2a href="+code=snd_am67930"64LE2/a};v   pcm_ufrsnds_/sparc/amd7930.c>   pcm_ufrsnds_/2a hr="+code=regs" c=ine__" cla_playback_po" id
id
 L372" class=ine__" cla_playback_po" id
"linelass="sref">snd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss="md7930_disable_ints" class="sref">6 .c#L335"630_list" class="sref">am67930_64e" naam 
 L314">13142/a>v16462/a647" nam 
 L315lass="sref">snd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   pcm_substream_chiid
 L321" class=>   pcm_substream_chiiD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spL314">13142/a>v(struct 2a 6ref="64_iomem" class="sref">__iomem/iz _/sparc/amd7930.c>iz _/2a hr="+code=regs" cptarc/amd7930.c#L3ptid
 L332" class="line" nam 
 L332">1332602/a> *2a6href="+code=amd" class="6ref">64efineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM6arc/amd7960.c#L349" id
 L349" clas6="lin650" nam 
 L315ifr=!="sref">flags2/a/a> void 2a href="+code=ahr9">12792/a>#defineck_irqrestore" class="sref">smhref=r="+code=regs" cla/a>;v;v6ong 2a hr6f="+code=flags" class="s6ef">f651iomem" class="+code=DRturnr022" id
 L322" class="line" nam 
 L6o#L331" i6amd" class="sref">amd2/a6->65 href="+code=lock" class="srptarc/amd7930.c#L3ptid
 Lm=r="+code=regs" c/a> void 2a href="+code=ahr9">12792/a>#definep_cuarc/amd7930.c#L3p_cuade=am-=lock" class="sr/a> void 2a href="+code=ahr9">12792/a>#definep_orig void 2a href="p_origde=a22" id
 L322" class="line" nam 
 L6o  *2a hr6"sref">amd2/a>->2a hr6f="+c653" nam 
 L315DRturnrref">snd_pcm2/abyten_to_frsnds void 2a href="byten_to_frsndsD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="7930.c#L353" id
 L353untim id
 L372" classruntim ss="   2a href="+codeptarc/amd7930.c#L3ptid
 Lef">spL314">13142/a>vamd2/a>->2a hr6f="+c65>1333="+code=lock" class="sref">lock2/a6oatic str6amd" class="sref">amd2/a6->65LE2/a"+code=lock" class="sref">lock2/a6o.c#L335"6"+code=flags" class="sre6">fla65e" na};v   pcm_ufrsnds_/sparc/amd7930.c>   pcm_ufrsnds_/2a hr="+code=regs" c=ine__" cla_capture_po" id
id
 L372" class=ine__" cla_capture_po" id
"linelass="sref">snd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss="md7930_disable_ints" class="sref">6a7L304" c6355" class="line" nam 
 6355">65_t" cam 
 L314">13142/a>vam6ss="line" nam 
 L357">13672/a>65_iomem" classlass="sref">snd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   pcm_substream_chiid
 L321" class=>   pcm_substream_chiiD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spL314">13142/a>v1332602/a> *2a6href="+code=amd" class="6ref">66 nam 
 L349">13492/a>        unsigned 6arc/amd7960.c#L360" id
 L360" clas6="lin661iomem" classifr=!="sref">flags2/a/a> void 2a href="+code=ahr9">12792/a>#defineck_irqrestore" class="sref">smhref=r="+code=regs" cla/a>;v;v60#L331" i6f="+code=flags" class="s6ef">f662" nam 
 L315>;vamd2/a6->662/a>;vamd2/a>->2a hr6f="+c66ap2/a>;v void 2a href="+code=ahr9">12792/a>#definec_cuarc/amd7930.c#L3c_cuade=am-=lock" class="sr/a> void 2a href="+code=ahr9">12792/a>#definec_orig void 2a href="c_origde=a22" id
 L322" class="line" nam 
 L6aatic str6"sref">amd2/a>->2a hr6f="+c66gt;2a href="+DRturnrref">snd_pcm2/abyten_to_frsnds void 2a href="byten_to_frsndsD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="7930.c#L353" id
 L353untim id
 L372" classruntim ss="   2a href="+codeptarc/amd7930.c#L3ptid
 Lef">spL314">13142/a>vamd2/a6->66e" na="+code=lock" class="sref">lock2/a6a7L304" c6"+code=flags" class="sre6">fla662/a>);v66_iomel2v *2a6s="line" nam 
 L368">13662/a>2669t" c};vsnd_pcm2/a>   pcm_hardw   id
 L372" class=inepcm_hardw   2a hr="+code=regs" c=ine__" cla_pcm_hwid
 L372" class=ine__" cla_pcm_hwd
 Lm=="sound/sparc/amd7930.c#L368" id
6md7930_di6able_ints2/a>(struct 2a 6ref="670" naam 
 L314">13142/a>v671p2/a>;v#defineinfoid
 L372" classinfo" nam 
 L315>;vflags2/aSNDRV_PCM_INFO_MMAPref="sound/sparSNDRV_PCM_INFO_MMAPnam m|m 
 L314">13142/a>v;v;v;v13142/a>vf673" nam 
 L315>;v;v;v;vlock" class="srSNDRV_PCM_INFO_INTERLEAVEDref="+code=__inSNDRV_PCM_INFO_INTERLEAVEDnam m|m 
 L314">13142/a>vamd2/a6->674" nam 
 L315>;v;v;v;vlock" class="srSNDRV_PCM_INFO_BLOCK_TRANSFE href="sound/stdSNDRV_PCM_INFO_BLOCK_TRANSFE nam m|m 
 L314">13142/a>va6d2/a>67LE2/a>       >;v13142/a>v12756/a>#d676p2/a>;v#define=ormatrqrestore" class=ormatrE2/a>       >;vflags2/aSNDRV_PCM_FMTBIT_MU_LAWqrestore" classSNDRV_PCM_FMTBIT_MU_LAWnam m|r"sref">flags2/aSNDRV_PCM_FMTBIT_A_LAWqrestore" classSNDRV_PCM_FMTBIT_A_LAWss=" m 
 L314">13142/a>v12762/a>#677" nam 
 L315.12792/a>#defineraten_lock_irqsave" ratenE2/a>       >;vflags2/aSNDRV_PCM_RATE_800href="+code=__inSNDRV_PCM_RATE_800hss=" m 
 L314">13142/a>v127726a>#de67_iomem" class.12792/a>#definerate_min_lock_irqsave" rate_minE2/a>       >;v13142/a>v12782/a6#defi679iomem" class.12792/a>#definerate_max_lock_irqsave" rate_maxE2/a>       >;v13142/a>v12792/a6#defi680iomem" class.12792/a>#definechannels_min_lock_irqsave" channels_minE2/a>       >;v= 1 m 
 L314">13142/a>v *2a6ne" nam 
 L280">12802/a>6defin681p2/a>;v#definechannels_max_lock_irqsave" channels_maxE2/a>       >;v= 1 m 
 L314">13142/a>v12862/a>#682p2/a>;v#definebuffer_byten_max_lock_irqsave" buffer_byten_maxp2/a>;v13142/a>v12822/a>6defin68 href="+code=.12792/a>#defineperiod_byten_min_lock_irqsave" period_byten_minp2/a>;v13142/a>v   6     68ap2/a>;v#defineperiod_byten_max_lock_irqsave" period_byten_maxp2/a>;v13142/a>v12862/a>#68LE2/a>       .12792/a>#defineperiodn_min_lock_irqsave" periods_minE2/a>       >;vh=r1 m 
 L314">13142/a>v12652/a>686p2/a>;v#defineperiods_max_lock_irqsave" periods_maxE2/a>       >;vh=r1024 m 
 L314">13142/a>v128626a>#de687" na}f">spL314">13142/a>v12872/a>6defin687">13372/a>        int                6" class="6ss="line" nam 
 L288">12682/a>689t" c};vsnd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss="md7930_disable_ints" class="sref">6 class="l6ne" nam 
 L289">12892/a>6defin690" naam 
 L314">13142/a>v12902/a>6defin69gs2/a>;vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   pcm_substream_chiid
 L321" class=>   pcm_substream_chiiD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spL314">13142/a>v12912/a>#6efine692s2/a>;vsnd_pcm2/a>   pcm_runtim id
 L372" class=inepcm_runtim ss="sref">__inline__2runtim id
 L372" classruntim ss="s=r="+code=regs" c>ubstreamref="+code=__in>ubstreamss="7930.c#L353" id
 L353untim id
 L372" classruntim ss="f">spi314">13142/a>v12962/a>#69 href="+code=lock" class="sr/a> void 2a href="+code=ahr9">12792/a>#defineplayback_substreamref="+code=__inplayback_substreamhrefs=r="+code=regs" c>ubstreamref="+code=__in>ubstreamss="f">spi314">13142/a>v12946/a>#d695href="+code=lock" class="sr3untim id
 L372" classruntim ss="hr9">12792/a>#definehwid
 L372" classhwd
 Lm=r="+code=regs" c=ine__" cla_pcm_hwid
 L372" class=ine__" cla_pcm_hwd
 Lf">spi314">13142/a>v12952/a6#defi696p2/a>;v16962/a697" na="+code=lock" class="sref">lock2/a6L66" id
 6ss="line" nam 
 L297">12672/a>697">13372/a>        int                6  class="6ss="line" nam 
 L298">12682/a>699t" c};vsnd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss="md7930_disable_ints" class="sref">7 L299" cl7ss="line" nam 
 L299">12792/a>700" naam 
 L314">13142/a>v13702/a>70gs2/a>;vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   pcm_substream_chiid
 L321" class=>   pcm_substream_chiiD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spL314">13142/a>v12912/a>#7     702s2/a>;vsnd_pcm2/a>   pcm_runtim id
 L372" class=inepcm_runtim ss="sref">__inline__2runtim id
 L372" classruntim ss="s=r="+code=regs" c>ubstreamref="+code=__in>ubstreamss="7930.c#L353" id
 L353untim id
 L372" classruntim ss="f">spi314">13142/a>v  7" id
702/a>;v13732/a>70 href="+code=lock" class="sr/a> void 2a href="+code=ahr9">12792/a>#definecapture_>ubstreamref="+code=__incapture_>ubstreamhrefs=r="+code=regs" c>ubstreamref="+code=__in>ubstreamss="f">spi314">13142/a>v17042/a705href="+code=lock" class="sr3untim id
 L372" classruntim ss="hr9">12792/a>#definehwid
 L372" classhwd
 Lm=r="+code=regs" c=ine__" cla_pcm_hwid
 L372" class=ine__" cla_pcm_hwd
 Lf">spi314">13142/a>v12952/a752/a>706p2/a>;v17062/a707" na="+code=lock" class="sref">lock2/a7
 L307" c7ass="line" nam 
 L307">17072/a707">13372/a>        int                7<9L307" c7as="line" nam 
 L298">1272/a>#709t" c};vsnd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss="md7930_disable_ints" class="sref">7L309" cla7s="line" nam 
 L309">13072/a>#710" naam 
 L314">13142/a>v13172/a>#71gs2/a>;vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   pcm_substream_chiid
 L321" class=>   pcm_substream_chiiD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spL314">13142/a>v13172/a>#71 nam 
 L371">13712/a>        unsigned 7 L312" cl7ss="line" nam 
 L312">13722/a>713" nam 
 L315ef="sound/sparc/a> void 2a href="+code=ahr9">12792/a>#defineplayback_substreamref="+code=__inplayback_substreamhrefs=r="+code=regs" cNULLref="+code=__inNULLd
 Lf">spi314">13142/a>v13732/a>71ap2/a>;v         7     71LE2/a="+code=lock" class="sref">lock2/a7 6L304" c7930.c#L315" id
 L315" cl7ss="l71e" na"+code=lock" class="sref">lock2/a7 7L304" c7>        2a href="+code=7pinlo71_t" c};vsnd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss="md7930_disable_ints" class="sref">7L L307" c7/a>        void 2a href=7+code71_iomeam 
 L314">13142/a>v        2a href="+7ode=u719" nam 
 L315lass="sref">snd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   pcm_substream_chiid
 L321" class=>   pcm_substream_chiiD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spL314">13142/a>v13192/a>#7efine72 nam 
 L349">13492/a>        unsigned 7 class="l7ne" nam 
 L320">13202/a>7defin72gs2/a>;v12792/a>#definecapture_>ubstreamref="+code=__incapture_>ubstreamhrefs=r="+code=regs" cNULLref="+code=__inNULLd
 Lf">spi314">13142/a>v7>AMD7930_FLAG_CAPTURE2/a7    072 href="+code=DRturnr022" id
 L322" class="line" nam 
 L7 L312" cl7a>        struct 2a href7"+cod7230000="+code=lock" class="sref">lock2/a7 L313" cl7 href="+code=map" class=7sref"72>13332/a>        int                  7c="sref">7a>        struct 2a href7"+cod725t" c};v   __" cla_hw_   amn"linelass="sref">snd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss=" m 
 L314">13142/a>v        struct 2a h7ef="+72e" nam 
 L315>;v;vsnd_pcm2/a>   pcm_hw_   amn_lock_irqsave" >   pcm_hw_   amnss="sref">__inline__2hw_   amn_lock_irqsave" hw_   amnss="md7930_disable_ints" class="sref">7c7L304" c7ream" class="sref">snd_p7m_sub72_t" cam 
 L314">13142/a>vsnd7pcm_s72_iomem" classDRturnrref">snd_pcm2/alinepcm_lib_malloc_  gen_lock_irqsave" >   pcm_lib_malloc_  genD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="   2a href="+codep  amn_buffer_byten_lock_irqsave" p  amn_buffer_bytenD7930_CR" class="srehw_   amn_lock_irqsave" hw_   amnss="mef">spL314">13142/a>vcapture7subst729t" c="+code=lock" class="sref">lock2/a7d7930.c#L729" id
 L329" class="lin7" nam73 nam 
 L349">13492/a>        unsigned 7/a>      7 unsigned char          7*2a h73gs2/a};vsnd_pcm2/a>   pcm_substreamref="+code=__in>   pcm_substreamss="sref">__inline__2substreamref="+code=__in>ubstreamss="md7930_disable_ints" class="sref">7c#L331" i7
 L331" class="line" nam7
 L3373 hrefam 
 L314">13142/a>vsnd_pcm2/a>   pcm_lib_fre _  gen_lock_irqsave" >   pcm_lib_fre _  genD7930_CR" class="sresubstreamref="+code=__in>ubstreamss="ef">spL314">13142/a>v1333="+code=lock" class="sref">lock2/a7/="sref">7"+code=c_left" class="sr7f">c_73LE2/a"+code=lock" class="sref">lock2/a70.c#L335"7id
 L335" class="line" n7m 
 L73e" na};vsnd_pcm2/a>   pcm_opn_lock_irqsave" >   pcm_opn" nam="+code=regs" cline__" cla_playback_opn_lock_irqsave" >   __" cla_playback_opnhrefs=ram 
 L314">13142/a>v#defineopen_lock_irqsave" open"linrrrrrrrrrrr=;v13142/a>v#defineclos id
 L372" classclos "linrrrrrrrrrr=;v13142/a>vm739iomem" class.12792/a>#defineioctlid
 L372" classioctl"linrrrrrrrrrr=;v13142/a>v#definehw_   amn_lock_irqsave" hw_   amnss="rrrrrr=;v   __" cla_hw_   amn"lin m 
 L314">13142/a>v;v#definehw_fre id
 L372" classhw_fre "linrrrrrrrr=;v13142/a>v13142/a>vne74 href="+code=.12792/a>#definetriggearc/amd7930.c#L3triggea"linrrrrrrrr=;v13142/a>v174ap2/a>;v#definepo" id
id
 L372" classpo" id
"linrrrrrrrr=;v13142/a>v7ct 2a href="+code=snd_am77930"74LE2/a}f">spL314">13142/a>vam77930_74e" na"+code=lock" class="sref">lock2/a7t7L304" c7ass="line" nam 
 L346">17462/a747" na};vsnd_pcm2/a>   pcm_opn_lock_irqsave" >   pcm_opn" nam="+code=regs" cline__" cla_capture_opn_lock_irqsave" >   __" cla_capture_opnhrefs=ram 
 L314">13142/a>v(struct 2a 7ref="74_iomem" class.12792/a>#defineopen_lock_irqsave" open"linrrrrrrrrrrr=;v13142/a>v749iomem" class.12792/a>#defineclos id
 L372" classclos "linrrrrrrrrrr=;v13142/a>v#defineioctlid
 L372" classioctl"linrrrrrrrrrr=;v13142/a>vf751p2/a>;v#definehw_   amn_lock_irqsave" hw_   amnss="rrrrrr=;v   __" cla_hw_   amn"lin m 
 L314">13142/a>vamd2/a7->752p2/a>;v#definehw_fre id
 L372" classhw_fre "linrrrrrrrr=;v13142/a>vamd2/a>->2a hr7f="+c75 href="+code=.12792/a>#definepre    id
 L372" classpre    "linrrrrrrrr=;v13142/a>vamd2/a>->2a hr7f="+c75ap2/a>;v#definetriggearc/amd7930.c#L3triggea"linrrrrrrrr=;v13142/a>v7amd" class="sref">amd2/a7->75LE2/a>       .12792/a>#definepo" id
id
 L372" classpo" id
"linrrrrrrrr=;v13142/a>vfla75e" na}f">spL314">13142/a>v752/a>);vam7ss="line" nam 
 L357">13772/a>75_iome};vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=amd7930_disable_ints" class="sref">7a2/a> *2a7able_ints2/a>(struct 2a 7ref="759" naam 
 L314">13142/a>v760iomem" classlass="sref">snd_pcm2/a>   pcmid
 L372" classlinepcmss="sref">__inline__2pcmid
 L372" classpcmss="f">spL314">13142/a>vspL314">13142/a>vf76 nam 
 L371">13712/a>        unsigned 7a  *2a hr7amd" class="sref">amd2/a7->763000002v   pcm_newid
 L372" class=inepcm_newD7930_CR" class="sre/a> void 2a href="+code=ahr9">12792/a>#definecar> void 2a href="car>"lin m 
 L314">13142/a>vamd2/a>->2a hr7f="+c764" nam 
 L315>;v;v;v"sune__" cla"13142/a>v7"sref">amd2/a>->2a hr7f="+c76gt;2a href="+>;v;v;v13142/a>vamd2/a7->76e" nam 
 L315>;v;v13142/a>vfla76_t" class="srrrrrrrrr>;v7366" id
 7366" class="line" nam 
 7366">768t" class="srrrrrrrrrDRturnrref">snd_pcm2/aer
id
 L372" classer
ss="f">spL314">13142/a>v13672/a>276efineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM7md7930_di7able_ints2/a>(struct 2a 7ref="770" nam 
 L315">13152/a>struct   pcm_set_opn_lock_irqsave" >   pcm_set_opnD7930_CR" class="srepcmid
 L372" classpcmss="   2a href="+codeSNDRV_PCM_STREAM_PLAYBACKhref="sound/stdSNDRV_PCM_STREAM_PLAYBACKss="  722/a>v   __" cla_playback_opnhrefef">spL314">13142/a>v77gs2/a>;v   pcm_set_opnD7930_CR" class="srepcmid
 L372" classpcmss="   2a href="+codeSNDRV_PCM_STREAM_CAPTUREhref="sound/stdSNDRV_PCM_STREAM_CAPTUREss="  722/a>v   __" cla_capture_opnhrefef">spL314">13142/a>v13712/a>        unsigned 70  *2a hr7f="+code=flags" class="s7ef">f773" nam 
 L315ef="sound/sparcpcmid
 L372" classpcmss="hr9">12792/a>#defineprivate_dataid
 L372" classprivate_datass="m=r="+code=regs" c/a> void 2a href="+code=af">spL314">13142/a>vamd2/a7->77ap2/a>;v12792/a>#defineinfo_ck_irqrestore" classinfo_ck_irss="m=r022" id
 L322" class="line" nam 
 L70atic str7code=amd" class="sref">a7d2/a>775href="+code=lock" class="srlascpy_lock_irqsave" >ascpyD7930_CR" class="srepcmid
 L372" classpcmss="hr9">12792/a>#definesrefid
 L372" classsrefss="   2a href="+code/a> void 2a href="+code=ahr9">12792/a>#definecar> void 2a href="car>"linhr9">12792/a>#defineshortsrefid
 L372" classshortsrefhrefef">spL314">13142/a>v12757/a>#d77e" nam 
 L315ef="sound/sparc/a> void 2a href="+code=ahr9">12792/a>#definepcmid
 L372" classpcmss="m=r="+code=regs" cpcmid
 L372" classpcmss="f">spL314">13142/a>v12772/a>#772/a>);v127727a>#de77_iomem" class="sref">__iomem/inepcm_lib_preallocate_  gen_for_allid
 L372" classlinepcm_lib_preallocate_  gen_for_allD7930_CR" class="srepcmid
 L372" classpcmss="   2a href="+codeSNDRV_DMA_TYPE_CONTINUOUShref="sound/stdSNDRV_DMA_TYPE_CONTINUOUS"lin m 
 L314">13142/a>v12782/a7#defi779iomem" classssssssssssssssssssssssssssssssssssssss="sref">__iomem/inedma_continuous_dataid
 L372" class/inedma_continuous_dataD7930_CR" class="sreGFP_KERNELref="+code=__inGFP_KERNELhrefe m 
 L314">13142/a>v12792/a7#defi780iomem" classssssssssssssssssssssssssssssssssssssss64*1024,s64*1024ef">spL314">13142/a>v *2a7ne" nam 
 L280">12802/a>7defin78efine 2a href="+code=AMR_DER_UNRN" cla7"#L331" i7s="line" nam 
 L281">12872/a>#78 href="+code=DRturnr022" id
 L322" class="line" nam 
 L7"ng 2a hr7ne" nam 
 L282">12822/a>7defin7830000="+code=lock" class="sref">lock2/a7"2" id
 L7MR_DSR1_CXMT_ABRT2/a>   7     78>13332/a>        int                  7"atic str7s="line" nam 
 L284">12872/a>#78LE2/a#def 
 s="sref">__iomemVOLUME_MONITO href="sound/stdVOLUME_MONITO href="02/a>        int                  7".c#L335"7ss="line" nam 
 L285">12752/a>786p2/a#def 
 s="sref">__iomemVOLUME_CAPTUREhref="sound/stdVOLUME_CAPTUREhref="12/a>        int                  7"7L304" c7"line" nam 
 L286">128627a>#de787" na#def 
 s="sref">__iomemVOLUME_PLAYBACKhref="sound/stdVOLUME_PLAYBACKhref=22/a>        int                  7"66" id
 7ne" nam 
 L287">12872/a>7defin787">13372/a>        int                7" class="7ss="line" nam 
 L288">12782/a>789t" c};vsnd_pcm2/a>   kcontrolid
 L372" classlinekcontrolss="sref">__inline__2kctlid
 L372" classkctl"lin slass="sref">snd_pcm2/a>   ctl_elem_infoid
 L372" class>   ctl_elem_infoss="sref">__inline__2uinfoid
 L372" classuinfoss="md7930_disable_ints" class="sref">7 class="l7ne" nam 
 L289">12892/a>7defin790" naam 
 L314">13142/a>v12902/a>7defin79gs2/a>;v12792/a>#definetyp id
 L372" classtyp ss="m=r="+code=regs" cSNDRV_CTL_ELEM_TYPE_INTEGE href="sound/stdSNDRV_CTL_ELEM_TYPE_INTEGE ss="f">spL314">13142/a>v12912/a>#7efine792s2/a>;v12792/a>#definec314t void 2a href="c314tss="m=r1f">spL314">13142/a>v12792/a>#definevalu id
 L372" classvalu ss=".12792/a>#defineintegearc/amd7930.c#L3integeass=".12792/a>#definemin_lock_irqsave" minE2/a>=r022" id
 L322" class="line" nam 
 L7L293" cla7s="line" nam 
 L293">12972/a>#79 href="+code=lock" class="sruinfoid
 L372" classuinfoss="hr9">12792/a>#definevalu id
 L372" classvalu ss=".12792/a>#defineintegearc/amd7930.c#L3integeass=".12792/a>#definemax_lock_irqsave" maxE2/a>= 25522" id
 L322" class="line" nam 
 L7Latic str7="line" nam 
 L294">12947/a>#d79LE2/a"+code=lock" class="sref">lock2/a7 _TBE_INb7ine" nam 
 L295">12952/a7#defi796p2/a>;v17962/a797" na="+code=lock" class="sref">lock2/a7L66" id
 7ss="line" nam 
 L297">12772/a>797">13372/a>        int                7  class="7ss="line" nam 
 L298">12782/a>799t" c};vsnd_pcm2/a>   kcontrolid
 L372" classlinekcontrolss="sref">__inline__2kctlid
 L372" classkctl"lin slass="sref">snd_pcm2/a>   ctl_elem_valu id
 L372" class>   ctl_elem_valu ss="sref">__inline__2ucontrolid
 L372" classucontrolss="md7930_disable_ints" class="sref">8 L299" cl8ss="line" nam 
 L299">12892/a>800" naam 
 L314">13142/a>v13802/a>80gs2/a>;vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   kcontrol_chiid
 L321" class=>   kcontrol_chiiD7930_CR" class="srekctlid
 L372" classkctl"linef">spL314">13142/a>v12912/a>#8     802s2/a>;v12792/a>#defineprivate_valu id
 L372" classprivate_valu ss="f">spL314">13142/a>v  8" id
803s2/a>;v__inline__2swvald
 L321" class=>wvalss="f">spL314">13142/a>v129832/a>80>13332/a>        int                  8
 L304" c8ass="line" nam 
 L304">18042/a805href="+code=switchr="sref">flags2/atyp id
 L372" classtyp ss=")nam 
 L314">13142/a>v12952/a852/a>806p2/a>;v__iomemVOLUME_MONITO href="sound/stdVOLUME_MONITO href:m 
 L314">13142/a>v18062/a80_t" class="srrrrrrrrref="sound/sparcswvald
 L321" class=>wvalss="m=r722/a>vspL314">13142/a>v128072/a808t" class="srrrrrrrrrbreakf">spL314">13142/a>v1282/a>#809p2/a>;v__iomemVOLUME_CAPTUREhref="sound/stdVOLUME_CAPTUREhref:m 
 L314">13142/a>v13082/a>#810iomem" classssssssssef="sound/sparcswvald
 L321" class=>wvalss="m=r722/a>vspL314">13142/a>v13182/a>#811iomem" class="+code=breakf">spL314">13142/a>v13182/a>#812p2/a>;v__iomemVOLUME_PLAYBACKhref="sound/stdVOLUME_PLAYBACKhref:m 
 L314">13142/a>v13822/a>813" nam 
 L315default:m 
 L314">13142/a>v13832/a>814" nam 
 L315>;vwvalss="m=r722/a>vspL314">13142/a>v         8     81gt;2a href="+>;vspL314">13142/a>vlock2/a8 7L304" c8>        2a href="+code=8pinlo812/a>);v        void 2a href=8+code81_iomem" class="sref">__iomemucontrolid
 L372" classucontrolss="hr9">12792/a>#definevalu id
 L372" classvalu ss=".12792/a>#defineintegearc/amd7930.c#L3integeass=".12792/a>#definevalu id
 L372" classvalu ss="[0]m=rref">__inline__2swvald
 L321" class=>wvalss="f">spL314">13142/a>v        2a href="+8ode=u81efineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM8class="li8e" nam 
 L319">13192/a>#8efine820iomem" classDRturnr022" id
 L322" class="line" nam 
 L8 class="l8ne" nam 
 L320">13202/a>8defin82gs2/a="+code=lock" class="sref">lock2/a8 ="sref">8>AMD7930_FLAG_CAPTURE2/a8    082 nam 
 L371">13712/a>        unsigned 8 L312" cl8a>        struct 2a href8"+cod8230000};vsnd_pcm2/a>   kcontrolid
 L372" classlinekcontrolss="sref">__inline__2kctlid
 L372" classkctl"lin slass="sref">snd_pcm2/a>   ctl_elem_valu id
 L372" class>   ctl_elem_valu ss="sref">__inline__2ucontrolid
 L372" classucontrolss="md7930_disabl2/a>        unsigned 8 4300" cl8 href="+code=map" class=8sref"82>1333am 
 L314">13142/a>v8a>        struct 2a href8"+cod825href="+code=sass="sref">snd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" c>   kcontrol_chiid
 L321" class=>   kcontrol_chiiD7930_CR" class="srekctlid
 L372" classkctl"linef">spL314">13142/a>v        struct 2a h8ef="+82e" nam 
 L315unsigned longr="+code=regs" cck_irqrestore" class="sref">sf">spL314">13142/a>vsnd_p8m_sub82_t" class="srref"="+code=regs" ctyp id
 L372" classtyp ss="m=r="+code=regs" ckctlid
 L372" classkctl"linhr9">12792/a>#defineprivate_valu id
 L372" classprivate_valu ss="f">spL314">13142/a>vsnd8pcm_s82_iomem" classref"ref">__inline__2swvald
 L321" class=>wvalss="   2a href="+codechang id
 L372" classchang ss="f">spL314">13142/a>vcapture8subst82efineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM8d7930.c#L829" id
 L329" class="lin8" nam830iomem" classlwitchr="sref">flags2/atyp id
 L372" classtyp ss=")nam 
 L314">13142/a>v__iomemVOLUME_MONITO href="sound/stdVOLUME_MONITO href:m 
 L314">13142/a>v;vwvalss="m=r722/a>vspL314">13142/a>v;vspL314">13142/a>v__iomemVOLUME_CAPTUREhref="sound/stdVOLUME_CAPTUREhref:m 
 L314">13142/a>v8"+code=c_left" class="sr8f">c_83gt;2a href="+>;vwvalss="m=r722/a>vspL314">13142/a>v;vspL314">13142/a>v__iomemVOLUME_PLAYBACKhref="sound/stdVOLUME_PLAYBACKhref:m 
 L314">13142/a>v13142/a>vm839iomem" classssssssssef="sound/sparcswvald
 L321" class=>wvalss="m=r722/a>vspL314">13142/a>vspL314">13142/a>v;vlock2/a8>#L331" i8       struct 2a href="+8ode=s84 nam 
 L371">13712/a>        unsigned 8>L312" cl8f="+code=next" class="sr8f">ne843" nam 
 L315ef="sound/sparcspin_lock_irqsav id
 L372" class>pin_lock_irqsav D7930722/a>vsef">spL314">13142/a>v184>13332/a>        int                  8>="sref">8ct 2a href="+code=snd_am87930"84gt;2a href="+ifr=ref">__inline__2swvald
 L321" class=>wvalss=" !=r="+code=regs" cucontrolid
 L372" classucontrolss="hr9">12792/a>#definevalu id
 L372" classvalu ss=".12792/a>#defineintegearc/amd7930.c#L3integeass=".12792/a>#definevalu id
 L372" classvalu ss="[0])nam 
 L314">13142/a>vam87930_84e" nam 
 L315>;v__inline__2swvald
 L321" class=>wvalss=" =r="+code=regs" cucontrolid
 L372" classucontrolss="hr9">12792/a>#definevalu id
 L372" classvalu ss=".12792/a>#defineintegearc/amd7930.c#L3integeass=".12792/a>#definevalu id
 L372" classvalu ss="[0]r722/a 0xfff">spL314">13142/a>v18462/a84_t" class="srrrrrrrrref="sound/sparc_e__" cla_update_maid
 L321" class=_e__" cla_update_maiD7930_CR" class="sred/sparc/amd7930.c#L373" ief">spL314">13142/a>v(struct 2a 8ref="848t" class="srrrrrrrrr 2a href="+codechang id
 L372" classchang ss="m=r1f">spL314">13142/a>v849iomem" class} else">spL314">13142/a>vf85efine 2a href="+code=AMR_DER_UNRN" cla8o#L331" i8amd" class="sref">amd2/a8->852s2/a>;vvsef">spL314">13142/a>vamd2/a>->2a hr8f="+c852/a>;vamd2/a>->2a hr8f="+c85ap2/a>;vsnd_pcm2/achang id
 L372" classchang ss="f">spL314">13142/a>v8amd" class="sref">amd2/a8->85LE2/a="+code=lock" class="sref">lock2/a8o.c#L335"8"+code=flags" class="sre8">fla85e" na"+code=lock" class="sref">lock2/a8a7L304" c8355" class="line" nam 
 8355">857" na};vsnd_pcm2/a>   kcontrol_newid
 L372" class=inekcontrol_newp2/a>>v13142/a>vam8ss="line" nam 
 L357">13872/a>858t" class="sram 
 L314">13142/a>v(struct 2a 8ref="859iomem" classssssssss.12792/a>#defineifac id
 L372" classifac iomem" classss=;v13142/a>v860iomem" classssssssss.12792/a>#definesrefid
 L372" classsrefss=" m" classss=;v"Moni/or Volum "13142/a>v13142/a>vf862" nam 
 L315>;v#defineinfoid
 L372" classinfoss="sm" classss=;v13142/a>vamd2/a8->863" nam 
 L315>;v#defineget void 2a href="get" nam 
 L315>;v<=;v13142/a>vamd2/a>->2a hr8f="+c864" nam 
 L315>;v#defineput void 2a href="put" nam 
 L315>;v<=;v13142/a>v8"sref">amd2/a>->2a hr8f="+c86gt;2a href="+>;v#defineprivate_valu id
 L372" classprivate_valu ss="v<=;v13142/a>vamd2/a8->86e" nam 
 L315} m 
 L314">13142/a>vfla86_t" class="sram 
 L314">13142/a>v868t" class="srrrrrrrrr.12792/a>#defineifac id
 L372" classifac iomem" classss=;v13142/a>v13682/a>2869iomem" classssssssss.12792/a>#definesrefid
 L372" classsrefss=" m" classss=;v"Capture Volum "13142/a>v#defineindex_lock_irqsave" indexiomem" classss=;v13142/a>v871iomem" class="+code=.12792/a>#defineinfoid
 L372" classinfoss="sm" classss=;v13142/a>v;v#defineget void 2a href="get" nam 
 L315>;v<=;v13142/a>vf873" nam 
 L315>;v#defineput void 2a href="put" nam 
 L315>;v<=;v13142/a>vamd2/a8->874" nam 
 L315>;v#defineprivate_valu id
 L372" classprivate_valu ss="v<=;v13142/a>v8code=amd" class="sref">a8d2/a>875href="+code=} m 
 L314">13142/a>v12758/a>#d87e" nam 
 L315am 
 L314">13142/a>v12782/a>#87_t" class="srrrrrrrrr.12792/a>#defineifac id
 L372" classifac iomem" classss=;v13142/a>v127728a>#de878t" class="srrrrrrrrr.12792/a>#definesrefid
 L372" classsrefss=" m" classss=;v"Playback Volum "13142/a>v12782/a8#defi879iomem" classssssssss.12792/a>#defineindex_lock_irqsave" indexiomem" classss=;v13142/a>v12792/a8#defi880iomem" classssssssss.12792/a>#defineinfoid
 L372" classinfoss="sm" classss=;v13142/a>v *2a8ne" nam 
 L280">12802/a>8defin881iomem" class="+code=.12792/a>#defineget void 2a href="get" nam 
 L315>;v<=;v13142/a>v12882/a>#882" nam 
 L315>;v#defineput void 2a href="put" nam 
 L315>;v<=;v13142/a>v12822/a>8defin883" nam 
 L315>;v#defineprivate_valu id
 L372" classprivate_valu ss="v<=;v13142/a>v   8     884href="+code=} m 
 L314">13142/a>v12882/a>#88LE2/a}f">spL314">13142/a>v12852/a>88e" na"+code=lock" class="sref">lock2/a8"7L304" c8"line" nam 
 L286">128628a>#de88_t" c};vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=amd7930_disable_ints" class="sref">8"66" id
 8ne" nam 
 L287">12872/a>8defin88_iomeam 
 L314">13142/a>v12882/a>889" nam 
 L315lass="sref">snd_pcm2/a>   car> void 2a href=">   car>ss="sref">__inline__2car> void 2a href="car>"linf">spL314">13142/a>v12892/a>8defin890iomem" classref"="+code=regs" cidx_lock_irqsave" idxss="   2a href="+codeer
id
 L372" classer
ss="f">spL314">13142/a>v12902/a>8defin89efine 2a href="+code=AMR_DER_UNRN" cla8 #L331" i8e" nam 
 L291">12912/a>#8efine892s2/a>;vsnd_pcm2/a>   BUG_ON void 2a href=">   BUG_OND7930!ef">__inline__2/a> void 2a href="+code=a || !ef">__inline__2/a> void 2a href="+code=ahr9">12792/a>#definecar> void 2a href="car>"lin)md7930_disable_ints" class="sref">8 ng 2a hr8MR_DSR2_SECOND_PKT2/a>  8     893" nam 
 L315>;v#defineEINVALref="+code=__inEINVALss="f">spL314">13142/a>v12982/a>#89>13332/a>        int                  8Latic str8="line" nam 
 L294">12948/a>#d895href="+code=lock" class="srcar> void 2a href="car>"linm=r="+code=regs" c/a> void 2a href="+code=ahr9">12792/a>#definecar> void 2a href="car>"linf">spL314">13142/a>v12952/a8#defi89e" nam 
 L315ef="sound/sparclascpy_lock_irqsave" >ascpyD7930_CR" class="srecar> void 2a href="car>"linhr9">12792/a>#definemixd
srefid
 L372" classmixd
srefss="   2a href="+codecar> void 2a href="car>"linhr9">12792/a>#defineshortsrefid
 L372" classshortsrefhrefef">spL314">13142/a>v18962/a892/a>);v12872/a>898t" class="srforr=ref">snd_pcm2/aidx_lock_irqsave" idxss="m=r02"="+code=regs" cidx_lock_irqsave" idxss=" < ="+code=regs" cARRAY_SIZEhref="sound/stdARRAY_SIZED7930_CR" class="sred/s cla_controlrqrestore" classd/s cla_controlrss=")2"="+code=regs" cidx_lock_irqsave" idxss="++)nam 
 L314">13142/a>v12882/a>899iomem" classssssssssifr=0_CR" class="sreer
id
 L372" classer
ss="m=r="+code=regs" c>   ctl_ad> void 2a href=">   ctl_ad>D7930_CR" class="srecar> void 2a href="car>"lin m 
 L314">13142/a>v12992/a>900iomem" classsssssssssssssssssssssssssssssss="+code=regs" c>   ctl_new1 void 2a href=">   ctl_new1D7930722/a>v void 2a href="+code=a))) < 0md7930_disable_ints" class="sref">9 L300" cl9ss="line" nam 
 L300">13902/a>901iomem" class="+code=>;vspL314">13142/a>v12912/a>#9     902s2/a>;vlock2/a9 3300" cl9sR_DSR2_SECOND_PKT2/a>  9" id
902/a>;v129932/a>90ap2/a>;v19042/a90LE2/a="+code=lock" class="sref">lock2/a9<6L304" c9ane" nam 
 L295">12952/a952/a>90e" na"+code=lock" class="sref">lock2/a9<7L304" c9ass="line" nam 
 L296">19062/a90_t" c};vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=amd7930_disable_ints" class="sref">9 8L304" c9as="line" nam 
 L297">129072/a90_iomeam 
 L314">13142/a>v1292/a>#909" nam 
 L315lass="sref">snd_pcm2/aplatform_deviceid
 L372" classplatform_devicess="sref">__inline__2oid
 L321" class=op"linm=r="+code=regs" c/a> void 2a href="+code=ahr9">12792/a>#defineoid
 L321" class=op"lin22" id
 L322" class="line" nam 
 L9L309" cla9s="line" nam 
 L309">13092/a>#91 nam 
 L349">13492/a>        unsigned 9LL300" cl9s="line" nam 
 L310">13192/a>#91gs2/a>;v13192/a>#91 nam 
 L371">13712/a>        unsigned 9L3300" cl9ss="line" nam 
 L312">13922/a>913000002v void 2a href="+code=ahr9">12792/a>#defineirq_lock_irqsave" irqde=amd7930_disable_ints" class="sref">9L4300" cl9ss="line" nam 
 L313">13932/a>914" nam 
 L315>;v12792/a>#defineirq_lock_irqsave" irqde=a   2a href="+code/a> void 2a href="+code=a)22" id
 L322" class="line" nam 
 L9L L304" c9MR_PP_PPCR32/a>         9     91LE2/a"+code=lock" class="sref">lock2/a9L6L304" c9930.c#L315" id
 L315" cl9ss="l916p2/a>;v void 2a href="+code=ahr9">12792/a>#definereirqrestore" classreirde=amd7930_disable_ints" class="sref">9L7L304" c9>        2a href="+code=9pinlo91_t" class="srrrrrrrrref="sound/sparcof_ile_maid
 L321" class=of_ile_maiD7930722/a>v12792/a>#definereblerceid
 L372" classreblercess="[0]   2a href="+code/a> void 2a href="+code=ahr9">12792/a>#definereirqrestore" classreirde=a m 
 L314">13142/a>v        void 2a href=9+code918t" class="srrrrrrrrr"srrrrrrrrref="sound/sparcreblerce_sizeid
 L372" classreblerce_sizeD7930722/a>v12792/a>#definereblerceid
 L372" classreblercess="[0]))22" id
 L322" class="line" nam 
 L9L9L304" c9182/a>        2a href="+9ode=u91efineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM9class="li9e" nam 
 L319">13192/a>#9efine920" nam 
 L315">13152/a>struckfre id
 L372" classkfre "line 2a href="+code/a> void 2a href="+code=a)22" id
 L322" class="line" nam 
 L9 class="l9ne" nam 
 L320">13202/a>9defin92efine 2a href="+code=AMR_DER_UNRN" cla9 ="sref">9>AMD7930_FLAG_CAPTURE2/a9    092 href="+code=DRturnr022" id
 L322" class="line" nam 
 L9 L312" cl9a>        struct 2a href9"+cod9230000="+code=lock" class="sref">lock2/a9 4300" cl9 href="+code=map" class=9sref"92>13332/a>        int                  9c="sref">9a>        struct 2a href9"+cod925href};vsnd_pcm2/a>   deviceid
 L372" class>   devicess="sref">__inline__2deviceid
 L372" classdevicess="md7930_disable_ints" class="sref">9c6L304" c952/a>        struct 2a h9ef="+92e" naam 
 L314">13142/a>vsnd_p9m_sub92_t" class="srsass="sref">snd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=am=r="+code=regs" cdeviceid
 L372" classdevicess="hr9">12792/a>#definedevice_dataid
 L372" classdevice_data"lin22" id
 L322" class="line" nam 
 L9  L307" c9stream" class="sref">snd9pcm_s927">13372/a>        int                9 9L307" c9am" class="sref">capture9subst929href="+code=DRturnr="+code=regs" c=ine__" cla_fre id
 L372" class=ine__" cla_fre "line 2a href="+code/a> void 2a href="+code=a)22" id
 L322" class="line" nam 
 L9d7930.c#L929" id
 L329" class="lin9" namclass="="+code=lock" class="sref">lock2/a9/a>      9 unsigned char          9*2a h93efine 2a href="+code=AMR_DER_UNRN" cla9c#L331" i9
 L331" class="line" nam9
 L33932" na};vsnd_pcm2/a>   device_opn_lock_irqsave" >   device_opn" nam="+code=regs" cline__" cla_dev_opn_lock_irqsave" >   __" cla_dev_opnde=am=ram 
 L314">13142/a>v#definedev_fre id
 L372" classdev_fre "lin 
 L315=;v13142/a>vspL314">13142/a>v9"+code=c_left" class="sr9f">c_93LE2/a"+code=lock" class="sref">lock2/a90.c#L335"9id
 L335" class="line" n9m 
 L93e" na};vsnd_pcm2/a>   car> void 2a href=">   car>ss="sref">__inline__2car> void 2a href="car>"lin m 
 L314">13142/a>vsnd_pcm2/aplatform_deviceid
 L372" classplatform_devicess="sref">__inline__2oid
 L321" class=op"lin m 
 L314">13142/a>v13142/a>vm939iomem" classssssssss>;vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="srref">__inline__2r/a> void 2a href="r+code=amd7930_disable_ints" class="sref">9>13392/a>9       struct 2a href="+9ode=p940" naam 
 L314">13142/a>v;vsnd_pcm2/a>   ic 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=af">spL314">13142/a>vsf">spL314">13142/a>vne943s2/a>;vspL314">13142/a>v194>13332/a>        int                  9>="sref">9ct 2a href="+code=snd_am97930"94gt;2a href="+ref">__inline__2r/a> void 2a href="r+code=am=r="+code=regs" cNULLref="+code=__inNULLss="f">spL314">13142/a>vam97930_94e" nam 
 L315ef="sound/sparc/a> void 2a href="+code=am=r="+code=regs" ckzallocid
 L372" classkzalloc"linelizeof=ref">__inline__2/a> void 2a href="+code=a)   2a href="+codeGFP_KERNELref="+code=__inGFP_KERNELhrefef">spL314">13142/a>v19462/a94_t" class="srifr=="+code=regs" c/a> void 2a href="+code=a ==r="+code=regs" cNULLref="+code=__inNULLss="md7930_disable_ints" class="sref">9> L307" c97930_idle2/a>(struct 2a 9ref="948t" class="srrrrrrrrrDRturnr-12792/a>#defineENOMEMref="+code=__inENOMEMss="f">spL314">13142/a>v94efineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM9arc/amd7990.c#L349" id
 L349" clas9="lin950" nam 
 L315">13152/a>struc>pin_lock_ini/sparc/amd7930.c>pin_lock_ini/D7930722/a>v12792/a>#definelockparc/amd7930.c#lockss="ef">spL314">13142/a>vf95gs2/a>;v12792/a>#definecar> void 2a href="car>"linm=r="+code=regs" ccar> void 2a href="car>"linf">spL314">13142/a>vamd2/a9->952s2/a>;v12792/a>#defineoid
 L321" class=op"linm=r="+code=regs" coid
 L321" class=op"lin22" id
 L322" class="line" nam 
 L9o  *2a hr9"sref">amd2/a>->2a hr9f="+c952/a>;vamd2/a>->2a hr9f="+c95ap2/a>;v12792/a>#definereirqrestore" classreirde=am=r="+code=regs" cof_ilremaid
 L321" class=of_ilremaiD7930722/a>v12792/a>#definereblerceid
 L372" classreblercess="[0]  h m 
 L314">13142/a>v9amd" class="sref">amd2/a9->95gt;2a href="+>;vv12792/a>#definereblerceid
 L372" classreblercess="[0]),re2v"href="s"spL314">13142/a>vfla956p2/a>;v__inline__2/a> void 2a href="+code=ahr9">12792/a>#definereirqrestore" classreirde=amram 
 L314">13142/a>v95_t" class="srrrrrrrrref="sound/sparcsinepsintkparc/amd7930.c#sinepsintk"line 2a href="+codeKERN_ER href="sound/stdKERN_ER /a>;v13972/a>958t" class="srrrrrrrrr"srrrrrrrrre2v"href="s-%d: Unable to mai chiirDRgisters.\n"spL314">13142/a>v(struct 2a 9ref="959iomem" classssssssssDRturnr-12792/a>#defineEIOref="+code=__inEIO"lin22" id
 L322" class="line" nam 
 L902/a> *2a9href="+code=amd" class="9ref">960iomem" class="+code=lock" class="sref">lock2/a9arc/amd7990.c#L360" id
 L360" clas9="lin96efine 2a href="+code=AMR_DER_UNRN" cla9a#L331" i9f="+code=flags" class="s9ef">f962s2/a>;vamd2/a9->962/a>;vamd2/a>->2a hr9f="+c964" nam 
 L315ifr=="+code=regs" crequest_irq_lock_irqsave" request_irqD7930_CR" class="sreirq_lock_irqsave" irqde=a   2a href="+code=ine__" cla_interrup/sparc/amd7930.c>ine__" cla_interrup/"lin m 
 L314">13142/a>v9"sref">amd2/a>->2a hr9f="+c96gt;2a href="+>;v;v"href="s"13142/a>vamd2/a9->96e" nam 
 L315>;v;re2v"href="s-%d: Unable to grab IRQ %d\n"13142/a>vfla96_t" class="srrrrrrrrr>;v968t" class="srrrrrrrrr="+code=regs" c=ine__" cla_fre id
 L372" class=ine__" cla_fre "line 2a href="+code/a> void 2a href="+code=a)22" id
 L322" class="line" nam 
 L909L307" c9s="line" nam 
 L368">13692/a>2969iomem" classssssssssDRturnr-12792/a>#defineEBUSYref="+code=__inEBUSY"lin22" id
 L322" class="line" nam 
 L9md7930_di9able_ints2/a>(struct 2a 9ref="970iomem" class="+code=lock" class="sref">lock2/a902/a> *2a9href="+code=amd" class="9ref">97gs2/a>;v12792/a>#defineirq_lock_irqsave" irqde=am=r="+code=regs" cirq_lock_irqsave" irqde=a22" id
 L322" class="line" nam 
 L9m#L331" i90.c#L371" id
 L371" clas9="lin97 nam 
 L371">13712/a>        unsigned 90  *2a hr9f="+code=flags" class="s9ef">f973" nam 
 L315ef="sound/sparc__" cla_enable_intrqrestore" classd/s cla_enable_intr"line 2a href="+code/a> void 2a href="+code=a)22" id
 L322" class="line" nam 
 L902" id
 L9amd" class="sref">amd2/a9->97>13332/a>        int                  90="sref">9code=amd" class="sref">a9d2/a>975href="+code=">13152/a>struc>pin_lock_irqsav id
 L372" class>pin_lock_irqsav D7930722/a>vsef">spL314">13142/a>v12759/a>#d97e" na"+code=lock" class="sref">lock2/a937L304" c9s="line" nam 
 L276">12792/a>#97_t" class="sref">__inline__2/a> void 2a href="+code=ahr9">12792/a>#definergain_lock_irqsave" rgainss="m=r128f">spL314">13142/a>v127729a>#de97_iomem" class="sref">__iomem/a> void 2a href="+code=ahr9">12792/a>#definepgain_lock_irqsave" pgainss=">= 20022" id
 L322" class="line" nam 
 L9m9L307" c9ine" nam 
 L278">12782/a9#defi979iomem" class="sref">__iomem/a> void 2a href="+code=ahr9">12792/a>#definemgain_lock_irqsave" mgainss="m=r022" id
 L322" class="line" nam 
 L9" class="9ine" nam 
 L279">12792/a9#defi98 nam 
 L349">13492/a>        unsigned 9"2/a> *2a9ne" nam 
 L280">12802/a>9defin98gs2/a>;vvv12892/a>#982s2/a>;v12792/a>#definemaid
 L321" class=maiD793.12792/a>#definemmr1 void 2a href="mmr1ss="m=r=>v12822/a>9defin983" nam 
 L315>;vsef">spL314">13142/a>v   9     98ap2/a>;v12792/a>#definemaid
 L321" class=maiD793.12792/a>#definemmr2 void 2a href="mmr2ss="m=r=>vsef">spL314">13142/a>v9s="line" nam 
 L284">12892/a>#98LE2/a"+code=lock" class="sref">lock2/a9".c#L335"9ss="line" nam 
 L285">12952/a>98e" nam 
 L315ef="sound/sparc_e__" cla_update_maid
 L321" class=_e__" cla_update_maiD7930_CR" class="sred/sparc/amd7930.c#L373" ief">spL314">13142/a>v128629a>#de982/a>);v12872/a>9defin98_iomem" class=2v/* Always MUX audio (Ba) to channel Bb. */12982/a>989iomem" class="sref">__iomemsbus_writebid
 L372" class>bus_writebD7930_CR" class="sreAMR_MUX_MCR1 void 2a href="AMR_MUX_MCR1ss="   2a href="+code/a> void 2a href="+code=ahr9">12792/a>#definereirqrestore" classreirde=am+ ="+code=regs" cAMD cla_C href="sound/stdAMD cla_C 3" ief">spL314">13142/a>v12892/a>9defin990" nam 
 L315">13152/a>struc>bus_writebid
 L372" class>bus_writebD7930_CR" class="sreAM_MUX_CHANNEL_Baid
 L372" classAM_MUX_CHANNEL_Bass="m| 0_CR" class="sreAM_MUX_CHANNEL_Bbid
 L372" classAM_MUX_CHANNEL_Bbss="m<< 4) m 
 L314">13142/a>v12902/a>9defin991iomem" class="+code=>;v< 2a href="+code/a> void 2a href="+code=ahr9">12792/a>#definereirqrestore" classreirde=am+ ="+code=regs" cAMD cla_D href="sound/stdAMD cla_D 3" ief">spL314">13142/a>v12912/a>#9efine99 nam 
 L371">13712/a>        unsigned 9 ng 2a hr9MR_DSR2_SECOND_PKT2/a>  9     993" nam 
 L315ef="sound/sparc>pin_unlock_irqresto  id
 L372" class=pin_unlock_irqresto  D7930722/a>vsef">spL314">13142/a>v12992/a>#99>13332/a>        int                  9Latic str9="line" nam 
 L294">12949/a>#d995href="+code=ifr=0_CR" class="sreer
id
 L372" classer
ss="m=r="+code=regs" c>   device_newid
 L372" class=inedevice_newD7930_CR" class="srecar> void 2a href="car>"lin ref="sound/sparcSNDRV_DEV_LOWLEVELref="+code=__inSNDRV_DEV_LOWLEVEL"lin m 
 L314">13142/a>v12952/a9#defi99e" nam 
 L315>;v void 2a href="+code=a,r722/a>v   __" cla_dev_opnde=a)) < 0mram 
 L314">13142/a>v19962/a99_t" class="srrrrrrrrref="sound/sparcsine__" cla_fre id
 L372" class=ine__" cla_fre "line 2a href="+code/a> void 2a href="+code=a)22" id
 L322" class="line" nam 
 L9L66" id
 9ss="line" nam 
 L297">12972/a>998t" class="srrrrrrrrrDRturnr_CR" class="sreer
id
 L372" classer
ss="22" id
 L322" class="line" nam 
 L9L9L307" c9ss="line" nam 
 L298">12982/a>999iomem" class="+code=lock" class="sref">lock2/a10 L299" cl10 L29line" nam 
 L298">1210 L2>10 L13332//pre>+code=lock" class="sref">lock2/a10 1299" cl10 e" nam 
 L290">12902/a>10 e">10 1iomem" classref">__inline__2r/a> void 2a href="r+code=am=r="+code=regs" c/a> void 2a href="+code=a22" id
 L322" class="line" nam 
 L10 2299" cl10 " nam 
 L291">12912/a>#10 " >10  href="+code=DRturnr022" id
 L322" class="line" nam 
 L10 3299" cl10 R_DSR2_SECOND_PKT2/a>  10 R_>10 30000="+code=lock" class="sref">lock2/a10 4299" cl10 ="line" nam 
 L293">12910 =">10 >13332/a>        int                  10 5299" cl10 "line" nam 
 L294">129410 "l>10 5href};vbus_probeid
 L372" class__" cla_>bus_probe"linelass="sref">snd_pcm2/aplatform_deviceid
 L372" classplatform_devicess="sref">__inline__2oid
 L321" class=op"linmd7930_disable_ints" class="sref">10 6299" cl10 ne" nam 
 L295">12952/a10 ne>10 e" naam 
 L314">13142/a>v110 ss>10 _t" class="srsass="sref">snd_pcm2/areblerceid
 L372" classreblercess="sref">__inline__2rid
 L321" class=rp"linm=r722/a>v12792/a>#definereblerceid
 L372" classreblercess="[0]22" id
 L322" class="line" nam 
 L10 8299" cl10 s="line" nam 
 L297">1210 s=>10 8t" class="srsav1210 s=>10 9" nam 
 L315lass="sref">snd_pcm2/a>   car> void 2a href=">   car>ss="sref">__inline__2car> void 2a href="car>"linf">spL314">13142/a>v13010s=">10s=" nam 
 L315lass="sref">snd_pcm2/a>   ac 2a href="+code=__inline__" class="sref">__inline__2/a> void 2a href="+code=af">spL314">13142/a>v13110s=">10s1iomem" classref" 2a href="+codeer
id
 L372" classer
ss=" "="+code=regs" cirq_lock_irqsave" irqde=af">spL314">13142/a>v13110s=">10s nam 
 L371">13712/a>        unsigned 10s3299" cl10ss="line" nam 
 L312">1310ss=>10s3" nam 
 L315ef="sound/sparcirq_lock_irqsave" irqde=am=r="+code=regs" coid
 L321" class=op"linhr9">12792/a>#define   hdataid
 L372" class   hdataD793.12792/a>#defineirqs_lock_irqsave" irqsss="[0]22" id
 L322" class="line" nam 
 L1014299" cl10ss="line" nam 
 L313">1310ss=>10s>13332/a>        int                  1015299" cl10MR_PP_PPCR32/a>         10MR_>10s5href="+code=ifr=="+code=regs" cdev_numid
 L372" classdev_numde=a r9">=r="+code=regs" cSNDRV_CARDShref="sound/stdSNDRV_CARDS"linmd7930_disable_ints" class="sref">1016299" cl10930.c#L315" id
 L315" cl10930>10se" nam 
 L315>;v#defineENODEVhref="sound/stdENODEVde=af">spL314">13142/a>v        2a href="+code=10>  >10s_t" class="srifr=!ef">__inline__2enableid
 L372" classenabless="[="+code=regs" cdev_numid
 L372" classdev_numde=a])nam 
 L314">13142/a>v        void 2a href=10/a>>10s8t" class="srrrrrrrrr="+code=regs" cdev_numid
 L372" classdev_numde=a++f">spL314">13142/a>v        2a href="+10182>10s9iomem" classssssssssDRturnr-12792/a>#defineENOENThref="sound/stdENOENTde=af">spL314">13142/a>v13192/a>#10e" >10e"iomem" class="+code=lock" class="sref">lock2/a1021299" cl10ne" nam 
 L320">13202/a>10ne">10eefine 2a href="+code=AMR_DER_UNRN" cla10e2299" cl10>AMD7930_FLAG_CAPTURE2/a10>AM>10e2s2/a>;v   car>_creat id
 L372" class=inecar>_creat "line 2a href="+codeindex_lock_irqsave" indexiome[="+code=regs" cdev_numid
 L372" classdev_numde=a] "="+code=regs" ci> void 2a href="idiome[="+code=regs" cdev_numid
 L372" classdev_numde=a] "="+code=regs" cTHIS_MODULEid
 L372" classTHIS_MODULED793  h  2a href="+code=AMR_DER_UNRN" cla10e3299" cl10a>        struct 2a href10a> >10e3" nam 
 L315>;vv"lin)f">spL314">13142/a>v10e4" nam 
 L315ifr=="+code=regs" cer
id
 L372" classer
ss="m< 0md7930_disable_ints" class="sref">10e5299" cl10a>        struct 2a href10a> >10egt;2a href="+>;v        struct 2a h1052/>10ee" na"+code=lock" class="sref">lock2/a10e7299" cl10ream" class="sref">snd_p10rea>10e_t" class="sref">__inline__2lascpy_lock_irqsave" >ascpyD7930_CR" class="srecar> void 2a href="car>"linhr9">12792/a>#definedrivd
id
 L372" classdrivd
ss=" "=2v"AMD cla"spL314">13142/a>vsnd10str>10e_iomem" class="sref">__iomemlascpy_lock_irqsave" >ascpyD7930_CR" class="srecar> void 2a href="car>"linhr9">12792/a>#defineshortsrefid
 L372" classshortsrefhref "=2v"Sun AMD cla"spL314">13142/a>vcapture10am">10e9iomem" class="sref">__iomemspsintfid
 L372" class=psintfD7930_CR" class="srecar> void 2a href="car>"linhr9">12792/a>#definelongsrefid
 L372" classlongsrefhref "=2v"%s at 0x%02lx:0x%08Lx, irq %d"13142/a>v1029t" class="srrrrrrrrr="+code=regs" ccar> void 2a href="car>"linhr9">12792/a>#defineshortsrefid
 L372" classshortsrefhref m 
 L314">13142/a>v1021iomem" class="+code=ef">__inline__2rid
 L321" class=rp"linhr9">12792/a>#defineck_irqrestore" class="sref">sr722/a 0xffL m 
 L314">13142/a>v1022" nam 
 L315>;v__inline__2rid
 L321" class=rp"linhr9">12792/a>#definestar/sparc/amd7930.c>tar/href m 
 L314">13142/a>v1023" nam 
 L315>;vspL314">13142/a>v102>13332/a>        int                  1035299" cl10"+code=c_left" class="sr10"+c>1025href="+code=ifr=0_CR" class="sreer
id
 L372" classer
ss="m=r="+code=regs" c>   __" cla_creat id
 L372" class=ine__" cla_creat D7930_CR" class="srecar> void 2a href="car>"lin ref="sound/sparcoid
 L321" class=op"lin m 
 L314">13142/a>v102e" nam 
 L315>;vv1027299" cl10id
 L336" class="line" n10id
>102_t" class="srrrrrrrrrgotoref="sound/sparcout_er
id
 L372" classout_er
ss="22" id
 L322" class="line" nam 
 L1038299" cl10id
 L337" class="line" n10id
>1027">13372/a>        int                1029299" cl10f="+code=mgain" class="s10f=">1029href="+code=ifr=0_CR" class="sreer
id
 L372" classer
ss="m=r="+code=regs" c>   __" cla_pcmid
 L372" class>   __" cla_pcm"line 2a href="+code/a> void 2a href="+code=a)) < 0md7930_disable_ints" class="sref">104L299" cl10       struct 2a href="+10   >10  t" class="srrrrrrrrrgotoref="sound/sparcout_er
id
 L372" classout_er
ss="22" id
 L322" class="line" nam 
 L1041299" cl1040" id
 L340" class="lin1040">10 efine 2a href="+code=AMR_DER_UNRN" cla1042299" cl10       struct 2a href="+10   >10 2s2/a>;v   __" cla_mixd
id
 L372" class=ine__" cla_mixd
D7930 2a href="+code/a> void 2a href="+code=a)) < 0md7930_disable_ints" class="sref">1043299" cl10f="+code=next" class="sr10f=">10 3" nam 
 L315>;v10 >13332/a>        int                  1045299" cl10ct 2a href="+code=snd_am10ct >10 5href="+code=ifr=0_CR" class="sreer
id
 L372" classer
ss="m=r="+code=regs" c>   car>_DRgisterid
 L372" class=inecar>_DRgisterD7930_CR" class="srecar> void 2a href="car>"lin)) < 0md7930_disable_ints" class="sref">1046299" cl1030_list" class="sref">am1030_>10 e" nam 
 L315>;v110ass>10 2/a>);v(struct 2a 10793>10 _iomem" class="sref">__iomem/a> void 2a href="+code=ahr9">12792/a>#definenex/sparc/amd7930.cnex/de=am=r="+code=regs" c/a> cla_listid
 L372" class__" cla_listss="22" id
 L322" class="line" nam 
 L1049299" cl10href="+code=amd" class="10hre>10 9iomem" class="sref">__iomem/a> cla_listid
 L372" class__" cla_listss="m=r="+code=regs" c/a> void 2a href="+code=a22" id
 L322" class="line" nam 
 L105L299" cl100.c#L349" id
 L349" clas100.c>100./a>);v100gs2/a>;vspL314">13142/a>vamd2/a10amd>100 nam 
 L371">13712/a>        unsigned 1053299" cl10"sref">amd2/a>->2a hr10"sr>1003" nam 
 L315DRturnr022" id
 L322" class="line" nam 
 L1054299" cl10"sref">amd2/a>->2a hr10"sr>100>13332/a>        int                  1055299" cl10amd" class="sref">amd2/a10amd>1005hrefef="sound/sparcout_er
id
 L372" classout_er
ss=":2/a>        int                  1056299" cl10"+code=flags" class="sre10"+c>100e" nam 
 L315ef="sound/sparclinecar>_fre id
 L372" class=inecar>_fre D7930_CR" class="srecar> void 2a href="car>"lin)22" id
 L322" class="line" nam 
 L1057299" cl10355" class="line" nam 
 10355>1007" nam 
 L315DRturnr_CR" class="sreer
id
 L372" classer
ss="22" id
 L322" class="line" nam 
 L1058299" cl10ss="line" nam 
 L357">1310ss=>100_iome="+code=lock" class="sref">lock2/a1059299" cl10able_ints2/a>(struct 2a 10abl>100efineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM106L299" cl10href="+code=amd" class="10hre>10hrfinesavsnd_pcm2/aofedevice_i> void 2a href="ofedevice_i>" nam="sref">__iomem/a> cla_matchid
 L372" class__" cla_matchiome[]m=ram 
 L314">13142/a>v10hgs2/a>;v13142/a>v10h2" nam 
 L315>;v#definesrefid
 L372" classsrefhrefm=r=2v"hudio"13142/a>vamd2/a10amd>10h3" nam 
 L315} m 
 L314">13142/a>vamd2/a>->2a hr10"sr>10h4" nam 
 L315{} m 
 L314">13142/a>vamd2/a>->2a hr10"sr>10hLE2/a}f">spL314">13142/a>vamd2/a10amd>10he" na"+code=lock" class="sref">lock2/a1067299" cl10"+code=flags" class="sre10"+c>10h_t" c};vsnd_pcm2/aplatform_drivd
id
 L372" classplatform_drivd
" nam="sref">__iomem/a> cla_>bus_drivd
id
 L372" class/a> cla_>bus_drivd
hrefm=ram 
 L314">13142/a>v10h_iomem" class.12792/a>#definedrivd
id
 L372" classdrivd
ss="m=ram 
 L314">13142/a>v13610s=">10h9iomem" classssssssss.12792/a>#definesrefid
 L372" classsrefhrefm=r=2v"hudio"13142/a>v(struct 2a 10abl>10abiomem" classssssssss.12792/a>#defineownd
id
 L372" classownd
ss="m=r="+code=regs" cTHIS_MODULEid
 L372" classTHIS_MODULED793 m 
 L314">13142/a>v cla_matchid
 L372" class__" cla_matchiome m 
 L314">13142/a>v10a2" nam 
 L315} m 
 L314">13142/a>v10a3" nam 
 L315.12792/a>#defineprobeid
 L372" classprobe"linss="+code==r="+code=regs" c/a> cla_>bus_probeid
 L372" class__" cla_>bus_probe"lin m 
 L314">13142/a>vamd2/a10amd>10a4iome}f">spL314">13142/a>va10cod>10aLE2/a"+code=lock" class="sref">lock2/a10a6299" cl10="line" nam 
 L275">127510="l>10ae" na};v1077299" cl10s="line" nam 
 L276">12710s=">10a_t" cam 
 L314">13142/a>v1277210"li>10a_iomem" classDRturnr_CR" class="sreplatform_drivd
_DRgisterid
 L372" classplatform_drivd
_DRgisterD7930722/a>v cla_>bus_drivd
href)22" id
 L322" class="line" nam 
 L1079299" cl10ine" nam 
 L278">12782/a10ine>10a9iome="+code=lock" class="sref">lock2/a108L299" cl10ine" nam 
 L279">12792/a10ine>10inE2/a"+code=lock" class="sref">lock2/a1081299" cl10ne" nam 
 L280">12802/a>10ne">10i1" na};v1082299" cl10s="line" nam 
 L281">12810s=">10i2t" cam 
 L314">13142/a>v12822/a>10ne">10i3" nam 
 L315lass="sref">snd_pcm2/a>   ac 2a href="+code=__inline__" class="sref">__inline__2id
 L321" class=p"linm=r="+code=regs" c/a> cla_listid
 L372" class__" cla_listss="22" id
 L322" class="line" nam 
 L1084299" cl10MR_DSR1_CXMT_ABRT2/a>   10MR_>10i>13332/a>        int                  1085299" cl10s="line" nam 
 L284">12810s=">10i5href="+code=whiler=="+code=regs" cid
 L321" class=p"linm!=r="+code=regs" cNULLref="+code=__inNULLss="mram 
 L314">13142/a>v1210ss=>10ie" nam 
 L315>;vsnd_pcm2/a>   ac 2a href="+code=__inline__" class="sref">__inline__2nex/sparc/amd7930.cnex/de=am=r="+code=regs" cid
 L321" class=p"linhr9">12792/a>#definenex/sparc/amd7930.cnex/de=a22" id
 L322" class="line" nam 
 L1087299" cl10"line" nam 
 L286">1286210"li>10i2/a>);v12872/a>10ne">10i8t" class="srrrrrrrrr="+code=regs" c=inecar>_fre id
 L372" class=inecar>_fre D7930_CR" class="sreid
 L321" class=p"linhr9">12792/a>#definecar> void 2a href="car>"lin)22" id
 L322" class="line" nam 
 L1089299" cl10ss="line" nam 
 L288">1210ss=>10iefineDMR3_TBE_INT" cSde=AMR_DLCDLo3_DM109L299" cl10ne" nam 
 L289">12892/a>10ne">10net" class="srrrrrrrrr="+code=regs" cid
 L321" class=p"linm=r="+code=regs" cnex/sparc/amd7930.cnex/de=a22" id
 L322" class="line" nam 
 L1091299" cl10ne" nam 
 L290">12902/a>10ne">10n1iomem" class="+code=lock" class="sref">lock2/a1092299" cl10e" nam 
 L291">12912/a>#10e" >10n nam 
 L371">13712/a>        unsigned 1093299" cl10MR_DSR2_SECOND_PKT2/a>  10MR_>10n3" nam 
 L315ef="sound/sparc__" cla_listid
 L372" class__" cla_listss="m=r="+code=regs" cNULLref="+code=__inNULLss="f">spL314">13142/a>v12910s=">10n>13332/a>        int                  1095299" cl10="line" nam 
 L294">129410="l>10n5href="+code=">13152/a>strucplatform_drivd
_unDRgisterid
 L372" classplatform_drivd
_unDRgisterD7930722/a>v cla_>bus_drivd
href)22" id
 L322" class="line" nam 
 L1096299" cl10ine" nam 
 L295">12952/a10ine>10n6iome="+code=lock" class="sref">lock2/a1097299" cl10ass="line" nam 
 L296">110ass>10n2/a>);v1210ss=>10n8hrefef="sound/sparcmodule_ini/sparc/amd7930.cmodule_ini/D7930 2a href="+code/a> cla_ini/sparc/amd7930.c__" cla_ini/D793)22" id
 L322" class="line" nam 
 L1099299" cl10ss="line" nam 
 L298">1210ss=>10n9hrefef="sound/sparcmodule_exi/sparc/amd7930.cmodule_exi/D7930 2a href="+code/a> cla_exi/sparc/amd7930.c__" cla_exi/D793)22" id
 L322" class="line" nam 
 L11 L299" cl11 L29line" nam 
 L298">1211 L2>11 L1333//pre>
The original LXR software by the " id L32http://blerceforge.net/projects/lxri>LXR communi/yD793, this experimental vd sion by " id L32mailto:lxr@am ux.no">lxr@am ux.noD793. lxr.am ux.no kindly hosted by " id L32http://www.redpill-am pro.no">Redpill Lm pro ASD793, provider of Lm uxhconsulting and operv