linux/drivers/pinctrl/pinctrl-imx35.c
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   1/*
   2 * imx35 pinctrl driver.
   3 *
   4 * This driver was mostly copied from the imx51 pinctrl driver which has:
   5 *
   6 * Copyright (C) 2012 Freescale Semiconductor, Inc.
   7 * Copyright (C) 2012 Linaro, Inc.
   8 *
   9 * Author: Dong Aisheng <dong.aisheng@linaro.org>
  10 *
  11 * This program is free software; you can redistribute it and/or modify
  12 * it under the terms of the GNU General Public License version 2 as published
  13 * by the Free Software Foundation.
  14 */
  15
  16#include <linux/err.h>
  17#include <linux/init.h>
  18#include <linux/io.h>
  19#include <linux/module.h>
  20#include <linux/of.h>
  21#include <linux/of_device.h>
  22#include <linux/pinctrl/pinctrl.h>
  23
  24#include "pinctrl-imx.h"
  25
  26enum imx35_pads {
  27        MX35_PAD_CAPTURE = 0,
  28        MX35_PAD_COMPARE = 1,
  29        MX35_PAD_WDOG_RST = 2,
  30        MX35_PAD_GPIO1_0 = 3,
  31        MX35_PAD_GPIO1_1 = 4,
  32        MX35_PAD_GPIO2_0 = 5,
  33        MX35_PAD_GPIO3_0 = 6,
  34        MX35_PAD_RESET_IN_B = 7,
  35        MX35_PAD_POR_B = 8,
  36        MX35_PAD_CLKO = 9,
  37        MX35_PAD_BOOT_MODE0 = 10,
  38        MX35_PAD_BOOT_MODE1 = 11,
  39        MX35_PAD_CLK_MODE0 = 12,
  40        MX35_PAD_CLK_MODE1 = 13,
  41        MX35_PAD_POWER_FAIL = 14,
  42        MX35_PAD_VSTBY = 15,
  43        MX35_PAD_A0 = 16,
  44        MX35_PAD_A1 = 17,
  45        MX35_PAD_A2 = 18,
  46        MX35_PAD_A3 = 19,
  47        MX35_PAD_A4 = 20,
  48        MX35_PAD_A5 = 21,
  49        MX35_PAD_A6 = 22,
  50        MX35_PAD_A7 = 23,
  51        MX35_PAD_A8 = 24,
  52        MX35_PAD_A9 = 25,
  53        MX35_PAD_A10 = 26,
  54        MX35_PAD_MA10 = 27,
  55        MX35_PAD_A11 = 28,
  56        MX35_PAD_A12 = 29,
  57        MX35_PAD_A13 = 30,
  58        MX35_PAD_A14 = 31,
  59        MX35_PAD_A15 = 32,
  60        MX35_PAD_A16 = 33,
  61        MX35_PAD_A17 = 34,
  62        MX35_PAD_A18 = 35,
  63        MX35_PAD_A19 = 36,
  64        MX35_PAD_A20 = 37,
  65        MX35_PAD_A21 = 38,
  66        MX35_PAD_A22 = 39,
  67        MX35_PAD_A23 = 40,
  68        MX35_PAD_A24 = 41,
  69        MX35_PAD_A25 = 42,
  70        MX35_PAD_SDBA1 = 43,
  71        MX35_PAD_SDBA0 = 44,
  72        MX35_PAD_SD0 = 45,
  73        MX35_PAD_SD1 = 46,
  74        MX35_PAD_SD2 = 47,
  75        MX35_PAD_SD3 = 48,
  76        MX35_PAD_SD4 = 49,
  77        MX35_PAD_SD5 = 50,
  78        MX35_PAD_SD6 = 51,
  79        MX35_PAD_SD7 = 52,
  80        MX35_PAD_SD8 = 53,
  81        MX35_PAD_SD9 = 54,
  82        MX35_PAD_SD10 = 55,
  83        MX35_PAD_SD11 = 56,
  84        MX35_PAD_SD12 = 57,
  85        MX35_PAD_SD13 = 58,
  86        MX35_PAD_SD14 = 59,
  87        MX35_PAD_SD15 = 60,
  88        MX35_PAD_SD16 = 61,
  89        MX35_PAD_SD17 = 62,
  90        MX35_PAD_SD18 = 63,
  91        MX35_PAD_SD19 = 64,
  92        MX35_PAD_SD20 = 65,
  93        MX35_PAD_SD21 = 66,
  94        MX35_PAD_SD22 = 67,
  95        MX35_PAD_SD23 = 68,
  96        MX35_PAD_SD24 = 69,
  97        MX35_PAD_SD25 = 70,
  98        MX35_PAD_SD26 = 71,
  99        MX35_PAD_SD27 = 72,
 100        MX35_PAD_SD28 = 73,
 101        MX35_PAD_SD29 = 74,
 102        MX35_PAD_SD30 = 75,
 103        MX35_PAD_SD31 = 76,
 104        MX35_PAD_DQM0 = 77,
 105        MX35_PAD_DQM1 = 78,
 106        MX35_PAD_DQM2 = 79,
 107        MX35_PAD_DQM3 = 80,
 108        MX35_PAD_EB0 = 81,
 109        MX35_PAD_EB1 = 82,
 110        MX35_PAD_OE = 83,
 111        MX35_PAD_CS0 = 84,
 112        MX35_PAD_CS1 = 85,
 113        MX35_PAD_CS2 = 86,
 114        MX35_PAD_CS3 = 87,
 115        MX35_PAD_CS4 = 88,
 116        MX35_PAD_CS5 = 89,
 117        MX35_PAD_NF_CE0 = 90,
 118        MX35_PAD_ECB = 91,
 119        MX35_PAD_LBA = 92,
 120        MX35_PAD_BCLK = 93,
 121        MX35_PAD_RW = 94,
 122        MX35_PAD_RAS = 95,
 123        MX35_PAD_CAS = 96,
 124        MX35_PAD_SDWE = 97,
 125        MX35_PAD_SDCKE0 = 98,
 126        MX35_PAD_SDCKE1 = 99,
 127        MX35_PAD_SDCLK = 100,
 128        MX35_PAD_SDQS0 = 101,
 129        MX35_PAD_SDQS1 = 102,
 130        MX35_PAD_SDQS2 = 103,
 131        MX35_PAD_SDQS3 = 104,
 132        MX35_PAD_NFWE_B = 105,
 133        MX35_PAD_NFRE_B = 106,
 134        MX35_PAD_NFALE = 107,
 135        MX35_PAD_NFCLE = 108,
 136        MX35_PAD_NFWP_B = 109,
 137        MX35_PAD_NFRB = 110,
 138        MX35_PAD_D15 = 111,
 139        MX35_PAD_D14 = 112,
 140        MX35_PAD_D13 = 113,
 141        MX35_PAD_D12 = 114,
 142        MX35_PAD_D11 = 115,
 143        MX35_PAD_D10 = 116,
 144        MX35_PAD_D9 = 117,
 145        MX35_PAD_D8 = 118,
 146        MX35_PAD_D7 = 119,
 147        MX35_PAD_D6 = 120,
 148        MX35_PAD_D5 = 121,
 149        MX35_PAD_D4 = 122,
 150        MX35_PAD_D3 = 123,
 151        MX35_PAD_D2 = 124,
 152        MX35_PAD_D1 = 125,
 153        MX35_PAD_D0 = 126,
 154        MX35_PAD_CSI_D8 = 127,
 155        MX35_PAD_CSI_D9 = 128,
 156        MX35_PAD_CSI_D10 = 129,
 157        MX35_PAD_CSI_D11 = 130,
 158        MX35_PAD_CSI_D12 = 131,
 159        MX35_PAD_CSI_D13 = 132,
 160        MX35_PAD_CSI_D14 = 133,
 161        MX35_PAD_CSI_D15 = 134,
 162        MX35_PAD_CSI_MCLK = 135,
 163        MX35_PAD_CSI_VSYNC = 136,
 164        MX35_PAD_CSI_HSYNC = 137,
 165        MX35_PAD_CSI_PIXCLK = 138,
 166        MX35_PAD_I2C1_CLK = 139,
 167        MX35_PAD_I2C1_DAT = 140,
 168        MX35_PAD_I2C2_CLK = 141,
 169        MX35_PAD_I2C2_DAT = 142,
 170        MX35_PAD_STXD4 = 143,
 171        MX35_PAD_SRXD4 = 144,
 172        MX35_PAD_SCK4 = 145,
 173        MX35_PAD_STXFS4 = 146,
 174        MX35_PAD_STXD5 = 147,
 175        MX35_PAD_SRXD5 = 148,
 176        MX35_PAD_SCK5 = 149,
 177        MX35_PAD_STXFS5 = 150,
 178        MX35_PAD_SCKR = 151,
 179        MX35_PAD_FSR = 152,
 180        MX35_PAD_HCKR = 153,
 181        MX35_PAD_SCKT = 154,
 182        MX35_PAD_FST = 155,
 183        MX35_PAD_HCKT = 156,
 184        MX35_PAD_TX5_RX0 = 157,
 185        MX35_PAD_TX4_RX1 = 158,
 186        MX35_PAD_TX3_RX2 = 159,
 187        MX35_PAD_TX2_RX3 = 160,
 188        MX35_PAD_TX1 = 161,
 189        MX35_PAD_TX0 = 162,
 190        MX35_PAD_CSPI1_MOSI = 163,
 191        MX35_PAD_CSPI1_MISO = 164,
 192        MX35_PAD_CSPI1_SS0 = 165,
 193        MX35_PAD_CSPI1_SS1 = 166,
 194        MX35_PAD_CSPI1_SCLK = 167,
 195        MX35_PAD_CSPI1_SPI_RDY = 168,
 196        MX35_PAD_RXD1 = 169,
 197        MX35_PAD_TXD1 = 170,
 198        MX35_PAD_RTS1 = 171,
 199        MX35_PAD_CTS1 = 172,
 200        MX35_PAD_RXD2 = 173,
 201        MX35_PAD_TXD2 = 174,
 202        MX35_PAD_RTS2 = 175,
 203        MX35_PAD_CTS2 = 176,
 204        MX35_PAD_RTCK = 177,
 205        MX35_PAD_TCK = 178,
 206        MX35_PAD_TMS = 179,
 207        MX35_PAD_TDI = 180,
 208        MX35_PAD_TDO = 181,
 209        MX35_PAD_TRSTB = 182,
 210        MX35_PAD_DE_B = 183,
 211        MX35_PAD_SJC_MOD = 184,
 212        MX35_PAD_USBOTG_PWR = 185,
 213        MX35_PAD_USBOTG_OC = 186,
 214        MX35_PAD_LD0 = 187,
 215        MX35_PAD_LD1 = 188,
 216        MX35_PAD_LD2 = 189,
 217        MX35_PAD_LD3 = 190,
 218        MX35_PAD_LD4 = 191,
 219        MX35_PAD_LD5 = 192,
 220        MX35_PAD_LD6 = 193,
 221        MX35_PAD_LD7 = 194,
 222        MX35_PAD_LD8 = 195,
 223        MX35_PAD_LD9 = 196,
 224        MX35_PAD_LD10 = 197,
 225        MX35_PAD_LD11 = 198,
 226        MX35_PAD_LD12 = 199,
 227        MX35_PAD_LD13 = 200,
 228        MX35_PAD_LD14 = 201,
 229        MX35_PAD_LD15 = 202,
 230        MX35_PAD_LD16 = 2_LD15 = 202,
MX35_PAD_CSPI1_SS2ss="l2ne" name="L131"> 131        MX2_PAD_SDQS3 = 104,
 132        MX2PAD_NFWE_B = 105,
 133        MX2PAD_NFRE_B = 106,
 134        MX2_PAD_NFALE = 107,
 135        MX2_PAD_NFCLE = 108,
 136        MX2PAD_NFWP_B = 109,
 137        MX25_PAD_NFRB = 110,
 138        MX25_PAD_LD14 = 201,
 139        MX25_PAD_LD15 = 202,
 140        MX25_PAD_LD16 = 2_LD15 = 202,
 141        MX25PAD_SDQS3 = 104,
 142        MX25AD_NFWE_B = 105,
 143        MX25AD_NFRE_B = 106,
 144        MX25PAD_NFALE = 107,
 145        MX25PAD_NFCLE = 108,
 146        MX25AD_NFWP_B = 109,
 147        MX35_P2X35_PAD_D6 = 120,
 148        MX35_P2X_PAD_LD14 = 201,
 149         150         151         152        MX2X35_PAD_D1 = 125,
 153        MX35_P2XAD_NFRE_B = 106,
 154        MX35_P2XPAD_NFALE = 107,
 155         156         157         158         159         160        MX35_P2A_PAD_LD16 = 2_LD15 = 202,
 161        MX35_P2APAD_SDQS3 = 104,
 162         163        MX35_P2AAD_NFRE_B = 106,
 164        MX35_P2APAD_NFALE = 107,
 165        MX35_P2APAD_NFCLE = 108,
 166        MX35_P2D_I2C1_CLK = 139,
 167        MX35_P2D_I2C1_DAT = 140,
 168        MX35_P2D_PAD_LD14 = 201,
 169        MX35_P2D_PAD_LD15 = 202,
 170        MX35_P2D_PAD_LD16 = 2_LD15 = 202,
 171        MX35_P2DPAD_SDQS3 = 104,
 172        MX35_P2D35_PAD_D1 = 125,
 173        MX35_P2DAD_NFRE_B = 106,
 174        MX35_P2DPAD_NFALE = 107,
 175        MX2_PAD_SRXD5 = 148,
 176        MX35_P25_PAD_SCK5 = 149,
 177        MX2PAD_STXFS5 = 150,
 178        MX35_PAD_SCKR = 151,
 179        MX335_PAD_FSR = 152,
 180        MX35_PAD_LD16 = 2_LD15 = 202,
 181        MX35PAD_SDQS3 = 104,
 182        MX3535_PAD_D1 = 125,
 183        MX35AD_NFRE_B = 106,
 184        MX2AD_TX5_RX0 = 157,
 185        MX35_P2AD_TX4_RX1 = 158,
 186        MX2P_PAD_SCK5 = 149,
 187        MX2AD_TX2_RX3 = 160,
 188        MX2A_PAD_SCKR = 151,
 189        MX2A5_PAD_FSR = 152,
 190        MX2A_PAD_LD16 = 2_LD15 = 202,
 191        MX2APAD_SDQS3 = 104,
 192        MX2A35_PAD_D1 = 125,
 193        MX2AAD_NFRE_B = 106,
 194        MX2AD_TX5_RX0 = 157,
 195        MX2AD_TX4_RX1 = 158,
 196        MX2A_PAD_SCK5 = 149,
 197        MX25_PAD_TXD1 = 170,
 198        MX25_PAD_SCKR = 151,
 199        MX255_PAD_FSR = 152,
 200        MX25_PAD_LD16 = 2_LD15 = 202,
 201        MX25PAD_SDQS3 = 104,
 202        MX2535_PAD_D1 = 125,
 203        MX25AD_NFRE_B = 106,
 204        MX25D_TX5_RX0 = 157,
 205        MX25D_TX4_RX1 = 158,
 206        MX25_PAD_SCK5 = 149,
 207        MX235_PAD_TDI = 180,
 208        MX23_PAD_SCKR = 151,
 209        MX235_PAD_FSR = 152,
 = 152,
/* s/pin register maps */ = 152,
 209     s/p_="d_reg=MX35_PAD_CSI_Ms/p_="d_regref">"> 209     s/pK" ="d_regs=MX35_PAD_CSI_Ms/pK" ="d_regsref"[]>MX{PAD_FSR = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCAPTURE__GPTsCAPIN1 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCAPTURE__GPTsCMPOUT2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCAPTURE__s="s2ef"> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCAPTURE__EPIT1_EPITO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCAPTURE__CCM_C+c32K */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCAPTURE__GPIO1_4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCOMPARE__GPTsCMPOUT> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCOMPARE__GPTsCAPIN2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCOMPARE__GPTsCMPOUT3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCOMPARE__EPIT2_EPITO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCOMPARE__GPIO1_5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCOMPARE__SDMAsEXTDMAs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasWDOG_R="_sWDOG_WDOG_B */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasWDOG_R="_sIPU_FLASH_STROBE */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasWDOG_R="_sGPIO1_6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO1_c_sGPIO1_0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO1_c_sCCM_PMIC_RDY */ = 152,
MX35_PAD_CSPI1_SS3ss="l3ne" name="L131[17]>MX"> 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO1_c_sOWIRE_LINE */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO1_c_sSDMAsEXTDMAs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO1_"_sGPIO1_> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO1_"_sPWMsPWMO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO1_"_ss="sref"2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO1_"_sSCC_TAMPER_DETECT */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO1_1_sSDMAsEXTDMAs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO2_c_sGPIO2s0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO2_c_sUSB_TOPss="srefCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO3_c_sGPIO3s0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasGPIO3_c_sUSB_TOPss="H2fCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRESET"IN_+_sCCM_RESET"IN_+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasPOR_+_sCCM_POR_+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classLKM__CCM_C+cO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classLKM__GPIO1_8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasBOOTsrefEc__CCM_BOOTsrefEs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasBOOTsrefE"__CCM_BOOTsrefEs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCLKsrefEc__CCM_C+csrefEs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCLKsrefE1__CCM_C+csrefEs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasPOWER_FAIL__CCM_DSM_WAKEUPeINT_26 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasVSTB5__CCM_VSTB5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasVSTB5__GPIO1_7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasAc__EMI_EIM_DA_Ls0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA1__EMI_EIM_DA_Ls> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA2__EMI_EIM_DA_Ls2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA3__EMI_EIM_DA_Ls3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA4__EMI_EIM_DA_Ls4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA5__EMI_EIM_DA_Ls5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA6__EMI_EIM_DA_Ls6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA7__EMI_EIM_DA_Ls7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA8__EMI_EIM_DA_H_8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA9__EMI_EIM_DA_H_9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA10__EMI_EIM_DA_H_10 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasMA10__EMI_MA10 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA11__EMI_EIM_DA_H_1> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA12__EMI_EIM_DA_H_12 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA13__EMI_EIM_DA_H_13 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA14__EMI_EIM_DA_H2_14 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA15__EMI_EIM_DA_H2_15 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA16__EMI_EIM_A_16 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA17__EMI_EIM_A_17 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA18__EMI_EIM_A_18 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA19__EMI_EIM_A_19 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA20__EMI_EIM_A_20 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA21__EMI_EIM_A_2> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA22__EMI_EIM_A_22 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA23__EMI_EIM_A_23 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA24__EMI_EIM_A_24 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasA25__EMI_EIM_A_25 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=Bs+__EMI_EIM_s=Bs+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=Bsc__EMI_EIM_s=Bs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=c__EMI_DRAM_Ds0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=+__EMI_DRAM_Ds+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=2__EMI_DRAM_Ds2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=3__EMI_DRAM_Ds3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=4__EMI_DRAM_Ds4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=5__EMI_DRAM_Ds5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=6__EMI_DRAM_Ds6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=7__EMI_DRAM_Ds7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=8__EMI_DRAM_Ds8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=9__EMI_DRAM_Ds9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=1c__EMI_DRAM_Ds10 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=1+__EMI_DRAM_Ds++ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=12__EMI_DRAM_Ds12 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=+3__EMI_DRAM_Ds13 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=14__EMI_DRAM_Ds14 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=15__EMI_DRAM_Ds15 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=16__EMI_DRAM_Ds16 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=+7__EMI_DRAM_Ds17 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=18__EMI_DRAM_Ds18 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=19__EMI_DRAM_Ds19 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=2c__EMI_DRAM_Ds20 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=2+__EMI_DRAM_Ds2> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=22__EMI_DRAM_Ds22 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=23__EMI_DRAM_Ds23 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=24__EMI_DRAM_Ds24 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=25__EMI_DRAM_Ds25 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2+__EMI_DRAM_Ds26 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2+__EMI_DRAM_Ds27 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=28__EMI_DRAM_Ds28 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=2+__EMI_DRAM_Ds29 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD3c__EMI_DRAM_Ds30 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD3"__EMI_DRAM_Ds3> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasDQMc__EMI_DRAM_DQMs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasDQM"__EMI_DRAM_DQMs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasDQM+__EMI_DRAM_DQMs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasDQM+__EMI_DRAM_DQMs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasEBc__EMI_EIM_EBc_+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasEB"__EMI_EIM_EB1_+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasOE__EMI_EIM_OE */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSc__EMI_EIM_CSc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classS"__EMI_EIM_CS> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCS"__EMI_NANDF_CE3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCS+__EMI_EIM_CS2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCS+__EMI_EIM_CS3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCS4__EMI_EIM_CS4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCS4__EMI_DTACK_+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCS4__EMI_NANDF_CE> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCS4__GPIO1_20 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classS5__EMI_EIM_CS5 */ = 152,
MX35_PAD_CSPI1_SS4ss="l4ne" name="L131[117]>MX"> 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classS5__s="s2ef"2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classS5__s="sref"2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCS5__EMI_NANDF_CE2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCS5__GPIO1_2> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNF_CEc__EMI_NANDF_CE0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNF_CEc__GPIO1_22 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasEC+__EMI_EIM_EC+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLBA__EMI_EIM_LBA */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasBCLK__EMI_EIM_BCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRW__EMI_EIM_RW */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRAS__EMI_DRAM_RAS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCAS__EMI_DRAM_CAS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=WE__EMI_DRAM_s=WE */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=CKEc__EMI_DRAM_s=CKEs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSDCKE"__EMI_DRAM_s=CKEs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSDCLK__EMI_DRAM_s=CLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=QSc__EMI_DRAM_s=QSs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" class=QS1__EMI_DRAM_s=QSs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSDQS2__EMI_DRAM_s=QSs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSDQS3__EMI_DRAM_s=QSs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFWE_+__EMI_NANDF_WE_+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFWE_+__USB_TOP_USBH2_DATAs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFWE_+__IPU_DISPB_D0_VSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFWE_+__GPIO2s18 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFWE_+__ARM11P_TOP_TRACEs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFRE_+__EMI_NANDF_RE_+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFRE_+__USB_TOP_USBH2_DIR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFRE_+__IPU_DISPB_BCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFRE_+__GPIO2s19 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFRE_+__ARM11P_TOP_TRACEs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFALE__EMI_NANDF_ALE */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFALE__USB_TOP_USBH2_STP */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFALE__IPU_DISPB_CSc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFALE__GPIO2s20 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFALE__ARM11P_TOP_TRACEs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFCLE__EMI_NANDF_CLE */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFCLE__USB_TOP_USBH2_NXT */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFCLE__IPU_DISPB_PAR_RS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFCLE__GPIO2s2> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFCLE__ARM11P_TOP_TRACEs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFWP_+__EMI_NANDF_WP_+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFWP_+__USB_TOP_USBH2_DATAs7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFWP_+__IPU_DISPB_WR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFWP_+__GPIO2s22 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFWP_+__ARM11P_TOP_TRCTL */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFR+__EMI_NANDF_R+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFR+__IPU_DISPB_RD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFR+__GPIO2s23 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasNFR+__ARM11P_TOP_TRCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=15__EMI_EIM_Ds15 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=14__EMI_EIM_Ds14 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=+3__EMI_EIM_Ds13 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=12__EMI_EIM_Ds12 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=1+__EMI_EIM_Ds1> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=1c__EMI_EIM_Ds10 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=9__EMI_EIM_Ds9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=8__EMI_EIM_Ds8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=7__EMI_EIM_Ds7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=6__EMI_EIM_Ds6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD5__EMI_EIM_Ds5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD4__EMI_EIM_Ds4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=3__EMI_EIM_Ds3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=2__EMI_EIM_Ds2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clas=+__EMI_EIM_Ds1 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasDc__EMI_EIM_Ds0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIeD+__IPU_CSIeDs8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIeD+__KPP_COLs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIeD+__GPIO1_20 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIeD+__ARM11P_TOP_EVNTBUSs13 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIs=9__IPU_CSIeDs9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIs=9__KPP_COLs1 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIeD9__GPIO1_2> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIeD9__ARM11P_TOP_EVNTBUSs14 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=1c__IPU_CSIeDs10 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIs=1c__KPP_COLs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIeD1c__GPIO1_22 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIeD1c__ARM11P_TOP_EVNTBUSs15 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=1+__IPU_CSIeDs1> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=1+__KPP_COLs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=1+__GPIO1_23 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIeD12__IPU_CSIeDs12 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIeD12__KPP_ROWs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=12__GPIO1_24 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIs=+3__IPU_CSIeDs13 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIs=+3__KPP_ROWs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=13__GPIO1_25 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=14__IPU_CSIeDs14 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIs=14__KPP_ROWs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=14__GPIO1_26 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=15__IPU_CSIeDs15 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=15__KPP_ROWs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIs=15__GPIO1_27 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIeMCLK__IPU_CSIeMCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIsMCLK__GPIO1_28 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classSIsVSYNC__IPU_CSIeVSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIsVSYNC__GPIO1_29 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIsHSYNC__IPU_CSIeHSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIsHSYNC__GPIO1_30 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIsPIXCLK__IPU_CSIePIXCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSIsPIXCLK__GPIO1_3> */ = 152,
MX35_PAD_CSPI1_SS5ss="l5ne" name="L131[217]>MX"> 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C1_CLK_sI2C1_SCL */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C1_CLK_sGPIO2s24 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C1_CLK_sCCM_USB_BYP_CLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C1_DAT_sI2C1_SDA */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C1_DAT_sGPIO2s25 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C2_CLK_sI2C2_SCL */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C2_CLK_sCAN1_TXCAN */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C2_CLK_sUSB_TOP_USBH2_PWR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C2_CLK_sGPIO2s26 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C2_CLK_sSDMA_DEBUG_BUSsDEVICEs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C2_DAT_sI2C2_SDA */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C2_DAT_sCAN1_RXCAN */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C2_DAT_sUSB_TOP_USBH2_OC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C2_DAT_sGPIO2s27 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasI2C2_DAT_sSDMA_DEBUG_BUSsDEVICEs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXD+__AUDMUX_AUD4_TXD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXD+__GPIO2s28 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXD+__ARM11P_TOP_ARM_COREASID0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classRXD+__AUDMUX_AUD4_RXD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classRXD+__GPIO2s29 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classRXD+__ARM11P_TOP_ARM_COREASID> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCK+__AUDMUX_AUD4_TXC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCK+__GPIO2s30 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCK+__ARM11P_TOP_ARM_COREASID2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXFS+__AUDMUX_AUD4_TXFS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXFS+__GPIO2s3> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXFS+__ARM11P_TOP_ARM_COREASID3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXD5__AUDMUX_AUD5_TXD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXD5__SPDIF_SPDIF_OUT> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXD5__CSPI2_MOSI */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXD5__GPIO1_0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXD5__ARM11P_TOP_ARM_COREASID4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classRXD5__AUDMUX_AUD5_RXD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classRXD5__SPDIF_SPDIF_IN> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classRXD5__CSPI2_MISO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classRXD5__GPIO1_> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classRXD5__ARM11P_TOP_ARM_COREASID5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCK5__AUDMUX_AUD5_TXC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCK5__SPDIF_SPDIF_EXTCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCK5__CSPI2_SCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCK5__GPIO1_2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCK5__ARM11P_TOP_ARM_COREASID6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXFS5__AUDMUX_AUD5_TXFS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXFS5__CSPI2_RDY */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXFS5__GPIO1_3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classTXFS5__ARM11P_TOP_ARM_COREASID7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCKR__ESAIssCKR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCKR__GPIO1_4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCKR__ARM11P_TOP_EVNTBUSs10 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasFSR__ESAIsFSR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasFSR__GPIO1_5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasFSR__ARM11P_TOP_EVNTBUSs1> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKR__ESAIsHCKR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKR__AUDMUX_AUD5_RXFS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKR__CSPI2_SS0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKR__IPU_FLASHssTROBE */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKR__GPIO1_6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKR__ARM11P_TOP_EVNTBUSs12 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCKT__ESAIssCKT */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCKT__GPIO1_7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCKT__IPU_CSIeDs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" classCKT__KPP_ROWs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasFST__ESAIsFST */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasFST__GPIO1_8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasFST__IPU_CSIeDs1 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasFST__KPP_ROWs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKT__ESAIsHCKT */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKT__AUDMUX_AUD5_RXC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKT__GPIO1_9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKT__IPU_CSIeDs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasHCKT__KPP_COLs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX5_RXc__ESAIsTX5_RXc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX5_RXc__AUDMUX_AUD4_RXC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX5_RXc__CSPI2_SS2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX5_RXc__CAN2_TXCAN */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX5_RXc__UART2_DTR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX5_RXc__GPIO1_>c */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX5_RXc__EMI_M3IF_CHOSEN_MASTERs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX4_RX+__ESAIsTX4_RX+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX4_RX+__AUDMUX_AUD4_RXFS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX4_RX+__CSPI2_SS3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX4_RX+__CAN2_RXCAN */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX4_RX+__UART2_DSR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX4_RX+__GPIO1_>+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX4_RX+__IPU_CSIeDs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX4_RX+__KPP_ROWs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX3_RX2__ESAIsTX3_RX2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX3_RX2__I2C3_SCL */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX3_RX2__EMI_NANDF_CE+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX3_RX2__GPIO1_>2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX3_RX2__IPU_CSIeDs4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX3_RX2__KPP_ROWs+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX2_RX3__ESAIsTX2_RX3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX2_RX3__I2C3_SDA */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX2_RX3__EMI_NANDF_CE2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX2_RX3__GPIO1_>3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX2_RX3__IPU_CSIeDs5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX2_RX3__KPP_COLs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX+__ESAIsTX+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX1_sCCM_PMIC_RDY */ = 152,
MX35_PAD_CSPI1_SS6ss="l6ne" name="L131[317]>MX"> 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX1_sCSPI1_SS2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX1__EMI_NANDF_CE3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX+__UART2_RI */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX+__GPIO1_>4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX+__IPU_CSIeDs6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX1_sKPP_COLs+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXc__ESAIsTX0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX0__SPDIF_SPDIF_EXTCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX0_sCSPI1_SS3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXc__EMI_DTACK_B */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXc__UART2_DCD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXc__GPIO1_>5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX0_sIPU_CSIeDs7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTX0_sKPP_COLs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_MOSI_sCSPI1_MOSI */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_MOSI_sGPIO1_>6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_MOSI_sECT_CTIsTRIG_OUT>s2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_MISO_sCSPI1_MISO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_MISO_sGPIO1_>7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_MISO_sECT_CTIsTRIG_OUT>s3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SSc_sCSPI1_SS0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SSc_sOWIRE_LINE */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SSc_sCSPI2_SS3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SSc_sGPIO1_>8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SSc_sECT_CTIsTRIG_OUT>s4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SS+_sCSPI1_SS+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SS+_sPWMsPWMO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SS1_sCCM_CLK32K */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SS+__GPIO1_>9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SS+__IPU_DIAGB_29 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SS1_sECT_CTIsTRIG_OUT>s5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SCLK_sCSPI1_SCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SCLK_sGPIO3s4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SCLK_sIPU_DIAGB_30 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SCLK_sEMI_M3IF_CHOSEN_MASTERs+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SPI_RDY_sCSPI1_RDY */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SPI_RDY_sGPIO3s5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SPI_RDY_sIPU_DIAGB_3+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCSPI1_SPI_RDY_sEMI_M3IF_CHOSEN_MASTERs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRXD+__UART1sRXD_MUX */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRXD+__CSPI2_MOSI */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRXD+__KPP_COLs4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRXD+__GPIO3s6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRXD+__ARM11P_TOP_EVNTBUSs16 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXD+__UART1sTXD_MUX */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXD+__CSPI2_MISO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXD+__KPP_COLs5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXD+__GPIO3s7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXD+__ARM11P_TOP_EVNTBUSs17 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS+__UART1sRTS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS+__CSPI2_SCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS+__I2C3_SCL */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS+__IPU_CSIeDs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS+__KPP_COLs6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS+__GPIO3s8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS+__EMI_NANDF_CE+ */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS+__ARM11P_TOP_EVNTBUSs18 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS+__UART1sCTS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS+__CSPI2_RDY */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS+__I2C3_SDA */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS+__IPU_CSIeDs1 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS+__KPP_COLs7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS+__GPIO3s9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS+__EMI_NANDF_CE2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS+__ARM11P_TOP_EVNTBUSs19 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRXD2__UART2_RXD_MUX */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRXD2__KPP_ROWs4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRXD2__GPIO3s>c */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXD2__UART2_TXD_MUX */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXD2__SPDIF_SPDIF_EXTCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXD2__KPP_ROWs5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTXD2__GPIO3s>1 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS2__UART2_RTS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS2__SPDIF_SPDIF_IN1 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS2__CAN2_RXCAN */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS2__IPU_CSIeDs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS2__KPP_ROWs6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS2__GPIO3s>2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS2__AUDMUX_AUD5_RXC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTS2__UART3_RXD_MUX */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS2__UART2_CTS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS2__SPDIF_SPDIF_OUT> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS2__CAN2_TXCAN */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS2__IPU_CSIeDs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS2__KPP_ROWs7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS2__GPIO3s>3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS2__AUDMUX_AUD5_RXFS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCTS2__UART3_TXD_MUX */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasRTCK__ARM11P_TOP_RTCK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTCK__SJC_TCK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTMS__SJC_TMS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTDI__SJC_TDI */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTDO__SJC_TDO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasTRSTB__SJC_TRSTB */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasDE_B__SJC_DE_B */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSJC_MOD_sSJC_MOD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasUSBOTG_PWR_sUSB_TOP_USBOTG_PWR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasUSBOTG_PWR_sUSB_TOP_USBH2_PWR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasUSBOTG_PWR_sGPIO3s>4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasUSBOTG_OC_sUSB_TOP_USBOTG_OC */ = 152,
MX35_PAD_CSPI1_SS7ss="l7ne" name="L131[417]>MX"> 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasUSBOTG_OC_sUSB_TOP_USBH2_OC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasUSBOTG_OC_sGPIO3s>5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLDc_sIPU_DISPB_DATs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLDc_sGPIO2s0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLDc_sSDMAsSDMAsDEBUG_PCs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD1_sIPU_DISPB_DATs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD+__GPIO2s> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD1_sSDMAsSDMAsDEBUG_PCs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD2_sIPU_DISPB_DATs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD2_sGPIO2s2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD2_sSDMAsSDMAsDEBUG_PCs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD3_sIPU_DISPB_DATs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD3_sGPIO2s3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD3_sSDMAsSDMAsDEBUG_PCs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD4_sIPU_DISPB_DATs4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD4_sGPIO2s4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD4_sSDMAsSDMAsDEBUG_PCs4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD5_sIPU_DISPB_DATs5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD5_sGPIO2s5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD5_sSDMAsSDMAsDEBUG_PCs5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD6_sIPU_DISPB_DATs6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD6_sGPIO2s6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD6_sSDMAsSDMAsDEBUG_PCs6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD7_sIPU_DISPB_DATs7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD7_sGPIO2s7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD7_sSDMAsSDMAsDEBUG_PCs7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD8_sIPU_DISPB_DATs8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD8_sGPIO2s8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD8_sSDMAsSDMAsDEBUG_PCs8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD9_sIPU_DISPB_DATs9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD9_sGPIO2s9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD9_sSDMAsSDMAsDEBUG_PCs9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD1c_sIPU_DISPB_DATs>c */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD1c_sGPIO2s>c */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD1c_sSDMAsSDMAsDEBUG_PCs>c */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD11_sIPU_DISPB_DATs>> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD11_sGPIO2s>> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD11_sSDMAsSDMAsDEBUG_PCs>> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD11_sARM11P_TOP_TRACEs4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD12_sIPU_DISPB_DATs>2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD+2_sGPIO2s>2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD12_sSDMAsSDMAsDEBUG_PCs>2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD12_sARM11P_TOP_TRACEs5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD13_sIPU_DISPB_DATs>3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD13_sGPIO2s>3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD13_sSDMAsSDMAsDEBUG_PCs>3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD13_sARM11P_TOP_TRACEs6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD14_sIPU_DISPB_DATs>4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD14_sGPIO2s>4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD14_sSDMAsSDMAsDEBUG_EVENT_CHANNELs0 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD14_sARM11P_TOP_TRACEs7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD15_sIPU_DISPB_DATs>5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD15_sGPIO2s>5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD15_sSDMAsSDMAsDEBUG_EVENT_CHANNELs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD15_sARM11P_TOP_TRACEs8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD16_sIPU_DISPB_DATs16 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD16_sIPU_DISPB_D12_VSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD+6_sGPIO2s16 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD16_sSDMAsSDMAsDEBUG_EVENT_CHANNELs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD16_sARM11P_TOP_TRACEs9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD17_sIPU_DISPB_DATs17 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD17_sIPU_DISPB_CS2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD17_sGPIO2s17 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD17_sSDMAsSDMAsDEBUG_EVENT_CHANNELs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD17_sARM11P_TOP_TRACEs>c */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD18_sIPU_DISPB_DATs18 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD18_sIPU_DISPB_D0_VSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD18_sIPU_DISPB_D12_VSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD18_sESDHC3_CMD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD18_sUSB_TOP_USBOTG_DATAs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD18_sGPIO3s24 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD18_sSDMAsSDMAsDEBUG_EVENT_CHANNELs4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD18_sARM11P_TOP_TRACEs>> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD19_sIPU_DISPB_DATs19 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD19_sIPU_DISPB_BCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD19_sIPU_DISPB_CS> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD+9_sESDHC3_CLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD+9_sUSB_TOP_USBOTG_DIR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD19_sGPIO3s25 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD19_sSDMAsSDMAsDEBUG_EVENT_CHANNELs5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD19_sARM11P_TOP_TRACEs>2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD2c_sIPU_DISPB_DATs2c */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD2c_sIPU_DISPB_CSc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD2c_sIPU_DISPB_SD_CLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD2c_sESDHC3_DATc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD20_sGPIO3s26 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD2c_sSDMAsSDMAsDEBUG_CORE_STATUSs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD2c_sARM11P_TOP_TRACEs>3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD21_sIPU_DISPB_DATs2> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD21_sIPU_DISPB_PAR_RS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD21_sIPU_DISPB_SER_RS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD21_sESDHC3_DAT> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD21_sUSB_TOP_USBOTG_STP */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD21_sGPIO3s27 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD21_sSDMAsDEBUG_EVENT_CHANNELsSEL */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD21_sARM11P_TOP_TRACEs>4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD22_sIPU_DISPB_DATs22 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD22_sIPU_DISPB_WR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD22_sIPU_DISPB_SD_D_I */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD22_sESDHC3_DAT2 */ = 152,
MX35_PAD_CSPI1_SS8ss="l8ne" name="L131[517]>MX"> 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD22_sUSB_TOP_USBOTG_NXT */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD22_sGPIO3s28 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD22_sSDMAsDEBUG_BUS_ERROR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD22_sARM11P_TOP_TRCTL */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD23_sIPU_DISPB_DATs23 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD23_sIPU_DISPB_RD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD23_sIPU_DISPB_SD_D_IO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD23_sESDHC3_DAT3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD23_sUSB_TOP_USBOTG_DATAs7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD23_sGPIO3s29 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD23_sSDMAsDEBUG_MATCHED_DMBUS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasLD23_sARM11P_TOP_TRCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_HSYNC_sIPU_DISPB_D3_HSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_HSYNC_sIPU_DISPB_SD_D_IO */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_HSYNC_sGPIO3s3c */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_HSYNC_sSDMAsDEBUG_RTBUFFER_WRITE */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_HSYNC_sARM11P_TOP_TRACEs>5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_FPSHIFT_sIPU_DISPB_D3_CLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_FPSHIFT_sIPU_DISPB_SD_CLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_FPSHIFT_sGPIO3s3> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_FPSHIFT_sSDMAsSDMAsDEBUG_CORE_STATUSsc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_FPSHIFT_sARM11P_TOP_TRACEs>6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_DRDY_sIPU_DISPB_D3_DRDY */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_DRDY_sIPU_DISPB_SD_D_O */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_DRDY_sGPIO1sc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_DRDY_sSDMAsSDMAsDEBUG_CORE_STATUSs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_DRDY_sARM11P_TOP_TRACEs>7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCONTRAST_sIPU_DISPB_CONTR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCONTRAST_sGPIO1s> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCONTRAST_sSDMAsSDMAsDEBUG_CORE_STATUSs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasCONTRAST_sARM11P_TOP_TRACEs>8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_VSYNC_sIPU_DISPB_D3_VSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_VSYNC_sIPU_DISPB_CS> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_VSYNC_sGPIO1s2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_VSYNC_sSDMAsDEBUG_YIELD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_VSYNC_sARM11P_TOP_TRACEs>9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_REV_sIPU_DISPB_D3_REV */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_REV_sIPU_DISPB_SER_RS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_REV_sGPIO1s3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_REV_sSDMAsDEBUG_BUS_RWB */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_REV_sARM11P_TOP_TRACEs2c */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_CLS_sIPU_DISPB_D3_CLS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_CLS_sIPU_DISPB_CS2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_CLS_sGPIO1s4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_CLS_sSDMAsDEBUG_BUS_DEVICEsc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_CLS_sARM11P_TOP_TRACEs2> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_SPL_sIPU_DISPB_D3_SPL */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_SPL_sIPU_DISPB_D12_VSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_SPL_sGPIO1s5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_SPL_sSDMAsDEBUG_BUS_DEVICEs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasD3_SPL_sARM11P_TOP_TRACEs22 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CMD_sESDHC1_CMD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CMD_sMSHC_SCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CMD_sIPU_DISPB_D0_VSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CMD_sUSB_TOP_USBOTG_DATAs4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CMD_sGPIO1s6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CMD_sARM11P_TOP_TRCTL */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CLK_sESDHC1_CLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CLK_sMSHC_BS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CLK_sIPU_DISPB_BCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CLK_sUSB_TOP_USBOTG_DATAs5 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CLK_sGPIO1s7 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_CLK_sARM11P_TOP_TRCLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATAc_sESDHC1_DATc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATAc_sMSHC_DATAsc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATAc_sIPU_DISPB_CSc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATAc_sUSB_TOP_USBOTG_DATAs6 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATAc_sGPIO1s8 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATAc_sARM11P_TOP_TRACEs23 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA+_sESDHC1_DAT> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA1_sMSHC_DATAs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA1_sIPU_DISPB_PAR_RS */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA1_sUSB_TOP_USBOTG_DATAsc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA1_sGPIO1s9 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA1_sARM11P_TOP_TRACEs24 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA2_sESDHC1_DAT2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA2_sMSHC_DATAs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA2_sIPU_DISPB_WR */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA2_sUSB_TOP_USBOTG_DATAs> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA2_sGPIO1s>c */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA2_sARM11P_TOP_TRACEs25 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA3_sESDHC1_DAT3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA3_sMSHC_DATAs3 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA3_sIPU_DISPB_RD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA3_sUSB_TOP_USBOTG_DATAs2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA3_sGPIO1s>> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD1_DATA3_sARM11P_TOP_TRACEs26 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2_CMD_sESDHC2_CMD */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2_CMD_sI2C3_SCL */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2_CMD_sESDHC1_DAT4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2_CMD_sIPU_CSI_Ds2 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2_CMD_sUSB_TOP_USBH2_DATAs4 */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2_CMD_sGPIO2sc */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2_CMD_sSPDIFsSPDIFsOUT> */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2_CMD_sIPU_DISPB_D12_VSYNC */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSD2_CLK_sESDHC2_CLK */ = 152,
 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_PIN_REG" na("> 209        /* CLK" clasSDctrl922_ctrl-i8x35.c#L230" id="L230" cl8ss="l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613]_PIN_REG" na    209     a8]>MX"> 209     IMX_PIN_REG=MX35_PAD_I2C2_IMX_P82_IMX_316ac 0x240, 7, 0x0, 0), /* CLK" clasS2CLK" clas2D2_CMD_sESDHC2_CMD */ = 152,1 _REG" na    209  ("> 209        /* CL3* CLK" cl3sSD2_CMD_sI2C3_SCL */ = 152,1 _REG" na    209  ("> 20e09        /* CLK" clasS3LK" clasS32_CMD_sESDHC1_DAT4 */ = 152,1 _REG" na    209  ("> 209        /* CLK" clasSD13LK" clasS32_CMD_sIPU_CSI_Ds2 */ = 152,1 _REG" na    209  ("> 299        /* CLK" clasSD13D2_CMD_sU3B_TOP_USBH2_DATAs4 */ = 152,1 _REG" na    209  209        /* 93/* CLK" c3asSD2_CMD_sGPIO2sc */ = 152,2 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> 209        /* C93lasSD2_CM3_sSPDIFsSPDIFsOUT> */ = 152,2 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> ("> 20a        /* C93SD2_CMD_s3PU_DISPB_D12_VSYNC */ = 152,2 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5">    a8]>        /* CLK" clasS3CLK" clas3D2_CLK_sESDHC2_CLK */ = 152,2 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> ("> 204        /* CLK" clas3* CLK" cl3sSDctrl922_ctrl-i8x35.c#3230" 3d="L230" cl8ss=2l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613]_PI 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> ("> 20e        /* CLK" clasS3CLK" clas3D2_CMD_sESDHC2_CMD */ = 152,2 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> ("> 20c        /* 94* CLK" cl4sSD2_CMD_sI2C3_SCL */ = 152,2 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> ("> 2994/a>        /*4LK" clasS42_CMD_sESDHC1_DAT4 */ = 152,2 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> 209        /* CL4LK" clasS42_CMD_sIPU_CSI_Ds2 */ = 152,2 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> 209        /* C94D2_CMD_sU4B_TOP_USBH2_DATAs4 */ = 152,2 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5">    a8]1a>         = 152,3 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> ("> 204        /* CLK" clasS4lasSD2_CM4_sSPDIFsSPDIFsOUT> */ = 152,3 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> ("> 20c        /* C94SD2_CMD_s4PU_DISPB_D12_VSYNC */ = 152,3 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bEG" na5"> ("> 20c09        /* CL4CLK" clas4D2_CLK_sESDHC2_CLK */ = 152,3 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bIN_REG5 na("> 209        /* CL4* CLK" cl4sSDctrl922_ctrl-i8x35.c#4230" 4d="L230" cl8ss=3l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613]_PI 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bIN_REG5 na("> 209        /* CLK" cl4CLK" clas4D2_CMD_sESDHC2_CMD */ = 152,3 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bIN_REG5 na   a87ca>        /* CLK" cl5* CLK" cl5sSD2_CMD_sI2C3_SCL */ = 152,3 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bIN_REG5 na("> 204a>        /* CLK" clasS5LK" clasS52_CMD_sESDHC1_DAT4 */ = 152,3 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bIN_REG5 na("> 20909        /* CL5LK" clasS52_CMD_sIPU_CSI_Ds2 */ = 152,3 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_bIN_REG5 na("> 20d        /* CLK" clas5D2_CMD_sU5B_TOP_USBH2_DATAs4 */ = 152,3 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_c 209 209        /* CL5/* CLK" c5asSD2_CMD_sGPIO2sc */ = 152,4 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_c 209        /* CLK" cl5lasSD2_CM5_sSPDIFsSPDIFsOUT> */ = 152,4 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_c 209 209        /* CLK" cl5SD2_CMD_s5PU_DISPB_D12_VSYNC */ = 152,4 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_c 209 20409         = 152,4 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_c 209 209        /* CL5* CLK" cl5sSDctrl922_ctrl-i8x35.c#5230" 5d="L230" cl8ss=4l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613]_PI 209     IMX_PIN_REG=MX35_P2D_I2C2_IMX_PIN_c 209 20d        /* CLK" clasS5CLK" clas5D2_CMD_sESDHC2_CMD */ = 152,4 209        /* CLK" clasS6* CLK" cl6sSD2_CMD_sI2C3_SCL */ = 152,4 209        /* CL6LK" clasS62_CMD_sESDHC1_DAT4 */ = 152,4 209        /* CL96LK" clasS62_CMD_sIPU_CSI_Ds2 */ = 152,4 ("> 20da>        /* CLK" clasS6D2_CMD_sU6B_TOP_USBH2_DATAs4 */ = 152,4 ("> 209        /* C96/* CLK" c6asSD2_CMD_sGPIO2sc */ = 152,5 209        /* C96lasSD2_CM6_sSPDIFsSPDIFsOUT> */ = 152,5 209        /* CL96SD2_CMD_s6PU_DISPB_D12_VSYNC */ = 152,5 209        /* 96CLK" clas6D2_CLK_sESDHC2_CLK */ = 152,5 EG" n7f        /* C96* CLK" cl6sSDctrl922_ctrl-i8x35.c#6230" 6d="L230" cl8ss=5l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, CS     IMX_PIN_REG=MX35ac, CS<_IMX_PIN_cEG" na6"> ("> 20d09         = 152,5 ("> 209        /* CL97* CLK" cl7sSD2_CMD_sI2C3_SCL */ = 152,5 209        /* CL97LK" clasS72_CMD_sESDHC1_DAT4 */ = 152,5 209        /* CL97LK" clasS72_CMD_sIPU_CSI_Ds2 */ = 152,5/* C97D2_CMD_sU7B_TOP_USBH2_DATAs4 */ = 152,5 c        /* CL97/* CLK" c7asSD2_CMD_sGPIO2sc */ = 152,6/* C97lasSD2_CM7_sSPDIFsSPDIFsOUT> */ = 152,6/* CL97SD2_CMD_s7PU_DISPB_D12_VSYNC */ = 152,6 20e        97CLK" clas7D2_CLK_sESDHC2_CLK */ = 152,6 209        /* 97* CLK" cl7sSDctrl922_ctrl-i8x35.c#7230" 7d="L230" cl8ss=6l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, DIOR/a>     IMX_PIN_REG=MX35ac, DIOR_IMX_PIN_cIN_REG6 na209        /* 97CLK" clas7D2_CMD_sESDHC2_CMD */ = 152,6 209        /* 98* CLK" cl8sSD2_CMD_sI2C3_SCL */ = 152,6/* CL98LK" clasS82_CMD_sESDHC1_DAT4 */ = 152,6 209        /* CL98LK" clasS82_CMD_sIPU_CSI_Ds2 */ = 152,6/* CL98D2_CMD_sU8B_TOP_USBH2_DATAs4 */ = 152,6        /* CL98/* CLK" c8asSD2_CMD_sGPIO2sc */ = 152,7 20e        /8lasSD2_CM8_sSPDIFsSPDIFsOUT> */ = 152,7 209        /* CL8SD2_CMD_s8PU_DISPB_D12_VSYNC */ = 152,7/* CL8CLK" clas8D2_CLK_sESDHC2_CLK */ = 152,7 209        /* CL8* CLK" cl8sSDctrl922_ctrl-i8x35.c#8230" 8d="L230" cl8ss=7l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, DMACREG" na    1  a8]2        /* 98CLK" clas8D2_CMD_sESDHC2_CMD */ = 152,7 na("> ca>        /* 99* CLK" cl9sSD2_CMD_sI2C3_SCL */ = 152,7 EG" n7e        /* 99LK" clasS92_CMD_sESDHC1_DAT4 */ = 152,7 ("> 20909        /* C99LK" clasS92_CMD_sIPU_CSI_Ds2 */ = 152,7 ("> 209        /* CLK" clas9D2_CMD_sU9B_TOP_USBH2_DATAs4 */ = 152,7 209        /* C99/* CLK" c9asSD2_CMD_sGPIO2sc */ = 152,8 209        /* C99lasSD2_CM9_sSPDIFsSPDIFsOUT> */ = 152,8 1  a8]2a>        /* CL9SD2_CMD_s9PU_DISPB_D12_VSYNC */ = 152,8 na("> a        /* CLK" clasSD19CLK" clas9D2_CLK_sESDHC2_CLK */ = 152,8 209        /* 99* CLK" cl9sSDctrl922_ctrl-i8x35.c#9230" 9d="L230" cl8ss=8l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, RESET_BEG" na    EG" n7e4/a>        /* 99CLK" clas9D2_CMD_sESDHC2_CMD */ = 152,8 ("> 207        /* CL100* CLK" c100* CCMD_sESDHC2_CMD */100*FSR = 152,8 ("> 209        
0, 2, 0x0, 0), /* CL1001 CLK" c1002_CMD_sESDHC1_DAT4 */100_FSR = 152,8 209        /* CL1002 CLK" c1002_CMD_sIPU_CSI_Ds2 */100_FSR = 152,8 209        /* CL1003 CLK" c100B_TOP_USBH2_DATAs4 */100_FSR = 152,8        /* CLK" cla1004 CLK" c100asSD2_CMD_sGPIO2sc */100_FSR = 152,9 aa>        /* CLK" clasSD1005 CLK" c100_sSPDIFsSPDIFsOUT> */100_FSR = 152,9 202c/a>        /* 1006 CLK" c100PU_DISPB_D12_VSYNC */100_FSR = 152,9        /* CLK" cla1007 CLK" c100D2_CLK_sESDHC2_CLK */100_FSR = 152,9 207        /* 1008 CLK" c100sSDctrl922_ctrl-i8x35.c100sS>100d="L230" cl8ss=9l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, IORDYEG" na    209        /* CLK" clas1009 CLK" c100D2_CMD_sESDHC2_CMD */100_FSR = 152,9        /* 101* CLK" c101* CCMD_sESDHC2_CMD */101*FSR = 152,9 209        /* CLK" clasSD1011 CLK" c1012_CMD_sESDHC1_DAT4 */101_FSR = 152,9/* CLK" clas1012 CLK" c1012_CMD_sIPU_CSI_Ds2 */101_FSR = 152,9 a09        /* CLK" clasSD1013 CLK" c101B_TOP_USBH2_DATAs4 */101_FSR = 152,9 202 na4a>        /* CLK" cl1014 CLK" c101asSD2_CMD_sGPIO2sc */101_FSR = 15270/* CLK" clas1015 CLK" c101_sSPDIFsSPDIFsOUT> */1015FSR = 15270 207a>        /* C1016 CLK" c101PU_DISPB_D12_VSYNC */1016FSR = 15270 209        1017FSR = 15270/* C1018 CLK" c101sSDctrl922_ctrl-i8x35.c101sS>1018FSR = 15270l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, DA09     IMX_PIN_REG=MX35ac, DA09<_IMX_PIN_eEG" na8"> 209        /* CLK" clasSD1019 CLK" c101D2_CMD_sESDHC2_CMD */1019FSR = 15270 209        /* CLK" clas102* CLK" c102* CCMD_sESDHC2_CMD */1020FSR = 15270 na("> b        /* C1021 CLK" c1022_CMD_sESDHC1_DAT4 */1021FSR = 15270 209        /1022 CLK" c1022_CMD_sIPU_CSI_Ds2 */1022FSR = 15270 409        /* CLK" clas1023 CLK" c102B_TOP_USBH2_DATAs4 */1023FSR = 15270 ("> 20709        /* CLK" cla1024 CLK" c102asSD2_CMD_sGPIO2sc */102_FSR = 15271 ("> 209        1025 CLK" c102_sSPDIFsSPDIFsOUT> */1025FSR = 15271 209        1026FSR = 15271 209        /* CLK" clasSD1027 CLK" c102D2_CLK_sESDHC2_CLK */1027FSR = 15271 209        1028FSR = 15271l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, DA09     IMX_PIN_REG=MX35ac, DA09<_IMX_PIN_eEG" na8"> na("> b        /* CLK" cla1029 CLK" c102D2_CMD_sESDHC2_CMD */1029FSR = 15271 209        /* CLK" c103* CLK" c103* CCMD_sESDHC2_CMD */1030FSR = 15271 409        1031FSR = 15271 ("> 208        /* CLK" clas1032 CLK" c1032_CMD_sIPU_CSI_Ds2 */1032FSR = 15271 ("> 209        1033 CLK" c103B_TOP_USBH2_DATAs4 */1033FSR = 15271 209        1034 CLK" c103asSD2_CMD_sGPIO2sc */103_FSR = 15272 209        /* C1035 CLK" c103_sSPDIFsSPDIFsOUT> */1035FSR = 15272/1036 CLK" c103PU_DISPB_D12_VSYNC */1036FSR = 15272 ba>        /* CLK" clas1037 CLK" c103D2_CLK_sESDHC2_CLK */1037FSR = 15272        /1038 CLK" c103sSDctrl922_ctrl-i8x35.c103sS>1038FSR = 15272l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, DA09     IMX_PIN_REG=MX35ac, DA09<_IMX_PIN_eIN_REG8 na("> 208        /* CLK" clas1039 CLK" c103D2_CMD_sESDHC2_CMD */1039FSR = 15272 209        /* CLK" clasSD104* CLK" c104* CCMD_sESDHC2_CMD */1040FSR = 152721041 CLK" c1042_CMD_sESDHC1_DAT4 */1041FSR = 15272 209        /* CLK" cla1042 CLK" c1042_CMD_sIPU_CSI_Ds2 */1042FSR = 15272/* CLK" cla1043 CLK" c104B_TOP_USBH2_DATAs4 */1043FSR = 15272 b09        /* CLK" clas1044 CLK" c104asSD2_CMD_sGPIO2sc */104_FSR = 15273 208a>         */1045FSR = 15273 209        /* CLK" clasSD1046 CLK" c104PU_DISPB_D12_VSYNC */1046FSR = 15273/* CLK" clasSD1047 CLK" c104D2_CLK_sESDHC2_CLK */1047FSR = 15273 209        /* CLK" clas1048 CLK" c104sSDctrl922_ctrl-i8x35.c104sS>1048FSR = 15273l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, DA095/a>     IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9"> na("> c        1049FSR = 15273 ("> 20809        105* CLK" c105* CCMD_sESDHC2_CMD */1050FSR = 15273 ("> 209        /* CLK" clasSD1051 CLK" c1052_CMD_sESDHC1_DAT4 */1051FSR = 15273 209        /* CLK" clasSD1052 CLK" c1052_CMD_sIPU_CSI_Ds2 */1052FSR = 15273 209        /* CLK" clas1053 CLK" c105B_TOP_USBH2_DATAs4 */1053FSR = 15273 209        /* CLK" clas1054 CLK" c105asSD2_CMD_sGPIO2sc */105_FSR = 15274 na("> 209        /* CL1055 CLK" c105_sSPDIFsSPDIFsOUT> */1055FSR = 15274 209/* CLK" cla1056 CLK" c105PU_DISPB_D12_VSYNC */1056FSR = 15274 ("> 209        1057 CLK" c105D2_CLK_sESDHC2_CLK */1057FSR = 15274 ("> 209        /* C1058 CLK" c105sSDctrl922_ctrl-i8x35.c105sS>1058FSR = 15274l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, DA097/a>     IMX_PIN_REG=MX35ac, DA097_IMX_PIN_fIN_REG9 na("> 209        1059FSR = 15274/* CLK" clas106* CLK" c106* CCMD_sESDHC2_CMD */1060FSR = 15274 209        /* CL1061 CLK" c1062_CMD_sESDHC1_DAT4 */1061FSR = 15274/* CLK" cla1062 CLK" c1062_CMD_sIPU_CSI_Ds2 */1062FSR = 15274 209a>        /* CLK" clasSD1063 CLK" c106B_TOP_USBH2_DATAs4 */1063FSR = 15274 209        /* CLK" cla1064 CLK" c106asSD2_CMD_sGPIO2sc */106_FSR = 15275 209        1065 CLK" c106_sSPDIFsSPDIFsOUT> */1065FSR = 15275/* CLK" c1066 CLK" c106PU_DISPB_D12_VSYNC */1066FSR = 15275 209        /* CL1067 CLK" c106D2_CLK_sESDHC2_CLK */1067FSR = 15275/* CLK" cl1068 CLK" c106sSDctrl922_ctrl-i8x35.c106sS>1068FSR = 15275l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, DA098/a>     IMX_PIN_REG=MX35ac, DA098_IMX_PIN70 209 20909        /* CLK" clasSD1069 CLK" c106D2_CMD_sESDHC2_CMD */1069FSR = 15275 209        /* CLK" clas107* CLK" c107* CCMD_sESDHC2_CMD */1070FSR = 15275 209        1071 CLK" c1072_CMD_sESDHC1_DAT4 */1071FSR = 15275 209        /* CLK" c1072 CLK" c1072_CMD_sIPU_CSI_Ds2 */1072FSR = 15275 na("> 209        /* CLK" cla1073 CLK" c107B_TOP_USBH2_DATAs4 */1073FSR = 15275 209/* CLK" c1074 CLK" c107asSD2_CMD_sGPIO2sc */107_FSR = 15276 ("> 20a        /* CLK" clasSD1075 CLK" c107_sSPDIFsSPDIFsOUT> */1075FSR = 15276 ("> 209        /* CLK" clas1076 CLK" c107PU_DISPB_D12_VSYNC */1076FSR = 15276 209        /* CLK" clasSD1077 CLK" c107D2_CLK_sESDHC2_CLK */1077FSR = 15276 209        /* CLK" clasSD1078 CLK" c107sSDctrl922_ctrl-i8x35.c107sS>1078FSR = 15276l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, DA09<     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa"> 209        /* CLK" cl1079 CLK" c107D2_CMD_sESDHC2_CMD */1079FSR = 15276 ("> 20a        /* C108* CLK" c108* CCMD_sESDHC2_CMD */1080FSR = 15276 ("> 209        1081FSR = 15276 209        /* CLK" clasSD1082 CLK" c1082_CMD_sIPU_CSI_Ds2 */1082FSR = 15276/* CLK" clasSD1083 CLK" c108B_TOP_USBH2_DATAs4 */1083FSR = 15276/* CLK" c1084 CLK" c108asSD2_CMD_sGPIO2sc */108_FSR = 15277 20aa>        /* CLK" cla1085 CLK" c108_sSPDIFsSPDIFsOUT> */1085FSR = 15277 209        1086 CLK" c108PU_DISPB_D12_VSYNC */1086FSR = 15277 209        /* CLK" clasSD1087 CLK" c108D2_CLK_sESDHC2_CLK */1087FSR = 15277/* CLK" clasSD1088 CLK" c108sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), /* CLK" clasD3_C> 209O8-i9235.c#8L204[613ac, DA09<     IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209 20a09        /* CLK" clas1089 CLK" c108D2_CMD_sESDHC2_CMD */1089FSR = 15277 209        109* CLK" c109* CCMD_sESDHC2_CMD */1090FSR = 15277 209        /* C1091 CLK" c1092_CMD_sESDHC1_DAT4 */1091FSR = 15277 209        /* C1092 CLK" c1092_CMD_sIPU_CSI_Ds2 */1092FSR = 15277 ("> 20b        /* CLK" clas1093 CLK" c109B_TOP_USBH2_DATAs4 */1093FSR = 15277 ("> 209        /* CLK" clasSD1094 CLK" c109asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi9235.c#L206" id="L206" cl92s="l914 name="L204[606]bac, DA091     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" 9 29        /* CLK" cla8085 CLK" c108_sSPDIFsSPDIFsOUT> */1085FSR = 15277     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" na9        8086 CLK" c108PU_DISPB_D12_VSYNC */1086FSR = 15277     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" na98086 CLK" c108PU_Dx9ac, 0), 5ac, DA091<_IMX_28href="driverslasSD1087 CLK" c188D2_CLK_sESDHC2_CLK */1087FSR = 15277     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa"> ("> 20a a>       DATA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 09x9ac, 0), 9span.c#L212"comment">/* C9K" cl9sSD1088 CLK" c188sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), /" id="L206" cl92s="l914 name="L204[606]bac,c, DA07/a>     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab"> ("> 2009            /*9CLK" 9las1089 CLK" c188D2_CMD_sESDHC2_CMD */1089FSR = 15277 20a>        /100,>/100as1089 CLK" c189* CCMD_sESDHC2_CMD */1090FSR = 15277          /10* C1091 CLK" c1892_CMD_sESDHC1_DAT4 */1091FSR = 15277/10* C1092 CLK" c1892_CMD_sIPU_CSI_Ds2 */1092FSR = 15277 20aa09   DATA3code=MX35_PAD_CTac, DAas2_TaDATA3" na,TRACE_2na, 0x103, 0x23c,10 /10 <>/10las1093 CLK" c189B_TOP_USBH2_DATAs4 */1093FSR = 15277 ("> 2009       a hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,104, 0x23c,10span.c#L212"comment">/* 10sp>/10sSD1094 CLK" c199asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi9235.cINTRQ id="L201" cl92s="l921" nameINTRQ606]bac,c2A09<     IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 20910, >/10cla8085 CLK" c198_sSPDIFsSPDIFsOUT> */1085FSR = 15277     IMX_8IN_REG=MX35ac, DA0913_IMX_PIN71EG" nab"> 209INTRQ_a       hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,106, 0x23c,10, 0x860, 2), 9span.9#L2110, >/10t">8086 CLK" c198PU_DISPB_D12_VSYNC */1086FSR = 15277     IMX__PIN_REG=MX35ac, DA097_IMX_PIN_fIN_REG9 na209INTRQ_aPP_M na3 hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,107, 0x23c,10ac, DA091<_IMX_28href="d10ac>/10sSD1087 CLK" c198D2_CLK_sESDHC2_CLK */1087FSR = 15277     IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209INTRQ_a/a>   Da hreSD2_CMDcode=MX35_PAD_ac, DASD12_T3_VSYNAGB 1na, 0x108, 0x23c,10span.c#L212"comment">/* 10sp>/10sSD1088 CLK" c198sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0),      IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab"> (INTRQ_a      areSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a" 9, 0x23c,10 /10 <>/10las1089 CLK" c198D2_CMD_sESDHC2_CMD */1089FSR = 15277     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab"> 2BUFF_EN_b"> 2BUFFER_ENeSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a"10, 0x23c,110, pan.c#L212"comment">/110,>/110as1089 CLK" c199* CCMD_sESDHC2_CMD */1090FSR = 15277     IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209      reSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a"11, 0x23c,110x0, 0), /11* C1091 CLK" c1992_CMD_sESDHC1_DAT4 */1091FSR = 15277     IMX_cPIN_REG=MX35ac, DA097_IMX_PIN_fIN_REG9 na209BUFF_EN_bPP_M na3reSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a"12, 0x23c,110x0, 0), /11* C1092 CLK" c1992_CMD_sIPU_CSI_Ds2 */1092FSR = 15277     IMXcPIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa"> (">BUFF_EN_b/a>   DATA3code=MX35_PAD_CTac, DAas4_TaDATA3" na,TRACE_33c, 4,113, 0x23c,11 /11 <>/11las1093 CLK" c199B_TOP_USBH2_DATAs4 */1093FSR = 15277     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab"> (BUFF_EN_b      a/* 11sp>/11sSD1094 CLK" c809asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi9235.c#MARQ id="L201" cl92s="l921" name#MARQ606]bac,c2 DA07/c>     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" 911, >/115SD1094 CLK" c808_sSPDIFsSPDIFsOUT> */1085FSR = 15277     IMX4PIN_REG=MX35ac, DA0910_IMX_PIN70EG" na9      /116SD1094 CLK" c808PU_DISPB_D12_VSYNC */1086FSR = 15277     IMX5PIN_REG=MX35ac, DA0910_IMX_PIN70EG" na98086 CLK" c108PU117, 0x23c,11ac, DA091<_IMX_28href="d11ac>/117SD1094 CLK" c808D2_CLK_sESDHC2_CLK */1087FSR = 15277     IMXcPIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGa na("> MARQ_//a>   D    /* 11sp>/118SD1094 CLK" c808sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0),      IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab"> ("MARQ_/      a/11 <>/119SD1094 CLK" c808D2_CMD_sESDHC2_CMD */1089FSR = 15277      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9"> 20MARQ_/ECT_CTI_TRIG(IN1 /120,>/120SD1094 CLK" c809* CCMD_sESDHC2_CMD */1090FSR = 15277>        38, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU121, 0x23c,120x0, 0), /121SD1094 CLK" c8092_CMD_sESDHC1_DAT4 */1091FSR = 15277      /122SD1094 CLK" c8092_CMD_sIPU_CSI_Ds2 */1092FSR = 15277/12 <>/123SD1094 CLK" c809B_TOP_USBH2_DATAs4 */1093FSR = 15277 2       338, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU124, 0x23c,12span.c#L212"comment">/* 12sp>/12sSD1094 CLK" c819asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi9235.c#L id="L200" cl92s="l920" name="L[606]>ac, 2A09<     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab"> (">9         hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244125, 0x23c,12, 12, >/125SD1094 CLK" c818_sSPDIFsSPDIFsOUT> */1085FSR = 15277 2090_/ECT_CTI_TRIG(IN1 /126SD1094 CLK" c818PU_DISPB_D12_VSYNC */1086FSR = 152779    3    1087FSR = 15277/* 12sp>/128SD1094 CLK" c818sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), /12 <>/129SD1094 CLK" c818D2_CMD_sESDHC2_CMD */1089FSR = 152779/130,>/130SD1094 CLK" c819* CCMD_sESDHC2_CMD */1090FSR = 15277 (">9        DATA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 131, 0x23c,130x0, 0), /131SD1094 CLK" c8192_CMD_sESDHC1_DAT4 */1091FSR = 15277 2091_/ECT_CTI_TRIG(IN1 hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244132, 0x23c,130x0, 0), /132SD1094 CLK" c8192_CMD_sIPU_CSI_Ds2 */1092FSR = 15277 2099    3 hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,133, 0x23c,13 /13 <>/133SD1094 CLK" c819B_TOP_USBH2_DATAs4 */1093FSR = 15277/* 13sp>/13sSD1094 CLK" c829asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi9235.c#L id="L199" cl9135"l919" name="L[605]>ac, 3A09<     IMX5cPIN_REG=MX35ac, DA097_IMX_PIN_fIN_REG9 na20909913, >/135SD1094 CLK" c828_sSPDIFsSPDIFsOUT> */1085FSR = 152772/136SD1094 CLK" c828PU_DISPB_D12_VSYNC */1086FSR = 15277 (">9        DATA3code=MX35_PAD_CTac, DAas2_TaDATA3" na,TRACE_2na, 0x137, 0x23c,13ac, DA091<_IMX_28href="d13ac>/137SD1094 CLK" c828D2_CLK_sESDHC2_CLK */1087FSR = 15277 2092_/ECT_CTI_TRIG(IN1 ATA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 138, 0x23c,13span.c#L212"comment">/* 13sp>/138SD1094 CLK" c828sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), ac, 3 DA07/d>     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" 9/13 <>/139SD1094 CLK" c828D2_CMD_sESDHC2_CMD */1089FSR = 15277ac, 3 DA07/d>  5  IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209/140,>/140SD1094 CLK" c829* CCMD_sESDHC2_CMD */1090FSR = 15277ac, 3A09<     IMX_PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGaMLB_DAT_/MLB_MLBDATeSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a"41, 0x23c,140x0, 0), /141SD1094 CLK" c8292_CMD_sESDHC1_DAT4 */1091FSR = 15277ac, 3A09<  5  IM90PIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa">MLB_DAT_/    33/142SD1094 CLK" c8292_CMD_sIPU_CSI_Ds2 */1092FSR = 15277/14 <>/143SD1094 CLK" c829B_TOP_USBH2_DATAs4 */1093FSR = 15277/* 14sp>/14sSD1094 CLK" c839asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_TX_CLKid="L199" cl9135"l919" nFEC_TX_CLK605]>ac, 4A09<     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_TX_CLK_bFEC_TX_CLKa hreSD2_CMDcode=MX35_PAD_ac, DASD8_T3_VSYNAGB   0x240145, 0x23c,14, 14, >/145SD1094 CLK" c838_sSPDIFsSPDIFsOUT> */1085FSR = 15277ac, 4A09<     IM80PIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa">FEC_TX_CLK_bESDHC1_DAT/146SD1094 CLK" c838PU_DISPB_D12_VSYNC */1086FSR = 15277ac, 4A09<      IMaPIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_TX_CLK_b        1087FSR = 15277ac, 4A09<     IMXePIN_REG=MX35ac, DA091<_IMX_PIN71 209/* 14sp>/148SD1094 CLK" c838sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), ac, 4A09<  A09<<7ePIN_REG=MX35ac, DA091<_IMX_PIN71 209/14 <>/149SD1094 CLK" c838D2_CMD_sESDHC2_CMD */1089FSR = 15277ac, 4A09<  5  IM90PIN_REG=MX35ac, DA091<_IMX_PIN71 209/150,>/150SD1094 CLK" c839* CCMD_sESDHC2_CMD */1090FSR = 15277ac, 4A09<     IM92 DA5REG=MX35ac, DA091<_IMX_PIN71 209    SPB_D12_VSYN1_DATA3code=MX35_PAD_CTac, clas1SD1aUDMUXDaUD6_RX 0x248151, 0x23c,150x0, 0), /151SD1094 CLK" c8392_CMD_sESDHC1_DAT4 */1091FSR = 15277ac, 4A09<      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9FEC_TX_CLK_bARM11P 8086 CLK" c108PU152, 0x23c,150x0, 0), /152SD1094 CLK" c8392_CMD_sIPU_CSI_Ds2 */1092FSR = 15277ac, 4 DA07/e>     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" 98086 CLK" c108PU153, 0x23c,15 /15 <>/153SD1094 CLK" c839B_TOP_USBH2_DATAs4 */1093FSR = 15277ac, 4 DA07/e>     IM80PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGa nFEC_RX_CLK_/ESDHC1_DAT/* 15sp>/15sSD1094 CLK" c849asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_RX_CLKid="L199" cl9135"l919" nFEC_RX_CLK605]>ac, 4 DA07/e>      IMX_PIN_REG=MX35ac, DA099_IMX_PIN70EG" naaFEC_RX_CLK_/      15, >/155SD1094 CLK" c848_sSPDIFsSPDIFsOUT> */1085FSR = 15277ac, 4 DA07/e>  3   IMX_PIN_REG=MX35ac, DA099_IMX_PIN70EG" naaFEC_RX_CLK_/ SB /156SD1094 CLK" c848PU_DISPB_D12_VSYNC */1086FSR = 15277ac, 4 DA07/e>  A09<<7e8IN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_RX_CLK_/CSPI2_MISOD1_DATA3code=MX35_PAD_CTac, clas11D1UART3_TXD_MUXc, 4,157, 0x23c,15ac, DA091<_IMX_28href="d15ac>/157SD1094 CLK" c848D2_CLK_sESDHC2_CLK */1087FSR = 15277ac, 4 DA07/e>  5  IM91PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_RX_CLK_/    33ATA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 158, 0x23c,15span.c#L212"comment">/* 15sp>/158SD1094 CLK" c848sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), ac, 4 DA07/e>     IM92PIN4REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_RX_CLK_/a>    SPB_SD_D_      /15 <>/159SD1094 CLK" c848D2_CMD_sESDHC2_CMD */1089FSR = 15277ac, 4 DA07/e>      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9FEC_RX_CLK_bARM11P /160,>/160SD1094 CLK" c849* CCMD_sESDHC2_CMD */1090FSR = 15277ac, 4A09<     IMX_PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGaFEC_RX_DV_aFEC_RX_DV   /161SD1094 CLK" c8492_CMD_sESDHC1_DAT4 */1091FSR = 15277ac, 4A09<     IM80PIN_REG=MX35ac, DA091<_IMX_PIN71 209/162SD1094 CLK" c8492_CMD_sIPU_CSI_Ds2 */1092FSR = 15277ac, 4A09<      IM9cPIN_REG=MX35ac, DA097_IMX_PIN_fIN_REG9 nFEC_RX_DV_a/a>        /16 <>/163SD1094 CLK" c849B_TOP_USBH2_DATAs4 */1093FSR = 15277ac, 4A09<     IMXfPIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_RX_DV_a/SB /* 16sp>/16sSD1094 CLK" c859asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_RX_DVid="L199" cl9135"l919" nFEC_RX_DV605]>ac, 4A09<  A09<<7ePIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_RX_DV_aCSPI2_SCLK, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU165, 0x23c,16, 16, >/165SD1094 CLK" c858_sSPDIFsSPDIFsOUT> */1085FSR = 15277ac, 4A09<  5  IM91PIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa">FEC_RX_DV_a    33ATA3code=MX35_PAD_CTac, DAas2_TaDATA3" na,TRACE_2na, 0x166, 0x23c,16, 0x860, 2), 9span.9#L2116, >/166SD1094 CLK" c858PU_DISPB_D12_VSYNC */1086FSR = 15277ac, 4A09<     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_RX_DV_aa>    SPB_SD_CLK, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU167, 0x23c,16ac, DA091<_IMX_28href="d16ac>/167SD1094 CLK" c858D2_CLK_sESDHC2_CLK */1087FSR = 15277ac, 4A09<      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9FEC_RX_DV_aARM11P /* 16sp>/168SD1094 CLK" c858sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), ac, 5A09<     IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209/16 <>/169SD1094 CLK" c858D2_CMD_sESDHC2_CMD */1089FSR = 15277ac, 5A09<     IM81PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_COL_aESDHC1_DATATA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 170, 0x23c,170, pan.c#L212"comment">/170,>/170SD1094 CLK" c859* CCMD_sESDHC2_CMD */1090FSR = 15277ac, 5A09<      IMX_PIN_REG=MX35ac, DA099_IMX_PIN70EG" naaFEC_COL_a/a>   C    /171SD1094 CLK" c8592_CMD_sESDHC1_DAT4 */1091FSR = 15277ac, 5A09<     IMXcPIN_REG=MX35ac, DA091<_IMX_PIN71 209 28, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU172, 0x23c,170x0, 0), /172SD1094 CLK" c8592_CMD_sIPU_CSI_Ds2 */1092FSR = 15277ac, 5A09<  A09<<7e4IN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_COL_aCSPI2_RDY, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU173, 0x23c,17 /17 <>/173SD1094 CLK" c859B_TOP_USBH2_DATAs4 */1093FSR = 15277ac, 5A09<  5  IM91PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGa nFEC_COL_a    33a hreSD2_CMDcode=MX35_PAD_ac, DASD12_T3_VSYNAGB 1na, 0x174, 0x23c,17span.c#L212"comment">/* 17sp>/17sSD1094 CLK" c869asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_COLid="L199" cl9135"l919" nFEC_COL605]>ac, 5A09<     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_COL_aa>    SPB_SER_R   17, >/175SD1094 CLK" c868_sSPDIFsSPDIFsOUT> */1085FSR = 15277ac, 5A09<      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9FEC_COL_aARM11P /176SD1094 CLK" c868PU_DISPB_D12_VSYNC */1086FSR = 15277  id="L200" cl92s="l920" nFEC_R ">  605]>ac, 5A09<     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_R ">  _bFEC_R "> 28, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU177, 0x23c,17ac, DA091<_IMX_28href="d17ac>/177SD1094 CLK" c868D2_CLK_sESDHC2_CLK */1087FSR = 15277  id="L200" cl92s="l920" nFEC_R ">  605]>ac, 5A09<     IMX_PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGaFEC_R ">  _bPWMbPWMOD1_DATA3code=MX35_PAD_CTac, clas11D1UART3_TXD_MUXc, 4,178, 0x23c,17span.c#L212"comment">/* 17sp>/178SD1094 CLK" c868sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0),   id="L200" cl92s="l920" nFEC_R ">  605]>ac, 5A09<      IMX_PIN_REG=MX35ac, DA099_IMX_PIN70EG" naaFEC_R ">  _b/a>   DT     /17 <>/179SD1094 CLK" c868D2_CMD_sESDHC2_CMD */1089FSR = 15277  id="L200" cl92s="l920" nFEC_R ">  605]>ac, 5A09<     IMXdPIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_R ">  _b/SB  2    /180,>/180SD1094 CLK" c869* CCMD_sESDHC2_CMD */1090FSR = 15277  id="L200" cl92s="l920" nFEC_R ">  605]>ac, 5A09<  A09<<7fPIN_REG=MX35ac, DA0910_IMX_PIN70EG" na9  _bCSPI2_SS8, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU181, 0x23c,180x0, 0), /181SD1094 CLK" c8692_CMD_sESDHC1_DAT4 */1091FSR = 15277  id="L200" cl92s="l920" nFEC_R ">  605]>ac, 5A09<     IMXePIN_REG=MX35ac, DA091<_IMX_PIN71 209  _b    33 8, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU182, 0x23c,180x0, 0), /182SD1094 CLK" c8692_CMD_sIPU_CSI_Ds2 */1092FSR = 15277  id="L200" cl92s="l920" nFEC_R ">  605]>ac, 5A09<     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_R ">  _ba>    SPB_CS    /18 <>/183SD1094 CLK" c869B_TOP_USBH2_DATAs4 */1093FSR = 15277  id="L200" cl92s="l920" nFEC_R ">  605]>ac, 5A09<      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9FEC_R ">  _bARM11P /* 18sp>/18sSD1094 CLK" c879asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_T ">  id="L200" cl92s="l920" nFEC_T ">  605]>ac, 5 DA07/f>     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" 9  _bFEC_T "> 28, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU185, 0x23c,18, 18, >/185SD1094 CLK" c878_sSPDIFsSPDIFsOUT> */1085FSR = 15277  id="L200" cl92s="l920" nFEC_T ">  605]>ac, 5 DA07/f>     IMX_PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGaFEC_T ">  _bSPDIFbSPDIFbOUT    /186SD1094 CLK" c878PU_DISPB_D12_VSYNC */1086FSR = 15277  id="L200" cl92s="l920" nFEC_T ">  605]>ac, 5 DA07/f>      IMX_PIN_REG=MX35ac, DA099_IMX_PIN70EG" naaFEC_T ">  _b/a>   DS     1087FSR = 15277  id="L200" cl92s="l920" nFEC_T ">  605]>ac, 5 DA07/f>     IMXdPIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa">FEC_T ">  _b/SB  2 hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,188, 0x23c,18span.c#L212"comment">/* 18sp>/188SD1094 CLK" c878sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0),   id="L200" cl92s="l920" nFEC_T ">  605]>ac, 5 DA07/f>  A09<<7f4IN_REG=MX35ac, DA0910_IMX_PIN70EG" na9  _bCSPI2_SS    /18 <>/189SD1094 CLK" c878D2_CMD_sESDHC2_CMD */1089FSR = 15277  id="L200" cl92s="l920" nFEC_T ">  605]>ac, 5 DA07/f>     IMXfPIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_T ">  _b    33     /190,>/190SD1094 CLK" c879* CCMD_sESDHC2_CMD */1090FSR = 15277  id="L200" cl92s="l920" nFEC_T ">  605]>ac, 5 DA07/f>     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_T ">  _ba>    SPB_CS8, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU191, 0x23c,190x0, 0), /191SD1094 CLK" c8792_CMD_sESDHC1_DAT4 */1091FSR = 15277  id="L200" cl92s="l920" nFEC_T ">  605]>ac, 5 DA07/f>      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9FEC_T ">  _bARM11P /192SD1094 CLK" c8792_CMD_sIPU_CSI_Ds2 */1092FSR = 15277ac, 5A09<     IMX_PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGaFEC_TX_EN_aFEC_TX_ENa hreSD2_CMDcode=MX35_PAD_ac, DASD8_T3_VSYNAGB   0x240193, 0x23c,19 /19 <>/193SD1094 CLK" c879B_TOP_USBH2_DATAs4 */1093FSR = 15277ac, 5A09<     IMX98IN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_TX_EN_aSPDIFbSPDIFbIN    /* 19sp>/19sSD1094 CLK" c889asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_TX_EN id="L201" cl92s="l921" FEC_TX_EN605]>ac, 5A09<      IMX_PIN_REG=MX35ac, DA099_IMX_PIN70EG" naaFEC_TX_EN_a/a>          19, >/195SD1094 CLK" c888_sSPDIFsSPDIFsOUT> */1085FSR = 15277ac, 5A09<     IMXdPIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGa nFEC_TX_EN_a/SB  2reSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a"96, 0x23c,19, 0x860, 2), 9span.9#L2119, >/196SD1094 CLK" c888PU_DISPB_D12_VSYNC */1086FSR = 15277ac, 5A09<     IMXfPIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa">FEC_TX_EN_b/a> 33  hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,197, 0x23c,19ac, DA091<_IMX_28href="d19ac>/197SD1094 CLK" c888D2_CLK_sESDHC2_CLK */1087FSR = 15277ac, 5A09<     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_TX_EN_b  SPB_PAR_R   /* 19sp>/198SD1094 CLK" c888sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), ac, 5A09<      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9FEC_TX_EN_b"RM11P /19 <>/199SD1094 CLK" c888D2_CMD_sESDHC2_CMD */1089FSR = 15277ac, 6A09<     IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209/200,>/200SD1094 CLK" c889* CCMD_sESDHC2_CMD */1090FSR = 15277ac, 6A09<     IMX_PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGaFEC_MDC_aCAN2_TXCANreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244201, 0x23c,200x0, 0), /201SD1094 CLK" c8892_CMD_sESDHC1_DAT4 */1091FSR = 15277ac, 6A09<      IMX_PIN_REG=MX35ac, DA099_IMX_PIN70EG" naaFEC_MDC_a/a>   DCDreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244202, 0x23c,200x0, 0), /202SD1094 CLK" c8892_CMD_sIPU_CSI_Ds2 */1092FSR = 15277ac, 6A09<     IMXdPIN_REG=MX35ac, DA091<_IMX_PIN71 209 2/20 <>/203SD1094 CLK" c889B_TOP_USBH2_DATAs4 */1093FSR = 15277ac, 6A09<     IMXfPIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGa nFEC_MDC_a/a> 33 reSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a204, 0x23c,20span.c#L212"comment">/* 20sp>/20sSD1094 CLK" c899asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_MDC id="L201" cl92s="l921" FEC_MDC605]>ac, 6A09<     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_MDC_a  SPB_W     20, >/205SD1094 CLK" c898_sSPDIFsSPDIFsOUT> */1085FSR = 15277ac, 6A09<      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9FEC_MDC_a"RM11P /206SD1094 CLK" c898PU_DISPB_D12_VSYNC */1086FSR = 15277ac, 6A09<<30>     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_MDIO_bFEC_MDIOTA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 207, 0x23c,20ac, DA091<_IMX_28href="d20ac>/207SD1094 CLK" c898D2_CLK_sESDHC2_CLK */1087FSR = 15277ac, 6A09<<30>     IM7ccPIN_REG=MX35ac, DA097_IMX_PIN_fIN_REG9 nFEC_MDIO_bCAN2_RXCANreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244208, 0x23c,20span.c#L212"comment">/* 20sp>/208SD1094 CLK" c898sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), ac, 6A09<<30>     IMXePIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_MDIO_b/SB  2/20 <>/209SD1094 CLK" c898D2_CMD_sESDHC2_CMD */1089FSR = 15277ac, 6A09<<30>     IMXfPIN_REG=MX35ac, DA091<_IMX_PIN71 209 33 /210,>/210SD1094 CLK" c899* CCMD_sESDHC2_CMD */1090FSR = 15277ac, 6A09<<30>     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_MDIO_b  SPB_RDreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244211, 0x23c,210x0, 0), /211SD1094 CLK" c8992_CMD_sESDHC1_DAT4 */1091FSR = 15277ac, 6A09<<30>      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9FEC_MDIO_b"RM11P /212SD1094 CLK" c8992_CMD_sIPU_CSI_Ds2 */1092FSR = 15277ac, 6809<<30>     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" 9/21 <>/213SD1094 CLK" c899B_TOP_USBH2_DATAs4 */1093FSR = 15277ac, 6809<<30>     IMX9PIN_REG=MX35ac, DA0910_IMX_PIN70EG" na9/* 21sp>/21sSD1094 CLK" c909asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_TX_ERR id="L201" cl92s="l921" FEC_TX_ERR605]>ac, 6809<<30>      IM94IN4REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_TX_ERR_/SPDIFbSPDIFbEXTCLK, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU215, 0x23c,21, 21, >/215SD1094 CLK" c908_sSPDIFsSPDIFsOUT> */1085FSR = 15277ac, 6809<<30>     IMXePIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa">FEC_TX_ERR_//SB  2hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244216, 0x23c,21, 0x860, 2), 9span.9#L2121, >/216SD1094 CLK" c908PU_DISPB_D12_VSYNC */1086FSR = 15277ac, 6809<<30>  5  IM90PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_TX_ERR_//a> 33 1087FSR = 15277ac, 6809<<30>     IM924IN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_TX_ERR_/a>    SPB_D0_VSYN1_DATA3code=MX35_PAD_CTac, clas1SD1aUDMUXDaUD6_RX 0x248218, 0x23c,21span.c#L212"comment">/* 21sp>/218SD1094 CLK" c908sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), ac, 6809<<30>      IMX_PIN_REG=MX35ac, DA095_IMX_PIN_fEG" na9FEC_TX_ERR_/"RM11P /21 <>/219SD1094 CLK" c908D2_CMD_sESDHC2_CMD */1089FSR = 15277ac, 6c09<<30>     IMX_PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGaFEC_RX_ERR_/FEC_RX_ERRTA3code=MX35_PAD_CTac, DAas2_TaDATA3" na,TRACE_2na, 0x220, 0x23c,220, pan.c#L212"comment">/220,>/220SD1094 CLK" c909* CCMD_sESDHC2_CMD */1090FSR = 15277ac, 6c09<<30>     IMX3PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_RX_ERR_/a>        8, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU221, 0x23c,220x0, 0), /221SD1094 CLK" c9092_CMD_sESDHC1_DAT4 */1091FSR = 15277ac, 6c09<<30>     IMXePIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGa nFEC_RX_ERR_//SB  2ATA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 222, 0x23c,220x0, 0), /222SD1094 CLK" c9092_CMD_sIPU_CSI_Ds2 */1092FSR = 15277ac, 6c09<<30>  A09<<96PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_RX_ERR_/PP_MCOL3/22 <>/223SD1094 CLK" c909B_TOP_USBH2_DATAs4 */1093FSR = 15277ac, 6c09<<30>  5  IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209 33 hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244224, 0x23c,22span.c#L212"comment">/* 22sp>/22sSD1094 CLK" c919asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_RX_ERR id="L201" cl92s="l921" FEC_RX_ERR605]>ac, 6c09<<30>     IM92PIN5REG=MX35ac, DA091<_IMX_PIN71 209    SPB_SD_D_ OTA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 225, 0x23c,22, 22, >/225SD1094 CLK" c918_sSPDIFsSPDIFsOUT> */1085FSR = 15277ac, 7009<<30>     IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209/226SD1094 CLK" c918PU_DISPB_D12_VSYNC */1086FSR = 15277ac, 7009<<30>     IMX34IN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_CRS_aa>            1087FSR = 15277ac, 7009<<30>  3   IMX_PIN_REG=MX35ac, DA099_IMX_PIN70EG" naaFEC_CRS_a/SB /* 22sp>/228SD1094 CLK" c918sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0), ac, 7009<<30>  A09<<96PIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa">FEC_CRS_aPP_MCOL3/22 <>/229SD1094 CLK" c918D2_CMD_sESDHC2_CMD */1089FSR = 15277ac, 7009<<30>  5  IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209 33 ATA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 230, 0x23c,230, pan.c#L212"comment">/230,>/230SD1094 CLK" c919* CCMD_sESDHC2_CMD */1090FSR = 15277ac, 7009<<30>     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_CRS_aa>  FLASH_STROBETA3code=MX35_PAD_CTac, DAas2_TaDATA3" na,TRACE_2na, 0x231, 0x23c,230x0, 0), /231SD1094 CLK" c9192_CMD_sESDHC1_DAT4 */1091FSR = 15277 1 id="L201" cl92s="l921" FEC_R "> 1605]>ac, 7A09<<31>     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_R "> 1_bFEC_R "> 2    /232SD1094 CLK" c9192_CMD_sIPU_CSI_Ds2 */1092FSR = 15277 1 id="L201" cl92s="l921" FEC_R "> 1605]>ac, 7A09<<31>     IMX38IN4REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_R "> 1_ba>         hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,233, 0x23c,23 /23 <>/233SD1094 CLK" c919B_TOP_USBH2_DATAs4 */1093FSR = 15277 1 id="L201" cl92s="l921" FEC_R "> 1605]>ac, 7A09<<31>      IMX_PIN_REG=MX35ac, DA099_IMX_PIN70EG" naaFEC_R "> 1_bAUDMUXbAUD6_RXChreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,234, 0x23c,23span.c#L212"comment">/* 23sp>/23sSD1094 CLK" c929asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_R "> 1 id="L201" cl92s="l921" FEC_R "> 1605]>ac, 7A09<<31>     IMXf4IN_REG=MX35ac, DA0910_IMX_PIN70EG" na9 1_b/SB 23, >/235SD1094 CLK" c928_sSPDIFsSPDIFsOUT> */1085FSR = 15277 1 id="L201" cl92s="l921" FEC_R "> 1605]>ac, 7A09<<31>  A09<<96PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGa nFEC_R "> 1_bPP_MCOL3hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244236, 0x23c,23, 0x860, 2), 9span.9#L2123, >/236SD1094 CLK" c928PU_DISPB_D12_VSYNC */1086FSR = 15277 1 id="L201" cl92s="l921" FEC_R "> 1605]>ac, 7A09<<31>  5  IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209 1_b/a> 33 ATA3code=MX35_PAD_CTac, DAas2_TaDATA3" na,TRACE_2na, 0x237, 0x23c,23ac, DA091<_IMX_28href="d23ac>/237SD1094 CLK" c928D2_CLK_sESDHC2_CLK */1087FSR = 15277 1 id="L201" cl92s="l921" FEC_R "> 1605]>ac, 7A09<<31>     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_R "> 1_/a>    SPB_BE8, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU238, 0x23c,23span.c#L212"comment">/* 23sp>/238SD1094 CLK" c928sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0),  1 id="L201" cl92s="l921" FEC_T "> 1605]>ac, 7809<<31>     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" 9 1_bFEC_T "> 2    /23 <>/239SD1094 CLK" c928D2_CMD_sESDHC2_CMD */1089FSR = 15277 1 id="L201" cl92s="l921" FEC_T "> 1605]>ac, 7809<<31>     IMX3PIN4REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_T "> 1_ba>        reSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a240, 0x23c,240, pan.c#L212"comment">/240,>/240SD1094 CLK" c929* CCMD_sESDHC2_CMD */1090FSR = 15277 1 id="L201" cl92s="l921" FEC_T "> 1605]>ac, 7809<<31>      I7bPIN_REG=MX35ac, DA091<_IMX_PIN71 209 1_bAUDMUXbAUD6_RXFSTA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 241, 0x23c,240x0, 0), /241SD1094 CLK" c9292_CMD_sESDHC1_DAT4 */1091FSR = 15277 1 id="L201" cl92s="l921" FEC_T "> 1605]>ac, 7809<<31>  A09<<96PIN_REG=MX35ac, DA091<_IMX_PIN71 209 1_bPP_MCOL3ATA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 242, 0x23c,240x0, 0), /242SD1094 CLK" c9292_CMD_sIPU_CSI_Ds2 */1092FSR = 15277 1 id="L201" cl92s="l921" FEC_T "> 1605]>ac, 7809<<31>  5  IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209 1_b/a> 33 a hreSD2_CMDcode=MX35_PAD_ac, DASD12_T3_VSYNAGB 1na, 0x243, 0x23c,24 /24 <>/243SD1094 CLK" c929B_TOP_USBH2_DATAs4 */1093FSR = 15277 1 id="L201" cl92s="l921" FEC_T "> 1605]>ac, 7809<<31>     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_T "> 1_/a>    SPB_BE    /* 24sp>/24sSD1094 CLK" c939asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_R "> 2 id="L201" cl92s="l921" FEC_R "> 2605]>ac, 7c09<<31>     IMX_PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGaFEC_R "> 2_bFEC_R "> 2 hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,245, 0x23c,24, 24, >/245SD1094 CLK" c938_sSPDIFsSPDIFsOUT> */1085FSR = 15277 2 id="L201" cl92s="l921" FEC_R "> 2605]>ac, 7c09<<31>     IMX4PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_R "> 2_ba>        /246SD1094 CLK" c938PU_DISPB_D12_VSYNC */1086FSR = 15277 2 id="L201" cl92s="l921" FEC_R "> 2605]>ac, 7c09<<31>      I7bPIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa">FEC_R "> 2_bAUDMUXbAUD6_TXDreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244247, 0x23c,24ac, DA091<_IMX_28href="d24ac>/247SD1094 CLK" c938D2_CLK_sESDHC2_CLK */1087FSR = 15277 2 id="L201" cl92s="l921" FEC_R "> 2605]>ac, 7c09<<31>  A09<<98PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_R "> 2_bPP_MROW /* 24sp>/248SD1094 CLK" c938sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0),  2 id="L201" cl92s="l921" FEC_R "> 2605]>ac, 7c09<<31>  5  IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209 2_b/a> 3328, 5, 0x860, 2), 9span.9#L212"comment">8086 CLK" c108PU249, 0x23c,24 /24 <>/249SD1094 CLK" c938D2_CMD_sESDHC2_CMD */1089FSR = 15277 2 id="L201" cl92s="l921" FEC_T "> 2605]>ac, 8009<<31>     IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209 2_bFEC_T "> 2 hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,250, 0x23c,250, pan.c#L212"comment">/250,>/250SD1094 CLK" c939* CCMD_sESDHC2_CMD */1090FSR = 15277 2 id="L201" cl92s="l921" FEC_T "> 2605]>ac, 8009<<31>     IMX44IN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_T "> 2_ba>        /251SD1094 CLK" c9392_CMD_sESDHC1_DAT4 */1091FSR = 15277 2 id="L201" cl92s="l921" FEC_T "> 2605]>ac, 8009<<31>      I7bPIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_T "> 2_bAUDMUXbAUD6_RXDreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244252, 0x23c,250x0, 0), /252SD1094 CLK" c9392_CMD_sIPU_CSI_Ds2 */1092FSR = 15277 2 id="L201" cl92s="l921" FEC_T "> 2605]>ac, 8009<<31>  A09<<98PIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa">FEC_T "> 2_bPP_MROW /25 <>/253SD1094 CLK" c939B_TOP_USBH2_DATAs4 */1093FSR = 15277 2 id="L201" cl92s="l921" FEC_T "> 2605]>ac, 8009<<31>  5  IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209 2_b/a> 332    /* 25sp>/25sSD1094 CLK" c949asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92FEC_R "> 3 id="L201" cl92s="l921" FEC_R "> 3605]>ac, 8A09<<32>     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_R "> 3_bFEC_R "> 2reSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a255, 0x23c,25, 25, >/255SD1094 CLK" c948_sSPDIFsSPDIFsOUT> */1085FSR = 15277 3 id="L201" cl92s="l921" FEC_R "> 3605]>ac, 8A09<<32>     IMX48IN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_R "> 3_ba>        hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244256, 0x23c,25, 0x860, 2), 9span.9#L2125, >/256SD1094 CLK" c948PU_DISPB_D12_VSYNC */1086FSR = 15277 3 id="L201" cl92s="l921" FEC_R "> 3605]>ac, 8A09<<32>      I7cPIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_R "> 3_bAUDMUXbAUD6_TXChreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,257, 0x23c,25ac, DA091<_IMX_28href="d25ac>/257SD1094 CLK" c948D2_CLK_sESDHC2_CLK */1087FSR = 15277 3 id="L201" cl92s="l921" FEC_R "> 3605]>ac, 8A09<<32>  A09<<98PIN_REG=MX35ac, DA09<1_IMX_PIN70IN_REGa nFEC_R "> 3_bPP_MROW hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas13D1D1_C222 0x244258, 0x23c,25span.c#L212"comment">/* 25sp>/258SD1094 CLK" c948sSDctrl922_ctrl-i8x35.c108sS>1088FSR = 15277l8ne" na8, 6, 0x0, 0),  3 id="L201" cl92s="l921" FEC_R "> 3605]>ac, 8A09<<32>     IMX_PIN_REG=MX35ac, DA0913_IMX_PIN71EG" nabFEC_R "> 3_b/a> 332 hreSD1_DATA2code=MX35_PAD_CTS1ac, DAas9_DD1_C22244, 4,259, 0x23c,25 /25 <>/259SD1094 CLK" c948D2_CMD_sESDHC2_CMD */1089FSR = 15277 3 id="L201" cl92s="l921" FEC_T "> 3605]>ac, 8809<<32>     IMX_PIN_REG=MX35ac, DA0910_IMX_PIN70EG" 9 3_bFEC_T "> 2reSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a260, 0x23c,260, pan.c#L212"comment">/260,>/260SD1094 CLK" c949* CCMD_sESDHC2_CMD */1090FSR = 15277 3 id="L201" cl92s="l921" FEC_T "> 3605]>ac, 8809<<32>     IMX4cIN_REG=MX35ac, DA0913_IMX_PIN71EG" nab">FEC_T "> 3_ba>        ATA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 261, 0x23c,260x0, 0), /261SD1094 CLK" c9492_CMD_sESDHC1_DAT4 */1091FSR = 15277 3 id="L201" cl92s="l921" FEC_T "> 3605]>ac, 8809<<32>      I7cPIN_REG=MX35ac, DA0910_IMX_PIN70EG" naa">FEC_T "> 3_bAUDMUXbAUD6_TXFSTA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 262, 0x23c,260x0, 0), /262SD1094 CLK" c9492_CMD_sIPU_CSI_Ds2 */1092FSR = 15277 3 id="L201" cl92s="l921" FEC_T "> 3605]>ac, 8809<<32>  A09<<98PIN_REG=MX35ac, DA091<_IMX_PIN71 209 3_bPP_MROW ATA3code=MX35_PAD_CTac, DAas1_TaDATA3" na,TRACE_2" na, 263, 0x23c,26 /26 <>/263SD1094 CLK" c949B_TOP_USBH2_DATAs4 */1093FSR = 15277 3 id="L201" cl92s="l921" FEC_T "> 3605]>ac, 8809<<32>  5  IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209 3_b/a> 332reSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a264, 0x23c,26span.c#L212"comment">/* 26sp>/26sSD1094 CLK" c959asSD2_CMD_sGPIO2sc */ = 15278nt">/* CLK" cla1085 CLK" c108_sSPDi92EXT/"RMCLK id="L201" cl92s="l921" EXT/"RMCLK605]>ac, 8c  IMX_PI  IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 20926, >/265SD1094 CLK" c958_sSPDIFsSPDIFsOUT> */1085FSR = 15277ac, 90  IMX_PI  IMX_PIN_REG=MX35ac, DA091<_IMX_PIN71 209/266SD10};code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a267, 0x23c,26ac, DA091<_IMX_28href="d26ac>/267SD10code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a268, 0x23c,26span.c#L212"comment">/* 26sp>/268SD10EG=MX35ac, DA091<_IMX_PINPadment"s for the _Damux subsystemeSD1_DATA2code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a269, 0x23c,26 /26 <>/269SD10static const structPDIFsSPDIFsOUT> _Dac, D__Da_desc id="L201" cl92_Dac, D__Da_descSD109DIFsSPDIFsOUT> as2 ,__Dac, D__ads id="L201" cl92as2 ,__Dac, D__adsSD10[_sSP{code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a270, 0x23c,270, pan.c#L212"comment">/270,>/270SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/271SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/272SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/27 <>/273SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 1_ id="L200" cl92s="l920" n/a> 1_ "dri),code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a274, 0x23c,27span.c#L212"comment">/* 27sp>/27sSD1094 CLK" DIFsSPDIFsOUT> */ = 15277 1_1 id="L201" cl92s="l921" /a> 1_1"dri),code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a275, 0x23c,27, 27, >/275SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 2_ id="L200" cl92s="l920" n/a> 2_ "dri),code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a276, 0x23c,27, 0x860, 2), 9span.9#L2127, >/276SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 3_ id="L200" cl92s="l920" n/a> 3_ "dri),code=MX35_PAD_CTac, DAas13_Dac, DAas2 , 0x6a277, 0x23c,27ac, DA091<_IMX_28href="d27ac>/277SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 27sp>/278SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/27 <>/279SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/280,>/280SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/281SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/282SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/28 <>/283SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 28sp>/28sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527728, >/285SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/286SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 28sp>/288SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/28 <>/289SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/290,>/290SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/291SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/292SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/29 <>/293SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 29sp>/29sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527729, >/295SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/296SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 29sp>/298SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/29 <>/299SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/300,>/300SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/301SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/302SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/30 <>/303SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 30sp>/30sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527730, >/305SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/306SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 30sp>/308SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/30 <>/309SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/310,>/310SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/311SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/312SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/31 <>/313SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 31sp>/31sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527731, >/315SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/316SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 31sp>/318SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/31 <>/319SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/320,>/320SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/321SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/322SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/32 <>/323SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 32sp>/32sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527732, >/325SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/326SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 32sp>/328SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/32 <>/329SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/330,>/330SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/331SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/332SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/33 <>/333SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 33sp>/33sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527733, >/335SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/336SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 33sp>/338SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/33 <>/339SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/340,>/340SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/341SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/342SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/34 <>/343SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 34sp>/34sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527734, >/345SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/346SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 34sp>/348SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/34 <>/349SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/350,>/350SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/351SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/352SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/35 <>/353SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 35sp>/35sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527735, >/355SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/356SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 35sp>/358SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/35 <>/359SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/360,>/360SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/361SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/362SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/36 <>/363SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 36sp>/36sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527736, >/365SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/366SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 36sp>/368SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/36 <>/369SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/370,>/370SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/371SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/372SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/37 <>/373SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 37sp>/37sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527737, >/375SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/376SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 37sp>/378SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/37 <>/379SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/380,>/380SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/381SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/382SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/38 <>/383SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 38sp>/38sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527738, >/385SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/386SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 38sp>/388SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/38 <>/389SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/390,>/390SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/391SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/392SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/39 <>/393SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 39sp>/39sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527739, >/395SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/396SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 39sp>/398SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/39 <>/399SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/400,>/400SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/401SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/402SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/40 <>/403SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 40sp>/40sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527740, >/405SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/406SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 40sp>/408SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/40 <>/409SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/410,>/410SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/411SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/412SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/41 <>/413SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 41sp>/41sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527741, >/415SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/416SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 41sp>/418SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/41 <>/419SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/420,>/420SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/421SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/422SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/42 <>/423SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 42sp>/42sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527742, >/425SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/426SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 42sp>/428SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/42 <>/429SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/430,>/430SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/431SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/432SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/43 <>/433SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 43sp>/43sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527743, >/435SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/436SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 43sp>/438SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/43 <>/439SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/440,>/440SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/441SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/442SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/44 <>/443SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 44sp>/44sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527744, >/445SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/446SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 44sp>/448SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/44 <>/449SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/450,>/450SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/451SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/452SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/45 <>/453SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 45sp>/45sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527745, >/455SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/456SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 45sp>/458SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/45 <>/459SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/460,>/460SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/461SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/462SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/46 <>/463SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 46sp>/46sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527746, >/465SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/466SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 46sp>/468SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/46 <>/469SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/470,>/470SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/471SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/472SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/47 <>/473SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 47sp>/47sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527747, >/475SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/476SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 47sp>/478SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/47 <>/479SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/480,>/480SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/481SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/482SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/48 <>/483SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 48sp>/48sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527748, >/485SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/486SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 48sp>/488SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/48 <>/489SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/490,>/490SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/491SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/492SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/49 <>/493SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 49sp>/49sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527749, >/495SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/496SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 49sp>/498SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/49 <>/499SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/500,>/500SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/501SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/502SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/50 <>/503SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 50sp>/5ment">/48 <>/489SD00, pan.c#L212"comment">/500ATA_D4, 0x23rivers/pinctrl925nctrl-ii92ATA_DIOR id="L201" cl92s="l= 1527740, >/405SD1094 CLK" DIFsSPDIFsOUT> */ = 15277nctrlMACTnctrl-ii92ATA_DIOR id="L201" cl92s="l= 15277/406SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 40sp>/408SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/40 <>/409SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/410,>/410SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/411SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/412SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/41 <>/413SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 41sp>/41sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527741, >/415SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/416SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 41sp>/418SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/41 <>/419SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/420,>/420SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/421SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/422SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/42 <>/423SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 42sp>/42sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527742, >/425SD1094 CLK" DIFsSPDIFsOUT> */ *//426SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 42sp>/428SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/42 <>/429SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/430,>/430SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/431SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/432SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/43 <>/433SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 43sp>/43sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527743, >/435SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/436SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 43sp>/438SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/43 <>/439SD1094 CLK" DIFsSPDIFsOUT> */ *//440,>/440SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/441SD1094 CLK" DIFsSPDIFsOUT> */ = 15277FEC_MDITTRL/108"drivers/pinctrl925nctrl-ii92LD12 id="L201"5cl92s="l925" RTS1605]),code=MX35_PAD5CTac,5DAas13_Dac, DAas2 , 0x6a442, 0x23c,440x0, 0), /442SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/44 <>/443SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/* 44sp>/44sSD1094 CLK" DIFsSPDIFsOUT> */ = 1527744, >/445SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/446SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 */ = 15277/* 44sp>/448SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/44 <>/449SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/450,>/450SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/451SD1094 CLK" DIFsSPDIFsOUT> */ = 15277/452SD1094 CLK" DIFsSPDIFsOUT> */ = 15277 =  id_ii92LD1_soc_infoas13_as2 , 0x6a452,  id277ii92LD1_info08085FSR =  id277ii92LD1_infoas13_= {8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 6108"driveTG_PWR605]),code=MX35_PAD5CTac,5DAas13_Dac, DA.as2 , 0x6a452, ii9s08085FSR = ii9sas13_= as2 , 0x6a452,  id277ii92LD1_pads08085FSR =  id277ii92LD1_padsas1308"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 7108"driveOTG_OC605]),code=MX35_PAD5CTac,5DAas13_Dac, DA.as2 , 0x6a452, nii9s08085FSR = nii9sas13_= as2 , 0x6a452, ARRAY_SIZE08085FSR = ARRAY_SIZE94 CLK" DIFsSPDIFsOU id277ii92LD1_pads08085FSR =  id277ii92LD1_padsas13108"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 ="l920" n5" nLD 605]),code=MX35_PAD5CTac,5DAas13_Dac, DA.as2 , 0x6a452, ii9_regs08085FSR = ii9_regsas13_= as2 , 0x6a452,  id277ii9_regs08085FSR =  id277ii9_regsas1308"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 92s="l92151" LD1605]),code=MX35_PAD5CTac,5DAas13_Dac, DA.as2 , 0x6a452, nii9_regs08085FSR = nii9_regsas13_= as2 , 0x6a452, ARRAY_SIZE08085FSR = ARRAY_SIZE94 CLK" DIFsSPDIFsOU id277ii9_regs08085FSR =  id277ii9_regsas13108"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 cl92s="l951" LD2605]),code=MX35_PAD5CTac,5DAas13};8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 cl92s="l951" LD3605]),code=MX35_PAD5CTac,5DAas138"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 l92s="l9251" LD4605]),code=MX35_PAD5CTac,5DAas13static structAas2 , 0x6a452, of_device_id08085FSR = of_device_idas13_as2 , 0x6a452,  id277ii92LD1_of_match08085FSR =  id277ii92LD1_of_matchas13[]_as2 , 0x6a452, __devinitdata08085FSR = __devinitdataas13_= {8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 cl92s="l951" LD5605]),code=MX35_PAD5CTac,5DAas13_Dac, DA{A.as2 , 0x6a452, compatible08085FSR = compatibleas13_= aspan8085FSR"fsl, id="-iomuxc", }08"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 l92s="l9251" LD6605]),code=MX35_PAD5CTac,5DAas13_Dac, DA{ aspan8085FSR/* sentcodl */ }8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 /108"drive1" LD7605]),code=MX35_PAD5CTac,5DAas13};8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 6108"drive1" L 8605]),code=MX35_PAD5CTac,5DAas138"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 7108"drive1" L 9605]),code=MX35_PAD5CTac,5DAas13static intAas2 , 0x6a452, __devinit08085FSR = __devinitas13_as2 , 0x6a452,  id277ii92LD1_probe08085FSR =  id277ii92LD1_probe94 CLstructAas2 , 0x6a452, platform_device08085FSR = ilatform_deviceas13_*as2 , 0x6a452, pdev08085FSR = idevas1318"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 ="l920" n5 nL 1 605]),code=MX35_PAD5CTac,5DAas13{8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5 92s="l9215" LD11605]),code=MX35_PAD5CTac,5DAas13_Dac, DAreturnAas2 , 0x6a452,  id_ii92LD1_probe08085FSR =  id7ii92LD1_probe94 CLas2 , 0x6a452, pdev08085FSR = idevas13, &as2 , 0x6a452,  id277ii92LD1_info08085FSR =  id277ii92LD1_infoas13);8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5cl92s="l925" LD12605]),code=MX35_PAD5CTac,5DAas13}8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5cl92s="l925" LD13605]),code=MX35_PAD5CTac,57Aas138"drivers/pinctrl925nctrl-ii92LD12 id="L201"5cl92s="l925" LD14605]),code=MX35_PAD5CTac,57Aas13static structAas2 , 0x6a452, ilatform_dinctr08085FSR = ilatform_dinctras13_as2 , 0x6a452,  id277ii92LD1_dinctr08085FSR =  id277ii92LD1_dinctras13_= {8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5cl92s="l925" LD15605]),code=MX35_PAD5CTac,5DAas13_Dac, DA.as2 , 0x6a452, dinctr08085FSR = dinctras13_= {8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5cl92s="l925" LD16605]),code=MX35_PAD5CTac,5DAas13_Dac, DA_Dac, DA.as2 , 0x6a452, nX3508085FSR = nX35as13_= aspan8085FSR" id="-ii92LD1",8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5c/108"drive" LD17605]),code=MX35_PAD5CTac,5DAas13_Dac, DA_Dac, DA.as2 , 0x6a452, owntr08085FSR = owntras13_= as2 , 0x6a452, THISL/10ULE08085FSR = THISL/10ULEas1308"drivers/pinctrl925nctrl-ii92LD12 id="L201"5cl92s="l925" L 18605]),code=MX35_PAD5CTac,5DAas13_Dac, DA_Dac, DA.as2 , 0x6a452, of_match_table08085FSR = of_match_tableas13_= as2 , 0x6a452, of_match_ptr08085FSR = of_match_ptr94 CLK" DIFsSPDIFsOU id277ii92LD1_of_match08085FSR =  id277ii92LD1_of_matchas13108"drivers/pinctrl925nctrl-ii92LD12 id="L201"5cl92s="l925" L 19605]),code=MX35_PAD5CTac,5DAas13_Dac, DA}08"drivers/pinctrl925nctrl-ii92LD12 id="L201"5l92s="l9205 nL 2 605]),code=MX35_PAD5CTac,57Aas13_Dac, DA.as2 , 0x6a452, irobe08085FSR = probe94 C_= as2 , 0x6a452,  id277ii92LD1_probe08085FSR =  id277ii92LD1_probe94 C08"drivers/pinctrl925nctrl-ii92LD12 id="L201"5l92s="l9215" LD21605]),code=MX35_PAD5CTac,57Aas13_Dac, DA.as2 , 0x6a452, remove08085FSR = remove94 C_= as2 , 0x6a452, __devexit_p08085FSR = __devexit_p94 CLK" DIFsSPDIFsOU id7ii92LD1_remove08085FSR =  id7ii92LD1_removeas13108"drivers/pinctrl925nctrl-ii92LD12 id="L201"5cl92s="l925" LD22605]),code=MX35_PAD5CTac,58Aas13};8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5cl92s="l925" LD23605]),code=MX35_PAD5CTac,58Aas138"drivers/pinctrl925nctrl-ii92LD12 id="L201"5s="l921" D5 HSYNC605]),code=MX35_PAD5CTac,58Aas13static intAas2 , 0x6a452, __init08085FSR = __initas13_as2 , 0x6a452,  id277ii92LD1_init08085FSR =  id277ii92LD1_init94 CLvoid18"drivers/pinctrl925nctrl-ii92LD12 id="L201"5"l921" D3_5PSHIFT605]),code=MX35_PAD5CTac,5DAas13{8"drivers/pinctrl925nctrl-ii92LD12 id="L201"52s="l921" 53_DRDY605]),code=MX35_PAD5CTac,5DAas13_Dac, DAreturnAas2 , 0x6a452, ilatform_dinctr_registtr08085FSR = ilatform_dinctr_registtr94 CL&as2 , 0x6a452,  id277ii92LD1_dinctr08085FSR =  id277ii92LD1_dinctras13);8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5s="l921" C5NTRAST605]),code=MX35_PAD5CTac,5DAas13}8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5s="l921" D5 VSYNC605]),code=MX35_PAD5CTac,5DAas13as2 , 0x6a452, arch_initcall08085FSR = arch_initcall94 CLK" DIFsSPDIFsOU id277ii92LD1_init08085FSR =  id277ii92LD1_init94 C);8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5sl92s="l925D3 REV605]),code=MX35_PAD5CTac,5DAas138"drivers/pinctrl925nctrl-ii92LD12 id="L201"5s92s="l9205D3_CLS605]),code=MX35_PAD5CTac,5DAas13static voidAas2 , 0x6a452, __exit08085FSR = __exitas13_as2 , 0x6a452,  id277ii92LD1_exit08085FSR =  id277ii92LD1_exit94 CLvoid18"drivers/pinctrl925nctrl-ii92LD12 id="L201"5"92s="l9215D3_SPL605]),code=MX35_PAD5CTac,5DAas13{8"drivers/pinctrl925nctrl-ii92LD12 id="L201"52s="l921" 5D1_CMD605]),code=MX35_PAD5CTac,5DAas13_Dac, DAas2 , 0x6a490, ilatform_dinctr_unregisttr08085FSR = ilatform_dinctr_unregisttr94 CL&as2 , 0x6a452,  id277ii92LD1_dinctr08085FSR =  id277ii92LD1_dinctras13);8"drivers/pinctrl925nctrl-ii92LD12 id="L201"52s="l921" 5D1_CLK605]),code=MX35_PAD5CTac,5DAas13}8"drivers/pinctrl925nctrl-ii92LD12 id="L201"5"l920" nSD5_DATA 605]),code=MX35_PAD5CTac,5DAas13as2 , 0x6a452, module_exit08085FSR = module_exit94 CLK" DIFsSPDIFsOU id277ii92LD1_exit08085FSR =  id277ii92LD1_exit94 C);8"drivers/pinctrl925nctrl-ii92LD12 id="L201"52l921" D3_5_DATA1605]),code=MX35_PAD5CTac,5DAas13K" DIFsSPDIFsOUT10ULE_AUTH108085FSR = 1510ULE_AUTH1094 CLKspan8085FSR"Dong Aisheng <dong.aisheng@,coaro.org>");8"drivers/pinctrl925nctrl-ii92LD12 id="L201"52s="l921" 5_DATA2605]),code=MX35_PAD5CTac,5DAas13K" DIFsSPDIFsOUT10ULE_DESCRIPTIOn.c#L219"comm9ntT10ULE_DESCRIPTIOn94 CLKspan8085FSR"Freescale I1527 ii92LD1 pinctr");8"drivers/pinctrl925nctrl-ii92LD12 id="L201"52="l921" C5_DATA3605]),code=MX35_PAD5CTac,5DAas13K" DIFsSPDIFsOUT10ULE_LICENSE08085FSR = 110ULE_LICENSE94 CLKspan8085FSR"GPL v2");8"drivers/pinctrl925nctrl-ii92LD12 id="L201"52="l921" D5D2_CMD605]),code=MX35_PAD5CTac,5DAas13


The origcoal LXR software by the "drivers/http://sourceforge.net/projects/lxr0>LXR communityas13, this experimental ctrlion by "drivers/mailto:lxr@,coux.no">lxr@,coux.noas13.
lxr.,coux.no kindly hosttd by "drivers/http://www.redpill-,copro.no">Redpill Lcopro ASas13, provider of Lcoux consulting and operations services si92e 1995.