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202#define AIC7XXX_STRICT_PCI_SETUP
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222#include <linux/module.h>
223#include <stdarg.h>
224#include <asm/io.h>
225#include <asm/irq.h>
226#include <asm/byteorder.h>
227#include <linux/string.h>
228#include <linux/errno.h>
229#include <linux/kernel.h>
230#include <linux/ioport.h>
231#include <linux/delay.h>
232#include <linux/pci.h>
233#include <linux/proc_fs.h>
234#include <linux/blkdev.h>
235#include <linux/init.h>
236#include <linux/spinlock.h>
237#include <linux/smp.h>
238#include <linux/interrupt.h>
239#include "scsi.h"
240#include <scsi/scsi_host.h>
241#include "aic7xxx_old/aic7xxx.h"
242
243#include "aic7xxx_old/sequencer.h"
244#include "aic7xxx_old/scsi_message.h"
245#include "aic7xxx_old/aic7xxx_reg.h"
246#include <scsi/scsicam.h>
247
248#include <linux/stat.h>
249#include <linux/slab.h>
250
251#define AIC7XXX_C_VERSION "5.2.6"
252
253#define ALL_TARGETS -1
254#define ALL_CHANNELS -1
255#define ALL_LUNS -1
256#define MAX_TARGETS 16
257#define MAX_LUNS 8
258#ifndef TRUE
259# define TRUE 1
260#endif
261#ifndef FALSE
262# define FALSE 0
263#endif
264
265#if defined(__powerpc__) || defined(__i386__) || defined(__x86_64__)
266# define MMAPIO
267#endif
268
269
270
271
272
273
274#define AIC7XXX_CMDS_PER_DEVICE 32
275
276typedef struct
277{
278 unsigned char tag_commands[16];
279} adapter_tag_info_t;
280
281
282
283
284
285#define DEFAULT_TAG_COMMANDS {0, 0, 0, 0, 0, 0, 0, 0,\
286 0, 0, 0, 0, 0, 0, 0, 0}
287
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324
325static adapter_tag_info_t aic7xxx_tag_info[] =
326{
327 {DEFAULT_TAG_COMMANDS},
328 {DEFAULT_TAG_COMMANDS},
329 {DEFAULT_TAG_COMMANDS},
330 {DEFAULT_TAG_COMMANDS},
331 {DEFAULT_TAG_COMMANDS},
332 {DEFAULT_TAG_COMMANDS},
333 {DEFAULT_TAG_COMMANDS},
334 {DEFAULT_TAG_COMMANDS},
335 {DEFAULT_TAG_COMMANDS},
336 {DEFAULT_TAG_COMMANDS},
337 {DEFAULT_TAG_COMMANDS},
338 {DEFAULT_TAG_COMMANDS},
339 {DEFAULT_TAG_COMMANDS},
340 {DEFAULT_TAG_COMMANDS},
341 {DEFAULT_TAG_COMMANDS},
342 {DEFAULT_TAG_COMMANDS}
343};
344
345
346
347
348
349
350static const char *board_names[] = {
351 "AIC-7xxx Unknown",
352 "Adaptec AIC-7810 Hardware RAID Controller",
353 "Adaptec AIC-7770 SCSI host adapter",
354 "Adaptec AHA-274X SCSI host adapter",
355 "Adaptec AHA-284X SCSI host adapter",
356 "Adaptec AIC-7850 SCSI host adapter",
357 "Adaptec AIC-7855 SCSI host adapter",
358 "Adaptec AIC-7860 Ultra SCSI host adapter",
359 "Adaptec AHA-2940A Ultra SCSI host adapter",
360 "Adaptec AIC-7870 SCSI host adapter",
361 "Adaptec AHA-294X SCSI host adapter",
362 "Adaptec AHA-394X SCSI host adapter",
363 "Adaptec AHA-398X SCSI host adapter",
364 "Adaptec AHA-2944 SCSI host adapter",
365 "Adaptec AIC-7880 Ultra SCSI host adapter",
366 "Adaptec AHA-294X Ultra SCSI host adapter",
367 "Adaptec AHA-394X Ultra SCSI host adapter",
368 "Adaptec AHA-398X Ultra SCSI host adapter",
369 "Adaptec AHA-2944 Ultra SCSI host adapter",
370 "Adaptec AHA-2940UW Pro Ultra SCSI host adapter",
371 "Adaptec AIC-7895 Ultra SCSI host adapter",
372 "Adaptec AIC-7890/1 Ultra2 SCSI host adapter",
373 "Adaptec AHA-293X Ultra2 SCSI host adapter",
374 "Adaptec AHA-294X Ultra2 SCSI host adapter",
375 "Adaptec AIC-7896/7 Ultra2 SCSI host adapter",
376 "Adaptec AHA-394X Ultra2 SCSI host adapter",
377 "Adaptec AHA-395X Ultra2 SCSI host adapter",
378 "Adaptec PCMCIA SCSI controller",
379 "Adaptec AIC-7892 Ultra 160/m SCSI host adapter",
380 "Adaptec AIC-7899 Ultra 160/m SCSI host adapter",
381};
382
383
384
385
386
387#define DID_UNDERFLOW DID_ERROR
388
389
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399
400
401
402#define DID_RETRY_COMMAND DID_ERROR
403
404#define HSCSIID 0x07
405#define SCSI_RESET 0x040
406
407
408
409
410#define MINSLOT 1
411#define MAXSLOT 15
412#define SLOTBASE(x) ((x) << 12)
413#define BASE_TO_SLOT(x) ((x) >> 12)
414
415
416
417
418#define AHC_HID0 0x80
419#define AHC_HID1 0x81
420#define AHC_HID2 0x82
421#define AHC_HID3 0x83
422
423
424
425
426#define MINREG 0xC00
427#define MAXREG 0xCFF
428
429#define INTDEF 0x5C
430
431
432
433
434#define CLASS_PROGIF_REVID 0x08
435#define DEVREVID 0x000000FFul
436#define PROGINFC 0x0000FF00ul
437#define SUBCLASS 0x00FF0000ul
438#define BASECLASS 0xFF000000ul
439
440#define CSIZE_LATTIME 0x0C
441#define CACHESIZE 0x0000003Ful
442#define LATTIME 0x0000FF00ul
443
444#define DEVCONFIG 0x40
445#define SCBSIZE32 0x00010000ul
446#define MPORTMODE 0x00000400ul
447#define RAMPSM 0x00000200ul
448#define RAMPSM_ULTRA2 0x00000004
449#define VOLSENSE 0x00000100ul
450#define SCBRAMSEL 0x00000080ul
451#define SCBRAMSEL_ULTRA2 0x00000008
452#define MRDCEN 0x00000040ul
453#define EXTSCBTIME 0x00000020ul
454#define EXTSCBPEN 0x00000010ul
455#define BERREN 0x00000008ul
456#define DACEN 0x00000004ul
457#define STPWLEVEL 0x00000002ul
458#define DIFACTNEGEN 0x00000001ul
459
460#define SCAMCTL 0x1a
461#define CCSCBBADDR 0xf0
462
463
464
465
466
467
468
469
470
471
472typedef enum {C46 = 6, C56_66 = 8} seeprom_chip_type;
473
474
475
476
477
478
479struct seeprom_config {
480
481
482
483
484#define CFXFER 0x0007
485#define CFSYNCH 0x0008
486#define CFDISC 0x0010
487#define CFWIDEB 0x0020
488#define CFSYNCHISULTRA 0x0040
489#define CFNEWULTRAFORMAT 0x0080
490#define CFSTART 0x0100
491#define CFINCBIOS 0x0200
492#define CFRNFOUND 0x0400
493#define CFMULTILUN 0x0800
494#define CFWBCACHEYES 0x4000
495#define CFWBCACHENC 0xc000
496
497 unsigned short device_flags[16];
498
499
500
501
502#define CFSUPREM 0x0001
503#define CFSUPREMB 0x0002
504#define CFBIOSEN 0x0004
505
506#define CFSM2DRV 0x0010
507#define CF284XEXTEND 0x0020
508
509#define CFEXTEND 0x0080
510
511 unsigned short bios_control;
512
513
514
515
516#define CFAUTOTERM 0x0001
517#define CFULTRAEN 0x0002
518#define CF284XSELTO 0x0003
519#define CF284XFIFO 0x000C
520#define CFSTERM 0x0004
521#define CFWSTERM 0x0008
522#define CFSPARITY 0x0010
523#define CF284XSTERM 0x0020
524#define CFRESETB 0x0040
525#define CFBPRIMARY 0x0100
526#define CFSEAUTOTERM 0x0400
527#define CFLVDSTERM 0x0800
528
529 unsigned short adapter_control;
530
531
532
533
534#define CFSCSIID 0x000F
535
536#define CFBRTIME 0xFF00
537 unsigned short brtime_id;
538
539
540
541
542#define CFMAXTARG 0x00FF
543
544 unsigned short max_targets;
545
546 unsigned short res_1[11];
547 unsigned short checksum;
548};
549
550#define SELBUS_MASK 0x0a
551#define SELNARROW 0x00
552#define SELBUSB 0x08
553#define SINGLE_BUS 0x00
554
555#define SCB_TARGET(scb) \
556 (((scb)->hscb->target_channel_lun & TID) >> 4)
557#define SCB_LUN(scb) \
558 ((scb)->hscb->target_channel_lun & LID)
559#define SCB_IS_SCSIBUS_B(scb) \
560 (((scb)->hscb->target_channel_lun & SELBUSB) != 0)
561
562
563
564
565
566
567
568#define aic7xxx_error(cmd) ((cmd)->SCp.Status)
569
570
571
572
573#define aic7xxx_status(cmd) ((cmd)->SCp.sent_command)
574
575
576
577
578#define aic7xxx_position(cmd) ((cmd)->SCp.have_data_in)
579
580
581
582
583#define aic7xxx_mapping(cmd) ((cmd)->SCp.phase)
584
585
586
587
588#define AIC_DEV(cmd) ((struct aic_dev_data *)(cmd)->device->hostdata)
589
590
591
592
593static struct aic7xxx_host *first_aic7xxx = NULL;
594
595
596
597
598
599
600struct hw_scatterlist {
601 unsigned int address;
602 unsigned int length;
603};
604
605
606
607
608#define AIC7XXX_MAX_SG 128
609
610
611
612
613
614
615#define AIC7XXX_MAXSCB 255
616
617
618struct aic7xxx_hwscb {
619
620 unsigned char control;
621 unsigned char target_channel_lun;
622 unsigned char target_status;
623 unsigned char SG_segment_count;
624 unsigned int SG_list_pointer;
625 unsigned char residual_SG_segment_count;
626 unsigned char residual_data_count[3];
627 unsigned int data_pointer;
628 unsigned int data_count;
629 unsigned int SCSI_cmd_pointer;
630 unsigned char SCSI_cmd_length;
631 unsigned char tag;
632
633
634#define SCB_PIO_TRANSFER_SIZE 26
635
636
637 unsigned char next;
638
639
640 unsigned char prev;
641 unsigned int pad;
642
643
644
645
646
647};
648
649typedef enum {
650 SCB_FREE = 0x0000,
651 SCB_DTR_SCB = 0x0001,
652 SCB_WAITINGQ = 0x0002,
653 SCB_ACTIVE = 0x0004,
654 SCB_SENSE = 0x0008,
655 SCB_ABORT = 0x0010,
656 SCB_DEVICE_RESET = 0x0020,
657 SCB_RESET = 0x0040,
658 SCB_RECOVERY_SCB = 0x0080,
659 SCB_MSGOUT_PPR = 0x0100,
660 SCB_MSGOUT_SENT = 0x0200,
661 SCB_MSGOUT_SDTR = 0x0400,
662 SCB_MSGOUT_WDTR = 0x0800,
663 SCB_MSGOUT_BITS = SCB_MSGOUT_PPR |
664 SCB_MSGOUT_SENT |
665 SCB_MSGOUT_SDTR |
666 SCB_MSGOUT_WDTR,
667 SCB_QUEUED_ABORT = 0x1000,
668 SCB_QUEUED_FOR_DONE = 0x2000,
669 SCB_WAS_BUSY = 0x4000,
670 SCB_QUEUE_FULL = 0x8000
671} scb_flag_type;
672
673typedef enum {
674 AHC_FNONE = 0x00000000,
675 AHC_PAGESCBS = 0x00000001,
676 AHC_CHANNEL_B_PRIMARY = 0x00000002,
677 AHC_USEDEFAULTS = 0x00000004,
678 AHC_INDIRECT_PAGING = 0x00000008,
679 AHC_CHNLB = 0x00000020,
680 AHC_CHNLC = 0x00000040,
681 AHC_EXTEND_TRANS_A = 0x00000100,
682 AHC_EXTEND_TRANS_B = 0x00000200,
683 AHC_TERM_ENB_A = 0x00000400,
684 AHC_TERM_ENB_SE_LOW = 0x00000400,
685 AHC_TERM_ENB_B = 0x00000800,
686 AHC_TERM_ENB_SE_HIGH = 0x00000800,
687 AHC_HANDLING_REQINITS = 0x00001000,
688 AHC_TARGETMODE = 0x00002000,
689 AHC_NEWEEPROM_FMT = 0x00004000,
690
691
692
693
694
695
696
697 AHC_MOTHERBOARD = 0x00020000,
698 AHC_NO_STPWEN = 0x00040000,
699 AHC_RESET_DELAY = 0x00080000,
700 AHC_A_SCANNED = 0x00100000,
701 AHC_B_SCANNED = 0x00200000,
702 AHC_MULTI_CHANNEL = 0x00400000,
703 AHC_BIOS_ENABLED = 0x00800000,
704 AHC_SEEPROM_FOUND = 0x01000000,
705 AHC_TERM_ENB_LVD = 0x02000000,
706 AHC_ABORT_PENDING = 0x04000000,
707 AHC_RESET_PENDING = 0x08000000,
708#define AHC_IN_ISR_BIT 28
709 AHC_IN_ISR = 0x10000000,
710 AHC_IN_ABORT = 0x20000000,
711 AHC_IN_RESET = 0x40000000,
712 AHC_EXTERNAL_SRAM = 0x80000000
713} ahc_flag_type;
714
715typedef enum {
716 AHC_NONE = 0x0000,
717 AHC_CHIPID_MASK = 0x00ff,
718 AHC_AIC7770 = 0x0001,
719 AHC_AIC7850 = 0x0002,
720 AHC_AIC7860 = 0x0003,
721 AHC_AIC7870 = 0x0004,
722 AHC_AIC7880 = 0x0005,
723 AHC_AIC7890 = 0x0006,
724 AHC_AIC7895 = 0x0007,
725 AHC_AIC7896 = 0x0008,
726 AHC_AIC7892 = 0x0009,
727 AHC_AIC7899 = 0x000a,
728 AHC_VL = 0x0100,
729 AHC_EISA = 0x0200,
730 AHC_PCI = 0x0400,
731} ahc_chip;
732
733typedef enum {
734 AHC_FENONE = 0x0000,
735 AHC_ULTRA = 0x0001,
736 AHC_ULTRA2 = 0x0002,
737 AHC_WIDE = 0x0004,
738 AHC_TWIN = 0x0008,
739 AHC_MORE_SRAM = 0x0010,
740 AHC_CMD_CHAN = 0x0020,
741 AHC_QUEUE_REGS = 0x0040,
742 AHC_SG_PRELOAD = 0x0080,
743 AHC_SPIOCAP = 0x0100,
744 AHC_ULTRA3 = 0x0200,
745 AHC_NEW_AUTOTERM = 0x0400,
746 AHC_AIC7770_FE = AHC_FENONE,
747 AHC_AIC7850_FE = AHC_SPIOCAP,
748 AHC_AIC7860_FE = AHC_ULTRA|AHC_SPIOCAP,
749 AHC_AIC7870_FE = AHC_FENONE,
750 AHC_AIC7880_FE = AHC_ULTRA,
751 AHC_AIC7890_FE = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA2|
752 AHC_QUEUE_REGS|AHC_SG_PRELOAD|AHC_NEW_AUTOTERM,
753 AHC_AIC7895_FE = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA,
754 AHC_AIC7896_FE = AHC_AIC7890_FE,
755 AHC_AIC7892_FE = AHC_AIC7890_FE|AHC_ULTRA3,
756 AHC_AIC7899_FE = AHC_AIC7890_FE|AHC_ULTRA3,
757} ahc_feature;
758
759#define SCB_DMA_ADDR(scb, addr) ((unsigned long)(addr) + (scb)->scb_dma->dma_offset)
760
761struct aic7xxx_scb_dma {
762 unsigned long dma_offset;
763
764
765 dma_addr_t dma_address;
766
767 unsigned int dma_len;
768};
769
770typedef enum {
771 AHC_BUG_NONE = 0x0000,
772 AHC_BUG_TMODE_WIDEODD = 0x0001,
773 AHC_BUG_AUTOFLUSH = 0x0002,
774 AHC_BUG_CACHETHEN = 0x0004,
775 AHC_BUG_CACHETHEN_DIS = 0x0008,
776 AHC_BUG_PCI_2_1_RETRY = 0x0010,
777 AHC_BUG_PCI_MWI = 0x0020,
778 AHC_BUG_SCBCHAN_UPLOAD = 0x0040,
779} ahc_bugs;
780
781struct aic7xxx_scb {
782 struct aic7xxx_hwscb *hscb;
783 struct scsi_cmnd *cmd;
784 struct aic7xxx_scb *q_next;
785 volatile scb_flag_type flags;
786 struct hw_scatterlist *sg_list;
787 unsigned char tag_action;
788 unsigned char sg_count;
789 unsigned char *sense_cmd;
790
791
792
793 unsigned char *cmnd;
794 unsigned int sg_length;
795
796
797
798
799
800 void *kmalloc_ptr;
801 struct aic7xxx_scb_dma *scb_dma;
802};
803
804
805
806
807typedef struct {
808 struct aic7xxx_scb *head;
809 struct aic7xxx_scb *tail;
810} scb_queue_type;
811
812static struct {
813 unsigned char errno;
814 const char *errmesg;
815} hard_error[] = {
816 { ILLHADDR, "Illegal Host Access" },
817 { ILLSADDR, "Illegal Sequencer Address referenced" },
818 { ILLOPCODE, "Illegal Opcode in sequencer program" },
819 { SQPARERR, "Sequencer Ram Parity Error" },
820 { DPARERR, "Data-Path Ram Parity Error" },
821 { MPARERR, "Scratch Ram/SCB Array Ram Parity Error" },
822 { PCIERRSTAT,"PCI Error detected" },
823 { CIOPARERR, "CIOBUS Parity Error" }
824};
825
826static unsigned char
827generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 };
828
829typedef struct {
830 scb_queue_type free_scbs;
831
832
833
834 struct aic7xxx_scb *scb_array[AIC7XXX_MAXSCB];
835 struct aic7xxx_hwscb *hscbs;
836 unsigned char numscbs;
837 unsigned char maxhscbs;
838 unsigned char maxscbs;
839 dma_addr_t hscbs_dma;
840 unsigned int hscbs_dma_len;
841 void *hscb_kmalloc_ptr;
842} scb_data_type;
843
844struct target_cmd {
845 unsigned char mesg_bytes[4];
846 unsigned char command[28];
847};
848
849#define AHC_TRANS_CUR 0x0001
850#define AHC_TRANS_ACTIVE 0x0002
851#define AHC_TRANS_GOAL 0x0004
852#define AHC_TRANS_USER 0x0008
853#define AHC_TRANS_QUITE 0x0010
854typedef struct {
855 unsigned char width;
856 unsigned char period;
857 unsigned char offset;
858 unsigned char options;
859} transinfo_type;
860
861struct aic_dev_data {
862 volatile scb_queue_type delayed_scbs;
863 volatile unsigned short temp_q_depth;
864 unsigned short max_q_depth;
865 volatile unsigned char active_cmds;
866
867
868
869
870
871
872
873
874
875
876 long w_total;
877 long r_total;
878 long barrier_total;
879 long ordered_total;
880
881 long w_bins[6];
882 long r_bins[6];
883 transinfo_type cur;
884 transinfo_type goal;
885#define BUS_DEVICE_RESET_PENDING 0x01
886#define DEVICE_RESET_DELAY 0x02
887#define DEVICE_PRINT_DTR 0x04
888#define DEVICE_WAS_BUSY 0x08
889#define DEVICE_DTR_SCANNED 0x10
890#define DEVICE_SCSI_3 0x20
891 volatile unsigned char flags;
892 unsigned needppr:1;
893 unsigned needppr_copy:1;
894 unsigned needsdtr:1;
895 unsigned needsdtr_copy:1;
896 unsigned needwdtr:1;
897 unsigned needwdtr_copy:1;
898 unsigned dtr_pending:1;
899 struct scsi_device *SDptr;
900 struct list_head list;
901};
902
903
904
905
906
907
908
909
910
911
912
913struct aic7xxx_host {
914
915
916
917
918
919
920
921
922 volatile long flags;
923 ahc_feature features;
924 unsigned long base;
925 volatile unsigned char __iomem *maddr;
926 unsigned long isr_count;
927 unsigned long spurious_int;
928 scb_data_type *scb_data;
929 struct aic7xxx_cmd_queue {
930 struct scsi_cmnd *head;
931 struct scsi_cmnd *tail;
932 } completeq;
933
934
935
936
937 volatile scb_queue_type waiting_scbs;
938 unsigned char unpause;
939 unsigned char pause;
940 volatile unsigned char qoutfifonext;
941 volatile unsigned char activescbs;
942 volatile unsigned char max_activescbs;
943 volatile unsigned char qinfifonext;
944 volatile unsigned char *untagged_scbs;
945 volatile unsigned char *qoutfifo;
946 volatile unsigned char *qinfifo;
947
948 unsigned char dev_last_queue_full[MAX_TARGETS];
949 unsigned char dev_last_queue_full_count[MAX_TARGETS];
950 unsigned short ultraenb;
951 unsigned short discenable;
952 transinfo_type user[MAX_TARGETS];
953
954 unsigned char msg_buf[13];
955 unsigned char msg_type;
956#define MSG_TYPE_NONE 0x00
957#define MSG_TYPE_INITIATOR_MSGOUT 0x01
958#define MSG_TYPE_INITIATOR_MSGIN 0x02
959 unsigned char msg_len;
960 unsigned char msg_index;
961
962
963
964
965
966
967
968
969
970
971 unsigned int irq;
972 int instance;
973 int scsi_id;
974 int scsi_id_b;
975 unsigned int bios_address;
976 int board_name_index;
977 unsigned short bios_control;
978 unsigned short adapter_control;
979 struct pci_dev *pdev;
980 unsigned char pci_bus;
981 unsigned char pci_device_fn;
982 struct seeprom_config sc;
983 unsigned short sc_type;
984 unsigned short sc_size;
985 struct aic7xxx_host *next;
986 struct Scsi_Host *host;
987 struct list_head aic_devs;
988 int host_no;
989 unsigned long mbase;
990 ahc_chip chip;
991 ahc_bugs bugs;
992 dma_addr_t fifo_dma;
993};
994
995
996
997
998
999
1000#define AHC_SYNCRATE_ULTRA3 0
1001#define AHC_SYNCRATE_ULTRA2 1
1002#define AHC_SYNCRATE_ULTRA 3
1003#define AHC_SYNCRATE_FAST 6
1004#define AHC_SYNCRATE_CRC 0x40
1005#define AHC_SYNCRATE_SE 0x10
1006static struct aic7xxx_syncrate {
1007
1008#define ULTRA_SXFR 0x100
1009 int sxfr_ultra2;
1010 int sxfr;
1011 unsigned char period;
1012 const char *rate[2];
1013} aic7xxx_syncrates[] = {
1014 { 0x42, 0x000, 9, {"80.0", "160.0"} },
1015 { 0x13, 0x000, 10, {"40.0", "80.0"} },
1016 { 0x14, 0x000, 11, {"33.0", "66.6"} },
1017 { 0x15, 0x100, 12, {"20.0", "40.0"} },
1018 { 0x16, 0x110, 15, {"16.0", "32.0"} },
1019 { 0x17, 0x120, 18, {"13.4", "26.8"} },
1020 { 0x18, 0x000, 25, {"10.0", "20.0"} },
1021 { 0x19, 0x010, 31, {"8.0", "16.0"} },
1022 { 0x1a, 0x020, 37, {"6.67", "13.3"} },
1023 { 0x1b, 0x030, 43, {"5.7", "11.4"} },
1024 { 0x10, 0x040, 50, {"5.0", "10.0"} },
1025 { 0x00, 0x050, 56, {"4.4", "8.8" } },
1026 { 0x00, 0x060, 62, {"4.0", "8.0" } },
1027 { 0x00, 0x070, 68, {"3.6", "7.2" } },
1028 { 0x00, 0x000, 0, {NULL, NULL} },
1029};
1030
1031#define CTL_OF_SCB(scb) (((scb->hscb)->target_channel_lun >> 3) & 0x1), \
1032 (((scb->hscb)->target_channel_lun >> 4) & 0xf), \
1033 ((scb->hscb)->target_channel_lun & 0x07)
1034
1035#define CTL_OF_CMD(cmd) ((cmd->device->channel) & 0x01), \
1036 ((cmd->device->id) & 0x0f), \
1037 ((cmd->device->lun) & 0x07)
1038
1039#define TARGET_INDEX(cmd) ((cmd)->device->id | ((cmd)->device->channel << 3))
1040
1041
1042
1043
1044
1045#define WARN_LEAD KERN_WARNING "(scsi%d:%d:%d:%d) "
1046#define INFO_LEAD KERN_INFO "(scsi%d:%d:%d:%d) "
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057static unsigned int aic7xxx_default_queue_depth = AIC7XXX_CMDS_PER_DEVICE;
1058
1059
1060
1061
1062
1063
1064static unsigned int aic7xxx_no_reset = 0;
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082static int aic7xxx_reverse_scan = 0;
1083
1084
1085
1086
1087
1088static unsigned int aic7xxx_extended = 0;
1089
1090
1091
1092
1093
1094
1095static int aic7xxx_irq_trigger = -1;
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129static int aic7xxx_override_term = -1;
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156static int aic7xxx_stpwlev = -1;
1157
1158
1159
1160
1161static int aic7xxx_panic_on_abort = 0;
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177static int aic7xxx_pci_parity = 0;
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187static int aic7xxx_dump_card = 0;
1188
1189
1190
1191
1192
1193
1194
1195static int aic7xxx_dump_sequencer = 0;
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206static int aic7xxx_no_probe = 0;
1207
1208
1209
1210
1211
1212
1213
1214static int aic7xxx_scbram = 0;
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226static int aic7xxx_seltime = 0x10;
1227
1228
1229
1230#ifdef MODULE
1231static char * aic7xxx = NULL;
1232module_param(aic7xxx, charp, 0);
1233#endif
1234
1235#define VERBOSE_NORMAL 0x0000
1236#define VERBOSE_NEGOTIATION 0x0001
1237#define VERBOSE_SEQINT 0x0002
1238#define VERBOSE_SCSIINT 0x0004
1239#define VERBOSE_PROBE 0x0008
1240#define VERBOSE_PROBE2 0x0010
1241#define VERBOSE_NEGOTIATION2 0x0020
1242#define VERBOSE_MINOR_ERROR 0x0040
1243#define VERBOSE_TRACING 0x0080
1244#define VERBOSE_ABORT 0x0f00
1245#define VERBOSE_ABORT_MID 0x0100
1246#define VERBOSE_ABORT_FIND 0x0200
1247#define VERBOSE_ABORT_PROCESS 0x0400
1248#define VERBOSE_ABORT_RETURN 0x0800
1249#define VERBOSE_RESET 0xf000
1250#define VERBOSE_RESET_MID 0x1000
1251#define VERBOSE_RESET_FIND 0x2000
1252#define VERBOSE_RESET_PROCESS 0x4000
1253#define VERBOSE_RESET_RETURN 0x8000
1254static int aic7xxx_verbose = VERBOSE_NORMAL | VERBOSE_NEGOTIATION |
1255 VERBOSE_PROBE;
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265static int aic7xxx_release(struct Scsi_Host *host);
1266static void aic7xxx_set_syncrate(struct aic7xxx_host *p,
1267 struct aic7xxx_syncrate *syncrate, int target, int channel,
1268 unsigned int period, unsigned int offset, unsigned char options,
1269 unsigned int type, struct aic_dev_data *aic_dev);
1270static void aic7xxx_set_width(struct aic7xxx_host *p, int target, int channel,
1271 int lun, unsigned int width, unsigned int type,
1272 struct aic_dev_data *aic_dev);
1273static void aic7xxx_panic_abort(struct aic7xxx_host *p, struct scsi_cmnd *cmd);
1274static void aic7xxx_print_card(struct aic7xxx_host *p);
1275static void aic7xxx_print_scratch_ram(struct aic7xxx_host *p);
1276static void aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded);
1277#ifdef AIC7XXX_VERBOSE_DEBUGGING
1278static void aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer);
1279#endif
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290static unsigned char
1291aic_inb(struct aic7xxx_host *p, long port)
1292{
1293#ifdef MMAPIO
1294 unsigned char x;
1295 if(p->maddr)
1296 {
1297 x = readb(p->maddr + port);
1298 }
1299 else
1300 {
1301 x = inb(p->base + port);
1302 }
1303 return(x);
1304#else
1305 return(inb(p->base + port));
1306#endif
1307}
1308
1309static void
1310aic_outb(struct aic7xxx_host *p, unsigned char val, long port)
1311{
1312#ifdef MMAPIO
1313 if(p->maddr)
1314 {
1315 writeb(val, p->maddr + port);
1316 mb();
1317 readb(p->maddr + HCNTRL);
1318 }
1319 else
1320 {
1321 outb(val, p->base + port);
1322 mb();
1323 }
1324#else
1325 outb(val, p->base + port);
1326 mb();
1327#endif
1328}
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339static int
1340aic7xxx_setup(char *s)
1341{
1342 int i, n;
1343 char *p;
1344 char *end;
1345
1346 static struct {
1347 const char *name;
1348 unsigned int *flag;
1349 } options[] = {
1350 { "extended", &aic7xxx_extended },
1351 { "no_reset", &aic7xxx_no_reset },
1352 { "irq_trigger", &aic7xxx_irq_trigger },
1353 { "verbose", &aic7xxx_verbose },
1354 { "reverse_scan",&aic7xxx_reverse_scan },
1355 { "override_term", &aic7xxx_override_term },
1356 { "stpwlev", &aic7xxx_stpwlev },
1357 { "no_probe", &aic7xxx_no_probe },
1358 { "panic_on_abort", &aic7xxx_panic_on_abort },
1359 { "pci_parity", &aic7xxx_pci_parity },
1360 { "dump_card", &aic7xxx_dump_card },
1361 { "dump_sequencer", &aic7xxx_dump_sequencer },
1362 { "default_queue_depth", &aic7xxx_default_queue_depth },
1363 { "scbram", &aic7xxx_scbram },
1364 { "seltime", &aic7xxx_seltime },
1365 { "tag_info", NULL }
1366 };
1367
1368 end = strchr(s, '\0');
1369
1370 while ((p = strsep(&s, ",.")) != NULL)
1371 {
1372 for (i = 0; i < ARRAY_SIZE(options); i++)
1373 {
1374 n = strlen(options[i].name);
1375 if (!strncmp(options[i].name, p, n))
1376 {
1377 if (!strncmp(p, "tag_info", n))
1378 {
1379 if (p[n] == ':')
1380 {
1381 char *base;
1382 char *tok, *tok_end, *tok_end2;
1383 char tok_list[] = { '.', ',', '{', '}', '\0' };
1384 int i, instance = -1, device = -1;
1385 unsigned char done = FALSE;
1386
1387 base = p;
1388 tok = base + n + 1;
1389 tok_end = strchr(tok, '\0');
1390 if (tok_end < end)
1391 *tok_end = ',';
1392 while(!done)
1393 {
1394 switch(*tok)
1395 {
1396 case '{':
1397 if (instance == -1)
1398 instance = 0;
1399 else if (device == -1)
1400 device = 0;
1401 tok++;
1402 break;
1403 case '}':
1404 if (device != -1)
1405 device = -1;
1406 else if (instance != -1)
1407 instance = -1;
1408 tok++;
1409 break;
1410 case ',':
1411 case '.':
1412 if (instance == -1)
1413 done = TRUE;
1414 else if (device >= 0)
1415 device++;
1416 else if (instance >= 0)
1417 instance++;
1418 if ( (device >= MAX_TARGETS) ||
1419 (instance >= ARRAY_SIZE(aic7xxx_tag_info)) )
1420 done = TRUE;
1421 tok++;
1422 if (!done)
1423 {
1424 base = tok;
1425 }
1426 break;
1427 case '\0':
1428 done = TRUE;
1429 break;
1430 default:
1431 done = TRUE;
1432 tok_end = strchr(tok, '\0');
1433 for(i=0; tok_list[i]; i++)
1434 {
1435 tok_end2 = strchr(tok, tok_list[i]);
1436 if ( (tok_end2) && (tok_end2 < tok_end) )
1437 {
1438 tok_end = tok_end2;
1439 done = FALSE;
1440 }
1441 }
1442 if ( (instance >= 0) && (device >= 0) &&
1443 (instance < ARRAY_SIZE(aic7xxx_tag_info)) &&
1444 (device < MAX_TARGETS) )
1445 aic7xxx_tag_info[instance].tag_commands[device] =
1446 simple_strtoul(tok, NULL, 0) & 0xff;
1447 tok = tok_end;
1448 break;
1449 }
1450 }
1451 while((p != base) && (p != NULL))
1452 p = strsep(&s, ",.");
1453 }
1454 }
1455 else if (p[n] == ':')
1456 {
1457 *(options[i].flag) = simple_strtoul(p + n + 1, NULL, 0);
1458 if(!strncmp(p, "seltime", n))
1459 {
1460 *(options[i].flag) = (*(options[i].flag) % 4) << 3;
1461 }
1462 }
1463 else if (!strncmp(p, "verbose", n))
1464 {
1465 *(options[i].flag) = 0xff29;
1466 }
1467 else
1468 {
1469 *(options[i].flag) = ~(*(options[i].flag));
1470 if(!strncmp(p, "seltime", n))
1471 {
1472 *(options[i].flag) = (*(options[i].flag) % 4) << 3;
1473 }
1474 }
1475 }
1476 }
1477 }
1478 return 1;
1479}
1480
1481__setup("aic7xxx=", aic7xxx_setup);
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492static void
1493pause_sequencer(struct aic7xxx_host *p)
1494{
1495 aic_outb(p, p->pause, HCNTRL);
1496 while ((aic_inb(p, HCNTRL) & PAUSE) == 0)
1497 {
1498 ;
1499 }
1500 if(p->features & AHC_ULTRA2)
1501 {
1502 aic_inb(p, CCSCBCTL);
1503 }
1504}
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514static void
1515unpause_sequencer(struct aic7xxx_host *p, int unpause_always)
1516{
1517 if (unpause_always ||
1518 ( !(aic_inb(p, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) &&
1519 !(p->flags & AHC_HANDLING_REQINITS) ) )
1520 {
1521 aic_outb(p, p->unpause, HCNTRL);
1522 }
1523}
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533static void
1534restart_sequencer(struct aic7xxx_host *p)
1535{
1536 aic_outb(p, 0, SEQADDR0);
1537 aic_outb(p, 0, SEQADDR1);
1538 aic_outb(p, FASTMODE, SEQCTL);
1539}
1540
1541
1542
1543
1544
1545
1546
1547
1548#include "aic7xxx_old/aic7xxx_seq.c"
1549
1550
1551
1552
1553
1554
1555
1556
1557static int
1558aic7xxx_check_patch(struct aic7xxx_host *p,
1559 struct sequencer_patch **start_patch, int start_instr, int *skip_addr)
1560{
1561 struct sequencer_patch *cur_patch;
1562 struct sequencer_patch *last_patch;
1563 int num_patches;
1564
1565 num_patches = ARRAY_SIZE(sequencer_patches);
1566 last_patch = &sequencer_patches[num_patches];
1567 cur_patch = *start_patch;
1568
1569 while ((cur_patch < last_patch) && (start_instr == cur_patch->begin))
1570 {
1571 if (cur_patch->patch_func(p) == 0)
1572 {
1573
1574
1575
1576 *skip_addr = start_instr + cur_patch->skip_instr;
1577 cur_patch += cur_patch->skip_patch;
1578 }
1579 else
1580 {
1581
1582
1583
1584
1585 cur_patch++;
1586 }
1587 }
1588
1589 *start_patch = cur_patch;
1590 if (start_instr < *skip_addr)
1591
1592
1593
1594 return (0);
1595 return(1);
1596}
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606static void
1607aic7xxx_download_instr(struct aic7xxx_host *p, int instrptr,
1608 unsigned char *dconsts)
1609{
1610 union ins_formats instr;
1611 struct ins_format1 *fmt1_ins;
1612 struct ins_format3 *fmt3_ins;
1613 unsigned char opcode;
1614
1615 instr = *(union ins_formats*) &seqprog[instrptr * 4];
1616
1617 instr.integer = le32_to_cpu(instr.integer);
1618
1619 fmt1_ins = &instr.format1;
1620 fmt3_ins = NULL;
1621
1622
1623 opcode = instr.format1.opcode;
1624 switch (opcode)
1625 {
1626 case AIC_OP_JMP:
1627 case AIC_OP_JC:
1628 case AIC_OP_JNC:
1629 case AIC_OP_CALL:
1630 case AIC_OP_JNE:
1631 case AIC_OP_JNZ:
1632 case AIC_OP_JE:
1633 case AIC_OP_JZ:
1634 {
1635 struct sequencer_patch *cur_patch;
1636 int address_offset;
1637 unsigned int address;
1638 int skip_addr;
1639 int i;
1640
1641 fmt3_ins = &instr.format3;
1642 address_offset = 0;
1643 address = fmt3_ins->address;
1644 cur_patch = sequencer_patches;
1645 skip_addr = 0;
1646
1647 for (i = 0; i < address;)
1648 {
1649 aic7xxx_check_patch(p, &cur_patch, i, &skip_addr);
1650 if (skip_addr > i)
1651 {
1652 int end_addr;
1653
1654 end_addr = min_t(int, address, skip_addr);
1655 address_offset += end_addr - i;
1656 i = skip_addr;
1657 }
1658 else
1659 {
1660 i++;
1661 }
1662 }
1663 address -= address_offset;
1664 fmt3_ins->address = address;
1665
1666 }
1667 case AIC_OP_OR:
1668 case AIC_OP_AND:
1669 case AIC_OP_XOR:
1670 case AIC_OP_ADD:
1671 case AIC_OP_ADC:
1672 case AIC_OP_BMOV:
1673 if (fmt1_ins->parity != 0)
1674 {
1675 fmt1_ins->immediate = dconsts[fmt1_ins->immediate];
1676 }
1677 fmt1_ins->parity = 0;
1678
1679 case AIC_OP_ROL:
1680 if ((p->features & AHC_ULTRA2) != 0)
1681 {
1682 int i, count;
1683
1684
1685 for ( i=0, count=0; i < 31; i++)
1686 {
1687 unsigned int mask;
1688
1689 mask = 0x01 << i;
1690 if ((instr.integer & mask) != 0)
1691 count++;
1692 }
1693 if (!(count & 0x01))
1694 instr.format1.parity = 1;
1695 }
1696 else
1697 {
1698 if (fmt3_ins != NULL)
1699 {
1700 instr.integer = fmt3_ins->immediate |
1701 (fmt3_ins->source << 8) |
1702 (fmt3_ins->address << 16) |
1703 (fmt3_ins->opcode << 25);
1704 }
1705 else
1706 {
1707 instr.integer = fmt1_ins->immediate |
1708 (fmt1_ins->source << 8) |
1709 (fmt1_ins->destination << 16) |
1710 (fmt1_ins->ret << 24) |
1711 (fmt1_ins->opcode << 25);
1712 }
1713 }
1714 aic_outb(p, (instr.integer & 0xff), SEQRAM);
1715 aic_outb(p, ((instr.integer >> 8) & 0xff), SEQRAM);
1716 aic_outb(p, ((instr.integer >> 16) & 0xff), SEQRAM);
1717 aic_outb(p, ((instr.integer >> 24) & 0xff), SEQRAM);
1718 udelay(10);
1719 break;
1720
1721 default:
1722 panic("aic7xxx: Unknown opcode encountered in sequencer program.");
1723 break;
1724 }
1725}
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735static void
1736aic7xxx_loadseq(struct aic7xxx_host *p)
1737{
1738 struct sequencer_patch *cur_patch;
1739 int i;
1740 int downloaded;
1741 int skip_addr;
1742 unsigned char download_consts[4] = {0, 0, 0, 0};
1743
1744 if (aic7xxx_verbose & VERBOSE_PROBE)
1745 {
1746 printk(KERN_INFO "(scsi%d) Downloading sequencer code...", p->host_no);
1747 }
1748#if 0
1749 download_consts[TMODE_NUMCMDS] = p->num_targetcmds;
1750#endif
1751 download_consts[TMODE_NUMCMDS] = 0;
1752 cur_patch = &sequencer_patches[0];
1753 downloaded = 0;
1754 skip_addr = 0;
1755
1756 aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL);
1757 aic_outb(p, 0, SEQADDR0);
1758 aic_outb(p, 0, SEQADDR1);
1759
1760 for (i = 0; i < sizeof(seqprog) / 4; i++)
1761 {
1762 if (aic7xxx_check_patch(p, &cur_patch, i, &skip_addr) == 0)
1763 {
1764
1765 continue;
1766 }
1767 aic7xxx_download_instr(p, i, &download_consts[0]);
1768 downloaded++;
1769 }
1770
1771 aic_outb(p, 0, SEQADDR0);
1772 aic_outb(p, 0, SEQADDR1);
1773 aic_outb(p, FASTMODE | FAILDIS, SEQCTL);
1774 unpause_sequencer(p, TRUE);
1775 mdelay(1);
1776 pause_sequencer(p);
1777 aic_outb(p, FASTMODE, SEQCTL);
1778 if (aic7xxx_verbose & VERBOSE_PROBE)
1779 {
1780 printk(" %d instructions downloaded\n", downloaded);
1781 }
1782 if (aic7xxx_dump_sequencer)
1783 aic7xxx_print_sequencer(p, downloaded);
1784}
1785
1786
1787
1788
1789
1790
1791
1792
1793static void
1794aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded)
1795{
1796 int i, k, temp;
1797
1798 aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL);
1799 aic_outb(p, 0, SEQADDR0);
1800 aic_outb(p, 0, SEQADDR1);
1801
1802 k = 0;
1803 for (i=0; i < downloaded; i++)
1804 {
1805 if ( k == 0 )
1806 printk("%03x: ", i);
1807 temp = aic_inb(p, SEQRAM);
1808 temp |= (aic_inb(p, SEQRAM) << 8);
1809 temp |= (aic_inb(p, SEQRAM) << 16);
1810 temp |= (aic_inb(p, SEQRAM) << 24);
1811 printk("%08x", temp);
1812 if ( ++k == 8 )
1813 {
1814 printk("\n");
1815 k = 0;
1816 }
1817 else
1818 printk(" ");
1819 }
1820 aic_outb(p, 0, SEQADDR0);
1821 aic_outb(p, 0, SEQADDR1);
1822 aic_outb(p, FASTMODE | FAILDIS, SEQCTL);
1823 unpause_sequencer(p, TRUE);
1824 mdelay(1);
1825 pause_sequencer(p);
1826 aic_outb(p, FASTMODE, SEQCTL);
1827 printk("\n");
1828}
1829
1830
1831
1832
1833
1834
1835
1836
1837static const char *
1838aic7xxx_info(struct Scsi_Host *dooh)
1839{
1840 static char buffer[256];
1841 char *bp;
1842 struct aic7xxx_host *p;
1843
1844 bp = &buffer[0];
1845 p = (struct aic7xxx_host *)dooh->hostdata;
1846 memset(bp, 0, sizeof(buffer));
1847 strcpy(bp, "Adaptec AHA274x/284x/294x (EISA/VLB/PCI-Fast SCSI) ");
1848 strcat(bp, AIC7XXX_C_VERSION);
1849 strcat(bp, "/");
1850 strcat(bp, AIC7XXX_H_VERSION);
1851 strcat(bp, "\n");
1852 strcat(bp, " <");
1853 strcat(bp, board_names[p->board_name_index]);
1854 strcat(bp, ">");
1855
1856 return(bp);
1857}
1858
1859
1860
1861
1862
1863
1864
1865
1866static struct aic7xxx_syncrate *
1867aic7xxx_find_syncrate(struct aic7xxx_host *p, unsigned int *period,
1868 unsigned int maxsync, unsigned char *options)
1869{
1870 struct aic7xxx_syncrate *syncrate;
1871 int done = FALSE;
1872
1873 switch(*options)
1874 {
1875 case MSG_EXT_PPR_OPTION_DT_CRC:
1876 case MSG_EXT_PPR_OPTION_DT_UNITS:
1877 if(!(p->features & AHC_ULTRA3))
1878 {
1879 *options = 0;
1880 maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2);
1881 }
1882 break;
1883 case MSG_EXT_PPR_OPTION_DT_CRC_QUICK:
1884 case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK:
1885 if(!(p->features & AHC_ULTRA3))
1886 {
1887 *options = 0;
1888 maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2);
1889 }
1890 else
1891 {
1892
1893
1894
1895
1896
1897
1898
1899 switch(*options)
1900 {
1901 case MSG_EXT_PPR_OPTION_DT_CRC_QUICK:
1902 *options = MSG_EXT_PPR_OPTION_DT_CRC;
1903 break;
1904 case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK:
1905 *options = MSG_EXT_PPR_OPTION_DT_UNITS;
1906 break;
1907 }
1908 }
1909 break;
1910 default:
1911 *options = 0;
1912 maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2);
1913 break;
1914 }
1915 syncrate = &aic7xxx_syncrates[maxsync];
1916 while ( (syncrate->rate[0] != NULL) &&
1917 (!(p->features & AHC_ULTRA2) || syncrate->sxfr_ultra2) )
1918 {
1919 if (*period <= syncrate->period)
1920 {
1921 switch(*options)
1922 {
1923 case MSG_EXT_PPR_OPTION_DT_CRC:
1924 case MSG_EXT_PPR_OPTION_DT_UNITS:
1925 if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC))
1926 {
1927 done = TRUE;
1928
1929
1930
1931
1932 *options = 0;
1933
1934
1935
1936
1937 *period = syncrate->period;
1938 }
1939 else
1940 {
1941 done = TRUE;
1942 if(syncrate == &aic7xxx_syncrates[maxsync])
1943 {
1944 *period = syncrate->period;
1945 }
1946 }
1947 break;
1948 default:
1949 if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC))
1950 {
1951 done = TRUE;
1952 if(syncrate == &aic7xxx_syncrates[maxsync])
1953 {
1954 *period = syncrate->period;
1955 }
1956 }
1957 break;
1958 }
1959 if(done)
1960 {
1961 break;
1962 }
1963 }
1964 syncrate++;
1965 }
1966 if ( (*period == 0) || (syncrate->rate[0] == NULL) ||
1967 ((p->features & AHC_ULTRA2) && (syncrate->sxfr_ultra2 == 0)) )
1968 {
1969
1970
1971
1972 *options = 0;
1973 *period = 255;
1974 syncrate = NULL;
1975 }
1976 return (syncrate);
1977}
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987static unsigned int
1988aic7xxx_find_period(struct aic7xxx_host *p, unsigned int scsirate,
1989 unsigned int maxsync)
1990{
1991 struct aic7xxx_syncrate *syncrate;
1992
1993 if (p->features & AHC_ULTRA2)
1994 {
1995 scsirate &= SXFR_ULTRA2;
1996 }
1997 else
1998 {
1999 scsirate &= SXFR;
2000 }
2001
2002 syncrate = &aic7xxx_syncrates[maxsync];
2003 while (syncrate->rate[0] != NULL)
2004 {
2005 if (p->features & AHC_ULTRA2)
2006 {
2007 if (syncrate->sxfr_ultra2 == 0)
2008 break;
2009 else if (scsirate == syncrate->sxfr_ultra2)
2010 return (syncrate->period);
2011 else if (scsirate == (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC))
2012 return (syncrate->period);
2013 }
2014 else if (scsirate == (syncrate->sxfr & ~ULTRA_SXFR))
2015 {
2016 return (syncrate->period);
2017 }
2018 syncrate++;
2019 }
2020 return (0);
2021}
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031static void
2032aic7xxx_validate_offset(struct aic7xxx_host *p,
2033 struct aic7xxx_syncrate *syncrate, unsigned int *offset, int wide)
2034{
2035 unsigned int maxoffset;
2036
2037
2038 if (syncrate == NULL)
2039 {
2040 maxoffset = 0;
2041 }
2042 else if (p->features & AHC_ULTRA2)
2043 {
2044 maxoffset = MAX_OFFSET_ULTRA2;
2045 }
2046 else
2047 {
2048 if (wide)
2049 maxoffset = MAX_OFFSET_16BIT;
2050 else
2051 maxoffset = MAX_OFFSET_8BIT;
2052 }
2053 *offset = min(*offset, maxoffset);
2054}
2055
2056
2057
2058
2059
2060
2061
2062
2063static void
2064aic7xxx_set_syncrate(struct aic7xxx_host *p, struct aic7xxx_syncrate *syncrate,
2065 int target, int channel, unsigned int period, unsigned int offset,
2066 unsigned char options, unsigned int type, struct aic_dev_data *aic_dev)
2067{
2068 unsigned char tindex;
2069 unsigned short target_mask;
2070 unsigned char lun, old_options;
2071 unsigned int old_period, old_offset;
2072
2073 tindex = target | (channel << 3);
2074 target_mask = 0x01 << tindex;
2075 lun = aic_inb(p, SCB_TCL) & 0x07;
2076
2077 if (syncrate == NULL)
2078 {
2079 period = 0;
2080 offset = 0;
2081 }
2082
2083 old_period = aic_dev->cur.period;
2084 old_offset = aic_dev->cur.offset;
2085 old_options = aic_dev->cur.options;
2086
2087
2088 if (type & AHC_TRANS_CUR)
2089 {
2090 unsigned int scsirate;
2091
2092 scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
2093 if (p->features & AHC_ULTRA2)
2094 {
2095 scsirate &= ~SXFR_ULTRA2;
2096 if (syncrate != NULL)
2097 {
2098 switch(options)
2099 {
2100 case MSG_EXT_PPR_OPTION_DT_UNITS:
2101
2102
2103
2104 scsirate |= (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC);
2105 break;
2106 default:
2107 scsirate |= syncrate->sxfr_ultra2;
2108 break;
2109 }
2110 }
2111 if (type & AHC_TRANS_ACTIVE)
2112 {
2113 aic_outb(p, offset, SCSIOFFSET);
2114 }
2115 aic_outb(p, offset, TARG_OFFSET + tindex);
2116 }
2117 else
2118 {
2119 scsirate &= ~(SXFR|SOFS);
2120 p->ultraenb &= ~target_mask;
2121 if (syncrate != NULL)
2122 {
2123 if (syncrate->sxfr & ULTRA_SXFR)
2124 {
2125 p->ultraenb |= target_mask;
2126 }
2127 scsirate |= (syncrate->sxfr & SXFR);
2128 scsirate |= (offset & SOFS);
2129 }
2130 if (type & AHC_TRANS_ACTIVE)
2131 {
2132 unsigned char sxfrctl0;
2133
2134 sxfrctl0 = aic_inb(p, SXFRCTL0);
2135 sxfrctl0 &= ~FAST20;
2136 if (p->ultraenb & target_mask)
2137 sxfrctl0 |= FAST20;
2138 aic_outb(p, sxfrctl0, SXFRCTL0);
2139 }
2140 aic_outb(p, p->ultraenb & 0xff, ULTRA_ENB);
2141 aic_outb(p, (p->ultraenb >> 8) & 0xff, ULTRA_ENB + 1 );
2142 }
2143 if (type & AHC_TRANS_ACTIVE)
2144 {
2145 aic_outb(p, scsirate, SCSIRATE);
2146 }
2147 aic_outb(p, scsirate, TARG_SCSIRATE + tindex);
2148 aic_dev->cur.period = period;
2149 aic_dev->cur.offset = offset;
2150 aic_dev->cur.options = options;
2151 if ( !(type & AHC_TRANS_QUITE) &&
2152 (aic7xxx_verbose & VERBOSE_NEGOTIATION) &&
2153 (aic_dev->flags & DEVICE_PRINT_DTR) )
2154 {
2155 if (offset)
2156 {
2157 int rate_mod = (scsirate & WIDEXFER) ? 1 : 0;
2158
2159 printk(INFO_LEAD "Synchronous at %s Mbyte/sec, "
2160 "offset %d.\n", p->host_no, channel, target, lun,
2161 syncrate->rate[rate_mod], offset);
2162 }
2163 else
2164 {
2165 printk(INFO_LEAD "Using asynchronous transfers.\n",
2166 p->host_no, channel, target, lun);
2167 }
2168 aic_dev->flags &= ~DEVICE_PRINT_DTR;
2169 }
2170 }
2171
2172 if (type & AHC_TRANS_GOAL)
2173 {
2174 aic_dev->goal.period = period;
2175 aic_dev->goal.offset = offset;
2176 aic_dev->goal.options = options;
2177 }
2178
2179 if (type & AHC_TRANS_USER)
2180 {
2181 p->user[tindex].period = period;
2182 p->user[tindex].offset = offset;
2183 p->user[tindex].options = options;
2184 }
2185}
2186
2187
2188
2189
2190
2191
2192
2193
2194static void
2195aic7xxx_set_width(struct aic7xxx_host *p, int target, int channel, int lun,
2196 unsigned int width, unsigned int type, struct aic_dev_data *aic_dev)
2197{
2198 unsigned char tindex;
2199 unsigned short target_mask;
2200 unsigned int old_width;
2201
2202 tindex = target | (channel << 3);
2203 target_mask = 1 << tindex;
2204
2205 old_width = aic_dev->cur.width;
2206
2207 if (type & AHC_TRANS_CUR)
2208 {
2209 unsigned char scsirate;
2210
2211 scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
2212
2213 scsirate &= ~WIDEXFER;
2214 if (width == MSG_EXT_WDTR_BUS_16_BIT)
2215 scsirate |= WIDEXFER;
2216
2217 aic_outb(p, scsirate, TARG_SCSIRATE + tindex);
2218
2219 if (type & AHC_TRANS_ACTIVE)
2220 aic_outb(p, scsirate, SCSIRATE);
2221
2222 aic_dev->cur.width = width;
2223
2224 if ( !(type & AHC_TRANS_QUITE) &&
2225 (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2226 (aic_dev->flags & DEVICE_PRINT_DTR) )
2227 {
2228 printk(INFO_LEAD "Using %s transfers\n", p->host_no, channel, target,
2229 lun, (scsirate & WIDEXFER) ? "Wide(16bit)" : "Narrow(8bit)" );
2230 }
2231 }
2232
2233 if (type & AHC_TRANS_GOAL)
2234 aic_dev->goal.width = width;
2235 if (type & AHC_TRANS_USER)
2236 p->user[tindex].width = width;
2237
2238 if (aic_dev->goal.offset)
2239 {
2240 if (p->features & AHC_ULTRA2)
2241 {
2242 aic_dev->goal.offset = MAX_OFFSET_ULTRA2;
2243 }
2244 else if (width == MSG_EXT_WDTR_BUS_16_BIT)
2245 {
2246 aic_dev->goal.offset = MAX_OFFSET_16BIT;
2247 }
2248 else
2249 {
2250 aic_dev->goal.offset = MAX_OFFSET_8BIT;
2251 }
2252 }
2253}
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263static void
2264scbq_init(volatile scb_queue_type *queue)
2265{
2266 queue->head = NULL;
2267 queue->tail = NULL;
2268}
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278static inline void
2279scbq_insert_head(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2280{
2281 scb->q_next = queue->head;
2282 queue->head = scb;
2283 if (queue->tail == NULL)
2284 queue->tail = queue->head;
2285}
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295static inline struct aic7xxx_scb *
2296scbq_remove_head(volatile scb_queue_type *queue)
2297{
2298 struct aic7xxx_scb * scbp;
2299
2300 scbp = queue->head;
2301 if (queue->head != NULL)
2302 queue->head = queue->head->q_next;
2303 if (queue->head == NULL)
2304 queue->tail = NULL;
2305 return(scbp);
2306}
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316static inline void
2317scbq_remove(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2318{
2319 if (queue->head == scb)
2320 {
2321
2322 scbq_remove_head(queue);
2323 }
2324 else
2325 {
2326 struct aic7xxx_scb *curscb = queue->head;
2327
2328
2329
2330
2331
2332 while ((curscb != NULL) && (curscb->q_next != scb))
2333 {
2334 curscb = curscb->q_next;
2335 }
2336 if (curscb != NULL)
2337 {
2338
2339 curscb->q_next = scb->q_next;
2340 if (scb->q_next == NULL)
2341 {
2342
2343 queue->tail = curscb;
2344 }
2345 }
2346 }
2347}
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357static inline void
2358scbq_insert_tail(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2359{
2360 scb->q_next = NULL;
2361 if (queue->tail != NULL)
2362 queue->tail->q_next = scb;
2363 queue->tail = scb;
2364 if (queue->head == NULL)
2365 queue->head = queue->tail;
2366}
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378static int
2379aic7xxx_match_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
2380 int target, int channel, int lun, unsigned char tag)
2381{
2382 int targ = (scb->hscb->target_channel_lun >> 4) & 0x0F;
2383 int chan = (scb->hscb->target_channel_lun >> 3) & 0x01;
2384 int slun = scb->hscb->target_channel_lun & 0x07;
2385 int match;
2386
2387 match = ((chan == channel) || (channel == ALL_CHANNELS));
2388 if (match != 0)
2389 match = ((targ == target) || (target == ALL_TARGETS));
2390 if (match != 0)
2391 match = ((lun == slun) || (lun == ALL_LUNS));
2392 if (match != 0)
2393 match = ((tag == scb->hscb->tag) || (tag == SCB_LIST_NULL));
2394
2395 return (match);
2396}
2397
2398
2399
2400
2401
2402
2403
2404
2405static void
2406aic7xxx_add_curscb_to_free_list(struct aic7xxx_host *p)
2407{
2408
2409
2410
2411
2412 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
2413 aic_outb(p, 0, SCB_CONTROL);
2414
2415 aic_outb(p, aic_inb(p, FREE_SCBH), SCB_NEXT);
2416 aic_outb(p, aic_inb(p, SCBPTR), FREE_SCBH);
2417}
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427static unsigned char
2428aic7xxx_rem_scb_from_disc_list(struct aic7xxx_host *p, unsigned char scbptr,
2429 unsigned char prev)
2430{
2431 unsigned char next;
2432
2433 aic_outb(p, scbptr, SCBPTR);
2434 next = aic_inb(p, SCB_NEXT);
2435 aic7xxx_add_curscb_to_free_list(p);
2436
2437 if (prev != SCB_LIST_NULL)
2438 {
2439 aic_outb(p, prev, SCBPTR);
2440 aic_outb(p, next, SCB_NEXT);
2441 }
2442 else
2443 {
2444 aic_outb(p, next, DISCONNECTED_SCBH);
2445 }
2446
2447 return next;
2448}
2449
2450
2451
2452
2453
2454
2455
2456
2457static inline void
2458aic7xxx_busy_target(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2459{
2460 p->untagged_scbs[scb->hscb->target_channel_lun] = scb->hscb->tag;
2461}
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471static inline unsigned char
2472aic7xxx_index_busy_target(struct aic7xxx_host *p, unsigned char tcl,
2473 int unbusy)
2474{
2475 unsigned char busy_scbid;
2476
2477 busy_scbid = p->untagged_scbs[tcl];
2478 if (unbusy)
2479 {
2480 p->untagged_scbs[tcl] = SCB_LIST_NULL;
2481 }
2482 return (busy_scbid);
2483}
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495static unsigned char
2496aic7xxx_find_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2497{
2498 unsigned char saved_scbptr;
2499 unsigned char curindex;
2500
2501 saved_scbptr = aic_inb(p, SCBPTR);
2502 curindex = 0;
2503 for (curindex = 0; curindex < p->scb_data->maxhscbs; curindex++)
2504 {
2505 aic_outb(p, curindex, SCBPTR);
2506 if (aic_inb(p, SCB_TAG) == scb->hscb->tag)
2507 {
2508 break;
2509 }
2510 }
2511 aic_outb(p, saved_scbptr, SCBPTR);
2512 if (curindex >= p->scb_data->maxhscbs)
2513 {
2514 curindex = SCB_LIST_NULL;
2515 }
2516
2517 return (curindex);
2518}
2519
2520
2521
2522
2523
2524
2525
2526
2527static int
2528aic7xxx_allocate_scb(struct aic7xxx_host *p)
2529{
2530 struct aic7xxx_scb *scbp = NULL;
2531 int scb_size = (sizeof (struct hw_scatterlist) * AIC7XXX_MAX_SG) + 12 + 6;
2532 int i;
2533 int step = PAGE_SIZE / 1024;
2534 unsigned long scb_count = 0;
2535 struct hw_scatterlist *hsgp;
2536 struct aic7xxx_scb *scb_ap;
2537 struct aic7xxx_scb_dma *scb_dma;
2538 unsigned char *bufs;
2539
2540 if (p->scb_data->numscbs < p->scb_data->maxscbs)
2541 {
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558 for ( i=step;; i *= 2 )
2559 {
2560 if ( (scb_size * (i-1)) >= ( (PAGE_SIZE * (i/step)) - 64 ) )
2561 {
2562 i /= 2;
2563 break;
2564 }
2565 }
2566 scb_count = min( (i-1), p->scb_data->maxscbs - p->scb_data->numscbs);
2567 scb_ap = kmalloc(sizeof (struct aic7xxx_scb) * scb_count
2568 + sizeof(struct aic7xxx_scb_dma), GFP_ATOMIC);
2569 if (scb_ap == NULL)
2570 return(0);
2571 scb_dma = (struct aic7xxx_scb_dma *)&scb_ap[scb_count];
2572 hsgp = (struct hw_scatterlist *)
2573 pci_alloc_consistent(p->pdev, scb_size * scb_count,
2574 &scb_dma->dma_address);
2575 if (hsgp == NULL)
2576 {
2577 kfree(scb_ap);
2578 return(0);
2579 }
2580 bufs = (unsigned char *)&hsgp[scb_count * AIC7XXX_MAX_SG];
2581#ifdef AIC7XXX_VERBOSE_DEBUGGING
2582 if (aic7xxx_verbose > 0xffff)
2583 {
2584 if (p->scb_data->numscbs == 0)
2585 printk(INFO_LEAD "Allocating initial %ld SCB structures.\n",
2586 p->host_no, -1, -1, -1, scb_count);
2587 else
2588 printk(INFO_LEAD "Allocating %ld additional SCB structures.\n",
2589 p->host_no, -1, -1, -1, scb_count);
2590 }
2591#endif
2592 memset(scb_ap, 0, sizeof (struct aic7xxx_scb) * scb_count);
2593 scb_dma->dma_offset = (unsigned long)scb_dma->dma_address
2594 - (unsigned long)hsgp;
2595 scb_dma->dma_len = scb_size * scb_count;
2596 for (i=0; i < scb_count; i++)
2597 {
2598 scbp = &scb_ap[i];
2599 scbp->hscb = &p->scb_data->hscbs[p->scb_data->numscbs];
2600 scbp->sg_list = &hsgp[i * AIC7XXX_MAX_SG];
2601 scbp->sense_cmd = bufs;
2602 scbp->cmnd = bufs + 6;
2603 bufs += 12 + 6;
2604 scbp->scb_dma = scb_dma;
2605 memset(scbp->hscb, 0, sizeof(struct aic7xxx_hwscb));
2606 scbp->hscb->tag = p->scb_data->numscbs;
2607
2608
2609
2610 p->scb_data->scb_array[p->scb_data->numscbs++] = scbp;
2611 scbq_insert_tail(&p->scb_data->free_scbs, scbp);
2612 }
2613 scbp->kmalloc_ptr = scb_ap;
2614 }
2615 return(scb_count);
2616}
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627static void
2628aic7xxx_queue_cmd_complete(struct aic7xxx_host *p, struct scsi_cmnd *cmd)
2629{
2630 aic7xxx_position(cmd) = SCB_LIST_NULL;
2631 cmd->host_scribble = (char *)p->completeq.head;
2632 p->completeq.head = cmd;
2633}
2634
2635
2636
2637
2638
2639
2640
2641
2642static void aic7xxx_done_cmds_complete(struct aic7xxx_host *p)
2643{
2644 struct scsi_cmnd *cmd;
2645
2646 while (p->completeq.head != NULL) {
2647 cmd = p->completeq.head;
2648 p->completeq.head = (struct scsi_cmnd *) cmd->host_scribble;
2649 cmd->host_scribble = NULL;
2650 cmd->scsi_done(cmd);
2651 }
2652}
2653
2654
2655
2656
2657
2658
2659
2660
2661static void
2662aic7xxx_free_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2663{
2664
2665 scb->flags = SCB_FREE;
2666 scb->cmd = NULL;
2667 scb->sg_count = 0;
2668 scb->sg_length = 0;
2669 scb->tag_action = 0;
2670 scb->hscb->control = 0;
2671 scb->hscb->target_status = 0;
2672 scb->hscb->target_channel_lun = SCB_LIST_NULL;
2673
2674 scbq_insert_head(&p->scb_data->free_scbs, scb);
2675}
2676
2677
2678
2679
2680
2681
2682
2683
2684static void
2685aic7xxx_done(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2686{
2687 struct scsi_cmnd *cmd = scb->cmd;
2688 struct aic_dev_data *aic_dev = cmd->device->hostdata;
2689 int tindex = TARGET_INDEX(cmd);
2690 struct aic7xxx_scb *scbp;
2691 unsigned char queue_depth;
2692
2693 scsi_dma_unmap(cmd);
2694
2695 if (scb->flags & SCB_SENSE)
2696 {
2697 pci_unmap_single(p->pdev,
2698 le32_to_cpu(scb->sg_list[0].address),
2699 SCSI_SENSE_BUFFERSIZE,
2700 PCI_DMA_FROMDEVICE);
2701 }
2702 if (scb->flags & SCB_RECOVERY_SCB)
2703 {
2704 p->flags &= ~AHC_ABORT_PENDING;
2705 }
2706 if (scb->flags & (SCB_RESET|SCB_ABORT))
2707 {
2708 cmd->result |= (DID_RESET << 16);
2709 }
2710
2711 if ((scb->flags & SCB_MSGOUT_BITS) != 0)
2712 {
2713 unsigned short mask;
2714 int message_error = FALSE;
2715
2716 mask = 0x01 << tindex;
2717
2718
2719
2720
2721
2722 if ((scb->flags & SCB_SENSE) &&
2723 ((scb->cmd->sense_buffer[12] == 0x43) ||
2724 (scb->cmd->sense_buffer[12] == 0x49)))
2725 {
2726 message_error = TRUE;
2727 }
2728
2729 if (scb->flags & SCB_MSGOUT_WDTR)
2730 {
2731 if (message_error)
2732 {
2733 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2734 (aic_dev->flags & DEVICE_PRINT_DTR) )
2735 {
2736 printk(INFO_LEAD "Device failed to complete Wide Negotiation "
2737 "processing and\n", p->host_no, CTL_OF_SCB(scb));
2738 printk(INFO_LEAD "returned a sense error code for invalid message, "
2739 "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2740 printk(INFO_LEAD "Wide negotiation to this device.\n", p->host_no,
2741 CTL_OF_SCB(scb));
2742 }
2743 aic_dev->needwdtr = aic_dev->needwdtr_copy = 0;
2744 }
2745 }
2746 if (scb->flags & SCB_MSGOUT_SDTR)
2747 {
2748 if (message_error)
2749 {
2750 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2751 (aic_dev->flags & DEVICE_PRINT_DTR) )
2752 {
2753 printk(INFO_LEAD "Device failed to complete Sync Negotiation "
2754 "processing and\n", p->host_no, CTL_OF_SCB(scb));
2755 printk(INFO_LEAD "returned a sense error code for invalid message, "
2756 "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2757 printk(INFO_LEAD "Sync negotiation to this device.\n", p->host_no,
2758 CTL_OF_SCB(scb));
2759 aic_dev->flags &= ~DEVICE_PRINT_DTR;
2760 }
2761 aic_dev->needsdtr = aic_dev->needsdtr_copy = 0;
2762 }
2763 }
2764 if (scb->flags & SCB_MSGOUT_PPR)
2765 {
2766 if(message_error)
2767 {
2768 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2769 (aic_dev->flags & DEVICE_PRINT_DTR) )
2770 {
2771 printk(INFO_LEAD "Device failed to complete Parallel Protocol "
2772 "Request processing and\n", p->host_no, CTL_OF_SCB(scb));
2773 printk(INFO_LEAD "returned a sense error code for invalid message, "
2774 "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2775 printk(INFO_LEAD "Parallel Protocol Request negotiation to this "
2776 "device.\n", p->host_no, CTL_OF_SCB(scb));
2777 }
2778
2779
2780
2781 aic_dev->needppr = aic_dev->needppr_copy = 0;
2782 aic_dev->needsdtr = aic_dev->needsdtr_copy = 1;
2783 aic_dev->needwdtr = aic_dev->needwdtr_copy = 1;
2784 }
2785 }
2786 }
2787
2788 queue_depth = aic_dev->temp_q_depth;
2789 if (queue_depth >= aic_dev->active_cmds)
2790 {
2791 scbp = scbq_remove_head(&aic_dev->delayed_scbs);
2792 if (scbp)
2793 {
2794 if (queue_depth == 1)
2795 {
2796
2797
2798
2799
2800
2801
2802 scbq_insert_head(&p->waiting_scbs, scbp);
2803 }
2804 else
2805 {
2806 scbq_insert_tail(&p->waiting_scbs, scbp);
2807 }
2808#ifdef AIC7XXX_VERBOSE_DEBUGGING
2809 if (aic7xxx_verbose > 0xffff)
2810 printk(INFO_LEAD "Moving SCB from delayed to waiting queue.\n",
2811 p->host_no, CTL_OF_SCB(scbp));
2812#endif
2813 if (queue_depth > aic_dev->active_cmds)
2814 {
2815 scbp = scbq_remove_head(&aic_dev->delayed_scbs);
2816 if (scbp)
2817 scbq_insert_tail(&p->waiting_scbs, scbp);
2818 }
2819 }
2820 }
2821 if (!(scb->tag_action))
2822 {
2823 aic7xxx_index_busy_target(p, scb->hscb->target_channel_lun,
2824 TRUE);
2825 if (cmd->device->simple_tags)
2826 {
2827 aic_dev->temp_q_depth = aic_dev->max_q_depth;
2828 }
2829 }
2830 if(scb->flags & SCB_DTR_SCB)
2831 {
2832 aic_dev->dtr_pending = 0;
2833 }
2834 aic_dev->active_cmds--;
2835 p->activescbs--;
2836
2837 if ((scb->sg_length >= 512) && (((cmd->result >> 16) & 0xf) == DID_OK))
2838 {
2839 long *ptr;
2840 int x, i;
2841
2842
2843 if (rq_data_dir(cmd->request) == WRITE)
2844 {
2845 aic_dev->w_total++;
2846 ptr = aic_dev->w_bins;
2847 }
2848 else
2849 {
2850 aic_dev->r_total++;
2851 ptr = aic_dev->r_bins;
2852 }
2853 x = scb->sg_length;
2854 x >>= 10;
2855 for(i=0; i<6; i++)
2856 {
2857 x >>= 2;
2858 if(!x) {
2859 ptr[i]++;
2860 break;
2861 }
2862 }
2863 if(i == 6 && x)
2864 ptr[5]++;
2865 }
2866 aic7xxx_free_scb(p, scb);
2867 aic7xxx_queue_cmd_complete(p, cmd);
2868
2869}
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880static void
2881aic7xxx_run_done_queue(struct aic7xxx_host *p, int complete)
2882{
2883 struct aic7xxx_scb *scb;
2884 int i, found = 0;
2885
2886 for (i = 0; i < p->scb_data->numscbs; i++)
2887 {
2888 scb = p->scb_data->scb_array[i];
2889 if (scb->flags & SCB_QUEUED_FOR_DONE)
2890 {
2891 if (scb->flags & SCB_QUEUE_FULL)
2892 {
2893 scb->cmd->result = QUEUE_FULL << 1;
2894 }
2895 else
2896 {
2897 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
2898 printk(INFO_LEAD "Aborting scb %d\n",
2899 p->host_no, CTL_OF_SCB(scb), scb->hscb->tag);
2900
2901
2902
2903
2904 scb->hscb->residual_SG_segment_count = 0;
2905 scb->hscb->residual_data_count[0] = 0;
2906 scb->hscb->residual_data_count[1] = 0;
2907 scb->hscb->residual_data_count[2] = 0;
2908 }
2909 found++;
2910 aic7xxx_done(p, scb);
2911 }
2912 }
2913 if (aic7xxx_verbose & (VERBOSE_ABORT_RETURN | VERBOSE_RESET_RETURN))
2914 {
2915 printk(INFO_LEAD "%d commands found and queued for "
2916 "completion.\n", p->host_no, -1, -1, -1, found);
2917 }
2918 if (complete)
2919 {
2920 aic7xxx_done_cmds_complete(p);
2921 }
2922}
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932static unsigned char
2933aic7xxx_abort_waiting_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
2934 unsigned char scbpos, unsigned char prev)
2935{
2936 unsigned char curscb, next;
2937
2938
2939
2940
2941 curscb = aic_inb(p, SCBPTR);
2942 aic_outb(p, scbpos, SCBPTR);
2943 next = aic_inb(p, SCB_NEXT);
2944
2945 aic7xxx_add_curscb_to_free_list(p);
2946
2947
2948
2949
2950 if (prev == SCB_LIST_NULL)
2951 {
2952
2953
2954
2955 aic_outb(p, next, WAITING_SCBH);
2956 }
2957 else
2958 {
2959
2960
2961
2962 aic_outb(p, prev, SCBPTR);
2963 aic_outb(p, next, SCB_NEXT);
2964 }
2965
2966
2967
2968
2969 aic_outb(p, curscb, SCBPTR);
2970 return (next);
2971}
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981static int
2982aic7xxx_search_qinfifo(struct aic7xxx_host *p, int target, int channel,
2983 int lun, unsigned char tag, int flags, int requeue,
2984 volatile scb_queue_type *queue)
2985{
2986 int found;
2987 unsigned char qinpos, qintail;
2988 struct aic7xxx_scb *scbp;
2989
2990 found = 0;
2991 qinpos = aic_inb(p, QINPOS);
2992 qintail = p->qinfifonext;
2993
2994 p->qinfifonext = qinpos;
2995
2996 while (qinpos != qintail)
2997 {
2998 scbp = p->scb_data->scb_array[p->qinfifo[qinpos++]];
2999 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3000 {
3001
3002
3003
3004 if (requeue && (queue != NULL))
3005 {
3006 if (scbp->flags & SCB_WAITINGQ)
3007 {
3008 scbq_remove(queue, scbp);
3009 scbq_remove(&p->waiting_scbs, scbp);
3010 scbq_remove(&AIC_DEV(scbp->cmd)->delayed_scbs, scbp);
3011 AIC_DEV(scbp->cmd)->active_cmds++;
3012 p->activescbs++;
3013 }
3014 scbq_insert_tail(queue, scbp);
3015 AIC_DEV(scbp->cmd)->active_cmds--;
3016 p->activescbs--;
3017 scbp->flags |= SCB_WAITINGQ;
3018 if ( !(scbp->tag_action & TAG_ENB) )
3019 {
3020 aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3021 TRUE);
3022 }
3023 }
3024 else if (requeue)
3025 {
3026 p->qinfifo[p->qinfifonext++] = scbp->hscb->tag;
3027 }
3028 else
3029 {
3030
3031
3032
3033
3034
3035 scbp->flags = flags | (scbp->flags & SCB_RECOVERY_SCB);
3036 if (aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3037 FALSE) == scbp->hscb->tag)
3038 {
3039 aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3040 TRUE);
3041 }
3042 }
3043 found++;
3044 }
3045 else
3046 {
3047 p->qinfifo[p->qinfifonext++] = scbp->hscb->tag;
3048 }
3049 }
3050
3051
3052
3053
3054
3055
3056
3057 qinpos = p->qinfifonext;
3058 while(qinpos != qintail)
3059 {
3060 p->qinfifo[qinpos++] = SCB_LIST_NULL;
3061 }
3062 if (p->features & AHC_QUEUE_REGS)
3063 aic_outb(p, p->qinfifonext, HNSCB_QOFF);
3064 else
3065 aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
3066
3067 return (found);
3068}
3069
3070
3071
3072
3073
3074
3075
3076
3077static int
3078aic7xxx_scb_on_qoutfifo(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
3079{
3080 int i=0;
3081
3082 while(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] != SCB_LIST_NULL)
3083 {
3084 if(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] == scb->hscb->tag)
3085 return TRUE;
3086 else
3087 i++;
3088 }
3089 return FALSE;
3090}
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108static void
3109aic7xxx_reset_device(struct aic7xxx_host *p, int target, int channel,
3110 int lun, unsigned char tag)
3111{
3112 struct aic7xxx_scb *scbp, *prev_scbp;
3113 struct scsi_device *sd;
3114 unsigned char active_scb, tcl, scb_tag;
3115 int i = 0, init_lists = FALSE;
3116 struct aic_dev_data *aic_dev;
3117
3118
3119
3120
3121 active_scb = aic_inb(p, SCBPTR);
3122 scb_tag = aic_inb(p, SCB_TAG);
3123
3124 if (aic7xxx_verbose & (VERBOSE_RESET_PROCESS | VERBOSE_ABORT_PROCESS))
3125 {
3126 printk(INFO_LEAD "Reset device, hardware_scb %d,\n",
3127 p->host_no, channel, target, lun, active_scb);
3128 printk(INFO_LEAD "Current scb %d, SEQADDR 0x%x, LASTPHASE "
3129 "0x%x\n",
3130 p->host_no, channel, target, lun, scb_tag,
3131 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
3132 aic_inb(p, LASTPHASE));
3133 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n",
3134 p->host_no, channel, target, lun,
3135 (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0,
3136 aic_inb(p, SG_COUNT), aic_inb(p, SCSISIGI));
3137 printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n",
3138 p->host_no, channel, target, lun, aic_inb(p, SSTAT0),
3139 aic_inb(p, SSTAT1), aic_inb(p, SSTAT2));
3140 }
3141
3142
3143
3144
3145 list_for_each_entry(aic_dev, &p->aic_devs, list)
3146 {
3147 if (aic7xxx_verbose & (VERBOSE_RESET_PROCESS | VERBOSE_ABORT_PROCESS))
3148 printk(INFO_LEAD "processing aic_dev %p\n", p->host_no, channel, target,
3149 lun, aic_dev);
3150 sd = aic_dev->SDptr;
3151
3152 if((target != ALL_TARGETS && target != sd->id) ||
3153 (channel != ALL_CHANNELS && channel != sd->channel))
3154 continue;
3155 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3156 printk(INFO_LEAD "Cleaning up status information "
3157 "and delayed_scbs.\n", p->host_no, sd->channel, sd->id, sd->lun);
3158 aic_dev->flags &= ~BUS_DEVICE_RESET_PENDING;
3159 if ( tag == SCB_LIST_NULL )
3160 {
3161 aic_dev->dtr_pending = 0;
3162 aic_dev->needppr = aic_dev->needppr_copy;
3163 aic_dev->needsdtr = aic_dev->needsdtr_copy;
3164 aic_dev->needwdtr = aic_dev->needwdtr_copy;
3165 aic_dev->flags = DEVICE_PRINT_DTR;
3166 aic_dev->temp_q_depth = aic_dev->max_q_depth;
3167 }
3168 tcl = (sd->id << 4) | (sd->channel << 3) | sd->lun;
3169 if ( (aic7xxx_index_busy_target(p, tcl, FALSE) == tag) ||
3170 (tag == SCB_LIST_NULL) )
3171 aic7xxx_index_busy_target(p, tcl, TRUE);
3172 prev_scbp = NULL;
3173 scbp = aic_dev->delayed_scbs.head;
3174 while (scbp != NULL)
3175 {
3176 prev_scbp = scbp;
3177 scbp = scbp->q_next;
3178 if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag))
3179 {
3180 scbq_remove(&aic_dev->delayed_scbs, prev_scbp);
3181 if (prev_scbp->flags & SCB_WAITINGQ)
3182 {
3183 aic_dev->active_cmds++;
3184 p->activescbs++;
3185 }
3186 prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3187 prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3188 }
3189 }
3190 }
3191
3192 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3193 printk(INFO_LEAD "Cleaning QINFIFO.\n", p->host_no, channel, target, lun );
3194 aic7xxx_search_qinfifo(p, target, channel, lun, tag,
3195 SCB_RESET | SCB_QUEUED_FOR_DONE, FALSE, NULL);
3196
3197
3198
3199
3200
3201 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3202 printk(INFO_LEAD "Cleaning waiting_scbs.\n", p->host_no, channel,
3203 target, lun );
3204 {
3205 struct aic7xxx_scb *scbp, *prev_scbp;
3206
3207 prev_scbp = NULL;
3208 scbp = p->waiting_scbs.head;
3209 while (scbp != NULL)
3210 {
3211 prev_scbp = scbp;
3212 scbp = scbp->q_next;
3213 if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag))
3214 {
3215 scbq_remove(&p->waiting_scbs, prev_scbp);
3216 if (prev_scbp->flags & SCB_WAITINGQ)
3217 {
3218 AIC_DEV(prev_scbp->cmd)->active_cmds++;
3219 p->activescbs++;
3220 }
3221 prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3222 prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3223 }
3224 }
3225 }
3226
3227
3228
3229
3230
3231 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3232 printk(INFO_LEAD "Cleaning waiting for selection "
3233 "list.\n", p->host_no, channel, target, lun);
3234 {
3235 unsigned char next, prev, scb_index;
3236
3237 next = aic_inb(p, WAITING_SCBH);
3238 prev = SCB_LIST_NULL;
3239 while (next != SCB_LIST_NULL)
3240 {
3241 aic_outb(p, next, SCBPTR);
3242 scb_index = aic_inb(p, SCB_TAG);
3243 if (scb_index >= p->scb_data->numscbs)
3244 {
3245
3246
3247
3248
3249 printk(WARN_LEAD "Waiting List inconsistency; SCB index=%d, "
3250 "numscbs=%d\n", p->host_no, channel, target, lun, scb_index,
3251 p->scb_data->numscbs);
3252 next = aic_inb(p, SCB_NEXT);
3253 aic7xxx_add_curscb_to_free_list(p);
3254 }
3255 else
3256 {
3257 scbp = p->scb_data->scb_array[scb_index];
3258 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3259 {
3260 next = aic7xxx_abort_waiting_scb(p, scbp, next, prev);
3261 if (scbp->flags & SCB_WAITINGQ)
3262 {
3263 AIC_DEV(scbp->cmd)->active_cmds++;
3264 p->activescbs++;
3265 }
3266 scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3267 scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3268 if (prev == SCB_LIST_NULL)
3269 {
3270
3271
3272
3273
3274
3275
3276 aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
3277 aic_outb(p, CLRSELTIMEO, CLRSINT1);
3278 }
3279 }
3280 else
3281 {
3282 prev = next;
3283 next = aic_inb(p, SCB_NEXT);
3284 }
3285 }
3286 }
3287 }
3288
3289
3290
3291
3292
3293 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3294 printk(INFO_LEAD "Cleaning disconnected scbs "
3295 "list.\n", p->host_no, channel, target, lun);
3296 if (p->flags & AHC_PAGESCBS)
3297 {
3298 unsigned char next, prev, scb_index;
3299
3300 next = aic_inb(p, DISCONNECTED_SCBH);
3301 prev = SCB_LIST_NULL;
3302 while (next != SCB_LIST_NULL)
3303 {
3304 aic_outb(p, next, SCBPTR);
3305 scb_index = aic_inb(p, SCB_TAG);
3306 if (scb_index > p->scb_data->numscbs)
3307 {
3308 printk(WARN_LEAD "Disconnected List inconsistency; SCB index=%d, "
3309 "numscbs=%d\n", p->host_no, channel, target, lun, scb_index,
3310 p->scb_data->numscbs);
3311 next = aic7xxx_rem_scb_from_disc_list(p, next, prev);
3312 }
3313 else
3314 {
3315 scbp = p->scb_data->scb_array[scb_index];
3316 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3317 {
3318 next = aic7xxx_rem_scb_from_disc_list(p, next, prev);
3319 if (scbp->flags & SCB_WAITINGQ)
3320 {
3321 AIC_DEV(scbp->cmd)->active_cmds++;
3322 p->activescbs++;
3323 }
3324 scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3325 scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3326 scbp->hscb->control = 0;
3327 }
3328 else
3329 {
3330 prev = next;
3331 next = aic_inb(p, SCB_NEXT);
3332 }
3333 }
3334 }
3335 }
3336
3337
3338
3339
3340
3341 if (p->flags & AHC_PAGESCBS)
3342 {
3343 unsigned char next;
3344
3345 next = aic_inb(p, FREE_SCBH);
3346 while (next != SCB_LIST_NULL)
3347 {
3348 aic_outb(p, next, SCBPTR);
3349 if (aic_inb(p, SCB_TAG) < p->scb_data->numscbs)
3350 {
3351 printk(WARN_LEAD "Free list inconsistency!.\n", p->host_no, channel,
3352 target, lun);
3353 init_lists = TRUE;
3354 next = SCB_LIST_NULL;
3355 }
3356 else
3357 {
3358 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3359 aic_outb(p, 0, SCB_CONTROL);
3360 next = aic_inb(p, SCB_NEXT);
3361 }
3362 }
3363 }
3364
3365
3366
3367
3368
3369 if (init_lists)
3370 {
3371 aic_outb(p, SCB_LIST_NULL, FREE_SCBH);
3372 aic_outb(p, SCB_LIST_NULL, WAITING_SCBH);
3373 aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH);
3374 }
3375 for (i = p->scb_data->maxhscbs - 1; i >= 0; i--)
3376 {
3377 unsigned char scbid;
3378
3379 aic_outb(p, i, SCBPTR);
3380 if (init_lists)
3381 {
3382 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3383 aic_outb(p, SCB_LIST_NULL, SCB_NEXT);
3384 aic_outb(p, 0, SCB_CONTROL);
3385 aic7xxx_add_curscb_to_free_list(p);
3386 }
3387 else
3388 {
3389 scbid = aic_inb(p, SCB_TAG);
3390 if (scbid < p->scb_data->numscbs)
3391 {
3392 scbp = p->scb_data->scb_array[scbid];
3393 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3394 {
3395 aic_outb(p, 0, SCB_CONTROL);
3396 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3397 aic7xxx_add_curscb_to_free_list(p);
3398 }
3399 }
3400 }
3401 }
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413 for (i = 0; i < p->scb_data->numscbs; i++)
3414 {
3415 scbp = p->scb_data->scb_array[i];
3416 if ((scbp->flags & SCB_ACTIVE) &&
3417 aic7xxx_match_scb(p, scbp, target, channel, lun, tag) &&
3418 !aic7xxx_scb_on_qoutfifo(p, scbp))
3419 {
3420 if (scbp->flags & SCB_WAITINGQ)
3421 {
3422 scbq_remove(&p->waiting_scbs, scbp);
3423 scbq_remove(&AIC_DEV(scbp->cmd)->delayed_scbs, scbp);
3424 AIC_DEV(scbp->cmd)->active_cmds++;
3425 p->activescbs++;
3426 }
3427 scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3428 scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3429 }
3430 }
3431
3432 aic_outb(p, active_scb, SCBPTR);
3433}
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443static void
3444aic7xxx_clear_intstat(struct aic7xxx_host *p)
3445{
3446
3447 aic_outb(p, CLRSELDO | CLRSELDI | CLRSELINGO, CLRSINT0);
3448 aic_outb(p, CLRSELTIMEO | CLRATNO | CLRSCSIRSTI | CLRBUSFREE | CLRSCSIPERR |
3449 CLRPHASECHG | CLRREQINIT, CLRSINT1);
3450 aic_outb(p, CLRSCSIINT | CLRSEQINT | CLRBRKADRINT | CLRPARERR, CLRINT);
3451}
3452
3453
3454
3455
3456
3457
3458
3459
3460static void
3461aic7xxx_reset_current_bus(struct aic7xxx_host *p)
3462{
3463
3464
3465 aic_outb(p, aic_inb(p, SIMODE1) & ~ENSCSIRST, SIMODE1);
3466
3467
3468
3469
3470
3471
3472
3473
3474 aic_outb(p, aic_inb(p, SCSISEQ) | SCSIRSTO, SCSISEQ);
3475 while ( (aic_inb(p, SCSISEQ) & SCSIRSTO) == 0)
3476 mdelay(5);
3477
3478
3479
3480
3481
3482
3483 if (p->features & AHC_ULTRA2)
3484 mdelay(250);
3485 else
3486 mdelay(50);
3487
3488
3489 aic_outb(p, 0, SCSISEQ);
3490 mdelay(10);
3491
3492 aic7xxx_clear_intstat(p);
3493
3494 aic_outb(p, aic_inb(p, SIMODE1) | ENSCSIRST, SIMODE1);
3495
3496}
3497
3498
3499
3500
3501
3502
3503
3504
3505static void
3506aic7xxx_reset_channel(struct aic7xxx_host *p, int channel, int initiate_reset)
3507{
3508 unsigned long offset_min, offset_max;
3509 unsigned char sblkctl;
3510 int cur_channel;
3511
3512 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3513 printk(INFO_LEAD "Reset channel called, %s initiate reset.\n",
3514 p->host_no, channel, -1, -1, (initiate_reset==TRUE) ? "will" : "won't" );
3515
3516
3517 if (channel == 1)
3518 {
3519 offset_min = 8;
3520 offset_max = 16;
3521 }
3522 else
3523 {
3524 if (p->features & AHC_TWIN)
3525 {
3526
3527 offset_min = 0;
3528 offset_max = 8;
3529 }
3530 else
3531 {
3532 offset_min = 0;
3533 if (p->features & AHC_WIDE)
3534 {
3535 offset_max = 16;
3536 }
3537 else
3538 {
3539 offset_max = 8;
3540 }
3541 }
3542 }
3543
3544 while (offset_min < offset_max)
3545 {
3546
3547
3548
3549 aic_outb(p, 0, TARG_SCSIRATE + offset_min);
3550 if (p->features & AHC_ULTRA2)
3551 {
3552 aic_outb(p, 0, TARG_OFFSET + offset_min);
3553 }
3554 offset_min++;
3555 }
3556
3557
3558
3559
3560 sblkctl = aic_inb(p, SBLKCTL);
3561 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
3562 cur_channel = (sblkctl & SELBUSB) >> 3;
3563 else
3564 cur_channel = 0;
3565 if ( (cur_channel != channel) && (p->features & AHC_TWIN) )
3566 {
3567
3568
3569
3570 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3571 printk(INFO_LEAD "Stealthily resetting idle channel.\n", p->host_no,
3572 channel, -1, -1);
3573
3574
3575
3576 aic_outb(p, sblkctl ^ SELBUSB, SBLKCTL);
3577 aic_outb(p, aic_inb(p, SIMODE1) & ~ENBUSFREE, SIMODE1);
3578 if (initiate_reset)
3579 {
3580 aic7xxx_reset_current_bus(p);
3581 }
3582 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ);
3583 aic7xxx_clear_intstat(p);
3584 aic_outb(p, sblkctl, SBLKCTL);
3585 }
3586 else
3587 {
3588
3589
3590
3591 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3592 printk(INFO_LEAD "Resetting currently active channel.\n", p->host_no,
3593 channel, -1, -1);
3594 aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT),
3595 SIMODE1);
3596 p->flags &= ~AHC_HANDLING_REQINITS;
3597 p->msg_type = MSG_TYPE_NONE;
3598 p->msg_len = 0;
3599 if (initiate_reset)
3600 {
3601 aic7xxx_reset_current_bus(p);
3602 }
3603 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ);
3604 aic7xxx_clear_intstat(p);
3605 }
3606 if (aic7xxx_verbose & VERBOSE_RESET_RETURN)
3607 printk(INFO_LEAD "Channel reset\n", p->host_no, channel, -1, -1);
3608
3609
3610
3611
3612 aic7xxx_reset_device(p, ALL_TARGETS, channel, ALL_LUNS, SCB_LIST_NULL);
3613
3614 if ( !(p->features & AHC_TWIN) )
3615 {
3616 restart_sequencer(p);
3617 }
3618
3619 return;
3620}
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630static void
3631aic7xxx_run_waiting_queues(struct aic7xxx_host *p)
3632{
3633 struct aic7xxx_scb *scb;
3634 struct aic_dev_data *aic_dev;
3635 int sent;
3636
3637
3638 if (p->waiting_scbs.head == NULL)
3639 return;
3640
3641 sent = 0;
3642
3643
3644
3645
3646 while ((scb = scbq_remove_head(&p->waiting_scbs)) != NULL)
3647 {
3648 aic_dev = scb->cmd->device->hostdata;
3649 if ( !scb->tag_action )
3650 {
3651 aic_dev->temp_q_depth = 1;
3652 }
3653 if ( aic_dev->active_cmds >= aic_dev->temp_q_depth)
3654 {
3655 scbq_insert_tail(&aic_dev->delayed_scbs, scb);
3656 }
3657 else
3658 {
3659 scb->flags &= ~SCB_WAITINGQ;
3660 aic_dev->active_cmds++;
3661 p->activescbs++;
3662 if ( !(scb->tag_action) )
3663 {
3664 aic7xxx_busy_target(p, scb);
3665 }
3666 p->qinfifo[p->qinfifonext++] = scb->hscb->tag;
3667 sent++;
3668 }
3669 }
3670 if (sent)
3671 {
3672 if (p->features & AHC_QUEUE_REGS)
3673 aic_outb(p, p->qinfifonext, HNSCB_QOFF);
3674 else
3675 {
3676 pause_sequencer(p);
3677 aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
3678 unpause_sequencer(p, FALSE);
3679 }
3680 if (p->activescbs > p->max_activescbs)
3681 p->max_activescbs = p->activescbs;
3682 }
3683}
3684
3685#ifdef CONFIG_PCI
3686
3687#define DPE 0x80
3688#define SSE 0x40
3689#define RMA 0x20
3690#define RTA 0x10
3691#define STA 0x08
3692#define DPR 0x01
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705static void
3706aic7xxx_pci_intr(struct aic7xxx_host *p)
3707{
3708 unsigned char status1;
3709
3710 pci_read_config_byte(p->pdev, PCI_STATUS + 1, &status1);
3711
3712 if ( (status1 & DPE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3713 printk(WARN_LEAD "Data Parity Error during PCI address or PCI write"
3714 "phase.\n", p->host_no, -1, -1, -1);
3715 if ( (status1 & SSE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3716 printk(WARN_LEAD "Signal System Error Detected\n", p->host_no,
3717 -1, -1, -1);
3718 if ( (status1 & RMA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3719 printk(WARN_LEAD "Received a PCI Master Abort\n", p->host_no,
3720 -1, -1, -1);
3721 if ( (status1 & RTA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3722 printk(WARN_LEAD "Received a PCI Target Abort\n", p->host_no,
3723 -1, -1, -1);
3724 if ( (status1 & STA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3725 printk(WARN_LEAD "Signaled a PCI Target Abort\n", p->host_no,
3726 -1, -1, -1);
3727 if ( (status1 & DPR) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3728 printk(WARN_LEAD "Data Parity Error has been reported via PCI pin "
3729 "PERR#\n", p->host_no, -1, -1, -1);
3730
3731 pci_write_config_byte(p->pdev, PCI_STATUS + 1, status1);
3732 if (status1 & (DPR|RMA|RTA))
3733 aic_outb(p, CLRPARERR, CLRINT);
3734
3735 if ( (aic7xxx_panic_on_abort) && (p->spurious_int > 500) )
3736 aic7xxx_panic_abort(p, NULL);
3737
3738}
3739#endif
3740
3741
3742
3743
3744
3745
3746
3747
3748
3749static void
3750aic7xxx_construct_ppr(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
3751{
3752 p->msg_buf[p->msg_index++] = MSG_EXTENDED;
3753 p->msg_buf[p->msg_index++] = MSG_EXT_PPR_LEN;
3754 p->msg_buf[p->msg_index++] = MSG_EXT_PPR;
3755 p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.period;
3756 p->msg_buf[p->msg_index++] = 0;
3757 p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.offset;
3758 p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.width;
3759 p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.options;
3760 p->msg_len += 8;
3761}
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771static void
3772aic7xxx_construct_sdtr(struct aic7xxx_host *p, unsigned char period,
3773 unsigned char offset)
3774{
3775 p->msg_buf[p->msg_index++] = MSG_EXTENDED;
3776 p->msg_buf[p->msg_index++] = MSG_EXT_SDTR_LEN;
3777 p->msg_buf[p->msg_index++] = MSG_EXT_SDTR;
3778 p->msg_buf[p->msg_index++] = period;
3779 p->msg_buf[p->msg_index++] = offset;
3780 p->msg_len += 5;
3781}
3782
3783
3784
3785
3786
3787
3788
3789
3790
3791static void
3792aic7xxx_construct_wdtr(struct aic7xxx_host *p, unsigned char bus_width)
3793{
3794 p->msg_buf[p->msg_index++] = MSG_EXTENDED;
3795 p->msg_buf[p->msg_index++] = MSG_EXT_WDTR_LEN;
3796 p->msg_buf[p->msg_index++] = MSG_EXT_WDTR;
3797 p->msg_buf[p->msg_index++] = bus_width;
3798 p->msg_len += 4;
3799}
3800
3801
3802
3803
3804
3805
3806
3807
3808static void
3809aic7xxx_calculate_residual (struct aic7xxx_host *p, struct aic7xxx_scb *scb)
3810{
3811 struct aic7xxx_hwscb *hscb;
3812 struct scsi_cmnd *cmd;
3813 int actual, i;
3814
3815 cmd = scb->cmd;
3816 hscb = scb->hscb;
3817
3818
3819
3820
3821
3822 if (((scb->hscb->control & DISCONNECTED) == 0) &&
3823 (scb->flags & SCB_SENSE) == 0)
3824 {
3825
3826
3827
3828
3829
3830
3831 actual = scb->sg_length;
3832 for (i=1; i < hscb->residual_SG_segment_count; i++)
3833 {
3834 actual -= scb->sg_list[scb->sg_count - i].length;
3835 }
3836 actual -= (hscb->residual_data_count[2] << 16) |
3837 (hscb->residual_data_count[1] << 8) |
3838 hscb->residual_data_count[0];
3839
3840 if (actual < cmd->underflow)
3841 {
3842 if (aic7xxx_verbose & VERBOSE_MINOR_ERROR)
3843 {
3844 printk(INFO_LEAD "Underflow - Wanted %u, %s %u, residual SG "
3845 "count %d.\n", p->host_no, CTL_OF_SCB(scb), cmd->underflow,
3846 (rq_data_dir(cmd->request) == WRITE) ? "wrote" : "read", actual,
3847 hscb->residual_SG_segment_count);
3848 printk(INFO_LEAD "status 0x%x.\n", p->host_no, CTL_OF_SCB(scb),
3849 hscb->target_status);
3850 }
3851
3852
3853
3854
3855
3856
3857 scsi_set_resid(cmd, scb->sg_length - actual);
3858 aic7xxx_status(cmd) = hscb->target_status;
3859 }
3860 }
3861
3862
3863
3864
3865
3866 hscb->residual_data_count[2] = 0;
3867 hscb->residual_data_count[1] = 0;
3868 hscb->residual_data_count[0] = 0;
3869 hscb->residual_SG_segment_count = 0;
3870}
3871
3872
3873
3874
3875
3876
3877
3878
3879static void
3880aic7xxx_handle_device_reset(struct aic7xxx_host *p, int target, int channel)
3881{
3882 unsigned char tindex = target;
3883
3884 tindex |= ((channel & 0x01) << 3);
3885
3886
3887
3888
3889 aic_outb(p, 0, TARG_SCSIRATE + tindex);
3890 if (p->features & AHC_ULTRA2)
3891 aic_outb(p, 0, TARG_OFFSET + tindex);
3892 aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL);
3893 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3894 printk(INFO_LEAD "Bus Device Reset delivered.\n", p->host_no, channel,
3895 target, -1);
3896 aic7xxx_run_done_queue(p, TRUE);
3897}
3898
3899
3900
3901
3902
3903
3904
3905
3906static void
3907aic7xxx_handle_seqint(struct aic7xxx_host *p, unsigned char intstat)
3908{
3909 struct aic7xxx_scb *scb;
3910 struct aic_dev_data *aic_dev;
3911 unsigned short target_mask;
3912 unsigned char target, lun, tindex;
3913 unsigned char queue_flag = FALSE;
3914 char channel;
3915 int result;
3916
3917 target = ((aic_inb(p, SAVED_TCL) >> 4) & 0x0f);
3918 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
3919 channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3;
3920 else
3921 channel = 0;
3922 tindex = target + (channel << 3);
3923 lun = aic_inb(p, SAVED_TCL) & 0x07;
3924 target_mask = (0x01 << tindex);
3925
3926
3927
3928
3929
3930 aic_outb(p, CLRSEQINT, CLRINT);
3931 switch (intstat & SEQINT_MASK)
3932 {
3933 case NO_MATCH:
3934 {
3935 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP),
3936 SCSISEQ);
3937 printk(WARN_LEAD "No active SCB for reconnecting target - Issuing "
3938 "BUS DEVICE RESET.\n", p->host_no, channel, target, lun);
3939 printk(WARN_LEAD " SAVED_TCL=0x%x, ARG_1=0x%x, SEQADDR=0x%x\n",
3940 p->host_no, channel, target, lun,
3941 aic_inb(p, SAVED_TCL), aic_inb(p, ARG_1),
3942 (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0));
3943 if (aic7xxx_panic_on_abort)
3944 aic7xxx_panic_abort(p, NULL);
3945 }
3946 break;
3947
3948 case SEND_REJECT:
3949 {
3950 if (aic7xxx_verbose & VERBOSE_MINOR_ERROR)
3951 printk(INFO_LEAD "Rejecting unknown message (0x%x) received from "
3952 "target, SEQ_FLAGS=0x%x\n", p->host_no, channel, target, lun,
3953 aic_inb(p, ACCUM), aic_inb(p, SEQ_FLAGS));
3954 }
3955 break;
3956
3957 case NO_IDENT:
3958 {
3959
3960
3961
3962
3963
3964
3965
3966 if (aic7xxx_verbose & (VERBOSE_SEQINT | VERBOSE_RESET_MID))
3967 printk(INFO_LEAD "Target did not send an IDENTIFY message; "
3968 "LASTPHASE 0x%x, SAVED_TCL 0x%x\n", p->host_no, channel, target,
3969 lun, aic_inb(p, LASTPHASE), aic_inb(p, SAVED_TCL));
3970
3971 aic7xxx_reset_channel(p, channel, TRUE);
3972 aic7xxx_run_done_queue(p, TRUE);
3973
3974 }
3975 break;
3976
3977 case BAD_PHASE:
3978 if (aic_inb(p, LASTPHASE) == P_BUSFREE)
3979 {
3980 if (aic7xxx_verbose & VERBOSE_SEQINT)
3981 printk(INFO_LEAD "Missed busfree.\n", p->host_no, channel,
3982 target, lun);
3983 restart_sequencer(p);
3984 }
3985 else
3986 {
3987 if (aic7xxx_verbose & VERBOSE_SEQINT)
3988 printk(INFO_LEAD "Unknown scsi bus phase, continuing\n", p->host_no,
3989 channel, target, lun);
3990 }
3991 break;
3992
3993 case EXTENDED_MSG:
3994 {
3995 p->msg_type = MSG_TYPE_INITIATOR_MSGIN;
3996 p->msg_len = 0;
3997 p->msg_index = 0;
3998
3999#ifdef AIC7XXX_VERBOSE_DEBUGGING
4000 if (aic7xxx_verbose > 0xffff)
4001 printk(INFO_LEAD "Enabling REQINITs for MSG_IN\n", p->host_no,
4002 channel, target, lun);
4003#endif
4004
4005
4006
4007
4008
4009
4010 p->flags |= AHC_HANDLING_REQINITS;
4011 aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1);
4012
4013
4014
4015
4016 return;
4017 }
4018
4019 case REJECT_MSG:
4020 {
4021
4022
4023
4024
4025
4026 unsigned char scb_index;
4027 unsigned char last_msg;
4028
4029 scb_index = aic_inb(p, SCB_TAG);
4030 scb = p->scb_data->scb_array[scb_index];
4031 aic_dev = AIC_DEV(scb->cmd);
4032 last_msg = aic_inb(p, LAST_MSG);
4033
4034 if ( (last_msg == MSG_IDENTIFYFLAG) &&
4035 (scb->tag_action) &&
4036 !(scb->flags & SCB_MSGOUT_BITS) )
4037 {
4038 if (scb->tag_action == MSG_ORDERED_Q_TAG)
4039 {
4040
4041
4042
4043
4044
4045
4046 scsi_adjust_queue_depth(scb->cmd->device, MSG_SIMPLE_TAG,
4047 scb->cmd->device->queue_depth);
4048 scb->tag_action = MSG_SIMPLE_Q_TAG;
4049 scb->hscb->control &= ~SCB_TAG_TYPE;
4050 scb->hscb->control |= MSG_SIMPLE_Q_TAG;
4051 aic_outb(p, scb->hscb->control, SCB_CONTROL);
4052
4053
4054
4055
4056
4057 aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT);
4058 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4059 }
4060 else if (scb->tag_action == MSG_SIMPLE_Q_TAG)
4061 {
4062 unsigned char i;
4063 struct aic7xxx_scb *scbp;
4064 int old_verbose;
4065
4066
4067
4068 scsi_adjust_queue_depth(scb->cmd->device, 0 ,
4069 p->host->cmd_per_lun);
4070 aic_dev->max_q_depth = aic_dev->temp_q_depth = 1;
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082 scb->tag_action = 0;
4083 scb->hscb->control &= ~(TAG_ENB | SCB_TAG_TYPE);
4084 aic_outb(p, scb->hscb->control, SCB_CONTROL);
4085
4086 old_verbose = aic7xxx_verbose;
4087 aic7xxx_verbose &= ~(VERBOSE_RESET|VERBOSE_ABORT);
4088 for (i=0; i < p->scb_data->numscbs; i++)
4089 {
4090 scbp = p->scb_data->scb_array[i];
4091 if ((scbp->flags & SCB_ACTIVE) && (scbp != scb))
4092 {
4093 if (aic7xxx_match_scb(p, scbp, target, channel, lun, i))
4094 {
4095 aic7xxx_reset_device(p, target, channel, lun, i);
4096 }
4097 }
4098 }
4099 aic7xxx_run_done_queue(p, TRUE);
4100 aic7xxx_verbose = old_verbose;
4101
4102
4103
4104
4105
4106 aic7xxx_busy_target(p, scb);
4107 printk(INFO_LEAD "Device is refusing tagged commands, using "
4108 "untagged I/O.\n", p->host_no, channel, target, lun);
4109 aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT);
4110 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4111 }
4112 }
4113 else if (scb->flags & SCB_MSGOUT_PPR)
4114 {
4115
4116
4117
4118
4119
4120
4121
4122
4123 aic_dev->needppr = aic_dev->needppr_copy = 0;
4124 aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT,
4125 (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE), aic_dev);
4126 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4127 AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE,
4128 aic_dev);
4129 aic_dev->goal.options = aic_dev->dtr_pending = 0;
4130 scb->flags &= ~SCB_MSGOUT_BITS;
4131 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4132 {
4133 printk(INFO_LEAD "Device is rejecting PPR messages, falling "
4134 "back.\n", p->host_no, channel, target, lun);
4135 }
4136 if ( aic_dev->goal.width )
4137 {
4138 aic_dev->needwdtr = aic_dev->needwdtr_copy = 1;
4139 aic_dev->dtr_pending = 1;
4140 scb->flags |= SCB_MSGOUT_WDTR;
4141 }
4142 if ( aic_dev->goal.offset )
4143 {
4144 aic_dev->needsdtr = aic_dev->needsdtr_copy = 1;
4145 if( !aic_dev->dtr_pending )
4146 {
4147 aic_dev->dtr_pending = 1;
4148 scb->flags |= SCB_MSGOUT_SDTR;
4149 }
4150 }
4151 if ( aic_dev->dtr_pending )
4152 {
4153 aic_outb(p, HOST_MSG, MSG_OUT);
4154 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4155 }
4156 }
4157 else if (scb->flags & SCB_MSGOUT_WDTR)
4158 {
4159
4160
4161
4162 aic_dev->needwdtr = aic_dev->needwdtr_copy = 0;
4163 scb->flags &= ~SCB_MSGOUT_BITS;
4164 aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT,
4165 (AHC_TRANS_ACTIVE|AHC_TRANS_GOAL|AHC_TRANS_CUR), aic_dev);
4166 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4167 AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE,
4168 aic_dev);
4169 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4170 {
4171 printk(INFO_LEAD "Device is rejecting WDTR messages, using "
4172 "narrow transfers.\n", p->host_no, channel, target, lun);
4173 }
4174 aic_dev->needsdtr = aic_dev->needsdtr_copy;
4175 }
4176 else if (scb->flags & SCB_MSGOUT_SDTR)
4177 {
4178
4179
4180
4181 aic_dev->needsdtr = aic_dev->needsdtr_copy = 0;
4182 scb->flags &= ~SCB_MSGOUT_BITS;
4183 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4184 (AHC_TRANS_CUR|AHC_TRANS_ACTIVE|AHC_TRANS_GOAL), aic_dev);
4185 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4186 {
4187 printk(INFO_LEAD "Device is rejecting SDTR messages, using "
4188 "async transfers.\n", p->host_no, channel, target, lun);
4189 }
4190 }
4191 else if (aic7xxx_verbose & VERBOSE_SEQINT)
4192 {
4193
4194
4195
4196 printk(INFO_LEAD "Received MESSAGE_REJECT for unknown cause. "
4197 "Ignoring.\n", p->host_no, channel, target, lun);
4198 }
4199 }
4200 break;
4201
4202 case BAD_STATUS:
4203 {
4204 unsigned char scb_index;
4205 struct aic7xxx_hwscb *hscb;
4206 struct scsi_cmnd *cmd;
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216
4217
4218 aic_outb(p, 0, RETURN_1);
4219 scb_index = aic_inb(p, SCB_TAG);
4220 if (scb_index > p->scb_data->numscbs)
4221 {
4222 printk(WARN_LEAD "Invalid SCB during SEQINT 0x%02x, SCB_TAG %d.\n",
4223 p->host_no, channel, target, lun, intstat, scb_index);
4224 break;
4225 }
4226 scb = p->scb_data->scb_array[scb_index];
4227 hscb = scb->hscb;
4228
4229 if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
4230 {
4231 printk(WARN_LEAD "Invalid SCB during SEQINT 0x%x, scb %d, flags 0x%x,"
4232 " cmd 0x%lx.\n", p->host_no, channel, target, lun, intstat,
4233 scb_index, scb->flags, (unsigned long) scb->cmd);
4234 }
4235 else
4236 {
4237 cmd = scb->cmd;
4238 aic_dev = AIC_DEV(scb->cmd);
4239 hscb->target_status = aic_inb(p, SCB_TARGET_STATUS);
4240 aic7xxx_status(cmd) = hscb->target_status;
4241
4242 cmd->result = hscb->target_status;
4243
4244 switch (status_byte(hscb->target_status))
4245 {
4246 case GOOD:
4247 if (aic7xxx_verbose & VERBOSE_SEQINT)
4248 printk(INFO_LEAD "Interrupted for status of GOOD???\n",
4249 p->host_no, CTL_OF_SCB(scb));
4250 break;
4251
4252 case COMMAND_TERMINATED:
4253 case CHECK_CONDITION:
4254 if ( !(scb->flags & SCB_SENSE) )
4255 {
4256
4257
4258
4259
4260 memcpy(scb->sense_cmd, &generic_sense[0],
4261 sizeof(generic_sense));
4262
4263 scb->sense_cmd[1] = (cmd->device->lun << 5);
4264 scb->sense_cmd[4] = SCSI_SENSE_BUFFERSIZE;
4265
4266 scb->sg_list[0].length =
4267 cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
4268 scb->sg_list[0].address =
4269 cpu_to_le32(pci_map_single(p->pdev, cmd->sense_buffer,
4270 SCSI_SENSE_BUFFERSIZE,
4271 PCI_DMA_FROMDEVICE));
4272
4273
4274
4275
4276
4277
4278 hscb->control = 0;
4279 hscb->target_status = 0;
4280 hscb->SG_list_pointer =
4281 cpu_to_le32(SCB_DMA_ADDR(scb, scb->sg_list));
4282 hscb->SCSI_cmd_pointer =
4283 cpu_to_le32(SCB_DMA_ADDR(scb, scb->sense_cmd));
4284 hscb->data_count = scb->sg_list[0].length;
4285 hscb->data_pointer = scb->sg_list[0].address;
4286 hscb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]);
4287 hscb->residual_SG_segment_count = 0;
4288 hscb->residual_data_count[0] = 0;
4289 hscb->residual_data_count[1] = 0;
4290 hscb->residual_data_count[2] = 0;
4291
4292 scb->sg_count = hscb->SG_segment_count = 1;
4293 scb->sg_length = SCSI_SENSE_BUFFERSIZE;
4294 scb->tag_action = 0;
4295 scb->flags |= SCB_SENSE;
4296
4297
4298
4299
4300#ifdef AIC7XXX_VERBOSE_DEBUGGING
4301 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4302 {
4303 if (scb->flags & SCB_MSGOUT_BITS)
4304 printk(INFO_LEAD "Requesting SENSE with %s\n", p->host_no,
4305 CTL_OF_SCB(scb), (scb->flags & SCB_MSGOUT_SDTR) ?
4306 "SDTR" : "WDTR");
4307 else
4308 printk(INFO_LEAD "Requesting SENSE, no MSG\n", p->host_no,
4309 CTL_OF_SCB(scb));
4310 }
4311#endif
4312 aic7xxx_busy_target(p, scb);
4313 aic_outb(p, SEND_SENSE, RETURN_1);
4314 aic7xxx_error(cmd) = DID_OK;
4315 break;
4316 }
4317 printk(INFO_LEAD "CHECK_CONDITION on REQUEST_SENSE, returning "
4318 "an error.\n", p->host_no, CTL_OF_SCB(scb));
4319 aic7xxx_error(cmd) = DID_ERROR;
4320 scb->flags &= ~SCB_SENSE;
4321 break;
4322
4323 case QUEUE_FULL:
4324 queue_flag = TRUE;
4325 case BUSY:
4326 {
4327 struct aic7xxx_scb *next_scbp, *prev_scbp;
4328 unsigned char active_hscb, next_hscb, prev_hscb, scb_index;
4329
4330
4331
4332
4333
4334
4335
4336
4337
4338
4339
4340
4341
4342 next_scbp = p->waiting_scbs.head;
4343 while ( next_scbp != NULL )
4344 {
4345 prev_scbp = next_scbp;
4346 next_scbp = next_scbp->q_next;
4347 if ( aic7xxx_match_scb(p, prev_scbp, target, channel, lun,
4348 SCB_LIST_NULL) )
4349 {
4350 scbq_remove(&p->waiting_scbs, prev_scbp);
4351 scb->flags = SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL;
4352 p->activescbs++;
4353 aic_dev->active_cmds++;
4354 }
4355 }
4356 aic7xxx_search_qinfifo(p, target, channel, lun,
4357 SCB_LIST_NULL, SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL,
4358 FALSE, NULL);
4359 next_scbp = NULL;
4360 active_hscb = aic_inb(p, SCBPTR);
4361 prev_hscb = next_hscb = scb_index = SCB_LIST_NULL;
4362 next_hscb = aic_inb(p, WAITING_SCBH);
4363 while (next_hscb != SCB_LIST_NULL)
4364 {
4365 aic_outb(p, next_hscb, SCBPTR);
4366 scb_index = aic_inb(p, SCB_TAG);
4367 if (scb_index < p->scb_data->numscbs)
4368 {
4369 next_scbp = p->scb_data->scb_array[scb_index];
4370 if (aic7xxx_match_scb(p, next_scbp, target, channel, lun,
4371 SCB_LIST_NULL) )
4372 {
4373 next_scbp->flags = SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL;
4374 next_hscb = aic_inb(p, SCB_NEXT);
4375 aic_outb(p, 0, SCB_CONTROL);
4376 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
4377 aic7xxx_add_curscb_to_free_list(p);
4378 if (prev_hscb == SCB_LIST_NULL)
4379 {
4380
4381
4382
4383
4384
4385 aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
4386 aic_outb(p, CLRSELTIMEO, CLRSINT1);
4387 aic_outb(p, next_hscb, WAITING_SCBH);
4388 }
4389 else
4390 {
4391 aic_outb(p, prev_hscb, SCBPTR);
4392 aic_outb(p, next_hscb, SCB_NEXT);
4393 }
4394 }
4395 else
4396 {
4397 prev_hscb = next_hscb;
4398 next_hscb = aic_inb(p, SCB_NEXT);
4399 }
4400 }
4401 }
4402 aic_outb(p, active_hscb, SCBPTR);
4403 aic7xxx_run_done_queue(p, FALSE);
4404
4405#ifdef AIC7XXX_VERBOSE_DEBUGGING
4406 if( (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ||
4407 (aic7xxx_verbose > 0xffff) )
4408 {
4409 if (queue_flag)
4410 printk(INFO_LEAD "Queue full received; queue depth %d, "
4411 "active %d\n", p->host_no, CTL_OF_SCB(scb),
4412 aic_dev->max_q_depth, aic_dev->active_cmds);
4413 else
4414 printk(INFO_LEAD "Target busy\n", p->host_no, CTL_OF_SCB(scb));
4415 }
4416#endif
4417 if (queue_flag)
4418 {
4419 int diff;
4420 result = scsi_track_queue_full(cmd->device,
4421 aic_dev->active_cmds);
4422 if ( result < 0 )
4423 {
4424 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4425 printk(INFO_LEAD "Tagged Command Queueing disabled.\n",
4426 p->host_no, CTL_OF_SCB(scb));
4427 diff = aic_dev->max_q_depth - p->host->cmd_per_lun;
4428 aic_dev->temp_q_depth = 1;
4429 aic_dev->max_q_depth = 1;
4430 }
4431 else if ( result > 0 )
4432 {
4433 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4434 printk(INFO_LEAD "Queue depth reduced to %d\n", p->host_no,
4435 CTL_OF_SCB(scb), result);
4436 diff = aic_dev->max_q_depth - result;
4437 aic_dev->max_q_depth = result;
4438
4439
4440 if(aic_dev->temp_q_depth > result)
4441 aic_dev->temp_q_depth = result;
4442 }
4443
4444
4445
4446
4447
4448
4449
4450
4451
4452 }
4453 break;
4454 }
4455
4456 default:
4457 if (aic7xxx_verbose & VERBOSE_SEQINT)
4458 printk(INFO_LEAD "Unexpected target status 0x%x.\n", p->host_no,
4459 CTL_OF_SCB(scb), scb->hscb->target_status);
4460 if (!aic7xxx_error(cmd))
4461 {
4462 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
4463 }
4464 break;
4465 }
4466 }
4467 }
4468 break;
4469
4470 case AWAITING_MSG:
4471 {
4472 unsigned char scb_index, msg_out;
4473
4474 scb_index = aic_inb(p, SCB_TAG);
4475 msg_out = aic_inb(p, MSG_OUT);
4476 scb = p->scb_data->scb_array[scb_index];
4477 aic_dev = AIC_DEV(scb->cmd);
4478 p->msg_index = p->msg_len = 0;
4479
4480
4481
4482
4483
4484
4485 if ( !(scb->flags & SCB_DEVICE_RESET) &&
4486 (msg_out == MSG_IDENTIFYFLAG) &&
4487 (scb->hscb->control & TAG_ENB) )
4488 {
4489 p->msg_buf[p->msg_index++] = scb->tag_action;
4490 p->msg_buf[p->msg_index++] = scb->hscb->tag;
4491 p->msg_len += 2;
4492 }
4493
4494 if (scb->flags & SCB_DEVICE_RESET)
4495 {
4496 p->msg_buf[p->msg_index++] = MSG_BUS_DEV_RESET;
4497 p->msg_len++;
4498 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
4499 printk(INFO_LEAD "Bus device reset mailed.\n",
4500 p->host_no, CTL_OF_SCB(scb));
4501 }
4502 else if (scb->flags & SCB_ABORT)
4503 {
4504 if (scb->tag_action)
4505 {
4506 p->msg_buf[p->msg_index++] = MSG_ABORT_TAG;
4507 }
4508 else
4509 {
4510 p->msg_buf[p->msg_index++] = MSG_ABORT;
4511 }
4512 p->msg_len++;
4513 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
4514 printk(INFO_LEAD "Abort message mailed.\n", p->host_no,
4515 CTL_OF_SCB(scb));
4516 }
4517 else if (scb->flags & SCB_MSGOUT_PPR)
4518 {
4519 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4520 {
4521 printk(INFO_LEAD "Sending PPR (%d/%d/%d/%d) message.\n",
4522 p->host_no, CTL_OF_SCB(scb),
4523 aic_dev->goal.period,
4524 aic_dev->goal.offset,
4525 aic_dev->goal.width,
4526 aic_dev->goal.options);
4527 }
4528 aic7xxx_construct_ppr(p, scb);
4529 }
4530 else if (scb->flags & SCB_MSGOUT_WDTR)
4531 {
4532 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4533 {
4534 printk(INFO_LEAD "Sending WDTR message.\n", p->host_no,
4535 CTL_OF_SCB(scb));
4536 }
4537 aic7xxx_construct_wdtr(p, aic_dev->goal.width);
4538 }
4539 else if (scb->flags & SCB_MSGOUT_SDTR)
4540 {
4541 unsigned int max_sync, period;
4542 unsigned char options = 0;
4543
4544
4545
4546
4547 if (p->features & AHC_ULTRA2)
4548 {
4549 if ( (aic_inb(p, SBLKCTL) & ENAB40) &&
4550 !(aic_inb(p, SSTAT2) & EXP_ACTIVE) )
4551 {
4552 max_sync = AHC_SYNCRATE_ULTRA2;
4553 }
4554 else
4555 {
4556 max_sync = AHC_SYNCRATE_ULTRA;
4557 }
4558 }
4559 else if (p->features & AHC_ULTRA)
4560 {
4561 max_sync = AHC_SYNCRATE_ULTRA;
4562 }
4563 else
4564 {
4565 max_sync = AHC_SYNCRATE_FAST;
4566 }
4567 period = aic_dev->goal.period;
4568 aic7xxx_find_syncrate(p, &period, max_sync, &options);
4569 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4570 {
4571 printk(INFO_LEAD "Sending SDTR %d/%d message.\n", p->host_no,
4572 CTL_OF_SCB(scb), period,
4573 aic_dev->goal.offset);
4574 }
4575 aic7xxx_construct_sdtr(p, period, aic_dev->goal.offset);
4576 }
4577 else
4578 {
4579 panic("aic7xxx: AWAITING_MSG for an SCB that does "
4580 "not have a waiting message.\n");
4581 }
4582
4583
4584
4585
4586
4587
4588
4589
4590
4591
4592
4593
4594 scb->flags |= SCB_MSGOUT_SENT;
4595 p->msg_index = 0;
4596 p->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
4597 p->flags |= AHC_HANDLING_REQINITS;
4598 aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1);
4599 return;
4600 }
4601 break;
4602
4603 case DATA_OVERRUN:
4604 {
4605 unsigned char scb_index = aic_inb(p, SCB_TAG);
4606 unsigned char lastphase = aic_inb(p, LASTPHASE);
4607 unsigned int i;
4608
4609 scb = (p->scb_data->scb_array[scb_index]);
4610
4611
4612
4613
4614
4615
4616
4617
4618
4619
4620 if ( !(scb->flags & SCB_SENSE) )
4621 {
4622 printk(WARN_LEAD "Data overrun detected in %s phase, tag %d;\n",
4623 p->host_no, CTL_OF_SCB(scb),
4624 (lastphase == P_DATAIN) ? "Data-In" : "Data-Out", scb->hscb->tag);
4625 printk(KERN_WARNING " %s seen Data Phase. Length=%d, NumSGs=%d.\n",
4626 (aic_inb(p, SEQ_FLAGS) & DPHASE) ? "Have" : "Haven't",
4627 scb->sg_length, scb->sg_count);
4628 printk(KERN_WARNING " Raw SCSI Command: 0x");
4629 for (i = 0; i < scb->hscb->SCSI_cmd_length; i++)
4630 {
4631 printk("%02x ", scb->cmd->cmnd[i]);
4632 }
4633 printk("\n");
4634 if(aic7xxx_verbose > 0xffff)
4635 {
4636 for (i = 0; i < scb->sg_count; i++)
4637 {
4638 printk(KERN_WARNING " sg[%d] - Addr 0x%x : Length %d\n",
4639 i,
4640 le32_to_cpu(scb->sg_list[i].address),
4641 le32_to_cpu(scb->sg_list[i].length) );
4642 }
4643 }
4644 aic7xxx_error(scb->cmd) = DID_ERROR;
4645 }
4646 else
4647 printk(INFO_LEAD "Data Overrun during SEND_SENSE operation.\n",
4648 p->host_no, CTL_OF_SCB(scb));
4649 }
4650 break;
4651
4652 case WIDE_RESIDUE:
4653 {
4654 unsigned char resid_sgcnt, index;
4655 unsigned char scb_index = aic_inb(p, SCB_TAG);
4656 unsigned int cur_addr, resid_dcnt;
4657 unsigned int native_addr, native_length, sg_addr;
4658 int i;
4659
4660 if(scb_index > p->scb_data->numscbs)
4661 {
4662 printk(WARN_LEAD "invalid scb_index during WIDE_RESIDUE.\n",
4663 p->host_no, -1, -1, -1);
4664
4665
4666
4667 break;
4668 }
4669 scb = p->scb_data->scb_array[scb_index];
4670 if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
4671 {
4672 printk(WARN_LEAD "invalid scb during WIDE_RESIDUE flags:0x%x "
4673 "scb->cmd:0x%lx\n", p->host_no, CTL_OF_SCB(scb),
4674 scb->flags, (unsigned long)scb->cmd);
4675 break;
4676 }
4677 if(aic7xxx_verbose & VERBOSE_MINOR_ERROR)
4678 printk(INFO_LEAD "Got WIDE_RESIDUE message, patching up data "
4679 "pointer.\n", p->host_no, CTL_OF_SCB(scb));
4680
4681
4682
4683
4684
4685
4686
4687
4688
4689
4690 cur_addr = aic_inb(p, SHADDR) | (aic_inb(p, SHADDR + 1) << 8) |
4691 (aic_inb(p, SHADDR + 2) << 16) | (aic_inb(p, SHADDR + 3) << 24);
4692 sg_addr = aic_inb(p, SG_COUNT + 1) | (aic_inb(p, SG_COUNT + 2) << 8) |
4693 (aic_inb(p, SG_COUNT + 3) << 16) | (aic_inb(p, SG_COUNT + 4) << 24);
4694 resid_sgcnt = aic_inb(p, SCB_RESID_SGCNT);
4695 resid_dcnt = aic_inb(p, SCB_RESID_DCNT) |
4696 (aic_inb(p, SCB_RESID_DCNT + 1) << 8) |
4697 (aic_inb(p, SCB_RESID_DCNT + 2) << 16);
4698 index = scb->sg_count - ((resid_sgcnt) ? resid_sgcnt : 1);
4699 native_addr = le32_to_cpu(scb->sg_list[index].address);
4700 native_length = le32_to_cpu(scb->sg_list[index].length);
4701
4702
4703
4704
4705 if(resid_dcnt == native_length)
4706 {
4707 if(index == 0)
4708 {
4709
4710
4711
4712
4713 break;
4714 }
4715 resid_dcnt = 1;
4716 resid_sgcnt += 1;
4717 native_addr = le32_to_cpu(scb->sg_list[index - 1].address);
4718 native_length = le32_to_cpu(scb->sg_list[index - 1].length);
4719 cur_addr = native_addr + (native_length - 1);
4720 sg_addr -= sizeof(struct hw_scatterlist);
4721 }
4722 else
4723 {
4724
4725
4726
4727
4728 resid_dcnt += 1;
4729 cur_addr -= 1;
4730 }
4731
4732
4733
4734
4735
4736 aic_outb(p, resid_sgcnt, SG_COUNT);
4737 aic_outb(p, resid_sgcnt, SCB_RESID_SGCNT);
4738 aic_outb(p, sg_addr & 0xff, SG_COUNT + 1);
4739 aic_outb(p, (sg_addr >> 8) & 0xff, SG_COUNT + 2);
4740 aic_outb(p, (sg_addr >> 16) & 0xff, SG_COUNT + 3);
4741 aic_outb(p, (sg_addr >> 24) & 0xff, SG_COUNT + 4);
4742 aic_outb(p, resid_dcnt & 0xff, SCB_RESID_DCNT);
4743 aic_outb(p, (resid_dcnt >> 8) & 0xff, SCB_RESID_DCNT + 1);
4744 aic_outb(p, (resid_dcnt >> 16) & 0xff, SCB_RESID_DCNT + 2);
4745
4746
4747
4748
4749
4750
4751
4752
4753
4754
4755 if(p->features & AHC_ULTRA2)
4756 {
4757
4758
4759
4760
4761
4762 aic_outb(p, resid_dcnt & 0xff, HCNT);
4763 aic_outb(p, (resid_dcnt >> 8) & 0xff, HCNT + 1);
4764 aic_outb(p, (resid_dcnt >> 16) & 0xff, HCNT + 2);
4765 aic_outb(p, cur_addr & 0xff, HADDR);
4766 aic_outb(p, (cur_addr >> 8) & 0xff, HADDR + 1);
4767 aic_outb(p, (cur_addr >> 16) & 0xff, HADDR + 2);
4768 aic_outb(p, (cur_addr >> 24) & 0xff, HADDR + 3);
4769 aic_outb(p, aic_inb(p, DMAPARAMS) | PRELOADEN, DFCNTRL);
4770 udelay(1);
4771 aic_outb(p, aic_inb(p, DMAPARAMS) & ~(SCSIEN|HDMAEN), DFCNTRL);
4772 i=0;
4773 while(((aic_inb(p, DFCNTRL) & (SCSIEN|HDMAEN)) != 0) && (i++ < 1000))
4774 {
4775 udelay(1);
4776 }
4777 }
4778 else
4779 {
4780 aic_outb(p, cur_addr & 0xff, SHADDR);
4781 aic_outb(p, (cur_addr >> 8) & 0xff, SHADDR + 1);
4782 aic_outb(p, (cur_addr >> 16) & 0xff, SHADDR + 2);
4783 aic_outb(p, (cur_addr >> 24) & 0xff, SHADDR + 3);
4784 }
4785 }
4786 break;
4787
4788 case SEQ_SG_FIXUP:
4789 {
4790 unsigned char scb_index, tmp;
4791 int sg_addr, sg_length;
4792
4793 scb_index = aic_inb(p, SCB_TAG);
4794
4795 if(scb_index > p->scb_data->numscbs)
4796 {
4797 printk(WARN_LEAD "invalid scb_index during SEQ_SG_FIXUP.\n",
4798 p->host_no, -1, -1, -1);
4799 printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
4800 "0x%x\n", p->host_no, -1, -1, -1,
4801 aic_inb(p, SCSISIGI),
4802 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
4803 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
4804 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n",
4805 p->host_no, -1, -1, -1, aic_inb(p, SG_CACHEPTR),
4806 aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 |
4807 aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT));
4808
4809
4810
4811 break;
4812 }
4813 scb = p->scb_data->scb_array[scb_index];
4814 if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
4815 {
4816 printk(WARN_LEAD "invalid scb during SEQ_SG_FIXUP flags:0x%x "
4817 "scb->cmd:0x%p\n", p->host_no, CTL_OF_SCB(scb),
4818 scb->flags, scb->cmd);
4819 printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
4820 "0x%x\n", p->host_no, CTL_OF_SCB(scb),
4821 aic_inb(p, SCSISIGI),
4822 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
4823 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
4824 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n",
4825 p->host_no, CTL_OF_SCB(scb), aic_inb(p, SG_CACHEPTR),
4826 aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 |
4827 aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT));
4828 break;
4829 }
4830 if(aic7xxx_verbose & VERBOSE_MINOR_ERROR)
4831 printk(INFO_LEAD "Fixing up SG address for sequencer.\n", p->host_no,
4832 CTL_OF_SCB(scb));
4833
4834
4835
4836 tmp = aic_inb(p, SG_NEXT);
4837 tmp += SG_SIZEOF;
4838 aic_outb(p, tmp, SG_NEXT);
4839 if( tmp < SG_SIZEOF )
4840 aic_outb(p, aic_inb(p, SG_NEXT + 1) + 1, SG_NEXT + 1);
4841 tmp = aic_inb(p, SG_COUNT) - 1;
4842 aic_outb(p, tmp, SG_COUNT);
4843 sg_addr = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].address);
4844 sg_length = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].length);
4845
4846
4847
4848
4849 aic_outb(p, sg_addr & 0xff, HADDR);
4850 aic_outb(p, (sg_addr >> 8) & 0xff, HADDR + 1);
4851 aic_outb(p, (sg_addr >> 16) & 0xff, HADDR + 2);
4852 aic_outb(p, (sg_addr >> 24) & 0xff, HADDR + 3);
4853 aic_outb(p, sg_length & 0xff, HCNT);
4854 aic_outb(p, (sg_length >> 8) & 0xff, HCNT + 1);
4855 aic_outb(p, (sg_length >> 16) & 0xff, HCNT + 2);
4856 aic_outb(p, (tmp << 2) | ((tmp == 1) ? LAST_SEG : 0), SG_CACHEPTR);
4857 aic_outb(p, aic_inb(p, DMAPARAMS), DFCNTRL);
4858 while(aic_inb(p, SSTAT0) & SDONE) udelay(1);
4859 while(aic_inb(p, DFCNTRL) & (HDMAEN|SCSIEN)) aic_outb(p, 0, DFCNTRL);
4860 }
4861 break;
4862
4863#ifdef AIC7XXX_NOT_YET
4864 case TRACEPOINT2:
4865 {
4866 printk(INFO_LEAD "Tracepoint #2 reached.\n", p->host_no,
4867 channel, target, lun);
4868 }
4869 break;
4870
4871
4872 case MSG_BUFFER_BUSY:
4873 printk("aic7xxx: Message buffer busy.\n");
4874 break;
4875 case MSGIN_PHASEMIS:
4876 printk("aic7xxx: Message-in phasemis.\n");
4877 break;
4878#endif
4879
4880 default:
4881 printk(WARN_LEAD "Unknown SEQINT, INTSTAT 0x%x, SCSISIGI 0x%x.\n",
4882 p->host_no, channel, target, lun, intstat,
4883 aic_inb(p, SCSISIGI));
4884 break;
4885 }
4886
4887
4888
4889
4890 unpause_sequencer(p, TRUE);
4891}
4892
4893
4894
4895
4896
4897
4898
4899
4900
4901static int
4902aic7xxx_parse_msg(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
4903{
4904 int reject, reply, done;
4905 unsigned char target_scsirate, tindex;
4906 unsigned short target_mask;
4907 unsigned char target, channel, lun;
4908 unsigned char bus_width, new_bus_width;
4909 unsigned char trans_options, new_trans_options;
4910 unsigned int period, new_period, offset, new_offset, maxsync;
4911 struct aic7xxx_syncrate *syncrate;
4912 struct aic_dev_data *aic_dev;
4913
4914 target = scb->cmd->device->id;
4915 channel = scb->cmd->device->channel;
4916 lun = scb->cmd->device->lun;
4917 reply = reject = done = FALSE;
4918 tindex = TARGET_INDEX(scb->cmd);
4919 aic_dev = AIC_DEV(scb->cmd);
4920 target_scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
4921 target_mask = (0x01 << tindex);
4922
4923
4924
4925
4926
4927
4928
4929
4930
4931 if (p->msg_buf[0] != MSG_EXTENDED)
4932 {
4933 reject = TRUE;
4934 }
4935
4936
4937
4938
4939
4940
4941 if (p->features & AHC_ULTRA2)
4942 {
4943 if ( (aic_inb(p, SBLKCTL) & ENAB40) &&
4944 !(aic_inb(p, SSTAT2) & EXP_ACTIVE) )
4945 {
4946 if (p->features & AHC_ULTRA3)
4947 maxsync = AHC_SYNCRATE_ULTRA3;
4948 else
4949 maxsync = AHC_SYNCRATE_ULTRA2;
4950 }
4951 else
4952 {
4953 maxsync = AHC_SYNCRATE_ULTRA;
4954 }
4955 }
4956 else if (p->features & AHC_ULTRA)
4957 {
4958 maxsync = AHC_SYNCRATE_ULTRA;
4959 }
4960 else
4961 {
4962 maxsync = AHC_SYNCRATE_FAST;
4963 }
4964
4965
4966
4967
4968
4969
4970 if ( !reject && (p->msg_len > 2) )
4971 {
4972 switch(p->msg_buf[2])
4973 {
4974 case MSG_EXT_SDTR:
4975 {
4976
4977 if (p->msg_buf[1] != MSG_EXT_SDTR_LEN)
4978 {
4979 reject = TRUE;
4980 break;
4981 }
4982
4983 if (p->msg_len < (MSG_EXT_SDTR_LEN + 2))
4984 {
4985 break;
4986 }
4987
4988 period = new_period = p->msg_buf[3];
4989 offset = new_offset = p->msg_buf[4];
4990 trans_options = new_trans_options = 0;
4991 bus_width = new_bus_width = target_scsirate & WIDEXFER;
4992
4993
4994
4995
4996
4997 if(maxsync == AHC_SYNCRATE_ULTRA3)
4998 maxsync = AHC_SYNCRATE_ULTRA2;
4999
5000
5001
5002
5003
5004
5005
5006 if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR)) !=
5007 (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR) )
5008 {
5009 if (!(aic_dev->flags & DEVICE_DTR_SCANNED))
5010 {
5011
5012
5013
5014
5015
5016 aic_dev->goal.width = MSG_EXT_WDTR_BUS_8_BIT;
5017 aic_dev->goal.options = 0;
5018 if(p->user[tindex].offset)
5019 {
5020 aic_dev->needsdtr_copy = 1;
5021 aic_dev->goal.period = max_t(unsigned char, 10,p->user[tindex].period);
5022 if(p->features & AHC_ULTRA2)
5023 {
5024 aic_dev->goal.offset = MAX_OFFSET_ULTRA2;
5025 }
5026 else
5027 {
5028 aic_dev->goal.offset = MAX_OFFSET_8BIT;
5029 }
5030 }
5031 else
5032 {
5033 aic_dev->needsdtr_copy = 0;
5034 aic_dev->goal.period = 255;
5035 aic_dev->goal.offset = 0;
5036 }
5037 aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5038 }
5039 else if (aic_dev->needsdtr_copy == 0)
5040 {
5041
5042
5043
5044
5045
5046
5047 reject = TRUE;
5048 break;
5049 }
5050
5051
5052 reply = TRUE;
5053
5054 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5055 {
5056 printk(INFO_LEAD "Received pre-emptive SDTR message from "
5057 "target.\n", p->host_no, CTL_OF_SCB(scb));
5058 }
5059
5060
5061
5062
5063
5064
5065 new_period = max_t(unsigned int, period, aic_dev->goal.period);
5066 new_offset = min_t(unsigned int, offset, aic_dev->goal.offset);
5067 }
5068
5069
5070
5071
5072
5073 syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync,
5074 &trans_options);
5075 aic7xxx_validate_offset(p, syncrate, &new_offset, bus_width);
5076
5077
5078
5079
5080
5081 if ((new_offset == 0) && (new_offset != offset))
5082 {
5083 aic_dev->needsdtr_copy = 0;
5084 reply = TRUE;
5085 }
5086
5087
5088
5089
5090
5091 if(reply)
5092 {
5093
5094
5095
5096
5097
5098 aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5099 new_offset, trans_options,
5100 AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR,
5101 aic_dev);
5102 scb->flags &= ~SCB_MSGOUT_BITS;
5103 scb->flags |= SCB_MSGOUT_SDTR;
5104 aic_outb(p, HOST_MSG, MSG_OUT);
5105 aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
5106 }
5107 else
5108 {
5109 aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5110 new_offset, trans_options,
5111 AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev);
5112 aic_dev->needsdtr = 0;
5113 }
5114 done = TRUE;
5115 break;
5116 }
5117 case MSG_EXT_WDTR:
5118 {
5119
5120 if (p->msg_buf[1] != MSG_EXT_WDTR_LEN)
5121 {
5122 reject = TRUE;
5123 break;
5124 }
5125
5126 if (p->msg_len < (MSG_EXT_WDTR_LEN + 2))
5127 {
5128 break;
5129 }
5130
5131 bus_width = new_bus_width = p->msg_buf[3];
5132
5133 if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR)) ==
5134 (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR) )
5135 {
5136 switch(bus_width)
5137 {
5138 default:
5139 {
5140 reject = TRUE;
5141 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
5142 ((aic_dev->flags & DEVICE_PRINT_DTR) ||
5143 (aic7xxx_verbose > 0xffff)) )
5144 {
5145 printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n",
5146 p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width));
5147 }
5148 }
5149 case MSG_EXT_WDTR_BUS_8_BIT:
5150 {
5151 aic_dev->goal.width = MSG_EXT_WDTR_BUS_8_BIT;
5152 aic_dev->needwdtr_copy &= ~target_mask;
5153 break;
5154 }
5155 case MSG_EXT_WDTR_BUS_16_BIT:
5156 {
5157 break;
5158 }
5159 }
5160 aic_dev->needwdtr = 0;
5161 aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5162 AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev);
5163 }
5164 else
5165 {
5166 if ( !(aic_dev->flags & DEVICE_DTR_SCANNED) )
5167 {
5168
5169
5170
5171
5172
5173 if( (p->features & AHC_WIDE) && p->user[tindex].width )
5174 {
5175 aic_dev->goal.width = MSG_EXT_WDTR_BUS_16_BIT;
5176 aic_dev->needwdtr_copy = 1;
5177 }
5178
5179
5180
5181
5182 aic_dev->goal.options = 0;
5183
5184 if(p->user[tindex].offset)
5185 {
5186 aic_dev->needsdtr_copy = 1;
5187 aic_dev->goal.period = max_t(unsigned char, 10, p->user[tindex].period);
5188 if(p->features & AHC_ULTRA2)
5189 {
5190 aic_dev->goal.offset = MAX_OFFSET_ULTRA2;
5191 }
5192 else if( aic_dev->goal.width )
5193 {
5194 aic_dev->goal.offset = MAX_OFFSET_16BIT;
5195 }
5196 else
5197 {
5198 aic_dev->goal.offset = MAX_OFFSET_8BIT;
5199 }
5200 } else {
5201 aic_dev->needsdtr_copy = 0;
5202 aic_dev->goal.period = 255;
5203 aic_dev->goal.offset = 0;
5204 }
5205
5206 aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5207 }
5208 else if (aic_dev->needwdtr_copy == 0)
5209 {
5210
5211
5212
5213
5214
5215
5216 reject = TRUE;
5217 break;
5218 }
5219
5220
5221 reply = TRUE;
5222
5223 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5224 {
5225 printk(INFO_LEAD "Received pre-emptive WDTR message from "
5226 "target.\n", p->host_no, CTL_OF_SCB(scb));
5227 }
5228 switch(bus_width)
5229 {
5230 case MSG_EXT_WDTR_BUS_16_BIT:
5231 {
5232 if ( (p->features & AHC_WIDE) &&
5233 (aic_dev->goal.width == MSG_EXT_WDTR_BUS_16_BIT) )
5234 {
5235 new_bus_width = MSG_EXT_WDTR_BUS_16_BIT;
5236 break;
5237 }
5238 }
5239 default:
5240 case MSG_EXT_WDTR_BUS_8_BIT:
5241 {
5242 aic_dev->needwdtr_copy = 0;
5243 new_bus_width = MSG_EXT_WDTR_BUS_8_BIT;
5244 break;
5245 }
5246 }
5247 scb->flags &= ~SCB_MSGOUT_BITS;
5248 scb->flags |= SCB_MSGOUT_WDTR;
5249 aic_dev->needwdtr = 0;
5250 if(aic_dev->dtr_pending == 0)
5251 {
5252
5253
5254
5255
5256 aic_dev->dtr_pending = 1;
5257 scb->flags |= SCB_DTR_SCB;
5258 }
5259 aic_outb(p, HOST_MSG, MSG_OUT);
5260 aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
5261
5262
5263
5264
5265
5266 aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5267 AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR,
5268 aic_dev);
5269 }
5270
5271
5272
5273
5274
5275
5276
5277
5278 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
5279 AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE,
5280 aic_dev);
5281 aic_dev->needsdtr = aic_dev->needsdtr_copy;
5282 done = TRUE;
5283 break;
5284 }
5285 case MSG_EXT_PPR:
5286 {
5287
5288 if (p->msg_buf[1] != MSG_EXT_PPR_LEN)
5289 {
5290 reject = TRUE;
5291 break;
5292 }
5293
5294 if (p->msg_len < (MSG_EXT_PPR_LEN + 2))
5295 {
5296 break;
5297 }
5298
5299 period = new_period = p->msg_buf[3];
5300 offset = new_offset = p->msg_buf[5];
5301 bus_width = new_bus_width = p->msg_buf[6];
5302 trans_options = new_trans_options = p->msg_buf[7] & 0xf;
5303
5304 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5305 {
5306 printk(INFO_LEAD "Parsing PPR message (%d/%d/%d/%d)\n",
5307 p->host_no, CTL_OF_SCB(scb), period, offset, bus_width,
5308 trans_options);
5309 }
5310
5311
5312
5313
5314
5315
5316
5317 if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR)) !=
5318 (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR) )
5319 {
5320
5321 if (!(aic_dev->flags & DEVICE_DTR_SCANNED))
5322 {
5323
5324
5325 aic_dev->needppr = aic_dev->needppr_copy = 1;
5326 aic_dev->needsdtr = aic_dev->needsdtr_copy = 0;
5327 aic_dev->needwdtr = aic_dev->needwdtr_copy = 0;
5328
5329
5330 aic_dev->flags |= DEVICE_SCSI_3;
5331
5332
5333
5334
5335
5336
5337
5338
5339
5340 aic_dev->goal.width = p->user[tindex].width;
5341 if(p->user[tindex].offset)
5342 {
5343 aic_dev->goal.period = p->user[tindex].period;
5344 aic_dev->goal.options = p->user[tindex].options;
5345 if(p->features & AHC_ULTRA2)
5346 {
5347 aic_dev->goal.offset = MAX_OFFSET_ULTRA2;
5348 }
5349 else if( aic_dev->goal.width &&
5350 (bus_width == MSG_EXT_WDTR_BUS_16_BIT) &&
5351 p->features & AHC_WIDE )
5352 {
5353 aic_dev->goal.offset = MAX_OFFSET_16BIT;
5354 }
5355 else
5356 {
5357 aic_dev->goal.offset = MAX_OFFSET_8BIT;
5358 }
5359 }
5360 else
5361 {
5362 aic_dev->goal.period = 255;
5363 aic_dev->goal.offset = 0;
5364 aic_dev->goal.options = 0;
5365 }
5366 aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5367 }
5368 else if (aic_dev->needppr_copy == 0)
5369 {
5370
5371
5372
5373
5374
5375
5376 reject = TRUE;
5377 break;
5378 }
5379
5380
5381 reply = TRUE;
5382
5383 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5384 {
5385