linux/drivers/mfd/da9052-core.c
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51/ae/ec30235afcca069991f5e30357a4bc1c4fe0_3/0"
L1" class="line" namon>L1">6 61./a>.spa> class="comment">/*./spa>
 L2" class="line" namon>L2">6 62./a>.spa> class="comment"> * Device access for Dialog DA9052 PMICs../spa>
 L3" class="line" namon>L3">6 63./a>.spa> class="comment"> *./spa>
 L4" class="line" namon>L4">6 64./a>.spa> class="comment"> * Copyright(c) 2011 Dialog Semiconductor Ltd../spa>
 L5" class="line" namon>L5">6 65./a>.spa> class="comment"> *./spa>
 L6" class="line" namon>L6">6 66./a>.spa> class="comment"> * Author: David Dajun Chen <dchen@diasemi.com>./spa>
 L7" class="line" namon>L7">6 67./a>.spa> class="comment"> *./spa>
 L8" class="line" namon>L8">6 68./a>.spa> class="comment"> *  This program is free software; you ca> redistribute  it and/or modify it./spa>
 L9" class="line" namon>L9">6 69./a>.spa> class="comment"> *  under  the terms of  the GNU General.6Public License as published by the./spa>
 L10" class="line" namon>L10">6 7.11a>.spa> class="comment"> *  Free Software Founda	  >;  either vers13
 L11" class="line" namon>L11">6 11./a>.spa> class="comment"> *  "
	  >) any later vers13<../spa>
 L12" class="line" namon>L12">6 12./a>.spa> class="comment"> */./spa>
 L13" class="line" namon>L13">6 13./a> L14" class="line" namon>L14">6 14./a>#include <linux/device.h./a>> L15" class="line" namon>L15">6 15./a>#include <linux/delay.h./a>> L16" class="line" namon>L16">6 16./a>#include <linux/input.h./a>> L17" class="line" namon>L17">6 17./a>#include <linux/interrupt.h./a>> L18" class="line" namon>L18">6 18./a>#include <linux/irq.h./a>> L19" class="line" namon>L19">6 19./a>#include <linux/mfd/core.h./a>> L20" class="line" namon>L20">6 20./a>#include <linux/slab.h./a>> L21" class="line" namon>L21">6 21./a>#include <linux/module.h./a>> L22" class="line" namon>L22">6 22./a> L23" class="line" namon>L23">6 23./a>#include <linux/mfd/da9052/da9052.h./a>> L24" class="line" namon>L24">6 24./a>#include <linux/mfd/da9052/pda	a.h./a>> L25" class="line" namon>L25">6 25./a>#include <linux/mfd/da9052/reg.h./a>> L26" class="line" namon>L26">6 26./a> L27" class="line" namon>L27">6 27./a>#define6.a href="+code=DA9052_NUM_IRQ_REGS" class="sref">DA9052_NUM_IRQ_REGS./a>             4 L28" class="line" namon>L28">6 28./a>#define6.a href="+code=DA9052_IRQ_MASK_POS_1" class="sref">DA9052_IRQ_MASK_POS_1./a>           0x01 L29" class="line" namon>L29">6 29./a>#define6.a href="+code=DA9052_IRQ_MASK_POS_2" class="sref">DA9052_IRQ_MASK_POS_2./a>           0x02 L30" class="line" namon>L30">6 30./a>#define6.a href="+code=DA9052_IRQ_MASK_POS_3" class="sref">DA9052_IRQ_MASK_POS_3./a>           0x04 L31" class="line" namon>L31">6 31./a>#define6.a href="+code=DA9052_IRQ_MASK_POS_4" class="sref">DA9052_IRQ_MASK_POS_4./a>           0x08 L32" class="line" namon>L32">6 32./a>#define6.a href="+code=DA9052_IRQ_MASK_POS_5" class="sref">DA9052_IRQ_MASK_POS_5./a>           0x10 L33" class="line" namon>L33">6 33./a>#define6.a href="+code=DA9052_IRQ_MASK_POS_6" class="sref">DA9052_IRQ_MASK_POS_6./a>           0x20 L34" class="line" namon>L34">6 34./a>#define6.a href="+code=DA9052_IRQ_MASK_POS_7" class="sref">DA9052_IRQ_MASK_POS_7./a>           0x40 L35" class="line" namon>L35">6 35./a>#define6.a href="+code=DA9052_IRQ_MASK_POS_8" class="sref">DA9052_IRQ_MASK_POS_8./a>           0x80 L36" class="line" namon>L36">6 36./a> L37" class="line" namon>L37">6 37./a>static6.a href="+code=bool" class="sref">bool./a> .a href="+code=da9052_reg_readable" class="sref">da9052_reg_readable./a>(struct .a href="+code=device" class="sref">device./a> *.a href="+code=dev" class="sref">dev./a>, unsigned int .a href="+code=reg" class="sref">reg./a>) L38" class="line" namon>L38">6 38./a>{ L39" class="line" namon>L39">6 39./a>        switch (.a href="+code=reg" class="sref">reg./a>) { L40" class="line" namon>L40">6 40./a>        case6.a href="+code=DA9052_PAGE0_CON_REG" class="sref">DA9052_PAGE0_CON_REG./a>: L41" class="line" namon>L41">6 41./a>        case6.a href="+code=DA9052_STATUS_A_REG" class="sref">DA9052_STATUS_A_REG./a>: L42" class="line" namon>L42">6 42./a>        case6.a href="+code=DA9052_STATUS_B_REG" class="sref">DA9052_STATUS_B_REG./a>: L43" class="line" namon>L43">6 43./a>        case6.a href="+code=DA9052_STATUS_C_REG" class="sref">DA9052_STATUS_C_REG./a>: L44" class="line" namon>L44">6 44./a>        case6.a href="+code=DA9052_STATUS_D_REG" class="sref">DA9052_STATUS_D_REG./a>: L45" class="line" namon>L45">6 45./a>        case6.a href="+code=DA9052_EVENT_A_REG" class="sref">DA9052_EVENT_A_REG./a>: L46" class="line" namon>L46">6 46./a>        case6.a href="+code=DA9052_EVENT_B_REG" class="sref">DA9052_EVENT_B_REG./a>: L47" class="line" namon>L47">6 47./a>        case6.a href="+code=DA9052_EVENT_C_REG" class="sref">DA9052_EVENT_C_REG./a>: L48" class="line" namon>L48">6 48./a>        case6.a href="+code=DA9052_EVENT_D_REG" class="sref">DA9052_EVENT_D_REG./a>: L49" class="line" namon>L49">6 49./a>        case6.a href="+code=DA9052_FAULTLOG_REG" class="sref">DA9052_FAULTLOG_REG./a>: L50" class="line" namon>L50">6 50./a>        case6.a href="+code=DA9052_IRQ_MASK_A_REG" class="sref">DA9052_IRQ_MASK_A_REG./a>: L51" class="line" namon>L51">6 51./a>        case6.a href="+code=DA9052_IRQ_MASK_B_REG" class="sref">DA9052_IRQ_MASK_B_REG./a>: L52" class="line" namon>L52">6 52./a>        case6.a href="+code=DA9052_IRQ_MASK_C_REG" class="sref">DA9052_IRQ_MASK_C_REG./a>: L53" class="line" namon>L53">6 53./a>        case6.a href="+code=DA9052_IRQ_MASK_D_REG" class="sref">DA9052_IRQ_MASK_D_REG./a>: L54" class="line" namon>L54">6 54./a>        case6.a href="+code=DA9052_CONTROL_A_REG" class="sref">DA9052_CONTROL_A_REG./a>: L55" class="line" namon>L55">6 55./a>        case6.a href="+code=DA9052_CONTROL_B_REG" class="sref">DA9052_CONTROL_B_REG./a>: L56" class="line" namon>L56">6 56./a>        case6.a href="+code=DA9052_CONTROL_C_REG" class="sref">DA9052_CONTROL_C_REG./a>: L57" class="line" namon>L57">6 57./a>        case6.a href="+code=DA9052_CONTROL_D_REG" class="sref">DA9052_CONTROL_D_REG./a>: L58" class="line" namon>L58">6 58./a>        case6.a href="+code=DA9052_PDDIS_REG" class="sref">DA9052_PDDIS_REG./a>: L59" class="line" namon>L59">6 59./a>        case6.a href="+code=DA9052_INTERFACE_REG" class="sref">DA9052_INTERFACE_REG./a>: L60" class="line" namon>L60">6 60./a>        case6.a href="+code=DA9052_RESET_REG" class="sref">DA9052_RESET_REG./a>: L61" class="line" namon>L61">6 61./a>        case6.a href="+code=DA9052_GPIO_0_1_REG" class="sref">DA9052_GPIO_0_1_REG./a>: L62" class="line" namon>L62">6 62./a>        case6.a href="+code=DA9052_GPIO_2_3_REG" class="sref">DA9052_GPIO_2_3_REG./a>: L63" class="line" namon>L63">6 63./a>        case6.a href="+code=DA9052_GPIO_4_5_REG" class="sref">DA9052_GPIO_4_5_REG./a>: L64" class="line" namon>L64">6 64./a>        case6.a href="+code=DA9052_GPIO_6_7_REG" class="sref">DA9052_GPIO_6_7_REG./a>: L65" class="line" namon>L65">6 65./a>        case6.a href="+code=DA9052_GPIO_14_15_REG" class="sref">DA9052_GPIO_14_15_REG./a>: L66" class="line" namon>L66">6 66./a>        case6.a href="+code=DA9052_ID_0_1_REG" class="sref">DA9052_ID_0_1_REG./a>: L67" class="line" namon>L67">6 67./a>        case6.a href="+code=DA9052_ID_2_3_REG" class="sref">DA9052_ID_2_3_REG./a>: L68" class="line" namon>L68">6 68./a>        case6.a href="+code=DA9052_ID_4_5_REG" class="sref">DA9052_ID_4_5_REG./a>: L69" class="line" namon>L69">6 69./a>        case6.a href="+code=DA9052_ID_6_7_REG" class="sref">DA9052_ID_6_7_REG./a>: L70" class="line" namon>L70">6 70./a>        case6.a href="+code=DA9052_ID_8_9_REG" class="sref">DA9052_ID_8_9_REG./a>: L71" class="line" namon>L71">6 71./a>        case6.a href="+code=DA9052_ID_10_11_REG" class="sref">DA9052_ID_10_11_REG./a>: L72" class="line" namon>L72">6 72./a>        case6.a href="+code=DA9052_ID_12_13_REG" class="sref">DA9052_ID_12_13_REG./a>: L73" class="line" namon>L73">6 73./a>        case6.a href="+code=DA9052_ID_14_15_REG" class="sref">DA9052_ID_14_15_REG./a>: L74" class="line" namon>L74">6 74./a>        case6.a href="+code=DA9052_ID_16_17_REG" class="sref">DA9052_ID_16_17_REG./a>: L75" class="line" namon>L75">6 75./a>        case6.a href="+code=DA9052_ID_18_19_REG" class="sref">DA9052_ID_18_19_REG./a>: L76" class="line" namon>L76">6 76./a>        case6.a href="+code=DA9052_ID_20_21_REG" class="sref">DA9052_ID_20_21_REG./a>: L77" class="line" namon>L77">6 77./a>        case6.a href="+code=DA9052_SEQ_STATUS_REG" class="sref">DA9052_SEQ_STATUS_REG./a>: L78" class="line" namon>L78">6 78./a>        case6.a href="+code=DA9052_SEQ_A_REG" class="sref">DA9052_SEQ_A_REG./a>: L79" class="line" namon>L79">6 79./a>        case6.a href="+code=DA9052_SEQ_B_REG" class="sref">DA9052_SEQ_B_REG./a>: L80" class="line" namon>L80">6 80./a>        case6.a href="+code=DA9052_SEQ_TIMER_REG" class="sref">DA9052_SEQ_TIMER_REG./a>: L81" class="line" namon>L81">6 81./a>        case6.a href="+code=DA9052_BUCKA_REG" class="sref">DA9052_BUCKA_REG./a>: L82" class="line" namon>L82">6 82./a>        case6.a href="+code=DA9052_BUCKB_REG" class="sref">DA9052_BUCKB_REG./a>: L83" class="line" namon>L83">6 83./a>        case6.a href="+code=DA9052_BUCKCORE_REG" class="sref">DA9052_BUCKCORE_REG./a>: L84" class="line" namon>L84">6 84./a>        case6.a href="+code=DA9052_BUCKPRO_REG" class="sref">DA9052_BUCKPRO_REG./a>: L85" class="line" namon>L85">6 85./a>        case6.a href="+code=DA9052_BUCKMEM_REG" class="sref">DA9052_BUCKMEM_REG./a>: L86" class="line" namon>L86">6 86./a>        case6.a href="+code=DA9052_BUCKPERI_REG" class="sref">DA9052_BUCKPERI_REG./a>: L87" class="line" namon>L87">6 87./a>        case6.a href="+code=DA9052_LDO1_REG" class="sref">DA9052_LDO1_REG./a>: L88" class="line" namon>L88">6 88./a>        case6.a href="+code=DA9052_LDO2_REG" class="sref">DA9052_LDO2_REG./a>: L89" class="line" namon>L89">6 89./a>        case6.a href="+code=DA9052_LDO3_REG" class="sref">DA9052_LDO3_REG./a>: L90" class="line" namon>L90">6 90./a>        case6.a href="+code=DA9052_LDO4_REG" class="sref">DA9052_LDO4_REG./a>: L91" class="line" namon>L91">6 91./a>        case6.a href="+code=DA9052_LDO5_REG" class="sref">DA9052_LDO5_REG./a>: L92" class="line" namon>L92">6 92./a>        case6.a href="+code=DA9052_LDO6_REG" class="sref">DA9052_LDO6_REG./a>: L93" class="line" namon>L93">6 93./a>        case6.a href="+code=DA9052_LDO7_REG" class="sref">DA9052_LDO7_REG./a>: L94" class="line" namon>L94">6 94./a>        case6.a href="+code=DA9052_LDO8_REG" class="sref">DA9052_LDO8_REG./a>: L95" class="line" namon>L95">6 95./a>        case6.a href="+code=DA9052_LDO9_REG" class="sref">DA9052_LDO9_REG./a>: L96" class="line" namon>L96">6 96./a>        case6.a href="+code=DA9052_LDO10_REG" class="sref">DA9052_LDO10_REG./a>: L97" class="line" namon>L97">6 97./a>        case6.a href="+code=DA9052_SUPPLY_REG" class="sref">DA9052_SUPPLY_REG./a>: L98" class="line" namon>L98">6 98./a>        case6.a href="+code=DA9052_PULLDOWN_REG" class="sref">DA9052_PULLDOWN_REG./a>: L99" class="line" namon>L99">6 99./a>        case6.a href="+code=DA9052_CHGBUCK_REG" class="sref">DA9052_CHGBUCK_REG./a>: L100" class="line" namon>L100">6100./a>        case6.a href="+code=DA9052_WAITCONT_REG" class="sref">DA9052_WAITCONT_REG./a>: L101" class="line" namon>L101">6101./a>        case6.a href="+code=DA9052_ISET_REG" class="sref">DA9052_ISET_REG./a>: L102" class="line" namon>L102">6102./a>        case6.a href="+code=DA9052_BATCHG_REG" class="sref">DA9052_BATCHG_REG./a>: L103" class="line" namon>L103">6103./a>        case6.a href="+code=DA9052_CHG_CONT_REG" class="sref">DA9052_CHG_CONT_REG./a>: L104" class="line" namon>L104">6104./a>        case6.a href="+code=DA9052_INPUT_CONT_REG" class="sref">DA9052_INPUT_CONT_REG./a>: L105" class="line" namon>L105">6105./a>        case6.a href="+code=DA9052_CHG_TIME_REG" class="sref">DA9052_CHG_TIME_REG./a>: L106" class="line" namon>L106">6106./a>        case6.a href="+code=DA9052_BBAT_CONT_REG" class="sref">DA9052_BBAT_CONT_REG./a>: L107" class="line" namon>L107">6107./a>        case6.a href="+code=DA9052_BOOST_REG" class="sref">DA9052_BOOST_REG./a>: L108" class="line" namon>L108">6108./a>        case6.a href="+code=DA9052_LED_CONT_REG" class="sref">DA9052_LED_CONT_REG./a>: L109" class="line" namon>L109">6109./a>        case6.a href="+code=DA9052_LEDMIN123_REG" class="sref">DA9052_LEDMIN123_REG./a>: L110" class="line" namon>L110">6110./a>        case6.a href="+code=DA9052_LED1_CONF_REG" class="sref">DA9052_LED1_CONF_REG./a>: L111" class="line" namon>L111">6111./a>        case6.a href="+code=DA9052_LED2_CONF_REG" class="sref">DA9052_LED2_CONF_REG./a>: L112" class="line" namon>L112">6112./a>        case6.a href="+code=DA9052_LED3_CONF_REG" class="sref">DA9052_LED3_CONF_REG./a>: L113" class="line" namon>L113">6113./a>        case6.a href="+code=DA9052_LED1CONT_REG" class="sref">DA9052_LED1CONT_REG./a>: L114" class="line" namon>L114">6114./a>        case6.a href="+code=DA9052_LED2CONT_REG" class="sref">DA9052_LED2CONT_REG./a>: L115" class="line" namon>L115">6115./a>        case6.a href="+code=DA9052_LED3CONT_REG" class="sref">DA9052_LED3CONT_REG./a>: L116" class="line" namon>L116">6116./a>        case6.a href="+code=DA9052_LED_CONT_4_REG" class="sref">DA9052_LED_CONT_4_REG./a>: L117" class="line" namon>L117">6117./a>        case6.a href="+code=DA9052_LED_CONT_5_REG" class="sref">DA9052_LED_CONT_5_REG./a>: L118" class="line" namon>L118">6118./a>        case6.a href="+code=DA9052_ADC_MAN_REG" class="sref">DA9052_ADC_MAN_REG./a>: L119" class="line" namon>L119">6119./a>        case6.a href="+code=DA9052_ADC_CONT_REG" class="sref">DA9052_ADC_CONT_REG./a>: L120" class="line" namon>L120">6120./a>        case6.a href="+code=DA9052_ADC_RES_L_REG" class="sref">DA9052_ADC_RES_L_REG./a>: L121" class="line" namon>L121">6121./a>        case6.a href="+code=DA9052_ADC_RES_H_REG" class="sref">DA9052_ADC_RES_H_REG./a>: L122" class="line" namon>L122">6122./a>        case6.a href="+code=DA9052_VDD_RES_REG" class="sref">DA9052_VDD_RES_REG./a>: L123" class="line" namon>L123">6123./a>        case6.a href="+code=DA9052_VDD_MON_REG" class="sref">DA9052_VDD_MON_REG./a>: L124" class="line" namon>L124">6124./a>        case6.a href="+code=DA9052_ICHG_AV_REG" class="sref">DA9052_ICHG_AV_REG./a>: L125" class="line" namon>L125">6125./a>        case6.a href="+code=DA9052_ICHG_THD_REG" class="sref">DA9052_ICHG_THD_REG./a>: L126" class="line" namon>L126">6126./a>        case6.a href="+code=DA9052_ICHG_END_REG" class="sref">DA9052_ICHG_END_REG./a>: L127" class="line" namon>L127">6127./a>        case6.a href="+code=DA9052_TBAT_RES_REG" class="sref">DA9052_TBAT_RES_REG./a>: L128" class="line" namon>L128">6128./a>        case6.a href="+code=DA9052_TBAT_HIGHP_REG" class="sref">DA9052_TBAT_HIGHP_REG./a>: L129" class="line" namon>L129">6129./a>        case6.a href="+code=DA9052_TBAT_HIGHN_REG" class="sref">DA9052_TBAT_HIGHN_REG./a>: L130" class="line" namon>L130">6130./a>        case6.a href="+code=DA9052_TBAT_LOW_REG" class="sref">DA9052_TBAT_LOW_REG./a>: L131" class="line" namon>L131">6131./a>        case6.a href="+code=DA9052_T_OFFSET_REG" class="sref">DA9052_T_OFFSET_REG./a>: L132" class="line" namon>L132">6132./a>        case6.a href="+code=DA9052_ADCIN4_RES_REG" class="sref">DA9052_ADCIN4_RES_REG./a>: L133" class="line" namon>L133">6133./a>        case6.a href="+code=DA9052_AUTO4_HIGH_REG" class="sref">DA9052_AUTO4_HIGH_REG./a>: L134" class="line" namon>L134">6134./a>        case6.a href="+code=DA9052_AUTO4_LOW_REG" class="sref">DA9052_AUTO4_LOW_REG./a>: L135" class="line" namon>L135">6135./a>        case6.a href="+code=DA9052_ADCIN5_RES_REG" class="sref">DA9052_ADCIN5_RES_REG./a>: L136" class="line" namon>L136">6136./a>        case6.a href="+code=DA9052_AUTO5_HIGH_REG" class="sref">DA9052_AUTO5_HIGH_REG./a>: L137" class="line" namon>L137">6137./a>        case6.a href="+code=DA9052_AUTO5_LOW_REG" class="sref">DA9052_AUTO5_LOW_REG./a>: L138" class="line" namon>L138">6138./a>        case6.a href="+code=DA9052_ADCIN6_RES_REG" class="sref">DA9052_ADCIN6_RES_REG./a>: L139" class="line" namon>L139">6139./a>        case6.a href="+code=DA9052_AUTO6_HIGH_REG" class="sref">DA9052_AUTO6_HIGH_REG./a>: L140" class="line" namon>L140">6140./a>        case6.a href="+code=DA9052_AUTO6_LOW_REG" class="sref">DA9052_AUTO6_LOW_REG./a>: L141" class="line" namon>L141">6141./a>        case6.a href="+code=DA9052_TJUNC_RES_REG" class="sref">DA9052_TJUNC_RES_REG./a>: L142" class="line" namon>L142">6142./a>        case6.a href="+code=DA9052_TSI_CONT_A_REG" class="sref">DA9052_TSI_CONT_A_REG./a>: L143" class="line" namon>L143">6143./a>        case6.a href="+code=DA9052_TSI_CONT_B_REG" class="sref">DA9052_TSI_CONT_B_REG./a>: L144" class="line" namon>L144">6144./a>        case6.a href="+code=DA9052_TSI_X_MSB_REG" class="sref">DA9052_TSI_X_MSB_REG./a>: L145" class="line" namon>L145">6145./a>        case6.a href="+code=DA9052_TSI_Y_MSB_REG" class="sref">DA9052_TSI_Y_MSB_REG./a>: L146" class="line" namon>L146">6146./a>        case6.a href="+code=DA9052_TSI_LSB_REG" class="sref">DA9052_TSI_LSB_REG./a>: L147" class="line" namon>L147">6147./a>        case6.a href="+code=DA9052_TSI_Z_MSB_REG" class="sref">DA9052_TSI_Z_MSB_REG./a>: L148" class="line" namon>L148">6148./a>        case6.a href="+code=DA9052_COUNT_S_REG" class="sref">DA9052_COUNT_S_REG./a>: L149" class="line" namon>L149">6149./a>        case6.a href="+code=DA9052_COUNT_MI_REG" class="sref">DA9052_COUNT_MI_REG./a>: L150" class="line" namon>L150">6150./a>        case6.a href="+code=DA9052_COUNT_H_REG" class="sref">DA9052_COUNT_H_REG./a>: L151" class="line" namon>L151">6151./a>        case6.a href="+code=DA9052_COUNT_D_REG" class="sref">DA9052_COUNT_D_REG./a>: L152" class="line" namon>L152">6152./a>        case6.a href="+code=DA9052_COUNT_MO_REG" class="sref">DA9052_COUNT_MO_REG./a>: L153" class="line" namon>L153">6153./a>        case6.a href="+code=DA9052_COUNT_Y_REG" class="sref">DA9052_COUNT_Y_REG./a>: L154" class="line" namon>L154">6154./a>        case6.a href="+code=DA9052_ALARM_MI_REG" class="sref">DA9052_ALARM_MI_REG./a>: L155" class="line" namon>L155">6155./a>        case6.a href="+code=DA9052_ALARM_H_REG" class="sref">DA9052_ALARM_H_REG./a>: L156" class="line" namon>L156">6156./a>        case6.a href="+code=DA9052_ALARM_D_REG" class="sref">DA9052_ALARM_D_REG./a>: L157" class="line" namon>L157">6157./a>        case6.a href="+code=DA9052_ALARM_MO_REG" class="sref">DA9052_ALARM_MO_REG./a>: L158" class="line" namon>L158">6158./a>        case6.a href="+code=DA9052_ALARM_Y_REG" class="sref">DA9052_ALARM_Y_REG./a>: L159" class="line" namon>L159">6159./a>        case6.a href="+code=DA9052_SECOND_A_REG" class="sref">DA9052_SECOND_A_REG./a>: L160" class="line" namon>L160">6160./a>        case6.a href="+code=DA9052_SECOND_B_REG" class="sref">DA9052_SECOND_B_REG./a>: L161" class="line" namon>L161">6161./a>        case6.a href="+code=DA9052_SECOND_C_REG" class="sref">DA9052_SECOND_C_REG./a>: L162" class="line" namon>L162">6162./a>        case6.a href="+code=DA9052_SECOND_D_REG" class="sref">DA9052_SECOND_D_REG./a>: L163" class="line" namon>L163">6163./a>        case6.a href="+code=DA9052_PAGE1_CON_REG" class="sref">DA9052_PAGE1_CON_REG./a>: L164" class="line" namon>L164">6164./a>                return .a href="+code=true" class="sref">true./a>; L165" class="line" namon>L165">6165./a>        default: L166" class="line" namon>L166">6166./a>                return .a href="+code=false" class="sref">false./a>; L167" class="line" namon>L167">6167./a>        } L168" class="line" namon>L168">6168./a>} L169" class="line" namon>L169">6169./a> L170" class="line" namon>L170">6170./a>static6.a href="+code=bool" class="sref">bool./a> .a href="+code=da9052_reg_writeable" class="sref">da9052_reg_writeable./a>(struct .a href="+code=device" class="sref">device./a> *.a href="+code=dev" class="sref">dev./a>, unsigned int .a href="+code=reg" class="sref">reg./a>) L171" class="line" namon>L171">6171./a>{ L172" class="line" namon>L172">6172./a>        switch (.a href="+code=reg" class="sref">reg./a>) { L173" class="line" namon>L173">6173./a>        case6.a href="+code=DA9052_PAGE0_CON_REG" class="sref">DA9052_PAGE0_CON_REG./a>: L174" class="line" namon>L174">6174./a>        case6.a href="+code=DA9052_EVENT_A_REG" class="sref">DA9052_EVENT_A_REG./a>: L175" class="line" namon>L175">6175./a>        case6.a href="+code=DA9052_EVENT_B_REG" class="sref">DA9052_EVENT_B_REG./a>: L176" class="line" namon>L176">6176./a>        case6.a href="+code=DA9052_EVENT_C_REG" class="sref">DA9052_EVENT_C_REG./a>: L177" class="line" namon>L177">6177./a>        case6.a href="+code=DA9052_EVENT_D_REG" class="sref">DA9052_EVENT_D_REG./a>: L178" class="line" namon>L178">6178./a>        case6.a href="+code=DA9052_IRQ_MASK_A_REG" class="sref">DA9052_IRQ_MASK_A_REG./a>: L179" class="line" namon>L179">6179./a>        case6.a href="+code=DA9052_IRQ_MASK_B_REG" class="sref">DA9052_IRQ_MASK_B_REG./a>: L180" class="line" namon>L180">6180./a>        case6.a href="+code=DA9052_IRQ_MASK_C_REG" class="sref">DA9052_IRQ_MASK_C_REG./a>: L181" class="line" namon>L181">6181./a>        case6.a href="+code=DA9052_IRQ_MASK_D_REG" class="sref">DA9052_IRQ_MASK_D_REG./a>: L182" class="line" namon>L182">6182./a>        case6.a href="+code=DA9052_CONTROL_A_REG" class="sref">DA9052_CONTROL_A_REG./a>: L183" class="line" namon>L183">6183./a>        case6.a href="+code=DA9052_CONTROL_B_REG" class="sref">DA9052_CONTROL_B_REG./a>: L184" class="line" namon>L184">6184./a>        case6.a href="+code=DA9052_CONTROL_C_REG" class="sref">DA9052_CONTROL_C_REG./a>: L185" class="line" namon>L185">6185./a>        case6.a href="+code=DA9052_CONTROL_D_REG" class="sref">DA9052_CONTROL_D_REG./a>: L186" class="line" namon>L186">6186./a>        case6.a href="+code=DA9052_PDDIS_REG" class="sref">DA9052_PDDIS_REG./a>: L187" class="line" namon>L187">6187./a>        case6.a href="+code=DA9052_RESET_REG" class="sref">DA9052_RESET_REG./a>: L188" class="line" namon>L188">6188./a>        case6.a href="+code=DA9052_GPIO_0_1_REG" class="sref">DA9052_GPIO_0_1_REG./a>: L189" class="line" namon>L189">6189./a>        case6.a href="+code=DA9052_GPIO_2_3_REG" class="sref">DA9052_GPIO_2_3_REG./a>: L190" class="line" namon>L190">6190./a>        case6.a href="+code=DA9052_GPIO_4_5_REG" class="sref">DA9052_GPIO_4_5_REG./a>: L191" class="line" namon>L191">6191./a>        case6.a href="+code=DA9052_GPIO_6_7_REG" class="sref">DA9052_GPIO_6_7_REG./a>: L192" class="line" namon>L192">6192./a>        case6.a href="+code=DA9052_GPIO_14_15_REG" class="sref">DA9052_GPIO_14_15_REG./a>: L193" class="line" namon>L193">6193./a>        case6.a href="+code=DA9052_ID_0_1_REG" class="sref">DA9052_ID_0_1_REG./a>: L194" class="line" namon>L194">6194./a>        case6.a href="+code=DA9052_ID_2_3_REG" class="sref">DA9052_ID_2_3_REG./a>: L195" class="line" namon>L195">6195./a>        case6.a href="+code=DA9052_ID_4_5_REG" class="sref">DA9052_ID_4_5_REG./a>: L196" class="line" namon>L196">6196./a>        case6.a href="+code=DA9052_ID_6_7_REG" class="sref">DA9052_ID_6_7_REG./a>: L197" class="line" namon>L197">6197./a>        case6.a href="+code=DA9052_ID_8_9_REG" class="sref">DA9052_ID_8_9_REG./a>: L198" class="line" namon>L198">6198./a>        case6.a href="+code=DA9052_ID_10_11_REG" class="sref">DA9052_ID_10_11_REG./a>: L199" class="line" namon>L199">6199./a>        case6.a href="+code=DA9052_ID_12_13_REG" class="sref">DA9052_ID_12_13_REG./a>: L200" class="line" namon>L200">6200./a>        case6.a href="+code=DA9052_ID_14_15_REG" class="sref">DA9052_ID_14_15_REG./a>: L201" class="line" namon>L201">6201./a>        case6.a href="+code=DA9052_ID_16_17_REG" class="sref">DA9052_ID_16_17_REG./a>: L202" class="line" namon>L202">6202./a>        case6.a href="+code=DA9052_ID_18_19_REG" class="sref">DA9052_ID_18_19_REG./a>: L203" class="line" namon>L203">6203./a>        case6.a href="+code=DA9052_ID_20_21_REG" class="sref">DA9052_ID_20_21_REG./a>: L204" class="line" namon>L204">6204./a>        case6.a href="+code=DA9052_SEQ_STATUS_REG" class="sref">DA9052_SEQ_STATUS_REG./a>: L205" class="line" namon>L205">6205./a>        case6.a href="+code=DA9052_SEQ_A_REG" class="sref">DA9052_SEQ_A_REG./a>: L206" class="line" namon>L206">6206./a>        case6.a href="+code=DA9052_SEQ_B_REG" class="sref">DA9052_SEQ_B_REG./a>: L207" class="line" namon>L207">6207./a>        case6.a href="+code=DA9052_SEQ_TIMER_REG" class="sref">DA9052_SEQ_TIMER_REG./a>: L208" class="line" namon>L208">6208./a>        case6.a href="+code=DA9052_BUCKA_REG" class="sref">DA9052_BUCKA_REG./a>: L209" class="line" namon>L209">6209./a>        case6.a href="+code=DA9052_BUCKB_REG" class="sref">DA9052_BUCKB_REG./a>: L210" class="line" namon>L210">6210./a>        case6.a href="+code=DA9052_BUCKCORE_REG" class="sref">DA9052_BUCKCORE_REG./a>: L211" class="line" namon>L211">6211./a>        case6.a href="+code=DA9052_BUCKPRO_REG" class="sref">DA9052_BUCKPRO_REG./a>: L212" class="line" namon>L212">6212./a>        case6.a href="+code=DA9052_BUCKMEM_REG" class="sref">DA9052_BUCKMEM_REG./a>: L213" class="line" namon>L213">6213./a>        case6.a href="+code=DA9052_BUCKPERI_REG" class="sref">DA9052_BUCKPERI_REG./a>: L214" class="line" namon>L214">6214./a>        case6.a href="+code=DA9052_LDO1_REG" class="sref">DA9052_LDO1_REG./a>: L215" class="line" namon>L215">6215./a>        case6.a href="+code=DA9052_LDO2_REG" class="sref">DA9052_LDO2_REG./a>: L216" class="line" namon>L216">6216./a>        case6.a href="+code=DA9052_LDO3_REG" class="sref">DA9052_LDO3_REG./a>: L217" class="line" namon>L217">6217./a>        case6.a href="+code=DA9052_LDO4_REG" class="sref">DA9052_LDO4_REG./a>: L218" class="line" namon>L218">6218./a>        case6.a href="+code=DA9052_LDO5_REG" class="sref">DA9052_LDO5_REG./a>: L219" class="line" namon>L219">6219./a>        case6.a href="+code=DA9052_LDO6_REG" class="sref">DA9052_LDO6_REG./a>: L220" class="line" namon>L220">6220./a>        case6.a href="+code=DA9052_LDO7_REG" class="sref">DA9052_LDO7_REG./a>: L221" class="line" namon>L221">6221./a>        case6.a href="+code=DA9052_LDO8_REG" class="sref">DA9052_LDO8_REG./a>: L222" class="line" namon>L222">6222./a>        case6.a href="+code=DA9052_LDO9_REG" class="sref">DA9052_LDO9_REG./a>: L223" class="line" namon>L223">6223./a>        case6.a href="+code=DA9052_LDO10_REG" class="sref">DA9052_LDO10_REG./a>: L224" class="line" namon>L224">6224./a>        case6.a href="+code=DA9052_SUPPLY_REG" class="sref">DA9052_SUPPLY_REG./a>: L225" class="line" namon>L225">6225./a>        case6.a href="+code=DA9052_PULLDOWN_REG" class="sref">DA9052_PULLDOWN_REG./a>: L226" class="line" namon>L226">6226./a>        case6.a href="+code=DA9052_CHGBUCK_REG" class="sref">DA9052_CHGBUCK_REG./a>: L227" class="line" namon>L227">6227./a>        case6.a href="+code=DA9052_WAITCONT_REG" class="sref">DA9052_WAITCONT_REG./a>: L228" class="line" namon>L228">6228./a>        case6.a href="+code=DA9052_ISET_REG" class="sref">DA9052_ISET_REG./a>: L229" class="line" namon>L229">6229./a>        case6.a href="+code=DA9052_BATCHG_REG" class="sref">DA9052_BATCHG_REG./a>: L230" class="line" namon>L230">6230./a>        case6.a href="+code=DA9052_CHG_CONT_REG" class="sref">DA9052_CHG_CONT_REG./a>: L231" class="line" namon>L231">6231./a>        case6.a href="+code=DA9052_INPUT_CONT_REG" class="sref">DA9052_INPUT_CONT_REG./a>: L232" class="line" namon>L232">6232./a>        case6.a href="+code=DA9052_BBAT_CONT_REG" class="sref">DA9052_BBAT_CONT_REG./a>: L233" class="line" namon>L233">6233./a>        case6.a href="+code=DA9052_BOOST_REG" class="sref">DA9052_BOOST_REG./a>: L234" class="line" namon>L234">6234./a>        case6.a href="+code=DA9052_LED_CONT_REG" class="sref">DA9052_LED_CONT_REG./a>: L235" class="line" namon>L235">6235./a>        case6.a href="+code=DA9052_LEDMIN123_REG" class="sref">DA9052_LEDMIN123_REG./a>: L236" class="line" namon>L236">6236./a>        case6.a href="+code=DA9052_LED1_CONF_REG" class="sref">DA9052_LED1_CONF_REG./a>: L237" class="line" namon>L237">6237./a>        case6.a href="+code=DA9052_LED2_CONF_REG" class="sref">DA9052_LED2_CONF_REG./a>: L238" class="line" namon>L238">6238./a>        case6.a href="+code=DA9052_LED3_CONF_REG" class="sref">DA9052_LED3_CONF_REG./a>: L239" class="line" namon>L239">6239./a>        case6.a href="+code=DA9052_LED1CONT_REG" class="sref">DA9052_LED1CONT_REG./a>: L240" class="line" namon>L240">6240./a>        case6.a href="+code=DA9052_LED2CONT_REG" class="sref">DA9052_LED2CONT_REG./a>: L241" class="line" namon>L241">6241./a>        case6.a href="+code=DA9052_LED3CONT_REG" class="sref">DA9052_LED3CONT_REG./a>: L242" class="line" namon>L242">6242./a>        case6.a href="+code=DA9052_LED_CONT_4_REG" class="sref">DA9052_LED_CONT_4_REG./a>: L243" class="line" namon>L243">6243./a>        case6.a href="+code=DA9052_LED_CONT_5_REG" class="sref">DA9052_LED_CONT_5_REG./a>: L244" class="line" namon>L244">6244./a>        case6.a href="+code=DA9052_ADC_MAN_REG" class="sref">DA9052_ADC_MAN_REG./a>: L245" class="line" namon>L245">6245./a>        case6.a href="+code=DA9052_ADC_CONT_REG" class="sref">DA9052_ADC_CONT_REG./a>: L246" class="line" namon>L246">6246./a>        case6.a href="+code=DA9052_ADC_RES_L_REG" class="sref">DA9052_ADC_RES_L_REG./a>: L247" class="line" namon>L247">6247./a>        case6.a href="+code=DA9052_ADC_RES_H_REG" class="sref">DA9052_ADC_RES_H_REG./a>: L248" class="line" namon>L248">6248./a>        case6.a href="+code=DA9052_VDD_RES_REG" class="sref">DA9052_VDD_RES_REG./a>: L249" class="line" namon>L249">6249./a>        case6.a href="+code=DA9052_VDD_MON_REG" class="sref">DA9052_VDD_MON_REG./a>: L250" class="line" namon>L250">6250./a>        case6.a href="+code=DA9052_ICHG_THD_REG" class="sref">DA9052_ICHG_THD_REG./a>: L251" class="line" namon>L251">6251./a>        case6.a href="+code=DA9052_ICHG_END_REG" class="sref">DA9052_ICHG_END_REG./a>: L252" class="line" namon>L252">6252./a>        case6.a href="+code=DA9052_TBAT_HIGHP_REG" class="sref">DA9052_TBAT_HIGHP_REG./a>: L253" class="line" namon>L253">6253./a>        case6.a href="+code=DA9052_TBAT_HIGHN_REG" class="sref">DA9052_TBAT_HIGHN_REG./a>: L254" class="line" namon>L254">6254./a>        case6.a href="+code=DA9052_TBAT_LOW_REG" class="sref">DA9052_TBAT_LOW_REG./a>: L255" class="line" namon>L255">6255./a>        case6.a href="+code=DA9052_T_OFFSET_REG" class="sref">DA9052_T_OFFSET_REG./a>: L256" class="line" namon>L256">6256./a>        case6.a href="+code=DA9052_AUTO4_HIGH_REG" class="sref">DA9052_AUTO4_HIGH_REG./a>: L257" class="line" namon>L257">6257./a>        case6.a href="+code=DA9052_AUTO4_LOW_REG" class="sref">DA9052_AUTO4_LOW_REG./a>: L258" class="line" namon>L258">6258./a>        case6.a href="+code=DA9052_AUTO5_HIGH_REG" class="sref">DA9052_AUTO5_HIGH_REG./a>: L259" class="line" namon>L259">6259./a>        case6.a href="+code=DA9052_AUTO5_LOW_REG" class="sref">DA9052_AUTO5_LOW_REG./a>: L260" class="line" namon>L260">6260./a>        case6.a href="+code=DA9052_AUTO6_HIGH_REG" class="sref">DA9052_AUTO6_HIGH_REG./a>: L261" class="line" namon>L261">6261./a>        case6.a href="+code=DA9052_AUTO6_LOW_REG" class="sref">DA9052_AUTO6_LOW_REG./a>: L262" class="line" namon>L262">6262./a>        case6.a href="+code=DA9052_TSI_CONT_A_REG" class="sref">DA9052_TSI_CONT_A_REG./a>: L263" class="line" namon>L263">6263./a>        case6.a href="+code=DA9052_TSI_CONT_B_REG" class="sref">DA9052_TSI_CONT_B_REG./a>: L264" class="line" namon>L264">6264./a>        case6.a href="+code=DA9052_COUNT_S_REG" class="sref">DA9052_COUNT_S_REG./a>: L265" class="line" namon>L265">6265./a>        case6.a href="+code=DA9052_COUNT_MI_REG" class="sref">DA9052_COUNT_MI_REG./a>: L266" class="line" namon>L266">6266./a>        case6.a href="+code=DA9052_COUNT_H_REG" class="sref">DA9052_COUNT_H_REG./a>: L267" class="line" namon>L267">6267./a>        case6.a href="+code=DA9052_COUNT_D_REG" class="sref">DA9052_COUNT_D_REG./a>: L268" class="line" namon>L268">6268./a>        case6.a href="+code=DA9052_COUNT_MO_REG" class="sref">DA9052_COUNT_MO_REG./a>: L269" class="line" namon>L269">6269./a>        case6.a href="+code=DA9052_COUNT_Y_REG" class="sref">DA9052_COUNT_Y_REG./a>: L270" class="line" namon>L270">6270./a>        case6.a href="+code=DA9052_ALARM_MI_REG" class="sref">DA9052_ALARM_MI_REG./a>: L271" class="line" namon>L271">6271./a>        case6.a href="+code=DA9052_ALARM_H_REG" class="sref">DA9052_ALARM_H_REG./a>: L272" class="line" namon>L272">6272./a>        case6.a href="+code=DA9052_ALARM_D_REG" class="sref">DA9052_ALARM_D_REG./a>: L273" class="line" namon>L273">6273./a>        case6.a href="+code=DA9052_ALARM_MO_REG" class="sref">DA9052_ALARM_MO_REG./a>: L274" class="line" namon>L274">6274./a>        case6.a href="+code=DA9052_ALARM_Y_REG" class="sref">DA9052_ALARM_Y_REG./a>: L275" class="line" namon>L275">6275./a>        case6.a href="+code=DA9052_PAGE1_CON_REG" class="sref">DA9052_PAGE1_CON_REG./a>: L276" class="line" namon>L276">6276./a>                return .a href="+code=true" class="sref">true./a>; L277" class="line" namon>L277">6277./a>        default: L278" class="line" namon>L278">6278./a>                return .a href="+code=false" class="sref">false./a>; L279" class="line" namon>L279">6279./a>        } L280" class="line" namon>L280">6280./a>} L281" class="line" namon>L281">6281./a> L282" class="line" namon>L282">6282./a>static6.a href="+code=bool" class="sref">bool./a> .a href="+code=da9052_reg_volatile" class="sref">da9052_reg_volatile./a>(struct .a href="+code=device" class="sref">device./a> *.a href="+code=dev" class="sref">dev./a>, unsigned int .a href="+code=reg" class="sref">reg./a>) L283" class="line" namon>L283">6283./a>{ L284" class="line" namon>L284">6284./a>        switch (.a href="+code=reg" class="sref">reg./a>) { L285" class="line" namon>L285">6285./a>        case6.a href="+code=DA9052_STATUS_A_REG" class="sref">DA9052_STATUS_A_REG./a>: L286" class="line" namon>L286">6286./a>        case6.a href="+code=DA9052_STATUS_B_REG" class="sref">DA9052_STATUS_B_REG./a>: L287" class="line" namon>L287">6287./a>        case6.a href="+code=DA9052_STATUS_C_REG" class="sref">DA9052_STATUS_C_REG./a>: L288" class="line" namon>L288">6288./a>        case6.a href="+code=DA9052_STATUS_D_REG" class="sref">DA9052_STATUS_D_REG./a>: L289" class="line" namon>L289">6289./a>        case6.a href="+code=DA9052_EVENT_A_REG" class="sref">DA9052_EVENT_A_REG./a>: L290" class="line" namon>L290">6290./a>        case6.a href="+code=DA9052_EVENT_B_REG" class="sref">DA9052_EVENT_B_REG./a>: L291" class="line" namon>L291">6291./a>        case6.a href="+code=DA9052_EVENT_C_REG" class="sref">DA9052_EVENT_C_REG./a>: L292" class="line" namon>L292">6292./a>        case6.a href="+code=DA9052_EVENT_D_REG" class="sref">DA9052_EVENT_D_REG./a>: L293" class="line" namon>L293">6293./a>        case6.a href="+code=DA9052_FAULTLOG_REG" class="sref">DA9052_FAULTLOG_REG./a>: L294" class="line" namon>L294">6294./a>        case6.a href="+code=DA9052_CHG_TIME_REG" class="sref">DA9052_CHG_TIME_REG./a>: L295" class="line" namon>L295">6295./a>        case6.a href="+code=DA9052_ADC_RES_L_REG" class="sref">DA9052_ADC_RES_L_REG./a>: L296" class="line" namon>L296">6296./a>        case6.a href="+code=DA9052_ADC_RES_H_REG" class="sref">DA9052_ADC_RES_H_REG./a>: L297" class="line" namon>L297">6297./a>        case6.a href="+code=DA9052_VDD_RES_REG" class="sref">DA9052_VDD_RES_REG./a>: L298" class="line" namon>L298">6298./a>        case6.a href="+code=DA9052_ICHG_AV_REG" class="sref">DA9052_ICHG_AV_REG./a>: L299" class="line" namon>L299">6299./a>        case6.a href="+code=DA9052_TBAT_RES_REG" class="sref">DA9052_TBAT_RES_REG./a>: L300" class="line" namon>L300">6300./a>        case6.a href="+code=DA9052_ADCIN4_RES_REG" class="sref">DA9052_ADCIN4_RES_REG./a>: L301" class="line" namon>L301">6301./a>        case6.a href="+code=DA9052_ADCIN5_RES_REG" class="sref">DA9052_ADCIN5_RES_REG./a>: L302" class="line" namon>L302">6302./a>        case6.a href="+code=DA9052_ADCIN6_RES_REG" class="sref">DA9052_ADCIN6_RES_REG./a>: L303" class="line" namon>L303">6303./a>        case6.a href="+code=DA9052_TJUNC_RES_REG" class="sref">DA9052_TJUNC_RES_REG./a>: L304" class="line" namon>L304">6304./a>        case6.a href="+code=DA9052_TSI_X_MSB_REG" class="sref">DA9052_TSI_X_MSB_REG./a>: L305" class="line" namon>L305">6305./a>        case6.a href="+code=DA9052_TSI_Y_MSB_REG" class="sref">DA9052_TSI_Y_MSB_REG./a>: L306" class="line" namon>L306">6306./a>        case6.a href="+code=DA9052_TSI_LSB_REG" class="sref">DA9052_TSI_LSB_REG./a>: L307" class="line" namon>L307">6307./a>        case6.a href="+code=DA9052_TSI_Z_MSB_REG" class="sref">DA9052_TSI_Z_MSB_REG./a>: L308" class="line" namon>L308">6308./a>        case6.a href="+code=DA9052_COUNT_S_REG" class="sref">DA9052_COUNT_S_REG./a>: L309" class="line" namon>L309">6309./a>        case6.a href="+code=DA9052_COUNT_MI_REG" class="sref">DA9052_COUNT_MI_REG./a>: L310" class="line" namon>L310">6310./a>        case6.a href="+code=DA9052_COUNT_H_REG" class="sref">DA9052_COUNT_H_REG./a>: L311" class="line" namon>L311">6311./a>        case6.a href="+code=DA9052_COUNT_D_REG" class="sref">DA9052_COUNT_D_REG./a>: L312" class="line" namon>L312">6312./a>        case6.a href="+code=DA9052_COUNT_MO_REG" class="sref">DA9052_COUNT_MO_REG./a>: L313" class="line" namon>L313">6313./a>        case6.a href="+code=DA9052_COUNT_Y_REG" class="sref">DA9052_COUNT_Y_REG./a>: L314" class="line" namon>L314">6314./a>        case6.a href="+code=DA9052_ALARM_MI_REG" class="sref">DA9052_ALARM_MI_REG./a>: L315" class="line" namon>L315">6315./a>                return .a href="+code=true" class="sref">true./a>; L316" class="line" namon>L316">6316./a>        default: L317" class="line" namon>L317">6317./a>                return .a href="+code=false" class="sref">false./a>; L318" class="line" namon>L318">6318./a>        } L319" class="line" namon>L319">6319./a>} L320" class="line" namon>L320">6320./a> L321" class="line" namon>L321">6321./a>/* L322" class="line" namon>L322">6322./a> * TBAT look-up table is computed from the R90 reg (8 bit register) L323" class="line" namon>L323">6323./a> * reading as below. The battery temperature is in milliCentigrade L324" class="line" namon>L324">6324./a> * TBAT = (1/(t1+1/298) -6273) * 1000 mC L325" class="line" namon>L325">6325./a> * where t1 = (1/B)* ln(( ADCval * 2.5)/(R25*ITBAT*255)) L326" class="line" namon>L326">6326./a> * Default values are R25 = 10e3, B = 3380, ITBAT = 50e-6 L327" class="line" namon>L327">6327./a> * Example: L328" class="line" namon>L328">6328./a> * R25=10E3, B=3380, ITBAT=50e-6, ADCVAL=62d calculates L329" class="line" namon>L329">6329./a> * TBAT = 20015 mili degrees Centrigrade L330" class="line" namon>L330">6330./a> * L331" class="line" namon>L331">6331./a>*/ L332" class="line" namon>L332">6332./a>static6const .a href="+code=int32_t" class="sref">int32_t./a> .a href="+code=tbat_lookup" class="sref">tbat_lookup./a>[255] = { L333" class="line" namon>L333">6333./a>        183258,6144221,6124334,6111336, 101826, 94397, 88343, 83257, L334" class="line" namon>L334">6334./a>        78889, 75071,671688,668656, 65914,663414,661120, 59001, L335" class="line" namon>L335">6335./a>        570366, 55204,653490, 51881,650364,648931,647574,646285, L336" class="line" namon>L336">6336./a>        45059, 43889, 42772, 41703, 40678,639694,638748,637838, L337" class="line" namon>L337">6337./a>        36961,636115,635297, 34507, 33743, 33002, 32284,631588, L338" class="line" namon>L338">6338./a>        30911,630254,629615,628994,628389, 27799, 27225,626664, L339" class="line" namon>L339">6339./a>        26117, 25584,625062, 24553, 24054,623567, 23091,622624, L340" class="line" namon>L340">6340./a>        22167, 21719, 21281,620851,620429, 20015,619610,619211, L341" class="line" namon>L341">6341./a>        18820, 18436, 18058,617688,617323,616965,616612,616266, L342" class="line" namon>L342">6342./a>        15925,615589,615259, 14933,614613,614298,613987,613681, L343" class="line" namon>L343">6343./a>        13379, 13082,612788,612499, 12214,611933,611655,611382, L344" class="line" namon>L344">6344./a>        11112,610845,610582,610322,610066, 9812,69562, 9315, L345" class="line" namon>L345">6345./a>        9071,68830, 8591,68356, 8123,67893,67665,67440, L346" class="line" namon>L346">6346./a>        7218,66998,66780, 6565,66352,66141,65933,65726, L347" class="line" namon>L347">6347./a>        5522,65320, 5120, 4922,64726, 4532,64340, 4149, L348" class="line" namon>L348">6348./a>        3961,63774,63589,63406, 3225,63045,62867, 2690, L349" class="line" namon>L349">6349./a>        2516, 2342, 2170, 2000, 1831,61664, 1498,61334, L350" class="line" namon>L350">6350./a>        1171,61009,6849, 690, 532,6376, 221,667, L351" class="line" namon>L351">6351./a>        -84,6-236, -386, -535,6-683,6-830, -975,6-1119, L352" class="line" namon>L352">6352./a>        -1263,6-1405,6-1546, -1686, -1825,6-1964,6-2101,6-2237, L353" class="line" namon>L353">6353./a>        -2372, -2506, -2639, -2771,6-2902, -3033,6-3162, -3291, L354" class="line" namon>L354">6354./a>        -3418, -3545,6-3671,6-3796, -3920, -4044,6-4166, -4288, L355" class="line" namon>L355">6355./a>        -4409, -4529, -4649, -4767, -4885,6-5002, -5119, -5235, L356" class="line" namon>L356">6356./a>        -5349, -5464,6-5577, -5690, -5802, -5913,6-6024,6-6134, L357" class="line" namon>L357">6357./a>        -6244,6-6352,6-6461,6-6568, -6675,6-6781,6-6887,6-6992, L358" class="line" namon>L358">6358./a>        -7096, -7200, -7303, -7406, -7508, -7609, -7710, -7810, L359" class="line" namon>L359">6359./a>        -7910, -8009,6-8108, -8206,6-8304,6-8401,6-8497,6-8593, L360" class="line" namon>L360">6360./a>        -8689,6-8784,6-8878, -8972, -9066, -9159, -9251,6-9343, L361" class="line" namon>L361">6361./a>        -9435,6-9526, -9617, -9707, -9796, -9886, -9975,6-10063, L362" class="line" namon>L362">6362./a>        -10151,6-10238,6-10325,6-10412,6-10839, -10923,6-11007,6-11090, L363" class="line" namon>L363">6363./a>        -11173,6-11256, -11338,6-11420,6-11501,6-11583,6-11663,6-11744, L364" class="line" namon>L364">6364./a>        -11823,6-11903,6-11982 L365" class="line" namon>L365">6365./a>}; L366" class="line" namon>L366">6366./a> L367" class="line" namon>L367">6367./a>static6const .a href="+code=u8" class="sref">u8./a> .a href="+code=chan_mux" class="sref">chan_mux./a>[.a href="+code=DA9052_ADC_VBBAT" class="sref">DA9052_ADC_VBBAT./a> + 1] = { L368" class="line" namon>L368">6368./a>        [.a href="+code=DA9052_ADC_VDDOUT" class="sref">DA9052_ADC_VDDOUT./a>]     =6.a href="+code=DA9052_ADC_MAN_MUXSEL_VDDOUT" class="sref">DA9052_ADC_MAN_MUXSEL_VDDOUT./a>, L369" class="line" namon>L369">6369./a>        [.a href="+code=DA9052_ADC_ICH" class="sref">DA9052_ADC_ICH./a>]        =6.a href="+code=DA9052_ADC_MAN_MUXSEL_ICH" class="sref">DA9052_ADC_MAN_MUXSEL_ICH./a>, L370" class="line" namon>L370">6370./a>        [.a href="+code=DA9052_ADC_TBAT" class="sref">DA9052_ADC_TBAT./a>]       =6.a href="+code=DA9052_ADC_MAN_MUXSEL_TBAT" class="sref">DA9052_ADC_MAN_MUXSEL_TBAT./a>, L371" class="line" namon>L371">6371./a>        [.a href="+code=DA9052_ADC_VBAT" class="sref">DA9052_ADC_VBAT./a>]       =6.a href="+code=DA9052_ADC_MAN_MUXSEL_VBAT" class="sref">DA9052_ADC_MAN_MUXSEL_VBAT./a>, L372" class="line" namon>L372">6372./a>        [.a href="+code=DA9052_ADC_IN4" class="sref">DA9052_ADC_IN4./a>]        =6.a href="+code=DA9052_ADC_MAN_MUXSEL_AD4" class="sref">DA9052_ADC_MAN_MUXSEL_AD4./a>, L373" class="line" namon>L373">6373./a>        [.a href="+code=DA9052_ADC_IN5" class="sref">DA9052_ADC_IN5./a>]        =6.a href="+code=DA9052_ADC_MAN_MUXSEL_AD5" class="sref">DA9052_ADC_MAN_MUXSEL_AD5./a>, L374" class="line" namon>L374">6374./a>        [.a href="+code=DA9052_ADC_IN6" class="sref">DA9052_ADC_IN6./a>]        =6.a href="+code=DA9052_ADC_MAN_MUXSEL_AD6" class="sref">DA9052_ADC_MAN_MUXSEL_AD6./a>, L375" class="line" namon>L375">6375./a>        [.a href="+code=DA9052_ADC_VBBAT" class="sref">DA9052_ADC_VBBAT./a>]      =6.a href="+code=DA9052_ADC_MAN_MUXSEL_VBBAT" class="sref">DA9052_ADC_MAN_MUXSEL_VBBAT./a> L376" class="line" namon>L376">6376./a>}; L377" class="line" namon>L377">6377./a> L378" class="line" namon>L378">6378./a>int .a href="+code=da9052_adc_manual_read" class="sref">da9052_adc_manual_read./a>(struct .a href="+code=da9052" class="sref">da9052./a> *.a href="+code=da9052" class="sref">da9052./a>, unsigned char .a href="+code=channel" class="sref">channel./a>) L379" class="line" namon>L379">6379./a>{ L380" class="line" namon>L380">6380./a>        int .a href="+code=ret" class="sref">ret./a>; L381" class="line" namon>L381">6381./a>        unsigned short .a href="+code=calc_data" class="sref">calc_data./a>; L382" class="line" namon>L382">6382./a>        unsigned short .a href="+code=data" class="sref">data./a>; L383" class="line" namon>L383">6383./a>        unsigned char .a href="+code=mux_sel" class="sref">mux_sel./a>; L384" class="line" namon>L384">6384./a> L385" class="line" namon>L385">6385./a>        if (.a href="+code=channel" class="sref">channel./a> >6.a href="+code=DA9052_ADC_VBBAT" class="sref">DA9052_ADC_VBBAT./a>) L386" class="line" namon>L386">6386./a>                return -.a href="+code=EINVAL" class="sref">EINVAL./a>; L387" class="line" namon>L387">6387./a> L388" class="line" namon>L388">6388./a>        .a href="+code=mutex_lock" class="sref">mutex_lock./a>(&.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=auxadc_lock" class="sref">auxadc_lock./a>); L389" class="line" namon>L389">6389./a> L390" class="line" namon>L390">6390./a>        /* Channel gets activated on enabling the Conversion bit */ L391" class="line" namon>L391">6391./a>        .a href="+code=mux_sel" class="sref">mux_sel./a> =6.a href="+code=chan_mux" class="sref">chan_mux./a>[.a href="+code=channel" class="sref">channel./a>] |6.a href="+code=DA9052_ADC_MAN_MAN_CONV" class="sref">DA9052_ADC_MAN_MAN_CONV./a>; L392" class="line" namon>L392">6392./a> L393" class="line" namon>L393">6393./a>        .a href="+code=ret" class="sref">ret./a> =6.a href="+code=da9052_reg_write" class="sref">da9052_reg_write./a>(.a href="+code=da9052" class="sref">da9052./a>, .a href="+code=DA9052_ADC_MAN_REG" class="sref">DA9052_ADC_MAN_REG./a>, .a href="+code=mux_sel" class="sref">mux_sel./a>); L394" class="line" namon>L394">6394./a>        if (.a href="+code=ret" class="sref">ret./a> <60) L395" class="line" namon>L395">6395./a>                goto .a href="+code=err" class="sref">err./a>; L396" class="line" namon>L396">6396./a> L397" class="line" namon>L397">6397./a>        /* Wait for an interrupt */ L398" class="line" namon>L398">6398./a>        if (!.a href="+code=wait_for_completion_timeout" class="sref">wait_for_completion_timeout./a>(&.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=done" class="sref">done./a>, L399" class="line" namon>L399">6399./a>                                         .a href="+code=msecs_to_jiffies" class="sref">msecs_to_jiffies./a>(500))) { L400" class="line" namon>L400">6400./a>                .a href="+code=dev_err" class="sref">dev_err./a>(.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=dev" class="sref">dev./a>, L401" class="line" namon>L401">6401./a>                        .span class="string">"timeout waiting for ADC6conversion interrupt\n"); L402" class="line" namon>L402">6402./a>                .a href="+code=ret" class="sref">ret./a> =6-.a href="+code=ETIMEDOUT" class="sref">ETIMEDOUT./a>; L403" class="line" namon>L403">6403./a>                goto .a href="+code=err" class="sref">err./a>; L404" class="line" namon>L404">6404./a>        } L405" class="line" namon>L405">6405./a> L406" class="line" namon>L406">6406./a>        .a href="+code=ret" class="sref">ret./a> =6.a href="+code=da9052_reg_read" class="sref">da9052_reg_read./a>(.a href="+code=da9052" class="sref">da9052./a>, .a href="+code=DA9052_ADC_RES_H_REG" class="sref">DA9052_ADC_RES_H_REG./a>); L407" class="line" namon>L407">6407./a>        if (.a href="+code=ret" class="sref">ret./a> <60) L408" class="line" namon>L408">6408./a>                goto .a href="+code=err" class="sref">err./a>; L409" class="line" namon>L409">6409./a> L410" class="line" namon>L410">6410./a>        .a href="+code=calc_data" class="sref">calc_data./a> = (unsigned short).a href="+code=ret" class="sref">ret./a>; L411" class="line" namon>L411">6411./a>        .a href="+code=data" class="sref">data./a> =6.a href="+code=calc_data" class="sref">calc_data./a> <<62; L412" class="line" namon>L412">6412./a> L413" class="line" namon>L413">6413./a>        .a href="+code=ret" class="sref">ret./a> =6.a href="+code=da9052_reg_read" class="sref">da9052_reg_read./a>(.a href="+code=da9052" class="sref">da9052./a>, .a href="+code=DA9052_ADC_RES_L_REG" class="sref">DA9052_ADC_RES_L_REG./a>); L414" class="line" namon>L414">6414./a>        if (.a href="+code=ret" class="sref">ret./a> <60) L415" class="line" namon>L415">6415./a>                goto .a href="+code=err" class="sref">err./a>; L416" class="line" namon>L416">6416./a> L417" class="line" namon>L417">6417./a>        .a href="+code=calc_data" class="sref">calc_data./a> = (unsigned short)(.a href="+code=ret" class="sref">ret./a> & .a href="+code=DA9052_ADC_RES_LSB" class="sref">DA9052_ADC_RES_LSB./a>); L418" class="line" namon>L418">6418./a>        .a href="+code=data" class="sref">data./a> |=6.a href="+code=calc_data" class="sref">calc_data./a>; L419" class="line" namon>L419">6419./a> L420" class="line" namon>L420">6420./a>        .a href="+code=ret" class="sref">ret./a> =6.a href="+code=data" class="sref">data./a>; L421" class="line" namon>L421">6421./a> L422" class="line" namon>L422">6422./a>err./a>: L423" class="line" namon>L423">6423./a>        .a href="+code=mutex_unlock" class="sref">mutex_unlock./a>(&.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=auxadc_lock" class="sref">auxadc_lock./a>); L424" class="line" namon>L424">6424./a>        return .a href="+code=ret" class="sref">ret./a>; L425" class="line" namon>L425">6425./a>} L426" class="line" namon>L426">6426./a>EXPORT_SYMBOL_GPL./a>(.a href="+code=da9052_adc_manual_read" class="sref">da9052_adc_manual_read./a>); L427" class="line" namon>L427">6427./a> L428" class="line" namon>L428">6428./a>static6.a href="+code=irqreturn_t" class="sref">irqreturn_t./a> .a href="+code=da9052_auxadc_irq" class="sref">da9052_auxadc_irq./a>(int .a href="+code=irq" class="sref">irq./a>, void *.a href="+code=irq_data" class="sref">irq_data./a>) L429" class="line" namon>L429">6429./a>{ L430" class="line" namon>L430">6430./a>        struct .a href="+code=da9052" class="sref">da9052./a> *.a href="+code=da9052" class="sref">da9052./a> =6.a href="+code=irq_data" class="sref">irq_data./a>; L431" class="line" namon>L431">6431./a> L432" class="line" namon>L432">6432./a>        .a href="+code=complete" class="sref">complete./a>(&.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=done" class="sref">done./a>); L433" class="line" namon>L433">6433./a> L434" class="line" namon>L434">6434./a>        return .a href="+code=IRQ_HANDLED" class="sref">IRQ_HANDLED./a>; L435" class="line" namon>L435">6435./a>} L436" class="line" namon>L436">6436./a> L437" class="line" namon>L437">6437./a>int .a href="+code=da9052_adc_read_temp" class="sref">da9052_adc_read_temp./a>(struct .a href="+code=da9052" class="sref">da9052./a> *.a href="+code=da9052" class="sref">da9052./a>) L438" class="line" namon>L438">6438./a>{ L439" class="line" namon>L439">6439./a>        int .a href="+code=tbat" class="sref">tbat./a>; L440" class="line" namon>L440">6440./a> L441" class="line" namon>L441">6441./a>        .a href="+code=tbat" class="sref">tbat./a> =6.a href="+code=da9052_reg_read" class="sref">da9052_reg_read./a>(.a href="+code=da9052" class="sref">da9052./a>, .a href="+code=DA9052_TBAT_RES_REG" class="sref">DA9052_TBAT_RES_REG./a>); L442" class="line" namon>L442">6442./a>        if (.a href="+code=tbat" class="sref">tbat./a> <=60) L443" class="line" namon>L443">6443./a>                return .a href="+code=tbat" class="sref">tbat./a>; L444" class="line" namon>L444">6444./a> L445" class="line" namon>L445">6445./a>        /* ARRAY_SIZE check is not needed since TBAT is a 8-bit register */ L446" class="line" namon>L446">6446./a>        return .a href="+code=tbat_lookup" class="sref">tbat_lookup./a>[.a href="+code=tbat" class="sref">tbat./a> - 1]; L447" class="line" namon>L447">6447./a>} L448" class="line" namon>L448">6448./a>EXPORT_SYMBOL_GPL./a>(.a href="+code=da9052_adc_read_temp" class="sref">da9052_adc_read_temp./a>); L449" class="line" namon>L449">6449./a> L450" class="line" namon>L450">6450./a>static6struct .a href="+code=resource" class="sref">resource./a> .a href="+code=da9052_rtc_resource" class="sref">da9052_rtc_resource./a> =6{ L451" class="line" namon>L451">6451./a>        ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"ALM", L452" class="line" namon>L452">6452./a>        ..a href="+code=start" class="sref">start./a> =6.a href="+code=DA9052_IRQ_ALARM" class="sref">DA9052_IRQ_ALARM./a>, L453" class="line" namon>L453">6453./a>        ..a href="+code=end" class="sref">end./a>   =6.a href="+code=DA9052_IRQ_ALARM" class="sref">DA9052_IRQ_ALARM./a>, L454" class="line" namon>L454">6454./a>        ..a href="+code=flags" class="sref">flags./a> =6.a href="+code=IORESOURCE_IRQ" class="sref">IORESOURCE_IRQ./a>, L455" class="line" namon>L455">6455./a>}; L456" class="line" namon>L456">6456./a> L457" class="line" namon>L457">6457./a>static6struct .a href="+code=resource" class="sref">resource./a> .a href="+code=da9052_onkey_resource" class="sref">da9052_onkey_resource./a> =6{ L458" class="line" namon>L458">6458./a>        ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"ONKEY", L459" class="line" namon>L459">6459./a>        ..a href="+code=start" class="sref">start./a> =6.a href="+code=DA9052_IRQ_NONKEY" class="sref">DA9052_IRQ_NONKEY./a>, L460" class="line" namon>L460">6460./a>        ..a href="+code=end" class="sref">end./a>   =6.a href="+code=DA9052_IRQ_NONKEY" class="sref">DA9052_IRQ_NONKEY./a>, L461" class="line" namon>L461">6461./a>        ..a href="+code=flags" class="sref">flags./a> =6.a href="+code=IORESOURCE_IRQ" class="sref">IORESOURCE_IRQ./a>, L462" class="line" namon>L462">6462./a>}; L463" class="line" namon>L463">6463./a> L464" class="line" namon>L464">6464./a>static6struct .a href="+code=resource" class="sref">resource./a> .a href="+code=da9052_bat_resources" class="sref">da9052_bat_resources./a>[] = { L465" class="line" namon>L465">6465./a>        { L466" class="line" namon>L466">6466./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"BATT TEMP", L467" class="line" namon>L467">6467./a>                ..a href="+code=start" class="sref">start./a> =6.a href="+code=DA9052_IRQ_TBAT" class="sref">DA9052_IRQ_TBAT./a>, L468" class="line" namon>L468">6468./a>                ..a href="+code=end" class="sref">end./a>   =6.a href="+code=DA9052_IRQ_TBAT" class="sref">DA9052_IRQ_TBAT./a>, L469" class="line" namon>L469">6469./a>                ..a href="+code=flags" class="sref">flags./a> =6.a href="+code=IORESOURCE_IRQ" class="sref">IORESOURCE_IRQ./a>, L470" class="line" namon>L470">6470./a>        }, L471" class="line" namon>L471">6471./a>        { L472" class="line" namon>L472">6472./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"DCIN DET", L473" class="line" namon>L473">6473./a>                ..a href="+code=start" class="sref">start./a> =6.a href="+code=DA9052_IRQ_DCIN" class="sref">DA9052_IRQ_DCIN./a>, L474" class="line" namon>L474">6474./a>                ..a href="+code=end" class="sref">end./a>   =6.a href="+code=DA9052_IRQ_DCIN" class="sref">DA9052_IRQ_DCIN./a>, L475" class="line" namon>L475">6475./a>                ..a href="+code=flags" class="sref">flags./a> =6.a href="+code=IORESOURCE_IRQ" class="sref">IORESOURCE_IRQ./a>, L476" class="line" namon>L476">6476./a>        }, L477" class="line" namon>L477">6477./a>        { L478" class="line" namon>L478">6478./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"DCIN REM", L479" class="line" namon>L479">6479./a>                ..a href="+code=start" class="sref">start./a> =6.a href="+code=DA9052_IRQ_DCINREM" class="sref">DA9052_IRQ_DCINREM./a>, L480" class="line" namon>L480">6480./a>                ..a href="+code=end" class="sref">end./a>   =6.a href="+code=DA9052_IRQ_DCINREM" class="sref">DA9052_IRQ_DCINREM./a>, L481" class="line" namon>L481">6481./a>                ..a href="+code=flags" class="sref">flags./a> =6.a href="+code=IORESOURCE_IRQ" class="sref">IORESOURCE_IRQ./a>, L482" class="line" namon>L482">6482./a>        }, L483" class="line" namon>L483">6483./a>        { L484" class="line" namon>L484">6484./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"VBUS DET", L485" class="line" namon>L485">6485./a>                ..a href="+code=start" class="sref">start./a> =6.a href="+code=DA9052_IRQ_VBUS" class="sref">DA9052_IRQ_VBUS./a>, L486" class="line" namon>L486">6486./a>                ..a href="+code=end" class="sref">end./a>   =6.a href="+code=DA9052_IRQ_VBUS" class="sref">DA9052_IRQ_VBUS./a>, L487" class="line" namon>L487">6487./a>                ..a href="+code=flags" class="sref">flags./a> =6.a href="+code=IORESOURCE_IRQ" class="sref">IORESOURCE_IRQ./a>, L488" class="line" namon>L488">6488./a>        }, L489" class="line" namon>L489">6489./a>        { L490" class="line" namon>L490">6490./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"VBUS REM", L491" class="line" namon>L491">6491./a>                ..a href="+code=start" class="sref">start./a> =6.a href="+code=DA9052_IRQ_VBUSREM" class="sref">DA9052_IRQ_VBUSREM./a>, L492" class="line" namon>L492">6492./a>                ..a href="+code=end" class="sref">end./a>   =6.a href="+code=DA9052_IRQ_VBUSREM" class="sref">DA9052_IRQ_VBUSREM./a>, L493" class="line" namon>L493">6493./a>                ..a href="+code=flags" class="sref">flags./a> =6.a href="+code=IORESOURCE_IRQ" class="sref">IORESOURCE_IRQ./a>, L494" class="line" namon>L494">6494./a>        }, L495" class="line" namon>L495">6495./a>        { L496" class="line" namon>L496">6496./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"CHG END", L497" class="line" namon>L497">6497./a>                ..a href="+code=start" class="sref">start./a> =6.a href="+code=DA9052_IRQ_CHGEND" class="sref">DA9052_IRQ_CHGEND./a>, L498" class="line" namon>L498">6498./a>                ..a href="+code=end" class="sref">end./a>   =6.a href="+code=DA9052_IRQ_CHGEND" class="sref">DA9052_IRQ_CHGEND./a>, L499" class="line" namon>L499">6499./a>                ..a href="+code=flags" class="sref">flags./a> =6.a href="+code=IORESOURCE_IRQ" class="sref">IORESOURCE_IRQ./a>, L500" class="line" namon>L500">6500./a>        }, L501" class="line" namon>L501">6501./a>}; L502" class="line" namon>L502">6502./a> L503" class="line" namon>L503">6503./a>static6struct .a href="+code=resource" class="sref">resource./a> .a href="+code=da9052_tsi_resources" class="sref">da9052_tsi_resources./a>[] = { L504" class="line" namon>L504">6504./a>        { L505" class="line" namon>L505">6505./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"PENDWN", L506" class="line" namon>L506">6506./a>                ..a href="+code=start" class="sref">start./a> =6.a href="+code=DA9052_IRQ_PENDOWN" class="sref">DA9052_IRQ_PENDOWN./a>, L507" class="line" namon>L507">6507./a>                ..a href="+code=end" class="sref">end./a>   =6.a href="+code=DA9052_IRQ_PENDOWN" class="sref">DA9052_IRQ_PENDOWN./a>, L508" class="line" namon>L508">6508./a>                ..a href="+code=flags" class="sref">flags./a> =6.a href="+code=IORESOURCE_IRQ" class="sref">IORESOURCE_IRQ./a>, L509" class="line" namon>L509">6509./a>        }, L510" class="line" namon>L510">6510./a>        { L511" class="line" namon>L511">6511./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"TSIRDY", L512" class="line" namon>L512">6512./a>                ..a href="+code=start" class="sref">start./a> =6.a href="+code=DA9052_IRQ_TSIREADY" class="sref">DA9052_IRQ_TSIREADY./a>, L513" class="line" namon>L513">6513./a>                ..a href="+code=end" class="sref">end./a>   =6.a href="+code=DA9052_IRQ_TSIREADY" class="sref">DA9052_IRQ_TSIREADY./a>, L514" class="line" namon>L514">6514./a>                ..a href="+code=flags" class="sref">flags./a> =6.a href="+code=IORESOURCE_IRQ" class="sref">IORESOURCE_IRQ./a>, L515" class="line" namon>L515">6515./a>        }, L516" class="line" namon>L516">6516./a>}; L517" class="line" namon>L517">6517./a> L518" class="line" namon>L518">6518./a>static6struct .a href="+code=mfd_cell" class="sref">mfd_cell./a> .a href="+code=__devinitdata" class="sref">__devinitdata./a> .a href="+code=da9052_subdev_info" class="sref">da9052_subdev_info./a>[] = { L519" class="line" namon>L519">6519./a>        { L520" class="line" namon>L520">6520./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L521" class="line" namon>L521">6521./a>                ..a href="+code=id" class="sref">id./a> =61, L522" class="line" namon>L522">6522./a>        }, L523" class="line" namon>L523">6523./a>        { L524" class="line" namon>L524">6524./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L525" class="line" namon>L525">6525./a>                ..a href="+code=id" class="sref">id./a> =62, L526" class="line" namon>L526">6526./a>        }, L527" class="line" namon>L527">6527./a>        { L528" class="line" namon>L528">6528./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L529" class="line" namon>L529">6529./a>                ..a href="+code=id" class="sref">id./a> =63, L530" class="line" namon>L530">6530./a>        }, L531" class="line" namon>L531">6531./a>        { L532" class="line" namon>L532">6532./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L533" class="line" namon>L533">6533./a>                ..a href="+code=id" class="sref">id./a> =64, L534" class="line" namon>L534">6534./a>        }, L535" class="line" namon>L535">6535./a>        { L536" class="line" namon>L536">6536./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L537" class="line" namon>L537">6537./a>                ..a href="+code=id" class="sref">id./a> =65, L538" class="line" namon>L538">6538./a>        }, L539" class="line" namon>L539">6539./a>        { L540" class="line" namon>L540">6540./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L541" class="line" namon>L541">6541./a>                ..a href="+code=id" class="sref">id./a> =66, L542" class="line" namon>L542">6542./a>        }, L543" class="line" namon>L543">6543./a>        { L544" class="line" namon>L544">6544./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L545" class="line" namon>L545">6545./a>                ..a href="+code=id" class="sref">id./a> =67, L546" class="line" namon>L546">6546./a>        }, L547" class="line" namon>L547">6547./a>        { L548" class="line" namon>L548">6548./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L549" class="line" namon>L549">6549./a>                ..a href="+code=id" class="sref">id./a> =68, L550" class="line" namon>L550">6550./a>        }, L551" class="line" namon>L551">6551./a>        { L552" class="line" namon>L552">6552./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L553" class="line" namon>L553">6553./a>                ..a href="+code=id" class="sref">id./a> =69, L554" class="line" namon>L554">6554./a>        }, L555" class="line" namon>L555">6555./a>        { L556" class="line" namon>L556">6556./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L557" class="line" namon>L557">6557./a>                ..a href="+code=id" class="sref">id./a> =610, L558" class="line" namon>L558">6558./a>        }, L559" class="line" namon>L559">6559./a>        { L560" class="line" namon>L560">6560./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L561" class="line" namon>L561">6561./a>                ..a href="+code=id" class="sref">id./a> =611, L562" class="line" namon>L562">6562./a>        }, L563" class="line" namon>L563">6563./a>        { L564" class="line" namon>L564">6564./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L565" class="line" namon>L565">6565./a>                ..a href="+code=id" class="sref">id./a> =612, L566" class="line" namon>L566">6566./a>        }, L567" class="line" namon>L567">6567./a>        { L568" class="line" namon>L568">6568./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L569" class="line" namon>L569">6569./a>                ..a href="+code=id" class="sref">id./a> =613, L570" class="line" namon>L570">6570./a>        }, L571" class="line" namon>L571">6571./a>        { L572" class="line" namon>L572">6572./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-regulator", L573" class="line" namon>L573">6573./a>                ..a href="+code=id" class="sref">id./a> =614, L574" class="line" namon>L574">6574./a>        }, L575" class="line" namon>L575">6575./a>        { L576" class="line" namon>L576">6576./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-onkey", L577" class="line" namon>L577">6577./a>                ..a href="+code=resources" class="sref">resources./a> =6&.a href="+code=da9052_onkey_resource" class="sref">da9052_onkey_resource./a>, L578" class="line" namon>L578">6578./a>                ..a href="+code=num_resources" class="sref">num_resources./a> =61, L579" class="line" namon>L579">6579./a>        }, L580" class="line" namon>L580">6580./a>        { L581" class="line" namon>L581">6581./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-rtc", L582" class="line" namon>L582">6582./a>                ..a href="+code=resources" class="sref">resources./a> =6&.a href="+code=da9052_rtc_resource" class="sref">da9052_rtc_resource./a>, L583" class="line" namon>L583">6583./a>                ..a href="+code=num_resources" class="sref">num_resources./a> =61, L584" class="line" namon>L584">6584./a>        }, L585" class="line" namon>L585">6585./a>        { L586" class="line" namon>L586">6586./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-gpio", L587" class="line" namon>L587">6587./a>        }, L588" class="line" namon>L588">6588./a>        { L589" class="line" namon>L589">6589./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-hwmon", L590" class="line" namon>L590">6590./a>        }, L591" class="line" namon>L591">6591./a>        { L592" class="line" namon>L592">6592./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-leds", L593" class="line" namon>L593">6593./a>        }, L594" class="line" namon>L594">6594./a>        { L595" class="line" namon>L595">6595./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-wled1", L596" class="line" namon>L596">6596./a>        }, L597" class="line" namon>L597">6597./a>        { L598" class="line" namon>L598">6598./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-wled2", L599" class="line" namon>L599">6599./a>        }, L600" class="line" namon>L600">6600./a>        { L601" class="line" namon>L601">6601./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-wled3", L602" class="line" namon>L602">6602./a>        }, L603" class="line" namon>L603">6603./a>        { L604" class="line" namon>L604">6604./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-tsi", L605" class="line" namon>L605">6605./a>                ..a href="+code=resources" class="sref">resources./a> =6.a href="+code=da9052_tsi_resources" class="sref">da9052_tsi_resources./a>, L606" class="line" namon>L606">6606./a>                ..a href="+code=num_resources" class="sref">num_resources./a> =6.a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE./a>(.a href="+code=da9052_tsi_resources" class="sref">da9052_tsi_resources./a>), L607" class="line" namon>L607">6607./a>        }, L608" class="line" namon>L608">6608./a>        { L609" class="line" namon>L609">6609./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-bat", L610" class="line" namon>L610">6610./a>                ..a href="+code=resources" class="sref">resources./a> =6.a href="+code=da9052_bat_resources" class="sref">da9052_bat_resources./a>, L611" class="line" namon>L611">6611./a>                ..a href="+code=num_resources" class="sref">num_resources./a> =6.a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE./a>(.a href="+code=da9052_bat_resources" class="sref">da9052_bat_resources./a>), L612" class="line" namon>L612">6612./a>        }, L613" class="line" namon>L613">6613./a>        { L614" class="line" namon>L614">6614./a>                ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052-watchdog", L615" class="line" namon>L615">6615./a>        }, L616" class="line" namon>L616">6616./a>}; L617" class="line" namon>L617">6617./a> L618" class="line" namon>L618">6618./a>static6struct .a href="+code=regmap_irq" class="sref">regmap_irq./a> .a href="+code=da9052_irqs" class="sref">da9052_irqs./a>[] = { L619" class="line" namon>L619">6619./a>        [.a href="+code=DA9052_IRQ_DCIN" class="sref">DA9052_IRQ_DCIN./a>] = { L620" class="line" namon>L620">6620./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =60, L621" class="line" namon>L621">6621./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_1" class="sref">DA9052_IRQ_MASK_POS_1./a>, L622" class="line" namon>L622">6622./a>        }, L623" class="line" namon>L623">6623./a>        [.a href="+code=DA9052_IRQ_VBUS" class="sref">DA9052_IRQ_VBUS./a>] = { L624" class="line" namon>L624">6624./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =60, L625" class="line" namon>L625">6625./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_2" class="sref">DA9052_IRQ_MASK_POS_2./a>, L626" class="line" namon>L626">6626./a>        }, L627" class="line" namon>L627">6627./a>        [.a href="+code=DA9052_IRQ_DCINREM" class="sref">DA9052_IRQ_DCINREM./a>] = { L628" class="line" namon>L628">6628./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =60, L629" class="line" namon>L629">6629./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_3" class="sref">DA9052_IRQ_MASK_POS_3./a>, L630" class="line" namon>L630">6630./a>        }, L631" class="line" namon>L631">6631./a>        [.a href="+code=DA9052_IRQ_VBUSREM" class="sref">DA9052_IRQ_VBUSREM./a>] = { L632" class="line" namon>L632">6632./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =60, L633" class="line" namon>L633">6633./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_4" class="sref">DA9052_IRQ_MASK_POS_4./a>, L634" class="line" namon>L634">6634./a>        }, L635" class="line" namon>L635">6635./a>        [.a href="+code=DA9052_IRQ_VDDLOW" class="sref">DA9052_IRQ_VDDLOW./a>] = { L636" class="line" namon>L636">6636./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =60, L637" class="line" namon>L637">6637./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_5" class="sref">DA9052_IRQ_MASK_POS_5./a>, L638" class="line" namon>L638">6638./a>        }, L639" class="line" namon>L639">6639./a>        [.a href="+code=DA9052_IRQ_ALARM" class="sref">DA9052_IRQ_ALARM./a>] = { L640" class="line" namon>L640">6640./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =60, L641" class="line" namon>L641">6641./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_6" class="sref">DA9052_IRQ_MASK_POS_6./a>, L642" class="line" namon>L642">6642./a>        }, L643" class="line" namon>L643">6643./a>        [.a href="+code=DA9052_IRQ_SEQRDY" class="sref">DA9052_IRQ_SEQRDY./a>] = { L644" class="line" namon>L644">6644./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =60, L645" class="line" namon>L645">6645./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_7" class="sref">DA9052_IRQ_MASK_POS_7./a>, L646" class="line" namon>L646">6646./a>        }, L647" class="line" namon>L647">6647./a>        [.a href="+code=DA9052_IRQ_COMP1V2" class="sref">DA9052_IRQ_COMP1V2./a>] = { L648" class="line" namon>L648">6648./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =60, L649" class="line" namon>L649">6649./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_8" class="sref">DA9052_IRQ_MASK_POS_8./a>, L650" class="line" namon>L650">6650./a>        }, L651" class="line" namon>L651">6651./a>        [.a href="+code=DA9052_IRQ_NONKEY" class="sref">DA9052_IRQ_NONKEY./a>] = { L652" class="line" namon>L652">6652./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =61, L653" class="line" namon>L653">6653./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_1" class="sref">DA9052_IRQ_MASK_POS_1./a>, L654" class="line" namon>L654">6654./a>        }, L655" class="line" namon>L655">6655./a>        [.a href="+code=DA9052_IRQ_IDFLOAT" class="sref">DA9052_IRQ_IDFLOAT./a>] = { L656" class="line" namon>L656">6656./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =61, L657" class="line" namon>L657">6657./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_2" class="sref">DA9052_IRQ_MASK_POS_2./a>, L658" class="line" namon>L658">6658./a>        }, L659" class="line" namon>L659">6659./a>        [.a href="+code=DA9052_IRQ_IDGND" class="sref">DA9052_IRQ_IDGND./a>] = { L660" class="line" namon>L660">6660./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =61, L661" class="line" namon>L661">6661./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_3" class="sref">DA9052_IRQ_MASK_POS_3./a>, L662" class="line" namon>L662">6662./a>        }, L663" class="line" namon>L663">6663./a>        [.a href="+code=DA9052_IRQ_CHGEND" class="sref">DA9052_IRQ_CHGEND./a>] = { L664" class="line" namon>L664">6664./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =61, L665" class="line" namon>L665">6665./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_4" class="sref">DA9052_IRQ_MASK_POS_4./a>, L666" class="line" namon>L666">6666./a>        }, L667" class="line" namon>L667">6667./a>        [.a href="+code=DA9052_IRQ_TBAT" class="sref">DA9052_IRQ_TBAT./a>] = { L668" class="line" namon>L668">6668./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =61, L669" class="line" namon>L669">6669./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_5" class="sref">DA9052_IRQ_MASK_POS_5./a>, L670" class="line" namon>L670">6670./a>        }, L671" class="line" namon>L671">6671./a>        [.a href="+code=DA9052_IRQ_ADC_EOM" class="sref">DA9052_IRQ_ADC_EOM./a>] = { L672" class="line" namon>L672">6672./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =61, L673" class="line" namon>L673">6673./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_6" class="sref">DA9052_IRQ_MASK_POS_6./a>, L674" class="line" namon>L674">6674./a>        }, L675" class="line" namon>L675">6675./a>        [.a href="+code=DA9052_IRQ_PENDOWN" class="sref">DA9052_IRQ_PENDOWN./a>] = { L676" class="line" namon>L676">6676./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =61, L677" class="line" namon>L677">6677./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_7" class="sref">DA9052_IRQ_MASK_POS_7./a>, L678" class="line" namon>L678">6678./a>        }, L679" class="line" namon>L679">6679./a>        [.a href="+code=DA9052_IRQ_TSIREADY" class="sref">DA9052_IRQ_TSIREADY./a>] = { L680" class="line" namon>L680">6680./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =61, L681" class="line" namon>L681">6681./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_8" class="sref">DA9052_IRQ_MASK_POS_8./a>, L682" class="line" namon>L682">6682./a>        }, L683" class="line" namon>L683">6683./a>        [.a href="+code=DA9052_IRQ_GPI0" class="sref">DA9052_IRQ_GPI0./a>] = { L684" class="line" namon>L684">6684./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =62, L685" class="line" namon>L685">6685./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_1" class="sref">DA9052_IRQ_MASK_POS_1./a>, L686" class="line" namon>L686">6686./a>        }, L687" class="line" namon>L687">6687./a>        [.a href="+code=DA9052_IRQ_GPI1" class="sref">DA9052_IRQ_GPI1./a>] = { L688" class="line" namon>L688">6688./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =62, L689" class="line" namon>L689">6689./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_2" class="sref">DA9052_IRQ_MASK_POS_2./a>, L690" class="line" namon>L690">6690./a>        }, L691" class="line" namon>L691">6691./a>        [.a href="+code=DA9052_IRQ_GPI2" class="sref">DA9052_IRQ_GPI2./a>] = { L692" class="line" namon>L692">6692./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =62, L693" class="line" namon>L693">6693./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_3" class="sref">DA9052_IRQ_MASK_POS_3./a>, L694" class="line" namon>L694">6694./a>        }, L695" class="line" namon>L695">6695./a>        [.a href="+code=DA9052_IRQ_GPI3" class="sref">DA9052_IRQ_GPI3./a>] = { L696" class="line" namon>L696">6696./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =62, L697" class="line" namon>L697">6697./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_4" class="sref">DA9052_IRQ_MASK_POS_4./a>, L698" class="line" namon>L698">6698./a>        }, L699" class="line" namon>L699">6699./a>        [.a href="+code=DA9052_IRQ_GPI4" class="sref">DA9052_IRQ_GPI4./a>] = { L700" class="line" namon>L700">6700./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =62, L701" class="line" namon>L701">6701./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_5" class="sref">DA9052_IRQ_MASK_POS_5./a>, L702" class="line" namon>L702">6702./a>        }, L703" class="line" namon>L703">6703./a>        [.a href="+code=DA9052_IRQ_GPI5" class="sref">DA9052_IRQ_GPI5./a>] = { L704" class="line" namon>L704">6704./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =62, L705" class="line" namon>L705">6705./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_6" class="sref">DA9052_IRQ_MASK_POS_6./a>, L706" class="line" namon>L706">6706./a>        }, L707" class="line" namon>L707">6707./a>        [.a href="+code=DA9052_IRQ_GPI6" class="sref">DA9052_IRQ_GPI6./a>] = { L708" class="line" namon>L708">6708./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =62, L709" class="line" namon>L709">6709./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_7" class="sref">DA9052_IRQ_MASK_POS_7./a>, L710" class="line" namon>L710">6710./a>        }, L711" class="line" namon>L711">6711./a>        [.a href="+code=DA9052_IRQ_GPI7" class="sref">DA9052_IRQ_GPI7./a>] = { L712" class="line" namon>L712">6712./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =62, L713" class="line" namon>L713">6713./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_8" class="sref">DA9052_IRQ_MASK_POS_8./a>, L714" class="line" namon>L714">6714./a>        }, L715" class="line" namon>L715">6715./a>        [.a href="+code=DA9052_IRQ_GPI8" class="sref">DA9052_IRQ_GPI8./a>] = { L716" class="line" namon>L716">6716./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =63, L717" class="line" namon>L717">6717./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_1" class="sref">DA9052_IRQ_MASK_POS_1./a>, L718" class="line" namon>L718">6718./a>        }, L719" class="line" namon>L719">6719./a>        [.a href="+code=DA9052_IRQ_GPI9" class="sref">DA9052_IRQ_GPI9./a>] = { L720" class="line" namon>L720">6720./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =63, L721" class="line" namon>L721">6721./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_2" class="sref">DA9052_IRQ_MASK_POS_2./a>, L722" class="line" namon>L722">6722./a>        }, L723" class="line" namon>L723">6723./a>        [.a href="+code=DA9052_IRQ_GPI10" class="sref">DA9052_IRQ_GPI10./a>] = { L724" class="line" namon>L724">6724./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =63, L725" class="line" namon>L725">6725./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_3" class="sref">DA9052_IRQ_MASK_POS_3./a>, L726" class="line" namon>L726">6726./a>        }, L727" class="line" namon>L727">6727./a>        [.a href="+code=DA9052_IRQ_GPI11" class="sref">DA9052_IRQ_GPI11./a>] = { L728" class="line" namon>L728">6728./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =63, L729" class="line" namon>L729">6729./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_4" class="sref">DA9052_IRQ_MASK_POS_4./a>, L730" class="line" namon>L730">6730./a>        }, L731" class="line" namon>L731">6731./a>        [.a href="+code=DA9052_IRQ_GPI12" class="sref">DA9052_IRQ_GPI12./a>] = { L732" class="line" namon>L732">6732./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =63, L733" class="line" namon>L733">6733./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_5" class="sref">DA9052_IRQ_MASK_POS_5./a>, L734" class="line" namon>L734">6734./a>        }, L735" class="line" namon>L735">6735./a>        [.a href="+code=DA9052_IRQ_GPI13" class="sref">DA9052_IRQ_GPI13./a>] = { L736" class="line" namon>L736">6736./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =63, L737" class="line" namon>L737">6737./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_6" class="sref">DA9052_IRQ_MASK_POS_6./a>, L738" class="line" namon>L738">6738./a>        }, L739" class="line" namon>L739">6739./a>        [.a href="+code=DA9052_IRQ_GPI14" class="sref">DA9052_IRQ_GPI14./a>] = { L740" class="line" namon>L740">6740./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =63, L741" class="line" namon>L741">6741./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_7" class="sref">DA9052_IRQ_MASK_POS_7./a>, L742" class="line" namon>L742">6742./a>        }, L743" class="line" namon>L743">6743./a>        [.a href="+code=DA9052_IRQ_GPI15" class="sref">DA9052_IRQ_GPI15./a>] = { L744" class="line" namon>L744">6744./a>                ..a href="+code=reg_offset" class="sref">reg_offset./a> =63, L745" class="line" namon>L745">6745./a>                ..a href="+code=mask" class="sref">mask./a> =6.a href="+code=DA9052_IRQ_MASK_POS_8" class="sref">DA9052_IRQ_MASK_POS_8./a>, L746" class="line" namon>L746">6746./a>        }, L747" class="line" namon>L747">6747./a>}; L748" class="line" namon>L748">6748./a> L749" class="line" namon>L749">6749./a>static6struct .a href="+code=regmap_irq_chip" class="sref">regmap_irq_chip./a> .a href="+code=da9052_regmap_irq_chip" class="sref">da9052_regmap_irq_chip./a> =6{ L750" class="line" namon>L750">6750./a>        ..a href="+code=namo" class="sref">namo./a> =6.span class="string">"da9052_irq", L751" class="line" namon>L751">6751./a>        ..a href="+code=status_baso" class="sref">status_baso./a> =6.a href="+code=DA9052_EVENT_A_REG" class="sref">DA9052_EVENT_A_REG./a>, L752" class="line" namon>L752">6752./a>        ..a href="+code=mask_baso" class="sref">mask_baso./a> =6.a href="+code=DA9052_IRQ_MASK_A_REG" class="sref">DA9052_IRQ_MASK_A_REG./a>, L753" class="line" namon>L753">6753./a>        ..a href="+code=ack_baso" class="sref">ack_baso./a> =6.a href="+code=DA9052_EVENT_A_REG" class="sref">DA9052_EVENT_A_REG./a>, L754" class="line" namon>L754">6754./a>        ..a href="+code=num_regs" class="sref">num_regs./a> =6.a href="+code=DA9052_NUM_IRQ_REGS" class="sref">DA9052_NUM_IRQ_REGS./a>, L755" class="line" namon>L755">6755./a>        ..a href="+code=irqs" class="sref">irqs./a> =6.a href="+code=da9052_irqs" class="sref">da9052_irqs./a>, L756" class="line" namon>L756">6756./a>        ..a href="+code=num_irqs" class="sref">num_irqs./a> =6.a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE./a>(.a href="+code=da9052_irqs" class="sref">da9052_irqs./a>), L757" class="line" namon>L757">6757./a>}; L758" class="line" namon>L758">6758./a> L759" class="line" namon>L759">6759./a>struct .a href="+code=regmap_config" class="sref">regmap_config./a> .a href="+code=da9052_regmap_config" class="sref">da9052_regmap_config./a> =6{ L760" class="line" namon>L760">6760./a>        ..a href="+code=reg_bits" class="sref">reg_bits./a> =68, L761" class="line" namon>L761">6761./a>        ..a href="+code=val_bits" class="sref">val_bits./a> =68, L762" class="line" namon>L762">6762./a> L763" class="line" namon>L763">6763./a>        ..a href="+code=cache_typo" class="sref">cache_typo./a> =6.a href="+code=REGCACHE_RBTREE" class="sref">REGCACHE_RBTREE./a>, L764" class="line" namon>L764">6764./a> L765" class="line" namon>L765">6765./a>        ..a href="+code=max_register" class="sref">max_register./a> =6.a href="+code=DA9052_PAGE1_CON_REG" class="sref">DA9052_PAGE1_CON_REG./a>, L766" class="line" namon>L766">6766./a>        ..a href="+code=readable_reg" class="sref">readable_reg./a> =6.a href="+code=da9052_reg_readable" class="sref">da9052_reg_readable./a>, L767" class="line" namon>L767">6767./a>        ..a href="+code=writeable_reg" class="sref">writeable_reg./a> =6.a href="+code=da9052_reg_writeable" class="sref">da9052_reg_writeable./a>, L768" class="line" namon>L768">6768./a>        ..a href="+code=volatile_reg" class="sref">volatile_reg./a> =6.a href="+code=da9052_reg_volatile" class="sref">da9052_reg_volatile./a>, L769" class="line" namon>L769">6769./a>}; L770" class="line" namon>L770">6770./a>.a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL./a>(.a href="+code=da9052_regmap_config" class="sref">da9052_regmap_config./a>); L771" class="line" namon>L771">6771./a> L772" class="line" namon>L772">6772./a>int .a href="+code=__devinit" class="sref">__devinit./a> .a href="+code=da9052_device_init" class="sref">da9052_device_init./a>(struct .a href="+code=da9052" class="sref">da9052./a> *.a href="+code=da9052" class="sref">da9052./a>, .a href="+code=u8" class="sref">u8./a> .a href="+code=chip_id" class="sref">chip_id./a>) L773" class="line" namon>L773">6773./a>{ L774" class="line" namon>L774">6774./a>        struct .a href="+code=da9052_pdata" class="sref">da9052_pdata./a> *.a href="+code=pdata" class="sref">pdata./a> =6.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=dev" class="sref">dev./a>->.a href="+code=platform_data" class="sref">platform_data./a>; L775" class="line" namon>L775">6775./a>        int .a href="+code=ret" class="sref">ret./a>; L776" class="line" namon>L776">6776./a> L777" class="line" namon>L777">6777./a>        .a href="+code=mutex_init" class="sref">mutex_init./a>(&.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=auxadc_lock" class="sref">auxadc_lock./a>); L778" class="line" namon>L778">6778./a>        .a href="+code=init_completion" class="sref">init_completion./a>(&.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=done" class="sref">done./a>); L779" class="line" namon>L779">6779./a> L780" class="line" namon>L780">6780./a>        if (.a href="+code=pdata" class="sref">pdata./a> && .a href="+code=pdata" class="sref">pdata./a>->.a href="+code=init" class="sref">init./a> !=6.a href="+code=NULL" class="sref">NULL./a>) L781" class="line" namon>L781">6781./a>                .a href="+code=pdata" class="sref">pdata./a>->.a href="+code=init" class="sref">init./a>(.a href="+code=da9052" class="sref">da9052./a>); L782" class="line" namon>L782">6782./a> L783" class="line" namon>L783">6783./a>        .a href="+code=da9052" class="sref">da9052./a>->.a href="+code=chip_id" class="sref">chip_id./a> =6.a href="+code=chip_id" class="sref">chip_id./a>; L784" class="line" namon>L784">6784./a> L785" class="line" namon>L785">6785./a>        if (!.a href="+code=pdata" class="sref">pdata./a> || !.a href="+code=pdata" class="sref">pdata./a>->.a href="+code=irq_baso" class="sref">irq_baso./a>) L786" class="line" namon>L786">6786./a>                .a href="+code=da9052" class="sref">da9052./a>->.a href="+code=irq_baso" class="sref">irq_baso./a> =6-1; L787" class="line" namon>L787">6787./a>        else L788" class="line" namon>L788">6788./a>                .a href="+code=da9052" class="sref">da9052./a>->.a href="+code=irq_baso" class="sref">irq_baso./a> =6.a href="+code=pdata" class="sref">pdata./a>->.a href="+code=irq_baso" class="sref">irq_baso./a>; L789" class="line" namon>L789">6789./a> L790" class="line" namon>L790">6790./a>        .a href="+code=ret" class="sref">ret./a> =6.a href="+code=regmap_add_irq_chip" class="sref">regmap_add_irq_chip./a>(.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=regmap" class="sref">regmap./a>, .a href="+code=da9052" class="sref">da9052./a>->.a href="+code=chip_irq" class="sref">chip_irq./a>, L791" class="line" namon>L791">6791./a>                                  .a href="+code=IRQF_TRIGGER_LOW" class="sref">IRQF_TRIGGER_LOW./a> | .a href="+code=IRQF_ONESHOT" class="sref">IRQF_ONESHOT./a>, L792" class="line" namon>L792">6792./a>                                  .a href="+code=da9052" class="sref">da9052./a>->.a href="+code=irq_baso" class="sref">irq_baso./a>, &.a href="+code=da9052_regmap_irq_chip" class="sref">da9052_regmap_irq_chip./a>, L793" class="line" namon>L793">6793./a>                                  &.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=irq_data" class="sref">irq_data./a>); L794" class="line" namon>L794">6794./a>        if (.a href="+code=ret" class="sref">ret./a> < 0) L795" class="line" namon>L795">6795./a>                goto6.a href="+code=regmap_err" class="sref">regmap_err./a>; L796" class="line" namon>L796">6796./a> L797" class="line" namon>L797">6797./a>        .a href="+code=da9052" class="sref">da9052./a>->.a href="+code=irq_baso" class="sref">irq_baso./a> =6.a href="+code=regmap_irq_chip_get_baso" class="sref">regmap_irq_chip_get_baso./a>(.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=irq_data" class="sref">irq_data./a>); L798" class="line" namon>L798">6798./a> L799" class="line" namon>L799">6799./a>        .a href="+code=ret" class="sref">ret./a> =6.a href="+code=request_threaded_irq" class="sref">request_threaded_irq./a>(.a href="+code=DA9052_IRQ_ADC_EOM" class="sref">DA9052_IRQ_ADC_EOM./a>, .a href="+code=NULL" class="sref">NULL./a>, .a href="+code=da9052_auxadc_irq" class="sref">da9052_auxadc_irq./a>, L800" class="line" namon>L800">6800./a>                                   .a href="+code=IRQF_TRIGGER_LOW" class="sref">IRQF_TRIGGER_LOW./a> | .a href="+code=IRQF_ONESHOT" class="sref">IRQF_ONESHOT./a>, L801" class="line" namon>L801">6801./a>                                   .span class="string">"adc irq", .a href="+code=da9052" class="sref">da9052./a>); L802" class="line" namon>L802">6802./a>        if (.a href="+code=ret" class="sref">ret./a> != 0) L803" class="line" namon>L803">6803./a>                .a href="+code=dev_err" class="sref">dev_err./a>(.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=dev" class="sref">dev./a>, .span class="string">"DA9052 ADC IRQ failed ret=%d\n", .a href="+code=ret" class="sref">ret./a>); L804" class="line" namon>L804">6804./a> L805" class="line" namon>L805">6805./a>        .a href="+code=ret" class="sref">ret./a> =6.a href="+code=mfd_add_devices" class="sref">mfd_add_devices./a>(.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=dev" class="sref">dev./a>, -1, .a href="+code=da9052_subdev_info" class="sref">da9052_subdev_info./a>, L806" class="line" namon>L806">6806./a>                              .a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE./a>(.a href="+code=da9052_subdev_info" class="sref">da9052_subdev_info./a>), .a href="+code=NULL" class="sref">NULL./a>, 0, .a href="+code=NULL" class="sref">NULL./a>); L807" class="line" namon>L807">6807./a>        if (.a href="+code=ret" class="sref">ret./a>) L808" class="line" namon>L808">6808./a>                goto6.a href="+code=err" class="sref">err./a>; L809" class="line" namon>L809">6809./a> L810" class="line" namon>L810">6810./a>        return 0; L811" class="line" namon>L811">6811./a> L812" class="line" namon>L812">6812./a>.a href="+code=err" class="sref">err./a>: L813" class="line" namon>L813">6813./a>        .a href="+code=free_irq" class="sref">free_irq./a>(.a href="+code=DA9052_IRQ_ADC_EOM" class="sref">DA9052_IRQ_ADC_EOM./a>, .a href="+code=da9052" class="sref">da9052./a>); L814" class="line" namon>L814">6814./a>        .a href="+code=mfd_remove_devices" class="sref">mfd_remove_devices./a>(.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=dev" class="sref">dev./a>); L815" class="line" namon>L815">6815./a>.a href="+code=regmap_err" class="sref">regmap_err./a>: L816" class="line" namon>L816">6816./a>        return .a href="+code=ret" class="sref">ret./a>; L817" class="line" namon>L817">6817./a>} L818" class="line" namon>L818">6818./a> L819" class="line" namon>L819">6819./a>void .a href="+code=da9052_device_exit" class="sref">da9052_device_exit./a>(struct .a href="+code=da9052" class="sref">da9052./a> *.a href="+code=da9052" class="sref">da9052./a>) L820" class="line" namon>L820">6820./a>{ L821" class="line" namon>L821">6821./a>        .a href="+code=free_irq" class="sref">free_irq./a>(.a href="+code=DA9052_IRQ_ADC_EOM" class="sref">DA9052_IRQ_ADC_EOM./a>, .a href="+code=da9052" class="sref">da9052./a>); L822" class="line" namon>L822">6822./a>        .a href="+code=regmap_del_irq_chip" class="sref">regmap_del_irq_chip./a>(.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=chip_irq" class="sref">chip_irq./a>, .a href="+code=da9052" class="sref">da9052./a>->.a href="+code=irq_data" class="sref">irq_data./a>); L823" class="line" namon>L823">6823./a>        .a href="+code=mfd_remove_devices" class="sref">mfd_remove_devices./a>(.a href="+code=da9052" class="sref">da9052./a>->.a href="+code=dev" class="sref">dev./a>); L824" class="line" namon>L824">6824./a>} L825" class="line" namon>L825">6825./a> L826" class="line" namon>L826">6826./a>.a href="+code=MODULE_AUTHOR" class="sref">MODULE_AUTHOR./a>(.span class="string">"David Dajun Chen <dchen@diasemi.com>"); L827" class="line" namon>L827">6827./a>.a href="+code=MODULE_DESCRIPTION" class="sref">MODULE_DESCRIPTION./a>(.span class="string">"DA9052 MFD Core"); L828" class="line" namon>L828">6828./a>.a href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSE./a>(.span class="string">"GPL"); L829" class="line" namon>L829">6829./a>
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