linux/include/video/pxa168fb.h
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   1/*
   2 * linux/arch/arm/mach-mmp/include/mach/pxa168fb.h
   3 *
   4 *  Copyright (C) 2009 Marvell International Ltd.
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 */
  10
  11#ifndef __ASM_MACH_PXA168FB_H
  12#define __ASM_MACH_PXA168FB_H
  13
  14#include <linux/fb.h>
  15#include <linux/interrupt.h>
  16
  17/* Dumb interface */
  18#define PIN_MODE_DUMB_24                0
  19#define PIN_MODE_DUMB_18_SPI            1
  20#define PIN_MODE_DUMB_18_GPIO           2
  21#define PIN_MODE_DUMB_16_SPI            3
  22#define PIN_MODE_DUMB_16_GPIO           4
  23#define PIN_MODE_DUMB_12_SPI_GPIO       5
  24#define PIN_MODE_SMART_18_SPI           6
  25#define PIN_MODE_SMART_16_SPI           7
  26#define PIN_MODE_SMART_8_SPI_GPIO       8
  27
  28/* Dumb interface pin allocation */
  29#define DUMB_MODE_RGB565                0
  30#define DUMB_MODE_RGB565_UPPER          1
  31#define DUMB_MODE_RGB666                2
  32#define DUMB_MODE_RGB666_UPPER          3
  33#define DUMB_MODE_RGB444                4
  34#define DUMB_MODE_RGB444_UPPER          5
  35#define DUMB_MODE_RGB888                6
  36
  37/* default fb buffer size WVGA-32bits */
  38#define DEFAULT_FB_SIZE (800 * 480 * 4)
  39
  40/*
  41 * Buffer pixel format
  42 * bit0 is for rb swap.
  43 * bit12 is for Y UorV swap
  44 */
  45#define PIX_FMT_RGB565          0
  46#define PIX_FMT_BGR565          1
  47#define PIX_FMT_RGB1555         2
  48#define PIX_FMT_BGR1555         3
  49#define PIX_FMT_RGB888PACK      4
  50#define PIX_FMT_BGR888PACK      5
  51#define PIX_FMT_RGB888UNPACK    6
  52#define PIX_FMT_BGR888UNPACK    7
  53#define PIX_FMT_RGBA888         8
  54#define PIX_FMT_BGRA888         9
  55#define PIX_FMT_YUV422PACK      10
  56#define PIX_FMT_YVU422PACK      11
  57#define PIX_FMT_YUV422PLANAR    12
  58#define PIX_FMT_YVU422PLANAR    13
  59#define PIX_FMT_YUV420PLANAR    14
  60#define PIX_FMT_YVU420PLANAR    15
  61#define PIX_FMT_PSEUDOCOLOR     20
  62#define PIX_FMT_UYVY422PACK     (0x1000|PIX_FMT_YUV422PACK)
  63
  64/*
  65 * PXA LCD controller private state.
  66 */
  67struct pxa168fb_info {
  68        struct device           *dev;
  69        struct clk              *clk;
  70        struct fb_info          *info;
  71
  72        void __iomem            *reg_base;
  73        dma_addr_t              fb_start_dma;
  74        u32                     pseudo_palette[16];
  75
  76        int                     pix_fmt;
  77        unsigned                is_blanked:1;
  78        unsigned                panel_rbswap:1;
  79        unsigned                active:1;
  80};
  81
  82/*
  83 * PXA fb machine information
  84 */
  85struct pxa168fb_mach_info {
  86        char    id[16];
  87
  88        int             num_modes;
  89        struct fb_videomode *modes;
  90
  91        /*
  92         * Pix_fmt
  93         */
  94        unsigned        pix_fmt;
  95
  96        /*
  97         * I/O pin allocation.
  98         */
  99        unsigned        io_pin_allocation_mode:4;
 100
 101        /*
 102         * Dumb panel -- assignment of R/G/B component info to the 24
 103         * available external data lanes.
 104         */
 105        unsigned        dumb_mode:4;
 106        unsigned        panel_rgb_reverse_lanes:1;
 107
 108        /*
 109         * Dumb panel -- GPIO output data.
 110         */
 111        unsigned        gpio_output_mask:8;
 112        unsigned        gpio_output_data:8;
 113
 114        /*
 115         * Dumb panel -- configurable output signal polarity.
 116         */
 117        unsigned        invert_composite_blank:1;
 118        unsigned        invert_pix_val_ena:1;
 119        unsigned        invert_pixclock:1;
 120        unsigned        panel_rbswap:1;
 121        unsigned        active:1;
 122        unsigned        enable_lcd:1;
 123};
 124
 125#endif /* __ASM_MACH_PXA168FB_H */
 126
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