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28#define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
29#if defined(__i386__)
30# define BREAKPOINT() asm(" int $3");
31#else
32# define BREAKPOINT() { }
33#endif
34
35#define MAX_DEVICES 12
36
37#include <linux/module.h>
38#include <linux/errno.h>
39#include <linux/signal.h>
40#include <linux/sched.h>
41#include <linux/timer.h>
42#include <linux/interrupt.h>
43#include <linux/pci.h>
44#include <linux/tty.h>
45#include <linux/tty_flip.h>
46#include <linux/serial.h>
47#include <linux/major.h>
48#include <linux/string.h>
49#include <linux/fcntl.h>
50#include <linux/ptrace.h>
51#include <linux/ioport.h>
52#include <linux/mm.h>
53#include <linux/seq_file.h>
54#include <linux/slab.h>
55#include <linux/netdevice.h>
56#include <linux/vmalloc.h>
57#include <linux/init.h>
58#include <linux/delay.h>
59#include <linux/ioctl.h>
60
61#include <asm/io.h>
62#include <asm/irq.h>
63#include <asm/dma.h>
64#include <linux/bitops.h>
65#include <asm/types.h>
66#include <linux/termios.h>
67#include <linux/workqueue.h>
68#include <linux/hdlc.h>
69#include <linux/synclink.h>
70
71#if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINKMP_MODULE))
72#define SYNCLINK_GENERIC_HDLC 1
73#else
74#define SYNCLINK_GENERIC_HDLC 0
75#endif
76
77#define GET_USER(error,value,addr) error = get_user(value,addr)
78#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
79#define PUT_USER(error,value,addr) error = put_user(value,addr)
80#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
81
82#include <asm/uaccess.h>
83
84static MGSL_PARAMS default_params = {
85 MGSL_MODE_HDLC,
86 0,
87 HDLC_FLAG_UNDERRUN_ABORT15,
88 HDLC_ENCODING_NRZI_SPACE,
89 0,
90 0xff,
91 HDLC_CRC_16_CCITT,
92 HDLC_PREAMBLE_LENGTH_8BITS,
93 HDLC_PREAMBLE_PATTERN_NONE,
94 9600,
95 8,
96 1,
97 ASYNC_PARITY_NONE
98};
99
100
101#define SCABUFSIZE 1024
102#define SCA_MEM_SIZE 0x40000
103#define SCA_BASE_SIZE 512
104#define SCA_REG_SIZE 16
105#define SCA_MAX_PORTS 4
106#define SCAMAXDESC 128
107
108#define BUFFERLISTSIZE 4096
109
110
111typedef struct _SCADESC
112{
113 u16 next;
114 u16 buf_ptr;
115 u8 buf_base;
116 u8 pad1;
117 u16 length;
118 u8 status;
119 u8 pad2;
120} SCADESC, *PSCADESC;
121
122typedef struct _SCADESC_EX
123{
124
125 char *virt_addr;
126 u16 phys_entry;
127} SCADESC_EX, *PSCADESC_EX;
128
129
130
131#define BH_RECEIVE 1
132#define BH_TRANSMIT 2
133#define BH_STATUS 4
134
135#define IO_PIN_SHUTDOWN_LIMIT 100
136
137struct _input_signal_events {
138 int ri_up;
139 int ri_down;
140 int dsr_up;
141 int dsr_down;
142 int dcd_up;
143 int dcd_down;
144 int cts_up;
145 int cts_down;
146};
147
148
149
150
151typedef struct _synclinkmp_info {
152 void *if_ptr;
153 int magic;
154 struct tty_port port;
155 int line;
156 unsigned short close_delay;
157 unsigned short closing_wait;
158
159 struct mgsl_icount icount;
160
161 int timeout;
162 int x_char;
163 u16 read_status_mask1;
164 u16 read_status_mask2;
165 unsigned char ignore_status_mask1;
166 unsigned char ignore_status_mask2;
167 unsigned char *tx_buf;
168 int tx_put;
169 int tx_get;
170 int tx_count;
171
172 wait_queue_head_t status_event_wait_q;
173 wait_queue_head_t event_wait_q;
174 struct timer_list tx_timer;
175 struct _synclinkmp_info *next_device;
176 struct timer_list status_timer;
177
178 spinlock_t lock;
179 struct work_struct task;
180
181 u32 max_frame_size;
182
183 u32 pending_bh;
184
185 bool bh_running;
186 int isr_overflow;
187 bool bh_requested;
188
189 int dcd_chkcount;
190 int cts_chkcount;
191 int dsr_chkcount;
192 int ri_chkcount;
193
194 char *buffer_list;
195 unsigned long buffer_list_phys;
196
197 unsigned int rx_buf_count;
198 SCADESC *rx_buf_list;
199 SCADESC_EX rx_buf_list_ex[SCAMAXDESC];
200 unsigned int current_rx_buf;
201
202 unsigned int tx_buf_count;
203 SCADESC *tx_buf_list;
204 SCADESC_EX tx_buf_list_ex[SCAMAXDESC];
205 unsigned int last_tx_buf;
206
207 unsigned char *tmp_rx_buf;
208 unsigned int tmp_rx_buf_count;
209
210 bool rx_enabled;
211 bool rx_overflow;
212
213 bool tx_enabled;
214 bool tx_active;
215 u32 idle_mode;
216
217 unsigned char ie0_value;
218 unsigned char ie1_value;
219 unsigned char ie2_value;
220 unsigned char ctrlreg_value;
221 unsigned char old_signals;
222
223 char device_name[25];
224
225 int port_count;
226 int adapter_num;
227 int port_num;
228
229 struct _synclinkmp_info *port_array[SCA_MAX_PORTS];
230
231 unsigned int bus_type;
232
233 unsigned int irq_level;
234 unsigned long irq_flags;
235 bool irq_requested;
236
237 MGSL_PARAMS params;
238
239 unsigned char serial_signals;
240
241 bool irq_occurred;
242 unsigned int init_error;
243
244 u32 last_mem_alloc;
245 unsigned char* memory_base;
246 u32 phys_memory_base;
247 int shared_mem_requested;
248
249 unsigned char* sca_base;
250 u32 phys_sca_base;
251 u32 sca_offset;
252 bool sca_base_requested;
253
254 unsigned char* lcr_base;
255 u32 phys_lcr_base;
256 u32 lcr_offset;
257 int lcr_mem_requested;
258
259 unsigned char* statctrl_base;
260 u32 phys_statctrl_base;
261 u32 statctrl_offset;
262 bool sca_statctrl_requested;
263
264 u32 misc_ctrl_value;
265 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
266 char char_buf[MAX_ASYNC_BUFFER_SIZE];
267 bool drop_rts_on_tx_done;
268
269 struct _input_signal_events input_signal_events;
270
271
272 int netcount;
273 spinlock_t netlock;
274
275#if SYNCLINK_GENERIC_HDLC
276 struct net_device *netdev;
277#endif
278
279} SLMP_INFO;
280
281#define MGSL_MAGIC 0x5401
282
283
284
285
286#define MISCSTATUS_DCD_LATCHED (SerialSignal_DCD<<8)
287#define MISCSTATUS_RI_LATCHED (SerialSignal_RI<<8)
288#define MISCSTATUS_CTS_LATCHED (SerialSignal_CTS<<8)
289#define MISCSTATUS_DSR_LATCHED (SerialSignal_DSR<<8)
290
291
292#define LPR 0x00
293#define PABR0 0x02
294#define PABR1 0x03
295#define WCRL 0x04
296#define WCRM 0x05
297#define WCRH 0x06
298#define DPCR 0x08
299#define DMER 0x09
300#define ISR0 0x10
301#define ISR1 0x11
302#define ISR2 0x12
303#define IER0 0x14
304#define IER1 0x15
305#define IER2 0x16
306#define ITCR 0x18
307#define INTVR 0x1a
308#define IMVR 0x1c
309
310
311#define TRB 0x20
312#define TRBL 0x20
313#define TRBH 0x21
314#define SR0 0x22
315#define SR1 0x23
316#define SR2 0x24
317#define SR3 0x25
318#define FST 0x26
319#define IE0 0x28
320#define IE1 0x29
321#define IE2 0x2a
322#define FIE 0x2b
323#define CMD 0x2c
324#define MD0 0x2e
325#define MD1 0x2f
326#define MD2 0x30
327#define CTL 0x31
328#define SA0 0x32
329#define SA1 0x33
330#define IDL 0x34
331#define TMC 0x35
332#define RXS 0x36
333#define TXS 0x37
334#define TRC0 0x38
335#define TRC1 0x39
336#define RRC 0x3a
337#define CST0 0x3c
338#define CST1 0x3d
339
340
341#define TCNT 0x60
342#define TCNTL 0x60
343#define TCNTH 0x61
344#define TCONR 0x62
345#define TCONRL 0x62
346#define TCONRH 0x63
347#define TMCS 0x64
348#define TEPR 0x65
349
350
351#define DARL 0x80
352#define DARH 0x81
353#define DARB 0x82
354#define BAR 0x80
355#define BARL 0x80
356#define BARH 0x81
357#define BARB 0x82
358#define SAR 0x84
359#define SARL 0x84
360#define SARH 0x85
361#define SARB 0x86
362#define CPB 0x86
363#define CDA 0x88
364#define CDAL 0x88
365#define CDAH 0x89
366#define EDA 0x8a
367#define EDAL 0x8a
368#define EDAH 0x8b
369#define BFL 0x8c
370#define BFLL 0x8c
371#define BFLH 0x8d
372#define BCR 0x8e
373#define BCRL 0x8e
374#define BCRH 0x8f
375#define DSR 0x90
376#define DMR 0x91
377#define FCT 0x93
378#define DIR 0x94
379#define DCMD 0x95
380
381
382#define TIMER0 0x00
383#define TIMER1 0x08
384#define TIMER2 0x10
385#define TIMER3 0x18
386#define RXDMA 0x00
387#define TXDMA 0x20
388
389
390#define NOOP 0x00
391#define TXRESET 0x01
392#define TXENABLE 0x02
393#define TXDISABLE 0x03
394#define TXCRCINIT 0x04
395#define TXCRCEXCL 0x05
396#define TXEOM 0x06
397#define TXABORT 0x07
398#define MPON 0x08
399#define TXBUFCLR 0x09
400#define RXRESET 0x11
401#define RXENABLE 0x12
402#define RXDISABLE 0x13
403#define RXCRCINIT 0x14
404#define RXREJECT 0x15
405#define SEARCHMP 0x16
406#define RXCRCEXCL 0x17
407#define RXCRCCALC 0x18
408#define CHRESET 0x21
409#define HUNT 0x31
410
411
412#define SWABORT 0x01
413#define FEICLEAR 0x02
414
415
416#define TXINTE BIT7
417#define RXINTE BIT6
418#define TXRDYE BIT1
419#define RXRDYE BIT0
420
421
422#define UDRN BIT7
423#define IDLE BIT6
424#define SYNCD BIT4
425#define FLGD BIT4
426#define CCTS BIT3
427#define CDCD BIT2
428#define BRKD BIT1
429#define ABTD BIT1
430#define GAPD BIT1
431#define BRKE BIT0
432#define IDLD BIT0
433
434
435#define EOM BIT7
436#define PMP BIT6
437#define SHRT BIT6
438#define PE BIT5
439#define ABT BIT5
440#define FRME BIT4
441#define RBIT BIT4
442#define OVRN BIT3
443#define CRCE BIT2
444
445
446
447
448
449static SLMP_INFO *synclinkmp_device_list = NULL;
450static int synclinkmp_adapter_count = -1;
451static int synclinkmp_device_count = 0;
452
453
454
455
456
457
458static bool break_on_load = 0;
459
460
461
462
463
464static int ttymajor = 0;
465
466
467
468
469static int debug_level = 0;
470static int maxframe[MAX_DEVICES] = {0,};
471
472module_param(break_on_load, bool, 0);
473module_param(ttymajor, int, 0);
474module_param(debug_level, int, 0);
475module_param_array(maxframe, int, NULL, 0);
476
477static char *driver_name = "SyncLink MultiPort driver";
478static char *driver_version = "$Revision: 4.38 $";
479
480static int synclinkmp_init_one(struct pci_dev *dev,const struct pci_device_id *ent);
481static void synclinkmp_remove_one(struct pci_dev *dev);
482
483static struct pci_device_id synclinkmp_pci_tbl[] = {
484 { PCI_VENDOR_ID_MICROGATE, PCI_DEVICE_ID_MICROGATE_SCA, PCI_ANY_ID, PCI_ANY_ID, },
485 { 0, },
486};
487MODULE_DEVICE_TABLE(pci, synclinkmp_pci_tbl);
488
489MODULE_LICENSE("GPL");
490
491static struct pci_driver synclinkmp_pci_driver = {
492 .name = "synclinkmp",
493 .id_table = synclinkmp_pci_tbl,
494 .probe = synclinkmp_init_one,
495 .remove = __devexit_p(synclinkmp_remove_one),
496};
497
498
499static struct tty_driver *serial_driver;
500
501
502#define WAKEUP_CHARS 256
503
504
505
506
507static int open(struct tty_struct *tty, struct file * filp);
508static void close(struct tty_struct *tty, struct file * filp);
509static void hangup(struct tty_struct *tty);
510static void set_termios(struct tty_struct *tty, struct ktermios *old_termios);
511
512static int write(struct tty_struct *tty, const unsigned char *buf, int count);
513static int put_char(struct tty_struct *tty, unsigned char ch);
514static void send_xchar(struct tty_struct *tty, char ch);
515static void wait_until_sent(struct tty_struct *tty, int timeout);
516static int write_room(struct tty_struct *tty);
517static void flush_chars(struct tty_struct *tty);
518static void flush_buffer(struct tty_struct *tty);
519static void tx_hold(struct tty_struct *tty);
520static void tx_release(struct tty_struct *tty);
521
522static int ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg);
523static int chars_in_buffer(struct tty_struct *tty);
524static void throttle(struct tty_struct * tty);
525static void unthrottle(struct tty_struct * tty);
526static int set_break(struct tty_struct *tty, int break_state);
527
528#if SYNCLINK_GENERIC_HDLC
529#define dev_to_port(D) (dev_to_hdlc(D)->priv)
530static void hdlcdev_tx_done(SLMP_INFO *info);
531static void hdlcdev_rx(SLMP_INFO *info, char *buf, int size);
532static int hdlcdev_init(SLMP_INFO *info);
533static void hdlcdev_exit(SLMP_INFO *info);
534#endif
535
536
537
538static int get_stats(SLMP_INFO *info, struct mgsl_icount __user *user_icount);
539static int get_params(SLMP_INFO *info, MGSL_PARAMS __user *params);
540static int set_params(SLMP_INFO *info, MGSL_PARAMS __user *params);
541static int get_txidle(SLMP_INFO *info, int __user *idle_mode);
542static int set_txidle(SLMP_INFO *info, int idle_mode);
543static int tx_enable(SLMP_INFO *info, int enable);
544static int tx_abort(SLMP_INFO *info);
545static int rx_enable(SLMP_INFO *info, int enable);
546static int modem_input_wait(SLMP_INFO *info,int arg);
547static int wait_mgsl_event(SLMP_INFO *info, int __user *mask_ptr);
548static int tiocmget(struct tty_struct *tty);
549static int tiocmset(struct tty_struct *tty,
550 unsigned int set, unsigned int clear);
551static int set_break(struct tty_struct *tty, int break_state);
552
553static void add_device(SLMP_INFO *info);
554static void device_init(int adapter_num, struct pci_dev *pdev);
555static int claim_resources(SLMP_INFO *info);
556static void release_resources(SLMP_INFO *info);
557
558static int startup(SLMP_INFO *info);
559static int block_til_ready(struct tty_struct *tty, struct file * filp,SLMP_INFO *info);
560static int carrier_raised(struct tty_port *port);
561static void shutdown(SLMP_INFO *info);
562static void program_hw(SLMP_INFO *info);
563static void change_params(SLMP_INFO *info);
564
565static bool init_adapter(SLMP_INFO *info);
566static bool register_test(SLMP_INFO *info);
567static bool irq_test(SLMP_INFO *info);
568static bool loopback_test(SLMP_INFO *info);
569static int adapter_test(SLMP_INFO *info);
570static bool memory_test(SLMP_INFO *info);
571
572static void reset_adapter(SLMP_INFO *info);
573static void reset_port(SLMP_INFO *info);
574static void async_mode(SLMP_INFO *info);
575static void hdlc_mode(SLMP_INFO *info);
576
577static void rx_stop(SLMP_INFO *info);
578static void rx_start(SLMP_INFO *info);
579static void rx_reset_buffers(SLMP_INFO *info);
580static void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int last);
581static bool rx_get_frame(SLMP_INFO *info);
582
583static void tx_start(SLMP_INFO *info);
584static void tx_stop(SLMP_INFO *info);
585static void tx_load_fifo(SLMP_INFO *info);
586static void tx_set_idle(SLMP_INFO *info);
587static void tx_load_dma_buffer(SLMP_INFO *info, const char *buf, unsigned int count);
588
589static void get_signals(SLMP_INFO *info);
590static void set_signals(SLMP_INFO *info);
591static void enable_loopback(SLMP_INFO *info, int enable);
592static void set_rate(SLMP_INFO *info, u32 data_rate);
593
594static int bh_action(SLMP_INFO *info);
595static void bh_handler(struct work_struct *work);
596static void bh_receive(SLMP_INFO *info);
597static void bh_transmit(SLMP_INFO *info);
598static void bh_status(SLMP_INFO *info);
599static void isr_timer(SLMP_INFO *info);
600static void isr_rxint(SLMP_INFO *info);
601static void isr_rxrdy(SLMP_INFO *info);
602static void isr_txint(SLMP_INFO *info);
603static void isr_txrdy(SLMP_INFO *info);
604static void isr_rxdmaok(SLMP_INFO *info);
605static void isr_rxdmaerror(SLMP_INFO *info);
606static void isr_txdmaok(SLMP_INFO *info);
607static void isr_txdmaerror(SLMP_INFO *info);
608static void isr_io_pin(SLMP_INFO *info, u16 status);
609
610static int alloc_dma_bufs(SLMP_INFO *info);
611static void free_dma_bufs(SLMP_INFO *info);
612static int alloc_buf_list(SLMP_INFO *info);
613static int alloc_frame_bufs(SLMP_INFO *info, SCADESC *list, SCADESC_EX *list_ex,int count);
614static int alloc_tmp_rx_buf(SLMP_INFO *info);
615static void free_tmp_rx_buf(SLMP_INFO *info);
616
617static void load_pci_memory(SLMP_INFO *info, char* dest, const char* src, unsigned short count);
618static void trace_block(SLMP_INFO *info, const char* data, int count, int xmit);
619static void tx_timeout(unsigned long context);
620static void status_timeout(unsigned long context);
621
622static unsigned char read_reg(SLMP_INFO *info, unsigned char addr);
623static void write_reg(SLMP_INFO *info, unsigned char addr, unsigned char val);
624static u16 read_reg16(SLMP_INFO *info, unsigned char addr);
625static void write_reg16(SLMP_INFO *info, unsigned char addr, u16 val);
626static unsigned char read_status_reg(SLMP_INFO * info);
627static void write_control_reg(SLMP_INFO * info);
628
629
630static unsigned char rx_active_fifo_level = 16;
631static unsigned char tx_active_fifo_level = 16;
632static unsigned char tx_negate_fifo_level = 32;
633
634static u32 misc_ctrl_value = 0x007e4040;
635static u32 lcr1_brdr_value = 0x00800028;
636
637static u32 read_ahead_count = 8;
638
639
640
641
642
643
644
645
646
647
648
649
650static unsigned char dma_priority = 0x04;
651
652
653
654static u32 sca_pci_load_interval = 64;
655
656
657
658
659
660
661
662static void* synclinkmp_get_text_ptr(void);
663static void* synclinkmp_get_text_ptr(void) {return synclinkmp_get_text_ptr;}
664
665static inline int sanity_check(SLMP_INFO *info,
666 char *name, const char *routine)
667{
668#ifdef SANITY_CHECK
669 static const char *badmagic =
670 "Warning: bad magic number for synclinkmp_struct (%s) in %s\n";
671 static const char *badinfo =
672 "Warning: null synclinkmp_struct for (%s) in %s\n";
673
674 if (!info) {
675 printk(badinfo, name, routine);
676 return 1;
677 }
678 if (info->magic != MGSL_MAGIC) {
679 printk(badmagic, name, routine);
680 return 1;
681 }
682#else
683 if (!info)
684 return 1;
685#endif
686 return 0;
687}
688
689
690
691
692
693
694
695
696
697
698static void ldisc_receive_buf(struct tty_struct *tty,
699 const __u8 *data, char *flags, int count)
700{
701 struct tty_ldisc *ld;
702 if (!tty)
703 return;
704 ld = tty_ldisc_ref(tty);
705 if (ld) {
706 if (ld->ops->receive_buf)
707 ld->ops->receive_buf(tty, data, flags, count);
708 tty_ldisc_deref(ld);
709 }
710}
711
712
713
714static int install(struct tty_driver *driver, struct tty_struct *tty)
715{
716 SLMP_INFO *info;
717 int line = tty->index;
718
719 if (line >= synclinkmp_device_count) {
720 printk("%s(%d): open with invalid line #%d.\n",
721 __FILE__,__LINE__,line);
722 return -ENODEV;
723 }
724
725 info = synclinkmp_device_list;
726 while (info && info->line != line)
727 info = info->next_device;
728 if (sanity_check(info, tty->name, "open"))
729 return -ENODEV;
730 if (info->init_error) {
731 printk("%s(%d):%s device is not allocated, init error=%d\n",
732 __FILE__, __LINE__, info->device_name,
733 info->init_error);
734 return -ENODEV;
735 }
736
737 tty->driver_data = info;
738
739 return tty_port_install(&info->port, driver, tty);
740}
741
742
743
744static int open(struct tty_struct *tty, struct file *filp)
745{
746 SLMP_INFO *info = tty->driver_data;
747 unsigned long flags;
748 int retval;
749
750 info->port.tty = tty;
751
752 if (debug_level >= DEBUG_LEVEL_INFO)
753 printk("%s(%d):%s open(), old ref count = %d\n",
754 __FILE__,__LINE__,tty->driver->name, info->port.count);
755
756
757 if (tty_hung_up_p(filp) || info->port.flags & ASYNC_CLOSING){
758 if (info->port.flags & ASYNC_CLOSING)
759 interruptible_sleep_on(&info->port.close_wait);
760 retval = ((info->port.flags & ASYNC_HUP_NOTIFY) ?
761 -EAGAIN : -ERESTARTSYS);
762 goto cleanup;
763 }
764
765 info->port.tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
766
767 spin_lock_irqsave(&info->netlock, flags);
768 if (info->netcount) {
769 retval = -EBUSY;
770 spin_unlock_irqrestore(&info->netlock, flags);
771 goto cleanup;
772 }
773 info->port.count++;
774 spin_unlock_irqrestore(&info->netlock, flags);
775
776 if (info->port.count == 1) {
777
778 retval = startup(info);
779 if (retval < 0)
780 goto cleanup;
781 }
782
783 retval = block_til_ready(tty, filp, info);
784 if (retval) {
785 if (debug_level >= DEBUG_LEVEL_INFO)
786 printk("%s(%d):%s block_til_ready() returned %d\n",
787 __FILE__,__LINE__, info->device_name, retval);
788 goto cleanup;
789 }
790
791 if (debug_level >= DEBUG_LEVEL_INFO)
792 printk("%s(%d):%s open() success\n",
793 __FILE__,__LINE__, info->device_name);
794 retval = 0;
795
796cleanup:
797 if (retval) {
798 if (tty->count == 1)
799 info->port.tty = NULL;
800 if(info->port.count)
801 info->port.count--;
802 }
803
804 return retval;
805}
806
807
808
809
810static void close(struct tty_struct *tty, struct file *filp)
811{
812 SLMP_INFO * info = tty->driver_data;
813
814 if (sanity_check(info, tty->name, "close"))
815 return;
816
817 if (debug_level >= DEBUG_LEVEL_INFO)
818 printk("%s(%d):%s close() entry, count=%d\n",
819 __FILE__,__LINE__, info->device_name, info->port.count);
820
821 if (tty_port_close_start(&info->port, tty, filp) == 0)
822 goto cleanup;
823
824 mutex_lock(&info->port.mutex);
825 if (info->port.flags & ASYNC_INITIALIZED)
826 wait_until_sent(tty, info->timeout);
827
828 flush_buffer(tty);
829 tty_ldisc_flush(tty);
830 shutdown(info);
831 mutex_unlock(&info->port.mutex);
832
833 tty_port_close_end(&info->port, tty);
834 info->port.tty = NULL;
835cleanup:
836 if (debug_level >= DEBUG_LEVEL_INFO)
837 printk("%s(%d):%s close() exit, count=%d\n", __FILE__,__LINE__,
838 tty->driver->name, info->port.count);
839}
840
841
842
843
844static void hangup(struct tty_struct *tty)
845{
846 SLMP_INFO *info = tty->driver_data;
847 unsigned long flags;
848
849 if (debug_level >= DEBUG_LEVEL_INFO)
850 printk("%s(%d):%s hangup()\n",
851 __FILE__,__LINE__, info->device_name );
852
853 if (sanity_check(info, tty->name, "hangup"))
854 return;
855
856 mutex_lock(&info->port.mutex);
857 flush_buffer(tty);
858 shutdown(info);
859
860 spin_lock_irqsave(&info->port.lock, flags);
861 info->port.count = 0;
862 info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
863 info->port.tty = NULL;
864 spin_unlock_irqrestore(&info->port.lock, flags);
865 mutex_unlock(&info->port.mutex);
866
867 wake_up_interruptible(&info->port.open_wait);
868}
869
870
871
872static void set_termios(struct tty_struct *tty, struct ktermios *old_termios)
873{
874 SLMP_INFO *info = tty->driver_data;
875 unsigned long flags;
876
877 if (debug_level >= DEBUG_LEVEL_INFO)
878 printk("%s(%d):%s set_termios()\n", __FILE__,__LINE__,
879 tty->driver->name );
880
881 change_params(info);
882
883
884 if (old_termios->c_cflag & CBAUD &&
885 !(tty->termios.c_cflag & CBAUD)) {
886 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
887 spin_lock_irqsave(&info->lock,flags);
888 set_signals(info);
889 spin_unlock_irqrestore(&info->lock,flags);
890 }
891
892
893 if (!(old_termios->c_cflag & CBAUD) &&
894 tty->termios.c_cflag & CBAUD) {
895 info->serial_signals |= SerialSignal_DTR;
896 if (!(tty->termios.c_cflag & CRTSCTS) ||
897 !test_bit(TTY_THROTTLED, &tty->flags)) {
898 info->serial_signals |= SerialSignal_RTS;
899 }
900 spin_lock_irqsave(&info->lock,flags);
901 set_signals(info);
902 spin_unlock_irqrestore(&info->lock,flags);
903 }
904
905
906 if (old_termios->c_cflag & CRTSCTS &&
907 !(tty->termios.c_cflag & CRTSCTS)) {
908 tty->hw_stopped = 0;
909 tx_release(tty);
910 }
911}
912
913
914
915
916
917
918
919
920
921
922
923static int write(struct tty_struct *tty,
924 const unsigned char *buf, int count)
925{
926 int c, ret = 0;
927 SLMP_INFO *info = tty->driver_data;
928 unsigned long flags;
929
930 if (debug_level >= DEBUG_LEVEL_INFO)
931 printk("%s(%d):%s write() count=%d\n",
932 __FILE__,__LINE__,info->device_name,count);
933
934 if (sanity_check(info, tty->name, "write"))
935 goto cleanup;
936
937 if (!info->tx_buf)
938 goto cleanup;
939
940 if (info->params.mode == MGSL_MODE_HDLC) {
941 if (count > info->max_frame_size) {
942 ret = -EIO;
943 goto cleanup;
944 }
945 if (info->tx_active)
946 goto cleanup;
947 if (info->tx_count) {
948
949
950 tx_load_dma_buffer(info, info->tx_buf, info->tx_count);
951 goto start;
952 }
953 ret = info->tx_count = count;
954 tx_load_dma_buffer(info, buf, count);
955 goto start;
956 }
957
958 for (;;) {
959 c = min_t(int, count,
960 min(info->max_frame_size - info->tx_count - 1,
961 info->max_frame_size - info->tx_put));
962 if (c <= 0)
963 break;
964
965 memcpy(info->tx_buf + info->tx_put, buf, c);
966
967 spin_lock_irqsave(&info->lock,flags);
968 info->tx_put += c;
969 if (info->tx_put >= info->max_frame_size)
970 info->tx_put -= info->max_frame_size;
971 info->tx_count += c;
972 spin_unlock_irqrestore(&info->lock,flags);
973
974 buf += c;
975 count -= c;
976 ret += c;
977 }
978
979 if (info->params.mode == MGSL_MODE_HDLC) {
980 if (count) {
981 ret = info->tx_count = 0;
982 goto cleanup;
983 }
984 tx_load_dma_buffer(info, info->tx_buf, info->tx_count);
985 }
986start:
987 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
988 spin_lock_irqsave(&info->lock,flags);
989 if (!info->tx_active)
990 tx_start(info);
991 spin_unlock_irqrestore(&info->lock,flags);
992 }
993
994cleanup:
995 if (debug_level >= DEBUG_LEVEL_INFO)
996 printk( "%s(%d):%s write() returning=%d\n",
997 __FILE__,__LINE__,info->device_name,ret);
998 return ret;
999}
1000
1001
1002
1003static int put_char(struct tty_struct *tty, unsigned char ch)
1004{
1005 SLMP_INFO *info = tty->driver_data;
1006 unsigned long flags;
1007 int ret = 0;
1008
1009 if ( debug_level >= DEBUG_LEVEL_INFO ) {
1010 printk( "%s(%d):%s put_char(%d)\n",
1011 __FILE__,__LINE__,info->device_name,ch);
1012 }
1013
1014 if (sanity_check(info, tty->name, "put_char"))
1015 return 0;
1016
1017 if (!info->tx_buf)
1018 return 0;
1019
1020 spin_lock_irqsave(&info->lock,flags);
1021
1022 if ( (info->params.mode != MGSL_MODE_HDLC) ||
1023 !info->tx_active ) {
1024
1025 if (info->tx_count < info->max_frame_size - 1) {
1026 info->tx_buf[info->tx_put++] = ch;
1027 if (info->tx_put >= info->max_frame_size)
1028 info->tx_put -= info->max_frame_size;
1029 info->tx_count++;
1030 ret = 1;
1031 }
1032 }
1033
1034 spin_unlock_irqrestore(&info->lock,flags);
1035 return ret;
1036}
1037
1038
1039
1040static void send_xchar(struct tty_struct *tty, char ch)
1041{
1042 SLMP_INFO *info = tty->driver_data;
1043 unsigned long flags;
1044
1045 if (debug_level >= DEBUG_LEVEL_INFO)
1046 printk("%s(%d):%s send_xchar(%d)\n",
1047 __FILE__,__LINE__, info->device_name, ch );
1048
1049 if (sanity_check(info, tty->name, "send_xchar"))
1050 return;
1051
1052 info->x_char = ch;
1053 if (ch) {
1054
1055 spin_lock_irqsave(&info->lock,flags);
1056 if (!info->tx_enabled)
1057 tx_start(info);
1058 spin_unlock_irqrestore(&info->lock,flags);
1059 }
1060}
1061
1062
1063
1064static void wait_until_sent(struct tty_struct *tty, int timeout)
1065{
1066 SLMP_INFO * info = tty->driver_data;
1067 unsigned long orig_jiffies, char_time;
1068
1069 if (!info )
1070 return;
1071
1072 if (debug_level >= DEBUG_LEVEL_INFO)
1073 printk("%s(%d):%s wait_until_sent() entry\n",
1074 __FILE__,__LINE__, info->device_name );
1075
1076 if (sanity_check(info, tty->name, "wait_until_sent"))
1077 return;
1078
1079 if (!test_bit(ASYNCB_INITIALIZED, &info->port.flags))
1080 goto exit;
1081
1082 orig_jiffies = jiffies;
1083
1084
1085
1086
1087
1088
1089
1090 if ( info->params.data_rate ) {
1091 char_time = info->timeout/(32 * 5);
1092 if (!char_time)
1093 char_time++;
1094 } else
1095 char_time = 1;
1096
1097 if (timeout)
1098 char_time = min_t(unsigned long, char_time, timeout);
1099
1100 if ( info->params.mode == MGSL_MODE_HDLC ) {
1101 while (info->tx_active) {
1102 msleep_interruptible(jiffies_to_msecs(char_time));
1103 if (signal_pending(current))
1104 break;
1105 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1106 break;
1107 }
1108 } else {
1109
1110
1111
1112
1113 while ( info->tx_active && info->tx_enabled) {
1114 msleep_interruptible(jiffies_to_msecs(char_time));
1115 if (signal_pending(current))
1116 break;
1117 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1118 break;
1119 }
1120 }
1121
1122exit:
1123 if (debug_level >= DEBUG_LEVEL_INFO)
1124 printk("%s(%d):%s wait_until_sent() exit\n",
1125 __FILE__,__LINE__, info->device_name );
1126}
1127
1128
1129
1130static int write_room(struct tty_struct *tty)
1131{
1132 SLMP_INFO *info = tty->driver_data;
1133 int ret;
1134
1135 if (sanity_check(info, tty->name, "write_room"))
1136 return 0;
1137
1138 if (info->params.mode == MGSL_MODE_HDLC) {
1139 ret = (info->tx_active) ? 0 : HDLC_MAX_FRAME_SIZE;
1140 } else {
1141 ret = info->max_frame_size - info->tx_count - 1;
1142 if (ret < 0)
1143 ret = 0;
1144 }
1145
1146 if (debug_level >= DEBUG_LEVEL_INFO)
1147 printk("%s(%d):%s write_room()=%d\n",
1148 __FILE__, __LINE__, info->device_name, ret);
1149
1150 return ret;
1151}
1152
1153
1154
1155static void flush_chars(struct tty_struct *tty)
1156{
1157 SLMP_INFO *info = tty->driver_data;
1158 unsigned long flags;
1159
1160 if ( debug_level >= DEBUG_LEVEL_INFO )
1161 printk( "%s(%d):%s flush_chars() entry tx_count=%d\n",
1162 __FILE__,__LINE__,info->device_name,info->tx_count);
1163
1164 if (sanity_check(info, tty->name, "flush_chars"))
1165 return;
1166
1167 if (info->tx_count <= 0 || tty->stopped || tty->hw_stopped ||
1168 !info->tx_buf)
1169 return;
1170
1171 if ( debug_level >= DEBUG_LEVEL_INFO )
1172 printk( "%s(%d):%s flush_chars() entry, starting transmitter\n",
1173 __FILE__,__LINE__,info->device_name );
1174
1175 spin_lock_irqsave(&info->lock,flags);
1176
1177 if (!info->tx_active) {
1178 if ( (info->params.mode == MGSL_MODE_HDLC) &&
1179 info->tx_count ) {
1180
1181
1182
1183 tx_load_dma_buffer(info,
1184 info->tx_buf,info->tx_count);
1185 }
1186 tx_start(info);
1187 }
1188
1189 spin_unlock_irqrestore(&info->lock,flags);
1190}
1191
1192
1193
1194static void flush_buffer(struct tty_struct *tty)
1195{
1196 SLMP_INFO *info = tty->driver_data;
1197 unsigned long flags;
1198
1199 if (debug_level >= DEBUG_LEVEL_INFO)
1200 printk("%s(%d):%s flush_buffer() entry\n",
1201 __FILE__,__LINE__, info->device_name );
1202
1203 if (sanity_check(info, tty->name, "flush_buffer"))
1204 return;
1205
1206 spin_lock_irqsave(&info->lock,flags);
1207 info->tx_count = info->tx_put = info->tx_get = 0;
1208 del_timer(&info->tx_timer);
1209 spin_unlock_irqrestore(&info->lock,flags);
1210
1211 tty_wakeup(tty);
1212}
1213
1214
1215
1216static void tx_hold(struct tty_struct *tty)
1217{
1218 SLMP_INFO *info = tty->driver_data;
1219 unsigned long flags;
1220
1221 if (sanity_check(info, tty->name, "tx_hold"))
1222 return;
1223
1224 if ( debug_level >= DEBUG_LEVEL_INFO )
1225 printk("%s(%d):%s tx_hold()\n",
1226 __FILE__,__LINE__,info->device_name);
1227
1228 spin_lock_irqsave(&info->lock,flags);
1229 if (info->tx_enabled)
1230 tx_stop(info);
1231 spin_unlock_irqrestore(&info->lock,flags);
1232}
1233
1234
1235
1236static void tx_release(struct tty_struct *tty)
1237{
1238 SLMP_INFO *info = tty->driver_data;
1239 unsigned long flags;
1240
1241 if (sanity_check(info, tty->name, "tx_release"))
1242 return;
1243
1244 if ( debug_level >= DEBUG_LEVEL_INFO )
1245 printk("%s(%d):%s tx_release()\n",
1246 __FILE__,__LINE__,info->device_name);
1247
1248 spin_lock_irqsave(&info->lock,flags);
1249 if (!info->tx_enabled)
1250 tx_start(info);
1251 spin_unlock_irqrestore(&info->lock,flags);
1252}
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264static int ioctl(struct tty_struct *tty,
1265 unsigned int cmd, unsigned long arg)
1266{
1267 SLMP_INFO *info = tty->driver_data;
1268 void __user *argp = (void __user *)arg;
1269
1270 if (debug_level >= DEBUG_LEVEL_INFO)
1271 printk("%s(%d):%s ioctl() cmd=%08X\n", __FILE__,__LINE__,
1272 info->device_name, cmd );
1273
1274 if (sanity_check(info, tty->name, "ioctl"))
1275 return -ENODEV;
1276
1277 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
1278 (cmd != TIOCMIWAIT)) {
1279 if (tty->flags & (1 << TTY_IO_ERROR))
1280 return -EIO;
1281 }
1282
1283 switch (cmd) {
1284 case MGSL_IOCGPARAMS:
1285 return get_params(info, argp);
1286 case MGSL_IOCSPARAMS:
1287 return set_params(info, argp);
1288 case MGSL_IOCGTXIDLE:
1289 return get_txidle(info, argp);
1290 case MGSL_IOCSTXIDLE:
1291 return set_txidle(info, (int)arg);
1292 case MGSL_IOCTXENABLE:
1293 return tx_enable(info, (int)arg);
1294 case MGSL_IOCRXENABLE:
1295 return rx_enable(info, (int)arg);
1296 case MGSL_IOCTXABORT:
1297 return tx_abort(info);
1298 case MGSL_IOCGSTATS:
1299 return get_stats(info, argp);
1300 case MGSL_IOCWAITEVENT:
1301 return wait_mgsl_event(info, argp);
1302 case MGSL_IOCLOOPTXDONE:
1303 return 0;
1304
1305
1306
1307 case TIOCMIWAIT:
1308 return modem_input_wait(info,(int)arg);
1309
1310
1311
1312
1313
1314
1315
1316 default:
1317 return -ENOIOCTLCMD;
1318 }
1319 return 0;
1320}
1321
1322static int get_icount(struct tty_struct *tty,
1323 struct serial_icounter_struct *icount)
1324{
1325 SLMP_INFO *info = tty->driver_data;
1326 struct mgsl_icount cnow;
1327 unsigned long flags;
1328
1329 spin_lock_irqsave(&info->lock,flags);
1330 cnow = info->icount;
1331 spin_unlock_irqrestore(&info->lock,flags);
1332
1333 icount->cts = cnow.cts;
1334 icount->dsr = cnow.dsr;
1335 icount->rng = cnow.rng;
1336 icount->dcd = cnow.dcd;
1337 icount->rx = cnow.rx;
1338 icount->tx = cnow.tx;
1339 icount->frame = cnow.frame;
1340 icount->overrun = cnow.overrun;
1341 icount->parity = cnow.parity;
1342 icount->brk = cnow.brk;
1343 icount->buf_overrun = cnow.buf_overrun;
1344
1345 return 0;
1346}
1347
1348
1349
1350
1351
1352static inline void line_info(struct seq_file *m, SLMP_INFO *info)
1353{
1354 char stat_buf[30];
1355 unsigned long flags;
1356
1357 seq_printf(m, "%s: SCABase=%08x Mem=%08X StatusControl=%08x LCR=%08X\n"
1358 "\tIRQ=%d MaxFrameSize=%u\n",
1359 info->device_name,
1360 info->phys_sca_base,
1361 info->phys_memory_base,
1362 info->phys_statctrl_base,
1363 info->phys_lcr_base,
1364 info->irq_level,
1365 info->max_frame_size );
1366
1367
1368 spin_lock_irqsave(&info->lock,flags);
1369 get_signals(info);
1370 spin_unlock_irqrestore(&info->lock,flags);
1371
1372 stat_buf[0] = 0;
1373 stat_buf[1] = 0;
1374 if (info->serial_signals & SerialSignal_RTS)
1375 strcat(stat_buf, "|RTS");
1376 if (info->serial_signals & SerialSignal_CTS)
1377 strcat(stat_buf, "|CTS");
1378 if (info->serial_signals & SerialSignal_DTR)
1379 strcat(stat_buf, "|DTR");
1380 if (info->serial_signals & SerialSignal_DSR)
1381 strcat(stat_buf, "|DSR");
1382 if (info->serial_signals & SerialSignal_DCD)
1383 strcat(stat_buf, "|CD");
1384 if (info->serial_signals & SerialSignal_RI)
1385 strcat(stat_buf, "|RI");
1386
1387 if (info->params.mode == MGSL_MODE_HDLC) {
1388 seq_printf(m, "\tHDLC txok:%d rxok:%d",
1389 info->icount.txok, info->icount.rxok);
1390 if (info->icount.txunder)
1391 seq_printf(m, " txunder:%d", info->icount.txunder);
1392 if (info->icount.txabort)
1393 seq_printf(m, " txabort:%d", info->icount.txabort);
1394 if (info->icount.rxshort)
1395 seq_printf(m, " rxshort:%d", info->icount.rxshort);
1396 if (info->icount.rxlong)
1397 seq_printf(m, " rxlong:%d", info->icount.rxlong);
1398 if (info->icount.rxover)
1399 seq_printf(m, " rxover:%d", info->icount.rxover);
1400 if (info->icount.rxcrc)
1401 seq_printf(m, " rxlong:%d", info->icount.rxcrc);
1402 } else {
1403 seq_printf(m, "\tASYNC tx:%d rx:%d",
1404 info->icount.tx, info->icount.rx);
1405 if (info->icount.frame)
1406 seq_printf(m, " fe:%d", info->icount.frame);
1407 if (info->icount.parity)
1408 seq_printf(m, " pe:%d", info->icount.parity);
1409 if (info->icount.brk)
1410 seq_printf(m, " brk:%d", info->icount.brk);
1411 if (info->icount.overrun)
1412 seq_printf(m, " oe:%d", info->icount.overrun);
1413 }
1414
1415
1416 seq_printf(m, " %s\n", stat_buf+1);
1417
1418 seq_printf(m, "\ttxactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
1419 info->tx_active,info->bh_requested,info->bh_running,
1420 info->pending_bh);
1421}
1422
1423
1424
1425static int synclinkmp_proc_show(struct seq_file *m, void *v)
1426{
1427 SLMP_INFO *info;
1428
1429 seq_printf(m, "synclinkmp driver:%s\n", driver_version);
1430
1431 info = synclinkmp_device_list;
1432 while( info ) {
1433 line_info(m, info);
1434 info = info->next_device;
1435 }
1436 return 0;
1437}
1438
1439static int synclinkmp_proc_open(struct inode *inode, struct file *file)
1440{
1441 return single_open(file, synclinkmp_proc_show, NULL);
1442}
1443
1444static const struct file_operations synclinkmp_proc_fops = {
1445 .owner = THIS_MODULE,
1446 .open = synclinkmp_proc_open,
1447 .read = seq_read,
1448 .llseek = seq_lseek,
1449 .release = single_release,
1450};
1451
1452
1453
1454static int chars_in_buffer(struct tty_struct *tty)
1455{
1456 SLMP_INFO *info = tty->driver_data;
1457
1458 if (sanity_check(info, tty->name, "chars_in_buffer"))
1459 return 0;
1460
1461 if (debug_level >= DEBUG_LEVEL_INFO)
1462 printk("%s(%d):%s chars_in_buffer()=%d\n",
1463 __FILE__, __LINE__, info->device_name, info->tx_count);
1464
1465 return info->tx_count;
1466}
1467
1468
1469
1470static void throttle(struct tty_struct * tty)
1471{
1472 SLMP_INFO *info = tty->driver_data;
1473 unsigned long flags;
1474
1475 if (debug_level >= DEBUG_LEVEL_INFO)
1476 printk("%s(%d):%s throttle() entry\n",
1477 __FILE__,__LINE__, info->device_name );
1478
1479 if (sanity_check(info, tty->name, "throttle"))
1480 return;
1481
1482 if (I_IXOFF(tty))
1483 send_xchar(tty, STOP_CHAR(tty));
1484
1485 if (tty->termios.c_cflag & CRTSCTS) {
1486 spin_lock_irqsave(&info->lock,flags);
1487 info->serial_signals &= ~SerialSignal_RTS;
1488 set_signals(info);
1489 spin_unlock_irqrestore(&info->lock,flags);
1490 }
1491}
1492
1493
1494
1495static void unthrottle(struct tty_struct * tty)
1496{
1497 SLMP_INFO *info = tty->driver_data;
1498 unsigned long flags;
1499
1500 if (debug_level >= DEBUG_LEVEL_INFO)
1501 printk("%s(%d):%s unthrottle() entry\n",
1502 __FILE__,__LINE__, info->device_name );
1503
1504 if (sanity_check(info, tty->name, "unthrottle"))
1505 return;
1506
1507 if (I_IXOFF(tty)) {
1508 if (info->x_char)
1509 info->x_char = 0;
1510 else
1511 send_xchar(tty, START_CHAR(tty));
1512 }
1513
1514 if (tty->termios.c_cflag & CRTSCTS) {
1515 spin_lock_irqsave(&info->lock,flags);
1516 info->serial_signals |= SerialSignal_RTS;
1517 set_signals(info);
1518 spin_unlock_irqrestore(&info->lock,flags);
1519 }
1520}
1521
1522
1523
1524
1525static int set_break(struct tty_struct *tty, int break_state)
1526{
1527 unsigned char RegValue;
1528 SLMP_INFO * info = tty->driver_data;
1529 unsigned long flags;
1530
1531 if (debug_level >= DEBUG_LEVEL_INFO)
1532 printk("%s(%d):%s set_break(%d)\n",
1533 __FILE__,__LINE__, info->device_name, break_state);
1534
1535 if (sanity_check(info, tty->name, "set_break"))
1536 return -EINVAL;
1537
1538 spin_lock_irqsave(&info->lock,flags);
1539 RegValue = read_reg(info, CTL);
1540 if (break_state == -1)
1541 RegValue |= BIT3;
1542 else
1543 RegValue &= ~BIT3;
1544 write_reg(info, CTL, RegValue);
1545 spin_unlock_irqrestore(&info->lock,flags);
1546 return 0;
1547}
1548
1549#if SYNCLINK_GENERIC_HDLC
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
1562 unsigned short parity)
1563{
1564 SLMP_INFO *info = dev_to_port(dev);
1565 unsigned char new_encoding;
1566 unsigned short new_crctype;
1567
1568
1569 if (info->port.count)
1570 return -EBUSY;
1571
1572 switch (encoding)
1573 {
1574 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
1575 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
1576 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
1577 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
1578 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
1579 default: return -EINVAL;
1580 }
1581
1582 switch (parity)
1583 {
1584 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
1585 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
1586 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
1587 default: return -EINVAL;
1588 }
1589
1590 info->params.encoding = new_encoding;
1591 info->params.crc_type = new_crctype;
1592
1593
1594 if (info->netcount)
1595 program_hw(info);
1596
1597 return 0;
1598}
1599
1600
1601
1602
1603
1604
1605
1606static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
1607 struct net_device *dev)
1608{
1609 SLMP_INFO *info = dev_to_port(dev);
1610 unsigned long flags;
1611
1612 if (debug_level >= DEBUG_LEVEL_INFO)
1613 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
1614
1615
1616 netif_stop_queue(dev);
1617
1618
1619 info->tx_count = skb->len;
1620 tx_load_dma_buffer(info, skb->data, skb->len);
1621
1622
1623 dev->stats.tx_packets++;
1624 dev->stats.tx_bytes += skb->len;
1625
1626
1627 dev_kfree_skb(skb);
1628
1629
1630 dev->trans_start = jiffies;
1631
1632
1633 spin_lock_irqsave(&info->lock,flags);
1634 if (!info->tx_active)
1635 tx_start(info);
1636 spin_unlock_irqrestore(&info->lock,flags);
1637
1638 return NETDEV_TX_OK;
1639}
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649static int hdlcdev_open(struct net_device *dev)
1650{
1651 SLMP_INFO *info = dev_to_port(dev);
1652 int rc;
1653 unsigned long flags;
1654
1655 if (debug_level >= DEBUG_LEVEL_INFO)
1656 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
1657
1658
1659 if ((rc = hdlc_open(dev)))
1660 return rc;
1661
1662
1663 spin_lock_irqsave(&info->netlock, flags);
1664 if (info->port.count != 0 || info->netcount != 0) {
1665 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
1666 spin_unlock_irqrestore(&info->netlock, flags);
1667 return -EBUSY;
1668 }
1669 info->netcount=1;
1670 spin_unlock_irqrestore(&info->netlock, flags);
1671
1672
1673 if ((rc = startup(info)) != 0) {
1674 spin_lock_irqsave(&info->netlock, flags);
1675 info->netcount=0;
1676 spin_unlock_irqrestore(&info->netlock, flags);
1677 return rc;
1678 }
1679
1680
1681 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1682 program_hw(info);
1683
1684
1685 dev->trans_start = jiffies;
1686 netif_start_queue(dev);
1687
1688
1689 spin_lock_irqsave(&info->lock, flags);
1690 get_signals(info);
1691 spin_unlock_irqrestore(&info->lock, flags);
1692 if (info->serial_signals & SerialSignal_DCD)
1693 netif_carrier_on(dev);
1694 else
1695 netif_carrier_off(dev);
1696 return 0;
1697}
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707static int hdlcdev_close(struct net_device *dev)
1708{
1709 SLMP_INFO *info = dev_to_port(dev);
1710 unsigned long flags;
1711
1712 if (debug_level >= DEBUG_LEVEL_INFO)
1713 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
1714
1715 netif_stop_queue(dev);
1716
1717
1718 shutdown(info);
1719
1720 hdlc_close(dev);
1721
1722 spin_lock_irqsave(&info->netlock, flags);
1723 info->netcount=0;
1724 spin_unlock_irqrestore(&info->netlock, flags);
1725
1726 return 0;
1727}
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1739{
1740 const size_t size = sizeof(sync_serial_settings);
1741 sync_serial_settings new_line;
1742 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
1743 SLMP_INFO *info = dev_to_port(dev);
1744 unsigned int flags;
1745
1746 if (debug_level >= DEBUG_LEVEL_INFO)
1747 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
1748
1749
1750 if (info->port.count)
1751 return -EBUSY;
1752
1753 if (cmd != SIOCWANDEV)
1754 return hdlc_ioctl(dev, ifr, cmd);
1755
1756 switch(ifr->ifr_settings.type) {
1757 case IF_GET_IFACE:
1758
1759 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
1760 if (ifr->ifr_settings.size < size) {
1761 ifr->ifr_settings.size = size;
1762 return -ENOBUFS;
1763 }
1764
1765 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1766 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
1767 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
1768 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
1769
1770 switch (flags){
1771 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
1772 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
1773 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
1774 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
1775 default: new_line.clock_type = CLOCK_DEFAULT;
1776 }
1777
1778 new_line.clock_rate = info->params.clock_speed;
1779 new_line.loopback = info->params.loopback ? 1:0;
1780
1781 if (copy_to_user(line, &new_line, size))
1782 return -EFAULT;
1783 return 0;
1784
1785 case IF_IFACE_SYNC_SERIAL:
1786
1787 if(!capable(CAP_NET_ADMIN))
1788 return -EPERM;
1789 if (copy_from_user(&new_line, line, size))
1790 return -EFAULT;
1791
1792 switch (new_line.clock_type)
1793 {
1794 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
1795 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
1796 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
1797 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
1798 case CLOCK_DEFAULT: flags = info->params.flags &
1799 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1800 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
1801 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
1802 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
1803 default: return -EINVAL;
1804 }
1805
1806 if (new_line.loopback != 0 && new_line.loopback != 1)
1807 return -EINVAL;
1808
1809 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1810 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
1811 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
1812 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
1813 info->params.flags |= flags;
1814
1815 info->params.loopback = new_line.loopback;
1816
1817 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
1818 info->params.clock_speed = new_line.clock_rate;
1819 else
1820 info->params.clock_speed = 0;
1821
1822
1823 if (info->netcount)
1824 program_hw(info);
1825 return 0;
1826
1827 default:
1828 return hdlc_ioctl(dev, ifr, cmd);
1829 }
1830}
1831
1832
1833
1834
1835
1836
1837static void hdlcdev_tx_timeout(struct net_device *dev)
1838{
1839 SLMP_INFO *info = dev_to_port(dev);
1840 unsigned long flags;
1841
1842 if (debug_level >= DEBUG_LEVEL_INFO)
1843 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
1844
1845 dev->stats.tx_errors++;
1846 dev->stats.tx_aborted_errors++;
1847
1848 spin_lock_irqsave(&info->lock,flags);
1849 tx_stop(info);
1850 spin_unlock_irqrestore(&info->lock,flags);
1851
1852 netif_wake_queue(dev);
1853}
1854
1855
1856
1857
1858
1859
1860
1861static void hdlcdev_tx_done(SLMP_INFO *info)
1862{
1863 if (netif_queue_stopped(info->netdev))
1864 netif_wake_queue(info->netdev);
1865}
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875static void hdlcdev_rx(SLMP_INFO *info, char *buf, int size)
1876{
1877 struct sk_buff *skb = dev_alloc_skb(size);
1878 struct net_device *dev = info->netdev;
1879
1880 if (debug_level >= DEBUG_LEVEL_INFO)
1881 printk("hdlcdev_rx(%s)\n",dev->name);
1882
1883 if (skb == NULL) {
1884 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n",
1885 dev->name);
1886 dev->stats.rx_dropped++;
1887 return;
1888 }
1889
1890 memcpy(skb_put(skb, size), buf, size);
1891
1892 skb->protocol = hdlc_type_trans(skb, dev);
1893
1894 dev->stats.rx_packets++;
1895 dev->stats.rx_bytes += size;
1896
1897 netif_rx(skb);
1898}
1899
1900static const struct net_device_ops hdlcdev_ops = {
1901 .ndo_open = hdlcdev_open,
1902 .ndo_stop = hdlcdev_close,
1903 .ndo_change_mtu = hdlc_change_mtu,
1904 .ndo_start_xmit = hdlc_start_xmit,
1905 .ndo_do_ioctl = hdlcdev_ioctl,
1906 .ndo_tx_timeout = hdlcdev_tx_timeout,
1907};
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917static int hdlcdev_init(SLMP_INFO *info)
1918{
1919 int rc;
1920 struct net_device *dev;
1921 hdlc_device *hdlc;
1922
1923
1924
1925 if (!(dev = alloc_hdlcdev(info))) {
1926 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
1927 return -ENOMEM;
1928 }
1929
1930
1931 dev->mem_start = info->phys_sca_base;
1932 dev->mem_end = info->phys_sca_base + SCA_BASE_SIZE - 1;
1933 dev->irq = info->irq_level;
1934
1935
1936 dev->netdev_ops = &hdlcdev_ops;
1937 dev->watchdog_timeo = 10 * HZ;
1938 dev->tx_queue_len = 50;
1939
1940
1941 hdlc = dev_to_hdlc(dev);
1942 hdlc->attach = hdlcdev_attach;
1943 hdlc->xmit = hdlcdev_xmit;
1944
1945
1946 if ((rc = register_hdlc_device(dev))) {
1947 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
1948 free_netdev(dev);
1949 return rc;
1950 }
1951
1952 info->netdev = dev;
1953 return 0;
1954}
1955
1956
1957
1958
1959
1960
1961
1962static void hdlcdev_exit(SLMP_INFO *info)
1963{
1964 unregister_hdlc_device(info->netdev);
1965 free_netdev(info->netdev);
1966 info->netdev = NULL;
1967}
1968
1969#endif
1970
1971
1972
1973
1974
1975static int bh_action(SLMP_INFO *info)
1976{
1977 unsigned long flags;
1978 int rc = 0;
1979
1980 spin_lock_irqsave(&info->lock,flags);
1981
1982 if (info->pending_bh & BH_RECEIVE) {
1983 info->pending_bh &= ~BH_RECEIVE;
1984 rc = BH_RECEIVE;
1985 } else if (info->pending_bh & BH_TRANSMIT) {
1986 info->pending_bh &= ~BH_TRANSMIT;
1987 rc = BH_TRANSMIT;
1988 } else if (info->pending_bh & BH_STATUS) {
1989 info->pending_bh &= ~BH_STATUS;
1990 rc = BH_STATUS;
1991 }
1992
1993 if (!rc) {
1994
1995 info->bh_running = false;
1996 info->bh_requested = false;
1997 }
1998
1999 spin_unlock_irqrestore(&info->lock,flags);
2000
2001 return rc;
2002}
2003
2004
2005
2006static void bh_handler(struct work_struct *work)
2007{
2008 SLMP_INFO *info = container_of(work, SLMP_INFO, task);
2009 int action;
2010
2011 if (!info)
2012 return;
2013
2014 if ( debug_level >= DEBUG_LEVEL_BH )
2015 printk( "%s(%d):%s bh_handler() entry\n",
2016 __FILE__,__LINE__,info->device_name);
2017
2018 info->bh_running = true;
2019
2020 while((action = bh_action(info)) != 0) {
2021
2022
2023 if ( debug_level >= DEBUG_LEVEL_BH )
2024 printk( "%s(%d):%s bh_handler() work item action=%d\n",
2025 __FILE__,__LINE__,info->device_name, action);
2026
2027 switch (action) {
2028
2029 case BH_RECEIVE:
2030 bh_receive(info);
2031 break;
2032 case BH_TRANSMIT:
2033 bh_transmit(info);
2034 break;
2035 case BH_STATUS:
2036 bh_status(info);
2037 break;
2038 default:
2039
2040 printk("%s(%d):%s Unknown work item ID=%08X!\n",
2041 __FILE__,__LINE__,info->device_name,action);
2042 break;
2043 }
2044 }
2045
2046 if ( debug_level >= DEBUG_LEVEL_BH )
2047 printk( "%s(%d):%s bh_handler() exit\n",
2048 __FILE__,__LINE__,info->device_name);
2049}
2050
2051static void bh_receive(SLMP_INFO *info)
2052{
2053 if ( debug_level >= DEBUG_LEVEL_BH )
2054 printk( "%s(%d):%s bh_receive()\n",
2055 __FILE__,__LINE__,info->device_name);
2056
2057 while( rx_get_frame(info) );
2058}
2059
2060static void bh_transmit(SLMP_INFO *info)
2061{
2062 struct tty_struct *tty = info->port.tty;
2063
2064 if ( debug_level >= DEBUG_LEVEL_BH )
2065 printk( "%s(%d):%s bh_transmit() entry\n",
2066 __FILE__,__LINE__,info->device_name);
2067
2068 if (tty)
2069 tty_wakeup(tty);
2070}
2071
2072static void bh_status(SLMP_INFO *info)
2073{
2074 if ( debug_level >= DEBUG_LEVEL_BH )
2075 printk( "%s(%d):%s bh_status() entry\n",
2076 __FILE__,__LINE__,info->device_name);
2077
2078 info->ri_chkcount = 0;
2079 info->dsr_chkcount = 0;
2080 info->dcd_chkcount = 0;
2081 info->cts_chkcount = 0;
2082}
2083
2084static void isr_timer(SLMP_INFO * info)
2085{
2086 unsigned char timer = (info->port_num & 1) ? TIMER2 : TIMER0;
2087
2088
2089 write_reg(info, IER2, 0);
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101 write_reg(info, (unsigned char)(timer + TMCS), 0);
2102
2103 info->irq_occurred = true;
2104
2105 if ( debug_level >= DEBUG_LEVEL_ISR )
2106 printk("%s(%d):%s isr_timer()\n",
2107 __FILE__,__LINE__,info->device_name);
2108}
2109
2110static void isr_rxint(SLMP_INFO * info)
2111{
2112 struct tty_struct *tty = info->port.tty;
2113 struct mgsl_icount *icount = &info->icount;
2114 unsigned char status = read_reg(info, SR1) & info->ie1_value & (FLGD + IDLD + CDCD + BRKD);
2115 unsigned char status2 = read_reg(info, SR2) & info->ie2_value & OVRN;
2116
2117
2118 if (status)
2119 write_reg(info, SR1, status);
2120
2121 if (status2)
2122 write_reg(info, SR2, status2);
2123
2124 if ( debug_level >= DEBUG_LEVEL_ISR )
2125 printk("%s(%d):%s isr_rxint status=%02X %02x\n",
2126 __FILE__,__LINE__,info->device_name,status,status2);
2127
2128 if (info->params.mode == MGSL_MODE_ASYNC) {
2129 if (status & BRKD) {
2130 icount->brk++;
2131
2132
2133
2134
2135 if ( tty ) {
2136 if (!(status & info->ignore_status_mask1)) {
2137 if (info->read_status_mask1 & BRKD) {
2138 tty_insert_flip_char(tty, 0, TTY_BREAK);
2139 if (info->port.flags & ASYNC_SAK)
2140 do_SAK(tty);
2141 }
2142 }
2143 }
2144 }
2145 }
2146 else {
2147 if (status & (FLGD|IDLD)) {
2148 if (status & FLGD)
2149 info->icount.exithunt++;
2150 else if (status & IDLD)
2151 info->icount.rxidle++;
2152 wake_up_interruptible(&info->event_wait_q);
2153 }
2154 }
2155
2156 if (status & CDCD) {
2157
2158
2159
2160 get_signals( info );
2161 isr_io_pin(info,
2162 MISCSTATUS_DCD_LATCHED|(info->serial_signals&SerialSignal_DCD));
2163 }
2164}
2165
2166
2167
2168
2169static void isr_rxrdy(SLMP_INFO * info)
2170{
2171 u16 status;
2172 unsigned char DataByte;
2173 struct tty_struct *tty = info->port.tty;
2174 struct mgsl_icount *icount = &info->icount;
2175
2176 if ( debug_level >= DEBUG_LEVEL_ISR )
2177 printk("%s(%d):%s isr_rxrdy\n",
2178 __FILE__,__LINE__,info->device_name);
2179
2180 while((status = read_reg(info,CST0)) & BIT0)
2181 {
2182 int flag = 0;
2183 bool over = false;
2184 DataByte = read_reg(info,TRB);
2185
2186 icount->rx++;
2187
2188 if ( status & (PE + FRME + OVRN) ) {
2189 printk("%s(%d):%s rxerr=%04X\n",
2190 __FILE__,__LINE__,info->device_name,status);
2191
2192
2193 if (status & PE)
2194 icount->parity++;
2195 else if (status & FRME)
2196 icount->frame++;
2197 else if (status & OVRN)
2198 icount->overrun++;
2199
2200
2201 if (status & info->ignore_status_mask2)
2202 continue;
2203
2204 status &= info->read_status_mask2;
2205
2206 if ( tty ) {
2207 if (status & PE)
2208 flag = TTY_PARITY;
2209 else if (status & FRME)
2210 flag = TTY_FRAME;
2211 if (status & OVRN) {
2212
2213
2214
2215
2216 over = true;
2217 }
2218 }
2219 }
2220
2221 if ( tty ) {
2222 tty_insert_flip_char(tty, DataByte, flag);
2223 if (over)
2224 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
2225 }
2226 }
2227
2228 if ( debug_level >= DEBUG_LEVEL_ISR ) {
2229 printk("%s(%d):%s rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
2230 __FILE__,__LINE__,info->device_name,
2231 icount->rx,icount->brk,icount->parity,
2232 icount->frame,icount->overrun);
2233 }
2234
2235 if ( tty )
2236 tty_flip_buffer_push(tty);
2237}
2238
2239static void isr_txeom(SLMP_INFO * info, unsigned char status)
2240{
2241 if ( debug_level >= DEBUG_LEVEL_ISR )
2242 printk("%s(%d):%s isr_txeom status=%02x\n",
2243 __FILE__,__LINE__,info->device_name,status);
2244
2245 write_reg(info, TXDMA + DIR, 0x00);
2246 write_reg(info, TXDMA + DSR, 0xc0);
2247 write_reg(info, TXDMA + DCMD, SWABORT);
2248
2249 if (status & UDRN) {
2250 write_reg(info, CMD, TXRESET);
2251 write_reg(info, CMD, TXENABLE);
2252 } else
2253 write_reg(info, CMD, TXBUFCLR);
2254
2255
2256 info->ie0_value &= ~TXRDYE;
2257 info->ie1_value &= ~(IDLE + UDRN);
2258 write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));
2259 write_reg(info, SR1, (unsigned char)(UDRN + IDLE));
2260
2261 if ( info->tx_active ) {
2262 if (info->params.mode != MGSL_MODE_ASYNC) {
2263 if (status & UDRN)
2264 info->icount.txunder++;
2265 else if (status & IDLE)
2266 info->icount.txok++;
2267 }
2268
2269 info->tx_active = false;
2270 info->tx_count = info->tx_put = info->tx_get = 0;
2271
2272 del_timer(&info->tx_timer);
2273
2274 if (info->params.mode != MGSL_MODE_ASYNC && info->drop_rts_on_tx_done ) {
2275 info->serial_signals &= ~SerialSignal_RTS;
2276 info->drop_rts_on_tx_done = false;
2277 set_signals(info);
2278 }
2279
2280#if SYNCLINK_GENERIC_HDLC
2281 if (info->netcount)
2282 hdlcdev_tx_done(info);
2283 else
2284#endif
2285 {
2286 if (info->port.tty && (info->port.tty->stopped || info->port.tty->hw_stopped)) {
2287 tx_stop(info);
2288 return;
2289 }
2290 info->pending_bh |= BH_TRANSMIT;
2291 }
2292 }
2293}
2294
2295
2296
2297
2298
2299static void isr_txint(SLMP_INFO * info)
2300{
2301 unsigned char status = read_reg(info, SR1) & info->ie1_value & (UDRN + IDLE + CCTS);
2302
2303
2304 write_reg(info, SR1, status);
2305
2306 if ( debug_level >= DEBUG_LEVEL_ISR )
2307 printk("%s(%d):%s isr_txint status=%02x\n",
2308 __FILE__,__LINE__,info->device_name,status);
2309
2310 if (status & (UDRN + IDLE))
2311 isr_txeom(info, status);
2312
2313 if (status & CCTS) {
2314
2315
2316
2317 get_signals( info );
2318 isr_io_pin(info,
2319 MISCSTATUS_CTS_LATCHED|(info->serial_signals&SerialSignal_CTS));
2320
2321 }
2322}
2323
2324
2325
2326
2327static void isr_txrdy(SLMP_INFO * info)
2328{
2329 if ( debug_level >= DEBUG_LEVEL_ISR )
2330 printk("%s(%d):%s isr_txrdy() tx_count=%d\n",
2331 __FILE__,__LINE__,info->device_name,info->tx_count);
2332
2333 if (info->params.mode != MGSL_MODE_ASYNC) {
2334
2335 info->ie0_value &= ~TXRDYE;
2336 info->ie1_value |= IDLE;
2337 write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));
2338 return;
2339 }
2340
2341 if (info->port.tty && (info->port.tty->stopped || info->port.tty->hw_stopped)) {
2342 tx_stop(info);
2343 return;
2344 }
2345
2346 if ( info->tx_count )
2347 tx_load_fifo( info );
2348 else {
2349 info->tx_active = false;
2350 info->ie0_value &= ~TXRDYE;
2351 write_reg(info, IE0, info->ie0_value);
2352 }
2353
2354 if (info->tx_count < WAKEUP_CHARS)
2355 info->pending_bh |= BH_TRANSMIT;
2356}
2357
2358static void isr_rxdmaok(SLMP_INFO * info)
2359{
2360
2361
2362
2363 unsigned char status = read_reg(info,RXDMA + DSR) & 0xc0;
2364
2365
2366 write_reg(info, RXDMA + DSR, (unsigned char)(status | 1));
2367
2368 if ( debug_level >= DEBUG_LEVEL_ISR )
2369 printk("%s(%d):%s isr_rxdmaok(), status=%02x\n",
2370 __FILE__,__LINE__,info->device_name,status);
2371
2372 info->pending_bh |= BH_RECEIVE;
2373}
2374
2375static void isr_rxdmaerror(SLMP_INFO * info)
2376{
2377
2378
2379
2380 unsigned char status = read_reg(info,RXDMA + DSR) & 0x30;
2381
2382
2383 write_reg(info, RXDMA + DSR, (unsigned char)(status | 1));
2384
2385 if ( debug_level >= DEBUG_LEVEL_ISR )
2386 printk("%s(%d):%s isr_rxdmaerror(), status=%02x\n",
2387 __FILE__,__LINE__,info->device_name,status);
2388
2389 info->rx_overflow = true;
2390 info->pending_bh |= BH_RECEIVE;
2391}
2392
2393static void isr_txdmaok(SLMP_INFO * info)
2394{
2395 unsigned char status_reg1 = read_reg(info, SR1);
2396
2397 write_reg(info, TXDMA + DIR, 0x00);
2398 write_reg(info, TXDMA + DSR, 0xc0);
2399 write_reg(info, TXDMA + DCMD, SWABORT);
2400
2401 if ( debug_level >= DEBUG_LEVEL_ISR )
2402 printk("%s(%d):%s isr_txdmaok(), status=%02x\n",
2403 __FILE__,__LINE__,info->device_name,status_reg1);
2404
2405
2406 write_reg16(info, TRC0, 0);
2407 info->ie0_value |= TXRDYE;
2408 write_reg(info, IE0, info->ie0_value);
2409}
2410
2411static void isr_txdmaerror(SLMP_INFO * info)
2412{
2413
2414
2415
2416 unsigned char status = read_reg(info,TXDMA + DSR) & 0x30;
2417
2418
2419 write_reg(info, TXDMA + DSR, (unsigned char)(status | 1));
2420
2421 if ( debug_level >= DEBUG_LEVEL_ISR )
2422 printk("%s(%d):%s isr_txdmaerror(), status=%02x\n",
2423 __FILE__,__LINE__,info->device_name,status);
2424}
2425
2426
2427
2428static void isr_io_pin( SLMP_INFO *info, u16 status )
2429{
2430 struct mgsl_icount *icount;
2431
2432 if ( debug_level >= DEBUG_LEVEL_ISR )
2433 printk("%s(%d):isr_io_pin status=%04X\n",
2434 __FILE__,__LINE__,status);
2435
2436 if (status & (MISCSTATUS_CTS_LATCHED | MISCSTATUS_DCD_LATCHED |
2437 MISCSTATUS_DSR_LATCHED | MISCSTATUS_RI_LATCHED) ) {
2438 icount = &info->icount;
2439
2440 if (status & MISCSTATUS_RI_LATCHED) {
2441 icount->rng++;
2442 if ( status & SerialSignal_RI )
2443 info->input_signal_events.ri_up++;
2444 else
2445 info->input_signal_events.ri_down++;
2446 }
2447 if (status & MISCSTATUS_DSR_LATCHED) {
2448 icount->dsr++;
2449 if ( status & SerialSignal_DSR )
2450 info->input_signal_events.dsr_up++;
2451 else
2452 info->input_signal_events.dsr_down++;
2453 }
2454 if (status & MISCSTATUS_DCD_LATCHED) {
2455 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) {
2456 info->ie1_value &= ~CDCD;
2457 write_reg(info, IE1, info->ie1_value);
2458 }
2459 icount->dcd++;
2460 if (status & SerialSignal_DCD) {
2461 info->input_signal_events.dcd_up++;
2462 } else
2463 info->input_signal_events.dcd_down++;
2464#if SYNCLINK_GENERIC_HDLC
2465 if (info->netcount) {
2466 if (status & SerialSignal_DCD)
2467 netif_carrier_on(info->netdev);
2468 else
2469 netif_carrier_off(info->netdev);
2470 }
2471#endif
2472 }
2473 if (status & MISCSTATUS_CTS_LATCHED)
2474 {
2475 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) {
2476 info->ie1_value &= ~CCTS;
2477 write_reg(info, IE1, info->ie1_value);
2478 }
2479 icount->cts++;
2480 if ( status & SerialSignal_CTS )
2481 info->input_signal_events.cts_up++;
2482 else
2483 info->input_signal_events.cts_down++;
2484 }
2485 wake_up_interruptible(&info->status_event_wait_q);
2486 wake_up_interruptible(&info->event_wait_q);
2487
2488 if ( (info->port.flags & ASYNC_CHECK_CD) &&
2489 (status & MISCSTATUS_DCD_LATCHED) ) {
2490 if ( debug_level >= DEBUG_LEVEL_ISR )
2491 printk("%s CD now %s...", info->device_name,
2492 (status & SerialSignal_DCD) ? "on" : "off");
2493 if (status & SerialSignal_DCD)
2494 wake_up_interruptible(&info->port.open_wait);
2495 else {
2496 if ( debug_level >= DEBUG_LEVEL_ISR )
2497 printk("doing serial hangup...");
2498 if (info->port.tty)
2499 tty_hangup(info->port.tty);
2500 }
2501 }
2502
2503 if (tty_port_cts_enabled(&info->port) &&
2504 (status & MISCSTATUS_CTS_LATCHED) ) {
2505 if ( info->port.tty ) {
2506 if (info->port.tty->hw_stopped) {
2507 if (status & SerialSignal_CTS) {
2508 if ( debug_level >= DEBUG_LEVEL_ISR )
2509 printk("CTS tx start...");
2510 info->port.tty->hw_stopped = 0;
2511 tx_start(info);
2512 info->pending_bh |= BH_TRANSMIT;
2513 return;
2514 }
2515 } else {
2516 if (!(status & SerialSignal_CTS)) {
2517 if ( debug_level >= DEBUG_LEVEL_ISR )
2518 printk("CTS tx stop...");
2519 info->port.tty->hw_stopped = 1;
2520 tx_stop(info);
2521 }
2522 }
2523 }
2524 }
2525 }
2526
2527 info->pending_bh |= BH_STATUS;
2528}
2529
2530
2531
2532
2533
2534
2535
2536
2537static irqreturn_t synclinkmp_interrupt(int dummy, void *dev_id)
2538{
2539 SLMP_INFO *info = dev_id;
2540 unsigned char status, status0, status1=0;
2541 unsigned char dmastatus, dmastatus0, dmastatus1=0;
2542 unsigned char timerstatus0, timerstatus1=0;
2543 unsigned char shift;
2544 unsigned int i;
2545 unsigned short tmp;
2546
2547 if ( debug_level >= DEBUG_LEVEL_ISR )
2548 printk(KERN_DEBUG "%s(%d): synclinkmp_interrupt(%d)entry.\n",
2549 __FILE__, __LINE__, info->irq_level);
2550
2551 spin_lock(&info->lock);
2552
2553 for(;;) {
2554
2555
2556 tmp = read_reg16(info, ISR0);
2557 status0 = (unsigned char)tmp;
2558 dmastatus0 = (unsigned char)(tmp>>8);
2559 timerstatus0 = read_reg(info, ISR2);
2560
2561 if ( debug_level >= DEBUG_LEVEL_ISR )
2562 printk(KERN_DEBUG "%s(%d):%s status0=%02x, dmastatus0=%02x, timerstatus0=%02x\n",
2563 __FILE__, __LINE__, info->device_name,
2564 status0, dmastatus0, timerstatus0);
2565
2566 if (info->port_count == 4) {
2567
2568 tmp = read_reg16(info->port_array[2], ISR0);
2569 status1 = (unsigned char)tmp;
2570 dmastatus1 = (unsigned char)(tmp>>8);
2571 timerstatus1 = read_reg(info->port_array[2], ISR2);
2572
2573 if ( debug_level >= DEBUG_LEVEL_ISR )
2574 printk("%s(%d):%s status1=%02x, dmastatus1=%02x, timerstatus1=%02x\n",
2575 __FILE__,__LINE__,info->device_name,
2576 status1,dmastatus1,timerstatus1);
2577 }
2578
2579 if (!status0 && !dmastatus0 && !timerstatus0 &&
2580 !status1 && !dmastatus1 && !timerstatus1)
2581 break;
2582
2583 for(i=0; i < info->port_count ; i++) {
2584 if (info->port_array[i] == NULL)
2585 continue;
2586 if (i < 2) {
2587 status = status0;
2588 dmastatus = dmastatus0;
2589 } else {
2590 status = status1;
2591 dmastatus = dmastatus1;
2592 }
2593
2594 shift = i & 1 ? 4 :0;
2595
2596 if (status & BIT0 << shift)
2597 isr_rxrdy(info->port_array[i]);
2598 if (status & BIT1 << shift)
2599 isr_txrdy(info->port_array[i]);
2600 if (status & BIT2 << shift)
2601 isr_rxint(info->port_array[i]);
2602 if (status & BIT3 << shift)
2603 isr_txint(info->port_array[i]);
2604
2605 if (dmastatus & BIT0 << shift)
2606 isr_rxdmaerror(info->port_array[i]);
2607 if (dmastatus & BIT1 << shift)
2608 isr_rxdmaok(info->port_array[i]);
2609 if (dmastatus & BIT2 << shift)
2610 isr_txdmaerror(info->port_array[i]);
2611 if (dmastatus & BIT3 << shift)
2612 isr_txdmaok(info->port_array[i]);
2613 }
2614
2615 if (timerstatus0 & (BIT5 | BIT4))
2616 isr_timer(info->port_array[0]);
2617 if (timerstatus0 & (BIT7 | BIT6))
2618 isr_timer(info->port_array[1]);
2619 if (timerstatus1 & (BIT5 | BIT4))
2620 isr_timer(info->port_array[2]);
2621 if (timerstatus1 & (BIT7 | BIT6))
2622 isr_timer(info->port_array[3]);
2623 }
2624
2625 for(i=0; i < info->port_count ; i++) {
2626 SLMP_INFO * port = info->port_array[i];
2627
2628
2629
2630
2631
2632
2633
2634
2635 if ( port && (port->port.count || port->netcount) &&
2636 port->pending_bh && !port->bh_running &&
2637 !port->bh_requested ) {
2638 if ( debug_level >= DEBUG_LEVEL_ISR )
2639 printk("%s(%d):%s queueing bh task.\n",
2640 __FILE__,__LINE__,port->device_name);
2641 schedule_work(&port->task);
2642 port->bh_requested = true;
2643 }
2644 }
2645
2646 spin_unlock(&info->lock);
2647
2648 if ( debug_level >= DEBUG_LEVEL_ISR )
2649 printk(KERN_DEBUG "%s(%d):synclinkmp_interrupt(%d)exit.\n",
2650 __FILE__, __LINE__, info->irq_level);
2651 return IRQ_HANDLED;
2652}
2653
2654
2655
2656static int startup(SLMP_INFO * info)
2657{
2658 if ( debug_level >= DEBUG_LEVEL_INFO )
2659 printk("%s(%d):%s tx_releaseup()\n",__FILE__,__LINE__,info->device_name);
2660
2661 if (info->port.flags & ASYNC_INITIALIZED)
2662 return 0;
2663
2664 if (!info->tx_buf) {
2665 info->tx_buf = kmalloc(info->max_frame_size, GFP_KERNEL);
2666 if (!info->tx_buf) {
2667 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
2668 __FILE__,__LINE__,info->device_name);
2669 return -ENOMEM;
2670 }
2671 }
2672
2673 info->pending_bh = 0;
2674
2675 memset(&info->icount, 0, sizeof(info->icount));
2676
2677
2678 reset_port(info);
2679
2680 change_params(info);
2681
2682 mod_timer(&info->status_timer, jiffies + msecs_to_jiffies(10));
2683
2684 if (info->port.tty)
2685 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2686
2687 info->port.flags |= ASYNC_INITIALIZED;
2688
2689 return 0;
2690}
2691
2692
2693
2694static void shutdown(SLMP_INFO * info)
2695{
2696 unsigned long flags;
2697
2698 if (!(info->port.flags & ASYNC_INITIALIZED))
2699 return;
2700
2701 if (debug_level >= DEBUG_LEVEL_INFO)
2702 printk("%s(%d):%s synclinkmp_shutdown()\n",
2703 __FILE__,__LINE__, info->device_name );
2704
2705
2706
2707 wake_up_interruptible(&info->status_event_wait_q);
2708 wake_up_interruptible(&info->event_wait_q);
2709
2710 del_timer(&info->tx_timer);
2711 del_timer(&info->status_timer);
2712
2713 kfree(info->tx_buf);
2714 info->tx_buf = NULL;
2715
2716 spin_lock_irqsave(&info->lock,flags);
2717
2718 reset_port(info);
2719
2720 if (!info->port.tty || info->port.tty->termios.c_cflag & HUPCL) {
2721 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
2722 set_signals(info);
2723 }
2724
2725 spin_unlock_irqrestore(&info->lock,flags);
2726
2727 if (info->port.tty)
2728 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
2729
2730 info->port.flags &= ~ASYNC_INITIALIZED;
2731}
2732
2733static void program_hw(SLMP_INFO *info)
2734{
2735 unsigned long flags;
2736
2737 spin_lock_irqsave(&info->lock,flags);
2738
2739 rx_stop(info);
2740 tx_stop(info);
2741
2742 info->tx_count = info->tx_put = info->tx_get = 0;
2743
2744 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
2745 hdlc_mode(info);
2746 else
2747 async_mode(info);
2748
2749 set_signals(info);
2750
2751 info->dcd_chkcount = 0;
2752 info->cts_chkcount = 0;
2753 info->ri_chkcount = 0;
2754 info->dsr_chkcount = 0;
2755
2756 info->ie1_value |= (CDCD|CCTS);
2757 write_reg(info, IE1, info->ie1_value);
2758
2759 get_signals(info);
2760
2761 if (info->netcount || (info->port.tty && info->port.tty->termios.c_cflag & CREAD) )
2762 rx_start(info);
2763
2764 spin_unlock_irqrestore(&info->lock,flags);
2765}
2766
2767
2768
2769static void change_params(SLMP_INFO *info)
2770{
2771 unsigned cflag;
2772 int bits_per_char;
2773
2774 if (!info->port.tty)
2775 return;
2776
2777 if (debug_level >= DEBUG_LEVEL_INFO)
2778 printk("%s(%d):%s change_params()\n",
2779 __FILE__,__LINE__, info->device_name );
2780
2781 cflag = info->port.tty->termios.c_cflag;
2782
2783
2784
2785 if (cflag & CBAUD)
2786 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2787 else
2788 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2789
2790
2791
2792 switch (cflag & CSIZE) {
2793 case CS5: info->params.data_bits = 5; break;
2794 case CS6: info->params.data_bits = 6; break;
2795 case CS7: info->params.data_bits = 7; break;
2796 case CS8: info->params.data_bits = 8; break;
2797
2798 default: info->params.data_bits = 7; break;
2799 }
2800
2801 if (cflag & CSTOPB)
2802 info->params.stop_bits = 2;
2803 else
2804 info->params.stop_bits = 1;
2805
2806 info->params.parity = ASYNC_PARITY_NONE;
2807 if (cflag & PARENB) {
2808 if (cflag & PARODD)
2809 info->params.parity = ASYNC_PARITY_ODD;
2810 else
2811 info->params.parity = ASYNC_PARITY_EVEN;
2812#ifdef CMSPAR
2813 if (cflag & CMSPAR)
2814 info->params.parity = ASYNC_PARITY_SPACE;
2815#endif
2816 }
2817
2818
2819
2820
2821 bits_per_char = info->params.data_bits +
2822 info->params.stop_bits + 1;
2823
2824
2825
2826
2827
2828 if (info->params.data_rate <= 460800) {
2829 info->params.data_rate = tty_get_baud_rate(info->port.tty);
2830 }
2831
2832 if ( info->params.data_rate ) {
2833 info->timeout = (32*HZ*bits_per_char) /
2834 info->params.data_rate;
2835 }
2836 info->timeout += HZ/50;
2837
2838 if (cflag & CRTSCTS)
2839 info->port.flags |= ASYNC_CTS_FLOW;
2840 else
2841 info->port.flags &= ~ASYNC_CTS_FLOW;
2842
2843 if (cflag & CLOCAL)
2844 info->port.flags &= ~ASYNC_CHECK_CD;
2845 else
2846 info->port.flags |= ASYNC_CHECK_CD;
2847
2848
2849
2850 info->read_status_mask2 = OVRN;
2851 if (I_INPCK(info->port.tty))
2852 info->read_status_mask2 |= PE | FRME;
2853 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
2854 info->read_status_mask1 |= BRKD;
2855 if (I_IGNPAR(info->port.tty))
2856 info->ignore_status_mask2 |= PE | FRME;
2857 if (I_IGNBRK(info->port.tty)) {
2858 info->ignore_status_mask1 |= BRKD;
2859
2860
2861
2862 if (I_IGNPAR(info->port.tty))
2863 info->ignore_status_mask2 |= OVRN;
2864 }
2865
2866 program_hw(info);
2867}
2868
2869static int get_stats(SLMP_INFO * info, struct mgsl_icount __user *user_icount)
2870{
2871 int err;
2872
2873 if (debug_level >= DEBUG_LEVEL_INFO)
2874 printk("%s(%d):%s get_params()\n",
2875 __FILE__,__LINE__, info->device_name);
2876
2877 if (!user_icount) {
2878 memset(&info->icount, 0, sizeof(info->icount));
2879 } else {
2880 mutex_lock(&info->port.mutex);
2881 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
2882 mutex_unlock(&info->port.mutex);
2883 if (err)
2884 return -EFAULT;
2885 }
2886
2887 return 0;
2888}
2889
2890static int get_params(SLMP_INFO * info, MGSL_PARAMS __user *user_params)
2891{
2892 int err;
2893 if (debug_level >= DEBUG_LEVEL_INFO)
2894 printk("%s(%d):%s get_params()\n",
2895 __FILE__,__LINE__, info->device_name);
2896
2897 mutex_lock(&info->port.mutex);
2898 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
2899 mutex_unlock(&info->port.mutex);
2900 if (err) {
2901 if ( debug_level >= DEBUG_LEVEL_INFO )
2902 printk( "%s(%d):%s get_params() user buffer copy failed\n",
2903 __FILE__,__LINE__,info->device_name);
2904 return -EFAULT;
2905 }
2906
2907 return 0;
2908}
2909
2910static int set_params(SLMP_INFO * info, MGSL_PARAMS __user *new_params)
2911{
2912 unsigned long flags;
2913 MGSL_PARAMS tmp_params;
2914 int err;
2915
2916 if (debug_level >= DEBUG_LEVEL_INFO)
2917 printk("%s(%d):%s set_params\n",
2918 __FILE__,__LINE__,info->device_name );
2919 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
2920 if (err) {
2921 if ( debug_level >= DEBUG_LEVEL_INFO )
2922 printk( "%s(%d):%s set_params() user buffer copy failed\n",
2923 __FILE__,__LINE__,info->device_name);
2924 return -EFAULT;
2925 }
2926
2927 mutex_lock(&info->port.mutex);
2928 spin_lock_irqsave(&info->lock,flags);
2929 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
2930 spin_unlock_irqrestore(&info->lock,flags);
2931
2932 change_params(info);
2933 mutex_unlock(&info->port.mutex);
2934
2935 return 0;
2936}
2937
2938static int get_txidle(SLMP_INFO * info, int __user *idle_mode)
2939{
2940 int err;
2941
2942 if (debug_level >= DEBUG_LEVEL_INFO)
2943 printk("%s(%d):%s get_txidle()=%d\n",
2944 __FILE__,__LINE__, info->device_name, info->idle_mode);
2945
2946 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
2947 if (err) {
2948 if ( debug_level >= DEBUG_LEVEL_INFO )
2949 printk( "%s(%d):%s get_txidle() user buffer copy failed\n",
2950 __FILE__,__LINE__,info->device_name);
2951 return -EFAULT;
2952 }
2953
2954 return 0;
2955}
2956
2957static int set_txidle(SLMP_INFO * info, int idle_mode)
2958{
2959 unsigned long flags;
2960
2961 if (debug_level >= DEBUG_LEVEL_INFO)
2962 printk("%s(%d):%s set_txidle(%d)\n",
2963 __FILE__,__LINE__,info->device_name, idle_mode );
2964
2965 spin_lock_irqsave(&info->lock,flags);
2966 info->idle_mode = idle_mode;
2967 tx_set_idle( info );
2968 spin_unlock_irqrestore(&info->lock,flags);
2969 return 0;
2970}
2971
2972static int tx_enable(SLMP_INFO * info, int enable)
2973{
2974 unsigned long flags;
2975
2976 if (debug_level >= DEBUG_LEVEL_INFO)
2977 printk("%s(%d):%s tx_enable(%d)\n",
2978 __FILE__,__LINE__,info->device_name, enable);
2979
2980 spin_lock_irqsave(&info->lock,flags);
2981 if ( enable ) {
2982 if ( !info->tx_enabled ) {
2983 tx_start(info);
2984 }
2985 } else {
2986 if ( info->tx_enabled )
2987 tx_stop(info);
2988 }
2989 spin_unlock_irqrestore(&info->lock,flags);
2990 return 0;
2991}
2992
2993
2994
2995static int tx_abort(SLMP_INFO * info)
2996{
2997 unsigned long flags;
2998
2999 if (debug_level >= DEBUG_LEVEL_INFO)
3000 printk("%s(%d):%s tx_abort()\n",
3001 __FILE__,__LINE__,info->device_name);
3002
3003 spin_lock_irqsave(&info->lock,flags);
3004 if ( info->tx_active && info->params.mode == MGSL_MODE_HDLC ) {
3005 info->ie1_value &= ~UDRN;
3006 info->ie1_value |= IDLE;
3007 write_reg(info, IE1, info->ie1_value);
3008 write_reg(info, SR1, (unsigned char)(IDLE + UDRN));
3009
3010 write_reg(info, TXDMA + DSR, 0);
3011 write_reg(info, TXDMA + DCMD, SWABORT);
3012
3013 write_reg(info, CMD, TXABORT);
3014 }
3015 spin_unlock_irqrestore(&info->lock,flags);
3016 return 0;
3017}
3018
3019static int rx_enable(SLMP_INFO * info, int enable)
3020{
3021 unsigned long flags;
3022
3023 if (debug_level >= DEBUG_LEVEL_INFO)
3024 printk("%s(%d):%s rx_enable(%d)\n",
3025 __FILE__,__LINE__,info->device_name,enable);
3026
3027 spin_lock_irqsave(&info->lock,flags);
3028 if ( enable ) {
3029 if ( !info->rx_enabled )
3030 rx_start(info);
3031 } else {
3032 if ( info->rx_enabled )
3033 rx_stop(info);
3034 }
3035 spin_unlock_irqrestore(&info->lock,flags);
3036 return 0;
3037}
3038
3039
3040
3041static int wait_mgsl_event(SLMP_INFO * info, int __user *mask_ptr)
3042{
3043 unsigned long flags;
3044 int s;
3045 int rc=0;
3046 struct mgsl_icount cprev, cnow;
3047 int events;
3048 int mask;
3049 struct _input_signal_events oldsigs, newsigs;
3050 DECLARE_WAITQUEUE(wait, current);
3051
3052 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
3053 if (rc) {
3054 return -EFAULT;
3055 }
3056
3057 if (debug_level >= DEBUG_LEVEL_INFO)
3058 printk("%s(%d):%s wait_mgsl_event(%d)\n",
3059 __FILE__,__LINE__,info->device_name,mask);
3060
3061 spin_lock_irqsave(&info->lock,flags);
3062
3063
3064 get_signals(info);
3065 s = info->serial_signals;
3066
3067 events = mask &
3068 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
3069 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
3070 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
3071 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
3072 if (events) {
3073 spin_unlock_irqrestore(&info->lock,flags);
3074 goto exit;
3075 }
3076
3077
3078 cprev = info->icount;
3079 oldsigs = info->input_signal_events;
3080
3081
3082 if (mask & (MgslEvent_ExitHuntMode+MgslEvent_IdleReceived)) {
3083 unsigned char oldval = info->ie1_value;
3084 unsigned char newval = oldval +
3085 (mask & MgslEvent_ExitHuntMode ? FLGD:0) +
3086 (mask & MgslEvent_IdleReceived ? IDLD:0);
3087 if ( oldval != newval ) {
3088 info->ie1_value = newval;
3089 write_reg(info, IE1, info->ie1_value);
3090 }
3091 }
3092
3093 set_current_state(TASK_INTERRUPTIBLE);
3094 add_wait_queue(&info->event_wait_q, &wait);
3095
3096 spin_unlock_irqrestore(&info->lock,flags);
3097
3098 for(;;) {
3099 schedule();
3100 if (signal_pending(current)) {
3101 rc = -ERESTARTSYS;
3102 break;
3103 }
3104
3105
3106 spin_lock_irqsave(&info->lock,flags);
3107 cnow = info->icount;
3108 newsigs = info->input_signal_events;
3109 set_current_state(TASK_INTERRUPTIBLE);
3110 spin_unlock_irqrestore(&info->lock,flags);
3111
3112
3113 if (newsigs.dsr_up == oldsigs.dsr_up &&
3114 newsigs.dsr_down == oldsigs.dsr_down &&
3115 newsigs.dcd_up == oldsigs.dcd_up &&
3116 newsigs.dcd_down == oldsigs.dcd_down &&
3117 newsigs.cts_up == oldsigs.cts_up &&
3118 newsigs.cts_down == oldsigs.cts_down &&
3119 newsigs.ri_up == oldsigs.ri_up &&
3120 newsigs.ri_down == oldsigs.ri_down &&
3121 cnow.exithunt == cprev.exithunt &&
3122 cnow.rxidle == cprev.rxidle) {
3123 rc = -EIO;
3124 break;
3125 }
3126
3127 events = mask &
3128 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
3129 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
3130 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
3131 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
3132 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
3133 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
3134 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
3135 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
3136 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
3137 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
3138 if (events)
3139 break;
3140
3141 cprev = cnow;
3142 oldsigs = newsigs;
3143 }
3144
3145 remove_wait_queue(&info->event_wait_q, &wait);
3146 set_current_state(TASK_RUNNING);
3147
3148
3149 if (mask & (MgslEvent_ExitHuntMode + MgslEvent_IdleReceived)) {
3150 spin_lock_irqsave(&info->lock,flags);
3151 if (!waitqueue_active(&info->event_wait_q)) {
3152
3153 info->ie1_value &= ~(FLGD|IDLD);
3154 write_reg(info, IE1, info->ie1_value);
3155 }
3156 spin_unlock_irqrestore(&info->lock,flags);
3157 }
3158exit:
3159 if ( rc == 0 )
3160 PUT_USER(rc, events, mask_ptr);
3161
3162 return rc;
3163}
3164
3165static int modem_input_wait(SLMP_INFO *info,int arg)
3166{
3167 unsigned long flags;
3168 int rc;
3169 struct mgsl_icount cprev, cnow;
3170 DECLARE_WAITQUEUE(wait, current);
3171
3172
3173 spin_lock_irqsave(&info->lock,flags);
3174 cprev = info->icount;
3175 add_wait_queue(&info->status_event_wait_q, &wait);
3176 set_current_state(TASK_INTERRUPTIBLE);
3177 spin_unlock_irqrestore(&info->lock,flags);
3178
3179 for(;;) {
3180 schedule();
3181 if (signal_pending(current)) {
3182 rc = -ERESTARTSYS;
3183 break;
3184 }
3185
3186
3187 spin_lock_irqsave(&info->lock,flags);
3188 cnow = info->icount;
3189 set_current_state(TASK_INTERRUPTIBLE);
3190 spin_unlock_irqrestore(&info->lock,flags);
3191
3192
3193 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
3194 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
3195 rc = -EIO;
3196 break;
3197 }
3198
3199
3200 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
3201 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
3202 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
3203 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
3204 rc = 0;
3205 break;
3206 }
3207
3208 cprev = cnow;
3209 }
3210 remove_wait_queue(&info->status_event_wait_q, &wait);
3211 set_current_state(TASK_RUNNING);
3212 return rc;
3213}
3214
3215
3216
3217static int tiocmget(struct tty_struct *tty)
3218{
3219 SLMP_INFO *info = tty->driver_data;
3220 unsigned int result;
3221 unsigned long flags;
3222
3223 spin_lock_irqsave(&info->lock,flags);
3224 get_signals(info);
3225 spin_unlock_irqrestore(&info->lock,flags);
3226
3227 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
3228 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
3229 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
3230 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
3231 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
3232 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
3233
3234 if (debug_level >= DEBUG_LEVEL_INFO)
3235 printk("%s(%d):%s tiocmget() value=%08X\n",
3236 __FILE__,__LINE__, info->device_name, result );
3237 return result;
3238}
3239
3240
3241
3242static int tiocmset(struct tty_struct *tty,
3243 unsigned int set, unsigned int clear)
3244{
3245 SLMP_INFO *info = tty->driver_data;
3246 unsigned long flags;
3247
3248 if (debug_level >= DEBUG_LEVEL_INFO)
3249 printk("%s(%d):%s tiocmset(%x,%x)\n",
3250 __FILE__,__LINE__,info->device_name, set, clear);
3251
3252 if (set & TIOCM_RTS)
3253 info->serial_signals |= SerialSignal_RTS;
3254 if (set & TIOCM_DTR)
3255 info->serial_signals |= SerialSignal_DTR;
3256 if (clear & TIOCM_RTS)
3257 info->serial_signals &= ~SerialSignal_RTS;
3258 if (clear & TIOCM_DTR)
3259 info->serial_signals &= ~SerialSignal_DTR;
3260
3261 spin_lock_irqsave(&info->lock,flags);
3262 set_signals(info);
3263 spin_unlock_irqrestore(&info->lock,flags);
3264
3265 return 0;
3266}
3267
3268static int carrier_raised(struct tty_port *port)
3269{
3270 SLMP_INFO *info = container_of(port, SLMP_INFO, port);
3271 unsigned long flags;
3272
3273 spin_lock_irqsave(&info->lock,flags);
3274 get_signals(info);
3275 spin_unlock_irqrestore(&info->lock,flags);
3276
3277 return (info->serial_signals & SerialSignal_DCD) ? 1 : 0;
3278}
3279
3280static void dtr_rts(struct tty_port *port, int on)
3281{
3282 SLMP_INFO *info = container_of(port, SLMP_INFO, port);
3283 unsigned long flags;
3284
3285 spin_lock_irqsave(&info->lock,flags);
3286 if (on)
3287 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
3288 else
3289 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
3290 set_signals(info);
3291 spin_unlock_irqrestore(&info->lock,flags);
3292}
3293
3294
3295
3296static int block_til_ready(struct tty_struct *tty, struct file *filp,
3297 SLMP_INFO *info)
3298{
3299 DECLARE_WAITQUEUE(wait, current);
3300 int retval;
3301 bool do_clocal = false;
3302 bool extra_count = false;
3303 unsigned long flags;
3304 int cd;
3305 struct tty_port *port = &info->port;
3306
3307 if (debug_level >= DEBUG_LEVEL_INFO)
3308 printk("%s(%d):%s block_til_ready()\n",
3309 __FILE__,__LINE__, tty->driver->name );
3310
3311 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
3312
3313
3314 port->flags |= ASYNC_NORMAL_ACTIVE;
3315 return 0;
3316 }
3317
3318 if (tty->termios.c_cflag & CLOCAL)
3319 do_clocal = true;
3320
3321
3322
3323
3324
3325
3326
3327
3328 retval = 0;
3329 add_wait_queue(&port->open_wait, &wait);
3330
3331 if (debug_level >= DEBUG_LEVEL_INFO)
3332 printk("%s(%d):%s block_til_ready() before block, count=%d\n",
3333 __FILE__,__LINE__, tty->driver->name, port->count );
3334
3335 spin_lock_irqsave(&info->lock, flags);
3336 if (!tty_hung_up_p(filp)) {
3337 extra_count = true;
3338 port->count--;
3339 }
3340 spin_unlock_irqrestore(&info->lock, flags);
3341 port->blocked_open++;
3342
3343 while (1) {
3344 if (tty->termios.c_cflag & CBAUD)
3345 tty_port_raise_dtr_rts(port);
3346
3347 set_current_state(TASK_INTERRUPTIBLE);
3348
3349 if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)){
3350 retval = (port->flags & ASYNC_HUP_NOTIFY) ?
3351 -EAGAIN : -ERESTARTSYS;
3352 break;
3353 }
3354
3355 cd = tty_port_carrier_raised(port);
3356
3357 if (!(port->flags & ASYNC_CLOSING) && (do_clocal || cd))
3358 break;
3359
3360 if (signal_pending(current)) {
3361 retval = -ERESTARTSYS;
3362 break;
3363 }
3364
3365 if (debug_level >= DEBUG_LEVEL_INFO)
3366 printk("%s(%d):%s block_til_ready() count=%d\n",
3367 __FILE__,__LINE__, tty->driver->name, port->count );
3368
3369 tty_unlock(tty);
3370 schedule();
3371 tty_lock(tty);
3372 }
3373
3374 set_current_state(TASK_RUNNING);
3375 remove_wait_queue(&port->open_wait, &wait);
3376
3377 if (extra_count)
3378 port->count++;
3379 port->blocked_open--;
3380
3381 if (debug_level >= DEBUG_LEVEL_INFO)
3382 printk("%s(%d):%s block_til_ready() after, count=%d\n",
3383 __FILE__,__LINE__, tty->driver->name, port->count );
3384
3385 if (!retval)
3386 port->flags |= ASYNC_NORMAL_ACTIVE;
3387
3388 return retval;
3389}
3390
3391static int alloc_dma_bufs(SLMP_INFO *info)
3392{
3393 unsigned short BuffersPerFrame;
3394 unsigned short BufferCount;
3395
3396
3397
3398
3399
3400
3401 info->port_array[0]->last_mem_alloc = (SCA_MEM_SIZE/4) * info->port_num;
3402
3403
3404
3405
3406
3407
3408 BuffersPerFrame = (unsigned short)(info->max_frame_size/SCABUFSIZE);
3409 if ( info->max_frame_size % SCABUFSIZE )
3410 BuffersPerFrame++;
3411
3412
3413
3414
3415
3416 BufferCount = (SCA_MEM_SIZE/4 - BUFFERLISTSIZE)/SCABUFSIZE;
3417
3418
3419 if (BufferCount > BUFFERLISTSIZE/sizeof(SCADESC))
3420 BufferCount = BUFFERLISTSIZE/sizeof(SCADESC);
3421
3422
3423 info->tx_buf_count = BuffersPerFrame + 1;
3424
3425
3426 if (info->tx_buf_count > (BufferCount/2))
3427 info->tx_buf_count = BufferCount/2;
3428
3429 if (info->tx_buf_count > SCAMAXDESC)
3430 info->tx_buf_count = SCAMAXDESC;
3431
3432
3433 info->rx_buf_count = BufferCount - info->tx_buf_count;
3434
3435 if (info->rx_buf_count > SCAMAXDESC)
3436 info->rx_buf_count = SCAMAXDESC;
3437
3438 if ( debug_level >= DEBUG_LEVEL_INFO )
3439 printk("%s(%d):%s Allocating %d TX and %d RX DMA buffers.\n",
3440 __FILE__,__LINE__, info->device_name,
3441 info->tx_buf_count,info->rx_buf_count);
3442
3443 if ( alloc_buf_list( info ) < 0 ||
3444 alloc_frame_bufs(info,
3445 info->rx_buf_list,
3446 info->rx_buf_list_ex,
3447 info->rx_buf_count) < 0 ||
3448 alloc_frame_bufs(info,
3449 info->tx_buf_list,
3450 info->tx_buf_list_ex,
3451 info->tx_buf_count) < 0 ||
3452 alloc_tmp_rx_buf(info) < 0 ) {
3453 printk("%s(%d):%s Can't allocate DMA buffer memory\n",
3454 __FILE__,__LINE__, info->device_name);
3455 return -ENOMEM;
3456 }
3457
3458 rx_reset_buffers( info );
3459
3460 return 0;
3461}
3462
3463
3464
3465static int alloc_buf_list(SLMP_INFO *info)
3466{
3467 unsigned int i;
3468
3469
3470 info->buffer_list = info->memory_base + info->port_array[0]->last_mem_alloc;
3471 info->buffer_list_phys = info->port_array[0]->last_mem_alloc;
3472 info->port_array[0]->last_mem_alloc += BUFFERLISTSIZE;
3473
3474 memset(info->buffer_list, 0, BUFFERLISTSIZE);
3475
3476
3477
3478
3479 info->rx_buf_list = (SCADESC *)info->buffer_list;
3480
3481 info->tx_buf_list = (SCADESC *)info->buffer_list;
3482 info->tx_buf_list += info->rx_buf_count;
3483
3484
3485
3486
3487
3488
3489
3490 for ( i = 0; i < info->rx_buf_count; i++ ) {
3491
3492 info->rx_buf_list_ex[i].phys_entry =
3493 info->buffer_list_phys + (i * sizeof(SCABUFSIZE));
3494
3495
3496
3497 info->rx_buf_list[i].next = info->buffer_list_phys;
3498 if ( i < info->rx_buf_count - 1 )
3499 info->rx_buf_list[i].next += (i + 1) * sizeof(SCADESC);
3500
3501 info->rx_buf_list[i].length = SCABUFSIZE;
3502 }
3503
3504 for ( i = 0; i < info->tx_buf_count; i++ ) {
3505
3506 info->tx_buf_list_ex[i].phys_entry = info->buffer_list_phys +
3507 ((info->rx_buf_count + i) * sizeof(SCADESC));
3508
3509
3510
3511
3512 info->tx_buf_list[i].next = info->buffer_list_phys +
3513 info->rx_buf_count * sizeof(SCADESC);
3514
3515 if ( i < info->tx_buf_count - 1 )
3516 info->tx_buf_list[i].next += (i + 1) * sizeof(SCADESC);
3517 }
3518
3519 return 0;
3520}
3521
3522
3523
3524static int alloc_frame_bufs(SLMP_INFO *info, SCADESC *buf_list,SCADESC_EX *buf_list_ex,int count)
3525{
3526 int i;
3527 unsigned long phys_addr;
3528
3529 for ( i = 0; i < count; i++ ) {
3530 buf_list_ex[i].virt_addr = info->memory_base + info->port_array[0]->last_mem_alloc;
3531 phys_addr = info->port_array[0]->last_mem_alloc;
3532 info->port_array[0]->last_mem_alloc += SCABUFSIZE;
3533
3534 buf_list[i].buf_ptr = (unsigned short)phys_addr;
3535 buf_list[i].buf_base = (unsigned char)(phys_addr >> 16);
3536 }
3537
3538 return 0;
3539}
3540
3541static void free_dma_bufs(SLMP_INFO *info)
3542{
3543 info->buffer_list = NULL;
3544 info->rx_buf_list = NULL;
3545 info->tx_buf_list = NULL;
3546}
3547
3548
3549
3550
3551static int alloc_tmp_rx_buf(SLMP_INFO *info)
3552{
3553 info->tmp_rx_buf = kmalloc(info->max_frame_size, GFP_KERNEL);
3554 if (info->tmp_rx_buf == NULL)
3555 return -ENOMEM;
3556 return 0;
3557}
3558
3559static void free_tmp_rx_buf(SLMP_INFO *info)
3560{
3561 kfree(info->tmp_rx_buf);
3562 info->tmp_rx_buf = NULL;
3563}
3564
3565static int claim_resources(SLMP_INFO *info)
3566{
3567 if (request_mem_region(info->phys_memory_base,SCA_MEM_SIZE,"synclinkmp") == NULL) {
3568 printk( "%s(%d):%s mem addr conflict, Addr=%08X\n",
3569 __FILE__,__LINE__,info->device_name, info->phys_memory_base);
3570 info->init_error = DiagStatus_AddressConflict;
3571 goto errout;
3572 }
3573 else
3574 info->shared_mem_requested = true;
3575
3576 if (request_mem_region(info->phys_lcr_base + info->lcr_offset,128,"synclinkmp") == NULL) {
3577 printk( "%s(%d):%s lcr mem addr conflict, Addr=%08X\n",
3578 __FILE__,__LINE__,info->device_name, info->phys_lcr_base);
3579 info->init_error = DiagStatus_AddressConflict;
3580 goto errout;
3581 }
3582 else
3583 info->lcr_mem_requested = true;
3584
3585 if (request_mem_region(info->phys_sca_base + info->sca_offset,SCA_BASE_SIZE,"synclinkmp") == NULL) {
3586 printk( "%s(%d):%s sca mem addr conflict, Addr=%08X\n",
3587 __FILE__,__LINE__,info->device_name, info->phys_sca_base);
3588 info->init_error = DiagStatus_AddressConflict;
3589 goto errout;
3590 }
3591 else
3592 info->sca_base_requested = true;
3593
3594 if (request_mem_region(info->phys_statctrl_base + info->statctrl_offset,SCA_REG_SIZE,"synclinkmp") == NULL) {
3595 printk( "%s(%d):%s stat/ctrl mem addr conflict, Addr=%08X\n",
3596 __FILE__,__LINE__,info->device_name, info->phys_statctrl_base);
3597 info->init_error = DiagStatus_AddressConflict;
3598 goto errout;
3599 }
3600 else
3601 info->sca_statctrl_requested = true;
3602
3603 info->memory_base = ioremap_nocache(info->phys_memory_base,
3604 SCA_MEM_SIZE);
3605 if (!info->memory_base) {
3606 printk( "%s(%d):%s Can't map shared memory, MemAddr=%08X\n",
3607 __FILE__,__LINE__,info->device_name, info->phys_memory_base );
3608 info->init_error = DiagStatus_CantAssignPciResources;
3609 goto errout;
3610 }
3611
3612 info->lcr_base = ioremap_nocache(info->phys_lcr_base, PAGE_SIZE);
3613 if (!info->lcr_base) {
3614 printk( "%s(%d):%s Can't map LCR memory, MemAddr=%08X\n",
3615 __FILE__,__LINE__,info->device_name, info->phys_lcr_base );
3616 info->init_error = DiagStatus_CantAssignPciResources;
3617 goto errout;
3618 }
3619 info->lcr_base += info->lcr_offset;
3620
3621 info->sca_base = ioremap_nocache(info->phys_sca_base, PAGE_SIZE);
3622 if (!info->sca_base) {
3623 printk( "%s(%d):%s Can't map SCA memory, MemAddr=%08X\n",
3624 __FILE__,__LINE__,info->device_name, info->phys_sca_base );
3625 info->init_error = DiagStatus_CantAssignPciResources;
3626 goto errout;
3627 }
3628 info->sca_base += info->sca_offset;
3629
3630 info->statctrl_base = ioremap_nocache(info->phys_statctrl_base,
3631 PAGE_SIZE);
3632 if (!info->statctrl_base) {
3633 printk( "%s(%d):%s Can't map SCA Status/Control memory, MemAddr=%08X\n",
3634 __FILE__,__LINE__,info->device_name, info->phys_statctrl_base );
3635 info->init_error = DiagStatus_CantAssignPciResources;
3636 goto errout;
3637 }
3638 info->statctrl_base += info->statctrl_offset;
3639
3640 if ( !memory_test(info) ) {
3641 printk( "%s(%d):Shared Memory Test failed for device %s MemAddr=%08X\n",
3642 __FILE__,__LINE__,info->device_name, info->phys_memory_base );
3643 info->init_error = DiagStatus_MemoryError;
3644 goto errout;
3645 }
3646
3647 return 0;
3648
3649errout:
3650 release_resources( info );
3651 return -ENODEV;
3652}
3653
3654static void release_resources(SLMP_INFO *info)
3655{
3656 if ( debug_level >= DEBUG_LEVEL_INFO )
3657 printk( "%s(%d):%s release_resources() entry\n",
3658 __FILE__,__LINE__,info->device_name );
3659
3660 if ( info->irq_requested ) {
3661 free_irq(info->irq_level, info);
3662 info->irq_requested = false;
3663 }
3664
3665 if ( info->shared_mem_requested ) {
3666 release_mem_region(info->phys_memory_base,SCA_MEM_SIZE);
3667 info->shared_mem_requested = false;
3668 }
3669 if ( info->lcr_mem_requested ) {
3670 release_mem_region(info->phys_lcr_base + info->lcr_offset,128);
3671 info->lcr_mem_requested = false;
3672 }
3673 if ( info->sca_base_requested ) {
3674 release_mem_region(info->phys_sca_base + info->sca_offset,SCA_BASE_SIZE);
3675 info->sca_base_requested = false;
3676 }
3677 if ( info->sca_statctrl_requested ) {
3678 release_mem_region(info->phys_statctrl_base + info->statctrl_offset,SCA_REG_SIZE);
3679 info->sca_statctrl_requested = false;
3680 }
3681
3682 if (info->memory_base){
3683 iounmap(info->memory_base);
3684 info->memory_base = NULL;
3685 }
3686
3687 if (info->sca_base) {
3688 iounmap(info->sca_base - info->sca_offset);
3689 info->sca_base=NULL;
3690 }
3691
3692 if (info->statctrl_base) {
3693 iounmap(info->statctrl_base - info->statctrl_offset);
3694 info->statctrl_base=NULL;
3695 }
3696
3697 if (info->lcr_base){
3698 iounmap(info->lcr_base - info->lcr_offset);
3699 info->lcr_base = NULL;
3700 }
3701
3702 if ( debug_level >= DEBUG_LEVEL_INFO )
3703 printk( "%s(%d):%s release_resources() exit\n",
3704 __FILE__,__LINE__,info->device_name );
3705}
3706
3707
3708
3709
3710static void add_device(SLMP_INFO *info)
3711{
3712 info->next_device = NULL;
3713 info->line = synclinkmp_device_count;
3714 sprintf(info->device_name,"ttySLM%dp%d",info->adapter_num,info->port_num);
3715
3716 if (info->line < MAX_DEVICES) {
3717 if (maxframe[info->line])
3718 info->max_frame_size = maxframe[info->line];
3719 }
3720
3721 synclinkmp_device_count++;
3722
3723 if ( !synclinkmp_device_list )
3724 synclinkmp_device_list = info;
3725 else {
3726 SLMP_INFO *current_dev = synclinkmp_device_list;
3727 while( current_dev->next_device )
3728 current_dev = current_dev->next_device;
3729 current_dev->next_device = info;
3730 }
3731
3732 if ( info->max_frame_size < 4096 )
3733 info->max_frame_size = 4096;
3734 else if ( info->max_frame_size > 65535 )
3735 info->max_frame_size = 65535;
3736
3737 printk( "SyncLink MultiPort %s: "
3738 "Mem=(%08x %08X %08x %08X) IRQ=%d MaxFrameSize=%u\n",
3739 info->device_name,
3740 info->phys_sca_base,
3741 info->phys_memory_base,
3742 info->phys_statctrl_base,
3743 info->phys_lcr_base,
3744 info->irq_level,
3745 info->max_frame_size );
3746
3747#if SYNCLINK_GENERIC_HDLC
3748 hdlcdev_init(info);
3749#endif
3750}
3751
3752static const struct tty_port_operations port_ops = {
3753 .carrier_raised = carrier_raised,
3754 .dtr_rts = dtr_rts,
3755};
3756
3757
3758
3759
3760
3761static SLMP_INFO *alloc_dev(int adapter_num, int port_num, struct pci_dev *pdev)
3762{
3763 SLMP_INFO *info;
3764
3765 info = kzalloc(sizeof(SLMP_INFO),
3766 GFP_KERNEL);
3767
3768 if (!info) {
3769 printk("%s(%d) Error can't allocate device instance data for adapter %d, port %d\n",
3770 __FILE__,__LINE__, adapter_num, port_num);
3771 } else {
3772 tty_port_init(&info->port);
3773 info->port.ops = &port_ops;
3774 info->magic = MGSL_MAGIC;
3775 INIT_WORK(&info->task, bh_handler);
3776 info->max_frame_size = 4096;
3777 info->port.close_delay = 5*HZ/10;
3778 info->port.closing_wait = 30*HZ;
3779 init_waitqueue_head(&info->status_event_wait_q);
3780 init_waitqueue_head(&info->event_wait_q);
3781 spin_lock_init(&info->netlock);
3782 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
3783 info->idle_mode = HDLC_TXIDLE_FLAGS;
3784 info->adapter_num = adapter_num;
3785 info->port_num = port_num;
3786
3787
3788 info->irq_level = pdev->irq;
3789 info->phys_lcr_base = pci_resource_start(pdev,0);
3790 info->phys_sca_base = pci_resource_start(pdev,2);
3791 info->phys_memory_base = pci_resource_start(pdev,3);
3792 info->phys_statctrl_base = pci_resource_start(pdev,4);
3793
3794
3795
3796
3797
3798 info->lcr_offset = info->phys_lcr_base & (PAGE_SIZE-1);
3799 info->phys_lcr_base &= ~(PAGE_SIZE-1);
3800
3801 info->sca_offset = info->phys_sca_base & (PAGE_SIZE-1);
3802 info->phys_sca_base &= ~(PAGE_SIZE-1);
3803
3804 info->statctrl_offset = info->phys_statctrl_base & (PAGE_SIZE-1);
3805 info->phys_statctrl_base &= ~(PAGE_SIZE-1);
3806
3807 info->bus_type = MGSL_BUS_TYPE_PCI;
3808 info->irq_flags = IRQF_SHARED;
3809
3810 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
3811 setup_timer(&info->status_timer, status_timeout,
3812 (unsigned long)info);
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823 info->misc_ctrl_value = 0x087e4546;
3824
3825
3826
3827
3828
3829
3830
3831 info->init_error = -1;
3832 }
3833
3834 return info;
3835}
3836
3837static void device_init(int adapter_num, struct pci_dev *pdev)
3838{
3839 SLMP_INFO *port_array[SCA_MAX_PORTS];
3840 int port;
3841
3842
3843 for ( port = 0; port < SCA_MAX_PORTS; ++port ) {
3844 port_array[port] = alloc_dev(adapter_num,port,pdev);
3845 if( port_array[port] == NULL ) {
3846 for ( --port; port >= 0; --port )
3847 kfree(port_array[port]);
3848 return;
3849 }
3850 }
3851
3852
3853 for ( port = 0; port < SCA_MAX_PORTS; ++port ) {
3854 memcpy(port_array[port]->port_array,port_array,sizeof(port_array));
3855 add_device( port_array[port] );
3856 spin_lock_init(&port_array[port]->lock);
3857 }
3858
3859
3860 if ( !claim_resources(port_array[0]) ) {
3861
3862 alloc_dma_bufs(port_array[0]);
3863
3864
3865 for ( port = 1; port < SCA_MAX_PORTS; ++port ) {
3866 port_array[port]->lock = port_array[0]->lock;
3867 port_array[port]->irq_level = port_array[0]->irq_level;
3868 port_array[port]->memory_base = port_array[0]->memory_base;
3869 port_array[port]->sca_base = port_array[0]->sca_base;
3870 port_array[port]->statctrl_base = port_array[0]->statctrl_base;
3871 port_array[port]->lcr_base = port_array[0]->lcr_base;
3872 alloc_dma_bufs(port_array[port]);
3873 }
3874
3875 if ( request_irq(port_array[0]->irq_level,
3876 synclinkmp_interrupt,
3877 port_array[0]->irq_flags,
3878 port_array[0]->device_name,
3879 port_array[0]) < 0 ) {
3880 printk( "%s(%d):%s Can't request interrupt, IRQ=%d\n",
3881 __FILE__,__LINE__,
3882 port_array[0]->device_name,
3883 port_array[0]->irq_level );
3884 }
3885 else {
3886 port_array[0]->irq_requested = true;
3887 adapter_test(port_array[0]);
3888 }
3889 }
3890}
3891
3892static const struct tty_operations ops = {
3893 .install = install,
3894 .open = open,
3895 .close = close,
3896 .write = write,
3897 .put_char = put_char,
3898 .flush_chars = flush_chars,
3899 .write_room = write_room,
3900 .chars_in_buffer = chars_in_buffer,
3901 .flush_buffer = flush_buffer,
3902 .ioctl = ioctl,
3903 .throttle = throttle,
3904 .unthrottle = unthrottle,
3905 .send_xchar = send_xchar,
3906 .break_ctl = set_break,
3907 .wait_until_sent = wait_until_sent,
3908 .set_termios = set_termios,
3909 .stop = tx_hold,
3910 .start = tx_release,
3911 .hangup = hangup,
3912 .tiocmget = tiocmget,
3913 .tiocmset = tiocmset,
3914 .get_icount = get_icount,
3915 .proc_fops = &synclinkmp_proc_fops,
3916};
3917
3918
3919static void synclinkmp_cleanup(void)
3920{
3921 int rc;
3922 SLMP_INFO *info;
3923 SLMP_INFO *tmp;
3924
3925 printk("Unloading %s %s\n", driver_name, driver_version);
3926
3927 if (serial_driver) {
3928 if ((rc = tty_unregister_driver(serial_driver)))
3929 printk("%s(%d) failed to unregister tty driver err=%d\n",
3930 __FILE__,__LINE__,rc);
3931 put_tty_driver(serial_driver);
3932 }
3933
3934
3935 info = synclinkmp_device_list;
3936 while(info) {
3937 reset_port(info);
3938 info = info->next_device;
3939 }
3940
3941
3942 info = synclinkmp_device_list;
3943 while(info) {
3944#if SYNCLINK_GENERIC_HDLC
3945 hdlcdev_exit(info);
3946#endif
3947 free_dma_bufs(info);
3948 free_tmp_rx_buf(info);
3949 if ( info->port_num == 0 ) {
3950 if (info->sca_base)
3951 write_reg(info, LPR, 1);
3952 release_resources(info);
3953 }
3954 tmp = info;
3955 info = info->next_device;
3956 kfree(tmp);
3957 }
3958
3959 pci_unregister_driver(&synclinkmp_pci_driver);
3960}
3961
3962
3963
3964
3965static int __init synclinkmp_init(void)
3966{
3967 int rc;
3968
3969 if (break_on_load) {
3970 synclinkmp_get_text_ptr();
3971 BREAKPOINT();
3972 }
3973
3974 printk("%s %s\n", driver_name, driver_version);
3975
3976 if ((rc = pci_register_driver(&synclinkmp_pci_driver)) < 0) {
3977 printk("%s:failed to register PCI driver, error=%d\n",__FILE__,rc);
3978 return rc;
3979 }
3980
3981 serial_driver = alloc_tty_driver(128);
3982 if (!serial_driver) {
3983 rc = -ENOMEM;
3984 goto error;
3985 }
3986
3987
3988
3989 serial_driver->driver_name = "synclinkmp";
3990 serial_driver->name = "ttySLM";
3991 serial_driver->major = ttymajor;
3992 serial_driver->minor_start = 64;
3993 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3994 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3995 serial_driver->init_termios = tty_std_termios;
3996 serial_driver->init_termios.c_cflag =
3997 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3998 serial_driver->init_termios.c_ispeed = 9600;
3999 serial_driver->init_termios.c_ospeed = 9600;
4000 serial_driver->flags = TTY_DRIVER_REAL_RAW;
4001 tty_set_operations(serial_driver, &ops);
4002 if ((rc = tty_register_driver(serial_driver)) < 0) {
4003 printk("%s(%d):Couldn't register serial driver\n",
4004 __FILE__,__LINE__);
4005 put_tty_driver(serial_driver);
4006 serial_driver = NULL;
4007 goto error;
4008 }
4009
4010 printk("%s %s, tty major#%d\n",
4011 driver_name, driver_version,
4012 serial_driver->major);
4013
4014 return 0;
4015
4016error:
4017 synclinkmp_cleanup();
4018 return rc;
4019}
4020
4021static void __exit synclinkmp_exit(void)
4022{
4023 synclinkmp_cleanup();
4024}
4025
4026module_init(synclinkmp_init);
4027module_exit(synclinkmp_exit);
4028
4029
4030
4031
4032
4033static void enable_loopback(SLMP_INFO *info, int enable)
4034{
4035 if (enable) {
4036
4037
4038
4039 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) | (BIT1 + BIT0)));
4040
4041
4042 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2));
4043 write_control_reg(info);
4044
4045
4046
4047
4048
4049
4050 write_reg(info, RXS, 0x40);
4051 write_reg(info, TXS, 0x40);
4052
4053 } else {
4054
4055
4056
4057 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) & ~(BIT1 + BIT0)));
4058
4059
4060
4061
4062
4063
4064 write_reg(info, RXS, 0x00);
4065 write_reg(info, TXS, 0x00);
4066 }
4067
4068
4069 if (info->params.clock_speed)
4070 set_rate(info, info->params.clock_speed);
4071 else
4072 set_rate(info, 3686400);
4073}
4074
4075
4076
4077
4078
4079
4080static void set_rate( SLMP_INFO *info, u32 data_rate )
4081{
4082 u32 TMCValue;
4083 unsigned char BRValue;
4084 u32 Divisor=0;
4085
4086
4087
4088 if (data_rate != 0) {
4089 Divisor = 14745600/data_rate;
4090 if (!Divisor)
4091 Divisor = 1;
4092
4093 TMCValue = Divisor;
4094
4095 BRValue = 0;
4096 if (TMCValue != 1 && TMCValue != 2) {
4097
4098
4099
4100
4101 BRValue = 1;
4102 TMCValue >>= 1;
4103 }
4104
4105
4106
4107
4108 for(; TMCValue > 256 && BRValue < 10; BRValue++)
4109 TMCValue >>= 1;
4110
4111 write_reg(info, TXS,
4112 (unsigned char)((read_reg(info, TXS) & 0xf0) | BRValue));
4113 write_reg(info, RXS,
4114 (unsigned char)((read_reg(info, RXS) & 0xf0) | BRValue));
4115 write_reg(info, TMC, (unsigned char)TMCValue);
4116 }
4117 else {
4118 write_reg(info, TXS,0);
4119 write_reg(info, RXS,0);
4120 write_reg(info, TMC, 0);
4121 }
4122}
4123
4124
4125
4126static void rx_stop(SLMP_INFO *info)
4127{
4128 if (debug_level >= DEBUG_LEVEL_ISR)
4129 printk("%s(%d):%s rx_stop()\n",
4130 __FILE__,__LINE__, info->device_name );
4131
4132 write_reg(info, CMD, RXRESET);
4133
4134 info->ie0_value &= ~RXRDYE;
4135 write_reg(info, IE0, info->ie0_value);
4136
4137 write_reg(info, RXDMA + DSR, 0);
4138 write_reg(info, RXDMA + DCMD, SWABORT);
4139 write_reg(info, RXDMA + DIR, 0);
4140
4141 info->rx_enabled = false;
4142 info->rx_overflow = false;
4143}
4144
4145
4146
4147static void rx_start(SLMP_INFO *info)
4148{
4149 int i;
4150
4151 if (debug_level >= DEBUG_LEVEL_ISR)
4152 printk("%s(%d):%s rx_start()\n",
4153 __FILE__,__LINE__, info->device_name );
4154
4155 write_reg(info, CMD, RXRESET);
4156
4157 if ( info->params.mode == MGSL_MODE_HDLC ) {
4158
4159 info->ie0_value &= ~RXRDYE;
4160 write_reg(info, IE0, info->ie0_value);
4161
4162
4163 write_reg(info, RXDMA + DSR, 0);
4164 write_reg(info, RXDMA + DCMD, SWABORT);
4165
4166 for (i = 0; i < info->rx_buf_count; i++) {
4167 info->rx_buf_list[i].status = 0xff;
4168
4169
4170
4171 if (!(i % 4))
4172 read_status_reg(info);
4173 }
4174 info->current_rx_buf = 0;
4175
4176
4177 write_reg16(info, RXDMA + CDA,
4178 info->rx_buf_list_ex[0].phys_entry);
4179
4180
4181 write_reg16(info, RXDMA + EDA,
4182 info->rx_buf_list_ex[info->rx_buf_count - 1].phys_entry);
4183
4184
4185 write_reg16(info, RXDMA + BFL, SCABUFSIZE);
4186
4187 write_reg(info, RXDMA + DIR, 0x60);
4188 write_reg(info, RXDMA + DSR, 0xf2);
4189 } else {
4190
4191 info->ie0_value |= RXRDYE;
4192 write_reg(info, IE0, info->ie0_value);
4193 }
4194
4195 write_reg(info, CMD, RXENABLE);
4196
4197 info->rx_overflow = false;
4198 info->rx_enabled = true;
4199}
4200
4201
4202
4203
4204static void tx_start(SLMP_INFO *info)
4205{
4206 if (debug_level >= DEBUG_LEVEL_ISR)
4207 printk("%s(%d):%s tx_start() tx_count=%d\n",
4208 __FILE__,__LINE__, info->device_name,info->tx_count );
4209
4210 if (!info->tx_enabled ) {
4211 write_reg(info, CMD, TXRESET);
4212 write_reg(info, CMD, TXENABLE);
4213 info->tx_enabled = true;
4214 }
4215
4216 if ( info->tx_count ) {
4217
4218
4219
4220
4221
4222 info->drop_rts_on_tx_done = false;
4223
4224 if (info->params.mode != MGSL_MODE_ASYNC) {
4225
4226 if ( info->params.flags & HDLC_FLAG_AUTO_RTS ) {
4227 get_signals( info );
4228 if ( !(info->serial_signals & SerialSignal_RTS) ) {
4229 info->serial_signals |= SerialSignal_RTS;
4230 set_signals( info );
4231 info->drop_rts_on_tx_done = true;
4232 }
4233 }
4234
4235 write_reg16(info, TRC0,
4236 (unsigned short)(((tx_negate_fifo_level-1)<<8) + tx_active_fifo_level));
4237
4238 write_reg(info, TXDMA + DSR, 0);
4239 write_reg(info, TXDMA + DCMD, SWABORT);
4240
4241
4242 write_reg16(info, TXDMA + CDA,
4243 info->tx_buf_list_ex[0].phys_entry);
4244
4245
4246 write_reg16(info, TXDMA + EDA,
4247 info->tx_buf_list_ex[info->last_tx_buf].phys_entry);
4248
4249
4250 info->ie1_value &= ~IDLE;
4251 info->ie1_value |= UDRN;
4252 write_reg(info, IE1, info->ie1_value);
4253 write_reg(info, SR1, (unsigned char)(IDLE + UDRN));
4254
4255 write_reg(info, TXDMA + DIR, 0x40);
4256 write_reg(info, TXDMA + DSR, 0xf2);
4257
4258 mod_timer(&info->tx_timer, jiffies +
4259 msecs_to_jiffies(5000));
4260 }
4261 else {
4262 tx_load_fifo(info);
4263
4264 info->ie0_value |= TXRDYE;
4265 write_reg(info, IE0, info->ie0_value);
4266 }
4267
4268 info->tx_active = true;
4269 }
4270}
4271
4272
4273
4274static void tx_stop( SLMP_INFO *info )
4275{
4276 if (debug_level >= DEBUG_LEVEL_ISR)
4277 printk("%s(%d):%s tx_stop()\n",
4278 __FILE__,__LINE__, info->device_name );
4279
4280 del_timer(&info->tx_timer);
4281
4282 write_reg(info, TXDMA + DSR, 0);
4283 write_reg(info, TXDMA + DCMD, SWABORT);
4284
4285 write_reg(info, CMD, TXRESET);
4286
4287 info->ie1_value &= ~(UDRN + IDLE);
4288 write_reg(info, IE1, info->ie1_value);
4289 write_reg(info, SR1, (unsigned char)(IDLE + UDRN));
4290
4291 info->ie0_value &= ~TXRDYE;
4292 write_reg(info, IE0, info->ie0_value);
4293
4294 info->tx_enabled = false;
4295 info->tx_active = false;
4296}
4297
4298
4299
4300
4301static void tx_load_fifo(SLMP_INFO *info)
4302{
4303 u8 TwoBytes[2];
4304
4305
4306
4307 if ( !info->tx_count && !info->x_char )
4308 return;
4309
4310
4311
4312 while( info->tx_count && (read_reg(info,SR0) & BIT1) ) {
4313
4314
4315
4316
4317 if ( (info->tx_count > 1) && !info->x_char ) {
4318
4319 TwoBytes[0] = info->tx_buf[info->tx_get++];
4320 if (info->tx_get >= info->max_frame_size)
4321 info->tx_get -= info->max_frame_size;
4322 TwoBytes[1] = info->tx_buf[info->tx_get++];
4323 if (info->tx_get >= info->max_frame_size)
4324 info->tx_get -= info->max_frame_size;
4325
4326 write_reg16(info, TRB, *((u16 *)TwoBytes));
4327
4328 info->tx_count -= 2;
4329 info->icount.tx += 2;
4330 } else {
4331
4332
4333 if (info->x_char) {
4334
4335 write_reg(info, TRB, info->x_char);
4336 info->x_char = 0;
4337 } else {
4338 write_reg(info, TRB, info->tx_buf[info->tx_get++]);
4339 if (info->tx_get >= info->max_frame_size)
4340 info->tx_get -= info->max_frame_size;
4341 info->tx_count--;
4342 }
4343 info->icount.tx++;
4344 }
4345 }
4346}
4347
4348
4349
4350static void reset_port(SLMP_INFO *info)
4351{
4352 if (info->sca_base) {
4353
4354 tx_stop(info);
4355 rx_stop(info);
4356
4357 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
4358 set_signals(info);
4359
4360
4361 info->ie0_value = 0;
4362 info->ie1_value = 0;
4363 info->ie2_value = 0;
4364 write_reg(info, IE0, info->ie0_value);
4365 write_reg(info, IE1, info->ie1_value);
4366 write_reg(info, IE2, info->ie2_value);
4367
4368 write_reg(info, CMD, CHRESET);
4369 }
4370}
4371
4372
4373
4374static void reset_adapter(SLMP_INFO *info)
4375{
4376 int i;
4377
4378 for ( i=0; i < SCA_MAX_PORTS; ++i) {
4379 if (info->port_array[i])
4380 reset_port(info->port_array[i]);
4381 }
4382}
4383
4384
4385
4386static void async_mode(SLMP_INFO *info)
4387{
4388
4389 unsigned char RegValue;
4390
4391 tx_stop(info);
4392 rx_stop(info);
4393
4394
4395
4396
4397
4398
4399
4400
4401
4402
4403
4404 RegValue = 0x00;
4405 if (info->params.stop_bits != 1)
4406 RegValue |= BIT1;
4407 write_reg(info, MD0, RegValue);
4408
4409
4410
4411
4412
4413
4414
4415
4416
4417
4418 RegValue = 0x40;
4419 switch (info->params.data_bits) {
4420 case 7: RegValue |= BIT4 + BIT2; break;
4421 case 6: RegValue |= BIT5 + BIT3; break;
4422 case 5: RegValue |= BIT5 + BIT4 + BIT3 + BIT2; break;
4423 }
4424 if (info->params.parity != ASYNC_PARITY_NONE) {
4425 RegValue |= BIT1;
4426 if (info->params.parity == ASYNC_PARITY_ODD)
4427 RegValue |= BIT0;
4428 }
4429 write_reg(info, MD1, RegValue);
4430
4431
4432
4433
4434
4435
4436
4437
4438 RegValue = 0x00;
4439 if (info->params.loopback)
4440 RegValue |= (BIT1 + BIT0);
4441 write_reg(info, MD2, RegValue);
4442
4443
4444
4445
4446
4447
4448
4449 RegValue=BIT6;
4450 write_reg(info, RXS, RegValue);
4451
4452
4453
4454
4455
4456
4457
4458 RegValue=BIT6;
4459 write_reg(info, TXS, RegValue);
4460
4461
4462
4463
4464
4465 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2));
4466 write_control_reg(info);
4467
4468 tx_set_idle(info);
4469
4470
4471
4472
4473
4474
4475 write_reg(info, RRC, 0x00);
4476
4477
4478
4479
4480
4481
4482 write_reg(info, TRC0, 0x10);
4483
4484
4485
4486
4487
4488
4489 write_reg(info, TRC1, 0x1e);
4490
4491
4492
4493
4494
4495
4496
4497
4498
4499
4500
4501
4502
4503 RegValue = 0x10;
4504 if (!(info->serial_signals & SerialSignal_RTS))
4505 RegValue |= 0x01;
4506 write_reg(info, CTL, RegValue);
4507
4508
4509 info->ie0_value |= TXINTE + RXINTE;
4510 write_reg(info, IE0, info->ie0_value);
4511
4512
4513 info->ie1_value = BRKD;
4514 write_reg(info, IE1, info->ie1_value);
4515
4516
4517 info->ie2_value = OVRN;
4518 write_reg(info, IE2, info->ie2_value);
4519
4520 set_rate( info, info->params.data_rate * 16 );
4521}
4522
4523
4524
4525static void hdlc_mode(SLMP_INFO *info)
4526{
4527 unsigned char RegValue;
4528 u32 DpllDivisor;
4529
4530
4531
4532
4533
4534 info->params.flags &= ~(HDLC_FLAG_TXC_DPLL + HDLC_FLAG_RXC_DPLL);
4535
4536
4537 write_reg(info, TXDMA + DIR, 0);
4538 write_reg(info, RXDMA + DIR, 0);
4539
4540
4541
4542
4543
4544
4545
4546
4547
4548
4549
4550
4551 RegValue = 0x81;
4552 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
4553 RegValue |= BIT4;
4554 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
4555 RegValue |= BIT4;
4556 if (info->params.crc_type == HDLC_CRC_16_CCITT)
4557 RegValue |= BIT2 + BIT1;
4558 write_reg(info, MD0, RegValue);
4559
4560
4561
4562
4563
4564
4565
4566
4567
4568
4569 RegValue = 0x00;
4570 write_reg(info, MD1, RegValue);
4571
4572
4573
4574
4575
4576
4577
4578
4579
4580
4581
4582 RegValue = 0x00;
4583 switch(info->params.encoding) {
4584 case HDLC_ENCODING_NRZI: RegValue |= BIT5; break;
4585 case HDLC_ENCODING_BIPHASE_MARK: RegValue |= BIT7 + BIT5; break;
4586 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT7 + BIT6; break;
4587 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT7; break;
4588#if 0
4589 case HDLC_ENCODING_NRZB:
4590 case HDLC_ENCODING_NRZI_MARK:
4591 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL:
4592#endif
4593 }
4594 if ( info->params.flags & HDLC_FLAG_DPLL_DIV16 ) {
4595 DpllDivisor = 16;
4596 RegValue |= BIT3;
4597 } else if ( info->params.flags & HDLC_FLAG_DPLL_DIV8 ) {
4598 DpllDivisor = 8;
4599 } else {
4600 DpllDivisor = 32;
4601 RegValue |= BIT4;
4602 }
4603 write_reg(info, MD2, RegValue);
4604
4605
4606
4607
4608
4609
4610
4611
4612 RegValue=0;
4613 if (info->params.flags & HDLC_FLAG_RXC_BRG)
4614 RegValue |= BIT6;
4615 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
4616 RegValue |= BIT6 + BIT5;
4617 write_reg(info, RXS, RegValue);
4618
4619
4620
4621
4622
4623
4624
4625 RegValue=0;
4626 if (info->params.flags & HDLC_FLAG_TXC_BRG)
4627 RegValue |= BIT6;
4628 if (info->params.flags & HDLC_FLAG_TXC_DPLL)
4629 RegValue |= BIT6 + BIT5;
4630 write_reg(info, TXS, RegValue);
4631
4632 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
4633 set_rate(info, info->params.clock_speed * DpllDivisor);
4634 else
4635 set_rate(info, info->params.clock_speed);
4636
4637
4638
4639
4640
4641 if (info->params.flags & HDLC_FLAG_TXC_BRG)
4642 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2));
4643 else
4644 info->port_array[0]->ctrlreg_value &= ~(BIT0 << (info->port_num * 2));
4645 write_control_reg(info);
4646
4647
4648
4649
4650
4651
4652 write_reg(info, RRC, rx_active_fifo_level);
4653
4654
4655
4656
4657
4658
4659 write_reg(info, TRC0, tx_active_fifo_level);
4660
4661
4662
4663
4664
4665
4666 write_reg(info, TRC1, (unsigned char)(tx_negate_fifo_level - 1));
4667
4668
4669
4670
4671
4672
4673
4674
4675
4676
4677
4678
4679 write_reg(info, TXDMA + DMR, 0x14);
4680 write_reg(info, RXDMA + DMR, 0x14);
4681
4682
4683 write_reg(info, RXDMA + CPB,
4684 (unsigned char)(info->buffer_list_phys >> 16));
4685
4686
4687 write_reg(info, TXDMA + CPB,
4688 (unsigned char)(info->buffer_list_phys >> 16));
4689
4690
4691
4692
4693 info->ie0_value |= TXINTE + RXINTE;
4694 write_reg(info, IE0, info->ie0_value);
4695
4696
4697
4698
4699
4700
4701
4702
4703
4704
4705
4706
4707
4708 RegValue = 0x10;
4709 if (!(info->serial_signals & SerialSignal_RTS))
4710 RegValue |= 0x01;
4711 write_reg(info, CTL, RegValue);
4712
4713
4714
4715 tx_set_idle(info);
4716 tx_stop(info);
4717 rx_stop(info);
4718
4719 set_rate(info, info->params.clock_speed);
4720
4721 if (info->params.loopback)
4722 enable_loopback(info,1);
4723}
4724
4725
4726
4727static void tx_set_idle(SLMP_INFO *info)
4728{
4729 unsigned char RegValue = 0xff;
4730
4731
4732 switch(info->idle_mode) {
4733 case HDLC_TXIDLE_FLAGS: RegValue = 0x7e; break;
4734 case HDLC_TXIDLE_ALT_ZEROS_ONES: RegValue = 0xaa; break;
4735 case HDLC_TXIDLE_ZEROS: RegValue = 0x00; break;
4736 case HDLC_TXIDLE_ONES: RegValue = 0xff; break;
4737 case HDLC_TXIDLE_ALT_MARK_SPACE: RegValue = 0xaa; break;
4738 case HDLC_TXIDLE_SPACE: RegValue = 0x00; break;
4739 case HDLC_TXIDLE_MARK: RegValue = 0xff; break;
4740 }
4741
4742 write_reg(info, IDL, RegValue);
4743}
4744
4745
4746
4747static void get_signals(SLMP_INFO *info)
4748{
4749 u16 status = read_reg(info, SR3);
4750 u16 gpstatus = read_status_reg(info);
4751 u16 testbit;
4752
4753
4754 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
4755
4756
4757
4758 if (!(status & BIT3))
4759 info->serial_signals |= SerialSignal_CTS;
4760
4761 if ( !(status & BIT2))
4762 info->serial_signals |= SerialSignal_DCD;
4763
4764 testbit = BIT1 << (info->port_num * 2);
4765 if (!(gpstatus & testbit))
4766 info->serial_signals |= SerialSignal_RI;
4767
4768 testbit = BIT0 << (info->port_num * 2);
4769 if (!(gpstatus & testbit))
4770 info->serial_signals |= SerialSignal_DSR;
4771}
4772
4773
4774
4775
4776static void set_signals(SLMP_INFO *info)
4777{
4778 unsigned char RegValue;
4779 u16 EnableBit;
4780
4781 RegValue = read_reg(info, CTL);
4782 if (info->serial_signals & SerialSignal_RTS)
4783 RegValue &= ~BIT0;
4784 else
4785 RegValue |= BIT0;
4786 write_reg(info, CTL, RegValue);
4787
4788
4789 EnableBit = BIT1 << (info->port_num*2);
4790 if (info->serial_signals & SerialSignal_DTR)
4791 info->port_array[0]->ctrlreg_value &= ~EnableBit;
4792 else
4793 info->port_array[0]->ctrlreg_value |= EnableBit;
4794 write_control_reg(info);
4795}
4796
4797
4798
4799
4800
4801
4802
4803
4804
4805static void rx_reset_buffers(SLMP_INFO *info)
4806{
4807 rx_free_frame_buffers(info, 0, info->rx_buf_count - 1);
4808}
4809
4810
4811
4812
4813
4814
4815
4816static void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int last)
4817{
4818 bool done = false;
4819
4820 while(!done) {
4821
4822 info->rx_buf_list[first].status = 0xff;
4823
4824 if (first == last) {
4825 done = true;
4826
4827 write_reg16(info, RXDMA + EDA, info->rx_buf_list_ex[first].phys_entry);
4828 }
4829
4830 first++;
4831 if (first == info->rx_buf_count)
4832 first = 0;
4833 }
4834
4835
4836 info->current_rx_buf = first;
4837}
4838
4839
4840
4841
4842
4843
4844static bool rx_get_frame(SLMP_INFO *info)
4845{
4846 unsigned int StartIndex, EndIndex;
4847 unsigned short status;
4848 unsigned int framesize = 0;
4849 bool ReturnCode = false;
4850 unsigned long flags;
4851 struct tty_struct *tty = info->port.tty;
4852 unsigned char addr_field = 0xff;
4853 SCADESC *desc;
4854 SCADESC_EX *desc_ex;
4855
4856CheckAgain:
4857
4858 framesize = 0;
4859 addr_field = 0xff;
4860
4861
4862
4863
4864
4865
4866
4867 StartIndex = EndIndex = info->current_rx_buf;
4868
4869 for ( ;; ) {
4870 desc = &info->rx_buf_list[EndIndex];
4871 desc_ex = &info->rx_buf_list_ex[EndIndex];
4872
4873 if (desc->status == 0xff)
4874 goto Cleanup;
4875
4876 if (framesize == 0 && info->params.addr_filter != 0xff)
4877 addr_field = desc_ex->virt_addr[0];
4878
4879 framesize += desc->length;
4880
4881
4882 if (desc->status)
4883 break;
4884
4885 EndIndex++;
4886 if (EndIndex == info->rx_buf_count)
4887 EndIndex = 0;
4888
4889 if (EndIndex == info->current_rx_buf) {
4890
4891
4892 if ( info->rx_enabled ){
4893 spin_lock_irqsave(&info->lock,flags);
4894 rx_start(info);
4895 spin_unlock_irqrestore(&info->lock,flags);
4896 }
4897 goto Cleanup;
4898 }
4899
4900 }
4901
4902
4903
4904
4905
4906
4907
4908
4909
4910
4911
4912
4913
4914 status = desc->status;
4915
4916
4917
4918 if (info->params.crc_type == HDLC_CRC_NONE)
4919 status &= ~BIT2;
4920
4921 if (framesize == 0 ||
4922 (addr_field != 0xff && addr_field != info->params.addr_filter)) {
4923
4924
4925
4926 rx_free_frame_buffers(info, StartIndex, EndIndex);
4927 goto CheckAgain;
4928 }
4929
4930 if (framesize < 2)
4931 status |= BIT6;
4932
4933 if (status & (BIT6+BIT5+BIT3+BIT2)) {
4934
4935
4936
4937 if (status & BIT6)
4938 info->icount.rxshort++;
4939 else if (status & BIT5)
4940 info->icount.rxabort++;
4941 else if (status & BIT3)
4942 info->icount.rxover++;
4943 else
4944 info->icount.rxcrc++;
4945
4946 framesize = 0;
4947#if SYNCLINK_GENERIC_HDLC
4948 {
4949 info->netdev->stats.rx_errors++;
4950 info->netdev->stats.rx_frame_errors++;
4951 }
4952#endif
4953 }
4954
4955 if ( debug_level >= DEBUG_LEVEL_BH )
4956 printk("%s(%d):%s rx_get_frame() status=%04X size=%d\n",
4957 __FILE__,__LINE__,info->device_name,status,framesize);
4958
4959 if ( debug_level >= DEBUG_LEVEL_DATA )
4960 trace_block(info,info->rx_buf_list_ex[StartIndex].virt_addr,
4961 min_t(unsigned int, framesize, SCABUFSIZE), 0);
4962
4963 if (framesize) {
4964 if (framesize > info->max_frame_size)
4965 info->icount.rxlong++;
4966 else {
4967
4968 int copy_count = framesize;
4969 int index = StartIndex;
4970 unsigned char *ptmp = info->tmp_rx_buf;
4971 info->tmp_rx_buf_count = framesize;
4972
4973 info->icount.rxok++;
4974
4975 while(copy_count) {
4976 int partial_count = min(copy_count,SCABUFSIZE);
4977 memcpy( ptmp,
4978 info->rx_buf_list_ex[index].virt_addr,
4979 partial_count );
4980 ptmp += partial_count;
4981 copy_count -= partial_count;
4982
4983 if ( ++index == info->rx_buf_count )
4984 index = 0;
4985 }
4986
4987#if SYNCLINK_GENERIC_HDLC
4988 if (info->netcount)
4989 hdlcdev_rx(info,info->tmp_rx_buf,framesize);
4990 else
4991#endif
4992 ldisc_receive_buf(tty,info->tmp_rx_buf,
4993 info->flag_buf, framesize);
4994 }
4995 }
4996
4997 rx_free_frame_buffers( info, StartIndex, EndIndex );
4998
4999 ReturnCode = true;
5000
5001Cleanup:
5002 if ( info->rx_enabled && info->rx_overflow ) {
5003
5004
5005
5006 if (info->rx_buf_list[EndIndex].status == 0xff) {
5007 spin_lock_irqsave(&info->lock,flags);
5008 rx_start(info);
5009 spin_unlock_irqrestore(&info->lock,flags);
5010 }
5011 }
5012
5013 return ReturnCode;
5014}
5015
5016
5017
5018static void tx_load_dma_buffer(SLMP_INFO *info, const char *buf, unsigned int count)
5019{
5020 unsigned short copy_count;
5021 unsigned int i = 0;
5022 SCADESC *desc;
5023 SCADESC_EX *desc_ex;
5024
5025 if ( debug_level >= DEBUG_LEVEL_DATA )
5026 trace_block(info, buf, min_t(unsigned int, count, SCABUFSIZE), 1);
5027
5028
5029
5030
5031 for(i=0;;)
5032 {
5033 copy_count = min_t(unsigned int, count, SCABUFSIZE);
5034
5035 desc = &info->tx_buf_list[i];
5036 desc_ex = &info->tx_buf_list_ex[i];
5037
5038 load_pci_memory(info, desc_ex->virt_addr,buf,copy_count);
5039
5040 desc->length = copy_count;
5041 desc->status = 0;
5042
5043 buf += copy_count;
5044 count -= copy_count;
5045
5046 if (!count)
5047 break;
5048
5049 i++;
5050 if (i >= info->tx_buf_count)
5051 i = 0;
5052 }
5053
5054 info->tx_buf_list[i].status = 0x81;
5055 info->last_tx_buf = ++i;
5056}
5057
5058static bool register_test(SLMP_INFO *info)
5059{
5060 static unsigned char testval[] = {0x00, 0xff, 0xaa, 0x55, 0x69, 0x96};
5061 static unsigned int count = ARRAY_SIZE(testval);
5062 unsigned int i;
5063 bool rc = true;
5064 unsigned long flags;
5065
5066 spin_lock_irqsave(&info->lock,flags);
5067 reset_port(info);
5068
5069
5070 info->init_error = DiagStatus_AddressFailure;
5071
5072
5073
5074
5075 for (i = 0 ; i < count ; i++) {
5076 write_reg(info, TMC, testval[i]);
5077 write_reg(info, IDL, testval[(i+1)%count]);
5078 write_reg(info, SA0, testval[(i+2)%count]);
5079 write_reg(info, SA1, testval[(i+3)%count]);
5080
5081 if ( (read_reg(info, TMC) != testval[i]) ||
5082 (read_reg(info, IDL) != testval[(i+1)%count]) ||
5083 (read_reg(info, SA0) != testval[(i+2)%count]) ||
5084 (read_reg(info, SA1) != testval[(i+3)%count]) )
5085 {
5086 rc = false;
5087 break;
5088 }
5089 }
5090
5091 reset_port(info);
5092 spin_unlock_irqrestore(&info->lock,flags);
5093
5094 return rc;
5095}
5096
5097static bool irq_test(SLMP_INFO *info)
5098{
5099 unsigned long timeout;
5100 unsigned long flags;
5101
5102 unsigned char timer = (info->port_num & 1) ? TIMER2 : TIMER0;
5103
5104 spin_lock_irqsave(&info->lock,flags);
5105 reset_port(info);
5106
5107
5108 info->init_error = DiagStatus_IrqFailure;
5109 info->irq_occurred = false;
5110
5111
5112
5113
5114 write_reg(info, IER2, (unsigned char)((info->port_num & 1) ? BIT6 : BIT4));
5115
5116 write_reg(info, (unsigned char)(timer + TEPR), 0);
5117 write_reg16(info, (unsigned char)(timer + TCONR), 1);
5118
5119
5120
5121
5122
5123
5124
5125
5126
5127
5128
5129
5130 write_reg(info, (unsigned char)(timer + TMCS), 0x50);
5131
5132 spin_unlock_irqrestore(&info->lock,flags);
5133
5134 timeout=100;
5135 while( timeout-- && !info->irq_occurred ) {
5136 msleep_interruptible(10);
5137 }
5138
5139 spin_lock_irqsave(&info->lock,flags);
5140 reset_port(info);
5141 spin_unlock_irqrestore(&info->lock,flags);
5142
5143 return info->irq_occurred;
5144}
5145
5146
5147
5148static bool sca_init(SLMP_INFO *info)
5149{
5150
5151 write_reg(info, PABR0, 0);
5152 write_reg(info, PABR1, 0);