linux/drivers/ide/slc90e66.c
<<
11" /spatio /formio a 11" href="../linux+v3.7.3/drivers/ide/slc90e66.c">11" img src="../.static/gfx/right.png" alt=">>">11 /spatio11 spat class="lxr_search">11" 11" input typaluhidden" namalunavtarget" on valu">11" input typalutext" namalusearch" idlusearch">11" buttptitypalusubmit">Search11" Prefso /a>11 /spatio" /divio" form ac/opt="ajax+*" method="post" onsubmit="return false;">11 input typaluhidden" namaluajax_lookup" idluajax_lookup" on valu">1" /formio1" div class="headingbottpm">o div idlufile_contents"i
   1
/a>
spat class="comment">/*
/spatio   2
/a>
spat class="comment"> *  Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
/spatio   3
/a>
spat class="comment"> *  Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
/spatio   4
/a>
spat class="comment"> *
/spatio   5
/a>
spat class="comment"> * This is a look-alike onria   6
/a>
spat class="comment"> * but this keeps the ISA-Bridge and slots alive.
/spatio   7
/a>
spat class="comment"> *
/spatio   8
/a>
spat class="comment"> */
/spatio   9
/a>1  .6.2a>#include <linux/typas.h.2a>>1  11.2a>#include <linux/module.h.2a>>1  12.2a>#include <linux/kernel.h.2a>>1  13.2a>#include <linux/pci.h.2a>>1  14.2a>#include <linux/ide.h.2a>>1  15.2a>#include <linux/init.h.2a>>1  16
/a>1  17
/a>#define 
a href="+code=DRV_NAME" class="sref">DRV_NAME
/a> 
spat class="string">"slc90e66"
/spatio  18
/a>1  19
/a>static 
a href="+code=DEFINE_SPINLOCK" class="sref">DEFINE_SPINLOCK
/a>(
a href="+code=slc90e66_lock" class="sref">slc90e66_lock
/a>);1  20
/a>1  21
/a>static void 
a href="+code=slc90e66_set_pio_mode" class="sref">slc90e66_set_pio_mode
/a>(
a href="+code=ide_hwif_t" class="sref">ide_hwif_t
/a> *
a href="+code=hwif" class="sref">hwif
/a>, 
a href="+code=ide_drive_t" class="sref">ide_drive_t
/a> *
a href="+code=drive" class="sref">drive
/a>)1  22.2a>{1  23.2a>        struct 
a href="+code=pci_dev" class="sref">pci_dev
/a> *
a href="+code=dev" class="sref">dev
/a>     = 
a href="+code=to_pci_dev" class="sref">to_pci_dev
/a>(
a href="+code=hwif" class="sref">hwif
/a>->
a href="+code=dev" class="sref">dev
/a>);1  24.2a>        int 
a href="+code=is_slave" class="sref">is_slave.2a>            = 
a href="+code=drive" class="sref">drive
/a>->
a href="+code=dn" class="sref">dn.2a> & 1;1  25.2a>        int 
a href="+code=master_port" class="sref">master_port.2a>         = 
a href="+code=hwif" class="sref">hwif
/a>->
a href="+code=channel" class="sref">channel.2a> ? 0x42 : 0x40;1  26.2a>        int 
a href="+code=slave_port" class="sref">slave_port.2a>          = 0x44;1  27.2a>        unsigned long 
a href="+code=flags" class="sref">flags.2a>;1  28.2a>        
a href="+code=u16" class="sref">u16
/a> 
a href="+code=master_data" class="sref">master_data.2a>;1  29.2a>        
a href="+code=u8" class="sref">u8
/a> 
a href="+code=slave_data" class="sref">slave_data.2a>;1  30.2a>        int 
a href="+code=control" class="sref">control.2a> = 0;1  31.2a>        const 
a href="+code=u8" class="sref">u8
/a> 
a href="+code=pio" class="sref">pio.2a> = 
a href="+code=drive" class="sref">drive
/a>->
a href="+code=pio_mode" class="sref">pio_mode
/a> - 
a href="+code=XFER_PIO_0" class="sref">XFER_PIO_0.2a>;1  32
/a>1  33.2a>                                     
spat class="comment">/* ISP  RTC */
/spatio  34.2a>        static const 
a href="+code=u8" class="sref">u8
/a> 
a href="+code=timings" class="sref">timings
/a>[][2] = {1  35.2a>                                        { 0, 0 },1  36.2a>                                        { 0, 0 },1  37.2a>                                        { 1, 0 },1  38.2a>                                        { 2, 1 },1  39.2a>                                        { 2, 3 }, };1  40
/a>1  41.2a>        
a href="+code=spin_lock_irqsave" class="sref">spin_lock_irqsave
/a>(&
a href="+code=slc90e66_lock" class="sref">slc90e66_lock
/a>, 
a href="+code=flags" class="sref">flags.2a>);1  42.2a>        
a href="+code=pci_read_config_word" class="sref">pci_read_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 
a href="+code=master_port" class="sref">master_port.2a>, &
a href="+code=master_data" class="sref">master_data.2a>);1  43
/a>1  44.2a>        if (
a href="+code=pio" class="sref">pio.2a> > 1)1  45.2a>                
a href="+code=control" class="sref">control.2a> |= 1;   
spat class="comment">/* Programmable timing on */
/spatio  46.2a>        if (
a href="+code=drive" class="sref">drive
/a>->
a href="+code=media" class="sref">media.2a> == 
a href="+code=ide_disk" class="sref">ide_disk
/a>)1  47.2a>                
a href="+code=control" class="sref">control.2a> |= 4;   
spat class="comment">/* Prefetch, post write */
/spatio  48.2a>        if (
a href="+code=ide_pio_need_iordy" class="sref">ide_pio_need_iordy
/a>(
a href="+code=drive" class="sref">drive
/a>, 
a href="+code=pio" class="sref">pio.2a>))1  49.2a>                
a href="+code=control" class="sref">control.2a> |= 2;   
spat class="comment">/* IORDY */
/spatio  50.2a>        if (
a href="+code=is_slave" class="sref">is_slave.2a>) {1  51.2a>                
a href="+code=master_data" class="sref">master_data.2a> |=  0x4000;1  52.2a>                
a href="+code=master_data" class="sref">master_data.2a> &= ~0x0070;1  53.2a>                if (
a href="+code=pio" class="sref">pio.2a> > 1) {1  54.2a>                        
spat class="comment">/* Set PPE, IE and TIME */
/spatio  55.2a>                        
a href="+code=master_data" class="sref">master_data.2a> |= 
a href="+code=control" class="sref">control.2a> << 4;1  56.2a>                }1  57.2a>                
a href="+code=pci_read_config_byte" class="sref">pci_read_config_byte
/a>(
a href="+code=dev" class="sref">dev
/a>, 
a href="+code=slave_port" class="sref">slave_port.2a>, &
a href="+code=slave_data" class="sref">slave_data.2a>);1  58.2a>                
a href="+code=slave_data" class="sref">slave_data.2a> &= 
a href="+code=hwif" class="sref">hwif
/a>->
a href="+code=channel" class="sref">channel.2a> ? 0x0f : 0xf0;1  59.2a>                
a href="+code=slave_data" class="sref">slave_data.2a> |= ((
a href="+code=timings" class="sref">timings
/a>[
a href="+code=pio" class="sref">pio.2a>][0] << 2) | 
a href="+code=timings" class="sref">timings
/a>[
a href="+code=pio" class="sref">pio.2a>][1]) <<o  60.2a>                               (
a href="+code=hwif" class="sref">hwif
/a>->
a href="+code=channel" class="sref">channel.2a> ? 4 : 0);1  61.2a>        } else {1  62.2a>                
a href="+code=master_data" class="sref">master_data.2a> &= ~0x3307;1  63.2a>                if (
a href="+code=pio" class="sref">pio.2a> > 1) {1  64.2a>                        
spat class="comment">/* enable PPE, IE and TIME */
/spatio  65.2a>                        
a href="+code=master_data" class="sref">master_data.2a> |= 
a href="+code=control" class="sref">control.2a>;1  66.2a>                }1  67.2a>                
a href="+code=master_data" class="sref">master_data.2a> |= (
a href="+code=timings" class="sref">timings
/a>[
a href="+code=pio" class="sref">pio.2a>][0] << 12) | (
a href="+code=timings" class="sref">timings
/a>[
a href="+code=pio" class="sref">pio.2a>][1] << 8);1  68.2a>        }1  69.2a>        
a href="+code=pci_write_config_word" class="sref">pci_write_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 
a href="+code=master_port" class="sref">master_port.2a>, 
a href="+code=master_data" class="sref">master_data.2a>);1  70.2a>        if (
a href="+code=is_slave" class="sref">is_slave.2a>)1  71.2a>                
a href="+code=pci_write_config_byte" class="sref">pci_write_config_byte
/a>(
a href="+code=dev" class="sref">dev
/a>, 
a href="+code=slave_port" class="sref">slave_port.2a>, 
a href="+code=slave_data" class="sref">slave_data.2a>);1  72.2a>        
a href="+code=spin_unlock_irqrestore" class="sref">spin_unlock_irqrestore
/a>(&
a href="+code=slc90e66_lock" class="sref">slc90e66_lock
/a>, 
a href="+code=flags" class="sref">flags.2a>);1  73.2a>}1  74
/a>1  75.2a>static void 
a href="+code=slc90e66_set_dma_mode" class="sref">slc90e66_set_dma_mode
/a>(
a href="+code=ide_hwif_t" class="sref">ide_hwif_t
/a> *
a href="+code=hwif" class="sref">hwif
/a>, 
a href="+code=ide_drive_t" class="sref">ide_drive_t
/a> *
a href="+code=drive" class="sref">drive
/a>)1  76.2a>{1  77.2a>        struct 
a href="+code=pci_dev" class="sref">pci_dev
/a> *
a href="+code=dev" class="sref">dev
/a>     = 
a href="+code=to_pci_dev" class="sref">to_pci_dev
/a>(
a href="+code=hwif" class="sref">hwif
/a>->
a href="+code=dev" class="sref">dev
/a>);1  78.2a>        
a href="+code=u8" class="sref">u8
/a> 
a href="+code=maslave" class="sref">maslave.2a>              = 
a href="+code=hwif" class="sref">hwif
/a>->
a href="+code=channel" class="sref">channel.2a> ? 0x42 : 0x40;1  79.2a>        int 
a href="+code=sitre" class="sref">sitre.2a> = 0, 
a href="+code=a_speed" class="sref">a_speed.2a>  = 7 << (
a href="+code=drive" class="sref">drive
/a>->
a href="+code=dn" class="sref">dn.2a> * 4);1  80.2a>        int 
a href="+code=u_speed" class="sref">u_speed.2a> = 0, 
a href="+code=u_flag" class="sref">u_flag.2a> = 1 << 
a href="+code=drive" class="sref">drive
/a>->
a href="+code=dn" class="sref">dn.2a>;1  81.2a>        
a href="+code=u16" class="sref">u16
/a>                     
a href="+code=reg4042" class="sref">reg4042
/a>, 
a href="+code=reg44" class="sref">reg44
/a>, 
a href="+code=reg48" class="sref">reg48
/a>, 
a href="+code=reg4a" class="sref">reg4a.2a>;1  82.2a>        const 
a href="+code=u8" class="sref">u8
/a> 
a href="+code=speed" class="sref">speed.2a>          = 
a href="+code=drive" class="sref">drive
/a>->
a href="+code=dma_mode" class="sref">dma_mode
/a>;1  83
/a>1  84.2a>        
a href="+code=pci_read_config_word" class="sref">pci_read_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 
a href="+code=maslave" class="sref">maslave.2a>, &
a href="+code=reg4042" class="sref">reg4042
/a>);1  85.2a>        
a href="+code=sitre" class="sref">sitre.2a> = (
a href="+code=reg4042" class="sref">reg4042
/a> & 0x4000) ? 1 : 0;1  86.2a>        
a href="+code=pci_read_config_word" class="sref">pci_read_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 0x44, &
a href="+code=reg44" class="sref">reg44
/a>);1  87.2a>        
a href="+code=pci_read_config_word" class="sref">pci_read_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 0x48, &
a href="+code=reg48" class="sref">reg48
/a>);1  88.2a>        
a href="+code=pci_read_config_word" class="sref">pci_read_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 0x4a, &
a href="+code=reg4a" class="sref">reg4a.2a>);1  89
/a>1  90.2a>        if (
a href="+code=speed" class="sref">speed.2a> >= 
a href="+code=XFER_UDMA_0" class="sref">XFER_UDMA_0.2a>) {1  91.2a>                
a href="+code=u_speed" class="sref">u_speed.2a> = (
a href="+code=speed" class="sref">speed.2a> - 
a href="+code=XFER_UDMA_0" class="sref">XFER_UDMA_0.2a>) << (
a href="+code=drive" class="sref">drive
/a>->
a href="+code=dn" class="sref">dn.2a> * 4);1  92
/a>1  93.2a>                if (!(
a href="+code=reg48" class="sref">reg48
/a> & 
a href="+code=u_flag" class="sref">u_flag.2a>))1  94.2a>                        
a href="+code=pci_write_config_word" class="sref">pci_write_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 0x48, 
a href="+code=reg48" class="sref">reg48
/a>|
a href="+code=u_flag" class="sref">u_flag.2a>);1  95.2a>                if ((
a href="+code=reg4a" class="sref">reg4a.2a> & 
a href="+code=a_speed" class="sref">a_speed.2a>) != 
a href="+code=u_speed" class="sref">u_speed.2a>) {1  96.2a>                        
a href="+code=pci_write_config_word" class="sref">pci_write_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 0x4a, 
a href="+code=reg4a" class="sref">reg4a.2a> & ~
a href="+code=a_speed" class="sref">a_speed.2a>);1  97.2a>                        
a href="+code=pci_read_config_word" class="sref">pci_read_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 0x4a, &
a href="+code=reg4a" class="sref">reg4a.2a>);1  98.2a>                        
a href="+code=pci_write_config_word" class="sref">pci_write_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 0x4a, 
a href="+code=reg4a" class="sref">reg4a.2a>|
a href="+code=u_speed" class="sref">u_speed.2a>);1  99.2a>                }1 100.2a>        } else {1 101.2a>                const 
a href="+code=u8" class="sref">u8
/a> 
a href="+code=mwdma_to_pio" class="sref">mwdma_to_pio
/a>[] = { 0, 3, 4 };1 102
/a>1 103.2a>                if (
a href="+code=reg48" class="sref">reg48
/a> & 
a href="+code=u_flag" class="sref">u_flag.2a>)1 104.2a>                        
a href="+code=pci_write_config_word" class="sref">pci_write_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 0x48, 
a href="+code=reg48" class="sref">reg48
/a> & ~
a href="+code=u_flag" class="sref">u_flag.2a>);1 105.2a>                if (
a href="+code=reg4a" class="sref">reg4a.2a> & 
a href="+code=a_speed" class="sref">a_speed.2a>)1 106.2a>                        
a href="+code=pci_write_config_word" class="sref">pci_write_config_word
/a>(
a href="+code=dev" class="sref">dev
/a>, 0x4a, 
a href="+code=reg4a" class="sref">reg4a.2a> & ~
a href="+code=a_speed" class="sref">a_speed.2a>);1 107
/a>1 108.2a>                if (
a href="+code=speed" class="sref">speed.2a> >= 
a href="+code=XFER_MW_DMA_0" class="sref">XFER_MW_DMA_0.2a>)1 109.2a>                        
a href="+code=drive" class="sref">drive
/a>->
a href="+code=pio_mode" class="sref">pio_mode
/a> =1 110.2a>                                
a href="+code=mwdma_to_pio" class="sref">mwdma_to_pio
/a>[
a href="+code=speed" class="sref">speed.2a> - 
a href="+code=XFER_MW_DMA_0" class="sref">XFER_MW_DMA_0.2a>] + 
a href="+code=XFER_PIO_0" class="sref">XFER_PIO_0.2a>;1 111.2a>                else1 112.2a>                        
a href="+code=drive" class="sref">drive
/a>->
a href="+code=pio_mode" class="sref">pio_mode
/a> = 
a href="+code=XFER_PIO_2" class="sref">XFER_PIO_2.2a>; 
spat class="comment">/* for SWDMA2 */
/spatio 113
/a>1 114.2a>                
a href="+code=slc90e66_set_pio_mode" class="sref">slc90e66_set_pio_mode
/a>(
a href="+code=hwif" class="sref">hwif
/a>, 
a href="+code=drive" class="sref">drive
/a>);1 115.2a>        }1 116
/a>}1 117
/a>1 118
/a>static 
a href="+code=u8" class="sref">u8
/a> 
a href="+code=slc90e66_cable_detect" class="sref">slc90e66_cable_detect
/a>(
a href="+code=ide_hwif_t" class="sref">ide_hwif_t
/a> *
a href="+code=hwif" class="sref">hwif
/a>)1 119
/a>{1 120.2a>        struct 
a href="+code=pci_dev" class="sref">pci_dev
/a> *
a href="+code=dev" class="sref">dev
/a> = 
a href="+code=to_pci_dev" class="sref">to_pci_dev
/a>(
a href="+code=hwif" class="sref">hwif
/a>->
a href="+code=dev" class="sref">dev
/a>);1 121.2a>        
a href="+code=u8" class="sref">u8
/a> 
a href="+code=reg47" class="sref">reg47
/a> = 0, 
a href="+code=mask" class="sref">mask
/a> = 
a href="+code=hwif" class="sref">hwif
/a>->
a href="+code=channel" class="sref">channel.2a> ? 0x01 : 0x02;1 122
/a>1 123.2a>        
a href="+code=pci_read_config_byte" class="sref">pci_read_config_byte
/a>(
a href="+code=dev" class="sref">dev
/a>, 0x47, &
a href="+code=reg47" class="sref">reg47
/a>);1 124
/a>1 125.2a>        
spat class="comment">/* bit[0(1)]: 0:80, 1:40 */
/spatio 126.2a>        return (
a href="+code=reg47" class="sref">reg47
/a> & 
a href="+code=mask" class="sref">mask
/a>) ? 
a href="+code=ATA_CBL_PATA40" class="sref">ATA_CBL_PATA40
/a> : 
a href="+code=ATA_CBL_PATA80" class="sref">ATA_CBL_PATA80.2a>;1 127.2a>}1 128
/a>1 129
/a>static const struct 
a href="+code=ide_port_ops" class="sref">ide_port_ops
/a> 
a href="+code=slc90e66_port_ops" class="sref">slc90e66_port_ops
/a> = {1 130.2a>        .
a href="+code=set_pio_mode" class="sref">set_pio_mode
/a>           = 
a href="+code=slc90e66_set_pio_mode" class="sref">slc90e66_set_pio_mode
/a>,1 131.2a>        .
a href="+code=set_dma_mode" class="sref">set_dma_mode
/a>           = 
a href="+code=slc90e66_set_dma_mode" class="sref">slc90e66_set_dma_mode
/a>,1 132.2a>        .
a href="+code=cable_detect" class="sref">cable_detect
/a>           = 
a href="+code=slc90e66_cable_detect" class="sref">slc90e66_cable_detect
/a>,1 133.2a>};1 134
/a>1 135
/a>static const struct 
a href="+code=ide_port_info" class="sref">ide_port_info
/a> 
a href="+code=slc90e66_chipset" class="sref">slc90e66_chipset
/a> 
a href="+code=__devinitconst" class="sref">__devinitconst
/a> = {1 136.2a>        .
a href="+code=nama" class="sref">nama
/a>           = 
a href="+code=DRV_NAME" class="sref">DRV_NAME
/a>,1 137.2a>        .
a href="+code=enablebits" class="sref">enablebits.2a>     = { {0x41, 0x80, 0x80}, {0x43, 0x80, 0x80} },1 138.2a>        .
a href="+code=port_ops" class="sref">port_ops
/a>       = &
a href="+code=slc90e66_port_ops" class="sref">slc90e66_port_ops
/a>,1 139.2a>        .
a href="+code=pio_mask" class="sref">pio_mask
/a>       = 
a href="+code=ATA_PIO4" class="sref">ATA_PIO4
/a>,1 140.2a>        .
a href="+code=swdma_mask" class="sref">swdma_mask.2a>     = 
a href="+code=ATA_SWDMA2_ONLY" class="sref">ATA_SWDMA2_ONLY
/a>,1 141.2a>        .
a href="+code=mwdma_mask" class="sref">mwdma_mask.2a>     = 
a href="+code=ATA_MWDMA12_ONLY" class="sref">ATA_MWDMA12_ONLY
/a>,1 142.2a>        .
a href="+code=udma_mask" class="sref">udma_mask.2a>      = 
a href="+code=ATA_UDMA4" class="sref">ATA_UDMA4
/a>,1 143.2a>};1 144
/a>1 145
/a>static int 
a href="+code=__devinit" class="sref">__devinit
/a> 
a href="+code=slc90e66_init_one" class="sref">slc90e66_init_one
/a>(struct 
a href="+code=pci_dev" class="sref">pci_dev
/a> *
a href="+code=dev" class="sref">dev
/a>, const struct 
a href="+code=pci_device_id" class="sref">pci_device_id
/a> *
a href="+code=id" class="sref">id.2a>)1 146.2a>{1 147.2a>        return 
a href="+code=ide_pci_init_one" class="sref">ide_pci_init_one
/a>(
a href="+code=dev" class="sref">dev
/a>, &
a href="+code=slc90e66_chipset" class="sref">slc90e66_chipset
/a>, 
a href="+code=NULL" class="sref">NULL
/a>);1 148
/a>}1 149
/a>1 150.2a>static const struct 
a href="+code=pci_device_id" class="sref">pci_device_id
/a> 
a href="+code=slc90e66_pci_tbl" class="sref">slc90e66_pci_tbl
/a>[] = {1 151.2a>        { 
a href="+code=PCI_VDEVICE" class="sref">PCI_VDEVICE
/a>(
a href="+code=EFAR" class="sref">EFAR
/a>, 
a href="+code=PCI_DEVICE_ID_EFAR_SLC90E66_1" class="sref">PCI_DEVICE_ID_EFAR_SLC90E66_1
/a>), 0 },1 152.2a>        { 0, },1 153.2a>};1 154.2a>
a href="+code=MODULE_DEVICE_TABLE" class="sref">MODULE_DEVICE_TABLE
/a>(
a href="+code=pci" class="sref">pci
/a>, 
a href="+code=slc90e66_pci_tbl" class="sref">slc90e66_pci_tbl
/a>);1 155.2a>1 156.2a>static struct 
a href="+code=pci_driver" class="sref">pci_driver
/a> 
a href="+code=slc90e66_pci_driver" class="sref">slc90e66_pci_driver
/a> = {1 157.2a>        .
a href="+code=nama" class="sref">nama
/a>           = 
spat class="string">"SLC90e66_IDE"
/spati,1 158.2a>        .
a href="+code=id_table" class="sref">id_table
/a>       = 
a href="+code=slc90e66_pci_tbl" class="sref">slc90e66_pci_tbl
/a>,1 159.2a>        .
a href="+code=probe" class="sref">probe
/a>          = 
a href="+code=slc90e66_init_one" class="sref">slc90e66_init_one
/a>,1 160.2a>        .
a href="+code=remove" class="sref">remove
/a>         = 
a href="+code=ide_pci_remove" class="sref">ide_pci_remove
/a>,1 161.2a>        .
a href="+code=suspend" class="sref">suspend.2a>        = 
a href="+code=ide_pci_suspend" class="sref">ide_pci_suspend
/a>,1 162.2a>        .
a href="+code=resuma" class="sref">resuma
/a>         = 
a href="+code=ide_pci_resuma" class="sref">ide_pci_resuma
/a>,1 163.2a>};1 164
/a>1 165
/a>static int 
a href="+code=__init" class="sref">__init
/a> 
a href="+code=slc90e66_ide_init" class="sref">slc90e66_ide_init
/a>(void)1 166.2a>{1 167.2a>        return 
a href="+code=ide_pci_register_driver" class="sref">ide_pci_register_driver
/a>(&
a href="+code=slc90e66_pci_driver" class="sref">slc90e66_pci_driver
/a>);1 168
/a>}1 169
/a>1 170.2a>static void 
a href="+code=__exit" class="sref">__exit
/a> 
a href="+code=slc90e66_ide_exit" class="sref">slc90e66_ide_exit
/a>(void)1 171.2a>{1 172.2a>        
a href="+code=pci_unregister_driver" class="sref">pci_unregister_driver
/a>(&
a href="+code=slc90e66_pci_driver" class="sref">slc90e66_pci_driver
/a>);1 173.2a>}1 174
/a>1 175.2a>
a href="+code=module_init" class="sref">module_init
/a>(
a href="+code=slc90e66_ide_init" class="sref">slc90e66_ide_init
/a>);1 176.2a>
a href="+code=module_exit" class="sref">module_exit
/a>(
a href="+code=slc90e66_ide_exit" class="sref">slc90e66_ide_exit
/a>);1 177
/a>1 178.2a>
a href="+code=MODULE_AUTHOR" class="sref">MODULE_AUTHOR
/a>(
spat class="string">"Andre Hedrick"
/spati);1 179.2a>
a href="+code=MODULE_DESCRIPTION" class="sref">MODULE_DESCRIPTION
/a>(
spat class="string">"PCI driver module for SLC90E66 IDE"
/spati);1 180.2a>
a href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSE
/a>(
spat class="string">"GPL"
/spati);1 181.2a>
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