> > titl>LXR /linu/drtvers/edac/cell_edac.c> >< titl>> /> body class="full" t>> divxclass=" divxclass="
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2316270ionvalue= v2316.270io"> "> v30v31.2 > 2316270i16.su6.2.6ionva57a "> v34.4.13 > 2316.8.257a xuvalue="v2316.273> pctionvalue="v328.23"> "> 4.2"273>op3tionvalue=23270> v3.18.12 > 2316.4tionva270>op2tionvalue=23270> pctionvalue="v328.21"> "> "> 270>op1tionvalue=2327018.12 > 2316.3c1otionvalue2701otionvalue=2316270> pctionvalue="v328.19"> "> "> 270>6.2.68"> "> 27313.18 > 2316.3.57tionvalue2731ionvalue=2316.o270> pctionvalue="v323.17"> "> "> 270>v3.2n~ "> v3>270opctio"> > opctionvalue="v.19. v3>27/"> > ionvalue=67opctio"> > opctionvalue="v.19.lue=67o8> > ionvalue=67o> > pctionvalue= v304460"> onva27.opctionvalue=2327.opc0"> "> v30v3.2 > 2326.op5tionvalue=2326.op60"> "> v301441 > 2326.opctionvalue=2326..18.4"> "> v.18.4 > 2326..13tionvalue=2326..18.3"> "> v.18.3 > 2326..12tionvalue=2326..18.2"> "> v.18.2 > 2326..11tionvalue=2326..18.1"> "> v.18.1 > 2326..tionvalue=23162..1"> "> v.18.1 > 2316.72xuvalue="v2316.27"> "> v.18.1 > 2316.726o8> > ionvalue=66o> > pctionvalue= v304460"> onva26.opctionvalue=2326.opc0"> "> v30v3.2 > 2326.op5tionvalue=2326.op60"> "> v301441 > 2326.opctionvalue=2326..18.4"> "> v.18.4 > 2326..15tionvalue=2326..17.5"> "> v.17.5 > 2326..12tionvalue=2326..18.2"> "> v.18.2 > 2326..11tionvalue=2326..18.1"> "> v.18.1 > 2326..12tionvalue=2326. selee " "> v.18.2 > 232op3tionvalue=232op60"> "> v301441 > 23250>v3.2n~ "> v3>250pt"> "> v30v31.2 > 2316250ionvalue= v2316.250io"> "> v30v31.2 > 2316250i16.su6.2.6ionva55a "> v34.4.13 > 2316.8.255a xuvalue="v2316.253> pctionvalue="v328.23"> "> 4.2"253>op3tionvalue=23250> v3.18.12 > 2316.4tionva250>op2tionvalue=23250> pctionvalue="v328.21"> "> "> 2 2316..tionvalue=2216...1"> "> v.17.1 > 2316261ctionvalue=2316.26.4"> "> v3.16.4 > 2316.123tionvalue=2316.1623"> "> v3.16.3 > 2316.1622ionvalue=2316.16.22> "> v3.16.2 > 2316.161ti2nvalue=2316.16.1">2 "> v3.16.1 > 2316.1tionva2ue=2316.11"> ">2 v3.16.1 > 2316.5ctionvalue2 v2316.5cti1"> 2> v3.16.1 > 2316.5ct3tionv2lue=2316.5360"> 2"> v30v3821 > 2316.5362tio2value=2316.5260">2 "> v30v31.2 > 2316.5261t2onvalue=2316.51602> "> v30v34.2 > 2316.5162tionvalue=2316.51230"> "> v30v3.2 > 2316.52otionvalue=2316.5260"> "> v30v9.2 > 2316.52.tionvalue=2316.52c0"> "> v30v3.2 > 2316.527tionvalue=2316.12.7"> "> v3.15.7 > 2316.1 op2tionvalue=232 "> v30v34.2 > 2316.5162lue=2316.8.13"> 2"> v34.4.13 > 2316.8.12tio2value=2316.4.62">2 "> v3.18.12 > 2316.4.66t2onvalue=2316.8.112> "> v34.4.11 > 2316.8.12tionvalue=2316.4.20"> "> v3.15.10 > 2316.42otionvalue=2316..219"> "> v34..19 > 2316..2.tionvalue=2316..258"> "> v3.1.78 > 2316..27tionvalue=2316.128 > 61 > 2316.1 op1tionvalue=232> "> v3.15.10 > 2316.42ionvalue=2316.4.2"2 "> v3.18.12 > 2316.4.6ti2nvalue=2316.4.6"> 2 "> v3.18.12 > 2316.4tionva2ue=2316.4"> "> 23.18.12 > 2316.3ctionvalue= 22316.3cti"> "> 23.18.12 > 2316.3c1otionvalue22316.3.19"> "> 230.4.19 > 2316.3.1.tionvalue22316.3.58"> "> 23013.18 > 2316.3.57tionvalue22316.3.17"> "> 230.4.17 > 2316.3.11tionvalue22316.3.66"> "> 23013.136 >2316.3.6tionvalue=22316.3pct"> "> 2v30v31.2 > 2316.3pcionvalue2 v2316.3.64"> "2 v3.18.14 > 2316.3.63tionv2lue=2316.3.13"> 2"> v34.4.13 > 2316.3.12tio2value=2316.3.62">2 "> v3.18.12 > 2316.3.66t2onvalue=2316.3.112> "> v34.4.11 > 2316.3.12tionvalue=2316.= 23060"> "> v30.2 > 2316.=2otionvalue=2316.329"> "> v30.4.19 > 2316.32.tionvalue=2316.328"> "> v3013.18 > 2316.327tionvalue=2316.327"> "> v30.4.17 > 2316.3>otionvalue=23162> "> v30.4.19 > 2316.322pionvalue= v2316.2 > pctionvalue="v328.25"> "> 316.2 >16.su6.2.6ionva2ue "> v34.4.13 > 2316.8.222onvalue=2316.4.2"2 > pctionvalue="v328.23"> "> 4.2"2 >=2316.39> v3.18.12 > 2316.4tionva22e=2316.4"> "> 2 > pctionvalue="v328.21"> "> "> 2 >6.4.60"> "> 23018.12 > 2316.3c1otionvalue22316.3.19"> "> 2 > pctionvalue="v328.19"> "> "> 2 >6.2....1"> ">2 v13.18 > 2316.3.57tionvalue22316.3.17"> "> 2 > pctionvalue="v323.17"> "> "> 2 >v3.2n~ "> v3>2 >13.136 >2316.3.6tionvalue=22316.3pct"> "> 2"> > opctionvalue="323.15"> "> "> 2">16.su6.2.6ionva2ue "> v34.4.13 > 2316.8.222ovalue=2316.4.2"2 v3.18.12 > 2316.3tionva2 =2316.39 v3.18.12 > 2316.4tionva22e2316.4"> "> 2 pctionvalue="v328.21"> "> "> 2 6.4.60"> "> 2308.12 > 2316.3c1otionvalue2236.3.19"> "> 2 pctionvalue="v328.19"> "> "> 2 6.2....1"> ">2 v3.18 > 2316.3.57tionvalue22313.2n~ "> v3>2 >1.18 > 2316.3.57tionvalue223.2n~ "> v3>2 .18 > 2316.3.57tionvalue221value=2316.4.2"221821 > pctionvalue= 4.2"221=.2.66"> "> 221811 > pctionvalue= "> 2211.2.66"> "> 221511 > tionvalue= v3"> 2216.4.60"> "> 2108.12 > 2316.3c1otionvalue2136.3.19"> "> 21 pctionvalue="v328.19"> "> "> 21 6.2....1"> ">21v3.18 > 2316.3.57tionvalue21313.2n~ "> v3>2321.18 > 2316.3.57tionvalue>ionvalue=2316.o21.18 > 2316.3.57tionvalue>0e>ionvalue=2316.o2 > pctionvalue="v308.27"> "> 16.o2 >v3.2n~ "> v3>2 > pctionvalue= v304.66"> "> v3>2 ionvalue= v2316.2 > pctionvalue="v308.25"> "> 316.2 >16.su6.2.6ionva2 > pctionvalue= v304.64"> "> onva2 >value=2316.4.2"2 > pctionvalue="v308.23"> "> 4.2"2 >=.2.66"> "> 2 > pctionvalue= v304.62"> "> "> 2 >1.2.66"> "> 2 > pctionvalue="v308.21"> "> "> 2 >6.4.60"> "> 2 > pctionvalue= v304.60"> "> "> 2 >6.3.19"> "> 2 > pctionvalue="v308.19"> "> "> 2 >6.2....1"> ">2 > pctionvalue= v304.58"> "> ">2 >ionvalue=2316.o2 > pctionvalue="v323.17"> "> "> 20 >v3.2n~ "> v3>2 > pctionvalue= v304.66"> "> v3>2 16.3pct"> "> 2"> > opctionvalue="303.15"> "> "> 2">16.su6.2.6ionva2o"> > pctionvalue= v304460"> onva2o"value=2316.4.2"2tio"> > pctionvalue= v303360"> 4.2"2ti=.2.66"> "> 2pctio"> > pctionvalue= v303260""> 2pc1.2.66"> "> 2/opctio"> > pctionvalue= v30316"> 2/o6.4.60"> "> 22 > pctionvalue= v303"> 22<6.3.19"> "> 20.2 > pctionvalue= v3"> 20.6.2....1"> ">29.2 > pctionvalue= v3 v3>2 >3.2n~ "> v3>2 > > pctionvalue= v3 v3>>v3.2n~ "> v3>2 > pctionvalue= v3 v3>19"value=2316.4.2"19"v > pctionvalue= v3 v3>19"6alue=2316.4.2"19"tio"> > pctionvalue= v303260""> 12<5.2.66"> "> 12 > pctionvalue= v30316"> 1460"> "> v301411 > pctionvalue="v31560">1 "> v301441 > pctionvalue= v3.460"> "> 1v3018311 > pctionvalue= v3.460"> "> v301811 > 1ctionvalue= v3.460"> "> v3018.2 pctionvalue="v308.25"> "> 316.1/o8> > ionvalue=1/o> > pctionvalue= v304460"> onva16.opctionvalue=2316.opc0"> "> v30v3.2 > 2316.op3tionvalue=2316.op60"> "> v301821 > 2316.op2tionvalue=2316.op60"> "> v3018.2 > 2316.op1tionvalue=2316.op60"> "> v30v3.2 > 2316.otionvalue=23161o0"> "> v30v3.2 > 2316.o1ctionvalue=2316.o1c0"> "> v30v3.2 > 2316.o17tionvalue=2316.o170"> "> v301461 > 2316.o>16.su6.2.6ionva> pctionvalue= v304.64"> "> onva170>op1tionvalue=2317018.12 > 2316.3c1otionvalue1701otionvalue=2316170> pctionvalue="v328.19"> "> "> 170>6.2.68"> "> 17313.18 > 2316.3.57tionvalue1731ionvalue=2316.o170> pctionvalue="v323.17"> "> "> 170>v3.2n~ "> v3>170opctio"> > opctionvalue="v.19. v3>17/"> > ionvalue=17opctio"> > opctionvalue="v.19.lue=17o8> > ionvalue=17o> > pctionvalue= v304460"> onva17.opctionvalue=2317.opc0"> "> v30v3.2 > 2316.op5tionvalue=2316.op60"> "> v301441 > 2316.opctionvalue=2316..18.4"> "> v.18.4 > 2316..13tionvalue=2316..18.3"> "> v.18.3 > 2316..12tionvalue=2316..18.2"> "> v.18.2 > 2316..11tionvalue=2316..18.1"> "> v.18.1 > 2316..tionvalue=23161..1"> "> v.18.1 > 2316.7>value=2316.4.2"> pctionvalue="v308.23"> "> 4.2"16316.2.68"> "> 16316 pctionvalue="v308.23"> "> 4.2"1631.tionvalue=231616014.67 > 2316.2.61tionvalue1601v3.2n~ "> v3>16014.636 >2316.2.6tionvalue=16016.2.65"> "> 16016.636 >2316.2.6tionvalue=16018> > ionvalue=16014.64 > 2316.2.63tionvalue1601value=2316.4.2">6014.63 > 2316.2.62tionvalue>601op5tionvalue=2316014.62 > 2316.2.6ionvalue="1601opctionvalue=2316014.61 > 2316.2c60tionvalue1601.13tionvalue=2316014.60 > 2316.4.5otionvalue1601.12tionvalue=2316014.59 > 2316.2.5.tionvalue16016.2.68"> "> 16314.5pctio"> > op2316.2.57tionvalue1631.tionvalue=231616014.57 > 2316.2.51tionvalue1601v3.2n~ "> v3>16015.636 >2316.2.6tionvalue=16016.2.65"> "> 16016.636 >2316.2.6tionvalue=16018> > ionvalue=16015.64 > 2316.2.63tionvalue1601value=2316.4.2">6015.63 > 2316.2.62tionvalue>601op5tionvalue=2316015.62 > 2316.2.6ionvalue="1601opctionvalue=2316015.61 > 2316.2c60tionvalue1601.13tionvalue=2316014.50 > 2316.4.4otionvalue1601.12tionvalue=2316014.49 > 2316.2.5.tionvalue16016.2.68"> "> 16318.48 > 2316.2.57tionvalue1631.tionvalue=2316160.4.47 > 2316.2.41tionvalue160.v3.2n~ "> v3>16018.46 > 2316.2.6tionvalue=16016.2.45"> "> 16016.46 > 2316.2.6tionvalue=16018> > ionvalue=16018.44 > 2316.2.63tionvalue1601value=2316.4.2">60.4.43 > 2316.2.42tionvalue>60.op5tionvalue=2316018.42 > 2316.2.6ionvalue="1601opctionvalue=23160.4.41 > 2316.2c40tionvalue160..13tionvalue=2316018.40 > 2316.4..otionvalue1601.12tionvalue=23160.4.39 > 2316.6.3.tionvalue1 v 3.2n~ "> v3>13> pctionvalue="v323.17"> "> "> 1ue=13.2n~ "> v3>13> 3.18 > 2316.3.57tionvalue13> 3.2n~ "> v3>13> > pctionvalue= v3 v3>13>0"> > ionvalue=13>0" > pctionvalue= v3 v3>13>08> > ionvalue=16052> 316.2c40tionvalue=23l "> v3.11605value=2316.4.2">6027"> "> v.18.1 > 2316.7>602op5tionvalue=231602op60"> "> v301441 > 231602opctionvalue=231602 "> v30v34.2 > 2316.5161602.13tionvalue=231602> "> v3.15.10 > 2316.41.3>otionvalue=23161162> "> v30.4.19 > 2316.31ue223.2n~ "> v3>13>2 .18 > 2316.3.57tionvalue1ue>ionvalue=2316.o1.o21.18 > 2316.3.57tionvalue13>>v3.2n~ "> v3>13>2 > pctionvalue= v3 v3>16pionvalue= v2316.>6.> pctionvalue="v308.25"> "> 316.1.o>16.su6.2.6ionva>va> pctionvalue= v304.64"> "> onva1.7>value=2316.4.2">2"> pctionvalue="v308.23"> "> 4.2"163>=.2.66"> "> 163>= pctionvalue="v308.23"> "> 4.2"163>opctionvalue=23160> pctionvalue="v308.21"> "> "> 160>.13tionvalue=2316018.12 > 2316.3c1otionvalue1601otionvalue=2316160> pctionvalue="v328.19"> "> "> 160>6.2.68"> "> 16313.18 > 2316.3.57tionvalue1631ionvalue=2316.o160> pctionvalue="v323.17"> "> "> 160>v3.2n~ "> v3>160opctio"> > opctionvalue="v.19. v3>16/"> > ionvalue=16opctio"> > opctionvalue="v.19.lue=16o8> > ionvalue=16o> > pctionvalue= v304460"> onva16.opctionvalue=2316.opc0"> "> v30v3.2 > 2316.op5tionvalue=2316.op60"> "> v301441 > 2316.opctionvalue=2316..18.4"> "> v.18.4 > 2316..15tionvalue=2316..17.5"> "> v.17.5 > 2316..12tionvalue=2316..18.2"> "> v.18.2 > 2313>23.2n~ "> v3>13>2 pctionvalue="v323.17"> "> "> 160>3.2n~ "> v3>160o pctionvalue="v323.17"> "> "> 163.2n~ "> v3>16 pctionvalue="v323.17"> "> "> 1lue=2316.5360"> 1"> v30v3821 > 2316.5362tio1value=2316.5260">1 "> v30v31.2 > 2316.5261t1onvalue=2316.51601> "> v30v34.2 > 2316.5161tionvalue=2316.51130"> "> v30v3.2 > 2316.51otionvalue=2316.5160"> "> v30v9.2 > 2316.51.tionvalue=2316.51c0"> "> v30v3.2 > 2316.517tionvalue=2316.11.7"> "> v3.15.7 > 2316.1>opctionvalue=231 "> v30v34.2 > 2316.5161lue=2316.8.13"> 1"> v34.4.13 > 2316.8.12tio1value=2316.4.62">1 "> v3.18.12 > 2316.4.66t1onvalue=2316.8.111> "> v34.4.11 > 2316.8.11tionvalue=2316.4.10"> "> v3.15.10 > 2316.41otionvalue=2316..119"> "> v34..19 > 2316..1.tionvalue=2316..158"> "> v3.1.78 > 2316..17tionvalue=2316.118 > 61 > 2316.1>.13tionvalue=231> "> v3.15.10 > 2316.41onvalue=2316.3.111> "> v34.4.11 > 2316.3.11tionvalue=2316.= 13060"> "> v30.2 > 2316.=1otionvalue=2316.319"> "> v30.4.19 > 2316.31.tionvalue=2316.318"> "> v3013.18 > 2316.317tionvalue=2316.317"> "> v30.4.17 > 2316.31otionvalue=23161> "> v30.4.19 > 2316.312alue=2316.4.62">12 "> v3.18.12 > 2316.4.66t12e2316.4"> "> 1 pctionvalue="v328.21"> "> "> 1 6.4.60"> "> 1308.12 > 2316.3c1otionvalue1236.3.19"> "> 1 pctionvalue="v328.19"> "> "> 1 6.2....1"> ">1 v3.18 > 2316.3.57tionvalue12313.2n~ "> v3>1 >1.18 > 2316.3.57tionvalue>6.2.68"> "> 13.18 > 2316.3.57tionvalue113.2n~ "> v3>11.18 .2n~ >/spacti >/formti >a .2n~ href="../linux+v3.7.3/drivers/edac/cell_edac.c">.2n~ >img src="../.static/gfx/right.png" alt=">>">.2>/spacti.2>spac class="lxr_search">.2n~
.2n~ >input typionhidden" namionnavtarget" .57tion">.2n~ >input typiontext" namionsearch" idonsearch">.2n~ >butt6.3typionsubmit">Search/formti >/spacti.2>spac class="lxr_prefs"ti >a href="+prefs?return=drivers/edac/cell_edac.c".2n~ onclick="return ajax_prefs();">.2n~ Prefsi >/a>.2>/spactin~ >/divtin~ >form ac/opc="ajax+*" method="post" onsubmit="return false;">.2>input typionhidden" namionajax_lookup" idonajax_lookup" .57tion">.n~ >/formti.n~ >div class="headingbott6m">div idonsearch_results" class="search_results"i tin~ >/divti >div idoncontent">i >div idonfile_contents"t
   1>/a>>spac class="comment">/*>/spacti   2>/a>>spac class="comment"> * Cell MIC driver for ECC counting>/spacti   3>/a>>spac class="comment"> *>/spacti   4>/a>>spac class="comment"> * Copyright 2007 Benjamin Herrenschmidt, IBM Corp.>/spacti   5>/a>>spac class="comment"> *                <benh@kernel.crashing.org>>/spacti   6>/a>>spac class="comment"> *>/spacti   7>/a>>spac class="comment"> * This file may be distributed under the terms of the>/spacti   8>/a>>spac class="comment"> * GNU General Public License.>/spacti   9>/a>>spac class="comment"> */>/spacti  opcta>#undef >a href="+code=DEBUG" class="sref">DEBUG>/a>.  11>/a>.  12>/a>#include <linux/edac.h>/a>>.  13>/a>#include <linux/module.h>/a>>.  14>/a>#include <linux/init.h>/a>>.  15>/a>#include <linux/platform_device.h>/a>>.  16>/a>#include <linux/stop_machine.h>/a>>.  17>/a>#include <linux/io.h>/a>>.  18>/a>#include <asm/machdep.h>/a>>.  19>/a>#include <asm/cell-regs.h>/a>>.  20>/a>.  21>/a>#include "edac_core.h>/a>".  22>/a>.  23>/a>struct >a href="+code=cell_edac_priv" class="sref">cell_edac_priv>/a>.  24>/a>{.  25>/a>        struct >a href="+code=cbe_mic_tm_regs" class="sref">cbe_mic_tm_regs>/a> >a href="+code=__iomem" class="sref">__iomem>/a>  *>a href="+code=regs" class="sref">regs>/a>;.  26>/a>        int                             >a href="+code=node" class="sref">node>/a>;.  27>/a>        int                             >a href="+code=chanmask" class="sref">chanmask>/a>;.  28>/a>#ifdef >a href="+code=DEBUG" class="sref">DEBUG>/a>.  29>/a>        >a href="+code=u64" class="sref">u64>/a>                             >a href="+code=prev_fir" class="sref">prev_fir>/a>;.  3pcta>#endif.  31>/a>};.  32>/a>.  33>/a>static void >a href="+code=cell_edac_count_ce" class="sref">cell_edac_count_ce>/a>(struct >a href="+code=mem_ctl_info" class="sref">mem_ctl_info>/a> *>a href="+code=mci" class="sref">mci>/a>, int >a href="+code=chan" class="sref">chan>/a>, >a href="+code=u64" class="sref">u64>/a> >a href="+code=ar" class="sref">ar>/a>).  34>/a>{.  35>/a>        struct >a href="+code=cell_edac_priv" class="sref">cell_edac_priv>/a>           *>a href="+code=priv" class="sref">priv>/a> = >a href="+code=mci" class="sref">mci>/a>->>a href="+code=pvt_info" class="sref">pvt_info>/a>;.  36>/a>        struct >a href="+code=csrow_info" class="sref">csrow_info>/a>               *>a href="+code=csrow" class="sref">csrow>/a> = >a href="+code=mci" class="sref">mci>/a>->>a href="+code=csrows" class="sref">csrows>/a>[0];.  37>/a>        unsigned long                   >a href="+code=address" class="sref">address>/a>, >a href="+code=pfn" class="sref">pfn>/a>, >a href="+code=offset" class="sref">offset>/a>, >a href="+code=syndrome" class="sref">syndrome>/a>;.  38>/a>.  39>/a>        >a href="+code=dev_dbg" class="sref">dev_dbg>/a>(>a href="+code=mci" class="sref">mci>/a>->>a href="+code=pdev" class="sref">pdev>/a>, >spac class="string">"ECC CE err on node %d, channel %d, ar = 0x%016llx\n"  40>/a>                >a href="+code=priv" class="sref">priv>/a>->>a href="+code=node" class="sref">node>/a>, >a href="+code=chan" class="sref">chan>/a>, >a href="+code=ar" class="sref">ar>/a>);.  41>/a>.  42>/a>        >spac class="comment">/* Address decoding is likely a bit bogus, to dbl check */>/spacti  43>/a>        >a href="+code=address" class="sref">address>/a> = (>a href="+code=ar" class="sref">ar>/a> & 0xffffffffe0000000ul) >> 29;.  44>/a>        if (>a href="+code=priv" class="sref">priv>/a>->>a href="+code=chanmask" class="sref">chanmask>/a> == 0x3).  45>/a>                >a href="+code=address" class="sref">address>/a> = (>a href="+code=address" class="sref">address>/a> << 1) | >a href="+code=chan" class="sref">chan>/a>;.  46>/a>        >a href="+code=pfn" class="sref">pfn>/a> = >a href="+code=address" class="sref">address>/a> >> >a href="+code=PAGE_SHIFT" class="sref">PAGE_SHIFT>/a>;.  47>/a>        >a href="+code=offset" class="sref">offset>/a> = >a href="+code=address" class="sref">address>/a> & ~>a href="+code=PAGE_MASK" class="sref">PAGE_MASK>/a>;.  48>/a>        >a href="+code=syndrome" class="sref">syndrome>/a> = (>a href="+code=ar" class="sref">ar>/a> & 0x000000001fe00000ul) >> 21;.  49>/a>.  50>/a>        >spac class="comment">/* TODO: Decoding of the error address */>/spacti  51>/a>        >a href="+code=edac_mc_handle_error" class="sref">edac_mc_handle_error>/a>(>a href="+code=HW_EVENT_ERR_CORRECTED" class="sref">HW_EVENT_ERR_CORRECTED>/a>, >a href="+code=mci" class="sref">mci>/a>, 1,i  52>/a>                             >a href="+code=csrow" class="sref">csrow>/a>->>a href="+code=first_page" class="sref">first_page>/a> + >a href="+code=pfn" class="sref">pfn>/a>, >a href="+code=offset" class="sref">offset>/a>, >a href="+code=syndrome" class="sref">syndrome>/a>,i  53>/a>                             0, >a href="+code=chan" class="sref">chan>/a>, -1, >spac class="string">""spac class="string">""  54>/a>}.  55>/a>.  56>/a>static void >a href="+code=cell_edac_count_ue" class="sref">cell_edac_count_ue>/a>(struct >a href="+code=mem_ctl_info" class="sref">mem_ctl_info>/a> *>a href="+code=mci" class="sref">mci>/a>, int >a href="+code=chan" class="sref">chan>/a>, >a href="+code=u64" class="sref">u64>/a> >a href="+code=ar" class="sref">ar>/a>).  57>/a>{.  58>/a>        struct >a href="+code=cell_edac_priv" class="sref">cell_edac_priv>/a>           *>a href="+code=priv" class="sref">priv>/a> = >a href="+code=mci" class="sref">mci>/a>->>a href="+code=pvt_info" class="sref">pvt_info>/a>;.  59>/a>        struct >a href="+code=csrow_info" class="sref">csrow_info>/a>               *>a href="+code=csrow" class="sref">csrow>/a> = >a href="+code=mci" class="sref">mci>/a>->>a href="+code=csrows" class="sref">csrows>/a>[0];.  60>/a>        unsigned long                   >a href="+code=address" class="sref">address>/a>, >a href="+code=pfn" class="sref">pfn>/a>, >a href="+code=offset" class="sref">offset>/a>;.  61>/a>.  62>/a>        >a href="+code=dev_dbg" class="sref">dev_dbg>/a>(>a href="+code=mci" class="sref">mci>/a>->>a href="+code=pdev" class="sref">pdev>/a>, >spac class="string">"ECC UE err on node %d, channel %d, ar = 0x%016llx\n"  63>/a>                >a href="+code=priv" class="sref">priv>/a>->>a href="+code=node" class="sref">node>/a>, >a href="+code=chan" class="sref">chan>/a>, >a href="+code=ar" class="sref">ar>/a>);.  64>/a>.  65>/a>        >spac class="comment">/* Address decoding is likely a bit bogus, to dbl check */>/spacti  66>/a>        >a href="+code=address" class="sref">address>/a> = (>a href="+code=ar" class="sref">ar>/a> & 0xffffffffe0000000ul) >> 29;.  67>/a>        if (>a href="+code=priv" class="sref">priv>/a>->>a href="+code=chanmask" class="sref">chanmask>/a> == 0x3).  68>/a>                >a href="+code=address" class="sref">address>/a> = (>a href="+code=address" class="sref">address>/a> << 1) | >a href="+code=chan" class="sref">chan>/a>;.  69>/a>        >a href="+code=pfn" class="sref">pfn>/a> = >a href="+code=address" class="sref">address>/a> >> >a href="+code=PAGE_SHIFT" class="sref">PAGE_SHIFT>/a>;.  70>/a>        >a href="+code=offset" class="sref">offset>/a> = >a href="+code=address" class="sref">address>/a> & ~>a href="+code=PAGE_MASK" class="sref">PAGE_MASK>/a>;.  71>/a>.  72>/a>        >spac class="comment">/* TODO: Decoding of the error address */>/spacti  73>/a>        >a href="+code=edac_mc_handle_error" class="sref">edac_mc_handle_error>/a>(>a href="+code=HW_EVENT_ERR_UNCORRECTED" class="sref">HW_EVENT_ERR_UNCORRECTED>/a>, >a href="+code=mci" class="sref">mci>/a>, 1,i  74>/a>                             >a href="+code=csrow" class="sref">csrow>/a>->>a href="+code=first_page" class="sref">first_page>/a> + >a href="+code=pfn" class="sref">pfn>/a>, >a href="+code=offset" class="sref">offset>/a>, 0,i  75>/a>                             0, >a href="+code=chan" class="sref">chan>/a>, -1, >spac class="string">""spac class="string">""  76>/a>}.  77>/a>.  78>/a>static void >a href="+code=cell_edac_check" class="sref">cell_edac_check>/a>(struct >a href="+code=mem_ctl_info" class="sref">mem_ctl_info>/a> *>a href="+code=mci" class="sref">mci>/a>).  79>/a>{.  80>/a>        struct >a href="+code=cell_edac_priv" class="sref">cell_edac_priv>/a>           *>a href="+code=priv" class="sref">priv>/a> = >a href="+code=mci" class="sref">mci>/a>->>a href="+code=pvt_info" class="sref">pvt_info>/a>;.  81>/a>        >a href="+code=u64" class="sref">u64>/a>                             >a href="+code=fir" class="sref">fir>/a>, >a href="+code=addreg" class="sref">addreg>/a>, >a href="+code=clear" class="sref">clear>/a> = 0;.  82>/a>.  83>/a>        >a href="+code=fir" class="sref">fir>/a> = >a href="+code=in_be64" class="sref">in_be64>/a>(&>a href="+code=priv" class="sref">priv>/a>->>a href="+code=regs" class="sref">regs>/a>->>a href="+code=mic_fir" class="sref">mic_fir>/a>);.  84>/a>#ifdef >a href="+code=DEBUG" class="sref">DEBUG>/a>.  85>/a>        if (>a href="+code=fir" class="sref">fir>/a> != >a href="+code=priv" class="sref">priv>/a>->>a href="+code=prev_fir" class="sref">prev_fir>/a>) {.  86>/a>                >a href="+code=dev_dbg" class="sref">dev_dbg>/a>(>a href="+code=mci" class="sref">mci>/a>->>a href="+code=pdev" class="sref">pdev>/a>, >spac class="string">"fir change : 0x%016lx\n"a href="+code=fir" class="sref">fir>/a>);.  87>/a>                >a href="+code=priv" class="sref">priv>/a>->>a href="+code=prev_fir" class="sref">prev_fir>/a> = >a href="+code=fir" class="sref">fir>/a>;.  88>/a>        }.  89>/a>#endif.  90>/a>        if ((>a href="+code=priv" class="sref">priv>/a>->>a href="+code=chanmask" class="sref">chanmask>/a> & 0x1) && (>a href="+code=fir" class="sref">fir>/a> & >a href="+code=CBE_MIC_FIR_ECC_SINGLE_0_ERR" class="sref">CBE_MIC_FIR_ECC_SINGLE_0_ERR>/a>)) {.  91>/a>                >a href="+code=addreg" class="sref">addreg>/a> = >a href="+code=in_be64" class="sref">in_be64>/a>(&>a href="+code=priv" class="sref">priv>/a>->>a href="+code=regs" class="sref">regs>/a>->>a href="+code=mic_df_ecc_address_0" class="sref">mic_df_ecc_address_0>/a>);.  92>/a>                >a href="+code=clear" class="sref">clear>/a> |= >a href="+code=CBE_MIC_FIR_ECC_SINGLE_0_RESET" class="sref">CBE_MIC_FIR_ECC_SINGLE_0_RESET>/a>;.  93>/a>                >a href="+code=cell_edac_count_ce" class="sref">cell_edac_count_ce>/a>(>a href="+code=mci" class="sref">mci>/a>, 0, >a href="+code=addreg" class="sref">addreg>/a>);.  94>/a>        }.  95>/a>        if ((>a href="+code=priv" class="sref">priv>/a>->>a href="+code=chanmask" class="sref">chanmask>/a> & 0x2) && (>a href="+code=fir" class="sref">fir>/a> & >a href="+code=CBE_MIC_FIR_ECC_SINGLE_1_ERR" class="sref">CBE_MIC_FIR_ECC_SINGLE_1_ERR>/a>)) {.  96>/a>                >a href="+code=addreg" class="sref">addreg>/a> = >a href="+code=in_be64" class="sref">in_be64>/a>(&>a href="+code=priv" class="sref">priv>/a>->>a href="+code=regs" class="sref">regs>/a>->>a href="+code=mic_df_ecc_address_1" class="sref">mic_df_ecc_address_1>/a>);.  97>/a>                >a href="+code=clear" class="sref">clear>/a> |= >a href="+code=CBE_MIC_FIR_ECC_SINGLE_1_RESET" class="sref">CBE_MIC_FIR_ECC_SINGLE_1_RESET>/a>;.  98>/a>                >a href="+code=cell_edac_count_ce" class="sref">cell_edac_count_ce>/a>(>a href="+code=mci" class="sref">mci>/a>, 1, >a href="+code=addreg" class="sref">addreg>/a>);.  99>/a>        }. 100>/a>        if ((>a href="+code=priv" class="sref">priv>/a>->>a href="+code=chanmask" class="sref">chanmask>/a> & 0x1) && (>a href="+code=fir" class="sref">fir>/a> & >a href="+code=CBE_MIC_FIR_ECC_MULTI_0_ERR" class="sref">CBE_MIC_FIR_ECC_MULTI_0_ERR>/a>)) {. 101>/a>                >a href="+code=addreg" class="sref">addreg>/a> = >a href="+code=in_be64" class="sref">in_be64>/a>(&>a href="+code=priv" class="sref">priv>/a>->>a href="+code=regs" class="sref">regs>/a>->>a href="+code=mic_df_ecc_address_0" class="sref">mic_df_ecc_address_0>/a>);. 102>/a>                >a href="+code=clear" class="sref">clear>/a> |= >a href="+code=CBE_MIC_FIR_ECC_MULTI_0_RESET" class="sref">CBE_MIC_FIR_ECC_MULTI_0_RESET>/a>;. 103>/a>                >a href="+code=cell_edac_count_ue" class="sref">cell_edac_count_ue>/a>(>a href="+code=mci" class="sref">mci>/a>, 0, >a href="+code=addreg" class="sref">addreg>/a>);. 104>/a>        }. 105>/a>        if ((>a href="+code=priv" class="sref">priv>/a>->>a href="+code=chanmask" class="sref">chanmask>/a> & 0x2) && (>a href="+code=fir" class="sref">fir>/a> & >a href="+code=CBE_MIC_FIR_ECC_MULTI_1_ERR" class="sref">CBE_MIC_FIR_ECC_MULTI_1_ERR>/a>)) {. 106>/a>                >a href="+code=addreg" class="sref">addreg>/a> = >a href="+code=in_be64" class="sref">in_be64>/a>(&>a href="+code=priv" class="sref">priv>/a>->>a href="+code=regs" class="sref">regs>/a>->>a href="+code=mic_df_ecc_address_1" class="sref">mic_df_ecc_address_1>/a>);. 107>/a>                >a href="+code=clear" class="sref">clear>/a> |= >a href="+code=CBE_MIC_FIR_ECC_MULTI_1_RESET" class="sref">CBE_MIC_FIR_ECC_MULTI_1_RESET>/a>;. 108>/a>                >a href="+code=cell_edac_count_ue" class="sref">cell_edac_count_ue>/a>(>a href="+code=mci" class="sref">mci>/a>, 1, >a href="+code=addreg" class="sref">addreg>/a>);. 109>/a>        }. 110>/a>. 111>/a>        >spac class="comment">/* The procedure for clearing FIR bits is a bit ... weird */>/spacti 112>/a>        if (>a href="+code=clear" class="sref">clear>/a>) {. 113>/a>                >a href="+code=fir" class="sref">fir>/a> &= ~(>a href="+code=CBE_MIC_FIR_ECC_ERR_MASK" class="sref">CBE_MIC_FIR_ECC_ERR_MASK>/a> | >a href="+code=CBE_MIC_FIR_ECC_SET_MASK" class="sref">CBE_MIC_FIR_ECC_SET_MASK>/a>);. 114>/a>                >a href="+code=fir" class="sref">fir>/a> |= >a href="+code=CBE_MIC_FIR_ECC_RESET_MASK" class="sref">CBE_MIC_FIR_ECC_RESET_MASK>/a>;. 115>/a>                >a href="+code=fir" class="sref">fir>/a> &= ~>a href="+code=clear" class="sref">clear>/a>;. 116>/a>                >a href="+code=out_be64" class="sref">out_be64>/a>(&>a href="+code=priv" class="sref">priv>/a>->>a href="+code=regs" class="sref">regs>/a>->>a href="+code=mic_fir" class="sref">mic_fir>/a>, >a href="+code=fir" class="sref">fir>/a>);. 117>/a>                (void)>a href="+code=in_be64" class="sref">in_be64>/a>(&>a href="+code=priv" class="sref">priv>/a>->>a href="+code=regs" class="sref">regs>/a>->>a href="+code=mic_fir" class="sref">mic_fir>/a>);. 118>/a>. 119>/a>                >a href="+code=mb" class="sref">mb>/a>();   >spac class="comment">/* sync up */>/spacti 120>/a>#ifdef >a href="+code=DEBUG" class="sref">DEBUG>/a>. 121>/a>                >a href="+code=fir" class="sref">fir>/a> = >a href="+code=in_be64" class="sref">in_be64>/a>(&>a href="+code=priv" class="sref">priv>/a>->>a href="+code=regs" class="sref">regs>/a>->>a href="+code=mic_fir" class="sref">mic_fir>/a>);. 122>/a>                >a href="+code=dev_dbg" class="sref">dev_dbg>/a>(>a href="+code=mci" class="sref">mci>/a>->>a href="+code=pdev" class="sref">pdev>/a>, >spac class="string">"fir clear  : 0x%016lx\n"a href="+code=fir" class="sref">fir>/a>);. 123>/a>#endif. 124>/a>        }. 125>/a>}. 126>/a>. 127>/a>static void >a href="+code=__devinit" class="sref">__devinit>/a> >a href="+code=cell_edac_init_csrows" class="sref">cell_edac_init_csrows>/a>(struct >a href="+code=mem_ctl_info" class="sref">mem_ctl_info>/a> *>a href="+code=mci" class="sref">mci>/a>). 128>/a>{. 129>/a>        struct >a href="+code=csrow_info" class="sref">csrow_info>/a>               *>a href="+code=csrow" class="sref">csrow>/a> = >a href="+code=mci" class="sref">mci>/a>->>a href="+code=csrows" class="sref">csrows>/a>[0];. 130>/a>        struct >a href="+code=dimm_info" class="sref">dimm_info>/a>                *>a href="+code=dimm" class="sref">dimm>/a>;. 131>/a>        struct >a href="+code=cell_edac_priv" class="sref">cell_edac_priv>/a>           *>a href="+code=priv" class="sref">priv>/a> = >a href="+code=mci" class="sref">mci>/a>->>a href="+code=pvt_info" class="sref">pvt_info>/a>;. 132>/a>        struct >a href="+code=device_node" class="sref">device_node>/a>              *>a href="+code=np" class="sref">np>/a>;. 133>/a>        int                             >a href="+code=j" class="sref">j>/a>;. 134>/a>        >a href="+code=u32" class="sref">u32>/a>                             >a href="+code=nr_pages" class="sref">nr_pages>/a>;. 135>/a>. 136>/a>        for (>a href="+code=np" class="sref">np>/a> = >a href="+code=NULL" class="sref">NULL>/a>;. 137>/a>             (>a href="+code=np" class="sref">np>/a> = >a href="+code=of_find_node_by_nami" class="sref">of_find_node_by_nami>/a>(>a href="+code=np" class="sref">np>/a>, >spac class="string">"memory"a href="+code=NULL" class="sref">NULL>/a>;) {. 138>/a>                struct >a href="+code=resource" class="sref">resource>/a> >a href="+code=r" class="sref">r>/a>;. 139>/a>. 140>/a>                >spac class="comment">/* We "know" that the Cell firmware only creates one entry>/spacti 141>/a>>spac class="comment">                 * in the "memory" nodes. If that changes, this code will>/spacti 142>/a>>spac class="comment">                 * need to be adapted.>/spacti 143>/a>>spac class="comment">                 */>/spacti 144>/a>                if (>a href="+code=of_address_to_resource" class="sref">of_address_to_resource>/a>(>a href="+code=np" class="sref">np>/a>, 0, &>a href="+code=r" class="sref">r>/a>)). 145>/a>                        continue;. 146>/a>                if (>a href="+code=od_nodddr}drce" class="sref">od_nodddr}drce>/a>(>a href="+code=np" class="sref">np>ct)) != >a href="+code=priv" class="sref">priv>/a>->>a href="+code=node" class="sref">node>a>))./a>                        continue;./a>                >a href="+code=csrow" class="sref">csrow>/a>->>a href="+code=first_page" class="sref">first_page>/) != >a href="+code=r" class="sref">r>.!= >a href="+costarinit" class="srestarifir>/a> >> >a href="+code=PAGE_SHIFT" class="sref">PAGE_SHIFT>/a>;./a>                >a href="+code=nr_pages" class="sref">nr_pages>/) != >a href="+codo_resou_sizurce" class="sref">resou_sizue64>/a>(&>a href="+code=r" class="sref">r>//a> >> >a href="+code=PAGE_SHIFT" class="sref">PAGE_SHIFT>/a>;./a>                >a href="+code=csrow" class="sref">csrow>/a>->>a href="+co" cirst_page" class="sre" cirst_pges>/) != >a href="+code=csrow" class="sref">csrow>/a>->>a href="+code=first_page" class="sref">first_page>/a> + >a href="+code=nr_pages" class="sref">nr_pages>/- ; 21;./a>.  52>/a>                for (>a href="+code=j" class="sref">j>/a> =    >a href="+code=j" class="sref">j>/a> & != >a href="+code=csrow" class="sref">csrow>/a>->>a href="+cof">d, chanages" class="sref">d, chanaIFT>/    >a href="+code=j" class="sref">j>++a>;) {.  53>/a>                       *>a href="+code=dimm" class="sref">dimm>/) != >a href="+code=csrow" class="sref">csrow>/a>->>a href="+cod, chanages" class="sred, chanaIFT>[   >a href="+code=j" class="sref">j>]/a>->>a href="+code=dimm" class="sref">dimm>/a>;.u64>/a>                     gt;>a href="+code=dimm" class="sref">dimm>/a>->>a href="+codtyppage" class="sredtyppimm>/) != >a href="+coMEM_XD_ERR" class="sreMEM_XD_imm>/a>;./a>                     gt;>a href="+code=dimm" class="sref">dimm>/a>->>a href="+coll_edme=node" class="srell_edme=nimm>/) != >a href="+coEDA_ECCCDECTED" class="sreEDA_ECCCDECimm>/a>;./a>                     gt;>a href="+code=dimm" class="sref">dimm>/a>->>a href="+code=nr_pages" class="sref">nr_pages>/) != >a href="+code=nr_pages" class="sref">nr_pages>// != >a href="+code=csrow" class="sref">csrow>/a>->>a href="+cof">d, chanages" class="sref">d, chanaIFT>/a>;./a>             /a>}./a>                >a href="+code=dev_dbg" class="sref">dev_dbg>/a>(>a href="+code=mci" class="sref">mci>/a>->>a href="+code=pdev" class="sref">pdev>/a>}./a>                      , >spac class="string">&quInitializuderr on node %d, chanm= : 0x&#x,ory"}./a>                      , >spac class="string">&qu f">first_p= : 0x&#lx, f">nr_pa= : 0x&#xllx\n"/a>                        >a href="+code=priv" class="sref">priv>/a>->>a href="+code=node" class="sref">node>/a>, >a href="+code=priv" class="sref">priv>/a>->>a href="+code=chanmask" class="sref">chanmask>act,iu32>/a>                     != >a href="+code=csrow" class="sref">csrow>/a>->>a href="+code=first_page" class="sref">first_page>/a>, >a href="+code=nr_pages" class="sref">nr_pages>/a>);.  63>/a>             breaka>);./a>        }./a>}./a>./a>stat>, int >a href="+code=__devinit" class="sref">__devinit>/a> >a href="+code=cell_edprobt_ue" class="sref">cell_edprobtows>/a>(struct >a href="+coplat   m_f">devriv" class="sreflat   m_f">devnfo>/a> *>a href="+code=pdev" class="sref">pdev>a>))./a>{./a>        struct >a href="+code=cbe_mic_tm_regs" class="sref">cbe_mic_tm_regs>/a> >a href="+code=__iomem" class="sref">__iomem>/a>  *>a href="+code=regs" class="sref">regs>/a>;./a>        struct >a href="+code=mem_ctl_info" class="sref">mem_ctl_info>/////////////a> *>a href="+code=mci" class="sref">mci>/a>;./a>        struct >a href="+coll_edmc_layerror" class="sref">edac_layernfo>////////////gt;>a href="+co" yerregs" class="sre" yerrIFT>[2>[0];./a>        struct >a href="+code=cell_edac_priv" class="sref">cell_edac_priv>/a>           *>a href="+code=priv" class="sref">priv>[0];.  73>/a>        >a href="+code=u64" class="sref">u64>/a>                             >a href="+coaddreg" class="sreaddreg>[0];.  74>/a>        int                             >a href="+corcreg" class="sreacage>/a>, >a href="+code=chanmask" class="sref">chanmask>aa>, >a href="+codum>d, cages" class="srefum>d, careg>[0];./a>./a>        >a href="+code=regs" class="sref">regs>/) != >a href="+cod">cget_cpucbe_mic_tm_regs" class="sref">cget_cpucbe_mic_tm_rdbg>/a>(>a href="+cof">cod_nodddcpuegs" class="sref">cod_nodddcpudbg>/a>(>a href="+code=pdev" class="sref">pdev>/a>->>a href="+co}drce" class="sre}drce>)/a>);./a>        if (>a href="+code=regs" class="sref">regs>/)) != >a href="+code=NULL" class="sref">NULL>a>))./a>             return -!= >a href="+coENODEVTED" class="sreENODEVreg>[0];./a>./a>        >a href="+coll_edop_/a>snode" class="srell_edop_/a>snimm>/) != >a href="+coEDA_EOPSTATE_PO=NULL" class="sreEDA_EOPSTATE_PO=Nreg>[0];./a>./a>        >spac class="comment">Get;d, channpopulation    */>/spacti  83>/a>        >a href="+coaddreg" class="sreaddreg>/a> = >a href="+code=in_be64" class="sref">in_be64>/a>(&>a href="+code=regs" class="sref">regs>/a>->>a href="+code=mmcounfdreg" class="srede=mmcounfdges>/a>);./a>        >a href="+code=dev_dbg" class="sref">dev_dbg>/a>(&>a href="+code=pdev" class="sref">pdev>/a>->>a href="+coe=pdev" class="sre">pdev>/a>, >spac class="string">&quBE_MMNT_CFG ar = 0x%016llx\n"a href="+coaddreg" class="sreaddreg>/a>);.  85>/a>     >, >a href="+code=chanmask" class="sref">chanmask>/a> = 0;.  86>/a>        if (>a href="+code=reg" class="sreaddreg>/a> & >a href="+code=CBE_MMNT_CFG_CHAN_0_POPreg" class="srede=CBE_MMNT_CFG_CHAN_0_POPULL>a>)).  87>/a>                >a href="+code=chanmask" class="sref">chanmask>/|ar =; 21;.  88>/a>        if (>a href="+code=reg" class="sreaddreg>/a> & >a href="+code=CBE_MMNT_CFG_CHAN_1_POPreg" class="srede=CBE_MMNT_CFG_CHAN_1_POPULL>a>))./a>                >a href="+code=chanmask" class="sref">chanmask>/|ar =2 21;.  90>/a>        i>, >a href="+code=chanmask" class="sref">chanmask>/aar a>;) {.  91>/a>                >a href="+cof">dwarchan" class="sref">dwarcdbg>/a>(&>a href="+code=pdev" class="sref">pdev>/a>->>a href="+coe=pdev" class="sre">pdev>/) {.  92>/a>                       , >spac class="string">&quYuck ! No;d, channpopulated ? Aborteari!llx\n");.  93>/a>             return -!= >a href="+coENODEVTED" class="sreENODEVreg>[0];.  94>/a>        }./a>     >, >a href="+code=dev_dbg" class="sref">dev_dbg>/a>(&>a href="+code=pdev" class="sref">pdev>/a>->>a href="+coe=pdev" class="sre">pdev>/a>, >spac class="string">&quInitialing Far = 0x%016llx\n"  96>/a>                >a href="+code=in_be64" class="sref">in_be64>/a>(&>a href="+code=regs" class="sref">regs>/a>->>a href="+code=mic_fir" class="sref">mic_fir>//a>);./a>.  98>/a>        >spac class="comment">/llocate/a> &amdevi EDA_ MC data    strcedu   */>/spacti/a>        >a href="+codum>d, cages" class="srefum>d, careg>/) != >a href="+code=chanmask" class="sref">chanmask>/aar3 ? 2 : ; 21;./a>./a>        >a href="+co" yerregs" class="sre" yerrIFT>[0].!= >a href="+cotyppage" class="sretyppimm>/) != >a href="+coEDA_EMC_LAYER_CHIP_SELECHIFT" class="sreEDA_EMC_LAYER_CHIP_SELECHreg>[0];. 102>/a>        >a href="+co" yerregs" class="sre" yerrIFT>[0].!= >a href="+cosizurce" class="sresizue64>/) ; 21;./a>        >a href="+co" yerregs" class="sre" yerrIFT>[0].!= >a href="+cois_virinit_cse64" class="srefs_virinit_csimm>/) != >a href="+co  spage" class="sretrnt_ue> 21;./a>        >a href="+co" yerregs" class="sre" yerrIFT>[1].!= >a href="+cotyppage" class="sretyppimm>/) != >a href="+coEDA_EMC_LAYER_CHANNENULL" class="sreEDA_EMC_LAYER_CHANNEN_ue> 21;./a>     >, >a href="+co" yerregs" class="sre" yerrIFT>[1].!= >a href="+cosizurce" class="sresizue64>/) >, >a href="+codum>d, cages" class="srefum>d, careg>[0];./a>        >a href="+co" yerregs" class="sre" yerrIFT>[1].!= >a href="+cois_virinit_cse64" class="srefs_virinit_csimm>/) != >a href="+cofalspage" class="srefalspreg>[0];. 107>/a>     > *>a href="+code=mci" class="sref">mci>/) != >a href="+cof">edac_allocror" class="sref">edac_allocdbg>/a>(>a href="+code=pdev" class="sref">pdev>/a>->>a href="+co}drce" class="sre}drce>a    >a href="+coARRAY_SIZErce" class="sreARRAY_SIZEdbg>/a>(>a href="+co" yerregs" class="sre" yerrIFT>)a    >a href="+co" yerregs" class="sre" yerrIFT>act,i 108>/a>                         sizuof/a>(struct >a href="+code=cell_edac_priv" class="sref">cell_edac_priv>//a>);. 109>/a>        i>, >a href="+code=mci" class="sref">mci>/)) != >a href="+code=NULL" class="sref">NULL>a>))./a>             return -!= >a href="+coENOMEMTED" class="sreENOMEMreg>[0];./a>        >a href="+code=priv" class="sref">priv>/a> = >a href="+code=mci" class="sref">mci>/a>->>a href="+code=pvt_info" class="sref">pvt_info>/a>;./a>        >a href="+code=priv" class="sref">priv>/a>->>a href="+code=regs" class="sref">regs>/) != >a href="+codo=regs" class="sref">regs>/a>;./a>        >a href="+code=priv" class="sref">priv>/a>->>a href="+code=node" class="sref">node>/) != >a href="+code=pdev" class="sref">pdev>/a>->>a href="+co}drce" class="sre}drce>/a>;./a>        >a href="+code=priv" class="sref">priv>/a>->>a href="+code=chanmask" class="sref">chanmask>/a != >a href="+code=chanmask" class="sref">chanmask>/a>;./a>     >, >a href="+code=mci" class="sref">mci>/a>->>a href="+code=pdev" class="sref">pdev>/a a>(&>a href="+code=pdev" class="sref">pdev>/a>->>a href="+coe=pdev" class="sre">pdev>/a>;./a>        >a href="+code=mci" class="sref">mci>/a>->>a href="+codtypp_cae=np" class="sredtypp_caeask>/a != >a href="+coMEM_FLAG_XD_ERR" class="sreMEM_FLAG_XD_dev>/a>;./a>     > *>a href="+code=mci" class="sref">mci>/a>->>a href="+coll_edem_ccae=np" class="srell_edem_ccaeimm>/) != >a href="+coEDA_EFLAG_NONErce" class="sreEDA_EFLAG_NONEask>/| != >a href="+coEDA_EFLAG_ECrce" class="sreEDA_EFLAG_ECask>/| != >a href="+coEDA_EFLAG_CCCDECTED" class="sreEDA_EFLAG_CCCDECdev>/a>;./a>     > *>a href="+code=mci" class="sref">mci>/a>->>a href="+coll_edeae=np" class="srell_edeaeimm>/) != >a href="+coEDA_EFLAG_ECrce" class="sreEDA_EFLAG_ECask>/| != >a href="+coEDA_EFLAG_CCCDECTED" class="sreEDA_EFLAG_CCCDECdev>/a>;./a>        >a href="+code=mci" class="sref">mci>/a>->>a href="+codod_by_nami" class="sredod_by_nimm>/) !, >spac class="string">&quac/cell_ex\n";./a>        >a href="+code=mci" class="sref">mci>/a>->>a href="+codm_cby_nami" class="sredm_cby_nimm>/) !, >spac class="string">&quMICx\n";./a>        >a href="+code=mci" class="sref">mci>/a>->>a href="+cof">dby_nami" class="sref">dby_nimm>/) != >a href="+cof">dby_nami" class="sref">dby_nimm>/a>(&>a href="+code=pdev" class="sref">pdev>/a>->>a href="+coe=pdev" class="sre">pdev>/a>);./a>        >a href="+code=mci" class="sref">mci>/a>->>a href="+coll_edec_check" class="srell_edec_chask>/a != >a href="+cod">cell_edac_check" class="sref">cell_edac_check>a>);./a>        >a href="+code=cell_edac_init_csrows" class="sref">cell_edac_init_csrows>/   >a href="+code=mci" class="sref">mci>/a>);. 124>>);./a>     >  >spac class="comment">Register with EDA_ coedu   */>/spacti/a>        >a href="+codcreg" class="sreacage>/) != >a href="+cof">edac_adddacror" class="sref">edac_adddacows>/   >a href="+code=mci" class="sref">mci>/a>);./a>        if (>a href="+codcreg" class="sreacage>a>;) {./a>                >a href="+code=der_fir" class="srede=der_dbg>/a>(&>a href="+code=pdev" class="sref">pdev>/a>->>a href="+coe=pdev" class="sre">pdev>/a>, >spac class="string">&qufail need register with EDA_ coedllx\n");./a>                >a href="+cof">edac_frenode" class="srell_edmc_frenows>/   >a href="+code=mci" class="sref">mci>/a>);./a>             return f (>a href="+codcreg" class="sreacage>a>);. 131>/a>        }.u32>  }. 133>/a>     return  = 0;. 134>   }. 135>/a>. 136>/a>stat>, int >a href="+code=__exvinit" class="sref">__exvi133>/   >a href="+code=cell_edremovt_ue" class="sref">cell_edremovtows>/a>(struct >a href="+coplat   m_f">devriv" class="sreflat   m_f">devnfo>/a> *>a href="+code=pdev" class="sref">pdev>a>)). 137>;) {. 138>/a>     a>(struct >a href="+code=mem_ctl_info" class="sref">mem_ctl_info>/a> *>a href="+code=mci" class="sref">mci>/) != >a href="+cof">edac_deldacror" class="sref">edac_deldacimm>/a>(&>a href="+code=pdev" class="sref">pdev>/a>->>a href="+coe=pdev" class="sre">pdev>/a>);./a>        i>, >a href="+code=mci" class="sref">mci>a>)). 140>/a>                >a href="+cof">edac_frenode" class="srell_edmc_frenows>/   >a href="+code=mci" class="sref">mci>/a>);./a>     return  = 0;. 142>   }. 143>  }. 144>/a>stata>(struct >a href="+coplat   m_f="dririv" class="sreflat   m_f="dri133>/   >a href="+code=cell_edf="dririv" class="srede=cell_edf="drimci>/) ;) {. 145>/a>     .!= >a href="+cof="dririv" class="sref="drimci>/////////) ;) {. 146>/a>             .!= >a href="+coby_nami" class="sreby_nimm>/ /) !, >spac class="string">&quabe-micx\n"/a>             .!= >a href="+coownririv" class="sreownri117>/a) != >a href="+coTHIS_MODULErce" class="sreTHIS_MODULEIFT>act,i/a>     }act,i/a>     .!= >a href="+coprobt_ue" class="sreprobtows>          a != >a href="+cod">cell_edprobt_ue" class="sref">cell_edprobtows>act,i/a>     .!= >a href="+coremovt_ue" class="sreremovtows>         a != >a href="+cof">__exvi_e=np" class="sref">__exvi_eows>/   >a href="+code=cell_edremovt_ue" class="sref">cell_edremovtows>)act,i}= 0;.u32>  }.  53>/a>stat>, int >a href="+codedevinit" class="sref"devinit>/a> >a href="+code=cell_edac_iows" class="sref">cell_edac_iows>/  (vo  }.u64>;) {./a>     >  >spac class="comment">Sac_iy ac_ch registers data    strcedu   */>/spacti/a>        >a href="+coBUILD_BUG_ONows" class="sreBUILD_BUG_ONows>/   >a href="+cooffsetofriv" class="sreoffsetofows>/a>(struct >a href="+code=cbe_mic_tm_regs" class="sref">cbe_mic_tm_regs>act,i/a>             >                >a href="+code=mic_df_ecc_address_0" class="sref">mic_df_ecc_address_0>/t)) 0xf8/a>);./a>     > *>a href="+coBUILD_BUG_ONows" class="sreBUILD_BUG_ONows>/   >a href="+cooffsetofriv" class="sreoffsetofows>/a>(struct >a href="+code=cbe_mic_tm_regs" class="sref">cbe_mic_tm_regs>act,i/a>                              >a href="+code=mic_df_ecc_address_1" class="sref">mic_df_ecc_address_1>/t)) 0x1b8/a>);./a>        >a href="+coBUILD_BUG_ONows" class="sreBUILD_BUG_ONows>/   >a href="+cooffsetofriv" class="sreoffsetofows>/a>(struct >a href="+code=cbe_mic_tm_regs" class="sref">cbe_mic_tm_regs>act,i/a>                              >a href="+code=mic_confidreg" class="srede=mic_confids_1>/t)) 0x218/a>);./a>        >a href="+coBUILD_BUG_ONows" class="sreBUILD_BUG_ONows>/   >a href="+cooffsetofriv" class="sreoffsetofows>/a>(struct >a href="+code=cbe_mic_tm_regs" class="sref">cbe_mic_tm_regs>act,i  63>/a>                              >a href="+code=mic_fir" class="sref">mic_fir>/t)) 0x230/a>);./a>        >a href="+coBUILD_BUG_ONows" class="sreBUILD_BUG_ONows>/   >a href="+cooffsetofriv" class="sreoffsetofows>/a>(struct >a href="+code=cbe_mic_tm_regs" class="sref">cbe_mic_tm_regs>act,i/a>                              >a href="+code=mmcounfdreg" class="srede=mmcounfdges>/t)) 0x210/a>);./a>        >a href="+coBUILD_BUG_ONows" class="sreBUILD_BUG_ONows>/   >a href="+cooffsetofriv" class="sreoffsetofows>/a>(struct >a href="+code=cbe_mic_tm_regs" class="sref">cbe_mic_tm_regs>act,i/a>             >                >a href="+code=mexcror" class="srede=mexcges>/t)) 0x208/a>);./a>./a>     return f (>a href="+coflat   m_f="dri_registerriv" class="sreflat   m_f="dri_registerimm>/a>(&>a href="+code=cell_edf="dririv" class="srede=cell_edf="drimci>/a>);.   }./a>./a>static void >a href="+codeexvinit" class="sref"exvi133>/   >a href="+code=cell_edexvinit" class="srede=cell_edexviows>/  (vo  }.  73>;) {./a>        >a href="+codlat   m_f="dri_unregisterriv" class="sreflat   m_f="dri_unregisterimm>/a>(&>a href="+code=cell_edf="dririv" class="srede=cell_edf="drimci>/a>);./a>}./a>.   >a href="+cododuledac_iows" class="sredoduledac_iows>/   >a href="+code=cell_edac_iows" class="sref">cell_edac_iows>/a>);.   >a href="+cododuledexvinit" class="sredoduledexviows>/   >a href="+code=cell_edexvinit" class="srede=cell_edexviows>/a>);./a>.   >a href="+coMODULE_LICENSErce" class="sreMODULE_LICENSEows>/ , >spac class="string">&quGPLx\n");.   >a href="+coMODULE_AUTHO_ERR" class="sreMODULE_AUTHO_ows>/ , >spac class="string">&quBenjamin Herrenschmidt/a> &benh@kernel.crashstr.orga> &g\n");.   >a href="+coMODULE_DESCRIPTIONows" class="sreMODULE_DESCRIPTIONows>/ , >spac class="string">&quEC_ counteari   fCc/c MICx\n");.  83>
The original LXR softirmwaby in t);.resou ge.net/projects/lhrr>LXR "sre >a href="+coMODULE_LICENSErce" class= >a href="+coMODULE_LICENSErce483" clasfooterr>dT.ODULpNs/edre e>ICE@rigux.nofoot.p://>resu ge.net/psubrojects/lICE.rigux.no kindly hos" idoMO_LICENSErce" clawww.redpill-rigoMO.no">Redpill LigoMO ASfooteroMOvider of Ligux" nasul id2oand oULp"lines serdac/s sincea hr5.p://>resou/bodyesu/htmlhttp