linux/sound/pci/ad1889.c
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   1/* Analog Devices 1889 audio driver
   2 *
   3 * This is a driver for the AD1889 PCI audio chipset found
   4 * on the HP PA-RISC [BCJ]-xxx0 workstations.
   5 *
   6 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
   7 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
   8 *   Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License, version 2, as
  12 * published by the Free Software Foundation.
  13 *
  14 * This program is distributed in the hope that it will be useful,
  15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 * GNU General Public License for more details.
  18 *
  19 * You should have received a copy of the GNU General Public License
  20 * along with this program; if not, write to the Free Software
  21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 *
  23 * TODO:
  24 *      Do we need to take care of CCS register?
  25 *      Maybe we could use finer grained locking (separate locks for pb/cap)?
  26 * Wishlist:
  27 *      Control Interface (mixer) support
  28 *      Better AC97 support (VSR...)?
  29 *      PM support
  30 *      MIDI support
  31 *      Game Port support
  32 *      SG DMA support (this will need *a lot* of work)
  33 */
  34
  35#include <linux/init.h>
  36#include <linux/pci.h>
  37#include <linux/dma-mapping.h>
  38#include <linux/slab.h>
  39#include <linux/interrupt.h>
  40#include <linux/compiler.h>
  41#include <linux/delay.h>
  42#include <linux/module.h>
  43
  44#include <sound/core.h>
  45#include <sound/pcm.h>
  46#include <sound/initval.h>
  47#include <sound/ac97_codec.h>
  48
  49#include <asm/io.h>
  50
  51#include "ad1889.h"
  52#include "ac97/ac97_id.h"
  53
  54#define AD1889_DRVVER   "Version: 1.7"
  55
  56MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
  57MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
  58MODULE_LICENSE("GPL");
  59MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
  60
  61static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  62module_param_array(index, int, NULL, 0444);
  63MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
  64
  65static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  66module_param_array(id, charp, NULL, 0444);
  67MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
  68
  69static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  70module_param_array(enable, bool, NULL, 0444);
  71MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
  72
  73static char *ac97_quirk[SNDRV_CARDS];
  74module_param_array(ac97_quirk, charp, NULL, 0444);
  75MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
  76
  77#define DEVNAME "ad1889"
  78#define PFX     DEVNAME ": "
  79
  80/* let's use the global sound debug interfaces */
  81#define ad1889_debug(fmt, arg...) snd_printd(KERN_DEBUG fmt, ## arg)
  82
  83/* keep track of some hw registers */
  84struct ad1889_register_state {
  85        u16 reg;        /* reg setup */
  86        u32 addr;       /* dma base address */
  87        unsigned long size;     /* DMA buffer size */
  88};
  89
  90struct snd_ad1889 {
  91        struct snd_card *card;
  92        struct pci_dev *pci;
  93
  94        int irq;
  95        unsigned long bar;
  96        void __iomem *iobase;
  97
  98        struct snd_ac97 *ac97;
  99        struct snd_ac97_bus *ac97_bus;
 100        struct snd_pcm *pcm;
 101        struct snd_info_entry *proc;
 102
 103        struct snd_pcm_substream *psubs;
 104        struct snd_pcm_substream *csubs;
 105
 106        /* playback register state */
 107        struct ad1889_register_state wave;
 108        struct ad1889_register_state ramc;
 109
 110        spinlock_t lock;
 111};
 112
 113static inline u16
 114ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
 115{
 116        return readw(chip->iobase + reg);
 117}
 118
 119static inline void
 120ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
 121{
 122        writew(val, chip->iobase + reg);
 123}
 124
 125static inline u32
 126ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
 127{
 128        return readl(chip->iobase + reg);
 129}
 130
 131static inline void
 132ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
 133{
 134        writel(val, chip->iobase + reg);
 135}
 136
 137static inline void
 138ad1889_unmute(struct snd_ad1889 *chip)
 139{
 140        u16 st;
 141        st = ad1889_readw(chip, AD_DS_WADA) & 
 142                ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
 143        ad1889_writew(chip, AD_DS_WADA, st);
 144        ad1889_readw(chip, AD_DS_WADA);
 145}
 146
 147static inline void
 148ad1889_mute(struct snd_ad1889 *chip)
 149{
 150        u16 st;
 151        st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
 152        ad1889_writew(chip, AD_DS_WADA, st);
 153        ad1889_readw(chip, AD_DS_WADA);
 154}
 155
 156static inline void
 157ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
 158{
 159        ad1889_writel(chip, AD_DMA_ADCBA, address);
 160        ad1889_writel(chip, AD_DMA_ADCCA, address);
 161}
 162
 163static inline void
 164ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
 165{
 166        ad1889_writel(chip, AD_DMA_ADCBC, count);
 167        ad1889_writel(chip, AD_DMA_ADCCC, count);
 168}
 169
 170static inline void
 171ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
 172{
 173        ad1889_writel(chip, AD_DMA_ADCIB, count);
 174        ad1889_writel(chip, AD_DMA_ADCIC, count);
 175}
 176
 177static inline void
 178ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
 179{
 180        ad1889_writel(chip, AD_DMA_WAVBA, address);
 181        ad1889_writel(chip, AD_DMA_WAVCA, address);
 182}
 183
 184static inline void
 185ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
 186{
 187        ad1889_writel(chip, AD_DMA_WAVBC, count);
 188        ad1889_writel(chip, AD_DMA_WAVCC, count);
 189}
 190
 191static inline void
 192ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
 193{
 194        ad1889_writel(chip, AD_DMA_WAVIB, count);
 195        ad1889_writel(chip, AD_DMA_WAVIC, count);
 196}
 197
 198static void
 199ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
 200{
 201        u16 reg;
 202        
 203        if (channel & AD_CHAN_WAV) {
 204                /* Disable wave channel */
 205                reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
 206                ad1889_writew(chip, AD_DS_WSMC, reg);
 207                chip->wave.reg = reg;
 208                
 209                /* disable IRQs */
 210                reg = ad1889_readw(chip, AD_DMA_WAV);
 211                reg &= AD_DMA_IM_DIS;
 212                reg &= ~AD_DMA_LOOP;
 213                ad1889_writew(chip, AD_DMA_WAV, reg);
 214
 215                /* clear IRQ and address counters and pointers */
 216                ad1889_load_wave_buffer_address(chip, 0x0);
 217                ad1889_load_wave_buffer_count(chip, 0x0);
 218                ad1889_load_wave_interrupt_count(chip, 0x0);
 219
 220                /* flush */
 221                ad1889_readw(chip, AD_DMA_WAV);
 222        }
 223        
 224        if (channel & AD_CHAN_ADC) {
 225                /* Disable ADC channel */
 226                reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
 227                ad1889_writew(chip, AD_DS_RAMC, reg);
 228                chip->ramc.reg = reg;
 229
 230                reg = ad1889_readw(chip, AD_DMA_ADC);
 231                reg &= AD_DMA_IM_DIS;
 232                reg &= ~AD_DMA_LOOP;
 233                ad1889_writew(chip, AD_DMA_ADC, reg);
 234        
 235                ad1889_load_adc_buffer_address(chip, 0x0);
 236                ad1889_load_adc_buffer_count(chip, 0x0);
 237                ad1889_load_adc_interrupt_count(chip, 0x0);
 238
 239                /* flush */
 240                ad1889_readw(chip, AD_DMA_ADC);
 241        }
 242}
 243
 244static u16
 245snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
 246{
 247        struct snd_ad1889 *chip = ac97->private_data;
 248        return ad1889_readw(chip, AD_AC97_BASE + reg);
 249}
 250
 251static void
 252snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
 253{
 254        struct snd_ad1889 *chip = ac97->private_data;
 255        ad1889_writew(chip, AD_AC97_BASE + reg, val);
 256}
 257
 258static int
 259snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
 260{
 261        int retry = 400; /* average needs 352 msec */
 262        
 263        while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY) 
 264                        && --retry)
 265                mdelay(1);
 266        if (!retry) {
 267                snd_printk(KERN_ERR PFX "[%s] Link is not ready.\n",
 268                       __func__);
 269                return -EIO;
 270        }
 271        ad1889_debug("[%s] ready after %d ms\n", __func__, 400 - retry);
 272
 273        return 0;
 274}
 275
 276static int 
 277snd_ad1889_hw_params(struct snd_pcm_substream *substream,
 278                        struct snd_pcm_hw_params *hw_params)
 279{
 280        return snd_pcm_lib_malloc_pages(substream, 
 281                                        params_buffer_bytes(hw_params));
 282}
 283
 284static int
 285snd_ad1889_hw_free(struct snd_pcm_substream *substream)
 286{
 287        return snd_pcm_lib_free_pages(substream);
 288}
 289
 290static struct snd_a href="+code=substream" class="sref">substream,
 286 286 282}
 2 id="L263" class="line" name="L263">="L263"tream" class="sref">substreamad1889_writewSNDRV_PCM_INFO_INTERLEAVEDf="+code=chip" SNDRV_PCM_INFO_INTERLEAVED     eream" class="sref">substream 284 * 233                ad1889_writewSNDRV_PCM_INFO_BLOCK_TRANSFEline" name="L268SNDRV_PCM_INFO_BLOCK_TRANSFEl"+code=hw_params" class="sref">hw_paa>(chi293ad1889.c#L28L230" id="L230" formatpci/ad1889.c#L28formatp       hw_paa_hw_free, ad1889_writewSNDRV_PCM_RATE_8000_48000D_DMA_LOOP" claSNDRV_PCM_RATE_8000_48000"+code=hw_params" class="sref">hw_paa *, 98"> 198<2a>static void
9);
 199ad1s_min/ad1889.c#L283"ef">ad1s_min="L263"1,ode=ad1889_readw" class="sref">90"> 290(struct ad1s_max/ad1889.c#L283"ef">ad1s_max="L263"2,ode=ad1889_readw" class="sref">9ef="+codeip" class="sref">chiphw_p3g" class=3sref">reg;
hw_p3g1 class=3s9_load_wave_interrupt_c3href=30/ad1889.c#L28L230" id="L230" periodass="l_max/ad1889.c#L283"periodass="l_max       hw_p3g2 class=3s *AD_CHAL230" id="L230" periodl_min/ad1889.c#L283"periodl_min       hw_p3g3 class=3s"+code=chip" class="sre3ne" n303ad1889.c#L28L230" id="L230" periodl_max/ad1889.c#L283"periodl_max       hw_p3g4 class=3sD_DMA_WAVIB, re +code=ad1889_readw" cla.fifo_size   0, href="+code=ad1889_readw" class="sref"3"sref">ch3p, AD_DS_WSMC, snd_ac97 *reg30ss="sref">adde=snd_pcm_d1889="line" name="L272"> 286 282}
 2 id="L263" class="line" ncapne"e"> ="L263"tream" class="sref">substream
ad1889_writewSNDRV_PCM_INFO_INTERLEAVEDf="+code=chip" SNDRV_PCM_INFO_INTERLEAVED     eream" class="sref">substreamreg = ad1889_writewSNDRV_PCM_INFO_BLOCK_TRANSFEline" name="L268SNDRV_PCM_INFO_BLOCK_TRANSFEl"+code=hw_params" class="sref">hw_p3"sref">ch3p, hw_p3ad1889.c#3212" id="L212" class="li3e" na31/ad1889.c#L28L230" id="L230" capci/ad1889.c#L283"capci       hw_p3889.c#L213" id="L213" class="line"3name=31"sref">AD_CHAL230" id="L230" capc_min/ad1889.c#L283"capc_min       48000,       +code=ad1889_readw" classocs say we9_lold to VSR, but we're lazya href="+code=ad1889_readw" class="sref"3V" class=3sref">AD_DMA_WAV, 
ad1s_min/ad1889.c#L283"ef">ad1s_min="L263"1,ode=ad1889_readw" class="sref"3"line" na3e="L216"> 216       3     31=count" classL230" id="L230" ef">ad1s_max/ad1889.c#L283"ef">ad1s_max="L263"2,ode=ad1889_readw" class="sref"3">chiphw_p3ip, 030);
hw_p3ef">chip<3a>, 0x0);
hw_p3ound/pci/3d1889.c#L221" id="L221" 3lass=319count" classL230" id="L230" periodl_min/ad1889.c#L283"periodl_min       hw_p3     hw_p3 class="s3ef">AD_DMA_WAV);
 224      3 if (3a href} id="L290" class="line" name="L3> & <3 href="+code=AD_CHAN_ADC3 clas321889_hw_free" class="sref">snd_ad183/ad1889.c3L225" id="L225" class="l3ne" n32m_substream" class="sref">snd_pcm_substream      3         )
 286{
 287ch3p, substreamAD_DS_RAMC, private_data;
 248        return  248<="L287" class="li_" nane" name="L289"> 289chip<3f="+code=reg" class="sre3">reg3/a>;
 286{
 229
3d18893readw(ch3p,  248     >ad1889_writew(, 400 -  ="L263"a>}
 2 id="L263" class="line" name="L263">="L2 id="L290" class="line" name="L3a"line" n3" id="L233" class="line"3name=33nd/pci/ad1889.c#L275" id="L275" cla3C" class=3sref">AD_DMA_ADC, ad1889_load_adc_b3ffer_33/ad1889.c#L277" id="L277" class="lin3chip,30x0);
snd_a3, 0x03;
snd_pcm_substreamchipsubstream,
 286{
 287substreamad1889_rref">private_data;
 248        return  248<="L287" class="li_" nane" name="L289"> 289AD_DMA_ADC);
 286{
 229
 243
static  248     >ad1889_writew(countad1889_writew(<> 2 id="L263" cla> ="L263"a>}
 2 id="L263" class="line" ncapne"e"> ="L2 id="L290" class="line" name="L3as" class3_read" class="sref">snd_3d188934/pci/ad1889.c#L216" id="L216" class3ode=ac97"3class="sref">ac97, u3signe345d/pci/ad1889.c#L276" id="L276" class="line" name="L3/a> *c34ad1889.c#L259" id="L259" class="line3ref">ac973/a>->snd_a3" class="3ref">AD_AC97_BASE + 3a hre34snd_ad1889" class="sref">snd_ad1889 * 251<3a>static void
 286{
 287 252(struct ad1889_rref">private_data;
 248        return  248<="L287" class="li_" nane" name="L289"> 289ac97,3unsig352 class="sref48" class="line" name="L248"> 248     >ad1889_writew(c35nd/pci/ad1889.c#L276" id="L276" class="line" name="L3ref">ac973/a>-> + snd_a358"> 258<3a>static int
snd_pcm_substream 259substream,
 286{
 287substreamchip<3a>)
<35ref">ad1889_rref">private_data;
 248        return  248<="L287" class="li_" nane" name="L289"> 289/* average nee3s 35236" class="sref48" class="line" name="L248"> 248     >ad1889_writew( 262 .c#L276" id="L276" class="line" name="L3ad1889_re3dw(AD_AC97_ACIC)3&361889_hw_free" class="sref">snd_ad183"L265"> 235                snd_pcm_substream)
 286 286{
 287substream &36ata" class="sref">private_data;
 248        return  248<="L287" class="li_" nane" name="L289"> 289;
 286{
 229
 201 sizeci/ad1889.c#L289ize       return  289&quo3;[!s] ready afte"line" name="L201"> 201  oef="sound/pci/ad1889.c#L198   return  2893_func3_, 400 -  203        if (channel 274}
 275
countchannel)
 248     line" name="L264"> 2a href="sound/pci/ad1889.c#L205" id="L2channel" class="sref">channel 23a>static int 
 277reg,ref="sound/pci/ad1889.c#L231" id="L231" class="line" name="L231"> 231                reg &= channel(struct channel)3reg,ref="sound/pci/ad1889.c#L2ss="sref   ad1889_writewip" class="srST3" class="line"ip" class="srST9_wrichannel" class="sref">channel((, 
<3 href="sound/pci/ad1889.3#L2813 id="L281" cla               ="L287" format_width/ad1889.c#L283"="L287" format_width       hw3params));
reg,ref="sound/pci/ad1889.c#L2|g &= ~channel 284<3a>static int
 285 204               rnd/pci/ad1889.c#rt    >ad1889_writew(ad1sg" class="sref">r">ad1s.c#L2sd18 1pcm_lib_malloc_pages" class="sr3"L265"> 23/a>(struct reg = reg,ref="sound/pci/ad1889.c#L2|g &= ~channelsnd_a3>snd_pcm_3ib_free_pages(( 248     >ad1889_writew( 248channel 290<3a>static struct channel 208                
channel 248     >ad1889_writew(<              
 209                /* disable I3+code=ad1389_load_wave_interrupt_c3unt" 39, 400 -  248     >ad1889_writew(<              
 231 20nd/pci/ad1889.c#rt    >ad1889_writew( 231/* disable I3+4"> 284<39 *(chi39=count" class="sref">count 228                 248     >ad1889_writew(<              
channel, channel,  198<3a>static void
count 228                channel 199snd_a390"> 290<3eset(struct chip 217                ad1889_load_wave_buffer_count(a href="+code=r" name="L248"> 248     >ad1889_writew(<              
 231channelreg;
ad1889_load_wave_buffer_count(a href="+code=r=izeci/ad1889.c#L289ize    ichannel" class="sref">channel, 400 -  239                 201  oef="sound/pci/ad1889.c#L198ichannel" class="sref">channel *chip, re  id="L231" class="line" name="L231"> 231                reg &= channelch4p, channelAD_DS_WSMC, count 248     >ad1889_writew( 248channel = reg407count" classhannel" class="sref">channel(struct reg,/a>    lass="sref">retry);

channelchipreg = 
 248     >ad1889_writew(<              
 231hw_p4"sref">ch4p,  201  oef="sound/pci/ad1889.c#L198>(a href="+code=r=izeci/ad1889.c#L289ize    ="L235"> 235                ad1889_writew(channel 262 .c#L276" id="L276" class="line" name="L4889.c#L214" id="L213" class="line"4name=41ad1889.c#L285" id="L285" class="line4V" class=4sref">AD_DMA_WAV, snd_ad184ters and 4ointers */
snd_pcm_substream 216       4     41substream)
 286 2"soun="L286"> 286{
 287chipsubstream, 040);
private_data;
 248        return  248<="L287" class="li_" nane" name="L289"> 289;
 286{
 229
 201 sizeci/ad1889.c#L289ize       return  289 201  oef="sound/pci/ad1889.c#L198   return  289AD_DMA_WAV);
 203        if (channel 224      4 if (42nd/pci/ad1889.c#L275" id="L275" cla4> & <4 href="+code=AD_CHAN_ADC4 clas42=count" class="sref">countchannel)
 248     line" name="L264"> 2a hre242}
channel      4         reg,ref="sound/pci/ad1889.c#L231" id="L231" class="line" name="L231"> 231                reg &= snd_ac97 *AD_DS_RAMC, f">chip<4f="+code=reg" class="sre4">reg42" id="L279" c"sref">reg,ref="sound/pci/ad1889.c#L2ss="sref   4d18894readw(ch4p,                ="L287" format_width/ad1889.c#L283"="L287" format_width       reg,ref="sound/pci/ad1889.c#L2|g &= ~AD_DMA_ADC,  204               rnd/pci/ad1889.c#rt    >ad1889_writew(ad1sg" class="sref">r">ad1s.c#L2sd18 1pcm_lib_malloc_pages" class="sr4ss" class4"sref">ad1889_load_adc_b4ffer_43ass="sref">reg = reg,ref="sound/pci/ad1889.c#L2|g &= ~snd_a4, 0x04;
(chip 248     >ad1889_writew( 248channelchannel 208  ramcd/pci/ad1889.c#ramc"sound/pci/ad1889.c#sizeci/ad1889.c#L289ize       return channelAD_DMA_ADC);
 248     >ad1889_writew( 209                /* disable I4 name="L243"> 243
 248     >ad1889_writew( 231 20nd/pci/ad1889.c#rt    >ad1889_writew( 231/* disable I4 "line" n4a>static count 228                 248     >ad1889_writew(channelsnd_4d188944/pci/ad1889.c#L216" id="L216" class4ode=ac97"4class="sref">ac97, u4signe44=count" class +code=ad1889_readw" clasSet up DMAa href="+code=ad1889_readw" class="sref"4/a> *c446count" class="sref">count                 239                 201   name="L248"> 248     >ad1889_writew( 231channelchip->       e" name="L239"> 239                 201 =izeci/ad1889.c#L289ize    ichannel" class="sref">channelAD_AC97_BASE + 4a hre44" id="L279" c"sref">reg,/a>    9_loaadc>class="line" na"sound/pci/ad18e=ad1889_loaadc>class="line" name="L239"> 239                 201  oef="sound/pci/ad1889.c#L198ichannel" class="sref">channel 251<4a>static void
 252chip, , 400 -  231                reg &= ac97,4unsig452 class="srefid="L290" class="l>substreamc45=count" class="sref">count 248     >ad1889_writew( 248channelac974/a>->channel + reg,/a>    lass="sref">retry);

channel 258<4a>static int
reg = <+code=ad1889c#L272" id="L2size   ="L27u, ass   0x="L27x, raco   ="L27u272
 248     >ad1889_writew( 231hw_p4 name="L249"> 259reg = <201"> 201  oef="sound/pci/ad1889.c#L198>(a href="+code=r=izeci/ad1889.c#L289ize    ="L235"> 235                ad1889_writew(channel(struct chip<4a>)
<45ref">9.c#L285" id="L285" class="line4pan class4"comment">/* average nee4s 35246" cla.c#L285" id="L285" class="line4p1889_ac94 id="L262" class="line" 4ame="4262">  +code=ad1889_readw" clasthis is call name atomic 89lasxt with IRQ disabl n.channel(channelAD_AC97_ACIC)4&461889_ +code=ad1889_readw" c" cDMAashlold be *#L2ggered* bysthis call.channelac9745                
WAEN2
 bit #L2ggerscDMAaWave On/Offref">chip, snd_pcm_substream);
);
 286{
 287 201  md"sound/pci/ad188mdde=viass="sref">snd_pcm_substream &46ata" tream" class="sref">substreamreg,L203" class="line" name="L203"> 203  wsmcd/pci/ad1889.c#wsmc /* disable I4      }
<4 href="sound/pci/ad1889.4#L27146ref">ad1889_rref">private_data;
 248        return  248<="L287" class="li_" nane" name="L289"> 289&quo4;["s] ready afteid="L290" class="l/* disable I4e1889_ac94=__func__" class="sref">4_func4_, 400 -  231                reg &= channel 274}
 275
                md"sound/pci/ad188mdde=vi"tream" class="sref">substream 24a>static int 
substream 277 = <+code=ad1889_readw" clasenabl cDMAaloop2ss="s class="lidress(re="sref">count 228                channelrea href="+code=rwsmcd/pci/ad1889.c#wsmc  &= ~/* disable I4rams)4 = <+code=ad1889_readw" clas1 to clear CHSS bit ess(reg =  228                channel, 
<4 href="sound/pci/ad1889.4#L281480count" class 228              ichannel" class="sref">channel));
channelstatic int
substream 285 204 228              ichannel" class="sref">channel 24/a>(struct reg = reg,wsmcd/pci/ad1889.c#wsmc  &= ~/* disable I48 name="L4="+code=substream" class4"sref48e=reg" class=g = b   kchannel" class="sref">channel(substreamrea href="+code=r="L2BUGme="L248"> 248<="L2BUGclassichannel" class="sref">channel)4a>static struct  = .c#L276-a href="+code=rEINVAL/ad1889.c#L283"EINVAL /* disable I48     }
<4=substream" class="sref"4subst489288" class="9.c#L285" id="L285" class="line4L278" id=4L278" class="line" name=4L272"49s] ready afteid="L290" class="l/* disable I4+code=ad1489_load_wave_interrupt_c4unt" 49, 400 -  248     >ad1889_writew(<              
 2wsmcd/pci/ad1889.c#wsmc /* disable I4+4"> 284<49 * 228                chi49=count" class="sref">count 231                reg &= chip, ( 198<4a>static void
                md"sound/pci/ad188mdde=v == amp;= snd_pcm_substream 199rea href="+code=r" classcel" class="sref">channel)
 248     line" name="L264"> 2a href="sound/pci/ad1889.c#L205" id="L2channel" class="sref">channel 290<4eset(struct channelchipreg;
channelchannel, channelch5p, 
ADEN2
 bit #L2ggerscDMAaADC On/Offref">chip, AD_DS_WSMC, snd_pcm_substream = reg50ef">substream,
 286{
 287 201  md"sound/pci/ad188mdde=viass="sref">snd_pcm_substream(struct substreamchip 203   amcd/pci/ad1889.c#ramc"sou id="L276" class="line" name="L5"sref">ch5p, private_data;
 248        return  248<="L287" class="li_" nane" name="L289"> 289 231                reg &= AD_DMA_WAV, reswitcha>                md"sound/pci/ad188mdde=vi"tream" class="sref">substream 216       5     51=count" classcase&= substreamchipre=+code=ad1889_readw" clasenabl cDMAaloop2ss="s class="lidress(rea href="+code=r" classound/pci/ad1889.c#L228" id="L228" class="line" name="L228"> 228                channel, 0x0);
 = <8" class="line amcd/pci/ad1889.c#ramc"sou2|g &= ~reg = ( 228                channelAD_DMA_WAV);
channel 224      5 if (522count" classcase&= substream & <5 href="+code=AD_CHAN_ADC5 clas52e="L204"> 204reg = b   kchannel" class="sref">channelsubstreamchip, re.c#L276-a href="+code=rEINVAL/ad1889.c#L283"EINVAL /* disable I5C" class=5sref">AD_DS_RAMC, chip<5f="+code=reg" class="sre5">reg528count" classhannel" class="sref">channel5d1889529288" class="               " id="L208" class="line" name="L208"> 208  ramcd/pci/ad1889.c#ramc"sound/pci/ad1889.c#L209" id="L209" class="line" name="L209"> 20amcd/pci/ad1889.c#ramc"sou id="L276" class="line" name="L5"sref">ch5p,  228                , 400 -  231                reg &= chip, AD_DMA_ADC,  204 +code=ad1889_readw" clasnd/pc the9_reg when STOe - will disabl  IRQdress(ad1889_load_adc_b5ffer_53ass="sref">re                md"sound/pci/ad188mdde=v == amp;= snd_pcm_substream      50x0);
 = < href="+code=r" classcel" class="sref">channel)
 248     line" name="L264"> 2a hre242}
reid="L290" class="l>substream(AD_DMA_ADC);
( 243
channel(static ,
 286{
 287snd_pcm_substreamsubstreamsnd_5d188954ass="sref">re  id="L231" cla9ize_sref">channel 203  pts/ad1889.c#L283"pts="line"" id="L276" class="line" name="L5ode=ac97"5class="sref">ac97, u5signe54=count" classref">private_data;
 248        return  248<="L287" class="li_" nane" name="L289"> 289c54ass="sref">snd_ac97 * 248     >ad1889_writew(<              
snd_pcm_substreamAD_AC97_BASE + 5a hre54" id="L279" cg = .c#L276" id="L276" class="line" name="L5o    static void
 252 228                , 400 -  248     >ad1889_writew(<              
 231ac97,5unsig552 class="srefid="L290" class="l>substreamc55=count" class               ="L2BUG_Oa href="+code=ch="L2BUG_Oaclass="line" name="Lpts/ad1889.c#L283"pts="linad18e"a href="+code=r" name="L248"> 248     >ad1889_writew(<              
snd_pcm_substreamac975/a>->reg = .c#L276" id="L276" class="line" name="L5ss="sref"5AD_AC97_BASE +  289 229
 259channelchip<5a>)
<55ref"> +code=ad1889_readw" clasCall name atomic 89lasxt with IRQ disabl nress(/* average nee5s 35256" clastream"return channel(  bstream,
 286{
 287snd_pcm_substream(substreamAD_AC97_ACIC)5&56=count" class="sref">countchannel 203  pts/ad1889.c#L283"pts="line"" id="L276" class="line" name="L5aef">ac9755                resef">private_data;
 248        return  248<="L287" class="li_" nane" name="L289"> 289snd_a5         5a href="+code=snd_printk5 clas566count" class               unlikely3" class="line" nlikelyne" n!148" class="line" name="L248"> 248     >ad1889_writew(snd_pcm_substream &567count" classsref">re.c#L276" id="L276" class="line" name="L5s class="5              return -channel 228                &quo5;[ťid="L281" cla48" class="linepts/ad1889.c#L283"pts="lin-e"a href="+code=r" name="L248"> 248     >ad1889_writew( 2315_func57d1889id="L290" class="line" name="L5="line" n5me="L274"> 274}
               ="L2BUG_Oa href="+code=ch="L2BUG_Oaclass="line" name="Lpts/ad1889.c#L283"pts="linad18e"a href="+code=r" name="L248"> 248     >ad1889_writew(snd_pcm_substream 275
 204 25a>static int 
channel 277 289 229
snd_a5rams)5 286{
 203  ="L2>);
);
substream(reg = nd/pci/ad1889.c#open/ad1889.c#L283"open       return );
);
substream, 
<5 href="sound/pci/ad1889.5#L281580count" classnd/pci/ad1889.c#clos286);
substream));
substreamstatic int
);
substream 285 204nd/pci/ad1889.c#hw_fre286);
);
substream 25/a>(struct rend/pci/ad1889.c#prep> 286 2"sou   return );
substream);
);
substream();
);
channel)5a>static struct channel 286{
 203  ="L2>);
substream);
substream);
);
substream *substreamchi59e="L204"> 204nd/pci/ad1889.c#hw_paraml/ad1889.c#L283"hw_paraml       return );
substream, rend/pci/ad1889.c#hw_fre286);
);
substream,  286 2"sou   return );
 286 2id=" ream" class="sref">substreamstatic void
);
substream 199);
channel 290<5eset(struct chip(reg;
channel(  bstream,
 201 irq/ad1889.c#L283"irq    , voidL248" class="linedev_id"sound/pci/ad18dev_idsnd_iass="sref">snd_pcm_substream *substream 204unsigned long return resef">private_data;
 248        return snd_a6C" class=6sref">AD_DS_WSMC, count 228                reg601889_ac97_ready" class="sref">snd_a6C8= (struct (chip 228                ch6p, , 400 - AD_DMA_WAV,                unlikely3" class="line" nlikelyne" n!a href="+code=r=i/ad1889.c#L283"=t="lipiass="sref">snd_pcm_substream
reg = .c#L276a href="+code=rIRQ_NONE/ad1889.c#L283"IRQ_NONEsnd_ id="L290" class="l/* disable I685 class=6e="L216"> 216       6     61d1889_hw_params" class="sref">snd_a6">chip               =i/ad1889.c#L283"=t="linss="sa>               ip" MAeDISR_PMAI3" class="line"ip" MAeDISR_PMAI="li|               ip" MAeDISR_PTAI3" class="line"ip" MAeDISR_PTAI="lipiass="sref">snd_pcm_substreamrea href="+code=r" classlass="sref">retry);

, 0x0);
channelreg = >               =i/ad1889.c#L283"=t="linss="sa               ip" MAeDISR_WAVI3" class="line"ip" MAeDISR_WAVI="lipnss="sss="sa               " name="L248"> 248     >ad1889_writew(snd_pcm_substream 228              >ad1889_writew(AD_DMA_WAV);
 248     >ad1889_writew(snd_pcm_substream 224      6 if (622count" class 228              >ad1889_writew(re.c#L276a href="+code=rIRQ_HANDLED/ad1889.c#L283"IRQ_HANDLEDsnd_ id="L290" class="l/* disable I6=line" na6         snd_ac97 *AD_DS_RAMC, snd_ac97 *reg628counreturn );
private_data;
 248     ,ame="L201"> 201 hrvic286 286{
snd_pcm_substream6d1889629288"tream" class="sref">substreamch6p,  201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I6ad1889.c#6232" id="L232" class="li6e" na63, 400 - <="L286"> 286{
AD_DMA_ADC,                r"so"sound/pci/ad18r87"id="iass="sref">snd_pcm_substreamad1889_load_adc_b6ffer_63ass="sref">reg = 248" class="liner"so"sound/pci/ad18r87"id="ne"a href="+code=rNULL/ad1889.c#L283"NULLid=" id="L290" class="l/* disable I6aline" na60x0);
snd_a6, 0x06;
count 228              >ad1889_writew( 228              >ad1889_writew(snd_pcm_substream = .c#L276L201"> 201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I6a9= (AD_DMA_ADC);
channel 243
);
);
static substream 204);
snd_6d188964/pci/ad1889.c#L216" id="L216" class6ode=ac97"6class="sref">ac97, u6signe64=count" class="line" name="Lpso"sound/pci/ad1887"id=">ad1889_writew( 228               id="L290" class="l/* disable I6 /a>, 0x06ef="+code=chip" class="s6ef">c646count" class="sref">count 228              >ad1889_writew(AD_AC97_BASE + 6a hre648count" classhannel" class="sref">channelstatic void
 208  pso"sound/pci/ad1887"id="   return  252 228              >ad1889_writew(, 400 -  228              >ad1889_writew(ac97,6unsig65nd/pci/ad1889.c#L275" id="L275" cla6dd1889.c#6ef="+code=chip" class="s6ef">c65=count" class="sref">countsubstreamac976/a>->reg =                                 return  228              >ad1889_writew(substream +  =                                 return substream, 0x06a>static int
re                                return  259snd_a6" class="6ready(struct                ss="sound/pci/ad18ss=snd_ < 0i"tream" class="sref">substreamchip<6a>)
<65f">reg = reg="line" name="LPFX"sound/pci/ad18PFX">reg=/pci/ad1889.c#L272" id="L2buffer allocation ss=or: %d272
(a href="+code=rss="sound/pci/ad18ss=snd_i id="L290" class="l/* disable I6pan class6"comment">/* average nee6s 352660count" class 201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I6p1889_ac96 id="L262" class="line" 6ame="66, 400 - <9.c#L285" id="L285" class="line6ad1889_re6dw(AD_AC97_ACIC)6&66=count" class               r"so"sound/pci/ad18r87"id="iass="sref">snd_pcm_substreamac9765                reg = 248" class="liner"so"sound/pci/ad18r87"id="ne"a href="+code=rpso"sound/pci/ad1887"id=" id="L290" class="l/* disable I6       if6(! &667coun9.c#L285" id="L285" class="line6s class="6              return -channelchannel(6span class="string">&quo6;[ůid="L48" class="line="L2>);
private_data;
 286{
snd_pcm_substream6_func67d1889tream" class="sref">substream 274}
private_data;
 248        return  275
count 203   209" id="L209" class="li id="L276" class="line" name="L6sef">ac976a>static int 
 201 tmame="L248"> 248 277snd_a6=        6rams(struct count 28" id="e" name="L231"> 231                reg &= snd_a6=name="L26href="+code=substream" c6ass="67L288" class="               =snd_a6= class="6 =         >               r209" id="L209" class="linss="s amp;= 
_hw_params" class="sref">snd_a6m, 
<6 href="sound/pci/ad1889.6#L281680count" class               r209" id="L209" class="linss="s amp;= , 400 - snd_a6m"line" n6a>static int
               r209" id="L209" class="linss="s amp;=  285 204id="L290" class="l/* disable I6mef">ac976/a>(struct re"+code=ad1889_readw" clasWARQ is at off/pc 12ress( 248               r209" id="L209" class="linss="s amp;= re        (>>               r209" id="L209" class="linss="s amp;=  248               r209" id="L209" class="linss="s amp;= static struct channel
(a href="+code=rtmame="L248"> 248_hw_params" class="sref">snd_a6L278" id=6L278" class="line" name=6L272"690count" class               r209" id="L209" class="linss="s amp;= snd_a6L1889_ac9689_load_wave_interrupt_c6unt" 69/ad1889.c#L282" id="LLLLLLLLLt" classhannel" class="sref">channel *chi69=count" class="sref">count
_hw_params" class="sref">snd_a6a_hw_free6AD_DMA_WAVIB, reg =                        r209" id="L209" class="linss="s amp;= , ( 199 248               r209" id="L209" class="linss="s amp;=  290<6eset(struct  =         >>>               r209" id="L209" class="linss="s amp;= chip 248               r209" id="L209" class="linss="s amp;= reg;
 248_hw_params" class="sref">snd_a7g2 class=7s *               r209" id="L209" class="linss="s amp;= snd_a7g3 class=7s"+code=chip" class="sre7ne" n70e="L2id="L290" class="l/* disable I7g4 class=7sD_DMA_WAVIB, re="sref">count 28" id="e" name="L231"> 231                reg &= snd_a7C" class=7sref">AD_DS_WSMC, re        (               r209" id="L209" class="linss="s amp;= reg70L288" class="               =
_hw_params" class="sref">snd_a7C8= (struct  =         >               r209" id="L209" class="linss="s amp;= snd_a7g9= chipsnd_a7"sref">ch7p,                r209" id="L209" class="linss="s amp;= , 400 - (AD_DMA_WAV, count 248               r209" id="L209" class="linss="s amp;= reg =         >>>               r209" id="L209" class="linss="s amp;=  216       7     71=count" class="line" name="Ltmame="L248"> 248               r209" id="L209" class="linss="s amp;= chip 248_hw_params" class="sref">snd_a7"8= , 0x0);
 =         >               r209" id="L209" class="linss="s amp;= snd_a7"9= reg = id="L290" class="l"sref">snd_a7     
_hw_params" class="sref">snd_a7 class="s7ef">AD_DMA_WAV);
 224      7 if (722count" class = id="L290" class="l"sref">snd_a7 " class=7 href="+code=AD_CHAN_ADC7 clas723 class="sref4+code=ad1889_readw" clasRERQ is at off/pc 12ress(re="sref">count 248               r209" id="L209" class="linss="s amp;=  =         >>>               r209" id="L209" class="linss="s amp;= count 248               r209" id="L209" class="linss="s amp;= AD_DS_RAMC, reg = id="L290" class="l"sref">snd_a7 8= reg728d="L281" cla48" class="line="L2i8rintf3" class="line"=
(a href="+code=rtmame="L248"> 248_hw_params" class="sref">snd_a7 9= 7d188972f">reg =                r209" id="L209" class="linss="s amp;= snd_a7"sref">ch7p,  = id="L290" class="l"sref">snd_a7ad1889.c#7232" id="L232" class="li7e" na73, 400 - (AD_DMA_ADC, (ad1889_load_adc_b7ffer_73ass="4+code=ad1889_readw" css="srefnane"e of the dB scaleress( 28" id="e" name="L231"> 231                reg &= count
_hw_params" class="sref">snd_a7<" class=7, 0x0);
snd_a7<8=  =         >>               r209" id="L209" class="linss="s amp;=  28" id="e" name="L231"> 231                reg &= AD_DMA_ADC);
snd_a7 name="L273"> 243
snd_a7 "line" n7a>static >               r209" id="L209" class="linss="s amp;=  204id="L290" class="l/* disable I7 s" class7_read" class="sref">snd_7d188974ass="sref">re="sref">count 28" id="e" name="L231"> 231                reg &= ac97, u7signe74=count" class="line" name="L=
(a href="+code=rL209" id="L209" class="lip id="L290" class="l/* disable I7 /a>, 0x07ef="+code=chip" class="s7ef">c746count" class="sref">count 28" id="e" name="L231"> 231                reg &= ->AD_AC97_BASE + 7a hre748coun9.c#L285" id="L285" class="line7o    static void
 252snd_ac97 *  bstream,
private_data;
 248     iass="sref">snd_pcm_substreamac97,7unsig75ad188tream" class="sref">substreamc75=count" classsef">private_data;
ac977/a>-> + !a href="+code=r=reg>ad1889_writew( 228              >ad1889_writew(snd_pcm_substream, 0x07a>static int
reivate_data;
reg &= );
 259channelchip<7a>)
<75 id="stream"sef">private_data;ac97_quirk/ad1889.c#L283"ac97_quirkcountivate_data;ac97_quirkl/ad1889.c#L283"ac97_quirklcoun[]ne"tream" class="sref">substream/* average nee7s 352760count" classtream" class="sref">substreamrei+code=ad1889_readw" clasADress(rei+code=ad1889_readw" clasAD1ss=ress(AD_AC97_ACIC)7&76e="L204"> 204 2AC97_IDe24281"sound/pci/ad188AC97_IDe24281"="li>_hw_params" class="sref">snd_a7aef">ac9775                reg = nd/pci/ad1889.c#+cod"sound/pci/ad18+cod="line" /pci/ad1889.c#L272" id="L2ADf">s2
_hw_params" class="sref">snd_a7       if7(! = nd/pci/ad1889.c#typd"sound/pci/ad18typd="line" name="L209"> 2AC97_TUNE_HP_ONLYsound/pci/ad188AC97_TUNE_HP_ONLYcounhannel" class="sref">channel_hw_params" class="sref">snd_a7 >chip &76L288" class="{ }ei+code=ad1889_readw" clasterminatorress(((7span class="string">&quo7;[Ź" clastream"voidLa href="+code=r_ hrvinii/ad1889.c#L283"_ hrviniiss="sref">snd_ac97 *7_func7762">  bstream,
);
private_data;
 248     iass="sref">snd_pcm_substream 274}
substream 275
count 203   209" id="L209" class="li id="L276" class="line" name="L7sef">ac977a>static int 
 277 28" id="e" name="L231"> 231                reg &= countrei+code=ad1889_readw" clasRe/pc Disabl ress(reg &= (a href="+code=rL209" id="L209" class="lip id="L290" class="l/* disable I7= class="7 231                reg &= rei+code=ad1889_readw" clasflush posted writ/ress((, 400 - static int
    writ/pci/ad1889.c#L22/a>    writ/p       reg &= (a href="+code=rL209" id="L209" class="lip id="L290" class="l/* disable I7m="line" 75"> 285 204id="L290" class="l/* disable I7mef">ac977/a>(struct re="sref">count);
);
regp id="L290" class="l/* disable I7m      if7="+code=substream" class7"sref78d1889_hw_params" class="sref">snd_a7m        7ib_free_pages( 28" id="e" name="L231"> 231                reg &= static struct reg &= (a href="+code=rL209" id="L209" class="lip id="L290" class="l/* disable I7L278" id=7L278" class="line" name=7L272"79id="L281" cla48" class="line8" id="e" name="L231"> 231                reg &= ( *chi79e="L2id="L290" class="l/* disable I7a_hw_free7AD_DMA_WAVIB, channel, count);
);
private_data;
c97_busid="L248" class="linebus86snd_pcm_substreamstatic void
substream 199private_data;
 248        return ad1889_writew( 290<7eset(struct  228              >ad1889_writew(chipreg;
channel *count);
);
private_data;
c97id="L248" class="linehc9786c97id="iass="sref">snd_pcm_substreamsubstream, resef">private_data;
 248        return c97id=">ad1889_writew( 228              >ad1889_writew(AD_DS_WSMC,  199reg801889_ac97_ready" class="sref">snd_a8C8= (struct  201 _ hrvinii/ad1889.c#L283"_ hrviniiss="sref">snd_ac97 *chipcount);
private_data;
 248     , const charL248" class="linequirk_overrid286snd_pcm_substreamch8p, substream, 400 -  201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I8a2 class=8" id="L213" class="line"8name=812 class="srefsef">private_data;
c97_templateme="L203"> 203  hc9786c97id=" id="L290" class="l/* disable I8a3 class=8sref">AD_DMA_WAV, private_data;s"L2>c97_busuopl/ad1889.c#L283"="L2>c97_busuoplme="L203"> 203  opl/ad1889.c#L283"oplme="Le"tream" class="sref">substream
reg = nd/pci/ad1889.c#writ//ad1889.c#L283"writ/id="Le"a href="+code=r="L2>);
_hw_params" class="sref">snd_a885 class=8e="L216"> 216       8     81e=reg" class=g = nd/pci/ad1889.c#e" n/ad1889.c#L283"e" nclasLe"a href="+code=r="L2>);
snd_a88" class=8, 0x0);
snd_a8"8= , 0x0);
(regp id="L290" class="l/* disable I8     AD_DMA_WAV);
c97_bus86c97_busid="   reg>ad1889_writew(reg &ss="s48" class="line228"> 228              >ad1889_writew( 224      8 if (822count" class               ss="sound/pci/ad18ss=snd_ < 0iid="L290" class="l/* disable I8 3 class=8 href="+code=AD_CHAN_ADC8 clas82e="L204"> 204 201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I8 4 class=8L225" id="L225" class="l8ne" n82ass="sref">reid="L290" class="l/* disable I8 5 class=8          228              >ad1889_writew(ad1889_writew();
);
, AD_DS_RAMC, c97id=">(0>(sizeof>               hc9786c97id="ip id="L290" class="l/* disable I8 8= reg828d="L281" cla48" class="linehc9786c97id="nd/pci/ad1889.c#private_data"sound/pci/ad188rivate_datasnd_Le"a href="+code=r228"> 228               id="L290" class="l/* disable I8 9= 8d1889829288" class="               /c9786c97id="nd/pci/ad1889.c#private_fre286);
);
ch8p, c97id="nd/pci/ad1889.c#pci86 228              >ad1889_writew(c97_mixer3" class="line"=c97_mixerid="   reg>ad1889_writew(c97id=">(ss="s48" class="line228"> 228              >ad1889_writew(AD_DMA_ADC,  204               ss="sound/pci/ad18ss=snd_ < 0iid="L290" class="l/* disable I8C4 class=8"sref">ad1889_load_adc_b8ffer_83ass="sref">reg = .c#L276L201"> 201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I8aline" na80x0);
 = id="L290" class="l/* disable I8a" class=8;
countc97_tune_hardware86c97_tune_hardwareid="   reg>ad1889_writew((89_writew((89_writew(AD_DMA_ADC);
 243
count);
);
private_data;
 248     iass="sref">snd_pcm_substreamsubstreamsnd_8d188984ass="sref">re               e=reg" class="sref">reg>ad1889_writew(ac97, u8signe84e=reg" class=g = gotorivate_data;
kip_hpci/ad1889.c#L22=kip_hpsnd_ id="L290" class="l/* disable I8 /a>, 0x08ef="+code=chip" class="s8ef">c846counid="L290" class="l/* disable I8 " class=8/a>->reg>ad1889_writew(AD_AC97_BASE + 8a hre848counhannel" class="sref">channelstatic void
    mute       regp id="L290" class="l/* disable I8" name="L852"> 252, 400 - (ac97,8unsig852count" class               /a>    cef="so_resdi/ad1889.c#L283"/a>    cef="so_resdi       reg &= p id="L290" class="l/* disable I8"d1889.c#8ef="+code=chip" class="s8ef">c85e="L2id="L290" class="l/* disable I8ref">ac978/a>->( +     writ/l       reg &=  &= , 0x08a>static int
count        l/ad1889.c#L283"/a>        l       reg &= p ref">reei+code=ad1889_readw" clasflush, dammit!ress( 259snd_a8" class="8ready(struct reg>ad1889_writew(chip<8a>)
<85eadw(/* average nee8s 352860count" class               e=reg" class="sref">reg>ad1889_writew(reg>ad1889_writew(regi id="L290" class="l/* disable I8ad1889_re8dw(AD_AC97_ACIC)8&86e="L2ivate_data;
kip_hpci/ad1889.c#L22=kip_hpsnd_:id="L290" class="l/* disable I8aef">ac9785                re               e=reg" class="sref">reg>ad1889_writew(snd_pcm_substream = 89_writew(reg>ad1889_writew(&86L288" class="               "l/   lease_.cgionl/ad1889.c#L283""l/   lease_.cgionlid="   reg>ad1889_writew(reg>ad1889_writew((8span class="string">&quo8;[ƃid="L281" cla48" class="linekfre286regi id="L290" class="l/* disable I8e1889_ac98=__func__" class="sref">8_func87/ad1889.c#L28.c#L2760 id="L290" class="l/* disable I8="line" n8me="L274"> 274}
 275
ac978a>static int 
 277count);
);
private_data;
substreamprivate_data;
 248        return ad1889_writew(count);
);
regi id="L290" class="l/* disable I8ef="+code8_lib_malloc_pages(,stream"int"L201"> 201 _ hrvinii/ad1889.c#L283"_ hrviniiss="sref">snd_ac97 *static int
count);
private_data;
 248     i"id="L290" class="l/* disable I8m="line" 85"> 285substreamac978/a>(struct re="sref">count    writ/pci/ad1889.c#L22/a>    writ/p       reg &=  &= p ri+code=ad1889_readw" clastL276ode=aockress( 231                reg &= p rei+code=ad1889_readw" clasflush posted writ/ress(static struct channel(    writ/l       reg &=  &=  *chi89e="L29.c#L285" id="L285" class="line8a_hw_free8AD_DMA_WAVIB,  201 _ hrvinii/ad1889.c#L283"_ hrviniiss="sref">snd_ac97 *count);
private_data;
snd_ac97 * 199private_data;"l/ dev86sref">snd_ac97 *(struct  =   sef">private_data;
     iass="sref">snd_pcm_substreamchipsubstreamreg;
 201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I9g1 class=9s9_load_wave_interrupt_c9href=90/ad18a href="+code=chip" class="sre9g2 class=9s *private_data;
 248      id="L290" class="l/* disable I9g3 class=9s"+code=chip" class="sre9ne" n90=count" classseream"sef">private_data;s"L2drvic2_opl/ad1889.c#L283"="L2drvic2_oplcountivate_data;opl/ad1889.c#L283"oplme="Le"tream" class="sref">substream, reg = nd/pci/ad1889.c#hrv fre286);
);
sref">snd_ac97 *AD_DS_WSMC,  199reg90L288" class="248" class="linere=reg" class="sref"r/a>     Le"a href="+code=rNULL/ad1889.c#L283"NULLid=" id="L290" class="l/* disable I9C8= (struct channelchipch9p,  201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I9ad1889.c#9212" id="L212" class="li9e" na91/ad18a href="+code=chip" class="sre9a2 class=9" id="L213" class="line"9name=912 class="srefa+code=ad1889_readw" clascheck PCI availability (32bit DMA)ress(AD_DMA_WAV,  204               "l/ cetudma_maskg" class="sref""l/ cetudma_mask       regsubstream 216       9     91e=reg" class=g =   ;PFX     reivate_data;"l/ disabl _hrvic286(  specifam"data with zero-filled memoryress(AD_DMA_WAV);
 248        return 248" class="line" name="L248"> 248     i &= substream 224      9 if (922count" class;"l/ disabl _hrvic286 204re9.c#L285" id="L285" class="line9 5 class=9         snd_a9 " class=9p, countreg>ad1889_writew(AD_DS_RAMC,  228               id="L290" class="l/* disable I9 8= reg928d="L281" cla48" class="linee=reg" class="sref">reg>ad1889_writew(9d1889929288" class="               e=reg" class="sref">reg>ad1889_writew(ch9p, , 400 - >               ss="sound/pci/ad18ss=snd_ e"a href="+code=r"l/ request_.cgionl/ad1889.c#L283""l/   quest_.cgionl       AD_DMA_ADC,  204;fre2_and_.ci/ad1889.c#L283"fre2_and_.cisnd_ id="L290" class="l/* disable I9C4 class=9"sref">ad1889_load_adc_b9ffer_93/pci/ad1889.c#L216" id="L216" class9aline" na90x0);
reg>ad1889_writew(countreg>ad1889_writew(reg>ad1889_writew(substream =   ;PFX      =   AD_DMA_ADC);
;fre2_and_.ci/ad1889.c#L283"fre2_and_.cisnd_ id="L290" class="l/* disable I9 name="L293"> 243
countsnd_9d188994/pci/ad1889.c#L216" id="L216" class9 line" na9class="sref">ac97, u9signe94=count" class="line" name="L=pin_lock_inii/ad1889.c#L283"=pin_lock_iniiid=" ss="s48" class="linee=reg" class="sref">reg>ad1889_writew();
(c946counid="L290" class="l/* disable I9 " class=9/a>->);
);
sref">snd_ac97 *AD_AC97_BASE + 9a hre94" id="L279" cg =    class="line" name="LIRQF_SHARED/ad1889.c#L283"IRQF_SHAREDsnd_,a   248     i)"tream" class="sref">substreamstatic void
 =   ;PFX      252);
);
regi id="L290" class="l/* disable I9d1889_ac99_write(struct ac97,9unsig952count" class9.c#L285" id="L285" class="line9"d1889.c#9ef="+code=chip" class="s9ef">c95e="L2id="L290" class="l/* disable I9ref">ac979/a>->re="sref">countreg>ad1889_writew(ad1889_writew( + reg>ad1889_writew(, 0x09a>static int
 259  hardwareress(>               ss="sound/pci/ad18ss=snd_ e"a href="+code=r="L2>);
 248     i)"< 0)"tream" class="sref">substreamchip<9a>)
<959 id="L279" cg =   );
);
regi id="L290" class="l/* disable I9pan class9"comment">/* average nee9s 352960count" class 201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I9p1889_ac99 id="L262" class="line" 9ame="96, 400 - <9.c#L285" id="L285" class="line9ad1889_re9dw(AD_AC97_ACIC)9&96e="L204"> 204>               ss="sound/pci/ad18ss=snd_ e"a href="+code=r="L2drvic2_n/pci/ad1889.c#L22="L2drvic2_n/p        248     >(ss="s48" class="lineopl/ad1889.c#L283"oplme="i)"< 0)"tream" class="sref">substreamac9795                reg =   );
);
regi id="L290" class="l/* disable I9pline" na9(! = .c#L276L201"> 201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I9p/a>, 0x09a href="+code=snd_printk9 clas966/a>, 400 - <9.c#L285" id="L285" class="line9a" class=9PFX &961889_ac97_ready" class="sref">snd_a9a class="9              return -ad1889_writew((9span class="string">&quo9;[ƍid="L281" cla248" class="linere=reg" class="sref"r/a>     Le"a href="+code=r228"> 228               id="L290" class="l/* disable I9e1889_ac99=__func__" class="sref">9_func97/ad18a href="+code=chip" class="sre9="line" n9me="L274"> 274}
 275
ac979a>static int 
;fre2_and_.ci/ad1889.c#L283"fre2_and_.cisnd_:id="L290" class="l/* disable I9s      if977"> 277regi id="L290" class="l/* disable I9=        9rams(struct countsnd_a9= class="9count(,stream"int"L201"> 201 _ hrvinii/ad1889.c#L283"_ hrviniiss="sref">snd_ac97 *static int
count);
);
private_data;"l/ dev86sref">snd_ac97 * 285 204private_data;"l/ devic2_id"sound/pci/ad18"l/ devic2_idid="L248" class="linepci_id"sound/pci/ad18"l/ idid="iid="L290" class="l/* disable I9mef">ac979/a>(struct substream 201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I9m        9ib_free_pages( 201 devno86private_data;
static struct private_data;
 248      id="L290" class="l/* disable I9m     }
<9=substream" class="sref"9subst98eadw((, 400 - <L201"> 201 devno86 *chi99e="L204"> 204!L201"> 201 snabl "sound/pci/ad18snabl ="L2[L201"> 201 devno86substream, reg =    = .c#L276-  , 400 - <9.c#L285" id="L285" class="line9aname="L2999"> 199snd_a9a class="9eset(struct (chip 201 devno86 201 devno86chip10g" id="L279" c4+code=ad1889_readw" clasXXX REVISIT:ewe con probablysallocat/r/a>  in this coll ess(lass85/3b/9d8d15dbcf833cca1fb4eea314f53d840ad8_3/10g" >d="L290" class="l/* disable I10g1 class=10g9_load_wave_interrupt_c10g9_>10g, 400 - <L201"> 201 ss="sound/pci/ad18ss=snd_ < 0iid="L290" class="l/* disable I10g2 class=10g * 201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I10g3 class=10g"+code=chip" class="sre10g"+>10ge="L2id="L290" class="l/* disable I10g4 class=10gD_DMA_WAVIB, 10gass="sref">re="sref">counts>10g6counid="L290" class="l/* disable I10g7 class=10g9"> 19910gL288" class=" +code=ad1889_readw" clas(3) ess();
regp id="L290" class="l/* disable I10g9 class=10gp" class="sref">chip10g9288" class="L201"> 201 ss="sound/pci/ad18ss=snd_ < 0iid="L290" class="l/* disable I101" class=10p, ;fre2_and_.ci/ad1889.c#L283"fre2_and_.cisnd_ id="L290" class="l/* disable I10p1 class=10212" id="L212" class="li10212>10p/ad18a href="+code=chip" class="sre10p2 class=10" id="L213" class="line"10" i>10p2 class="srefa+code=ad1889_readw" clas(4) ess(AD_DMA_WAV, 10p=count" class="sref">countreg =   reg>ad1889_writew(reg>ad1889_writew( 216       10e=">10pd1889_hw_params" class="sref">snd_a10p6 class=10, 0x0);
(10pL288" class=" +code=ad1889_readw" clas.cgister AC97 mixer ess(,>10p8d="L281" cla48" class="liness="sound/pci/ad18ss=snd_ e"a href="+code=r="L2>);
reg>(89_writew( 201 devno8610p9288" class="L201"> 201 ss="sound/pci/ad18ss=snd_ < 0iid="L290" class="l/* disable I102" class=10ef="+code=ad1889_readw" 10ef=>10efcount" class;fre2_and_.ci/ad1889.c#L283"fre2_and_.cisnd_ id="L290" class="l/* disable I1021 class=10ef">AD_DMA_WAV);
10e, 400 -  224      10me=>10e2count" class               ss="sound/pci/ad18ss=snd_ e"a href="+code=r="L2>);
reg>(0>(89_writew(10ee="L204"> 204               ss="sound/pci/ad18ss=snd_ < 0iid="L290" class="l/* disable I10e4 class=10L225" id="L225" class="l10L22>10eass="sref">reg = gotorivate_data;fre2_and_.ci/ad1889.c#L283"fre2_and_.cisnd_ id="L290" class="l/* disable I1025 class=10         snd_a1026 class=10p, (AD_DS_RAMC, 10eL288" class="               ="L2>);
regi id="L290" class="l/* disable I10e8 class=10f="+code=reg" class="sre10f=">10e8counhannel" class="sref">channel10889>10e9288" class=" +code=ad1889_readw" clas(6) ess(,  201 ss="sound/pci/ad18ss=snd_ < 0iid="L290" class="l/* disable I1032 class=10" id="L233" class="line"10" i>10p2count" class;fre2_and_.ci/ad1889.c#L283"fre2_and_.cisnd_ id="L290" class="l/* disable I1033 class=10sref">AD_DMA_ADC, 10pe="L2id="L290" class="l/* disable I1034 class=10"sref">ad1889_load_adc_b10"sr>10p4/a>, 400 - (10p=count" class="line" name="L"l/ cetudrvdata"sound/pci/ad188l/ cetudrvdata       10p6counid="L290" class="l/* disable I1037 class=10, 0x0);
10p" id="L279" c.c#L2760 id="L290" class="l/* disable I10p9 class=10ef="+code=ad1889_readw" 10ef=>10peadw(AD_DMA_ADC);
10efadw;fre2_and_.ci/ad1889.c#L283"fre2_and_.cisnd_:id="L290" class="l/* disable I10e1 class=103"> 243
>10e1288" class="               ="L2card fre286s>10e2count" class.c#L276L201"> 201 ss="sound/pci/ad18ss=snd_ id="L290" class="l/* disable I1043 class=10245" id="L245" class="li10245>10ee="L29.c#L285" id="L285" class="line10e4 class=10_read" class="sref">snd_10_re>10e/pci/ad1889.c#L216" id="L216" class10e5 class=10class="sref">ac97, u10cla>10ee=regstream"void"L201"> 201 _ hrvexii/ad1889.c#L283"_ hrvexiipci/ad1889.c#L216" id="L216" class10e6 class=10ef="+code=chip" class="s10ef=>10e6ta" ="sref">count);
private_data;"l/ dev86>10eL288"tream" class="sref">substreamAD_AC97_BASE + 10ref>10e8d="L281" cla48" class="line
s>10e9288" class="               "l/ cetudrvdata"sound/pci/ad188l/ cetudrvdata        2521052="L29.c#L285" id="L285" class="line1051 class=10_write(struct 105/ad18a href="+code=chip" class="sre1052 class=10" class="sref">ac97,10" c>1052=regstream"  );
substream105e="L204"> 204{tivate_data;PCI_DEVICE/ad1889.c#L283"PCI_DEVICE       >1054="L204"> 204{t0,L} a href="+code=chip" class="sre1055 class=10AD_AC97_BASE + 105e=reg} id="L290" class="l/* disable I1056 class=10a>static int
count);
 259>1051889_ac97_ready" class="sref">snd_a1058 class=10ready(struct 1058=regstream"sef">private_data;"l/ drivss/ad1889.c#L283""l/ drivss="L2089_writew(substreamchip<10chi>1059288" class="nd/pci/ad1889.c# substream/* average nee10"co>10"c288" class="nd/pci/ad1889.c#id_tabl "sound/pci/ad18id_tabl snd_ e"a href="+code=r="L2>);
substream10"1288" class="nd/pci/ad1889.c#prob286);
);
substream();
substreamAD_AC97_ACIC)10"sr>10"3=reg} id="L290" class="l/* disable I1064 class=105                10"/pci/ad1889.c#L216" id="L216" class1065 class=10(!10"e=reg="sref">count10"6ta" =/pre>
The original LXR softwarerby"the d="L290" http://s="rceforge.net/projects/lxr/>LXR _reaunitysnd_ &this experiadw"al vsssionrby"d="L290" mailto:lxr@de=ux.no">lxr@de=ux.nosnd_. lxr.de=ux.no kindly hosted by"d="L290" http://www.redpill-de=pro.no">Redpill Le=pro ASsnd_ &providerrof"Le=ux consulting and operations sdrvic2s since 1995.