linux/Documentation/edac.txt
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   1
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   3EDAC - Error Detection And Correction
   4
   5Written by Doug Thompson <dougthompson@xmission.com>
   67 Dec 2005
   717 Jul 2007     Updated
   8
   9(c) Mauro Carvalho Chehab <mchehab@redhat.com>
  1005 Aug 2009     Nehalem interface
  11
  12EDAC is maintained and written by:
  13
  14        Doug Thompson, Dave Jiang, Dave Peterson et al,
  15        original author: Thayne Harbaugh,
  16
  17Contact:
  18        website:        bluesmoke.sourceforge.net
  19        mailing list:   bluesmoke-devel@lists.sourceforge.net
  20
  21"bluesmoke" was the name for this device driver when it was "out-of-tree"
  22and maintained at sourceforge.net.  When it was pushed into 2.6.16 for the
  23first time, it was renamed to 'EDAC'.
  24
  25The bluesmoke project at sourceforge.net is now utilized as a 'staging area'
  26for EDAC development, before it is sent upstream to kernel.org
  27
  28At the bluesmoke/EDAC project site is a series of quilt patches against
  29recent kernels, stored in a SVN repository. For easier downloading, there
  30is also a tarball snapshot available.
  31
  32============================================================================
  33EDAC PURPOSE
  34
  35The 'edac' kernel module goal is to detect and report errors that occur
  36within the computer system running under linux.
  37
  38MEMORY
  39
  40In the initial release, memory Correctable Errors (CE) and Uncorrectable
  41Errors (UE) are the primary errors being harvested. These types of errors
  42are harvested by the 'edac_mc' class of device.
  43
  44Detecting CE events, then harvesting those events and reporting them,
  45CAN be a predictor of future UE events.  With CE events, the system can
  46continue to operate, but with less safety. Preventive maintenance and
  47proactive part replacement of memory DIMMs exhibiting CEs can reduce
  48the likelihood of the dreaded UE events and system 'panics'.
  49
  50NON-MEMORY
  51
  52A new feature for EDAC, the edac_device class of device, was added in
  53the 2.6.23 version of the kernel.
  54
  55This new device type allows for non-memory type of ECC hardware detectors
  56to have their states harvested and presented to userspace via the sysfs
  57interface.
  58
  59Some architectures have ECC detectors for L1, L2 and L3 caches, along with DMA
  60engines, fabric switches, main data path switches, interconnections,
  61and various other hardware data paths. If the hardware reports it, then
  62a edac_device device probably can be constructed to harvest and present
  63that to userspace.
  64
  65
  66PCI BUS SCANNING
  67
  68In addition, PCI Bus Parity and SERR Errors are scanned for on PCI devices
  69in order to determine if errors are occurring on data transfers.
  70
  71The presence of PCI Parity errors must be examined with a grain of salt.
  72There are several add-in adapters that do NOT follow the PCI specification
  73with regards to Parity generation and reporting. The specification says
  74the vendor should tie the parity status bits to 0 if they do not intend
  75to generate parity.  Some vendors do not do this, and thus the parity bit
  76can "float" giving false positives.
  77
  78In the kernel there is a PCI device attribute located in sysfs that is
  79checked by the EDAC PCI scanning code. If that attribute is set,
  80PCI parity/error scanning is skipped for that device. The attribute
  81is:
  82
  83        broken_parity_status
  84
  85as is located in /sys/devices/pci<XXX>/0000:XX:YY.Z directories for
  86PCI devices.
  87
  88FUTURE HARDWARE SCANNING
  89
  90EDAC will have future error detectors that will be integrated with
  91EDAC or added to it, in the following list:
  92
  93        MCE     Machine Check Exception
  94        MCA     Machine Check Architecture
  95        NMI     NMI notification of ECC errors
  96        MSRs    Machine Specific Register error cases
  97        and other mechanisms.
  98
  99These errors are usually bus errors, ECC errors, thermal throttling
 100and the like.
 101
 102
 103============================================================================
 104EDAC VERSIONING
 105
 106EDAC is composed of a "core" module (edac_core.ko) and several Memory
 107Controller (MC) driver modules. On a given system, the CORE
 108is loaded and one MC driver will be loaded. Both the CORE and
 109the MC driver (or edac_device driver) have individual versions that reflect
 110current release level of their respective modules.
 111
 112Thus, to "report" on what version a system is running, one must report both
 113the CORE's and the MC driver's versions.
 114
 115
 116LOADING
 117
 118If 'edac' was statically linked with the kernel then no loading is
 119necessary.  If 'edac' was built as modules then simply modprobe the
 120'edac' pieces that you need.  You should be able to modprobe
 121hardware-specific modules and have the dependencies load the necessary core
 122modules.
 123
 124Example:
 125
 126$> modprobe amd76x_edac
 127
 128loads both the amd76x_edac.ko memory controller module and the edac_mc.ko
 129core module.
 130
 131
 132============================================================================
 133EDAC sysfs INTERFACE
 134
 135EDAC presents a 'sysfs' interface for control, reporting and attribute
 136reporting purposes.
 137
 138EDAC lives in the /sys/devices/system/edac directory.
 139
 140Within this directory there currently reside 2 'edac' components:
 141
 142        mc      memory controller(s) system
 143        pci     PCI control and status system
 144
 145
 146============================================================================
 147Memory Controller (mc) Model
 148
 149First a background on the memory controller's model abstracted in EDAC.
 150Each 'mc' device controls a set of DIMM memory modules. These modules are
 151laid out in a Chip-Select Row (csrowX) and Channel table (chX). There can
 152be multiple csrows and multiple channels.
 153
 154Memory controllers allow for several csrows, with 8 csrows being a typical value.
 155Yet, the actual number of csrows depends on the electrical "loading"
 156of a given motherboard, memory controller and DIMM characteristics.
 157
 158Dual channels allows for 128 bit data transfers to the CPU from memory.
 159Some newer chipsets allow for more than 2 channels, like Fully Buffered DIMMs
 160(FB-DIMMs). The following example will assume 2 channels:
 161
 162
 163                Channel 0       Channel 1
 164        ===================================
 165        csrow0  | DIMM_A0       | DIMM_B0 |
 166        csrow1  | DIMM_A0       | DIMM_B0 |
 167        ===================================
 168
 169        ===================================
 170        csrow2  | DIMM_A1       | DIMM_B1 |
 171        csrow3  | DIMM_A1       | DIMM_B1 |
 172        ===================================
 173
 174In the above example table there are 4 physical slots on the motherboard
 175for memory DIMMs:
 176
 177        DIMM_A0
 178        DIMM_B0
 179        DIMM_A1
 180        DIMM_B1
 181
 182Labels for these slots are usually silk screened on the motherboard. Slots
 183labeled 'A' are channel 0 in this example. Slots labeled 'B'
 184are channel 1. Notice that there are two csrows possible on a
 185physical DIMM. These csrows are allocated their csrow assignment
 186based on the slot into which the memory DIMM is placed. Thus, when 1 DIMM
 187is placed in each Channel, the csrows cross both DIMMs.
 188
 189Memory DIMMs come single or dual "ranked". A rank is a populated csrow.
 190Thus, 2 single ranked DIMMs, placed in slots DIMM_A0 and DIMM_B0 above
 191will have 1 csrow, csrow0. csrow1 will be empty. On the other hand,
 192when 2 dual ranked DIMMs are similarly placed, then both csrow0 and
 193csrow1 will be populated. The pattern repeats itself for csrow2 and
 194csrow3.
 195
 196The representation of the above is reflected in the directory tree
 197in EDAC's sysfs interface. Starting in directory
 198/sys/devices/system/edac/mc each memory controller will be represented
 199by its own 'mcX' directory, where 'X' is the index of the MC.
 200
 201
 202        ..../edac/mc/
 203                   |
 204                   |->mc0
 205                   |->mc1
 206                   |->mc2
 207                   ....
 208
 209Under each 'mcX' directory each 'csrowX' is again represented by a
 210'csrowX', where 'X' is the csrow index:
 211
 212
 213        .../mc/mc0/
 214                |
 215                |->csrow0
 216                |->csrow2
 217                |->csrow3
 218                ....
 219
 220Notice that there is no csrow1, which indicates that csrow0 is
 221composed of a single ranked DIMMs. This should also apply in both
 222Channels, in order to have dual-channel mode be operational. Since
 223both csrow2 and csrow3 are populated, this indicates a dual ranked
 224set of DIMMs for channels 0 and 1.
 225
 226
 227Within each of the 'mcX' and 'csrowX' directories are several
 228EDAC control and attribute files.
 229
 230============================================================================
 231'mcX' DIRECTORIES
 232
 233
 234In 'mcX' directories are EDAC control and attribute files for
 235this 'X' instance of the memory controllers.
 236
 237For a description of the sysfs API, please see:
 238        Documentation/ABI/testing/sysfs/devices-edac
 239
 240
 241============================================================================
 242'csrowX' DIRECTORIES
 243
 244When CONFIG_EDAC_LEGACY_SYSFS is enabled, the sysfs will contain the
 245csrowX directories. As this API doesn't work properly for Rambus, FB-DIMMs
 246and modern Intel Memory Controllers, this is being deprecated in favor
 247of dimmX directories.
 248
 249In the 'csrowX' directories are EDAC control and attribute files for
 250this 'X' instance of csrow:
 251
 252
 253Total Uncorrectable Errors count attribute file:
 254
 255        'ue_count'
 256
 257        This attribute file displays the total count of uncorrectable
 258        errors that have occurred on this csrow. If panic_on_ue is set
 259        this counter will not have a chance to increment, since EDAC
 260        will panic the system.
 261
 262
 263Total Correctable Errors count attribute file:
 264
 265        'ce_count'
 266
 267        This attribute file displays the total count of correctable
 268        errors that have occurred on this csrow. This
 269        count is very important to examine. CEs provide early
 270        indications that a DIMM is beginning to fail. This count
 271        field should be monitored for non-zero values and report
 272        such information to the system administrator.
 273
 274
 275Total memory managed by this csrow attribute file:
 276
 277        'size_mb'
 278
 279        This attribute file displays, in count of megabytes, of memory
 280        that this csrow contains.
 281
 282
 283Memory Type attribute file:
 284
 285        'mem_type'
 286
 287        This attribute file will display what type of memory is currently
 288        on this csrow. Normally, either buffered or unbuffered memory.
 289        Examples:
 290                Registered-DDR
 291                Unbuffered-DDR
 292
 293
 294EDAC Mode of operation attribute file:
 295
 296        'edac_mode'
 297
 298        This attribute file will display what type of Error detection
 299        and correction is being utilized.
 300
 301
 302Device type attribute file:
 303
 304        'dev_type'
 305
 306        This attribute file will display what type of DRAM device is
 307        being utilized on this DIMM.
 308        Examples:
 309                x1
 310                x2
 311                x4
 312                x8
 313
 314
 315Channel 0 CE Count attribute file:
 316
 317        'ch0_ce_count'
 318
 319        This attribute file will display the count of CEs on this
 320        DIMM located in channel 0.
 321
 322
 323Channel 0 UE Count attribute file:
 324
 325        'ch0_ue_count'
 326
 327        This attribute file will display the count of UEs on this
 328        DIMM located in channel 0.
 329
 330
 331Channel 0 DIMM Label control file:
 332
 333        'ch0_dimm_label'
 334
 335        This control file allows this DIMM to have a label assigned
 336        to it. With this label in the module, when errors occur
 337        the output can provide the DIMM label in the system log.
 338        This becomes vital for panic events to isolate the
 339        cause of the UE event.
 340
 341        DIMM Labels must be assigned after booting, with information
 342        that correctly identifies the physical slot with its
 343        silk screen label. This information is currently very
 344        motherboard specific and determination of this information
 345        must occur in userland at this time.
 346
 347
 348Channel 1 CE Count attribute file:
 349
 350        'ch1_ce_count'
 351
 352        This attribute file will display the count of CEs on this
 353        DIMM located in channel 1.
 354
 355
 356Channel 1 UE Count attribute file:
 357
 358        'ch1_ue_count'
 359
 360        This attribute file will display the count of UEs on this
 361        DIMM located in channel 0.
 362
 363
 364Channel 1 DIMM Label control file:
 365
 366        'ch1_dimm_label'
 367
 368        This control file allows this DIMM to have a label assigned
 369        to it. With this label in the module, when errors occur
 370        the output can provide the DIMM label in the system log.
 371        This becomes vital for panic events to isolate the
 372        cause of the UE event.
 373
 374        DIMM Labels must be assigned after booting, with information
 375        that correctly identifies the physical slot with its
 376        silk screen label. This information is currently very
 377        motherboard specific and determination of this information
 378        must occur in userland at this time.
 379
 380============================================================================
 381SYSTEM LOGGING
 382
 383If logging for UEs and CEs are enabled then system logs will have
 384error notices indicating errors that have been detected:
 385
 386EDAC MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0,
 387channel 1 "DIMM_B1": amd76x_edac
 388
 389EDAC MC0: CE page 0x1e5, offset 0xfb0, grain 8, syndrome 0xb741, row 0,
 390channel 1 "DIMM_B1": amd76x_edac
 391
 392
 393The structure of the message is:
 394        the memory controller                   (MC0)
 395        Error type                              (CE)
 396        memory page                             (0x283)
 397        offset in the page                      (0xce0)
 398        the byte granularity                    (grain 8)
 399                or resolution of the error
 400        the error syndrome                      (0xb741)
 401        memory row                              (row 0)
 402        memory channel                          (channel 1)
 403        DIMM label, if set prior                (DIMM B1
 404        and then an optional, driver-specific message that may
 405                have additional information.
 406
 407Both UEs and CEs with no info will lack all but memory controller,
 408error type, a notice of "no info" and then an optional,
 409driver-specific error message.
 410
 411
 412============================================================================
 413PCI Bus Parity Detection
 414
 415
 416On Header Type 00 devices the primary status is looked at
 417for any parity error regardless of whether Parity is enabled on the
 418device.  (The spec indicates parity is generated in some cases).
 419On Header Type 01 bridges, the secondary status register is also
 420looked at to see if parity occurred on the bus on the other side of
 421the bridge.
 422
 423
 424SYSFS CONFIGURATION
 425
 426Under /sys/devices/system/edac/pci are control and attribute files as follows:
 427
 428
 429Enable/Disable PCI Parity checking control file:
 430
 431        'check_pci_parity'
 432
 433
 434        This control file enables or disables the PCI Bus Parity scanning
 435        operation. Writing a 1 to this file enables the scanning. Writing
 436        a 0 to this file disables the scanning.
 437
 438        Enable:
 4entation/edac.txt#L337" id="L3375chS        a 0 to tl#L297" id="L297" class="line" name="LRame="L390"> 390channel 1 "
        a 0 to tl#Lif="Documeame="L347"> 347
 348Chann4l 1 C44e="L318"> 318
er Ty is af="Documentation/edac.txt#L360" id="L360" cla4tion/edac4txt#L349" id="L349" clas4="lin4csrowX' directories are EDAC control4s="line" 4ame="L350"> 350     4  Řxt#L320" id="L320" class="line" name="L320"> 320 351>
 352     4  Thi4 attribute file will display the count o4 CEs on t4is
 413PCI Bus Parity Detection
 355
 356Chann4l 1 U4 Count attribute file:
tUEhref="Documentation/edac.txt#L431" id="L431" class="line" 4ame="L358"> 358     4  "ch1_ue_count'
 359
cume_mc_        thiumentation/edac.txt#L360" id="L360" cla4s="line" 4ame="L360"> 360     4  Thi4 attribute file will display the count o4 UEs on t4is

 372.="L320"20"s="linebute file will display the count o4 ="line" 4txt#L362" id="L362" clas4="lin4" name="L362">desir tha.="ItThbadnameame="ref=inue      an    errors tha" clasbute file will display the count o4 CEs on t4ame="L363"> 363
cume378"> 37e"> 307wf="   errors" ida>driv436" id=his file disables the scanning.
 364Chann4l 1 D46344" id="L344"a>erroref=ext migh"linesonameg84"> 3lass=f=inulassme="L4eadn>   uridges file disables the scanning.
 366     4  "L266"> 266nid="L221f="Dtation/edac.txt#L438" id="L438" clason/edac.t4t#L367" id="L367" class=4line"4 attribute file displays the total count4s="line" 4ame="L368"> 368     4  Thi4c.txt#L268" idLOAD TIME: 370  378s/cume_mc_        thi' directories are EDAC control4system lo4.
 374     4  DIM4 Labels must be assigned after booting, 4ith infor4ation
 305
 3rough      This b        logDocument tUEh0by its a namme="L2ocume      UEh id="L38/a>
 380=====4=====4========================================4=========4=============
 LOAD TIME: 370 383If lo4ging 482L370" id="L3RUN TIME: channel 1 "  378s/cume_mc_logthiation/edac.txt#L283" id="L283" cla4s="line" 4ve
 386EDAC 4C0: C4 page LogtCEhref="Documentation/edac.txt#L431" id="L431" clasome 0x6ec4, row 0,
 318
cume_mc_logtciumentation/edac.txt#L360" id="L360" cla4s="line" 4ame="L389"> 389EDAC 4C0: C4 page 0x1e5, offset 0xfb0, grain 8, synd4ome 0xb744, row 0,
 291 clas 3ine" infor4"> 3rough      This b        logDocument0x1e5, offset 0xfb0, grain 8, synd4od="L382"4ame="L392"> 392
 292CEh0by its a namme="L2ocume      CEh id="L38/a>
 393The s4ructu4e of the message is:
 LOAD TIME: 370  378s/cume_mc_logtcsrow3 are populated, this indicates43)
 351
cume_mc_ oll_msecumentation/edac.txt#L360" id="L360" cla50)
oll"L38372" classef="Documentation/edac.txt#L407" id="L407" cla5 B1
 377 ; instance of csrow:

<1s="line".="10008mby i"L420"s (oll pxt#L2"L420")8/a>61hi#L2requirine" 1"> 42it#wid="liney="linget,  have additional information.
        LOAD TIME: 370 411
 412=====5=====512        RUN TIME: channel 1 &q000uot;  378s/cume_mc_ oll_msecation/edac.txt#L412" id="L412" cla5sel 1)
 415<5ef="D5 376" id="L376" n/eda======0ITY name=/edac.txt#L431" id="L431" clasocume5e" name="5416"> 416On Header T5pe 005devices the primary status is looked at
5a href="D5cumentation/edac.txt#L415" id=51367"> 367
 435<  thief="Dn    e lso
 291 clas 3ine"CEhreDocumentation/edac.txt#L438" id="L438" class="li5 class="l5ne" name="L422"> 4225 423
 424SYSFS CONFI5URATI5204" claToo sl/ker lab="L>  378: cume_mc_ ol  thi'"Docu]bute file displays the total count4
5425 426Under /sys/5evice526"> 326
< id="L3375chS        a 0 to tl#L297" 5e files a5 follows:
 367l 1 "  378s/cume_mc_log  thi'"Docu]375chS        a 0 to tl#L297" 5e on the
5428"> 428
 429Enable/Disa5le PC5="L329"> 329channel 1 "  378s/cume_mc_ ol  thi'"Docu]375chS        a 0 to tl#L297" 5e" name="5431"> 431        #chec5_pci_parity'
 433
 434        Thi5 cont53dac.txt#L413" id="L413" class="line" name="L413"> 413PCI Bus Parity Deteedac.txt#L434" id="L434" class="li5e="L425" 5ning
 438        Ena5le:
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5cumeame="5347"> 347
 348Chann4l 1 C54e="L518"> 3lin ume_mtest=tilize_c_ oume_m43ilized(fou="Documes buch moke.s.="Lolasget.net websiteset prior                (DIMM B1
<5dac4txt#L549" id="L349" clas4="lin5csrow5' installslabeelf an/edac.txt#L428" id="L428" class="li5e" 4ame="5350"> 350     4  Ţxt#L5e_count'
 351>
 352     4  Thi5 attr5bute file will display the count o4 CEs 5n t4is
  ume_minstaniotion/edac.txt#L433" id="L433" class="li5dac4txt#L554" id="L354" clas4="lin5" nam5edac.t35ha"  hrn/edac.txt#L407" id="L407" cla5 8conte" 4ame="5355"> 355
 356Chann4l 1 U5 Coun5 attri 394 358     4  #ch1_55e="L308/a>  crow3 a          boolea73 359
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 364Chann4l 1 D56344"56394"> 394test=tilize_c_ o43ilizedaddss=">   "> 3n   beabe own customsocument/edac.txt#L428" id="L428" class="li5e" 4txt#L565" id="L365" clas4="lin56n/ed56tion/edac.txt#L356" id="L356" class="li5e" 4ame="5366"> 366     4  #L266"5 266nid="Ltest=babe       requir="L398"tnstancLtest> 405 367>>>>>>>>>>>>>>>>show how cume378"stalled. A > 3roug 405 368     4  Thi5c.txt5L268" idLOAD TTTTTTTTTTTTTTTTTaddlone="L4mL>  suuirocumentsinnd/d="L"line" ncile will display what type o40)
 400     rdwnfoedac.txt#L407" id="L407" cla5 8cont " 4txt#L5ocumentation/edac.4xt#L357attr57               x8

 374     4  DIM5 Labe57394"> 394  43ilume_m4hiaume37r     UnbuclassL2  (Tre/=tilize/edac.txt#L407" id="L407" cla5 8contfor4ation5 380=====4=====5=====57966nid="Ltest-instanio0ile will display the count of CEs 5===4=====5=======
 383If lo4ging 582L375" id="Iples:
<35ha"  hrixt#rebnfortwolt. Scumsocntant"L"line" nc, requirnfortotalsDocumentation/edac.txt#L422" id="L4225e" 4ve
 386EDAC 4C0: C5 page58266nid="Locumentaa>nid="LtotalIMM lo      caMM eub35ha"  hnam9;
 367ucumentaa>nid="LtotalIMM Uo      caMM eub35ha"  hnam9;
 389EDAC 4C0: C5 page50x1e5,BLOCK/edac.txt#L244" id="L244" cla4s="li5b744, row50,
 2AtThis  5ha"  hri  /a   moume_mblockume_m435ha"  hre Tt#rebt,  ame0, ional, driver-specific message that582"4ame="5392"> 392
 2"L4mL>  blockss 393The s4ructu5e of 5he message is:
 LOAD Ttest-block0ile will display the count of CEs 5ef=4Docum5ntation/edac.txt#L495" i59mem_5ype'
 400 351
cucumentaa>nid="Lrequir=ssocntant"MM Uo      calassL2  (ume_mblockume_mile will display what type o4n 8)
6hre5="Doc6mentation/edac.txt5L402"6attri60               x8
 393The s4ructu60xt#L60e message is:
 42c essage.
 400 411
 42c essage.
 412=====5=====612 42c essage.
 415<5ef="D6 376"6ation/edac.txt#L416" id="L416" class="li6e" name="6416"> 416On Header T6pe 006devices the primary status is looked at
6a href="D6cumentation/edac.txt#L416" id=61367"> 367resyt-ocntants  ////////ws="lineANY es:ngr7"> 437 42it#wiabovecocntants/edac.txt#L407" id="L407" cla5 8con6ses).
 2Uref="Documume_mtest=tilize_c_ oume_m43405 4226 423
 424SYSFS CONFI6URATI623d="LTin ume_mtest=tilize_c_ oume_m4s1
6425
< site lassEDAC/edac.txt#L407" id="L407" cla5 8con6e" name="6426"> 426Under /sys/6evice6/system/edac/pci are control and attribu6e files a6 follows:
xt#L413" id="L413" class="line" name="L413"> 413PCI Bus Parity Deteedac.txt#L434" id="L434" class="li6e on the
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 429Enable/Disa6le PC6 Parity checking control file:
     ndlsedac.txt#L424" id="L424" class="li6e" name="6431"> 431        $chec6_pci_pNehalemsEDACn3405 ikely ameabelg"> 421fu     5 433
 434        Thi6 cont63dac.tDueauselin way Nehalemsex> 3rs Mype, aC> 395 data,ype 01adjustm   cile will display what type o40)
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 395 p hrQuick Patch Itantocun>
 438        Ena6le:
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 4en6ation6edac.txt#" nocief="Dine" a       silCPU socketeedac.txt#L424" id="L424" class="li6ecumentat6lass="line" name="LRame=6L390"63_count'
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 36mapa abel, i/dimm78"uotdiff#re2e" srow5et'
 348Chann4l 1 C64e="L64ute file will display what type o4n 8)
6dac4txt#L649" id="L349" clas4="lin6csrow64dac.txt#Fassex1
 350     4  Ŭxt#L620" id="L320" Ch0     rd0,lws0row 063f4031): 2 rank5,TUne" 5edac.txt#L428" id="L428" class="li6txt4L351"6id="L351" class="l4ne" n6me="L65               dimm70 1024 Mbne" nam:e0, bank:/a>crank:/;DIMM_:e0x4000, col:e0x400edac.txt#L428" id="L428" class="li6t" 5ame="6352"> 352     4  Thi6 attr651              dimm71 1024 Mbne" nam:e4, bank:/a>crank:/;DIMM_:e0x4000, col:e0x400edac.txt#L428" id="L428" class="li6t" name="6href="Documentatio4/edac6ectab652" id="L320" Ch1     rd1,lws1row 063f4031): 2 rank5,TUne" 5edac.txt#L428" id="L428" class="li6t" name="654" id="L354" clas4="lin6" nam653              dimm70 1024 Mbne" nam:e0, bank:/a>crank:/;DIMM_:e0x4000, col:e0x400edac.txt#L428" id="L428" class="li6t="L425" 6355"> 355
 356Chann4l 1 U6 Coun655              dimm70 1024 Mbne" nam:e0, bank:/a>crank:/;DIMM_:e0x4000, col:e0x400edac.txt#L428" id="L428" class="li6tumeame="657" id="L357" clas4="lin6" nam656d="L40nTt#g3405
 358     4  $ch1_65e="L308/a>  c srow0:"abel, if0, dimm0edac.txt#L428" id="L428" class="li6tac4txt#L6id="L359" class="l4ne" n6me="L659"> 359
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 363
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 356Chann4l 1 U7 Coun75evices the primary status is looked at
7tumeame="757" id="L357" clas4="lin7" nam756d="L40nW2aumhappensit#rebis 42aumeame=41nst"iff#re2e" srow5,rrorre ine" s4="s the primary status is looked at
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