linux/drivers/watchdog/cpwd.c
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ioio3.4/spalue 3.4/formue 3.4a ioio3. href="../linux+v33.11/drivers/watchdog/cpwd.c">ioio3.4img src="../.static/gfx/right.png" alt=">>">io4/spalueio4spal class="lxr_search">ioioioio3.4input typ v3hidden" nam v3navtarget" > v3">ioio3.4input typ v3text" nam v3search" idv3search">ioio3.4butt typ v3submit">Searchioio3.Prefse 3.4/a>io4/spalueio3. .4/divueio3. .4form ac val="ajax+*" method="post" onsubmit="return false;">io4input typ v3hidden" nam v3ajax_lookup" idv3ajax_lookup" > v3">iio3. .4/formueiio3. .4div class="headingbott m">e 4div idv3file_contents"u
. .14/a>4spal class="comment">/* cpwd.c - driver implementa5"
	 for hardware watchdog4/spalue. .24/a>4spal class="comment"> * timers found on Sun Microsystems CP1400 and CP1500 boards.4/spalue. .34/a>4spal class="comment"> *4/spalue. .44/a>4spal class="comment"> * This device supports both the generic Linux watchdog4/spalue. .54/a>4spal class="comment"> * interface and Solaris-compa5"ble ioctls as best it is4/spalue. .64/a>4spal class="comment"> * able.4/spalue. .74/a>4spal class="comment"> *4/spalue. .84/a>4spal class="comment"> * NOTE:        CP1400 systems appear to have a defective intr_mask4/spalue. .94/a>4spal class="comment"> *                      register on the PLD, preventing the disabling of4/spalue. optia>4spal class="comment"> *                      timer interrupts.  We use a timer to periodically4/spalue. 114/a>4spal class="comment"> *                      reset 'stopped' watchdogs on affected platforms.4/spalue. 124/a>4spal class="comment"> *4/spalue. 134/a>4spal class="comment"> * Copyright (c) 2000 Eric Brower (ebrower@usa.net)4/spalue. 144/a>4spal class="comment"> * Copyright (C) 2008 David S. Miller <davem@davemloft.net>4/spalue. 154/a>4spal class="comment"> */4/spalue. 164/a>e. 174/a>#define.4a href="+code=pr_fmt" class="sref">pr_fmt4/a>(4a href="+code=fmt" class="sref">fmt4/a>).4a href="+code=KBUILD_MODNAME" class="sref">KBUILD_MODNAME4/a> 4spal class="string">": "4/spalu.4a href="+code=fmt" class="sref">fmt4/a>e. 184/a>e. 194/a>#include <linux/kernel.h4/a>>e. 204/a>#include <linux/module.h4/a>>e. 214/a>#include <linux/fs.h4/a>>e. 224/a>#include <linux/errno.h4/a>>e. 234/a>#include <linux/major.h4/a>>e. 244/a>#include <linux/init.h4/a>>e. 254/a>#include <linux/miscdevice.h4/a>>e. 264/a>#include <linux/interrupt.h4/a>>e. 274/a>#include <linux/ioport.h4/a>>e. 284/a>#include <linux/timer.h4/a>>e. 294/a>#include <linux/slab.h4/a>>e. 304/a>#include <linux/mutex.h4/a>>e. 314/a>#include <linux/io.h4/a>>e. 324/a>#include <linux/of.h4/a>>e. 334/a>#include <linux/of_device.h4/a>>e. 344/a>#include <linux/uaccess.h4/a>>e. 354/a>e. 364/a>#include <asm/irq.h4/a>>e. 374/a>#include <asm/watchdog.h4/a>>e. 384/a>e. 394/a>#define.4a href="+code=DRIVER_NAME" class="sref">DRIVER_NAME4/a> 3. .4spal class="string">"cpwd"4/spalue. 404/a>e. 414/a>#define.4a href="+code=WD_OBPNAME" class="sref">WD_OBPNAME4/a> 3. ..4spal class="string">"watchdog"4/spalue. 424/a>#define.4a href="+code=WD_BADMODEL" class="sref">WD_BADMODEL4/a> 3. .4spal class="string">"SUNW,501-5336"4/spalue. 434/a>#define.4a href="+code=WD_BTIMEOUT" class="sref">WD_BTIMEOUT4/a> 3. .(4a href="+code=jiffies" class="sref">jiffies4/a> +.(4a href="+code=HZ" class="sref">HZ4/a> * 1000))e. 444/a>#define.4a href="+code=WD_BLIMIT" class="sref">WD_BLIMIT4/a> 3. .. 0xFFFFe. 454/a>e. 464/a>#define.4a href="+code=WD0_MINOR" class="sref">WD0_MINOR4/a> 3. .. 212e. 474/a>#define.4a href="+code=WD1_MINOR" class="sref">WD1_MINOR4/a> 3. .. 213e. 484/a>#define.4a href="+code=WD2_MINOR" class="sref">WD2_MINOR4/a> 3. .. 214e. 494/a>e. 5ptia>4spal class="comment">/* Internal driver defini5"
	s.  */4/spalue. 514/a>#define.4a href="+code=WD0_ID" class="sref">WD0_ID4/a> 3. ..            0e. 524/a>#define.4a href="+code=WD1_ID" class="sref">WD1_ID4/a> 3. ..            1e. 534/a>#define.4a href="+code=WD2_ID" class="sref">WD2_ID4/a> 3. ..            2e. 544/a>#define.4a href="+code=WD_NUMDEVS" class="sref">WD_NUMDEVS4/a> 3. ..        3e. 554/a>e. 564/a>#define.4a href="+code=WD_INTR_OFF" class="sref">WD_INTR_OFF4/a> 3. ..       0e. 574/a>#define.4a href="+code=WD_INTR_ON" class="sref">WD_INTR_ON4/a> 3. ..        1e. 584/a>e. 594/a>#define.4a href="+code=WD_STAT_INIT" class="sref">WD_STAT_INIT4/a> 3. 0x013. .4spal class="comment">/* Watchdog timer is ini5"alized        */4/spalue. 604/a>#define.4a href="+code=WD_STAT_BSTOP" class="sref">WD_STAT_BSTOP4/a> 3.0x023. .4spal class="comment">/* Watchdog timer is brokenstopped      */4/spalue. 614/a>#define.4a href="+code=WD_STAT_SVCD" class="sref">WD_STAT_SVCD4/a> 3. 0x043. .4spal class="comment">/* Watchdog interrupt occurred          */4/spalue. 624/a>e. 634/a>4spal class="comment">/* Register  >
   defini5"
	s4/spalue. 644/a>4spal class="comment"> */4/spalue. 654/a>#define.4a href="+code=WD0_INTR_MASK" class="sref">WD0_INTR_MASK4/a> 3.0x013. .4spal class="comment">/* Watchdog device interrupt masks      */4/spalue. 664/a>#define.4a href="+code=WD1_INTR_MASK" class="sref">WD1_INTR_MASK4/a> 3.0x02e. 674/a>#define.4a href="+code=WD2_INTR_MASK" class="sref">WD2_INTR_MASK4/a> 3.0x04e. 684/a>e. 694/a>#define.4a href="+code=WD_S_RUNNING" class="sref">WD_S_RUNNING4/a> 3. 0x013. .4spal class="comment">/* Watchdog device status running       */4/spalue. 704/a>#define.4a href="+code=WD_S_EXPIRED" class="sref">WD_S_EXPIRED4/a> 3. 0x023. .4spal class="comment">/* Watchdog device status expired       */4/spalue. 714/a>e. 724/a>struct.4a href="+code=cpwd" class="sref">cpwd4/a> {e. 734/a> 3. ..  void.4a href="+code=__iomem" class="sref">__iomem4/a> 3. *4a href="+code=regs" class="sref">regs4/a>;e. 744/a> 3. ..  4a href="+code=spinlock_t" class="sref">spinlock_t4/a> 3. ..4a href="+code=lock" class="sref">lock4/a>;e. 754/a>e. 764/a> 3. ..  unsigned int. ..4a href="+code=irq" class="sref">irq4/a>;e. 774/a>e. 784/a> 3. ..  unsigned long   4a href="+code=timeout" class="sref">timeout4/a>;e. 794/a> 3. ..  4a href="+code=bool" class="sref">bool4/a> 3. ..      4a href="+code=enabled" class="sref">enabled4/a>;e. 804/a> 3. ..  4a href="+code=bool" class="sref">bool4/a> 3. ..      4a href="+code=reboot" class="sref">reboot4/a>;e. 814/a> 3. ..  4a href="+code=bool" class="sref">bool4/a> 3. ..      4a href="+code=broken" class="sref">broken4/a>;e. 824/a> 3. ..  4a href="+code=bool" class="sref">bool4/a> 3. ..      4a href="+code=ini5"alized" class="sref">ini5"alized4/a>;e. 834/a>e. 844/a> 3. ..  struct.{e. 854/a> 3. ..          struct.4a href="+code=miscdevice" class="sref">miscdevice4/a> 3. .. 4a href="+code=misc" class="sref">misc4/a>;e. 864/a> 3. ..          void.4a href="+code=__iomem" class="sref">__iomem4/a> 3.         *4a href="+code=regs" class="sref">regs4/a>;e. 874/a> 3. ..          4a href="+code=u8" class="sref">u84/a> 3. ..                4a href="+code=intr_mask" class="sref">intr_mask4/a>;e. 884/a> 3. ..          4a href="+code=u8" class="sref">u84/a> 3. ..                4a href="+code=runstatus" class="sref">runstatus4/a>;e. 894/a> 3. ..          4a href="+code=u16" class="sref">u164/a> 3. ..               4a href="+code=timeout" class="sref">timeout4/a>;e. 904/a> 3. ..  } 4a href="+code=devs" class="sref">devs4/a>[4a href="+code=WD_NUMDEVS" class="sref">WD_NUMDEVS4/a>];e. 914/a>};e. 924/a>e. 934/a>static.4a href="+code=DEFINE_MUTEX" class="sref">DEFINE_MUTEX4/a>(4a href="+code=cpwd_mutex" class="sref">cpwd_mutex4/a>);e. 944/a>static.struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=cpwd_device" class="sref">cpwd_device4/a>;e. 954/a>e. 964/a>4spal class="comment">/* Sun uses Altera PLD EPF8820ATC144-44/spalue. 974/a>4spal class="comment"> * providing three hardware watchdogs:4/spalue. 984/a>4spal class="comment"> *4/spalue. 994/a>4spal class="comment"> * 1) RIC - sends al interrupt when triggered4/spalue.1004/a>4spal class="comment"> * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU4/spalue.1014/a>4spal class="comment"> * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board4/spalue.1024/a>4spal class="comment"> *4/spalue.1034/a>4spal class="comment"> *** Timer register block defini5"
	 (struct.wd_timer_regblk)4/spalue.1044/a>4spal class="comment"> *4/spalue.1054/a>4spal class="comment"> * dcntr and limit registers (halfword access):4/spalue.1064/a>4spal class="comment"> * -------------------4/spalue.1074/a>4spal class="comment"> * | 15 | ...| 1 | 0 |4/spalue.1084/a>4spal class="comment"> * -------------------4/spalue.1094/a>4spal class="comment"> * |-  counter  >
  -|4/spalue.1optia>4spal class="comment"> * -------------------4/spalue.1114/a>4spal class="comment"> * dcntr -. ..  Current 16-bit downcounter  >
ue.4/spalue.1124/a>4spal class="comment"> * 3. ..                When downcounter reaches '0' watchdog expires.4/spalue.1134/a>4spal class="comment"> *                      Reading this register resets downcounter with4/spalue.1144/a>4spal class="comment"> *                      'limit'  >
ue.4/spalue.1154/a>4spal class="comment"> * limit -. ..  16-bit countdown  >
   in 1/10th second increments.4/spalue.1164/a>4spal class="comment"> * 3. ..                Writing this register begins countdown with input  >
ue.4/spalue.1174/a>4spal class="comment"> *                      Reading from this register does not affect counter.4/spalue.1184/a>4spal class="comment"> * NOTES:       After watchdog reset, dcntr and limit contain '1'4/spalue.1194/a>4spal class="comment"> *4/spalue.12ptia>4spal class="comment"> * status register (byte access):4/spalue.1214/a>4spal class="comment"> * ---------------------------4/spalue.1224/a>4spal class="comment"> * | 7 | ... | 2 |  1  |  0  |4/spalue.1234/a>4spal class="comment"> * --------------+------------4/spalue.1244/a>4spal class="comment"> * |-   UNUSED  -| EXP | RUN |4/spalue.1254/a>4spal class="comment"> * ---------------------------4/spalue.1264/a>4spal class="comment"> * status-. ..  Bit 0 -.Watchdog is running4/spalue.1274/a>4spal class="comment"> *                      Bit 1 -.Watchdog has expired4/spalue.1284/a>4spal class="comment"> *4/spalue.1294/a>4spal class="comment"> *** PLD register block defini5"
	 (struct.wd_pld_regblk)4/spalue.13ptia>4spal class="comment"> *4/spalue.1314/a>4spal class="comment"> * intr_mask register (byte access):4/spalue.1324/a>4spal class="comment"> * ---------------------------------4/spalue.1334/a>4spal class="comment"> * | 7 | ... | 3 |  2  |  1  |  0  |4/spalue.1344/a>4spal class="comment"> * +-------------+------------------4/spalue.1354/a>4spal class="comment"> * |-   UNUSED  -| WD3 | WD2 | WD1 |4/spalue.1364/a>4spal class="comment"> * ---------------------------------4/spalue.1374/a>4spal class="comment"> * WD3 -  1 == Interrupt disabled for watchdog 34/spalue.1384/a>4spal class="comment"> * WD2 -  1 == Interrupt disabled for watchdog 24/spalue.1394/a>4spal class="comment"> * WD1 -  1 == Interrupt disabled for watchdog 14/spalue.14ptia>4spal class="comment"> *4/spalue.1414/a>4spal class="comment"> * pld_status register (byte access):4/spalue.1424/a>4spal class="comment"> * UNKNOWN, MAGICAL MYSTERY REGISTER4/spalue.1434/a>4spal class="comment"> *4/spalue.1444/a>4spal class="comment"> */4/spalue.1454/a>#define.4a href="+code=WD_TIMER_REGSZ" class="sref">WD_TIMER_REGSZ4/a> 316e.1464/a>#define.4a href="+code=WD0_OFF" class="sref">WD0_OFF4/a> 3. ..   0e.1474/a>#define.4a href="+code=WD1_OFF" class="sref">WD1_OFF4/a> 3. ..   (4a href="+code=WD_TIMER_REGSZ" class="sref">WD_TIMER_REGSZ4/a> * 1)e.1484/a>#define.4a href="+code=WD2_OFF" class="sref">WD2_OFF4/a> 3. ..   (4a href="+code=WD_TIMER_REGSZ" class="sref">WD_TIMER_REGSZ4/a> * 2)e.1494/a>#define.4a href="+code=PLD_OFF" class="sref">PLD_OFF4/a> 3. ..   (4a href="+code=WD_TIMER_REGSZ" class="sref">WD_TIMER_REGSZ4/a> * 3)e.1504/a>e.1514/a>#define.4a href="+code=WD_DCNTR" class="sref">WD_DCNTR4/a> 3. ..  0x00e.1524/a>#define.4a href="+code=WD_LIMIT" class="sref">WD_LIMIT4/a> 3. .. .0x04e.1534/a>#define.4a href="+code=WD_STATUS" class="sref">WD_STATUS4/a> 3. .. 0x08e.1544/a>e.1554/a>#define.4a href="+code=PLD_IMASK" class="sref">PLD_IMASK4/a> 3. .. (4a href="+code=PLD_OFF" class="sref">PLD_OFF4/a> + 0x00)e.1564/a>#define.4a href="+code=PLD_STATUS" class="sref">PLD_STATUS4/a> 3. ..(4a href="+code=PLD_OFF" class="sref">PLD_OFF4/a> + 0x04)e.1574/a>e.1584/a>static.struct.4a href="+code=timer_list" class="sref">timer_list4/a> 4a href="+code=cpwd_timer" class="sref">cpwd_timer4/a>;e.1594/a>e.1604/a>static.int.4a href="+code=wd0_timeout" class="sref">wd0_timeout4/a>;e.1614/a>static.int.4a href="+code=wd1_timeout" class="sref">wd1_timeout4/a>;e.1624/a>static.int.4a href="+code=wd2_timeout" class="sref">wd2_timeout4/a>;e.1634/a>e.1644/a>4a href="+code=module_param" class="sref">module_param4/a>(4a href="+code=wd0_timeout" class="sref">wd0_timeout4/a>,.int, 0);e.1654/a>4a href="+code=MODULE_PARM_DESC" class="sref">MODULE_PARM_DESC4/a>(4a href="+code=wd0_timeout" class="sref">wd0_timeout4/a>,.4spal class="string">"Default watchdog0 timeout in 1/10secs"4/spalu);e.1664/a>4a href="+code=module_param" class="sref">module_param4/a>(4a href="+code=wd1_timeout" class="sref">wd1_timeout4/a>,.int, 0);e.1674/a>4a href="+code=MODULE_PARM_DESC" class="sref">MODULE_PARM_DESC4/a>(4a href="+code=wd1_timeout" class="sref">wd1_timeout4/a>,.4spal class="string">"Default watchdog1 timeout in 1/10secs"4/spalu);e.1684/a>4a href="+code=module_param" class="sref">module_param4/a>(4a href="+code=wd2_timeout" class="sref">wd2_timeout4/a>,.int, 0);e.1694/a>4a href="+code=MODULE_PARM_DESC" class="sref">MODULE_PARM_DESC4/a>(4a href="+code=wd2_timeout" class="sref">wd2_timeout4/a>,.4spal class="string">"Default watchdog2 timeout in 1/10secs"4/spalu);e.1704/a>e.1714/a>4a href="+code=MODULE_AUTHOR" class="sref">MODULE_AUTHOR4/a>(4spal class="string">"Eric Brower <ebrower@usa.net>"4/spalu);e.1724/a>4a href="+code=MODULE_DESCRIPTION" class="sref">MODULE_DESCRIPTION4/a>(4spal class="string">"Hardware watchdog driver for Sun Microsystems CP1400/1500"4/spalu);e.1734/a>4a href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSE4/a>(4spal class="string">"GPL"4/spalu);e.1744/a>4a href="+code=MODULE_SUPPORTED_DEVICE" class="sref">MODULE_SUPPORTED_DEVICE4/a>(4spal class="string">"watchdog"4/spalu);e.1754/a>e.1764/a>static.void.4a href="+code=cpwd_writew" class="sref">cpwd_writew4/a>(4a href="+code=u16" class="sref">u164/a> 4a href="+code=val" class="sref">val4/a>,.void.4a href="+code=__iomem" class="sref">__iomem4/a> *4a href="+code=addr" class="sref">addr4/a>)e.1774/a>{e.1784/a> 3. ..  4a href="+code=writew" class="sref">writew4/a>(4a href="+code=cpu_to_le16" class="sref">cpu_to_le164/a>(4a href="+code=val" class="sref">val4/a>), 4a href="+code=addr" class="sref">addr4/a>);e.1794/a>}e.1804/a>static.4a href="+code=u16" class="sref">u164/a> 4a href="+code=cpwd_readw" class="sref">cpwd_readw4/a>(void.4a href="+code=__iomem" class="sref">__iomem4/a> *4a href="+code=addr" class="sref">addr4/a>)e.1814/a>{e.1824/a> 3. ..  4a href="+code=u16" class="sref">u164/a> 4a href="+code=val" class="sref">val4/a> = 4a href="+code=readw" class="sref">readw4/a>(4a href="+code=addr" class="sref">addr4/a>);e.1834/a>e.1844/a> 3. ..  return 4a href="+code=le16_to_cpu" class="sref">le16_to_cpu4/a>(4a href="+code=val" class="sref">val4/a>);e.1854/a>}e.1864/a>e.1874/a>static.void.4a href="+code=cpwd_writeb" class="sref">cpwd_writeb4/a>(4a href="+code=u8" class="sref">u84/a> 4a href="+code=val" class="sref">val4/a>,.void.4a href="+code=__iomem" class="sref">__iomem4/a> *4a href="+code=addr" class="sref">addr4/a>)e.1884/a>{e.1894/a> 3. ..  4a href="+code=writeb" class="sref">writeb4/a>(4a href="+code=val" class="sref">val4/a>,.4a href="+code=addr" class="sref">addr4/a>);e.1904/a>}e.1914/a>e.1924/a>static.4a href="+code=u8" class="sref">u84/a> 4a href="+code=cpwd_readb" class="sref">cpwd_readb4/a>(void.4a href="+code=__iomem" class="sref">__iomem4/a> *4a href="+code=addr" class="sref">addr4/a>)e.1934/a>{e.1944/a> 3. ..  return 4a href="+code=readb" class="sref">readb4/a>(4a href="+code=addr" class="sref">addr4/a>);e.1954/a>}e.1964/a>e.1974/a>4spal class="comment">/* Enable or disable watchdog interrupts4/spalue.1984/a>4spal class="comment"> * Because of the CP1400 defect this should only be4/spalue.1994/a>4spal class="comment"> * called during ini5"alza5"
	 or by.wd_[start|stop]timer()4/spalue.2004/a>4spal class="comment"> *4/spalue.2014/a>4spal class="comment"> * index 3. ..  - sub-device index, or -1 for 'all'4/spalue.2024/a>4spal class="comment"> * enable3. ..  - non-zero to enable3interrupts, zero to disable4/spalue.2034/a>4spal class="comment"> */4/spalue.2044/a>static.void.4a href="+code=cpwd_toggleintr" class="sref">cpwd_toggleintr4/a>(struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" class="sref">p4/a>,.int 4a href="+code=index" class="sref">index4/a>,.int 4a href="+code=enable" class="sref">enable4/a>)e.2054/a>{e.2064/a> 3. ..  unsigned char.4a href="+code=curregs" class="sref">curregs4/a> = 4a href="+code=cpwd_readb" class="sref">cpwd_readb4/a>(4a href="+code=p" class="sref">p4/a>->4a href="+code=regs" class="sref">regs4/a> +.4a href="+code=PLD_IMASK" class="sref">PLD_IMASK4/a>);e.2074/a> 3. ..  unsigned char.4a href="+code=setregs" class="sref">setregs4/a> =e.2084/a> 3. ..          (4a href="+code=index" class="sref">index4/a> == -1) ?e.2094/a> 3. ..          (4a href="+code=WD0_INTR_MASK" class="sref">WD0_INTR_MASK4/a> |.4a href="+code=WD1_INTR_MASK" class="sref">WD1_INTR_MASK4/a> |.4a href="+code=WD2_INTR_MASK" class="sref">WD2_INTR_MASK4/a>) :e.2104/a> 3. ..          (4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=intr_mask" class="sref">intr_mask4/a>);e.2114/a>e.2124/a> 3. ..  if (4a href="+code=enable" class="sref">enable4/a> == 4a href="+code=WD_INTR_ON" class="sref">WD_INTR_ON4/a>)e.2134/a> 3. ..          4a href="+code=curregs" class="sref">curregs4/a> &= ~4a href="+code=setregs" class="sref">setregs4/a>;e.2144/a> 3. ..  elsee.2154/a> 3. ..          4a href="+code=curregs" class="sref">curregs4/a> |= 4a href="+code=setregs" class="sref">setregs4/a>;e.2164/a>e.2174/a> 3. ..  4a href="+code=cpwd_writeb" class="sref">cpwd_writeb4/a>(4a href="+code=curregs" class="sref">curregs4/a>,.4a href="+code=p" class="sref">p4/a>->4a href="+code=regs" class="sref">regs4/a> +.4a href="+code=PLD_IMASK" class="sref">PLD_IMASK4/a>);e.2184/a>}e.2194/a>e.22ptia>4spal class="comment">/* Restarts timer with maximum limit  >
   and4/spalue.2214/a>4spal class="comment"> * does not unset 'brokenstop'  >
ue.4/spalue.2224/a>4spal class="comment"> */4/spalue.2234/a>static.void.4a href="+code=cpwd_resetbrokentimer" class="sref">cpwd_resetbrokentimer4/a>(struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" class="sref">p4/a>,.int 4a href="+code=index" class="sref">index4/a>)e.2244/a>{e.2254/a> 3. ..  4a href="+code=cpwd_toggleintr" class="sref">cpwd_toggleintr4/a>(4a href="+code=p" class="sref">p4/a>,.4a href="+code=index" class="sref">index4/a>,.4a href="+code=WD_INTR_ON" class="sref">WD_INTR_ON4/a>);e.2264/a> 3. ..  4a href="+code=cpwd_writew" class="sref">cpwd_writew4/a>(4a href="+code=WD_BLIMIT" class="sref">WD_BLIMIT4/a>,.4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=regs" class="sref">regs4/a> +.4a href="+code=WD_LIMIT" class="sref">WD_LIMIT4/a>);e.2274/a>}e.2284/a>e.2294/a>4spal class="comment">/* Timer method called to reset stopped watchdogs--4/spalue.23ptia>4spal class="comment"> * because of the PLD bug on CP1400, we cannot mask4/spalue.2314/a>4spal class="comment"> * interrupts within the PLD so me must continually4/spalue.2324/a>4spal class="comment"> * reset the timers ad infini5um.4/spalue.2334/a>4spal class="comment"> */4/spalue.2344/a>static.void.4a href="+code=cpwd_brokentimer" class="sref">cpwd_brokentimer4/a>(unsigned long 4a href="+code=data" class="sref">data4/a>)e.2354/a>{e.2364/a> 3. ..  struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" class="sref">p4/a> = (struct.4a href="+code=cpwd" class="sref">cpwd4/a> *) 4a href="+code=data" class="sref">data4/a>;e.2374/a> 3. ..  int 4a href="+code=id" class="sref">id4/a>,.4a href="+code=tripped" class="sref">tripped4/a> = 0;e.2384/a>e.2394/a> 3. ..  4spal class="comment">/* kill a running timer instance,.in case we4/spalue.24ptia>4spal class="comment">         * were called directly instead of by kernel timer4/spalue.2414/a>4spal class="comment">         */4/spalue.2424/a> 3. ..  if (4a href="+code=timer_pending" class="sref">timer_pending4/a>(&4a href="+code=cpwd_timer" class="sref">cpwd_timer4/a>))e.2434/a> 3. ..          4a href="+code=del_timer" class="sref">del_timer4/a>(&4a href="+code=cpwd_timer" class="sref">cpwd_timer4/a>);e.2444/a>e.2454/a> 3. ..  for (4a href="+code=id" class="sref">id4/a> = 0; 4a href="+code=id" class="sref">id4/a> <.4a href="+code=WD_NUMDEVS" class="sref">WD_NUMDEVS4/a>; 4a href="+code=id" class="sref">id4/a>++).{e.2464/a> 3. ..          if (4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=id" class="sref">id4/a>].4a href="+code=runstatus" class="sref">runstatus4/a> &.4a href="+code=WD_STAT_BSTOP" class="sref">WD_STAT_BSTOP4/a>).{e.2474/a> 3. ..                  ++4a href="+code=tripped" class="sref">tripped4/a>;e.2484/a> 3. ..                  4a href="+code=cpwd_resetbrokentimer" class="sref">cpwd_resetbrokentimer4/a>(4a href="+code=p" class="sref">p4/a>,.4a href="+code=id" class="sref">id4/a>);e.2494/a> 3. ..          }e.2504/a> 3. ..  }e.2514/a>e.2524/a> 3. ..  if (4a href="+code=tripped" class="sref">tripped4/a>).{e.2534/a> 3. ..          4spal class="comment">/* there is at least one timer brokenstopped-- reschedule */4/spalue.2544/a> 3. ..          4a href="+code=cpwd_timer" class="sref">cpwd_timer4/a>.4a href="+code=expires" class="sref">expires4/a> = 4a href="+code=WD_BTIMEOUT" class="sref">WD_BTIMEOUT4/a>;e.2554/a> 3. ..          4a href="+code=add_timer" class="sref">add_timer4/a>(&4a href="+code=cpwd_timer" class="sref">cpwd_timer4/a>);e.2564/a> 3. ..  }e.2574/a>}e.2584/a>e.2594/a>4spal class="comment">/* Reset countdown timer with 'limit'  >
ue and continue countdown.4/spalue.26ptia>4spal class="comment"> * This will not start a stopped timer.4/spalue.2614/a>4spal class="comment"> */4/spalue.2624/a>static.void.4a href="+code=cpwd_pingtimer" class="sref">cpwd_pingtimer4/a>(struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" class="sref">p4/a>,.int 4a href="+code=index" class="sref">index4/a>)e.2634/a>{e.2644/a> 3. ..  if (4a href="+code=cpwd_readb" class="sref">cpwd_readb4/a>(4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=regs" class="sref">regs4/a> +.4a href="+code=WD_STATUS" class="sref">WD_STATUS4/a>) &.4a href="+code=WD_S_RUNNING" class="sref">WD_S_RUNNING4/a>)e.2654/a> 3. ..          4a href="+code=cpwd_readw" class="sref">cpwd_readw4/a>(4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=regs" class="sref">regs4/a> +.4a href="+code=WD_DCNTR" class="sref">WD_DCNTR4/a>);e.2664/a>}e.2674/a>e.2684/a>4spal class="comment">/* Stop a running watchdog timer-- the timer actually keeps4/spalue.2694/a>4spal class="comment"> * running, but the interrupt is masked so that no act"
	 is4/spalue.27ptia>4spal class="comment"> * taken up
	 expira5"
	.4/spalue.2714/a>4spal class="comment"> */4/spalue.2724/a>static.void.4a href="+code=cpwd_stoptimer" class="sref">cpwd_stoptimer4/a>(struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" class="sref">p4/a>,.int 4a href="+code=index" class="sref">index4/a>)e.2734/a>{e.2744/a> 3. ..  if (4a href="+code=cpwd_readb" class="sref">cpwd_readb4/a>(4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=regs" class="sref">regs4/a> +.4a href="+code=WD_STATUS" class="sref">WD_STATUS4/a>) &.4a href="+code=WD_S_RUNNING" class="sref">WD_S_RUNNING4/a>).{e.2754/a> 3. ..          4a href="+code=cpwd_toggleintr" class="sref">cpwd_toggleintr4/a>(4a href="+code=p" class="sref">p4/a>,.4a href="+code=index" class="sref">index4/a>,.4a href="+code=WD_INTR_OFF" class="sref">WD_INTR_OFF4/a>);e.2764/a>e.2774/a> 3. ..          if (4a href="+code=p" class="sref">p4/a>->4a href="+code=broken" class="sref">broken4/a>).{e.2784/a> 3. ..                  4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=runstatus" class="sref">runstatus4/a> |= 4a href="+code=WD_STAT_BSTOP" class="sref">WD_STAT_BSTOP4/a>;e.2794/a> 3. ..                  4a href="+code=cpwd_brokentimer" class="sref">cpwd_brokentimer4/a>((unsigned long) 4a href="+code=p" class="sref">p4/a>);e.2804/a> 3. ..          }e.2814/a>        }e.2824/a>}e.2834/a>e.2844/a>4spal class="comment">/* Start a watchdog timer with the specified limit  >
  4/spalue.2854/a>4spal class="comment"> * If the watchdog is running, it will be restarted with4/spalue.2864/a>4spal class="comment"> * the provided limit  >
  .4/spalue.2874/a>4spal class="comment"> *4/spalue.2884/a>4spal class="comment"> * This funct"
	 will enable3interrupts on the specified4/spalue.2894/a>4spal class="comment"> * watchdog.4/spalue.29ptia>4spal class="comment"> */4/spalue.2914/a>static.void.4a href="+code=cpwd_starttimer" class="sref">cpwd_starttimer4/a>(struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" class="sref">p4/a>,.int 4a href="+code=index" class="sref">index4/a>)e.2924/a>{e.2934/a> 3. ..  if (4a href="+code=p" class="sref">p4/a>->4a href="+code=broken" class="sref">broken4/a>)e.2944/a> 3. ..          4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=runstatus" class="sref">runstatus4/a> &= ~4a href="+code=WD_STAT_BSTOP" class="sref">WD_STAT_BSTOP4/a>;e.2954/a>e.2964/a> 3. ..  4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=runstatus" class="sref">runstatus4/a> &= ~4a href="+code=WD_STAT_SVCD" class="sref">WD_STAT_SVCD4/a>;e.2974/a>e.2984/a> 3. ..  4a href="+code=cpwd_writew" class="sref">cpwd_writew4/a>(4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=timeout" class="sref">timeout4/a>,.4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=regs" class="sref">regs4/a> +.4a href="+code=WD_LIMIT" class="sref">WD_LIMIT4/a>);e.2994/a> 3. ..  4a href="+code=cpwd_toggleintr" class="sref">cpwd_toggleintr4/a>(4a href="+code=p" class="sref">p4/a>,.4a href="+code=index" class="sref">index4/a>,.4a href="+code=WD_INTR_ON" class="sref">WD_INTR_ON4/a>);e.3004/a>}e.3014/a>e.3024/a>static.int.4a href="+code=cpwd_getstatus" class="sref">cpwd_getstatus4/a>(struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" class="sref">p4/a>,.int 4a href="+code=index" class="sref">index4/a>)e.3034/a>{e.3044/a> 3. ..  unsigned char.4a href="+code=stat" class="sref">stat4/a> = 4a href="+code=cpwd_readb" class="sref">cpwd_readb4/a>(4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=regs" class="sref">regs4/a> +.4a href="+code=WD_STATUS" class="sref">WD_STATUS4/a>);e.3054/a> 3. ..  unsigned char.4a href="+code=intr" class="sref">intr4/a> = 4a href="+code=cpwd_readb" class="sref">cpwd_readb4/a>(4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=regs" class="sref">regs4/a> +.4a href="+code=PLD_IMASK" class="sref">PLD_IMASK4/a>);e.3064/a> 3. ..  unsigned char.4a href="+code=ret" class="sref">ret4/a> 3= 4a href="+code=WD_STOPPED" class="sref">WD_STOPPED4/a>;e.3074/a>e.3084/a> 3. ..  4spal class="comment">/* determine STOPPED */4/spalue.3094/a> 3. ..  if (!4a href="+code=stat" class="sref">stat4/a>)e.3104/a> 3. ..          return 4a href="+code=ret" class="sref">ret4/a>;e.3114/a>e.3124/a> 3. ..  4spal class="comment">/* determine EXPIRED vs FREERUN vs RUNNING */4/spalue.3134/a> 3. ..  else if (4a href="+code=WD_S_EXPIRED" class="sref">WD_S_EXPIRED4/a> &.4a href="+code=stat" class="sref">stat4/a>).{e.3144/a> 3. ..          4a href="+code=ret" class="sref">ret4/a> = 4a href="+code=WD_EXPIRED" class="sref">WD_EXPIRED4/a>;e.3154/a> 3. ..  } else if (4a href="+code=WD_S_RUNNING" class="sref">WD_S_RUNNING4/a> &.4a href="+code=stat" class="sref">stat4/a>).{e.3164/a> 3. ..          if (4a href="+code=intr" class="sref">intr4/a> &.4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=intr_mask" class="sref">intr_mask4/a>).{e.3174/a> 3. ..                  4a href="+code=ret" class="sref">ret4/a> = 4a href="+code=WD_FREERUN" class="sref">WD_FREERUN4/a>;e.3184/a> 3. ..          } else {e.3194/a> 3. ..                  4spal class="comment">/* Fudge WD_EXPIRED status for defective CP1400--4/spalue.32ptia>4spal class="comment"> 3. ..                   * IF timer is running4/spalue.3214/a>4spal class="comment"> 3. ..                   *      AND brokenstop is set4/spalue.3224/a>4spal class="comment"> 3. ..                   *      AND al interrupt has been serviced4/spalue.3234/a>4spal class="comment"> 3. ..                   * we are WD_EXPIRED.4/spalue.3244/a>4spal class="comment"> 3. ..                   *4/spalue.3254/a>4spal class="comment"> 3. ..                   * IF timer is running4/spalue.3264/a>4spal class="comment"> 3. ..                   *      AND brokenstop is set4/spalue.3274/a>4spal class="comment"> 3. ..                   *      AND no interrupt has been serviced4/spalue.3284/a>4spal class="comment"> 3. ..                   * we are WD_FREERUN.4/spalue(struct.4a href="+coea>).{e 3. . FREERUN vs RUNNING */4/spalue.3111111111293">.2934/a> 3. ..  if (4a href="+code=p" class="sref">p4/a>->4a href="+code=broken" clclass=lass= vs RUNNING */4/spalue.31111111111111"sref">cpwd_readb4/a>(4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=runstatus" class="sref">runstatus4/a> &.4a href="+code=WD_STAT_BSTOP" class="sre="sref">intr_mask4/a>).{e.311111111111111111293">.2934/a> 3. ..  if (4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=runstatus" class="sref">runstatus4/a> &.4a href="+code=WD_STAT_SVCD" class="s="sref">intr_mask4/a>).{e.2555555555555555555555555544/a> 3. ..          4a href="+code=ret" class="sref">ret4/a> = 4a href="+code=WD_EXPIRED" class="sref">WD_EXPIRED4/a>;e.31111111111111111184/a> 3. ..          } else {e.275555555555555555555555554..                  4spaw39;  ld    well pde=emaximum limit  >
   and4/spalue.3264/a>4spal class="comment"> 3.                 ..       xpiresd . FREERUN vs RUNNING */4/spalue.3174/a> 3.55555555555555554..                  4a href="+code=ret" class="sref">ret4/a> = 4a href="+code=WD_FREERUN" class="sref">WD_FREERUN4/a>;e.2784/a> 3......... nam v3L300">.3004/a>}e.3194/a> 3.84/a> 3. ..          } else {e.3111111111555555554..                  4a href="+code=ret" class="sref">ret4/a>(4a href="+code=WD_S_RUNNG" class="s"sref">WD_FREERUN4/a>;e.3111111111 nam v3L300">.3004/a>}e.31 nam v3L300">.3004/a>}e.3004/a>}e.2444/a>e.3084/a> 3. ..  4spal class="coER">MO">/* determine STOPPED */4/spalue.2934/a> 3. ..  if (4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">devs4/a>[4a href="+code=index" class="sref">index4/a>].4a href="+code=runstatus" class="sref">runstatus4/a> &.4a href="+code=WD_STAT_SVCD" class="s=ine STOPPED */4/spalue.244..                  4a href="+code=ret" "sref">runstatus4/a> |ER">MO"f="+code=WD_STAT_SVER">MO"s="s"sref">WD_FREERUN4/a>;e.2584/a>e 3. ..          return 4a href="+code=ret" class="sref">ret4/a>;e.3004/a>}e.2514/a>e.1924/a>sirq04/a> _urn 4a href="+coirq04/a> _uine" ss="sref">intr4/a> =       * ref="+code=cpwd_read       * ass=" class="sref">p4/a>,rqrn 4a href="+coirqode=p"L291"lass="sref">cpwde=d_4/a>,.4a href="+ce=d_4/s="s=ine STOPPED */4/spalue.3034/a>{e.2364/a> 3. ..  struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" ass="sref">cpwde=d_4/a>,.4a href="+ce=d_4/s="s class="sref">ret4/a>;e.2954/a>e.3084/a> 3. ..  4spaO defWD0ent">        * -- ol cls     NMI'   wontimer AND brokenstop is set4/spalue.3274/a>4spal clas* see enam  cla....AND brokenstop is set4/spalue.3284/a>4spal clas/* determine STOPPED */4/spalue.2994/a> 3spin_lock_,rqrn 4a href="+cospin_lock_,rqass=""sref">add_timer4/a>  if (4a href="+code=p" class="sref">p4/alock if (4a href="+locklass="sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);e.2994/a> 3.void.4a href="+code=cpwd_stoptimer" class="sref">add_timer4/a>  if (4a href="+code=lass="sref">index4/0_I"f="+code=WD_STAT_0_I"lass="sref">PLD_IMASK4/a>);e.1824/a> 3  if (4a href="+code=p" class="sref">p4/a>->4a href="+code=devs" class="sref">dev4/0_I"f="+code=WD_STAT_0_I"lasslass="sref">index4/a>].4a href="+code=runstatus" class="sr">runstatus4/a> &.4a href="+code=WD_STAT_SVCD" class="s"sref">PLD_IMASK4/a>);e.2834/a>e.2994/a> 3spin_unlock_,rqrn 4a href="+cospin_unlock_,rqass=""sref">add_timer4/a>  if (4a href="+code=p" class="sref">p4/alock if (4a href="+locklass="sref">PLD_IMASK4/a>);e.2954/a>e 3. ..          rIRQ_HANDLO"f="+code=WD_STAIRQ_HANDLO"s="s"sref">PLD_IMASK4/a>);e.2574/a>}e.2584/a>e.3024/a>static.intopt;4a href="+code=c.intopt;ass="236">.2364/a> 3. ..  sin.  [4a href="+code=i.  wd" class="sref">cpwdin.  [4a href="+code=i.  wd" ,L236">.2364/a> 3. ..  sfi (4a href="+code=fi (wd" class="sref">cpwdf4a href="+code=fs="s=ine STOPPED */4/spalue.3034/a>{e.2364/a> 3. ..  struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" ass="sref">cpwdc.int* inde4a href="+code=c.int* indes="s"sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);e.2994/a> 3mutex_lock if (4a href="+mutex_lockass=""sref">add_timer4/a>c.intmutex4a href="+code=c.intmutexlass="sref">PLD_IMASK4/a>);e 3. ..         m=i.f (4a href="+codem=i.f"sref">add_timer4/a>in.  [4a href="+code=i.  wd" e="sref">intr_mask4/a>).{edev4/0_MINOa href="+code=WD_D0_MINOaine"">WD2_INTR_MASK4/a>) :edev4/1_MINOa href="+code=WD_D1_MINOaine"">WD2_INTR_MASK4/a>) :edev4/2_MINOa href="+code=WD_D2_MINOaine"">WD2_INTR_MASK4/a>) :e.27break"sref">PLD_IMASK4/a>);e.2194/a>eWD2_INTR_MASK4/a>) :e.31299">.2994/a> 3mutex_unlock if (4a href="+mutex_unlockass=""sref">add_timer4/a>c.intmutex4a href="+code=c.intmutexlass="sref">PLD_IMASK4/a>);e.3104/a> 3-">add_timer4/a>ENODEV4a href="+code=ENODEVs="s"sref">PLD_IMASK4/a>);e.3004/a>}e.2444/a>e.3084/a> 3. ..  4spaRegister IRQill firt">/pt;lled* indes/* determine STOPPED */4/spalue.3094/a> 3. ..   if (4a href="+code=p" class="sref">p4/aset ializ(4a href="+code=tset ializ(4s="s="sref">intr_mask4/a>).{e.2774/a> 3. ..        request_,rqrn 4a href="+corequest_,rq"sref">add_timer4/a>  if (4a href="+code=p" class="sref">p4/asrqrn 4a href="+coirqode=p""sref">add_timer4/a>c.int       * ref="+code=cpwd_read       * ass=,ref">intr_mask4/a>).{e.2784/a> 3.......... ..          rIRQF_SHAa href="+code=WD_EIRQF_SHAa hode=lass="sref">indexDRIVER_NAMEref="+code=WD_EDRIVER_NAMEode=lass="sref">indexlong) 4a href="+code=p="sref">intr_mask4/a>).{e.2794/a> 3. ..            pr_   ong) 4a href="+cr_   "sref"08">.3084/a>236ref=>"CD bug register IRQi%d\n" determss="sref">timeout4/a>,.4a href="+code=p" class="sref">p4/asrqrn 4a href="+coirqode=="sref">PLD_IMASK4/a>);e.3111111111299">.2994/a> 3mutex_unlock if (4a href="+mutex_unlockass=""sref">add_timer4/a>c.intmutex4a href="+code=c.intmutexlass="sref">PLD_IMASK4/a>);e.311111111104/a> 3-">add_timer4/a>EBUSY4a href="+code=EBUSYs="s"sref">PLD_IMASK4/a>);e.31 nam v3L300">.3004/a>}e.25.3094/a> 3. ..   if (4a href="+code=p" class="sref">p4/aset ializ(4a href="+code=tset ializ(4s="sp" ass="sref">cpwd36" [4a href="+code36" s="s"sref">PLD_IMASK4/a>);e.3004/a>}e.2954/a>e.2964/a> 3mutex_unlock if (4a href="+mutex_unlockass=""sref">add_timer4/a>c.intmutex4a href="+code=c.intmutexlass="sref">PLD_IMASK4/a>);e.2974/a>e 3. ..          rnonseekThistopt;4a href="+code=nonseekThistopt;"sref">add_timer4/a>in.  [4a href="+code=i.  wd" ss="sref">timeoutf4a href="+code=fs="s="sref">PLD_IMASK4/a>);e.3004/a>}ePLD_IMASK4/a>);e.3024/a>static.intremente4a href="+code=c.intrementeass="236">.2364/a> 3. ..  sin.  [4a href="+code=i.  wd" class="sref">cpwdin.  [4a href="+code=i.  wd" ,L236">.2364/a> 3. ..  sfi (4a href="+code=fi (wd" class="sref">cpwdfi (4a href="+code=fi (wd" =ine STOPPED */4/spalue.2924/a>{e 3"sref">tripped4/a> = 0;e.3004/a>}e.2954/a>e(unsigned_read octlref="+code=cpwd_read octlass="236">.2364/a> 3. ..  sfi (4a href="+code=fi (wd" class="sref">cpwdfi (4a href="+code=fi (wd" ,L306">.306L302">.3024/a>staticmct.4a href="+codemdwd" ,L306">.306entimer4/a>(unsignedarf="+code=timer_parfwd" =ine STOPPED */4/spalue.2924/a>{e.2364/a> 3. ..  sa>{ecpwdinfo="+code=timer_p  foine" ="sref">intr_mask4/a>).{e.27ass="sref">index claons="+code=timer_p claonsine" nam v3L279">.27sref">runstatus4/a>IOF_SET= 4a href="+code=WD_BTIMIOF_SET= 4a hrass=,ref">intr_mask4/a>).{e.31ass="sref">indexfirmware_k4/aaon4a href="+code=firmware_k4/aaonine" nam v3= 1,ref">intr_mask4/a>).{e.31ass="sref">index4dlassty="+code=timer_p dlasstyine" nam v3L310">.3sref">runstatus4/DRIVER_NAMEref="+code=WD_EDRIVER_NAMEode=lref">intr_mask4/a>).{etripped4/a> = 0;e.2914/a>static__usf="+code=cpwd_sto__usf=wd" class="sref">cpwdarf  if (4a href="+arf ine" ="(L291">.2914/a>static__usf="+code=cpwd_sto__usf=wd" cl)er4/a>(unsignedarf="+code=timer_parfwd" sref">tripped4/a> = 0;e.2364/a> 3. ..  sin.  [4a href="+code=i.  wd" class="sref">cpwdin.  [4a href="+code=i.  wd" 3sref">runstatus4/fi (4a href="+code=fi (wd" p" class="sref">p4/af_path4a href="+code=f_pathwd" ass="sref">indexdlasry="+code=timer_pdlasryode=p" class="sref">p4/a>_in.  [4a href="+code>_in.  wd" sref">tripped4/a> = 0;ep4/a>,.int 4a href="+code=index" c3sref">runstatus4/ m=i.f (4a href="+codem=i.f"sref">add_timer4/a>in.  [4a href="+code=i.  wd" e -mlass="sref">dev4/0_MINOa href="+code=WD_D0_MINOaine"sref">tripped4/a> = 0;e.2364/a> 3. ..  struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" ass="sref">cpwdc.int* inde4a href="+code=c.int* indes="s"sref">PLD_IMASK4/a>);e.2374/a> 3. ..se" cl4a href="+code=se" clode=p" "sref">tripped4/a> = 0;e.2584/a>e 3. ..        cmct.4a href="+codemdwd" ="sref">intr_mask4/a>).{e.3084/a> 3. ..  4spaGener v3Linux IOCTLss/* determine STOPPED */4/spaluedev4/IOC_GETSUPPORref="+code=WD_BTIMIOC_GETSUPPORrine"">WD2_INTR_MASK4/a>) :e.31274">.2744/a> 3. .. opy_to_usf="+code=cpwd_sto opy_to_usf="sref">add_timer4/a>arf  if (4a href="+arf ine"p""sref">add_timer4/a>info="+code=timer_p  foine",L2izeof"236">.2364/a> 3. ..  sa>{ecpwd_timer4/a>))e.255555555504/a> 3-">add_timer4/a>EFAULref="+code=WD_BTEFAULrs="s"sref">PLD_IMASK4/a>);e.31break"sref">PLD_IMASK4/a>);e.2954/a>edev4/IOC_GETS+.4a href="+code=WD_STIOC_GETS+.4a ine"">WD2_INTR_MASK4/a>) :edev4/IOC_GETBOOTS+.4a href="+code=WD_STIOC_GETBOOTS+.4a ine"">WD2_INTR_MASK4/a>) :e.27293">.2934/a> 3. .. ut_usf="+code=cpwd_sto ut_usf="sref0, " class="sref">p4/a>__usf="+code=cpwd_sto__usf=wd" cl)er4/a>(unsignedarf  if (4a href="+arf ine""sref">cpwd_timer4/a>))e.2794/a> 3.04/a> 3-">add_timer4/a>EFAULref="+code=WD_BTEFAULrs="s"sref">PLD_IMASK4/a>);e.31break"sref">PLD_IMASK4/a>);e.2514/a>edev4/IOC_KEEPALIVEhref="+code=WD_STIOC_KEEPALIVEine"">WD2_INTR_MASK4/a>) :e.25ass="sref">cpwdc.int.4a href="+code=cpwd_pingtimer" class="srefass="sref">cpwd4/a> *4a href="+code=p" class="sref">p4/a>,.4a href="+code=index" c="sref">PLD_IMASK4/a>);e.31break"sref">PLD_IMASK4/a>);e.2954/a>edev4/IOC_SETOPTION href="+code=WD_STIOC_SETOPTION ine"">WD2_INTR_MASK4/a>) :e.31274">.2744/a> 3. .. opy_from_usf="+code=cpwd_sto opy_from_usf=ass=""sref">add_timer4/a>se" cl4a href="+code=se" clode=p" class="sref">parf  if (4a href="+arf ine"p"2izeof"306">.306L30)"sref">cpwd_timer4/a>))e.2784/a> 3.04/a> 3-">add_timer4/a>EFAULref="+code=WD_BTEFAULrs="s"sref">PLD_IMASK4/a>);e.2194/a>e.31274">.2744/a> 3. ..se" cl4a href="+code=se" clode=p"sref">runstatus4/a> &aIOS_DISABLECARef="+code=WD_STAT_IOS_DISABLECARewd" ="sref">intr_mask4/a>).{e.3111111111293">.2934/a> 3. ..  if (4a href="+code=p" class="sref">p4/a* Thisct.4a href="+cod* Thiscwd" =ine STOPPED */4/spalue.31278">.2784/a> 3.04/a> 3-">add_timer4/a>EINVALef="+code=WD_BTEINVALs="s"sref">PLD_IMASK4/a>);e.2555555555ass="sref">cpwdc.int.4a href="+code=cpwd_stoptimer" class="sref">add_timer4/a>  if (4a href="+code=lass="sref">index4/a>,.4a href="+code=index" c="sref">PLD_IMASK4/a>);e.31315">.3154/a> 3. ..  } elsse" cl4a href="+code=se" clode=p"sref">runstatus4/a> &aIOS_ENABLECARef="+code=WD_STAT_IOS_ENABLECARewd" ="sref">intr_mask4/a>).{e.2555555555ass="sref">cpwdc.int.4a href="+code=cpwd_starttimer" class="sref"">add_timer4/a>  if (4a href="+code=lass="sref">index4/a>,.4a href="+code=index" c="sref">PLD_IMASK4/a>);e.3184/a> 3. ..          } else {e.2484/a> 3.04/a> 3-">add_timer4/a>EINVALef="+code=WD_BTEINVALs="s"sref">PLD_IMASK4/a>);e.318sref">PLD_IMASK4/a>);e.27break"sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);e.2844/a>4spalolaris-.28patihis IOCTLss/* determine STOPPED */4/spaluedev4IOCGS+.4f="+code=WD_STATIOCGS+.4ine"">WD2_INTR_MASK4/a>) :e.25ass="sref">cpwdse" cl4a href="+code=se" clode=p" ass="sref">cpwdc.int.4a href="+code=cpwd_getstatus" class="sref">add_timer4/a>  if (4a href="+code=lass="sref">index4/a>,.4a href="+code=index" c="sref">PLD_IMASK4/a>);e.31274">.2744/a> 3. .. opy_to_usf="+code=cpwd_sto opy_to_usf="sref">add_timer4/a>arf  if (4a href="+arf ine"p""sref">add_timer4/a>se" cl4a href="+code=se" clode=p"2izeof"306">.306L30)"sref">cpwd_timer4/a>))e.255555555504/a> 3-">add_timer4/a>EFAULref="+code=WD_BTEFAULrs="s"sref">PLD_IMASK4/a>);e.31break"sref">PLD_IMASK4/a>);e.2974/a>edev4IOCS+.Rref="+code=WD_BTIIOCS+.Rrine"">WD2_INTR_MASK4/a>) :e.27ass="sref">cpwdc.int.4a href="+code=cpwd_starttimer" class="sref"">add_timer4/a>  if (4a href="+code=lass="sref">index4/a>,.4a href="+code=index" c="sref">PLD_IMASK4/a>);e.31break"sref">PLD_IMASK4/a>);e.2514/a>edev4IOChref="+code=WD_STAT_IOChrefine"">WD2_INTR_MASK4/a>) :e.25293">.2934/a> 3. ..  if (4a href="+code=p" class="sref">p4/a* Thisct.4a href="+cod* Thiscwd" =ine STOPPED */4/spalue.315555555504/a> 3-">add_timer4/a>EINVALef="+code=WD_BTEINVALs="s"sref">PLD_IMASK4/a>);e.2954/a>e.31ass="sref">cpwdc.int.4a href="+code=cpwd_stoptimer" class="sref">add_timer4/a>  if (4a href="+code=lass="sref">index4/a>,.4a href="+code=index" c="sref">PLD_IMASK4/a>);e.24break"sref">PLD_IMASK4/a>);e.2584/a>eWD2_INTR_MASK4/a>) :e.3104/a> 3-">add_timer4/a>EINVALef="+code=WD_BTEINVALs="s"sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);ePLD_IMASK4/a>);e 3"sref">tripped4/a> = 0;e.3004/a>}e.2954/a>e(unsigned_read.28patd octlref="+code=cpwd_read.28patd octl"sref236">.2364/a> 3. ..  sfi (4a href="+code=fi (wd" class="sref">cpwdfi (4a href="+code=fi (wd" ,L306">.306L302">.3024/a>staticmct.4a href="+codemdwd" , nam v3L295">.2954/a>e.3174/a> 3.555555306">.306entimer4/a>(unsignedarf="+code=timer_parfwd" =ine STOPPED */4/spalue.3024/a>statirvalref="+code=cpwdrvalode=p" -">add_timer4/a>ENOIOCTLCMef="+code=WD_STAENOIOCTLCMes="s"sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);e 3. ..        cmct.4a href="+codemdwd" ="sref">intr_mask4/a>).{e.2844/a>4spasolaris  octls     specif v3to this mask4/s/* determine STOPPED */4/spaluedev4IOCS+.Rref="+code=WD_BTIIOCS+.Rrine"">WD2_INTR_MASK4/a>) :edev4IOCS+ef="+code=WD_STAT_IOChrefine"">WD2_INTR_MASK4/a>) :edev4IOCGS+.4f="+code=WD_STATIOCGS+.4ine"">WD2_INTR_MASK4/a>) :e.31ass="sref">cpwdmutex_lock if (4a href="+mutex_lockass=""sref">add_timer4/a>c.intmutex4a href="+code=c.intmutexlass="sref">PLD_IMASK4/a>);e.27">.3024/a>statirvalref="+code=cpwdrvalode=p" ">add_timer4/a>c.int octlref="+code=cpwd_read octlass="ass="sref">cpwdfi (4a href="+code=fi (wd" ,L">.3024/a>staticmct.4a href="+codemdwd" ,mer4/a>(unsignedarf="+code=timer_parfwd" ="sref">PLD_IMASK4/a>);e.27ass="sref">cpwdmutex_unlock if (4a href="+mutex_unlockass=""sref">add_timer4/a>c.intmutex4a href="+code=c.intmutexlass="sref">PLD_IMASK4/a>);e.27break"sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);e.2844/a>4spaeSK4ythitim5">.31s handisc by ena gener v3.28pat lay4/s/* determine STOPPED */4/spalueWD2_INTR_MASK4/a>) :e.25break"sref">PLD_IMASK4/a>);e.3004/a>}e.2954/a>e 3. ..          rrvalref="+code=cpwdrvalode="sref">PLD_IMASK4/a>);e.2574/a>}e.2584/a>eadd_timer4/a>s2ize_urn 4a href="+cos2ize_uine" ">add_timer4/a>c.intwrite4a href="+code=c.intwrite"sref236">.2364/a> 3. ..  sfi (4a href="+code=fi (wd" class="sref">cpwdfi (4a href="+code=fi (wd" ,LconstL4/a> 3. ..  unsigned__usf="+code=cpwd_sto__usf=wd" class="sref">cpwdbuf4a href="+code=bufwd" , nam v3L295">.2954/a>e.311111111155">add_timer4/a>size_urn 4a href="+cosize_uine" ">add_timer4/a>coun ref="+code=cpwd_oun wd" ,mer4/a>(unsignedloff_urn 4a href="+coloff_uwd" class="sref">cpwdppo="+code=cpwd_getppo=wd" =ine STOPPED */4/spalueintr_mask4/a>).{e.2364/a> 3. ..  sin.  [4a href="+code=i.  wd" class="sref">cpwdin.  [4a href="+code=i.  wd" 3sref">runstatus4/fi (4a href="+code=fi (wd" p" class="sref">p4/af_path4a href="+code=f_pathwd" ass="sref">indexdlasry="+code=timer_pdlasryode=p" class="sref">p4/a>_in.  [4a href="+code>_in.  wd" sref">tripped4/a> = 0;e.2364/a> 3. ..  struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" ass="sref">cpwdc.int* inde4a href="+code=c.int* indes="s"sref">PLD_IMASK4/a>);ep4/a>,.int 4a href="+code=index" c3sref">runstatus4/ m=i.f (4a href="+codem=i.f"sref">add_timer4/a>in.  [4a href="+code=i.  wd" e"sref">PLD_IMASK4/a>);e.2954/a>e.2934/a> 3. ..coun ref="+code=cpwd_oun wd" ="sref">intr_mask4/a>).{e.27">.3024/a>static.int.4a href="+code=cpwd_pingtimer" class="srefass="sref">cpwd4/a> *4a href="+code=p" class="sref">p4/a>,.4a href="+code=index" c="sref">PLD_IMASK4/a>);e.2704/a> 31"sref">PLD_IMASK4/a>);e.2574/a>}ePLD_IMASK4/a>);e 3"sref">tripped4/a> = 0;e.2574/a>}e.2834/a>eadd_timer4/a>s2ize_urn 4a href="+cos2ize_uine" ">add_timer4/a>c.intreact.4a href="+code=cptreac"sref236">.2364/a> 3. ..  sfi (4a href="+code=fi (wd" class="sref">cpwdfi (4a href="+code=fi (wd" ,Lc/a> 3. ..  unsigned__usf="+code=cpwd_sto__usf=wd" class="sref">cpwdbufff="+code=cpwd_stobufff=wd" , nam v3L295">.2954/a>e.25555555555">add_timer4/a>size_urn 4a href="+cosize_uine" ">add_timer4/a>coun ref="+code=cpwd_oun wd" ,mer4/a>(unsignedloff_urn 4a href="+coloff_uwd" class="sref">cpwdppo="+code=cpwd_getppo=wd" =ine STOPPED */4/spalueintr_mask4/a>).{e 3-">add_timer4/a>EINVALef="+code=WD_BTEINVALs="s"sref">PLD_IMASK4/a>);e.2574/a>}e.2194/a>e.2364/a> 3. ..  sfi (toptralaons="+code=timer_pfi (toptralaonsine" ">add_timer4/a>c.intfop="+code=cpwd_getstatufop=x" c3srsref">intr_mask4/a>).{eindex wnf="+code=cpwd_sto wnf=x" c3sr3">.25555555555">add_timer4/a>THIS_MODULEhref="+code=WD_THIS_MODULEwd" , nam v3L295">.2954/a>eindexunlockent octlref="+code=cpwdunlockent octlx" c3sr3">.25">add_timer4/a>c.int octlref="+code=cpwd_read octlass=, nam v3L295">.2954/a>eindex.28patd octlref="+code=cpwd_28patd octl"sre3sr3">.2555er4/a>(unsigned_read.28patd octlref="+code=cpwd_read.28patd octl"sre, nam v3L295">.2954/a>eindex ct;4a href="+code=opt;"sre3sr3">.255555555552">.3024/a>static.intopt;4a href="+code=c.intopt;ass=, nam v3L295">.2954/a>eindexwrite4a href="+code=write"sre3sr3">.25555555555">add_timer4/a>c.intwrite4a href="+code=c.intwrite"sre, nam v3L295">.2954/a>eindex4eact.4a href="+codreac"sre3sr3">.255555555552">.3024/a>static.intreact.4a href="+code=cptreac"sre, nam v3L295">.2954/a>eindex4emente4a href="+code=rementeass=3sr3">.255555555">.3024/a>static.intremente4a href="+code=c.intrementeass=, nam v3L295">.2954/a>eindexllseekrn 4a href="+collseek"sre3sr3">.2555555555ss="sref">indexno_llseekrn 4a href="+cono_llseekass=, nam v3L295">.2954/a>etripped4/a> = 0;ePLD_IMASK4/a>);e.3024/a>stati_t* inniurn 4a href="+co_t* inniuine" ">add_timer4/a>c.intprobe4a href="+code=c.intprobe"sref236">.2364/a> 3. ..  splatformt* inde4a href="+code=platformt* indewd" class="sref">cpwdo4/a> *4a href="+opwd" =ine STOPPED */4/spalue.2924/a>{e.2364/a> 3. ..  s* inde_n.  [4a href="+code> inde_n.  wd" class="sref">cpwdo4laons="+code=timer_p claonsine"sref">tripped4/a> = 0;e lass="sref">cpwd236tpro4/a> *4a href="+236tpro4ine"sref">tripped4/a> = 0;ecpwdpro4_valref="+code=cpwdpro4_valine"sref">tripped4/a> = 0;ep4/a>,.4a href="+code=wd" ,mer4/a>(unsigned   ong) 4a href="+   "srep" -">add_timer4/a>EINVALef="+code=WD_BTEINVALs="s"sref">PLD_IMASK4/a>);e.2364/a> 3. ..  struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code="sref">PLD_IMASK4/a>);e.2584/a>e.2934/a> 3. ..c.int* inde4a href="+code=c.int* indes="s=ine STOPPED */4/spalue.3104/a> 3-">add_timer4/a>EINVALef="+code=WD_BTEINVALs="s"sref">PLD_IMASK4/a>);e.2514/a>ecpwd4/a> *4a href="+code=p" ass="sref">cpwdkzalloc/a> *4a href="+kzalloc"sref2izeof"lass="sref">cpwd4/a> *4a href="+code=),mer4/a>(unsignedGFP_KERNELef="+code=WD_BTGFP_KERNELx" c="sref">PLD_IMASK4/a>);e.2994/a> 3   ong) 4a href="+   "srep" -">add_timer4/a>ENOMEMef="+code=WD_BTENOMEMs="s"sref">PLD_IMASK4/a>);e.3094/a> 3. ..   if (4a href="+code=="sref">intr_mask4/a>).{e.25ass="sref">cpwdpr_   ong) 4a href="+cr_   "sref"08">.3084/a>236ref=>"U This3to allocateL236">.2ef="\n" determ="sref">PLD_IMASK4/a>);e.31goto ass="sref">cpwdouurn 4a href="+coouus="s"sref">PLD_IMASK4/a>);e.2574/a>}e.2584/a>e.2994/a> 34/a>,.4a href="+code=p" class="sref">p4/asrqrn 4a href="+coirqode=p" ass="sref">cpwdo4/a> *4a href="+opwd" p" class="sref">p4/aare *4a href="+areindexirqs="+code=timer_pirqswd" [0]"sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);e.2994/a> 3spin_lock_,niurn 4a href="+cospin_lock_,niu"sref"sref">add_timer4/a>  if (4a href="+code=p" class="sref">p4/alock if (4a href="+locklass="sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);e.2994/a> 3  if (4a href="+code=p" class="sref">p4/areg href="+code=runseg ode=p" ass="sref">cpwdof_iorema4/a> *4a href="+of_iorema4"sref"sref">add_timer4/a>o4/a> *4a href="+opwd" p" class="sref">p4/aresourde4a href="+code=resourdewd" [0], 0, nam v3L295">.2954/a>e.3111111111111114 *">runstatus4/a> &a_= 4aR_REGSZ4a href="+code=&a_= 4aR_REGSZwd" ,mer4/a>(unsignedDRIVER_NAMEref="+code=WD_EDRIVER_NAMEode=="sref">PLD_IMASK4/a>);e.3094/a> 3. ..   if (4a href="+code=p" class="sref">p4/areg href="+code=runseg ode=="sref">intr_mask4/a>).{e.31ass="sref">cpwdpr_   ong) 4a href="+cr_   "sref"08">.3084/a>236ref=>"U This3to ma4 registers\n" determ="sref">PLD_IMASK4/a>);e.27goto ass="sref">cpwdouu_free4a href="+code=ouu_frees="s"sref">PLD_IMASK4/a>);e.2574/a>}e.2194/a>ecpwdo4laons="+code=timer_p claonsine"p" ass="sref">cpwdof_find_n.  _by_path4a href="+code=of_find_n.  _by_path"sref"08">.3084/a>236ref=>"/ claons" determ="sref">PLD_IMASK4/a>);e.2994/a> 3   ong) 4a href="+   "srep" -">add_timer4/a>ENODEV4a href="+code=ENODEVs="s"sref">PLD_IMASK4/a>);e.3094/a> 3. .. o4laons="+code=timer_p claonsine"="sref">intr_mask4/a>).{e.25ass="sref">cpwdpr_   ong) 4a href="+cr_   "sref"08">.3084/a>236ref=>"U This3to find / claons n.  \n" determ="sref">PLD_IMASK4/a>);e.31goto ass="sref">cpwdouu_iounma4/a> *4a href="+ouu_iounma4s="s"sref">PLD_IMASK4/a>);e.2574/a>}e.2574/a>}ecpwdpro4_valref="+code=cpwdpro4_valine"p" ass="sref">cpwdof_gettpro4erty="+code=timer_pof_gettpro4erty"sref"3094/a> 3. .. o4laons="+code=timer_p claonsine", "08">.3084/a>236ref=>"a>}etimeoutNULLef="+code=WD_BTNULLode=="sref">PLD_IMASK4/a>);ecpwdp if (4a href="+code=p" class="sref">p4/a* Thisct.4a href="+cod* Thiscwd"  ="(ass="sref">cpwdpro4_valref="+code=cpwdpro4_valine"p?Lass="sref">cpwd36" [4a href="+code36" s="s :2364/a> 3. ..  sfalte4a href="+code=falteode=="sref">PLD_IMASK4/a>);e.2194/a>ecpwdpro4_valref="+code=cpwdpro4_valine"p" ass="sref">cpwdof_gettpro4erty="+code=timer_pof_gettpro4erty"sref"3094/a> 3. .. o4laons="+code=timer_p claonsine", "08">.3084/a>236ref=>"a>}etimeoutNULLef="+code=WD_BTNULLode=="sref">PLD_IMASK4/a>);e.2994/a> 3  if (4a href="+code=p" class="sref">p4/areboothref="+code=runsebootwd"  ="(ass="sref">cpwdpro4_valref="+code=cpwdpro4_valine"p?Lass="sref">cpwd36" [4a href="+code36" s="s :2364/a> 3. ..  sfalte4a href="+code=falteode=="sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);e.2994/a> 3236tpro4/a> *4a href="+236tpro4ine"p" ass="sref">cpwdof_gettpro4erty="+code=timer_pof_gettpro4erty"sref"3094/a> 3. .. o4laons="+code=timer_p claonsine", "08">.3084/a>236ref=>"a>}etimeoutNULLef="+code=WD_BTNULLode=="sref">PLD_IMASK4/a>);e.2994/a> 3236tpro4/a> *4a href="+236tpro4ine"=ine STOPPED */4/spalue.25ass="sref">cpwdp if (4a href="+code=p" class="sref">p4/alassouu[4a href="+code3assouuine"p" ass="sref">cpwdsimple_236toulref="+code=cpwdsimple_236toul"sref"3094/a> 3. .. 236tpro4/a> *4a href="+236tpro4ine"ss="sref">timeoutNULLef="+code=WD_BTNULLode=, 10="sref">PLD_IMASK4/a>);e.2574/a>}e.2844/a>4spaCP1400s seem3to have broken PLD imple44/aalaons-- ena determine STOPPED */4/spalue.2844/a>4L253">.25*L cl   upt_mask register cD bug be written, so n. lass="setermine STOPPED */4/spalue.2844/a>4L253">.25*L cl   upts cD  be masked withit ena PLD."setermine STOPPED */4/spalue.2844/a>4L253">.25** determine STOPPED */4/spalue.2994/a> 3s36tpro4/a> *4a href="+236tpro4ine"p" ass="sref">cpwdof_gettpro4erty="+code=timer_pof_gettpro4erty"sref"3094/a> 3. .. o4/a> *4a href="+opwd" p" class="sref">p4/adev[4a href="+code> iwd" ass="sref">indexof_n.  [4a href="+codeof_n.  ine", "08">.3084/a>236ref=>"m.  l" determss="sref">timeoutNULLef="+code=WD_BTNULLode=="sref">PLD_IMASK4/a>);ecpwd4/a> *4a href="+code=p" class="sref">p4/abroken/a> *4a href="+brokenwd"  ="(ass="sref">cpwds36tpro4/a> *4a href="+236tpro4ine"p"sref"sref">.3094/a> 3. .. 236cm4/a> *4a href="+236cm4"sref"3094/a> 3. .. 236tpro4/a> *4a href="+236tpro4ine"ss="sref">timeoutWD_BADMODELef="+code=WD_BTWD_BADMODELode==="sref">PLD_IMASK4/a>);e.2834/a>e.3094/a> 3. ..   if (4a href="+code=p" class="sref">p4/a* Thisct.4a href="+cod* Thiscwd" =ine STOPPED */4/spalue.25ass="sref">cpwdc.inttoggle cl="+code=cpwd_pingtimetoggle cl="sref"3094/a> 3. .. 4/a> *4a href="+code=p"-1ss="sref">timeoutWD_INTR_OFFef="+code=WD_BTWD_INTR_OFFode=="sref">PLD_IMASK4/a>);e.2574/a>}ecpwd,.4a href="+code=wd" p" "sass="sref">p4/a>,.4a href="+code=wd"  <f">runstatus4/a> &a_NUMDEV href="+code=WD_ST_NUMDEV s="s"ass="sref">p4/a>,.4a href="+code=wd" ++="sref">intr_mask4/a>).{e.27 nam v3constL4/a> lass="sref">cpwdgtimev3L2="+code=cpwd_getstatuv3L2=wd" []3srs "08">.3084/a>236ref=>"RIC" determss=08">.3084/a>236ref=>"XIR" determss=08">.3084/a>236ref=>"POR" determL}sref">tripped4/a> = 0;e.27 nam v3L302lass="sref">cpwd4arm="+code=cpwd_getparm=wd" []3srs "sref">add_timer4/a>wd0_lassouu[4a href="+codewd0_lassouuode=pref">tripped4/a> = 0;e.31111111115555555555555555"sref">add_timer4/a>wd1_lassouu[4a href="+codewd1_lassouuode=pref">tripped4/a> = 0;e.31111111115555555555555555"sref">add_timer4/a>wd2_lassouu[4a href="+codewd2_lassouuode=L}sref">tripped4/a> = 0;e.27 n6">.2364/a> 3. ..  smisc* inde4a href="+code=misc* indeine" lass="sref">cpwdm4/a> *4a href="+m4ine"p" "sref">add_timer4/a>  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">indexmisc4a href="+code=miscs="s"sref">PLD_IMASK4/a>);e.2834/a>e.31ass="sref">cpwdm4/a> *4a href="+m4ine"p" class="sref">p4/am=i.f (4a href="+codm=i.f"srep" ass="sref">cpwd4/0_MINOa href="+code=WD_D0_MINOaine" +ass="sref">p4/a>,.4a href="+code=wd" "sref">PLD_IMASK4/a>);e.25ass="sref">cpwdm4/a> *4a href="+m4ine"p" class="sref">p4/av3L2/a> *4a href="+v3L2"srep" ass="sref">cpwdgtimev3L2="+code=cpwd_getstatuv3L2=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]"sref">PLD_IMASK4/a>);e.31ass="sref">cpwdm4/a> *4a href="+m4ine"p" class="sref">p4/afop="+code=cpwd_getfop=x" c3sr"sref">add_timer4/a>c.intfop="+code=cpwd_getstatufop=x" c"sref">PLD_IMASK4/a>);e.2974/a>e.27ass="sref">cpwd  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">indexreg href="+code=runseg ode=p" ass="sref">cpwd  if (4a href="+code=p" class="sref">p4/areg href="+code=runseg ode=p+"(ass="sref">cpwd,.4a href="+code=wd" p*">runstatus4/a> &a_= 4aR_REGSZ4a href="+code=&a_= 4aR_REGSZwd" ="sref">PLD_IMASK4/a>);e.27ass="sref">cpwd  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">index cl=_mask.4a href="+code=cl=_maskwd"  ="(ass="sref">cpwd_D0_INTR_MASK href="+code=WD_D0_INTR_MASKwd"  <f<f">runstatus4/a> ,.4a href="+code=wd" ="sref">PLD_IMASK4/a>);e.31ass="sref">cpwd  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">indexrun href="+code=cpwd_getrun href=ine"p"sref= ~>runstatus4/a> &a_S+.4_BS+ef="+code=WD_STAT_a_S+.4_BS+efx" c"sref">PLD_IMASK4/a>);e.31ass="sref">cpwd  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">indexrun href="+code=cpwd_getrun href=ine"p|" ass="sref">cpwd4/_S+.4_INIref="+code=WD_BTIM_S+.4_INIrx" c"sref">PLD_IMASK4/a>);e.27ass="sref">cpwd  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">indexlassouu[4a href="+code3assouuine"p" ass="sref">cpwdp if (4a href="+code=p" class="sref">p4/alassouu[4a href="+code3assouuine""sref">PLD_IMASK4/a>);e.25293"lass="sref">cpwd4arm="+code=cpwd_getparm=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]=ine STOPPED */4/spalue.3111111111ass="sref">cpwd  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">indexlassouu[4a href="+code3assouuine"p" lass="sref">cpwd4arm="+code=cpwd_getparm=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]"sref">PLD_IMASK4/a>);e.2954/a>e.31ass="sref">cpwd   ong) 4a href="+   "srep" ss="sref">indexmisc_register4a href="+code=misc_register"sref"sref">add_timer4/a>  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">indexmisc4a href="+code=miscs="s="sref">PLD_IMASK4/a>);e.27293"299">.2994/a> 3   ong) 4a href="+   "sre="sref">intr_mask4/a>).{e.2711111111ass="sref">cpwd r_   ong) 4a href="+cr_   "sref"08">.3084/a>236ref=>"Could bug register misc * indeLfor"* i %"\n" determpref">tripped4/a> = 0;e.2778">.2711111111ass="sref">cpwd,.4a href="+code=wd" ="sref">PLD_IMASK4/a>);e.3111111111goto ass="sref">cpwdouu_unregister4a href="+code=ouu_unregisterine""sref">PLD_IMASK4/a>);e.31 nam v3L257">.2574/a>}e.2574/a>}e.2834/a>e.2994/a> 34/a> *4a href="+code=p" class="sref">p4/abroken/a> *4a href="+brokenwd" ="sref">intr_mask4/a>).{e.25ss="sref">index cit_href="+code=cpwd_pin cit_href="sref"sref">add_timer4/a>gtimetref="+code=cpwd_pingtimehref="sre="sref">PLD_IMASK4/a>);e.31ass="sref">cpwdc.inttref="+code=cpwd_pingtimehref="sreass="sref">indexfunclaon"+code=cpwd_getfunclaonine" nam " ass="sref">cpwdgtimebrokentref="+code=cpwd_pingtimebrokentref=ine""sref">PLD_IMASK4/a>);e.27">.3024/a>static.inttref="+code=cpwd_pingtimehref="sreass="sref">indexaata/a> *4a href="+aatawd" L277">.27="(306">.306enti)1ass="sref">cpwd  if (4a href="+code="sref">PLD_IMASK4/a>);e.27ass="sref">cpwdc.inttref="+code=cpwd_pingtimehref="sreass="sref">indexexpir2="+code=cpwd_getexpir2=ine" nam v" ass="sref">cpwd4/_B= 4aOUref="+code=WD_BTIM_B= 4aOUrode="sref">PLD_IMASK4/a>);e.2194/a>e.31ass="sref">cpwd r_infoong) 4a href="+cr_info"sref"08">.3084/a>236ref=>"PLD defect workaround * ThiscLfor"m.  l %s\n" determpref">tripped4/a> = 0;e.3111111111ass="sref">cpwd4/_BADMODELef="+code=WD_BTWD_BADMODELode=="sref">PLD_IMASK4/a>);e.2574/a>}e.2834/a>ep4/a* i_set_drvaata/a> *4a href="+a i_set_drvaata"sref"sref">add_timer4/a>o4/a> *4a href="+opwd" p" class="sref">p4/adev[4a href="+code> iwd" ss="sref">timeout  if (4a href="+code=="sref">PLD_IMASK4/a>);ecpwdc.int* inde4a href="+code=c.int* indes="sp" ass="sref">cpwdp if (4a href="+code="sref">PLD_IMASK4/a>);ecpwd   ong) 4a href="+   "srep" "sref">tripped4/a> = 0;e.2974/a>ecpwdouu4a href="+code=ouuine"">WD2_INTR_MASK4/a>) :e 3. ..          r   ong) 4a href="+   "sresref">tripped4/a> = 0;ePLD_IMASK4/a>);ecpwdouu_unregister4a href="+code=ouu_unregisterine"">WD2_INTR_MASK4/a>) :ecpwd,.4a href="+code=wd" --sass="sref">p4/a>,.4a href="+code=wd"  & cl" "sass="sref">p4/a>,.4a href="+code=wd" --=ine STOPPED */4/spalue.25ss="sref">indexmisc_deregister4a href="+code=misc_deregister"sref"sref">add_timer4/a>  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">indexmisc4a href="+code=miscs="s="sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);ecpwdouu_iounma4/a> *4a href="+ouu_iounma4s="s">WD2_INTR_MASK4/a>) :ecpwdof_iounma4/a> *4a href="+of_iounma4s="sf"sref">add_timer4/a>o4/a> *4a href="+opwd" p" class="sref">p4/aresourde4a href="+code=resourdewd" [0], ass="sref">cpwd  if (4a href="+code=p" class="sref">p4/areg href="+code=runseg ode=,14 *">runstatus4/a> &a_= 4aR_REGSZ4a href="+code=&a_= 4aR_REGSZwd" ="sref">PLD_IMASK4/a>);e.2974/a>ecpwdouu_free4a href="+code=ouu_frees="s">WD2_INTR_MASK4/a>) :ecpwdkfree4a href="+code=kfrees="s"299">.2994/a> 34/a> *4a href="+code=="sref">PLD_IMASK4/a>);ecpwdouurn 4a href="+coouus="s"sref">PLD_IMASK4/a>);e.2574/a>}ePLD_IMASK4/a>);e.3024/a>stati_t* iexiurn 4a href="+co_t* iexiuine" ass="sref">cpwdc.intremove4a href="+code=c.intremoves="s"236">.2364/a> 3. ..  splatformt* inde4a href="+code=platformt* indewd" class="sref">cpwdo4/a> *4a href="+opwd" =ine STOPPED */4/spalueintr_mask4/a>).{e.2364/a> 3. ..  struct.4a href="+code=cpwd" class="sref">cpwd4/a> *4a href="+code=p" ass="sref">cpwda i_get_drvaata/a> *4a href="+a i_get_drvaata"sref"sref">add_timer4/a>o4/a> *4a href="+opwd" p" class="sref">p4/adev[4a href="+code> iwd" ="sref">PLD_IMASK4/a>);ep4/a>,.4a href="+code=wd" "sref">PLD_IMASK4/a>);e.2974/a>ecpwd,.4a href="+code=wd" p" "sass="sref">p4/a>,.4a href="+code=wd"  <f">runstatus4/a> &a_NUMDEV href="+code=WD_ST_NUMDEV s="s"ass="sref">p4/a>,.4a href="+code=wd" ++="sref">intr_mask4/a>).{e.27ass="sref">cpwdmisc_deregister4a href="+code=misc_deregister"sref"sref">add_timer4/a>  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">indexmisc4a href="+code=miscs="s="sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);e.31293">.3094/a> 3. ..   if (4a href="+code=p" class="sref">p4/a* Thisct.4a href="+cod* Thiscwd" ="sref">intr_mask4/a>).{e.27 nam v3Lass="sref">cpwdc.intst claef="+code=cpwd_pingtimest claef=s="s"299">.2994/a> 34/a> *4a href="+code=p" class="sref">p4.4a href="+code=wd" ="sref">PLD_IMASK4/a>);e.25310">.31293"">add_timer4/a>  if (4a href="+code=p" class="sref">p4/a* i="+code=cpwd_get* i=wd" [ss="sref">p4/a>,.4a href="+code=wd" ]ass="sref">indexrun href="+code=cpwd_getrun href=ine"p"sref ass="sref">cpwd4/_S+.4_BS+ef="+code=WD_STAT_a_S+.4_BS+efx" c=ine STOPPED */4/spalue.311111111111111v3Lass="sref">cpwdc.intresetbrokentref="+code=cpwd_pingtimeresetbrokentref=s="s"299">.2994/a> 34/a> *4a href="+code=p" class="sref">p4.4a href="+code=wd" ="sref">PLD_IMASK4/a>);e.25 nam v3L257">.2574/a>}e.2574/a>}e.2974/a>e.2994/a> 34/a> *4a href="+code=p" class="sref">p4/abroken/a> *4a href="+brokenwd" = nam v3L297">.2974/a>e.27ass="sref">cpwddelehref=_sync4a href="+code=delehref=_sync"sref"sref">add_timer4/a>gtimetref="+code=cpwd_pingtimehref="sre="sref">PLD_IMASK4/a>);ePLD_IMASK4/a>);e.2994/a> 34/a> *4a href="+code=p" class="sref">p4/a citializsct.4a href="+cod citializscwd" = nam v3L297">.2974/a>e.27ass="sref">cpwdfree_srqrn 4a href="+cofree_srqs="s"299">.2994/a> 34/a> *4a href="+code=p" class="sref">p4/asrqrn 4a href="+coirqode=ss="sref">timeout  if (4a href="+code=="sref">PLD_IMASK4/a>);e.2834/a>ep4/aof_iounma4/a> *4a href="+of_iounma4s="sf"sref">add_timer4/a>o4/a> *4a href="+opwd" p" class="sref">p4/aresourde4a href="+code=resourdewd" [0], ass="sref">cpwd  if (4a href="+code=p" class="sref">p4/areg href="+code=runseg ode=,14 *">runstatus4/a> &a_= 4aR_REGSZ4a href="+code=&a_= 4aR_REGSZwd" ="sref">PLD_IMASK4/a>);ecpwdkfree4a href="+code=kfrees="s"299">.2994/a> 34/a> *4a href="+code=="sref">PLD_IMASK4/a>);e.2574/a>}ecpwdc.int* inde4a href="+code=c.int* indes="sp" ass="sref">cpwdNULLef="+code=WD_BTNULLode="sref">PLD_IMASK4/a>);e.2584/a>e 3"sref">tripped4/a> = 0;e.2574/a>}e.2514/a>e.2364/a> 3. ..  sof_> inde_ict.4a href="+codof_> inde_icine" ass="sref">cpwdc.intma>e<4a href="+code=c.intma>eintr_mask4/a>).{eintr_mask4/a>).{e.31ass="sref">indexv3L2/a> *4a href="+v3L2"srep" a08">.3084/a>236ref=>"a>}etripped4/a> = 0;etripped4/a> = 0;etripped4/a> = 0;etripped4/a> = 0;ecpwdMODULE_DEVICE_TABLEhref="+code=WD_MODULE_DEVICE_TABLEs="s"299">.2994/a> 3oft.4a href="+codofode=ss="sref">timeoutc.intma>e<4a href="+code=c.intma>ePLD_IMASK4/a>);e.2194/a>e.2364/a> 3. ..  splatformt*">.214a href="+code=platformt*">.21ine" ass="sref">cpwdc.int*">.214a href="+code=c.int*">.21"srep" sref">intr_mask4/a>).{eindex*">.214a href="+code=*">.21"srep" sref">intr_mask4/a>).{e.27ass="sref">indexv3L2/a> *4a href="+v3L2"srep" as="sref">indexDRIVER_NAMEref="+code=WD_EDRIVER_NAMEode=pref">tripped4/a> = 0;e.25ass="sref">index wnf="+code=cpwd_sto wnf=x" c3srss="sref">indexTHIS_MODULEhref="+code=WD_THIS_MODULEwd" , nam v3L295">.2954/a>e.31ass="sref">indexof_ma>e<_tThist.4a href="+codof_ma>e<_tThisx" c3srss="sref">indexc.intma>e<4a href="+code=c.intma>e.2954/a>etripped4/a> = 0;eindexprobe4a href="+code=probe"sre3L314">.31srss="sref">indexc.intprobe4a href="+code=c.intprobe"srepref">tripped4/a> = 0;eindex4emove4a href="+code=removes="sL314">.31srss="sref">index_t* iexiu_4/a> *4a href="+_t* iexiu_4s="s"299">.2994/a> 3c.intremove4a href="+code=c.intremoves="s)pref">tripped4/a> = 0;etripped4/a> = 0;e.2194/a>eindexmodule_platformt*">.214a href="+code=module_platformt*">.21s="s"299">.2994/a> 3c.int*">.214a href="+code=c.int*">.21"sre="sref">PLD_IMASK4/a>);e


The original LXR software by ena ref">PLD_http://sourdeforge.net/projects/lxr4>LXR .284unity"sre, enis experi44/aal SK4/ion by ref">PLD_mailto:lxr@91"ux.no">lxr@91"ux.no"sre.
lxr.91"ux.no kindly hosted by ref">PLD_http://www.redpill-91"pro.no">Redpill L1"pro AS"sre, provider of L1"ux3consultref and o4eralaons serindes since 1995.