linux/drivers/pinctrl/pinctrl-mmp2.c
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v42lu8/spa>4. lu8/form4. lu8a v42lu href="../linux+v34.a1/drivers/pinctrl/pinctrl-mmp2.c"> v42lu8img src="../.static/gfx/right.png" alt=">>"> v8/spa>4. v8spa> class="lxr_search"> v42="+search" method="post" onsubmit="return do_search(this);"> v42lu8input typ hidden" nam navtarget" > "> v42lu8input typ text" nam search" id search"> v42lu8buttiontyp submit">Search4. v8spa> class="lxr_prefs"4. lu8a href="+prefs?return=drivers/pinctrl/pinctrl-mmp2.c" v42lu onclick="return ajax_prefs();"> v42luPrefs. lu8/a> v8/spa>4.42lu u8/div4.42lu u8form ac22.>="ajax+*" method="post" onsubmit="return false;"> v8input typ hidden" nam ajax_lookup" id ajax_lookup" > "> 42lu u8/form4. 42lu u8div class="headingbottim">. 8div id file_contents"4
u u18/a>8spa> class="comment">/*8/spa>4.u u28/a>8spa> class="comment"> *  linux/drivers/pinctrl/pinmux-mmp2.c8/spa>4.u u38/a>8spa> class="comment"> *8/spa>4.u u48/a>8spa> class="comment"> *  This program is free software; you ca> redistribute it and/or modify8/spa>4.u u58/a>8spa> class="comment"> *  it under the terms of the GNU General Public License verstion2 as8/spa>4.u u68/a>8spa> class="comment"> *  publishhed by the Free Software Founda22.>.8/spa>4.u u78/a>8spa> class="comment"> *8/spa>4.u u88/a>8spa> class="comment"> *  Copyright (C) 2011, Marvell Technology Group Ltd.8/spa>4.u u98/a>8spa> class="comment"> *8/spa>4.u 
2 va>8spa> class="comment"> *  Author: Haojia> Zhuang <haojia>.zhuang@marvell.com>8/spa>4.u 118/a>8spa> class="comment"> *8/spa>4.u 128/a>8spa> class="comment"> */8/spa>4.u 138/a>.u 148/a>#include <linux/device.h8/a>>.u 158/a>#include <linux/module.h8/a>>.u 168/a>#include <linux/io.h8/a>>.u 178/a>#include <linux/platform_device.h8/a>>.u 188/a>#include "pinctrl-pxa3xx.h8/a>".u 198/a>.u 22 va>#defineu8a href="+code=MMP2_DS_MASK" class="sref">MMP2_DS_MASK va>            0x1800.u 21 va>#defineu8a href="+code=MMP2_DS_SHIFT" class="sref">MMP2_DS_SHIFT va>           11.u 22 va>#defineu8a href="+code=MMP2_SLEEP_MASK" class="sref">MMP2_SLEEP_MASK va>         0x38.u 23 va>#defineu8a href="+code=MMP2_SLEEP_SELECT" class="sref">MMP2_SLEEP_SELECT va>       (1 << 9).u 24 va>#defineu8a href="+code=MMP2_SLEEP_DATA" class="sref">MMP2_SLEEP_DATA va>         (1 << 8).u 25 va>#defineu8a href="+code=MMP2_SLEEP_DIR" class="sref">MMP2_SLEEP_DIR va>          (1 << 7).u 268/a>.u 27 va>#defineu8a href="+code=MFPR_MMP2" class="sref">MFPR_MMP2 va>(8a href="+code=a" class="sref">a va>,u8a href="+code=r" class="sref">r va>,u8a href="+code=f0" class="sref">f0 va>,u8a href="+code=f1" class="sref">f1 va>,u8a href="+code=f2" class="sref">f2 va>,u8a href="+code=f3" class="sref">f3 va>,u8a href="+code=f4" class="sref">f4 va>,u8a href="+code=f5" class="sref">f5 va>,u8a href="+code=f6" class="sref">f6 va>,u8a href="+code=f7" class="sref">f7 va>)         \.u 28 va>        {                                                       \.u 29 va>                .8a href="+code=nam
" class="sref">nam
 va> = #a,                                     \.u 30 va>                .8a href="+code=pin" class="sref">pin va> = 8a href="+code=a" class="sref">a va>,u                                      \.u 31 va>                .8a href="+code=mfpr" class="sref">mfpr va> = 8a href="+code=r" class="sref">r va>,u                                     \.u 32 va>                .8a href="+code=func" class="sref">func va> = {                                       \.u 33 va>                        8a href="+code=MMP2_MUX_" class="sref">MMP2_MUX_ va>##f0,u                         \.u 34 va>                        8a href="+code=MMP2_MUX_" class="sref">MMP2_MUX_ va>##f1,u                         \.u 35 va>                        8a href="+code=MMP2_MUX_" class="sref">MMP2_MUX_ va>##f2,u                         \.u 36 va>                        8a href="+code=MMP2_MUX_" class="sref">MMP2_MUX_ va>##f3,u                         \.u 37 va>                        8a href="+code=MMP2_MUX_" class="sref">MMP2_MUX_ va>##f4,u                         \.u 38 va>                        8a href="+code=MMP2_MUX_" class="sref">MMP2_MUX_ va>##f5,u                         \.u 39 va>                        8a href="+code=MMP2_MUX_" class="sref">MMP2_MUX_ va>##f6,u                         \.u 40 va>                        8a href="+code=MMP2_MUX_" class="sref">MMP2_MUX_ va>##f7,u                         \.u 41 va>                },u                                             \.u 42 va>        }.u 438/a>.u 44 va>#defineu8a href="+code=GRP_MMP2" class="sref">GRP_MMP2 va>(8a href="+code=a" class="sref">a va>,u8a href="+code=m" class="sref">m va>,u8a href="+code=p" class="sref">p va>)               \.u 45 va>        { .8a href="+code=nam
" class="sref">nam
 va> = 8a href="+code=a" class="sref">a va>,u.8a href="+code=mux" class="sref">mux va> = 8a href="+code=="sref">MMP2_MUX_ va>##f7,u            m,u.8a href="+code=8a >
  
  u 268/a>.u u78/a>8spa/* 174 alu8> class="comment"> */8/spa>4.a va>/pi_="d_liajax href="+code=m/pi_="d_liaj
op2v{omment"> */8/spa>4.u u78/a>8spa/* 0~168: GPIO0~GPIO168> class="comment"> */8/spa>4.a vaTWSI4_SCLax href="+code=TWSI4_SCL
op2v4.169,omment"> */8/spa>4.a vaTWSI4_SDode=MMP2_SLEEP_DTWSI4_SDo=m" claam
  L7">u u78/a>8spa/* 170> class="comment"> */8/spa>4.a vaG_CLKREQef="+code=GRP_MM_CLKREQ=m" comment"> */8/spa>4.a vaVCXO_REQef="+code=GRP_MVCXO_REQ=m" comment"> */8/spa>4.a vaVCXO_OUe=MMP2_SLEEP_SELVCXO_OUe=m" comment"> */8/spa>4.".u 268/a>.a va>/pi_,u.8a href="+code=m/pi_,u.
op2v{omment"> */8/spa>4.u u78/a>8spa/* PXA3xxP2_MUGPIOv4.0 (prem
  L4d in x.h" class="fref)> class="comment"> */8/spa>4.a va">MMP2_MUGPIOf="+code=="sref">MMP2_MUGPIO
op2v4.0comment"> */8/spa>4.a va">MMP2_MUG_CLKREQef="+code=GRP_M">MMP2_MUG_CLKREQ=m" comment"> */8/spa>4.a va">MMP2_MUVCXO_REQef="+code=GRP_M">MMP2_MUVCXO_REQ=m" comment"> */8/spa>4.a va">MMP2_MUVCXO_OUe=MMP2_SLEEP_SEL">MMP2_MUVCXO_OUe=m" comment"> */8/spa>4.a va">MMP2_MUK2" ode=MMP2_SLEEP_MASK" 2_MUK2" o=m" comment"> */8/spa>4.a vaASK" 2_MUK2"Dode=MMP2_SLEEP_MASK" 2_MUK2"Do=m" comment"> */8/spa>4.a vaASK" 2_MUCCIC,u8a href="+codeASK" 2_MUCCIC,=m" comment"> */8/spa>4.a vaASK" 2_MUCCICef="+code=MFPR_MMSK" 2_MUCCICe=m" comment"> */8/spa>4.a vaASK" 2_MUSPIf="+code=MFPR_MMSK" 2_MUSPI=m" comment"> */8/spa>4.a vaASK" 2_MUSSPAef="+code=MFPR_MMSK" 2_MUSSPAe=m" comment"> */8/spa>4.a va">MMP2_MUROe=MMP2_SLEEP_SEL">MMP2_MUROe=m" comment"> */8/spa>4.a va">MMP2_MUI2S=MMP2_SLEEP_SEL">MMP2_MUI2S=m" comment"> */8/spa>4.a va">MMP2_MUTB=MMP2_SLEEP_SEL">MMP2_MUTB=m" comment"> */8/spa>4.a va">MMP2_MUCAMef="+code=MFPR_MMSK" 2_MUCAMe=m" comment"> */8/spa>4.a va">MMP2_MUHDMIf="+code=MFPR_MMSK" 2_MUHDMI=m" comment"> */8/spa>4.a vaASK" 2_MUTWSIef="+code=MFPR_MMSK" 2_MUTWSIe=m" comment"> */8/spa>4.a vaASK" 2_MUTWSI,u8a href="+codeASK" 2_MUTWSI,=m" comment"> */8/spa>4.a vaASK" 2_MUTWSI4u8a href="+codeASK" 2_MUTWSI4=m" comment"> */8/spa>4.a vaASK" 2_MUTWSI,u8a href="+codeASK" 2_MUTWSI,=m" comment"> */8/spa>4.a vaASK" 2_MUTWSI,u8a href="+codeASK" 2_MUTWSI,=m" comment"> */8/spa>4.a va">MMP2_MUUART,u8a href="+codeASK" 2_MUUART,=m" comment"> */8/spa>4.a va">MMP2_MUUARTef="+code=MFPR_MMSK" 2_MUUARTe=m" comment"> */8/spa>4.a va">MMP2_MUUART,u8a href="+codeASK" 2_MUUART,=m" comment"> */8/spa>4.a va">MMP2_MUUART4u8a href="+codeASK" 2_MUUART4=m" comment"> */8/spa>4.a va">MMP2_MUSSP1_RXf="+code=MFPR_MMSK" 2_MUSSP1_RX=m" comment"> */8/spa>4.a vaASK" 2_MUSSP1_FRMf="+code=MFPR_MMSK" 2_MUSSP1_FRM=m" comment"> */8/spa>4.a vaASK" 2_MUSSP1_TXRXf="+code=MFPR_MMSK" 2_MUSSP1_TXRX=m" comment"> */8/spa>4.a vaASK" 2_MUSSP2_RXf="+code=MFPR_MMSK" 2_MUSSP2_RX=m" comment"> */8/spa>4.a vaASK" 2_MUSSP2_FRMf="+code=MFPR_MMSK" 2_MUSSP2_FRM=m" comment"> */8/spa>4.a vaASK" 2_MUSSP,u8a href="+codeASK" 2_MUSSP,=m" comment"> */8/spa>4.a va">MMP2_MUSSP2f="+code=MFPR_MMSK" 2_MUSSP2=m" comment"> */8/spa>4.a va">MMP2_MUSSP,u8a href="+codeASK" 2_MUSSP,=m" comment"> */8/spa>4.a va">MMP2_MUSSP4u8a href="+codeASK" 2_MUSSP4=m" comment"> */8/spa>4.a va">MMP2_MUMMC,u8a href="+codeASK" 2_MUMMC,=m" comment"> */8/spa>4.a va">MMP2_MUMMC2f="+code=MFPR_MMSK" 2_MUMMC2=m" comment"> */8/spa>4.a vaASK" 2_MUMMC,u8a href="+codeASK" 2_MUMMC,=m" comment"> */8/spa>4.a vaASK" 2_MUMMC4u8a href="+codeASK" 2_MUMMC4=m" comment"> */8/spa>4.a vaASK" 2_MUULPIf="+code=MFPR_MMSK" 2_MUULPI=m" comment"> */8/spa>4.a vaASK" 2_MUACf="+code=MFPR_MMSK" 2_MUAC=m" comment"> */8/spa>4.a vaASK" 2_MUCode=MMP2_SLEEP_DATA" 2_MUCo=m" comment"> */8/spa>4.a va">MMP2_MUPWMf="+code=MFPR_MMSK" 2_MUPWM=m" comment"> */8/spa>4.a vaASK" 2_MUUSIMf="+code=MFPR_MMSK" 2_MUUSIM=m" comment"> */8/spa>4.a va">MMP2_MUTIPUu8a href="+codeASK" 2_MUTIPU=m" comment"> */8/spa>4.a va">MMP2_MUPLLax href="+code=">MMP2_MUPLL=m" comment"> */8/spa>4.a va">MMP2_MUNANDax href="+code=">MMP2_MUNAND=m" comment"> */8/spa>4.a vaASK" 2_MUFSICf="+code=MFPR_MMSK" 2_MUFSIC=m" comment"> */8/spa>4.a vaASK" 2_MUSlass=INDax href="+code=">MMP2_MUSlass=IND=m" comment"> */8/spa>4.a vaASK" 2_MUEXT_DMode=MMP2_SLEEP_DATA" 2_MUEXT_DMo=m" comment"> */8/spa>4.a vaASK" 2_MUONE_WIREcode[-v424.v4.4ASK" 2_MUONE_WIRE=m" comment"> */8/spa>4.a vaASK" 2_MULCDax href="+code=">MMP2_MULCD=m" comment"> */8/spa>4.a va">MMP2_MUSMCf="+code=MFPR_MMSK" 2_MUSMC=m" comment"> */8/spa>4.a va">MMP2_MUSMC=INe=MMP2_SLEEP_SEL">MMP2_MUSMC=INe=m" comment"> */8/spa>4.a va">MMP2_MUMSPu8a href="+codeASK" 2_MUMSP=m" comment"> */8/spa>4.a va">MMP2_MUG_CLKOUe=MMP2_SLEEP_SEL">MMP2_MUG_CLKOUe=m" comment"> */8/spa>4.a va">MMP2_MU32K_CLKOUe=MMP2_SLEEP_SEL">MMP2_MU32K_CLKOUe=m" comment"> */8/spa>4.a vaASK" 2_MUPRI_JTAGax href="+code=">MMP2_MUPRI_JTAG=m" comment"> */8/spa>4.a vaASK" 2_MUAAS_JTAGax href="+code=">MMP2_MUAAS_JTAG=m" comment"> */8/spa>4.a vaASK" 2_MUAAS_GPIOf="+code=="sref">MMP2_MUAAS_GPIO=m" comment"> */8/spa>4.a vaASK" 2_MUAAS_SPIf="+code=MFPR_MMSK" 2_MUAAS_SPI=m" comment"> */8/spa>4.a vaASK" 2_MUAAS_TWSIf="+code=MFPR_MMSK" 2_MUAAS_TWSI=m" comment"> */8/spa>4.a va">MMP2_MUAAS_DEUUEXf="+code=MFPR_MMSK" 2_MUAAS_DEUUEX=m" comment"> */8/spa>4.a va">MMP2_MUNONEax href="+code=">MMP2_MUNONE
op2v4.0xffffcomment"> */8/spa>4.".".u u18/a>8spa> class="comment">/*8/spa>4.u u58/a>8spa>>>>>>>>>* The L25" indicates unc"2 v420it unds="ciSoftware Founda22.>.8/spa>4.u u68/a>8spa>>>>>>>>>* After reset, unc"2 v420is=" *  default unc"2 v42t uciSoftware Founda22.>.8/spa>4.u u78/a>8spa>>>>>>>>>*class="comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO0code[-v424.v4.4GPIO0=m" c0aam
  L1">u ustring"inctrl-GPIO0>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO,u8a href="+codeGPIO,=m" c0aam
  L1">u ustring"inctrl-GPIO1>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIOref="+code=GRP_MMPIOr=m" c0aam
  L1">u ustring"inctrl-GPIO2>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO,u8a href="+codeGPIO,=m" c0aam
  L1">u ustring"inctrl-GPIO3>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO4u8a href="+codeGPIO4=m" c0aam
  L1">u ustring"inctrl-GPIO4>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO,u8a href="+codeGPIO,=m" c0aam
  L1">u ustring"inctrl-GPIO5>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO,u8a href="+codeGPIO,=m" c0aam
  L1">u ustring"inctrl-GPIO6>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO,u8a href="+codeGPIO,=m" c0aam
  L1">u ustring"inctrl-GPIO7>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO8u8a href="+codeGPIO8=m" c0aam
  L1">u ustring"inctrl-GPIO8>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO9u8a href="+codeGPIO9=m" c0aam
  L1">u ustring"inctrl-GPIO9>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO10code[-v424.v4.4GPIO10=m" c0aam
  L1">u ustring"inctrl-GPIO10>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO,,u8a href="+codeGPIO,,=m" c0aam
  L1">u ustring"inctrl-GPIO11>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO1ref="+code=GRP_MMPIO1r=m" c0aam
  L1">u ustring"inctrl-GPIO12>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO1,u8a href="+codeGPIO1,=m" c0aam
  L1">u ustring"inctrl-GPIO13>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO14u8a href="+codeGPIO14=m" c0aam
  L1">u ustring"inctrl-GPIO14>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO1,u8a href="+codeGPIO1,=m" c0aam
  L1">u ustring"inctrl-GPIO15>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO1,u8a href="+codeGPIO1,=m" c0aam
  L1">u ustring"inctrl-GPIO16>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO1,u8a href="+codeGPIO1,=m" c0aam
  L1">u ustring"inctrl-GPIO17>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO18u8a href="+codeGPIO18=m" c0aam
  L1">u ustring"inctrl-GPIO18>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO19u8a href="+codeGPIO19=m" c0aam
  L1">u ustring"inctrl-GPIO19>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO20code[-v424.v4.4GPIO20=m" c0aam
  L1">u ustring"inctrl-GPIO20>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO2,u8a href="+codeGPIO2,=m" c0aam
  L1">u ustring"inctrl-GPIO21>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO2ref="+code=GRP_MMPIOrr=m" c0aam
  L1">u ustring"inctrl-GPIO22>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO2,u8a href="+codeGPIO2,=m" c0aam
  L1">u ustring"inctrl-GPIO23>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO24u8a href="+codeGPIO24=m" c0aam
  L1">u ustring"inctrl-GPIO24>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO2,u8a href="+codeGPIO2,=m" c0aam
  L1">u ustring"inctrl-GPIO25>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO2,u8a href="+codeGPIO2,=m" c0aam
  L1">u ustring"inctrl-GPIO26>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO2,u8a href="+codeGPIO2,=m" c0aam
  L1">u ustring"inctrl-GPIO27>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO28u8a href="+codeGPIO28=m" c0aam
  L1">u ustring"inctrl-GPIO28>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO29u8a href="+codeGPIO29=m" c0aam
  L1">u ustring"inctrl-GPIO29>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO30code[-v424.v4.4GPIO30=m" c0aam
  L1">u ustring"inctrl-GPIO30>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO3,u8a href="+codeGPIO3,=m" c0aam
  L1">u ustring"inctrl-GPIO31>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO3ref="+code=GRP_MMPIO3r=m" c0aam
  L1">u ustring"inctrl-GPIO32>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO3,u8a href="+codeGPIO,,=m" c0aam
  L1">u ustring"inctrl-GPIO33>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO34u8a href="+codeGPIO34=m" c0aam
  L1">u ustring"inctrl-GPIO34>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO3,u8a href="+codeGPIO3,=m" c0aam
  L1">u ustring"inctrl-GPIO35>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO3,u8a href="+codeGPIO3,=m" c0aam
  L1">u ustring"inctrl-GPIO36>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO3,u8a href="+codeGPIO3,=m" c0aam
  L1">u ustring"inctrl-GPIO37>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO38u8a href="+codeGPIO38=m" c0aam
  L1">u ustring"inctrl-GPIO38>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO39u8a href="+codeGPIO39=m" c0aam
  L1">u ustring"inctrl-GPIO39>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO40code[-v424.v4.4GPIO40=m" c0aam
  L1">u ustring"inctrl-GPIO40>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO4,u8a href="+codeGPIO4,=m" c0aam
  L1">u ustring"inctrl-GPIO41>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO4ref="+code=GRP_MMPIO4r=m" c0aam
  L1">u ustring"inctrl-GPIO42>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO4,u8a href="+codeGPIO4,=m" c0aam
  L1">u ustring"inctrl-GPIO43>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO44u8a href="+codeGPIO44=m" c0aam
  L1">u ustring"inctrl-GPIO44>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO4,u8a href="+codeGPIO4,=m" c0aam
  L1">u ustring"inctrl-GPIO45>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO4,u8a href="+codeGPIO4,=m" c0aam
  L1">u ustring"inctrl-GPIO46>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO4,u8a href="+codeGPIO4,=m" c0aam
  L1">u ustring"inctrl-GPIO47>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO48u8a href="+codeGPIO48=m" c0aam
  L1">u ustring"inctrl-GPIO48>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO49u8a href="+codeGPIO49=m" c0aam
  L1">u ustring"inctrl-GPIO49>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO50code[-v424.v4.4GPIO50=m" c0aam
  L1">u ustring"inctrl-GPIO50>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO5,u8a href="+codeGPIO5,=m" c0aam
  L1">u ustring"inctrl-GPIO51>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO5ref="+code=GRP_MMPIO5r=m" c0aam
  L1">u ustring"inctrl-GPIO52>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO5,u8a href="+codeGPIO5,=m" c0aam
  L1">u ustring"inctrl-GPIO53>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO54u8a href="+codeGPIO54=m" c0aam
  L1">u ustring"inctrl-GPIO54>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO5,u8a href="+codeGPIO,,=m" c0aam
  L1">u ustring"inctrl-GPIO55>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO5,u8a href="+codeGPIO5,=m" c0aam
  L1">u ustring"inctrl-GPIO56>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO5,u8a href="+codeGPIO5,=m" c0aam
  L1">u ustring"inctrl-GPIO57>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO58u8a href="+codeGPIO58=m" c0aam
  L1">u ustring"inctrl-GPIO58>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO59u8a href="+codeGPIO59=m" c0aam
  L1">u ustring"inctrl-GPIO59>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO60code[-v424.v4.4GPIO60=m" c0aam
  L1">u ustring"inctrl-GPIO60>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO6,u8a href="+codeGPIO6,=m" c0aam
  L1">u ustring"inctrl-GPIO61>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO6ref="+code=GRP_MMPIO6r=m" c0aam
  L1">u ustring"inctrl-GPIO62>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO6,u8a href="+codeGPIO6,=m" c0aam
  L1">u ustring"inctrl-GPIO63>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO64u8a href="+codeGPIO64=m" c0aam
  L1">u ustring"inctrl-GPIO64>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO6,u8a href="+codeGPIO6,=m" c0aam
  L1">u ustring"inctrl-GPIO65>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO6,u8a href="+codeGPIO,,=m" c0aam
  L1">u ustring"inctrl-GPIO66>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO6,u8a href="+codeGPIO6,=m" c0aam
  L1">u ustring"inctrl-GPIO67>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO68u8a href="+codeGPIO68=m" c0aam
  L1">u ustring"inctrl-GPIO68>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO69u8a href="+codeGPIO69=m" c0aam
  L1">u ustring"inctrl-GPIO69>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO70code[-v424.v4.4GPIO70=m" c0aam
  L1">u ustring"inctrl-GPIO70>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO7,u8a href="+codeGPIO7,=m" c0aam
  L1">u ustring"inctrl-GPIO71>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO7ref="+code=GRP_MMPIO7r=m" c0aam
  L1">u ustring"inctrl-GPIO72>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO7,u8a href="+codeGPIO7,=m" c0aam
  L1">u ustring"inctrl-GPIO73>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO74u8a href="+codeGPIO74=m" c0aam
  L1">u ustring"inctrl-GPIO74>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO7,u8a href="+codeGPIO7,=m" c0aam
  L1">u ustring"inctrl-GPIO75>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO7,u8a href="+codeGPIO7,=m" c0aam
  L1">u ustring"inctrl-GPIO76>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO7,u8a href="+codeGPIO,,=m" c0aam
  L1">u ustring"inctrl-GPIO77>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO78u8a href="+codeGPIO78=m" c0aam
  L1">u ustring"inctrl-GPIO78>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO79u8a href="+codeGPIO79=m" c0aam
  L1">u ustring"inctrl-GPIO79>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO80code[-v424.v4.4GPIO80=m" c0aam
  L1">u ustring"inctrl-GPIO80>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO8,u8a href="+codeGPIO8,=m" c0aam
  L1">u ustring"inctrl-GPIO81>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO8ref="+code=GRP_MMPIO8r=m" c0aam
  L1">u ustring"inctrl-GPIO82>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO8,u8a href="+codeGPIO8,=m" c0aam
  L1">u ustring"inctrl-GPIO83>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO84u8a href="+codeGPIO84=m" c0aam
  L1">u ustring"inctrl-GPIO84>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO8,u8a href="+codeGPIO8,=m" c0aam
  L1">u ustring"inctrl-GPIO85>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO8,u8a href="+codeGPIO8,=m" c0aam
  L1">u ustring"inctrl-GPIO86>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO8,u8a href="+codeGPIO8,=m" c0aam
  L1">u ustring"inctrl-GPIO87>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO88u8a href="+codeGPIO88=m" c0aam
  L1">u ustring"inctrl-GPIO88>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO89u8a href="+codeGPIO89=m" c0aam
  L1">u ustring"inctrl-GPIO89>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO90code[-v424.v4.4GPIO90=m" c0aam
  L1">u ustring"inctrl-GPIO90>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO9,u8a href="+codeGPIO9,=m" c0aam
  L1">u ustring"inctrl-GPIO91>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO9ref="+code=GRP_MMPIO9r=m" c0aam
  L1">u ustring"inctrl-GPIO92>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO9,u8a href="+codeGPIO9,=m" c0aam
  L1">u ustring"inctrl-GPIO93>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO94u8a href="+codeGPIO94=m" c0aam
  L1">u ustring"inctrl-GPIO94>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO9,u8a href="+codeGPIO9,=m" c0aam
  L1">u ustring"inctrl-GPIO95>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO9,u8a href="+codeGPIO9,=m" c0aam
  L1">u ustring"inctrl-GPIO96>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO9,u8a href="+codeGPIO9,=m" c0aam
  L1">u ustring"inctrl-GPIO97>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO98u8a href="+codeGPIO98=m" c0aam
  L1">u ustring"inctrl-GPIO98>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO99u8a href="+codeGPIO99=m" c0aam
  L1">u ustring"inctrl-GPIO99>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO-mmmp2.c#L10"+codeGPIOasse" nc0aam
  L1">u ustring"inctrl-GPIO100>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO,0,u8a href="+codeGPIO,0,=m" c0aam
  L1">u ustring"inctrl-GPIO101>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO-0mmp2.c#L12"+codeGPIO,0r=m" c0aam
  L1">u ustring"inctrl-GPIO102>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO-0mmp2.c#L13"+codeGPIO,0,=m" c0aam
  L1">u ustring"inctrl-GPIO103>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO-0mmp2.c#L14"+codeGPIO,04=m" c0aam
  L1">u ustring"inctrl-GPIO104>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO-0mmp2.c#L15"+codeGPIO,0,=m" c0aam
  L1">u ustring"inctrl-GPIO105>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO-0mmp2.c#L16"+codeGPIO,0,=m" c0aam
  L1">u ustring"inctrl-GPIO106>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO-0mmp2.c#L17"+codeGPIO,0,=m" c0aam
  L1">u ustring"inctrl-GPIO107>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO-0mmp2.c#L18"+codeGPIO,08=m" c0aam
  L1">u ustring"inctrl-GPIO108>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO-0mmp2.c#L19"+codeGPIO,09=m" c0aam
  L1">u ustring"inctrl-GPIO109>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO110code[-v424.v4.4GPIO110=m" c0aam
  L1">u ustring"inctrl-GPIO110>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO,,,u8a href="+codeGPIO,,,=m" c0aam
  L1">u ustring"inctrl-GPIO111>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO11ref="+code=GRP_MMPIO11r=m" c0aam
  L1">u ustring"inctrl-GPIO112>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO11,u8a href="+codeGPIO11,=m" c0aam
  L1">u ustring"inctrl-GPIO113>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO114u8a href="+codeGPIO114=m" c0aam
  L1">u ustring"inctrl-GPIO114>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO11,u8a href="+codeGPIO11,=m" c0aam
  L1">u ustring"inctrl-GPIO115>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO11,u8a href="+codeGPIO11,=m" c0aam
  L1">u ustring"inctrl-GPIO116>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO11,u8a href="+codeGPIO11,=m" c0aam
  L1">u ustring"inctrl-GPIO117>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO118u8a href="+codeGPIO118=m" c0aam
  L1">u ustring"inctrl-GPIO118>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO119u8a href="+codeGPIO119=m" c0aam
  L1">u ustring"inctrl-GPIO119>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO120code[-v424.v4.4GPIO120=m" c0aam
  L1">u ustring"inctrl-GPIO120>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO12,u8a href="+codeGPIO12,=m" c0aam
  L1">u ustring"inctrl-GPIO121>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO12ref="+code=GRP_MMPIO1rr=m" c0aam
  L1">u ustring"inctrl-GPIO122>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO12,u8a href="+codeGPIO12,=m" c0aam
  L1">u ustring"inctrl-GPIO123>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO124u8a href="+codeGPIO124=m" c0aam
  L1">u ustring"inctrl-GPIO124>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO12,u8a href="+codeGPIO12,=m" c0aam
  L1">u ustring"inctrl-GPIO125>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO12,u8a href="+codeGPIO12,=m" c0aam
  L1">u ustring"inctrl-GPIO126>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO12,u8a href="+codeGPIO12,=m" c0aam
  L1">u ustring"inctrl-GPIO127>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO128u8a href="+codeGPIO128=m" c0aam
  L1">u ustring"inctrl-GPIO128>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO129u8a href="+codeGPIO129=m" c0aam
  L1">u ustring"inctrl-GPIO129>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO130code[-v424.v4.4GPIO130=m" c0aam
  L1">u ustring"inctrl-GPIO130>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO13,u8a href="+codeGPIO13,=m" c0aam
  L1">u ustring"inctrl-GPIO131>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO13ref="+code=GRP_MMPIO13r=m" c0aam
  L1">u ustring"inctrl-GPIO132>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO13,u8a href="+codeGPIO1,,=m" c0aam
  L1">u ustring"inctrl-GPIO133>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO134u8a href="+codeGPIO134=m" c0aam
  L1">u ustring"inctrl-GPIO134>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO13,u8a href="+codeGPIO13,=m" c0aam
  L1">u ustring"inctrl-GPIO135>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO13,u8a href="+codeGPIO13,=m" c0aam
  L1">u ustring"inctrl-GPIO136>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO13,u8a href="+codeGPIO13,=m" c0aam
  L1">u ustring"inctrl-GPIO137>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO138u8a href="+codeGPIO138=m" c0aam
  L1">u ustring"inctrl-GPIO138>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO139u8a href="+codeGPIO139=m" c0aam
  L1">u ustring"inctrl-GPIO139>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO140code[-v424.v4.4GPIO140=m" c0aam
  L1">u ustring"inctrl-GPIO140>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO14,u8a href="+codeGPIO14,=m" c0aam
  L1">u ustring"inctrl-GPIO141>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO14ref="+code=GRP_MMPIO14r=m" c0aam
  L1">u ustring"inctrl-GPIO142>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO14,u8a href="+codeGPIO14,=m" c0aam
  L1">u ustring"inctrl-GPIO143>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO144u8a href="+codeGPIO144=m" c0aam
  L1">u ustring"inctrl-GPIO144>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO14,u8a href="+codeGPIO14,=m" c0aam
  L1">u ustring"inctrl-GPIO145>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO14,u8a href="+codeGPIO14,=m" c0aam
  L1">u ustring"inctrl-GPIO146>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO14,u8a href="+codeGPIO14,=m" c0aam
  L1">u ustring"inctrl-GPIO147>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO148u8a href="+codeGPIO148=m" c0aam
  L1">u ustring"inctrl-GPIO148>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO149u8a href="+codeGPIO149=m" c0aam
  L1">u ustring"inctrl-GPIO149>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO150code[-v424.v4.4GPIO150=m" c0aam
  L1">u ustring"inctrl-GPIO150>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO15,u8a href="+codeGPIO15,=m" c0aam
  L1">u ustring"inctrl-GPIO151>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO15ref="+code=GRP_MMPIO15r=m" c0aam
  L1">u ustring"inctrl-GPIO152>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO15,u8a href="+codeGPIO15,=m" c0aam
  L1">u ustring"inctrl-GPIO153>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO154u8a href="+codeGPIO154=m" c0aam
  L1">u ustring"inctrl-GPIO154>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO15,u8a href="+codeGPIO1,,=m" c0aam
  L1">u ustring"inctrl-GPIO155>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO15,u8a href="+codeGPIO15,=m" c0aam
  L1">u ustring"inctrl-GPIO156>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO15,u8a href="+codeGPIO15,=m" c0aam
  L1">u ustring"inctrl-GPIO157>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO158u8a href="+codeGPIO158=m" c0aam
  L1">u ustring"inctrl-GPIO158>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO159u8a href="+codeGPIO159=m" c0aam
  L1">u ustring"inctrl-GPIO159>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO160code[-v424.v4.4GPIO160=m" c0aam
  L1">u ustring"inctrl-GPIO160>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO16,u8a href="+codeGPIO16,=m" c0aam
  L1">u ustring"inctrl-GPIO161>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO16ref="+code=GRP_MMPIO16r=m" c0aam
  L1">u ustring"inctrl-GPIO162>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO16,u8a href="+codeGPIO16,=m" c0aam
  L1">u ustring"inctrl-GPIO163>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO164u8a href="+codeGPIO164=m" c0aam
  L1">u ustring"inctrl-GPIO164>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO16,u8a href="+codeGPIO16,=m" c0aam
  L1">u ustring"inctrl-GPIO165>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO16,u8a href="+codeGPIO1,,=m" c0aam
  L1">u ustring"inctrl-GPIO166>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO16,u8a href="+codeGPIO16,=m" c0aam
  L1">u ustring"inctrl-GPIO167>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vGPIO168u8a href="+codeGPIO168=m" c0aam
  L1">u ustring"inctrl-GPIO168>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vTWSI4_SCLcode[-v424.v4.4TWSI4_SCL=m" c0aam
  L1">u ustring"inctrl-TWSI4_SCL>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vTWSI4_SDAcode[-v424.v4.4TWSI4_SDA=m" c0aam
  L1">u ustring"inctrl-TWSI4_SDA>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vG_CLKREQu8a href="+codeG_CLKREQ=m" c0aam
  L1">u ustring"inctrl-G_CLKREQ>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vVCXO_REQu8a href="+codeVCXO_REQ=m" c0aam
  L1">u ustring"inctrl-VCXO_REQ>u 188/ass="c)comment"> */8/spa>4.a vaPINCTRL_PINcode[-v424.v4.4PINCTRL_PINe" nsref">GRP_MMP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c0aam
  L1">u ustring"inctrl-VCXO_OUT>u 188/ass="c)comment"> */8/spa>4. */8/spa>4. */8/spa>4.a vapxa3xx_mfp_="du8a href="+codepxa3xx_mfp_="de" naass="sref">a vas/pi_mfpu8a href="+codes/pi_mfpe" n[] = {omment"> */8/spa>4.u ucomment">/*m
  L40="dam
  L40 offs40 f0m
  L40 f1am
  L40  f2am
  L40  f3am
  L40  f4am
  L40  f5
  L40  f6
  L40  f7  *//ass="comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO0code[-v424.v4.4GPIO0=m" c000000x054,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,u8a href="+codeGPIO1=m" c000000x058,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIOref="+code=GRP_MMPIO2=m" c000000x05C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,u8a href="+codeGPIO3=m" c000000x060,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO4u8a href="+codeGPIO4=m" c000000x064,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,u8a href="+codeGPIO5=m" c000000x068,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,u8a href="+codeGPIO,=m" c000000x06C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,u8a href="+codeGPIO,=m" c000000x070,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO8u8a href="+codeGPIO8=m" c000000x074,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO9u8a href="+codeGPIO9=m" c000000x078,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,mmp2.c#L10"+codeGPIOas=m" c00000x07C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,,u8a href="+codeGPIO,,=m" c00000x080,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,ref="+code=GRP_MMPIO1r=m" c00000x084,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,,u8a href="+codeGPIO1,=m" c00000x088,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,4u8a href="+codeGPIO14=m" c00000x08C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,,u8a href="+codeGPIO15=m" c00000x090,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,,u8a href="+codeGPIO1,=m" c00000x094,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaROTu8a href="+codeROT=m" c00000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,,u8a href="+codeGPIO17=m" c00000x098,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaROTu8a href="+codeROT=m" c00000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,8u8a href="+codeGPIO18=m" c00000x09C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaROTu8a href="+codeROT=m" c00000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,9u8a href="+codeGPIO19=m" c00000x0A0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaROTu8a href="+codeROT=m" c00000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIOrmmp2.c#L10"+codeGPIO2s=m" c00000x0A4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaTBcode[-v424.v4.4TB=m" c000000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIOr,u8a href="+codeGPIO2,=m" c00000x0A8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaTBcode[-v424.v4.4TB=m" c000000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIOrref="+code=GRP_MMPIO2r=m" c00000x0AC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaTBcode[-v424.v4.4TB=m" c000000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO2,u8a href="+codeGPIO2,=m" c00000x0B0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaTBcode[-v424.v4.4TB=m" c000000000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO24u8a href="+codeGPIO24=m" c00000x0B4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaI2Scode[-v424.v4.4I2S=m" c00000000ass="sref">a vaVCXO_OUTu8a href="+codeVCXO_OUT=m" c000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO2,u8a href="+codeGPIO2,=m" c00000x0B8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaI2Scode[-v424.v4.4I2S=m" c00000000ass="sref">a vaHDMIcode[-v424.v4.4HDMI=m" c0000000ass="sref">a vaSSPAref="+code=GRP_MSSPAr=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO2,u8a href="+codeGPIO2,=m" c00000x0BC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaI2Scode[-v424.v4.4I2S=m" c00000000ass="sref">a vaHDMIcode[-v424.v4.4HDMI=m" c0000000ass="sref">a vaSSPAref="+code=GRP_MSSPAr=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO2,u8a href="+codeGPIO27=m" c00000x0C0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaI2Scode[-v424.v4.4I2S=m" c00000000ass="sref">a vaHDMIcode[-v424.v4.4HDMI=m" c0000000ass="sref">a vaSSPAref="+code=GRP_MSSPAr=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO28u8a href="+codeGPIO28=m" c00000x0C4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaI2Scode[-v424.v4.4I2S=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSSPAref="+code=GRP_MSSPAr=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO29u8a href="+codeGPIO29=m" c00000x0C8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO30code[-v424.v4.4GPIO3s=m" c00000x0CC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO3,u8a href="+codeGPIO3,=m" c00000x0D0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO3ref="+code=GRP_MMPIO3r=m" c00000x0D4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaKP_MKcode[-v424.v4.4KP_MK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,,u8a href="+codeGPIO3,=m" c00000x0D8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaSSPAref="+code=GRP_MSSPAr=m" c000000ass="sref">a vaI2Scode[-v424.v4.4I2S=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO34u8a href="+codeGPIO34=m" c00000x0DC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaSSPAref="+code=GRP_MSSPAr=m" c000000ass="sref">a vaI2Scode[-v424.v4.4I2S=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO3,u8a href="+codeGPIO3,=m" c00000x0E0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaSSPAref="+code=GRP_MSSPAr=m" c000000ass="sref">a vaI2Scode[-v424.v4.4I2S=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO3,u8a href="+codeGPIO3,=m" c00000x0E4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaSSPAref="+code=GRP_MSSPAr=m" c000000ass="sref">a vaI2Scode[-v424.v4.4I2S=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO3,u8a href="+codeGPIO37=m" c00000x0E8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaTWSIref="+code=GRP_MTWSIr=m" c000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO38u8a href="+codeGPIO38=m" c00000x0EC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaTWSIref="+code=GRP_MTWSIr=m" c000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO39u8a href="+codeGPIO39=m" c00000x0F0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaTWSIref="+code=GRP_MTWSIr=m" c000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO40code[-v424.v4.4GPIO4s=m" c00000x0F4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaTWSIref="+code=GRP_MTWSIr=m" c000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO4,u8a href="+codeGPIO4,=m" c00000x0F8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO4ref="+code=GRP_MMPIO4r=m" c00000x0FC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO4,u8a href="+codeGPIO4,=m" c00000x100,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaTWSIref="+code=GRP_MTWSIr=m" c000000ass="sref">a vaUART4u8a href="+codeUART4=m" c000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO44u8a href="+codeGPIO44=m" c00000x104,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaTWSIref="+code=GRP_MTWSIr=m" c000000ass="sref">a vaUART4u8a href="+codeUART4=m" c000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO4,u8a href="+codeGPIO4,=m" c00000x108,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaUART4u8a href="+codeUART4=m" c000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO4,u8a href="+codeGPIO46=m" c00000x10C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaUART4u8a href="+codeUART4=m" c000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO4,u8a href="+codeGPIO47=m" c00000x110,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaSSPref="+code=GRP_MSSPr=m" c0000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaCAMref="+code=GRP_MCAMr=m" c0000000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c0ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO48u8a href="+codeGPIO48=m" c00000x114,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaSSPref="+code=GRP_MSSPr=m" c0000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaCAMref="+code=GRP_MCAMr=m" c0000000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c0ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO49u8a href="+codeGPIO49=m" c00000x118,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaSSPref="+code=GRP_MSSPr=m" c0000000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO50code[-v424.v4.4GPIO50=m" c00000x11C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaSSPref="+code=GRP_MSSPr=m" c0000000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO5,u8a href="+codeGPIO5,=m" c00000x120,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaROTu8a href="+codeROT=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO5ref="+code=GRP_MMPIO52=m" c00000x124,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaROTu8a href="+codeROT=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO5,u8a href="+codeGPIO5,=m" c00000x128,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaTWSIref="+code=GRP_MTWSIr=m" c000000ass="sref">a vaVCXO_REQef="+code=GRP_MVCXO_REQ=m" c000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO54u8a href="+codeGPIO54=m" c00000x12C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaTWSIref="+code=GRP_MTWSIr=m" c000000ass="sref">a vaVCXO_OUTu8a href="+codeVCXO_OUT=m" c000ass="sref">a vaHDMIcode[-v424.v4.4HDMI=m" c0000000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO,,u8a href="+codeGPIO5,=m" c00000x130,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaSSPref="+code=GRP_MSSPr=m" c0000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaROTu8a href="+codeROT=m" c00000000ass="sref">a vaTWSIref="+code=GRP_MTWSIr=m" c0000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c00000ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO5,u8a href="+codeGPIO56=m" c00000x134,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaSSPref="+code=GRP_MSSPr=m" c0000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c000000ass="sref">a vaROTu8a href="+codeROT=m" c00000000ass="sref">a vaTWSIref="+code=GRP_MTWSIr=m" c0000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c0000ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO5,u8a href="+codeGPIO57=m" c00000x138,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaSSP2_RXef="+code=GRP_MSSPr_RX=m" c0000ass="sref">a vaSSP1_TXRXef="+code=GRP_MSSP1_TXRX=m" c00ass="sref">a vaSSPr_FRMef="+code=GRP_MSSPr_FRM=m" c000ass="sref">a vaSSP1_RXef="+code=GRP_MSSP1_RX=m" c0000ass="sref">a vaVCXO_REQef="+code=GRP_MVCXO_REQ=m" c0ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO58u8a href="+codeGPIO58=m" c00000x13C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaSSPref="+code=GRP_MSSPr=m" c0000000ass="sref">a vaSSP,_RXef="+code=GRP_MSSP1_RX=m" c0000ass="sref">a vaSSP1_FRMef="+code=GRP_MSSP1_FRM=m" c000ass="sref">a vaSSP1_TXRXef="+code=GRP_MSSP1_TXRX=m" c00ass="sref">a vaVCXO_REQef="+code=GRP_MVCXO_REQ=m" c0ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO59u8a href="+codeGPIO59=m" c00000x280,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaUART4u8a href="+codeUART4=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO60code[-v424.v4.4GPIO60=m" c00000x284,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaUART4u8a href="+codeUART4=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO6,u8a href="+codeGPIO61=m" c00000x288,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaHDMIcode[-v424.v4.4HDMI=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO6ref="+code=GRP_MMPIO62=m" c00000x28C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO6,u8a href="+codeGPIO6,=m" c00000x290,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaMSPu8a href="+codeMSP=m" c000000ass="sref">a vaUART4u8a href="+codeUART4=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO64u8a href="+codeGPIO64=m" c00000x294,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaMSPu8a href="+codeMSP=m" c000000ass="sref">a vaUART4u8a href="+codeUART4=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO6,u8a href="+codeGPIO65=m" c00000x298,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaMSPu8a href="+codeMSP=m" c000000ass="sref">a vaUART4u8a href="+codeUART4=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO6,u8a href="+codeGPIO66=m" c00000x29C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaMSPu8a href="+codeMSP=m" c000000ass="sref">a vaUART4u8a href="+codeUART4=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO6,u8a href="+codeGPIO67=m" c00000x2A0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaMSPu8a href="+codeMSP=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO68u8a href="+codeGPIO68=m" c00000x2A4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaMSPu8a href="+codeMSP=m" c000000ass="sref">a vaLCDu8a href="+codeLCD=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO69u8a href="+codeGPIO69=m" c00000x2A8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO70code[-v424.v4.4GPIO70=m" c00000x2AC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaCCIC,u8a href="+codeCCIC,=m" c000000ass="sref">a vaULPIcode[-v424.v4.4ULPI=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c000000ass="sref">a vaMSPu8a href="+codeMSP=m" c000000ass="sref">a vaLCDu8a href="+codeLCD=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO7,u8a href="+codeGPIO71=m" c00000x2B0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c000000ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO7ref="+code=GRP_MMPIO72=m" c00000x2B4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaHDMIcode[-v424.v4.4HDMI=m" c0000000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c000000ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO7,u8a href="+codeGPIO7,=m" c00000x2B8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaVCXO_REQef="+code=GRP_MVCXO_REQ=m" c00032K_CLKOUT,0ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaVCXO_OUTu8a href="+codeVCXO_OUT=m" c000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO74u8a href="+codeGPIO74=m" c00000x170,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaMMC4u8a href="+codeMMC4=m" c0000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c0000ass="sref">a vaUART4u8a href="+codeUART4=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO7,u8a href="+codeGPIO7,=m" c00000x174,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaMMC4u8a href="+codeMMC4=m" c0000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c0000ass="sref">a vaUART4u8a href="+codeUART4=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO7,u8a href="+codeGPIO76=m" c00000x178,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaMMC4u8a href="+codeMMC4=m" c0000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c0000ass="sref">a vaUART4u8a href="+codeUART4=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO7,u8a href="+codeGPIO77=m" c00000x17C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaMMC4u8a href="+codeMMC4=m" c0000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c0000ass="sref">a vaUART4u8a href="+codeUART4=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO78u8a href="+codeGPIO78=m" c00000x180,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaHDMIcode[-v424.v4.4HDMI=m" c0000000ass="sref">a vaMMC4u8a href="+codeMMC4=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSSP4u8a href="+codeSSP4=m" c00000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO79u8a href="+codeGPIO79=m" c00000x184,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaMMC4u8a href="+codeMMC4=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSSP4u8a href="+codeSSP4=m" c00000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO80code[-v424.v4.4GPIO80=m" c00000x188,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaMMC4u8a href="+codeMMC4=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSSP4u8a href="+codeSSP4=m" c00000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO8,u8a href="+codeGPIO8,=m" c00000x18C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaMMC4u8a href="+codeMMC4=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSSP4u8a href="+codeSSP4=m" c00000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO8ref="+code=GRP_MMPIO82=m" c00000x190,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaMMC4u8a href="+codeMMC4=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO8,u8a href="+codeGPIO8,=m" c00000x194,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaMMC4u8a href="+codeMMC4=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO84u8a href="+codeGPIO84=m" c00000x198,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c0000ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" ,0ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO8,u8a href="+codeGPIO8,=m" c00000x19C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c0000ass="sref">a vaAAS_TWSIcode[-v424.v4.4AAS_TWSI=m" ,0ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO8,u8a href="+codeGPIO86=m" c00000x1A0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c0000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO8,u8a href="+codeGPIO87=m" c00000x1A4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c0000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO88u8a href="+codeGPIO88=m" c00000x1A8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO89u8a href="+codeGPIO89=m" c00000x1AC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO90code[-v424.v4.4GPIO90=m" c00000x1B0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO9,u8a href="+codeGPIO9,=m" c00000x1B4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO9ref="+code=GRP_MMPIO92=m" c00000x1B8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4.a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO9,u8a href="+codeGPIO9,=m" c00000x1BC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaMMCref="+code=GRP_MMMCr=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4. 40/e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO94u8a href="+codeGPIO94=m" c00000x1C0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaAAS_GPIOcode[-v424.v4.4AAS_GPIO=m" c000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4. 401e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO9,u8a href="+codeGPIO9,=m" c00000x1C4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaAAS_DEU_EXef="+code=GRP_MAAS_DEU_EX=m" ,0ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaCCICref="+code=GRP_MCCICr=m" c0000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4. 402e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO9,u8a href="+codeGPIO96=m" c00000x1C8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaAAS_DEU_EXef="+code=GRP_MAAS_DEU_EX=m" ,0ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4. 403e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO9,u8a href="+codeGPIO97=m" c00000x1CC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaAAS_DEU_EXef="+code=GRP_MAAS_DEU_EX=m" ,0ass="sref">a vaAAS_SPIcode[-v424.v4.4AAS_SPI=m" c00ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4. 404e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO98u8a href="+codeGPIO98=m" c00000x1D0,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaONE_WIREcode[-v424.v4.4ONE_WIRE=m" c000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4. 405e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO99u8a href="+codeGPIO99=m" c00000x1D4,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4. 406e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO100code[-v424.v4.4GPIO100=m" c0000x1D8,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaTWSI,u8a href="+codeTWSI,=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4. 407e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO10,u8a href="+codeGPIO101=m" c0000x1DC,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaSPIcode[-v424.v4.4SPI=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaTIPUu8a href="+codeTIPU=m" )comment"> */8/spa>4. 408e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO10ref="+code=GRP_MMPIO102=m" c0000x000,0ass="sref">a vaUSIMef="+code=GRP_MUSIM=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaFSICu8a href="+codeFSIC=m" c0000000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 409e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO10,u8a href="+codeGPIO103=m" c0000x004,0ass="sref">a vaUSIMef="+code=GRP_MUSIM=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaFSICu8a href="+codeFSIC=m" c0000000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 41/e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO104u8a href="+codeGPIO104=m" c0000x1FC,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 411e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO10,u8a href="+codeGPIO10,=m" c0000x1F8,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 412e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO10,u8a href="+codeGPIO106=m" c0000x1F4,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 413e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO10,u8a href="+codeGPIO107=m" c0000x1F0,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 414e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO108u8a href="+codeGPIO108=m" c0000x21C,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 415e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO109u8a href="+codeGPIO109=m" c0000x218,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 416e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO110code[-v424.v4.4GPIO110=m" c0000x214,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 417e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO11,u8a href="+codeGPIO111=m" c0000x200,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 418e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO11ref="+code=GRP_MMPIO112=m" c0000x244,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 419e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO11,u8a href="+codeGPIO113=m" c0000x25C,0ass="sref">a vaSMCu8a href="+codeSMC=m" c000000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaEXT_DMAcode[-v424.v4.4EXT_DMA=m" c0000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaHDMIcode[-v424.v4.4HDMI=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 42/e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO114u8a href="+codeGPIO114=m" c0000x164,0ass="sref">a vaG_CLKOUTu8a href="+codeG_CLKOUT=m" c032K_CLKOUT,0ass="sref">a vaHDMIcode[-v424.v4.4HDMI=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 421e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO11,u8a href="+codeGPIO11,=m" c0000x260,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaACu8a href="+codeAC=m" c000000000ass="sref">a vaUART4u8a href="+codeUART4=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 422e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO11,u8a href="+codeGPIO116=m" c0000x264,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaACu8a href="+codeAC=m" c000000000ass="sref">a vaUART4u8a href="+codeUART4=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 423e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO11,u8a href="+codeGPIO117=m" c0000x268,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaACu8a href="+codeAC=m" c000000000ass="sref">a vaUART4u8a href="+codeUART4=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 424e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO118u8a href="+codeGPIO118=m" c0000x26C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaACu8a href="+codeAC=m" c000000000ass="sref">a vaUART4u8a href="+codeUART4=m" c000000ass="sref">a vaUART,u8a href="+codeUART,=m" c000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 425e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO119u8a href="+codeGPIO119=m" c0000x270,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaCAcode[-v424.v4.4CA=m" c000000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 426e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO120code[-v424.v4.4GPIO120=m" c0000x274,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaCAcode[-v424.v4.4CA=m" c000000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 427e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO12,u8a href="+codeGPIO121=m" c0000x278,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaCAcode[-v424.v4.4CA=m" c000000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 428e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO12ref="+code=GRP_MMPIO122=m" c0000x27C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaCAcode[-v424.v4.4CA=m" c000000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 429e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO12,u8a href="+codeGPIO123=m" c0000x148,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaSLEEP_INDu8a href="+codeSLEEP_IND=m" c00ass="sref">a vaONE_WIREcode[-v424.v4.4ONE_WIRE=m" c00032K_CLKOUT,0ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 43/e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO124u8a href="+codeGPIO124=m" c0000x00C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 431e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO12,u8a href="+codeGPIO12,=m" c0000x010,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 432e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO12,u8a href="+codeGPIO126=m" c0000x014,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 433e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO12,u8a href="+codeGPIO127=m" c0000x018,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 434e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO128u8a href="+codeGPIO128=m" c0000x01C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 435e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO129u8a href="+codeGPIO129=m" c0000x020,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 436e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO130code[-v424.v4.4GPIO130=m" c0000x024,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 437e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO13,u8a href="+codeGPIO131=m" c0000x028,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaMSPu8a href="+codeMSP=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 438e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO13ref="+code=GRP_MMPIO132=m" c0000x02C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaPRI_JTAGu8a href="+codePRI_JTAG=m" c000ass="sref">a vaMSPu8a href="+codeMSP=m" c00000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaAAS_JTAGu8a href="+codeAAS_JTAG=m" c0ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 439e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO13,u8a href="+codeGPIO133=m" c0000x030,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaPRI_JTAGu8a href="+codePRI_JTAG=m" c000ass="sref">a vaMSPu8a href="+codeMSP=m" c00000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaAAS_JTAGu8a href="+codeAAS_JTAG=m" c0ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 44/e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO134u8a href="+codeGPIO134=m" c0000x034,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaPRI_JTAGu8a href="+codePRI_JTAG=m" c000ass="sref">a vaMSPu8a href="+codeMSP=m" c00000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaAAS_JTAGu8a href="+codeAAS_JTAG=m" c0ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 441e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO13,u8a href="+codeGPIO13,=m" c0000x038,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 442e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO13,u8a href="+codeGPIO136=m" c0000x03C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaPRI_JTAGu8a href="+codePRI_JTAG=m" c000ass="sref">a vaMSPu8a href="+codeMSP=m" c00000000ass="sref">a vaSSP,u8a href="+codeSSP,=m" c0000000ass="sref">a vaAAS_JTAGu8a href="+codeAAS_JTAG=m" c0ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 443e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO13,u8a href="+codeGPIO137=m" c0000x040,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaHDMIcode[-v424.v4.4HDMI=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaMSPu8a href="+codeMSP=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 444e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO138u8a href="+codeGPIO138=m" c0000x044,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 445e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO139u8a href="+codeGPIO139=m" c0000x048,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaPRI_JTAGu8a href="+codePRI_JTAG=m" c000ass="sref">a vaMSPu8a href="+codeMSP=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaAAS_JTAGu8a href="+codeAAS_JTAG=m" c0ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 446e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO140code[-v424.v4.4GPIO140=m" c0000x04C,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c0000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 447e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO14,u8a href="+codeGPIO141=m" c0000x050,0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c00000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaUARTref="+code=GRP_MUARTr=m" c0000ass="sref">a vaUART,u8a href="+codeUART,=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 448e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO14ref="+code=GRP_MMPIO142=m" c0000x008,0ass="sref">a vaUSIMef="+code=GRP_MUSIM=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaFSICu8a href="+codeFSIC=m" c0000000ass="sref">a vaKP_DKcode[-v424.v4.4KP_DK=m" c000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 449e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO14,u8a href="+codeGPIO143=m" c0000x220,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 45/e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO144u8a href="+codeGPIO144=m" c0000x224,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaSMC_INTu8a href="+codeSMC_INT=m" c0000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 451e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO14,u8a href="+codeGPIO14,=m" c0000x228,0ass="sref">a vaSMCu8a href="+codeSMC=m" c000000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 452e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO14,u8a href="+codeGPIO146=m" c0000x22C,0ass="sref">a vaSMCu8a href="+codeSMC=m" c000000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 453e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO14,u8a href="+codeGPIO147=m" c0000x230,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 454e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO148u8a href="+codeGPIO148=m" c0000x234,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 455e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO149u8a href="+codeGPIO149=m" c0000x238,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 456e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO150code[-v424.v4.4GPIO150=m" c0000x23C,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 457e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO15,u8a href="+codeGPIO151=m" c0000x240,0ass="sref">a vaSMCu8a href="+codeSMC=m" c000000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 458e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO15ref="+code=GRP_MMPIO152=m" c0000x248,0ass="sref">a vaSMCu8a href="+codeSMC=m" c000000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 459e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO15,u8a href="+codeGPIO153=m" c0000x24C,0ass="sref">a vaSMCu8a href="+codeSMC=m" c000000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 46/e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO154u8a href="+codeGPIO154=m" c0000x254,0ass="sref">a vaSMC_INTu8a href="+codeSMC_INT=m" c00ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 461e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO15,u8a href="+codeGPIO15,=m" c0000x258,0ass="sref">a vaEXT_DMAcode[-v424.v4.4EXT_DMA=m" c00ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaEXT_DMAcode[-v424.v4.4EXT_DMA=m" c0000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 462e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO15,u8a href="+codeGPIO156=m" c0000x14C,0ass="sref">a vaPRI_JTAGu8a href="+codePRI_JTAG=m" c0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 463e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO15,u8a href="+codeGPIO157=m" c0000x150,0ass="sref">a vaPRI_JTAGu8a href="+codePRI_JTAG=m" c0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 464e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO158u8a href="+codeGPIO158=m" c0000x154,0ass="sref">a vaPRI_JTAGu8a href="+codePRI_JTAG=m" c0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 465e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO159u8a href="+codeGPIO159=m" c0000x158,0ass="sref">a vaPRI_JTAGu8a href="+codePRI_JTAG=m" c0ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaPWMef="+code=GRP_MPWM=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 466e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO160code[-v424.v4.4GPIO160=m" c0000x250,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaSMCu8a href="+codeSMC=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 467e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO16,u8a href="+codeGPIO161=m" c0000x210,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNANDu8a href="+codeNAND=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 468e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO16ref="+code=GRP_MMPIO162=m" c0000x20C,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 469e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO16,u8a href="+codeGPIO163=m" c0000x208,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 47/e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO164u8a href="+codeGPIO164=m" c0000x204,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 471e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO16,u8a href="+codeGPIO16,=m" c0000x1EC,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 472e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO16,u8a href="+codeGPIO166=m" c0000x1E8,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 473e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO16,u8a href="+codeGPIO167=m" c0000x1E4,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 474e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vGPIO168u8a href="+codeGPIO168=m" c0000x1E0,0ass="sref">a vaNANDu8a href="+codeNAND=m" c00000ass="sref">a vaGPIOcode[-v424.v4.4GPIO=m" c0000000ass="sref">a vaMMC,u8a href="+codeMMC,=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 475e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vTWSI4_SCLef="+code=GRP_MTWSI4_SCL=m" c00x2BC,0ass="sref">a vaTWSI4ef="+code=GRP_MTWSI4=m" c0000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 476e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vTWSI4_SDAcode[-v424.v4.4TWSI4_SDA=m" c00x2C0,0ass="sref">a vaTWSI4ef="+code=GRP_MTWSI4=m" c0000ass="sref">a vaLCDu8a href="+codeLCD=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 477e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vG_CLKREQcode[-v424.v4.4G_CLKREQ=m" c000x160,0ass="sref">a vaG_CLKREQcode[-v424.v4.4G_CLKREQ=m" c0ass="sref">a vaONE_WIREcode[-v424.v4.4ONE_WIRE=m" c000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 478e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vVCXO_REQcode[-v424.v4.4VCXO_REQ=m" c000x168,0ass="sref">a vaVCXO_REQcode[-v424.v4.4VCXO_REQ=m" c0ass="sref">a vaONE_WIREcode[-v424.v4.4ONE_WIRE=m" c000ass="sref">a vaPLLef="+code=GRP_MPLL=m" c00000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 479e" nam
  L40ass="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x16C,0ass="sref">a vaVCXO_OUTu8a href="+codeVCXO_OUT=m" c032K_CLKOUT,0ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c0000000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONEcode[-v424.v4.4NONE=m" )comment"> */8/spa>4. 48/e" n};omment"> */8/spa>4. 481e" nomment"> */8/spa>4. 48re" nstatic const unsigned0ass="sref">a vas/pi_uart1_="d,u8a href="+codes/pi_uart1_="d,e" n[] = {ass="sref">a vaGPIO29u8a href="+codeGPIO29=m" c0ass="sref">a vaGPIO30code[-v424.v4.4GPIO30=m" c0ass="sref">a vaGPIO3,u8a href="+codeGPIO31=m" c0ass="sref">a vaGPIO3ref="+code=GRP_MMPIO32=m" };omment"> */8/spa>4. 483e" nstatic const unsigned0ass="sref">a vas/pi_uart1_="dref="+code=GRP_Ms/pi_uart1_="dre" n[] = {ass="sref">a vaGPIO4,u8a href="+codeGPIO4,=m" c0ass="sref">a vaGPIO4,u8a href="+codeGPIO46=m" };omment"> */8/spa>4. 484e" nstatic const unsigned0ass="sref">a vas/pi_uart1_="d,u8a href="+codes/pi_uart1_="d,e" n[] = {ass="sref">a vaGPIO140code[-v424.v4.4GPIO140=m" c0ass="sref">a vaGPIO14,u8a href="+codeGPIO141=m" };omment"> */8/spa>4. 485e" nstatic const unsigned0ass="sref">a vas/pi_uart2_="d,u8a href="+codes/pi_uart2_="d,e" n[] = {ass="sref">a vaGPIO3,u8a href="+codeGPIO37=m" c0ass="sref">a vaGPIO38u8a href="+codeGPIO38=m" c0ass="sref">a vaGPIO39u8a href="+codeGPIO39=m" c0ass="sref">a vaGPIO40code[-v424.v4.4GPIO4/e" n};omment"> */8/spa>4. 486e" nstatic const unsigned0ass="sref">a vas/pi_uart2_="dref="+code=GRP_Ms/pi_uart2_="dre" n[] = {ass="sref">a vaGPIO4,u8a href="+codeGPIO43=m" c0ass="sref">a vaGPIO44u8a href="+codeGPIO44=m" c0ass="sref">a vaGPIO4,u8a href="+codeGPIO4,=m" c0ass="sref">a vaGPIO4,u8a href="+codeGPIO46=m" };omment"> */8/spa>4. 487e" nstatic const unsigned0ass="sref">a vas/pi_uart2_="d,u8a href="+codes/pi_uart2_="d,e" n[] = {ass="sref">a vaGPIO4,u8a href="+codeGPIO47=m" c0ass="sref">a vaGPIO48u8a href="+codeGPIO48=m" c0ass="sref">a vaGPIO49u8a href="+codeGPIO49=m" c0ass="sref">a vaGPIO50code[-v424.v4.4GPIO5/e" n};omment"> */8/spa>4. 488e" nstatic const unsigned0ass="sref">a vas/pi_uart2_="d4u8a href="+codes/pi_uart2_="d4e" n[] = {ass="sref">a vaGPIO74u8a href="+codeGPIO74=m" c0ass="sref">a vaGPIO7,u8a href="+codeGPIO7,=m" c0ass="sref">a vaGPIO7,u8a href="+codeGPIO76=m" c0ass="sref">a vaGPIO7,u8a href="+codeGPIO77e" n};omment"> */8/spa>4. 489e" nstatic const unsigned0ass="sref">a vas/pi_uart2_="d,u8a href="+codes/pi_uart2_="d,e" n[] = {ass="sref">a vaGPIO5,u8a href="+codeGPIO5,=m" c0ass="sref">a vaGPIO5,u8a href="+codeGPIO56=m" };omment"> */8/spa>4. 490e" nstatic const unsigned0ass="sref">a vas/pi_uart2_="d,u8a href="+codes/pi_uart2_="d,e" n[] = {ass="sref">a vaGPIO140code[-v424.v4.4GPIO140=m" c0ass="sref">a vaGPIO14,u8a href="+codeGPIO141=m" };omment"> */8/spa>4. 491e" nstatic const unsigned0ass="sref">a vas/pi_uart3des/pi_uart2_="d,e" n[] = {as2 = {agf2#L19" id  L19" cl49/p> 490e" nstatic co3=m" c00000ass="sref">a vaNONEcode[-v424 490e="+codeVCXO_OUT=m" c032K_">a GPIO147=m" c0000x230,0ass="sref">a vaNANDu8a hr]28a hrg=x230,O=m" c0000000ass="sref">a vaNONEcode[-v424.v7ss="sref">a vaMFPR_MMPref="+code=GRP_MMFPR_MMPre" nsref">GRP_MMode[-v424.v4.4NONE=m" c00000ass="sref">a vaNONE vas/pi_uart1_="d,u8a hrecdes/pi_uart2_="d,e" n[] = {ass9/p> 490eef="+codeGPIO149=m"3ned0a52>a vaNONEcode[-v424.v.4NONE=meGPIO149=m"3ned0a52>#L19" id  L19" cl49/5> 490e" nstatic co3=m" c00">a vaNONEcode[-v424.4.4NON230,O=m" c0000000ass="sref">a vaNONEcode[-v424IO3,u8a h9ef="+codeGPIO31=m" c0ass9"sref9>a vaGPIO3ref="+code=GRP_MMPIO32=m" };omment"> */8/3d0ass="sref">a vas/pi_uart2_=3d,u8a href="+codes/pi_uart2_="d,e">a vaNONEcode[-v424.v5O140code[-v424.v4.4GPIO140>a vaNONEcode[-v424.v6 unsigned0ass="sref">a vas>a vaNONEcode[-v424.v6f="+codeGPIO149=m"3ned0a52>a vaNONEcode[-v424.v6p2.c#L21" id  L21" cl48mm> 481e" nomment"> */8/spa9u8a href=9+codeGPIO4,=m" c0ass="sr9f">a 9aGPIO4,u8a href="+codeGPIO46=m" };omment"> */8/spa>3d0ass="sref">a vas/pi_uart2_=3d4u8a href="+codes/pi_uart2_="d4e"11a vaNONEcode[-v424.v41147=m" c0000x230,0ass="sre11a vaNONEcode[-v424.v41aGPIO49u8a href="+codeGPIO11a vaNONEcode[-v424.v41nsigned0ass="sref">a vas/p11a vaNONEcode[-v424.v4182.c#L21" id  L21" cl48mm> 481e" nomment"> */8/spa94. 485e" nstatic const unsign3pa>4. 490eef="+codeGPIO149=m"3ned0a52>a vaNONEcode[-v424.v.4NONEL21" id  L21" cl48mm> 481e" nomment"> */8/spa94. 486e" nstatic const unsign4.2#L19" id  L19" cl49/p> 490e" nstatic co3=m" c00000ass="sref">a vaNONEcode[-v424 490e="+codeVCXO_OUT=m" c032K_">a GPIO147=m" c0000x230,0ass="sref">a vaNANDu8a hr]28a hrg=x230,O=m" c0000000ass="sref">a vaNONEcode[-v4244. 487e" nstatic const unsign4d0ass="sref">a vas/pi_uart3de4/pi_uart2_="d,e" n[] = {as2 = {agf>a vaNONEcode[-v424.v6> 490e" nstatic co3=m" c00>a vaNONEcode[-v424.v6code[-v424 490e="+codeVCXO>a vaNONEcode[-v424.v6147=m" c0000x230,0ass="sre>a vaNONEcode[-v424.v6hrg=x230,O=m" c0000000ass="sref">a vaNONEcode[-v4244. 488e" nstatic const unsign40ass="sref">a vaNONE vas/pi_u4rt1_="d,u8a hrecdes/pi_uart2_="d,e n[] = {ass="sref">a vaGPIO4,u8a href="+codeGPIO47=m" c0ass="sref">a vaGPIO48u8a href="+codeGPIO48=m" c0ass="sref">a vaGPIO49u8a href="+codeGPIO49=m" c0ass="sref">a vaGPIO50code[-v424.v4.4GPIO5/e" n};omment"> */8/sp50IO7,u8a 50IO7ivers/pinctr488pinct50IO> 50Ic#L18" id  L18" cl48mm> 488e" nstatic const unsign40asss="sref">a vas/pi_uart2_=4d,u8a href="+codes/pi_uart2_="d,e"11a vaNONEcode[-v424.v41147=m" c0000x230,0ass="sre11a vaNONEcode[-v424.v41aGPIO49u8a href="+codeGPIO11a vaNONEcode[-v424.v41nsigned0ass="sref">a vas/p11a vaNONEcode[-v424.v4182.c#L21" id  L21" cl48mm> 481e" nomment"> */8/sp501O7,u8a 50+codeGPIO5,=m" c0ass="s50+c> 50aGPIO5,u8a href="+codeGPIO56=m" };omment"> */8/spa>4d0ass="sref">a vas/pi_uart2_=4d4u8a href="+codes/pi_uart2_="d4e" a vaNONEcode[-v424.v5O140code[-v424.v4.4GPIO140>a vaNONEcode[-v424.v6 unsiL21" id  L21" cl48mm> 481e" nomment"> */8/sp502O7,u8a 50"drivers/pinctr491pinct50"d> 50.c#L21" id  L21" cl49mm> 491e" nstatic const unkpdk.a vas/p1a vaNONEcode[-v424.v4nsigned0ass="sref">a vas/p1a vaNONEcode[-v424.v4+codes/pi_uart2_="d,e" n[]1a vaNONEcode[-v424.v49unsiL21" id  L21" cl48mm> 481e" nomment"> */8/sp503O7,u8a 50f">a vaMFPR_MMPref="+co50f"> 50MFPR_MMPre" nsref">GRP_MMode[-v424.v4.4NONE=m" kpdk.a vas/pi_uarkpdk.a vas/p1a vaNONEcode[-v424.v4nsignL21" id  L21" cl48mm> 481e" nomment"> */8/sp504O7,u8a 50ef="+codeGPIO31=m" c0as50ef> 50>a vaGPIO3ref="+code=GRP_MMPIO32=m" };omment"> twsi4. 490e" nstatic const unsigned0ass="sref">a vas/pi_uart2_="d,u8a href="+codeL21" id  L21" cl48mm> 481e" nomment"> */8/sp505O7,u8a 50+codeGPIO4,=m" c0ass="s50+c> 50aGPIO4,u8a href="+codeGPIO46=m" };omment"> */8/twsi4.a vas/pi_uartwsi4. = {ass="sref">a vaGPIO140code[-v424.v4.4GPIO140=m" c0ass="sref">a vaGPIO14,u8a href="+codeGPIO141=m" };omment"> */8/sp506O7,u8a 50"drivers/pinctr485pinct50"d> 50 href=" id  L24" cl48,u> 485e" nstatic const untwsi4.a vaNONE vas/twsi4.2#L19" id  L19" cl49/p> 490e" nstatic co3=m" c00000ass="sref">a vaNONEcode[,u8a href="+codeGPIO141=m" };omment"> */8/sp507O7,u8a 50"drivers/pinctr486pinct50"d> 50.c#L26" id  L26" cl48mm> 486e" nstatic const untwsi4.a vas/pi_uartwsi4. 490e" nstatic co3=m" c00">a vaNONEcode[-v424.4.4NON230,O=m" c0000000ass="sref">a vaNONEcode[-v4508O7,u8a 50"drivers/pinctr487pinct50"d> 50.c#L27" id  L27" cl48mm> 487e" nstatic const untwsi4.a vas/pi_uartwsi4.a vaGPIO74u8a href="+codeGPIO74=m" c0ass="sref">a vaGPIO7,u8a href="+codeGPIO7,=m" c0ass="sref">a va509O7,u8a 50"drivers/pinctr488pinct50"d> 50.c#L18" id  L18" cl48mm> 488e" nstatic const untwsi4. 481e" nomment"> */8/sp51IO7,u8a 51IO7ivers/pinctr488pinct51IO> 51Ic#L18" id  L18" cl48mm> 488e" nstatic const untwsi4.a vas/pi_uartwsis/pi_uart2_="d,e" n[] = {as2 = {agf9n[] = {ass="sref">a 9aGPIO74u8a href="+codeGPIO94=m" c0ass="sref">a 9aGPIO7,u8a href="+codeGPIO7,=m" c0ass="sref">a va511O7,u8a 51+codeGPIO5,=m" c0ass="s51+c> 51aGPIO5,u8a href="+codeGPIO56=m" };omment"> */8/twsi4.a vaNONEcode[-v424.v4.4NONE=m" c0" n[] = {as2 = sref">a vaNONEcode[-v424.v4.4NONE=m" 7,u8a href="+codeGPIO7,=m" c0ass="sref">a va512O7,u8a 51"drivers/pinctr491pinct51"d> 51.c#L21" id  L21" cl49mm> 491e" nstatic const untwsi5.2 n[] = {ass9/p> 490e4f="+codeGPIO149=m"3ned0a52 vaNONEcode[-v424.v4.44NONEL21" id  L21" cl48mm> 481e" nomment"> */8/sp513O7,u8a 51f">a vaMFPR_MMPref="+co51f"> 51MFPR_MMPre" nsref">GRP_MMode[-v424.v4.4NONE=m" twsi5ctrls="sref">a vas/pi_uartwsi5/pi_uart2_="d,e" n[] = {as2 = {agf8>a vaNONEcode[-v424.8aGPIO4,u8a href="+codeGPIO8n[] = {ass="sref">a vaGPIOL21" id  L21" cl48mm> 481e" nomment"> */8/sp514O7,u8a 51ef="+codeGPIO31=m" c0as51ef> 51>a vaGPIO3ref="+code=GRP_MMPIO32=m" };omment"> twsi5.a vaNONE vas/twsi5.9= {ass="sref">a vaGP9O140code[-v424.v4.4GPIO14010m> 489e" nstatic cons0PIO14,u8a href="+codeGPIO141=m" };omment"> */8/sp515O7,u8a 51+codeGPIO4,=m" c0ass="s51+c> 51aGPIO4,u8a href="+codeGPIO46=m" };omment"> */8/twsi6.2n[] = {ass="sref">a vaGPIO4,u8a href="+codeGPIO43=m" c0ass="sref">a vaGPIO,u8a href="+codeGPIO141=m" };omment"> */8/sp516O7,u8a 51"drivers/pinctr485pinct51"d> 51 href=" id  L24" cl48,u> 485e" nstatic const untwsi6ctrls="sref">a vas/pi_uartwsi6/pi_uart2_="d,e" n[] = {as2 = {agf84=m" c0ass="sref">a 8.signed0ass="sref">a vas/p8n[] = {ass="sref">a 8nsignL21" id  L21" cl48mm> 481e" nomment"> */8/sp517O7,u8a 51"drivers/pinctr486pinct51"d> 51.c#L26" id  L26" cl48mm> 486e" nstatic const untwsi6.a vaNONE vas/twsi6.9n[] = {ass="sref">a 9aGPIO4,u8a href="+codeGPIO93=m" c0ass="sref">a 9aGPIO,u8a href="+codeGPIO141=m" };omment"> */8/sp518O7,u8a 51"drivers/pinctr487pinct51"d> 51.c#L27" id  L27" cl48mm> 487e" nstatic const unccic">a vaNONEcode[-v424.v4.4Nccic">a va href="+codes/pi_uart2_="d,e"1a vaNONEcode[-v424.v44NONE=meGPIO149=m"3ned0a521a vaNONEcode[-v424.v4> 490e" nstatic co3=m" c001>a vaNONEcode[-v424.1aGPIO4,u8a href="+codeGPIO1a vaNONEcode[-v424.v4aGPIO78a href="+codeGPIO141=m" };omment"> */8/sp519O7,u8a 51"drivers/pinctr488pinct51"d> 51[-v424.v4.4ONE_WIRE=m" c000ad,e"1a vaNONEcode[-v424.v4.signed0ass="sref">a vas/p1a vaNONEcode[-v424.v4nsigned0ass="sref">a vas/p1a vaNONEcode[-v424.v4+codes/pi_uart2_="d,e" n[]1a vaNONEcode[-v424.v49unsis/pi_uart2_="d,e" n[]2m> 489e" nstatic con2 unsigned0ass="sref">a vas2 n[] = {ass9/p> 490e2f="+codeGPIO149=m"3ned0a522a vaNONEcode[-v424.v24NONE=meGPIO149=m"3ned0a522a vaNONEcode[-v424.v23GPIO,u8a href="+codeGPIO141=m" };omment"> */8/sp52IO7,u8a 52IO7ivers/pinctr488pinct52IO> 52Ic#L18" id  L18" cl48mm> 488e" nstatic const unccic">a vs="sref">a vas/pi_uarccic">a vs href="+codes/pi_uart2_="d,e">a vaNONEcode[-v424.v5O140code[-v424.v4.4GPIO140>a vaNONEcode[-v424.v6 unsigned0ass="sref">a vas>a vaNONEcode[-v424.v6f="+codeGPIO149=m"3ned0a52>a vaNONEcode[-v424.v6p2.c#78a href="+codeGPIO141=m" };omment"> */8/sp521O7,u8a 52+codeGPIO5,=m" c0ass="s52+c> 52-v424.v4.4GPIO=m" c0000000as{agf>a vaNONEcode[-v424.v6> 490e" nstatic co3=m" c00>a vaNONEcode[-v424.v6code[-v424 490e="+codeVCXO>a vaNONEcode[-v424.v6147=m" c0000x230,0ass="sre>a vaNONEcode[-v424.v6hrg=x" c0000x230,0ass="sre>a vaNONEcode[-v424.v6nsigned0ass="sref">a vas/p>a vaNONEcode[-v424.v6+codes/pi_uart2_="d,e" n[]6a vaNONEcode[-v424.v6O140code[-v424.v4.4GPIO1407a vaNONEcode[-v424.v7PIO14,u8a href="+codeGPIO141=m" };omment"> */8/sp522O7,u8a 52"drivers/pinctr491pinct52"d> 52.c#L21" id  L21" cl49mm> 491e" nstatic const unccic4.a vaNONEcode[-v424.v5O140code[-v424.v4.4GPIO140>a vaNONEcode[-v424.v6 unsigned0ass="sref">a vas>a vaNONEcode[-v424.v6f="+codeGPIO149=m"3ned0a52>a vaNONEcode[-v424.v6p2.c#78a href="+codeGPIO141=m" };omment"> */8/sp523O7,u8a 52f">a vaMFPR_MMPref="+co52f"> 52-v424.v4.4GPIO=m" c0000000as{agf>a vaNONEcode[-v424.v6> 490e" nstatic co3=m" c00>a vaNONEcode[-v424.v6code[-v424 490e="+codeVCXO>a vaNONEcode[-v424.v6147=m" c0000x230,0ass="sre>a vaNONEcode[-v424.v6hrg=x" c0000x230,0ass="sre>a vaNONEcode[-v424.v6nsigned0ass="sref">a vas/p>a vaNONEcode[-v424.v6+codes/pi_uart2_="d,e" n[]6a vaNONEcode[-v424.v6O140code[-v424.v4.4GPIO1407a vaNONEcode[-v424.v7PIO14,u8a href="+codeGPIO141=m" };omment"> */8/sp524O7,u8a 52ef="+codeGPIO31=m" c0as52ef> 52>a vaGPIO3ref="+code=GRP_MMPIO32=m" };omment"> ccic4.a vas/pi_uarccic4.8a vaNONEcode[-v424.v84NONE=meGPIO149=m"3ned0a528a vaNONEcode[-v424.v8> 490e" nstatic co3=m" c0084=m" c0ass="sref">a 8.signed0ass="sref">a vas/p8n[] = {ass="sref">a 8nsign78a href="+codeGPIO141=m" };omment"> */8/sp525O7,u8a 52+codeGPIO4,=m" c0ass="s52+c> 52-v424.v4.4GPIO=m" c0000000as">a 8a vaNONEcode[-v424.v8+codes/pi_uart2_="d,e" n[]8a vaNONEcode[-v424.v8O140code[-v424.v4.4GPIO1409a vaNONEcode[-v424.v9 unsigned0ass="sref">a vas9a vaNONEcode[-v424.v9f="+codeGPIO149=m"3ned0a529a vaNONEcode[-v424.v94NONE=meGPIO149=m"3ned0a529a vaNONEcode[-v424.v9> 490e" nstatic co3=m" c009a vaNONEcode[-v424.v9code[-v424 490e="+codeVCXO9n[] = {ass="sref">a 9aGPIO,u8a href="+codeGPIO141=m" };omment"> */8/sp526O7,u8a 52"drivers/pinctr485pinct52"d> 52 href=" id  L24" cl48,u> 485e" nstatic const unslpi.a vaNONEcode[-v424.v5O140code[-v424.v4.4GPIO140>a vaNONEcode[-v424.v6 unsigned0ass="sref">a vas>a vaNONEcode[-v424.v6f="+codeGPIO149=m"3ned0a52>a vaNONEcode[-v424.v6p2.c#78a href="+codeGPIO141=m" };omment"> */8/sp527O7,u8a 52"drivers/pinctr486pinct52"d> 52ref="+codeLCD=m" c00000000as{agf>a vaNONEcode[-v424.v6> 490e" nstatic co3=m" c00>a vaNONEcode[-v424.v6code[-v424 490e="+codeVCXO>a vaNONEcode[-v424.v6147=m" c0000x230,0ass="sre>a vaNONEcode[-v424.v6hrg=x" c0000x230,0ass="sre>a vaNONEcode[-v424.v6nsigned0ass="sref">a vas/p>a vaNONEcode[-v424.v6+codes/pi_uart2_="d,e" n[]6a vaNONEcode[-v424.v6O140code[-v424.v4.4GPIO1407a vaNONEcode[-v424.v7PIO14,u8a href="+codeGPIO141=m" };omment"> */8/sp528O7,u8a 52"drivers/pinctr487pinct52"d> 52.c#L27" id  L27" cl48mm> 487e" nstatic const unro.a vas/p1a vaNONEcode[-v424.v4nsignL21" id  L21" cl48mm> 481e" nomment"> */8/sp529O7,u8a 52"drivers/pinctr488pinct52"d> 52.c#L18" id  L18" cl48mm> 488e" nstatic const unro.a vas/pi_uarro. 481e" nomment"> */8/sp53IO7,u8a 53IO7ivers/pinctr488pinct53IO> 53Ic#L18" id  L18" cl48mm> 488e" nstatic const unro.a vaNONE vas/ro. n[] = {ass9/p> 490eef="+codeGPIO149=m"3ned0a52>a vaNONEcode[-v424.v.4NONEL21" id  L21" cl48mm> 481e" nomment"> */8/sp531O7,u8a 53+codeGPIO5,=m" c0ass="s53+c> 53aGPIO5,u8a href="+codeGPIO56=m" };omment"> */8/ro.a vas/pi_uarro.a vaGPIO74u8a href="+codeGPIO74=m" c0ass="sref">a vaGPIO7,u8a href="+codeGPIO7,=m" c0ass="sref">a va532O7,u8a 53"drivers/pinctr491pinct53"d> 53.c#L21" id  L21" cl49mm> 491e" nstatic const uni2s.a 2aGPIO74u8a href="+codeGPIO24=m" c0ass="sref">a 2.signed0ass="sref">a vas/p2a vaNONEcode[-v424.v2nsign78a href="+codeGPIO141=m" };omment"> */8/sp533O7,u8a 53f">a vaMFPR_MMPref="+co53f"> 53-v424.v4.4GPIO=m" c0000000as{agf2a vaNONEcode[-v424.v2aGPIO,u8a href="+codeGPIO141=m" };omment"> */8/sp534O7,u8a 53ef="+codeGPIO31=m" c0as53ef> 53>a vaGPIO3ref="+code=GRP_MMPIO32=m" };omment"> i2s.a vas/pi_uari2s. 490e" nstatic co3=m" c003a vaNONEcode[-v424.v3code[-v424 490e="+codeVCXO3n[] = {ass="sref">a 3aGPIO74u8a href="+codeGPIO34=m" c0ass="sref">a 3aGPIO7,u8a href="+codeGPIO7,=m" c0ass="sref">a va535O7,u8a 53+codeGPIO4,=m" c0ass="s53+c> 53aGPIO4,u8a href="+codeGPIO46=m" };omment"> */8/ssp">a vaNONEcode[-v424.v4.4Nssp">a va href="+codes/pi_uart2_="d4e"3490e" nstatic const unsigned0ass="sref">a vas/pi_uart2_="d,u8a href="+codes/pi_uart2_="d,e" n[] = {ass="sref">a vaGPIO140code[-v424.v4.4GPIO140=m" c0ass="sref">a vaGPIO14,u8a href="+codeGPIO141=m" };omment"> */8/sp536O7,u8a 53"drivers/pinctr485pinct53"d> 53 href=" id  L24" cl48,u> 485e" nstatic const unssp">a vs="sref">a vas/pi_uarssp">a vs9/pi2.c#L19" id  L19" cl49/p>2#L19" id  L19" cl49/p> 490e" nstatic co3=m" c00000ass="sref">a vaNONEcode[-v424 490e="+codeVCXO_OUT=m" c032K_">a GPIO147=m" c0000x230,0ass="sref">a vaNANDu8a hr]28a hrg=x230,O=m" c0000000ass="sref">a vaNONEcode[-v4537O7,u8a 53"drivers/pinctr486pinct53"d> 53.c#L26" id  L26" cl48mm> 486e" nstatic const unssp">a v="sref">a vaNONE vas/ssp">a v= href="+codes/pi_uart2_="d,e"11a vaNONEcode[-v424.v41147=m" c0000x230,0ass="sre11a vaNONEcode[-v424.v41aGPIO49u8a href="+codeGPIO11a vaNONEcode[-v424.v41nsigned0ass="sref">a vas/p11a vaNONEcode[-v424.v4182.c#L21" id  L21" cl48mm> 481e" nomment"> */8/sp538O7,u8a 53"drivers/pinctr487pinct53"d> 53.c#L27" id  L27" cl48mm> 487e" nstatic const unssp4.2n[] = {ass="sref">a vaGPIO4,u8a href="+codeGPIO43=m" c0ass="sref">a vaGPIO44u8a href="+codeGPIO44=m" c0ass="sref">a vaGPIO4,u8a href="+codeGPIO4,=m" c0ass="sref">a vaGPIO4,u8a href="+codeGPIO46=m" };omment"> */8/sp539O7,u8a 53"drivers/pinctr488pinct53"d> 53.c#L18" id  L18" cl48mm> 488e" nstatic const unssp4. 489e" nstatic con12 unsigned0ass="sref">a vas12 n[] = {ass9/p> 490e12f="+codeGPIO149=m"3ned0a5212a vaNONEcode[-v424.v124NONEL21" id  L21" cl48mm> 481e" nomment"> */8/sp54IO7,u8a 54IO7ivers/pinctr488pinct54IO> 54Ic#L18" id  L18" cl48mm> 488e" nstatic const unssp4.a vas/pi_uarssps/pi_uart2_="d,e" n[] = {as2 = {agf1s/pinctr481pinctrl48m134NONE=meGPIO149=m"3ned0a521aa vaNONEcode[-v424.v4>> 490e" nstatic co3=m" c001aa vaNONEcode[-v424.v4>> 490e" nstatic co3=m" c001aa vaNONEcode[-v424.v43aGPIO7,u8a href="+codeGPIO7,=m" c0ass="sref">a va541O7,u8a 54+codeGPIO5,=m" c0ass="s54+c> 54aGPIO5,u8a href="+codeGPIO56=m" };omment"> */8/sspa4.2n[] = {ass="sref">a 2aGPIO74u8a href="+codeGPIO24=m" c0ass="sref">a 2.signed0ass="sref">a vas/p2a vaNONEcode[-v424.v2nsign7IO=m" c0000000as{agf2a vaNONEcode[-v424.v2aGPIO,u8a href="+codeGPIO141=m" };omment"> */8/sp542O7,u8a 54"drivers/pinctr491pinct54"d> 54.c#L21" id  L21" cl49mm> 491e" nstatic const unsspa4.a vas/pi_uarsspa4. a vaNONEcode[-v424.v3> 490e" nstatic co3=m" c003a vaNONEcode[-v424.v3code[-v424 490e="+codeVCXO3n[] = {ass="sref">a 3aGPIO74u8a href="+codeGPIO34=m" c0ass="sref">a 3aGPIO7,u8a href="+codeGPIO7,=m" c0ass="sref">a va543O7,u8a 54f">a vaMFPR_MMPref="+co54f"> 54MFPR_MMPre" nsref">GRP_MMode[-v424.v4.4NONE=m" mmc">a vaNONEcode[-v424.v4.4Nmmc">a vaart2_="d,e" n[] = {as2 = {agf1s n[] = {ass9/p> 490e1> */8/spa>4.> 490e" nstatic co3=m" c001a>a vaNONEcode[-v424.13code[-u8a href="+codeGPIO7,=m" c0ass="sref">a va544O7,u8a 54ef="+codeGPIO31=m" c0as54ef> 54-v424.v4.4GPIO=m" c0000000as c001aa vaNONEcode[-v424.v43aGPIOe" nstatic co3=m" c001aa vaNONEcode[-v424.v4IO140code[-v424.v4.4GPIO1408mm> 489e" nstatic const unsigned0ass="sref">a vas/pi_uart2_="d,u8a href="+codes/pi_uart2_="d,e" n[] = {ass="sref">a vaGPIO545O7,u8a 54+codeGPIO4,=m" c0ass="s54+c> 54aGPIO4,u8a href="+codeGPIO46=m" };omment"> */8/mmc4.a vas/pi_uart2_="d,u8a href="+codes/pi_uart2_="d,e" n[] = {ass="sref">a vaGPIO140code[-v424.v4.4GPIO140=m" c0ass="sref">a vaGPIO14-u8a href="+codeGPIO7,=m" c0ass="sref">a va546O7,u8a 54"drivers/pinctr485pinct54"d> 54ref="+codeLCD=m" c00000000asa vaG n[] = {ass9/p> 490e4f="+codeGPIO149=m"3ned0a52 vaNONEcode[-v424.v4.44NONEL21" id  L21" cl48mm> 481e" nomment"> */8/sp547O7,u8a 54"drivers/pinctr486pinct54"d> 54.c#L26" id  L26" cl48mm> 486e" nstatic const unmmc4. n[] = {ass9/p> 490e1ef="+codeGPIO149=m"3ned0a52">a vaNONEcode[-v424.v4.4NONE=1" id  L21" cl48mm> 481e" nomment"> */8/sp548O7,u8a 54"drivers/pinctr487pinct54"d> 54-v424.v4.4ONE_WIRE=m" c000as24.v4.a vaNONEcode[-v424.v4.4NONE=m_WIRE=m" c000as24.v4.a vaNONEcode[-v424.v4.4NONE=m_WIRE=m" c000as24.v4.a vaNONEcode[-v424.v46147=m" c0000x230,0ass="sre">a vaNONEcode[-v424.v4.4NONE=mc0000x230,0ass="sre">a vaNONEcode[-v424.v4.4NONE=mc0000x230,0ass="sre">a vaNONEcode[-v424.v4.4NONEL21" id  L21" cl48mm> 481e" nomment"> */8/sp549O7,u8a 54"drivers/pinctr488pinct54"d> 5vaGPIO1" id  L21" cl48mm> 481e" nomment"> */8/sp55IO7,u8a 55IO7ivers/pinctr488pinct55IO> 55Ic#L18" id  structmc0000x230,0ass=pxa3xx. 481e" nomment"> */8/sp551O7,u8a 55+codeGPIO5,=m" c0ass="s55+c> 55-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("ctr48 4p1" UART NONE=mc0000x230,0ass=nctr49ref">a vaNONEcode[-v424.v4.4NONE=m" c00000aP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x552O7,u8a 55"drivers/pinctr491pinct55"d> 55-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("ctr48 2p2" UART NONE=mc0000x230,0ass=nctr49ref">a vs="sref">a vas/pi_uart1_="d,u8a hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x553O7,u8a 55f">a vaMFPR_MMPref="+co55f"> 55-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("ctr48 2p3" UART NONE=mc0000x230,0ass=nctr49ref">a v. 55-v424.v4.4GPIO=m" c0000000as RPsref">a vaPLLef="+co{RPsref"v424("ctr42 4p1"a vaPLLef="+coUART"NONE=mc0000x230,0ass=nctr49ref4.a vaPLLef="+co{RPsref"v424("ctr42 4p2"a vaPLLef="+coUART"NONE=mc0000x230,0ass=nctr49ref4.a vas/pi_uart2_="d,u8a hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x556O7,u8a 55"drivers/pinctr485pinct55"d> 55ref="+codeLCD=m" c00000000asaRPsref">a vaPLLef="+co{RPsref"v424("ctr42 4p3"a vaPLLef="+coUART"NONE=mc0000x230,0ass=nctr49ref4.a vas/pi_uart2_="dref="+coP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x557O7,u8a 55"drivers/pinctr486pinct55"d> 55ref="+codeLCD=m" c00000000as{RPsref">a vaPLLef="+co{RPsref"v424("ctr42 4p4"a vaPLLef="+coUART"NONE=mc0000x230,0ass=nctr49ref4.a vas/pi_uart2_="d,u8a hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x558O7,u8a 55"drivers/pinctr487pinct55"d> 55-v424.v4.4ONE_WIRE=m" c000as2RPsref">a vaPLLef="+co{RPsref"v424("ctr42 2p5"a vaPLLef="+coUART"NONE=mc0000x230,0ass=nctr49ref4.a vas/pi_uart2_="d4u8a hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x559O7,u8a 55"drivers/pinctr488pinct55"d> 55[-v424.v4.4ONE_WIRE=m" c000adRPsref">a vaPLLef="+co{RPsref"v424("ctr42 2p6"a vaPLLef="+coUART"NONE=mc0000x230,0ass=nctr49ref4. 56-v424.v4.4GPIO=m" c0000000asdRPsref">a vaPLLef="+co{RPsref"v424("ctr43 4p1"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4.a vaPLLef="+co{RPsref"v424("ctr43 4p2"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4.a vas/pi_uart3des/pi_uart2P2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x562O7,u8a 56"drivers/pinctr491pinct56"d> 56-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("ctr43 4p3"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4.a vaNONE vas/pi_uart1_="d,uP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x563O7,u8a 56f">a vaMFPR_MMPref="+co56f"> 56-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("ctr43 4p4"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4.a vas/pi_uart2_=3d,u8a hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x564O7,u8a 56ef="+codeGPIO31=m" c0as56ef> 56-v424.v4.4GPIO=m" c0000000as RPsref">a vaPLLef="+co{RPsref"v424("ctr43 4p5"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4.a vas/pi_uart2_=3d4u8a hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x565O7,u8a 56+codeGPIO4,=m" c0ass="s56+c> 56-v424.v4.4GPIO=m" c0000000as"RPsref">a vaPLLef="+co{RPsref"v424("ctr43 2p6"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4. 56ref="+codeLCD=m" c00000000asaRPsref">a vaPLLef="+co{RPsref"v424("ctr44 4p1"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4. 56ref="+codeLCD=m" c00000000as{RPsref">a vaPLLef="+co{RPsref"v424("ctr44 4p2"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4.a vas/pi_uart3de4/pi_uart2P2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x568O7,u8a 56"drivers/pinctr487pinct56"d> 56-v424.v4.4ONE_WIRE=m" c000as2RPsref">a vaPLLef="+co{RPsref"v424("ctr44 4p3"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4.a vaNONE vas/pi_u4rt1_="d,uP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x569O7,u8a 56"drivers/pinctr488pinct56"d> 56[-v424.v4.4ONE_WIRE=m" c000adRPsref">a vaPLLef="+co{RPsref"v424("ctr44 4p4"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4.a vas/pi_uart2_=4d,u8a hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x57IO7,u8a 57IO7ivers/pinctr488pinct57IO> 57-v424.v4.4GPIO=m" c0000000asdRPsref">a vaPLLef="+co{RPsref"v424("ctr44 2p5"a vas/pUARTsNONE=mc0000x230,0ass=nctr49ref4.a vas/pi_uart2_=4d4u8a hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x571O7,u8a 57+codeGPIO5,=m" c0ass="s57+c> 57-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("kpdk 4p1"a vaPLLef="+coKP_DKNONE=mc0000x230,0ass=nctr4kpdk. 57-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("kpdk 4p2"a vaPLLef="+coKP_DKNONE=mc0000x230,0ass=nctr4kpdk.a vas/pi_uarkpdk.a vaMFPR_MMPref="+co57f"> 57-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("twsi4-1"a vaPLLef="+co.v4."NONE=mc0000x230,0ass=nctr4twsi4. 57-v424.v4.4GPIO=m" c0000000as RPsref">a vaPLLef="+co{RPsref"v424("twsi4-2"a vaPLLef="+co.v4."NONE=mc0000x230,0ass=nctr4twsi4.a vas/pi_uartwsi4.a vaPLLef="+co{RPsref"v424("twsi4-3"a vaPLLef="+co.v4."NONE=mc0000x230,0ass=nctr4twsi4.a vaNONE vas/twsi4. 57ref="+codeLCD=m" c00000000asaRPsref">a vaPLLef="+co{RPsref"v424("twsi4-4"a vaPLLef="+co.v4."NONE=mc0000x230,0ass=nctr4twsi4.a vas/pi_uartwsi4. 57ref="+codeLCD=m" c00000000as{RPsref">a vaPLLef="+co{RPsref"v424("twsi4-5"a vaPLLef="+co.v4."NONE=mc0000x230,0ass=nctr4twsi4.a vas/pi_uartwsi4. 57-v424.v4.4ONE_WIRE=m" c000as2RPsref">a vaPLLef="+co{RPsref"v424("twsis-1"a vaNONE.v4.=NONE=mc0000x230,0ass=nctr4twsi4. 57[-v424.v4.4ONE_WIRE=m" c000adRPsref">a vaPLLef="+co{RPsref"v424("twsis-2"a vaNONE.v4.=NONE=mc0000x230,0ass=nctr4twsi4.a vas/pi_uartwsis/pi_uart2P2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x56C,0ass="5ref">a vaVCXO_OUTu8a hre5="+co58-v424.v4.4GPIO=m" c0000000asdRPsref">a vaPLLef="+co{RPsref"v424("twsi4"a vas/p.v4.sNONE=mc0000x230,0ass=nctr4twsi4.a v58-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("twsi5-1"a vas/p.v4.sNONE=mc0000x230,0ass=nctr4twsi5. 58-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("twsi5-2"a vas/p.v4.sNONE=mc0000x230,0ass=nctr4twsi5.a vas/pi_uartwsi5/pi_uart2P2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x563O7,u8a 58f">a vaMFPR_MMPref="+co58f"> 58-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("twsi5-3"a vas/p.v4.sNONE=mc0000x230,0ass=nctr4twsi5.a vaNONE vas/twsi5. 58-v424.v4.4GPIO=m" c0000000as RPsref">a vaPLLef="+co{RPsref"v424("twsi6-1"a vaPLLef="+co{RPsref"v424("twsi6-2"a vas/pi_uartwsi6/pi_uart2P2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x566O7,u8a 58"drivers/pinctr485pinct58"d> 58ref="+codeLCD=m" c00000000asaRPsref">a vaPLLef="+co{RPsref"v424("twsi6-3"a vaNONE vas/twsi6. 58ref="+codeLCD=m" c00000000as{RPsref">a vaPLLef="+co{RPsref"v424("ccic"-1"a vaNONEcode[-v424.v4.4Nccic">a va hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x568O7,u8a 58"drivers/pinctr487pinct58"d> 58-v424.v4.4ONE_WIRE=m" c000as2RPsref">a vaPLLef="+co{RPsref"v424("ccic"-2"a vs="sref">a vas/pi_uarccic">a vs hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x569O7,u8a 5="drivers/pinctr488pinct5l48mm58[-v424.v4.4ONE_WIRE=m" c000adRPsref">a vaPLLef="+co{RPsref"v424("ccic4-1"a vaPLLef="+coCCIC"NONE=mc0000x230,0ass=nctr4ccic4.a vaPLLef="+co{RPsref"v424("ccic4-1"a vaPLLef="+coCCIC"NONE=mc0000x230,0ass=nctr4ccic4.a vas/pi_uarccic4.a vaPLLef="+co{RPsref"v424("clpi"a vas/pULPINONE=mc0000x230,0ass=nctr49lpi.a vaPLLef="+co{RPsref"v424("ro-1"a vaPLLef="+coROTNONE=mc0000x230,0ass=nctr4ro.a vaMFPR_MMPref="+co5e=GRP59-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("ro-2"a vaPLLef="+coROTNONE=mc0000x230,0ass=nctr4ro.a vas/pi_uarro.a vaPLLef="+co{RPsref"v424("ro-3"a vaPLLef="+coROTNONE=mc0000x230,0ass=nctr4ro.a vaNONE vas/ro.a59-v424.v4.4GPIO=m" c0000000as"RPsref">a vaPLLef="+co{RPsref"v424("ro-4"a vaPLLef="+coROTNONE=mc0000x230,0ass=nctr4ro.a vas/pi_uarro.a vaPLLef="+co{RPsref"v424("i2s 5p1"a vaPLLef="+coI2SNONE=mc0000x230,0ass=nctr4i2s.a vaPLLef="+co{RPsref"v424("i2s 4p2"a vaPLLef="+coI2SNONE=mc0000x230,0ass=nctr4i2s.a vas/pi_uari2s.a vaPLLef="+co{RPsref"v424("ssp" 4p1"a vaNONEcode[-v424.v4.4Nssp">a va hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x5P9O7,u8a 59"drivers/pinctr488pinct5948mm59[-v424.v4.4ONE_WIRE=m" c000adRPsref">a vaPLLef="+co{RPsref"v424("ssp" 4p2"a vs="sref">a vas/pi_uarssp">a vs9/piP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x60IO7,u8a 60IO7ivers/pinctr488pinct60IO> 60-v424.v4.4GPIO=m" c0000000asdRPsref">a vaPLLef="+co{RPsref"v424("ssp" 4p3"a v="sref">a vaNONE vas/ssp">a v= hreP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x601O7,u8a 60ONE=m" c0000000ass="sre60+c> 60-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("ssp4 4p1"a vaPLLef="+coSSP"NONE=mc0000x230,0ass=nctr4ssp4. 60-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("ssps 4p1"a vaNONESSP=NONE=mc0000x230,0ass=nctr4ssp4.a vaMFPR_MMPref="+co60f"> 60-v424.v4.4GPIO=m" c0000000as{RPsref">a vaPLLef="+co{RPsref"v424("ssps 4p2"a vaNONESSP=NONE=mc0000x230,0ass=nctr4ssp4.a vas/pi_uarssps/pi_uart2P2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x604O7,u8a 60ef="+codeGPIO31=m" c0as60ef> 60-v424.v4.4GPIO=m" c0000000as RPsref">a vaPLLef="+co{RPsref"v424("sspa4 4p1"a vaPLLef="+coSSPA"NONE=mc0000x230,0ass=nctr4sspa4.a vaPLLef="+co{RPsref"v424("sspa4 4p2"a vaPLLef="+coSSPA"NONE=mc0000x230,0ass=nctr4sspa4.a vas/pi_uarsspa4. 60ref="+codeLCD=m" c00000000asaRPsref">a vaPLLef="+co{RPsref"v424("mmc" 8p1"a vaNONEcode[-v424.v4.4Nmmc">a vaart2P2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x607O7,u8a 60"drivers/pinctr486pinct60"d> 60ref="+codeLCD=m" c00000000as{RPsref">a vaPLLef="+co{RPsref"v424("mmc4 6p1"a vaPLLef="+coMMC"NONE=mc0000x230,0ass=nctr4mmc4. 60-v424.v4.4ONE_WIRE=m" c000as2RPsref">a vaPLLef="+co{RPsref"v424("mmc4 10p1"a vaNONEMMC=NONE=mc0000x230,0ass=nctr4mmc4. 609unsiL21" id  L21" cl48mm> 481e" nomment"> */8/sp61IO7,u8a 61IO7ivers/pinctr488pinct61IO> 61Ic#L11" id  L21" cl48mm> 481e" nomment"> */8/sp611O7,u8a 61+codeGPIO5,=m" c0ass="s61+c> 61aGPIO5,u8a href="+char *href="+c0000x230,0ass=nctr49tr483grpsref="drivers/pinctr49tr483grpsGPIOf="+codspana vaPLLeftring">"ctr48 4p1""ctr48 2p2" 481e" nomment"> */8/sp612O7,u8a 61"drivers/pinctr491pinct61"d> 61-v424.v4.4GPIOspana vaPLLeftring">"ctr48 2p3" 481e" nomment"> */8/sp613O7,u8a 61f">a vaMFPR_MMPref="+co61f"> 61MFPR_MMPre" nsref"char *href="+c0000x230,0ass=nctr49tr4ungrpsref="drivers/pinctr49tr4ungrpsGPIOf="+codspana vaPLLeftring">"ctr44 4p1""ctr42 4p2" 481e" nomment"> */8/sp614O7,u8a 61ef="+codeGPIO31=m" c0as61ef> 614v424.v4.4GPIOspana vaPLLeftring">"ctr42 4p3""ctr42 4p4""ctr42 4p5""ctr42 4p6" 481e" nomment"> */8/sp615O7,u8a 61+codeGPIO4,=m" c0ass="s61+c> 61aGPIO4,u8a href="+char *href="+c0000x230,0ass=nctr49tr43ngrpsref="drivers/pinctr49tr43ngrpsGPIOf="+codspana vaPLLeftring">"ctr4s 4p1""ctr43 4p2" 481e" nomment"> */8/sp616O7,u8a 61"drivers/pinctr485pinct61"d> 616v424.v4.4GPIOspana vaPLLeftring">"ctr43 4p3""ctr43 4p4""ctr43 4p5""ctr43 2p6" 481e" nomment"> */8/sp617O7,u8a 61"drivers/pinctr486pinct61"d> 61.c#L26" id  L26" cchar *href="+c0000x230,0ass=nctr49tr44ngrpsref="drivers/pinctr49tr44ngrpsGPIOf="+codspana vaPLLeftring">"ctr44 4p1""ctr44 4p2" 481e" nomment"> */8/sp618O7,u8a 61"drivers/pinctr487pinct61"d> 618v424.v4.4GPIOspana vaPLLeftring">"ctr44 4p3""ctr44 4p4""ctr44 2p5" 481e" nomment"> */8/sp619O7,u8a 61"drivers/pinctr488pinct61"d> 61.c#L18" id  L18" cchar *href="+c0000x230,0ass=nctr4kpdk.grpsref="drivers/pinctr4kpdk.grpsGPIOf="+codspana vaPLLeftring">"kpdk 4p1""kpdk 4p2" 481e" nomment"> */8/sp62IO7,u8a 62IO7ivers/pinctr488pinct62IO> 62Ic#L18" id  L18" cchar *href="+c0000x230,0ass=nctr4twsi4.grpsref="drivers/pinctr4twsi4.grpsGPIOf="+codspana vaPLLeftring">"twsi4-1""twsi4-2" 481e" nomment"> */8/sp621O7,u8a 62+codeGPIO5,=m" c0ass="s62+c> 62-v424.v4.4GPIOspana vaPLLeftring">"twsi4-3""twsi4-4""twsi4-5" 481e" nomment"> */8/sp622O7,u8a 62"drivers/pinctr491pinct62"d> 62.c#L21" id  L21" cchar *href="+c0000x230,0ass=nctr4twsi3ngrpsref="drivers/pinctr4twsi3ngrpsGPIOf="+codspana vaPLLeftring">"twsis-1""twsis-2" 481e" nomment"> */8/sp623O7,u8a 62f">a vaMFPR_MMPref="+co62f"> 62MFPR_MMPre" nsref"char *href="+c0000x230,0ass=nctr4twsi4.grpsref="drivers/pinctr4twsi4ngrpsGPIOf="+codspana vaPLLeftring">"twsi4" 481e" nomment"> */8/sp624O7,u8a 62ef="+codeGPIO31=m" c0as62ef> 62>a vaGPIO3ref="+cochar *href="+c0000x230,0ass=nctr4twsi5.grpsref="drivers/pinctr4twsi5ngrpsGPIOf="+codspana vaPLLeftring">"twsi5-1""twsi5-2" 481e" nomment"> */8/sp625O7,u8a 62+codeGPIO4,=m" c0ass="s62+c> 62-v424.v4.4GPIOspana vaPLLeftring">"twsi5-3" 481e" nomment"> */8/sp626O7,u8a 62"drivers/pinctr485pinct62"d> 62 href=" id  L24" cchar *href="+c0000x230,0ass=nctr4twsi6.grpsref="drivers/pinctr4twsi6ngrpsGPIOf="+codspana vaPLLeftring">"twsi6-1""twsi6-2" 481e" nomment"> */8/sp627O7,u8a 62"drivers/pinctr486pinct62"d> 62ref="+codeLCD=spana vaPLLeftring">"twsi6-3" 481e" nomment"> */8/sp628O7,u8a 62"drivers/pinctr487pinct62"d> 62.c#L27" id  L27" cchar *href="+c0000x230,0ass=nctr4ccic">grpsref="drivers/pinctr4ccic">grpsGPIOf="+codspana vaPLLeftring">"ccic"-1""ccic"-2" 481e" nomment"> */8/sp629O7,u8a 62"drivers/pinctr488pinct62"d> 62.c#L18" id  L18" cchar *href="+c0000x230,0ass=nctr4ccic4.grpsref="drivers/pinctr4ccic4.grpsGPIOf="+codspana vaPLLeftring">"ccic4-1""ccic4-2" 481e" nomment"> */8/sp63IO7,u8a 63IO7ivers/pinctr488pinct63IO> 63Ic#L18" id  L18" cchar *href="+c0000x230,0ass=nctr49lpi.grpsref="drivers/pinctr49lpi.grpsGPIOf="+codspana vaPLLeftring">"clpi" 481e" nomment"> */8/sp631O7,u8a 63+codeGPIO5,=m" c0ass="s63+c> 63aGPIO5,u8a href="+char *href="+c0000x230,0ass=nctr4ro.grpsref="drivers/pinctr4ro.grpsGPIOf="+codspana vaPLLeftring">"ro-1""ro-2""ro-3""ro-4" 481e" nomment"> */8/sp632O7,u8a 63"drivers/pinctr491pinct63"d> 63.c#L21" id  L21" cchar *href="+c0000x230,0ass=nctr4i2s.grpsref="drivers/pinctr4i2s.grpsGPIOf="+codspana vaPLLeftring">"i2s 5p1""i2s 4p2" 481e" nomment"> */8/sp633O7,u8a 63f">a vaMFPR_MMPref="+co63f"> 63MFPR_MMPre" nsref"char *href="+c0000x230,0ass=nctr4ssp">grpsref="drivers/pinctr4ssp">grpsGPIOf="+codspana vaPLLeftring">"ssp" 4p1""ssp" 4p2" 481e" nomment"> */8/sp634O7,u8a 63ef="+codeGPIO31=m" c0as63ef> 634v424.v4.4GPIOspana vaPLLeftring">"ssp" 4p3" 481e" nomment"> */8/sp635O7,u8a 63+codeGPIO4,=m" c0ass="s63+c> 63aGPIO4,u8a href="+char *href="+c0000x230,0ass=nctr4ssp4.grpsref="drivers/pinctr4ssp4.grpsGPIOf="+codspana vaPLLeftring">"ssp4 4p1" 481e" nomment"> */8/sp636O7,u8a 63"drivers/pinctr485pinct63"d> 63 href=" id  L24" cchar *href="+c0000x230,0ass=nctr4ssp3ngrpsref="drivers/pinctr4ssp3ngrpsGPIOf="+codspana vaPLLeftring">"ssps 4p1""ssps 4p2" 481e" nomment"> */8/sp637O7,u8a 63"drivers/pinctr486pinct63"d> 63.c#L26" id  L26" cchar *href="+c0000x230,0ass=nctr4sspa4.grpsref="drivers/pinctr4sspa4.grpsGPIOf="+codspana vaPLLeftring">"sspa4 4p1""sspa4 4p2" 481e" nomment"> */8/sp638O7,u8a 63"drivers/pinctr487pinct63"d> 63.c#L27" id  L27" cchar *href="+c0000x230,0ass=nctr4mmc">grpsref="drivers/pinctr4mmc">grpsGPIOf="+codspana vaPLLeftring">"mmc" 8p1" 481e" nomment"> */8/sp639O7,u8a 63"drivers/pinctr488pinct63"d> 63.c#L18" id  L18" cchar *href="+c0000x230,0ass=nctr4mmc4.grpsref="drivers/pinctr4mmc4.grpsGPIOf="+codspana vaPLLeftring">"mmc4 6p1" 481e" nomment"> */8/sp64IO7,u8a 64IO7ivers/pinctr488pinct64IO> 64Ic#L18" id  L18" cchar *href="+c0000x230,0ass=nctr4mmc3ngrpsref="drivers/pinctr4mmc3ngrpsGPIOf="+codspana vaPLLeftring">"mmc4 10p1" 481e" nomment"> */8/sp641O7,u8a 64+codeGPIO5,=m" c0ass="s64+c> 64f="+c1" id  L21" cl48mm> 481e" nomment"> */8/sp642O7,u8a 64"drivers/pinctr491pinct64"d> 64.c#L21" id  structmc0000x230,0ass=pxa3xx. 481e" nomment"> */8/sp643O7,u8a 64f">a vaMFPR_MMPref="+co64f"> 64-v424.v4.4GPIodspana vaPLLeftring">"ctr48" 481e" nomment"> */8/sp644O7,u8a 64ef="+codeGPIO31=m" c0as64ef> 64-v424.v4.4GPIodspana vaPLLeftring">"ctr44" 481e" nomment"> */8/sp645O7,u8a 64+codeGPIO4,=m" c0ass="s64+c> 645v424.v4.4GPIodspana vaPLLeftring">"ctr43" 481e" nomment"> */8/sp646O7,u8a 64"drivers/pinctr485pinct64"d> 64ref="+codeLCDodspana vaPLLeftring">"ctr44" 481e" nomment"> */8/sp647O7,u8a 64"drivers/pinctr486pinct64"d> 647ef="+codeLCDodspana vaPLLeftring">"kpdk" 481e" nomment"> */8/sp648O7,u8a 64"drivers/pinctr487pinct64"d> 64-v424.v4.4ONEodspana vaPLLeftring">"twsi4" 481e" nomment"> */8/sp649O7,u8a 64"drivers/pinctr488pinct64"d> 649v424.v4.4ONEodspana vaPLLeftring">"twsi3" 481e" nomment"> */8/sp65IO7,u8a 65IO7ivers/pinctr488pinct65IO> 650v424.v4.4ONEodspana vaPLLeftring">"twsi4" 481e" nomment"> */8/sp651O7,u8a 65+codeGPIO5,=m" c0ass="s65+c> 65-v424.v4.4GPIodspana vaPLLeftring">"twsi5" 481e" nomment"> */8/sp652O7,u8a 65"drivers/pinctr491pinct65"d> 65-v424.v4.4GPIodspana vaPLLeftring">"twsi6" 481e" nomment"> */8/sp653O7,u8a 65f">a vaMFPR_MMPref="+co65f"> 65-v424.v4.4GPIodspana vaPLLeftring">"ccic""grpsref="drivers/pinctr4ccic">grpsGPIO)}=1" id  L21" cl48mm> 481e" nomment"> */8/sp654O7,u8a 65ef="+codeGPIO31=m" c0as65ef> 65-v424.v4.4GPIodspana vaPLLeftring">"ccic4" 481e" nomment"> */8/sp655O7,u8a 65+codeGPIO4,=m" c0ass="s65+c> 655v424.v4.4GPIodspana vaPLLeftring">"clpi" 481e" nomment"> */8/sp656O7,u8a 65"drivers/pinctr485pinct65"d> 65ref="+codeLCDodspana vaPLLeftring">"ro" 481e" nomment"> */8/sp657O7,u8a 65"drivers/pinctr486pinct65"d> 657ef="+codeLCDodspana vaPLLeftring">"i2s" 481e" nomment"> */8/sp658O7,u8a 65"drivers/pinctr487pinct65"d> 65-v424.v4.4ONEodspana vaPLLeftring">"ssp""grpsref="drivers/pinctr4ssp">grpsGPIO)}=1" id  L21" cl48mm> 481e" nomment"> */8/sp659O7,u8a 65"drivers/pinctr488pinct65"d> 659v424.v4.4ONEodspana vaPLLeftring">"ssp4" 481e" nomment"> */8/sp66IO7,u8a 66IO7ivers/pinctr488pinct66IO> 660v424.v4.4ONEodspana vaPLLeftring">"ssps" 481e" nomment"> */8/sp661O7,u8a 66+codeGPIO5,=m" c0ass="s66+c> 66-v424.v4.4GPIodspana vaPLLeftring">"sspa4" 481e" nomment"> */8/sp662O7,u8a 66"drivers/pinctr491pinct66"d> 66-v424.v4.4GPIodspana vaPLLeftring">"mmc""grpsref="drivers/pinctr4mmc">grpsGPIO)}=1" id  L21" cl48mm> 481e" nomment"> */8/sp663O7,u8a 66f">a vaMFPR_MMPref="+co66f"> 66-v424.v4.4GPIodspana vaPLLeftring">"mmc4" 481e" nomment"> */8/sp664O7,u8a 66ef="+codeGPIO31=m" c0as66ef> 66-v424.v4.4GPIodspana vaPLLeftring">"mmc4" 481e" nomment"> */8/sp665O7,u8a 66+codeGPIO4,=m" c0ass="s66+c> 66-v424L21" id  L21" cl48mm> 481e" nomment"> */8/sp666O7,u8a 66"drivers/pinctr485pinct66"d> 66ref="1" id  L21" cl48mm> 481e" nomment"> */8/sp667O7,u8a 66"drivers/pinctr486pinct66"d> 66.c#L26" id  structmc0000x230,0ass=pomment_descref="drivers/pipomment_descv424.c0000x230,0ass=nctr4pment_descref="drivers/pinctr4pment_descv424.+co1" id  L21" cl48mm> 481e" nomment"> */8/sp668O7,u8a 66"drivers/pinctr487pinct66"d> 66-v424.v4.4ONE.c0000x230,0ass=87piref="drivers/pi87piv424.v4.4ONEEEE=mcspana vaPLLeftring">"> */-nomment" 481e" nomment"> */8/sp669O7,u8a 66"drivers/pinctr488pinct66"d> 66[-v424.v4.4ON.c0000x230,0ass=ownerref="drivers/piownerv424.v4.4ONEEE=mc0000x230,0ass=.HIS_MODULEref="drivers/pi.HIS_MODULEv424=1" id  L21" cl48mm> 481e" nomment"> */8/sp67IO7,u8a 67IO7ivers/pinctr488pinct67IO> 67-v424L21" id  L21" cl48mm> 481e" nomment"> */8/sp671O7,u8a 67+codeGPIO5,=m" c0ass="s67+c> 67f="+c1" id  L21" cl48mm> 481e" nomment"> */8/sp672O7,u8a 67"drivers/pinctr491pinct67"d> 67.c#L21" id  structmc0000x230,0ass=pxa3xx. 481e" nomment"> */8/sp673O7,u8a 67f">a vaMFPR_MMPref="+co67f"> 67-v424.v4.4GPI.c0000x230,0ass=mfpref="drivers/pinfpv424.v4.4ONEEEEE=mc0000x230,0ass=nctr4mfpref="drivers/pinctr4mfpv424=1" id  L21" cl48mm> 481e" nomment"> */8/sp674O7,u8a 67ef="+codeGPIO31=m" c0as67ef> 67-v424.v4.4GPI.c0000x230,0ass=8um4mfpref="drivers/pi8um4mfpv424.v4.4GPI=mc0000x230,0ass=ARRAY_SIZEref="drivers/piARRAY_SIZEv424(<0000x230,0ass=nctr4mfpref="drivers/pinctr4mfpv424P2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x675O7,u8a 67+codeGPIO4,=m" c0ass="s67+c> 67-v424.v4.4GPI.c0000x230,0ass=grpsref="drivers/pigrpsGPIOv4.4ONEEEEE=mc0000x230,0ass=nctr4grpsref="drivers/pinctr4grpsGPIO2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x676O7,u8a 67"drivers/pinctr485pinct67"d> 67ref="+codeLCD.c0000x230,0ass=8um4grpsref="drivers/pi8um4grpsef="+codeLC=mc0000x230,0ass=ARRAY_SIZEref="drivers/piARRAY_SIZEv424(<0000x230,0ass=nctr4grpsref="drivers/pinctr4grpsGPIOP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x677O7,u8a 67"drivers/pinctr486pinct67"d> 67ref="+codeLCD.c0000x230,0ass=funcsref="drivers/pifuncsGPIO4.4ONEEEEE=mc0000x230,0ass=nctr4funcsref="drivers/pinctr4funcsGPIO2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x678O7,u8a 67"drivers/pinctr487pinct67"d> 67-v424.v4.4ONE.c0000x230,0ass=8um4funcsref="drivers/pi8um4funcsv424.v4.4O=mc0000x230,0ass=ARRAY_SIZEref="drivers/piARRAY_SIZEv424(<0000x230,0ass=nctr4funcsref="drivers/pinctr4funcsGPIOP2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x679O7,u8a 67"drivers/pinctr488pinct67"d> 67[-v424.v4.4ON.c0000x230,0ass=8um4gpioref="drivers/pi8um4gpioef="+codeLC=m1692 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x66C,0ass="6ref">a vaVCXO_OUTu8a hre6="+co68-v424.v4.4GPI.c0000x230,0ass=descref="drivers/pidescv424.4.4ONEEEEE=m&c0000x230,0ass=nctr4pment_descref="drivers/pinctr4pment_descv4242 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x661O7,u8a 6NONE=m" c0000000ass="sre6">a v68-v424.v4.4GPI.c0000x230,0ass=padsref="drivers/pipadsGPIOv4.4ONEEEEE=mc0000x230,0ass=nctr4padsref="drivers/pinctr4padsv4242 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x662O7,u8a 68"drivers/pinctr491pinct68"d> 68-v424.v4.4GPI.c0000x230,0ass=8um4padsref="drivers/pi8um4padsef="+codeLC=mc0000x230,0ass=ARRAY_SIZEref="drivers/piARRAY_SIZEv424(<0000x230,0ass=nctr4padsref="drivers/pinctr4padsv424P2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x663O7,u8a 68f">a vaMFPR_MMPref="+co68f"> 68-v424 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x664O7,u8a 68ef="+codeGPIO31=m" c0as68ef> 68-v424.v4.4GPI.c0000x230,0ass=cputypiref="drivers/picputypiv424.v4.4GPI=mc0000x230,0ass=PINCTRLsref">a vaPLLef="+coPINCTRLsref"v4242 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x665O7,u8a 68+codeGPIO4,=m" c0ass="s68+c> 68-v424.v4.4GPI.c0000x230,0ass=ds_maskref="drivers/pids_maskv424.v4.4GPI=mc0000x230,0ass=ref"_DS_MASK>a vaPLLef="+coref"_DS_MASKv4242 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x666O7,u8a 68"drivers/pinctr485pinct68"d> 68ref="+codeLCD.c0000x230,0ass=ds_shiftref="drivers/pids_shiftef="+codeLC=mc0000x230,0ass=ref"_DS_SHIFT>a vaPLLef="+coref"_DS_SHIFTv4242 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x667O7,u8a 68"drivers/pinctr486pinct68"d> 68ref="L21" id  L21" cl48mm> 481e" nomment"> */8/sp668O7,u8a 68"drivers/pinctr487pinct68"d> 68-v4241" id  L21" cl48mm> 481e" nomment"> */8/sp669O7,u8a 6="drivers/pinctr488pinct6l48mm68.c#L18" id  intmc0000x230,0ass=__devinitref="drivers/pi__devinitv424.c0000x230,0ass=nctr4pinmux_probiref="drivers/pinctr4pinmux_probiv424(structmc0000x230,0ass=platform_deviciref="drivers/piplatform_deviciv424.*c0000x230,0ass=pdevref="drivers/pipdevv424P1" id  L21" cl48mm> 481e" nomment"> */8/sp6PIO7,u8a 6ref="+codeGPIO76=m" c0as6="sre69-v424o1" id  L21" cl48mm> 481e" nomment"> */8/sp6P1O7,u8a 69ONE=m" c0000000ass="sre69>a v69-v424.v4.4GPIreturnmc0000x230,0ass=pxa3xx. 481e" nomment"> */8/sp6P2O7,u8a 6="drivers/pinctr491pinct6l49mm69-v424}1" id  L21" cl48mm> 481e" nomment"> */8/sp6P3O7,u8a 6ef">a vaMFPR_MMPref="+co6e=GRP69-v424 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x6P4O7,u8a 69ef="+codeGPIO31=m" c0as69"sre694c#L18" id  intmc0000x230,0ass=__devexitref="drivers/pi__devexitv424.c0000x230,0ass=nctr4pinmux_removiref="drivers/pinctr4pinmux_removiv424(structmc0000x230,0ass=platform_deviciref="drivers/piplatform_deviciv424.*c0000x230,0ass=pdevref="drivers/pipdevv424P1" id  L21" cl48mm> 481e" nomment"> */8/sp6P5O7,u8a 69+codeGPIO4,=m" c0ass="s69f">a69-v424o1" id  L21" cl48mm> 481e" nomment"> */8/sp6P6O7,u8a 69"drivers/pinctr485pinct6948,u69ref="+codeLCDreturnmc0000x230,0ass=pxa3xx. 481e" nomment"> */8/sp6P7O7,u8a 69"drivers/pinctr486pinct6948mm69ref="}1" id  L21" cl48mm> 481e" nomment"> */8/sp6P8O7,u8a 69"drivers/pinctr487pinct6948mm69-v4241" id  L21" cl48mm> 481e" nomment"> */8/sp6P9O7,u8a 69"drivers/pinctr488pinct6948mm69.c#L18" id  structmc0000x230,0ass=platform_d cl48ref="drivers/piplatform_d cl48v424.c0000x230,0ass=nctr4pinmux_d cl48ref="drivers/pinctr4pinmux_d cl48v424.+co1" id  L21" cl48mm> 481e" nomment"> */8/sp70IO7,u8a 70IO7ivers/pinctr488pinct70IO> 70-v424.v4.4GPI.c0000x230,0ass=d cl48ref="drivers/pid cl48v424.+co1" id  L21" cl48mm> 481e" nomment"> */8/sp701O7,u8a 70ONE=m" c0000000ass="sre70+c> 70-v424.v4.4GPI.v4.4GPI.c0000x230,0ass=87piref="drivers/pi87piv424.v4=mcspana vaPLLeftring">"> */-nommux" 481e" nomment"> */8/sp702O7,u8a 70"drivers/pinctr491pinct70"d> 70-v424.v4.4GPI.v4.4GPI.c0000x230,0ass=ownerref="drivers/piownerv424.v=mc0000x230,0ass=.HIS_MODULEref="drivers/pi.HIS_MODULEv424=1" id  L21" cl48mm> 481e" nomment"> */8/sp703O7,u8a 70f">a vaMFPR_MMPref="+co70f"> 70-v424.v4.4GPI}=1" id  L21" cl48mm> 481e" nomment"> */8/sp704O7,u8a 70ef="+codeGPIO31=m" c0as70ef> 70-v424.v4.4GPI.c0000x230,0ass=probiref="drivers/piprobiv424EE=mc0000x230,0ass=nctr4pinmux_probiref="drivers/pinctr4pinmux_probiv424=1" id  L21" cl48mm> 481e" nomment"> */8/sp705O7,u8a 70+codeGPIO4,=m" c0ass="s70+c> 70-v424.v4.4GPI.c0000x230,0ass=removiref="drivers/piremoviv424E=mc0000x230,0ass=__devexit_pref="drivers/pi__devexit_pv424(<0000x230,0ass=nctr4pinmux_removiref="drivers/pinctr4pinmux_removiv424P2 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x706O7,u8a 70"drivers/pinctr485pinct70"d> 70ref="L21" id  L21" cl48mm> 481e" nomment"> */8/sp707O7,u8a 70"drivers/pinctr486pinct70"d> 70ref="1" id  L21" cl48mm> 481e" nomment"> */8/sp708O7,u8a 70"drivers/pinctr487pinct70"d> 708c#L18" id  intmc0000x230,0ass=__initref="drivers/pi__initv424.c0000x230,0ass=nctr4pinmux_initref="drivers/pinctr4pinmux_initv424(voidP1" id  L21" cl48mm> 481e" nomment"> */8/sp709O7,u8a 70"drivers/pinctr488pinct70"d> 709unsio1" id  L21" cl48mm> 481e" nomment"> */8/sp71IO7,u8a 71IO7ivers/pinctr488pinct71IO> 710ef="+codeLCDreturnmc0000x230,0ass=platform_d cl48_registerref="drivers/piplatform_d cl48_registerv424(&c0000x230,0ass=nctr4pinmux_d cl48ref="drivers/pinctr4pinmux_d cl48v424)21" id  L21" cl48mm> 481e" nomment"> */8/sp711O7,u8a 71+codeGPIO5,=m" c0ass="s71+c> 71aGPIO}1" id  L21" cl48mm> 481e" nomment"> */8/sp712O7,u8a 71"drivers/pinctr491pinct71"d> 71-v424c0000x230,0ass=core_initcall_syncref="drivers/picore_initcall_syncv424(<0000x230,0ass=nctr4pinmux_initref="drivers/pinctr4pinmux_initv424)21" id  L21" cl48mm> 481e" nomment"> */8/sp713O7,u8a 71f">a vaMFPR_MMPref="+co71f"> 71-v424 vVCXO_OUTu8a href="+codeVCXO_OUT=m" c000x714O7,u8a 71ef="+codeGPIO31=m" c0as71ef> 714c#L18" id  voidmc0000x230,0ass=__exitref="drivers/pi__exitv424.c0000x230,0ass=nctr4pinmux_exitref="drivers/pinctr4pinmux_exitv424(voidP1" id  L21" cl48mm> 481e" nomment"> */8/sp715O7,u8a 71+codeGPIO4,=m" c0ass="s71+c> 71-v424o1" id  L21" cl48mm> 481e" nomment"> */8/sp716O7,u8a 71"drivers/pinctr485pinct71"d> 71ref="+codeLCD=m" c00000000asplatform_d cl48_unregisterref="drivers/piplatform_d cl48_unregisterv424(&c0000x230,0ass=nctr4pinmux_d cl48ref="drivers/pinctr4pinmux_d cl48v424)21" id  L21" cl48mm> 481e" nomment"> */8/sp717O7,u8a 71"drivers/pinctr486pinct71"d> 71ref="}1" id  L21" cl48mm> 481e" nomment"> */8/sp718O7,u8a 71"drivers/pinctr487pinct71"d> 718v424c0000x230,0ass=nodule_exitref="drivers/pinodule_exitv424(<0000x230,0ass=nctr4pinmux_exitref="drivers/pinctr4pinmux_exitv424)21" id  L21" cl48mm> 481e" nomment"> */8/sp719O7,u8a 71"drivers/pinctr488pinct71"d> 71.c#L11" id  L21" cl48mm> 481e" nomment"> */8/sp72IO7,u8a 72IO7ivers/pinctr488pinct72IO> 72Ic#L1c0000x230,0ass=rODULE_AUTHOR>a vaPLLef="+corODULE_AUTHORv424("HaojianaZhuang <haojian.zhuang@marvell.com>" 481e" nomment"> */8/sp721O7,u8a 72+codeGPIO5,=m" c0ass="s72+c> 72-v424c0000x230,0ass=rODULE_DESCRIPTION>a vaPLLef="+corODULE_DESCRIPTIONv424("PXA3xx nomhreftrol " cl48" 481e" nomment"> */8/sp722O7,u8a 72"drivers/pinctr491pinct72"d> 72-v424c0000x230,0ass=rODULE_LICENSEref="drivers/pirODULE_LICENSEv424("GPL v2" 481e" nomment"> */8/sp723O7,u8a 72f">a vaMFPR_MMPref="+co72f"> 72MFPR_


a vaMFPfooterr> The original LXR software by the " id L21http://sourceforge.net/projects/lxrr>LXR communityv424,mthis experimental l48mion by " id L21mailto:lxr@R_Mux.no">lxr@R_Mux.nov424.
a vaMFPsubfooterr> lxr.R_Mux.no kindly hosted by " id L21http://www.redpill-R_Mpro.no">Redpill L_Mpro ASNONE=mprovider of L_Muxhref=ulting and oper idef= servici= somme 1995.