linux/drivers/rtc/rtc-rs5c348.c
<<
>>
Prefs
   1/*
   2 * A SPI driver for the Ricoh RS5C348 RTC
   3 *
   4 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 *
  10 * The board specific init code should provide characteristics of this
  11 * device:
  12 *     Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS
  13 */
  14
  15#include <linux/bcd.h>
  16#include <linux/delay.h>
  17#include <linux/device.h>
  18#include <linux/errno.h>
  19#include <linux/init.h>
  20#include <linux/kernel.h>
  21#include <linux/string.h>
  22#include <linux/slab.h>
  23#include <linux/rtc.h>
  24#include <linux/workqueue.h>
  25#include <linux/spi/spi.h>
  26#include <linux/module.h>
  27
  28#define DRV_VERSION "0.2"
  29
  30#define RS5C348_REG_SECS        0
  31#define RS5C348_REG_MINS        1
  32#define RS5C348_REG_HOURS       2
  33#define RS5C348_REG_WDAY        3
  34#define RS5C348_REG_DAY 4
  35#define RS5C348_REG_MONTH       5
  36#define RS5C348_REG_YEAR        6
  37#define RS5C348_REG_CTL1        14
  38#define RS5C348_REG_CTL2        15
  39
  40#define RS5C348_SECS_MASK       0x7f
  41#define RS5C348_MINS_MASK       0x7f
  42#define RS5C348_HOURS_MASK      0x3f
  43#define RS5C348_WDAY_MASK       0x03
  44#define RS5C348_DAY_MASK        0x3f
  45#define RS5C348_MONTH_MASK      0x1f
  46
  47#define RS5C348_BIT_PM  0x20    /* REG_HOURS */
  48#define RS5C348_BIT_Y2K 0x80    /* REG_MONTH */
  49#define RS5C348_BIT_24H 0x20    /* REG_CTL1 */
  50#define RS5C348_BIT_XSTP        0x10    /* REG_CTL2 */
  51#define RS5C348_BIT_VDET        0x40    /* REG_CTL2 */
  52
  53#define RS5C348_CMD_W(addr)     (((addr) << 4) | 0x08)  /* single write */
  54#define RS5C348_CMD_R(addr)     (((addr) << 4) | 0x0c)  /* single read */
  55#define RS5C348_CMD_MW(addr)    (((addr) << 4) | 0x00)  /* burst write */
  56#define RS5C348_CMD_MR(addr)    (((addr) << 4) | 0x04)  /* burst read */
  57
  58struct rs5c348_plat_data {
  59        struct rtc_device *rtc;
  60        int rtc_24h;
  61};
  62
  63static int
  64rs5c348_rtc_set_time(struct device *dev, struct rtc_time *tm)
  65{
  66        struct spi_device *spi = to_spi_device(dev);
  67        struct rs5c348_plat_data *pdata = spi->dev.platform_data;
  68        u8 txbuf[5+7], *txp;
  69        int ret;
  70
  71        /* Transfer 5 bytes before writing SEC.  This gives 31us for carry. */
  72        txp = txbuf;
  73        txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */
  74        txbuf[1] = 0;   /* dummy */
  75        txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */
  76        txbuf[3] = 0;   /* dummy */
  77        txbuf[4] = RS5C348_CMD_MW(RS5C348_REG_SECS); /* cmd, sec, ... */
  78        txp = &txbuf[5];
  79        txp[RS5C348_REG_SECS] = bin2bcd(tm->tm_sec);
  80        txp[RS5C348_REG_MINS] = bin2bcd(tm->tm_min);
  81        if (pdata->rtc_24h) {
  82                txp[RS5C348_REG_HOURS] = bin2bcd(tm->tm_hour);
  83        } else {
  84                /* hour 0 is AM12, noon is PM12 */
  85                txp[RS5C348_REG_HOURS] = bin2bcd((tm->tm_hour + 11) % 12 + 1) |
  86                        (tm->tm_hour >= 12 ? RS5C348_BIT_PM : 0);
  87        }
  88        txp[RS5C348_REG_WDAY] = bin2bcd(tm->tm_wday);
  89        txp[RS5C348_REG_DAY] = bin2bcd(tm->tm_mday);
  90        txp[RS5C348_REG_MONTH] = bin2bcd(tm->tm_mon + 1) |
  91                (tm->tm_year >= 100 ? RS5C348_BIT_Y2K : 0);
  92        txp[RS5C348_REG_YEAR] = bin2bcd(tm->tm_year % 100);
  93        /* write in one transfer to avoid data inconsistency */
  94        ret = spi_write_then_read(spi, txbuf, sizeof(txbuf), NULL, 0);
  95        udelay(62);     /* Tcsr 62us */
  96        return ret;
  97}
  98
  99static int
 100rs5c348_rtc_read_time(struct device *dev, struct rtc_time *tm)
 101{
 102        struct spi_device *spi = to_spi_device(dev);
 103        struct rs5c348_plat_data *pdata = spi->dev.platform_data;
 104        u8 txbuf[5], rxbuf[7];
 105        int ret;
 106
 107        /* Transfer 5 byte befores reading SEC.  This gives 31us for carry. */
 108        txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */
 109        txbuf[1] = 0;   /* dummy */
 110        txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */
 111        txbuf[3] = 0;   /* dummy */
 112        txbuf[4] = RS5C348_CMD_MR(RS5C348_REG_SECS); /* cmd, sec, ... */
 113
 114        /* read in one transfer to avoid data inconsistency */
 115        ret = spi_write_then_read(spi, txbuf, sizeof(txbuf),
 116                                  rxbuf, sizeof(rxbuf));
 117        udelay(62);     /* Tcsr 62us */
 118        if (ret < 0)
 119                return ret;
 120
 121        tm->tm_sec = bcd2bin(rxbuf[RS5C348_REG_SECS] & RS5C348_SECS_MASK);
 122        tm->tm_min = bcd2bin(rxbuf[RS5C348_REG_MINS] & RS5C348_MINS_MASK);
 123        tm->tm_hour = bcd2bin(rxbuf[RS5C348_REG_HOURS] & RS5C348_HOURS_MASK);
 124        if (!pdata->rtc_24h) {
 125                if (rxbuf[RS5C348_REG_HOURS] & RS5C348_BIT_PM) {
 126                        tm->tm_hour -= 20;
 127                        tm->tm_hour %= 12;
 128                        tm->tm_hour += 12;
 129                } else
 130                        tm->tm_hour %= 12;
 131        }
 132        tm->tm_wday = bcd2bin(rxbuf[RS5C348_REG_WDAY] & RS5C348_WDAY_MASK);
 133        tm->tm_mday = bcd2bin(rxbuf[RS5C348_REG_DAY] & RS5C348_DAY_MASK);
 134        tm->tm_mon =
 135                bcd2bin(rxbuf[RS5C348_REG_MONTH] & RS5C348_MONTH_MASK) - 1;
 136        /* year is 1900 + tm->tm_year */
 137        tm->tm_year = bcd2bin(rxbuf[RS5C348_REG_YEAR]) +
 138                ((rxbuf[RS5C348_REG_MONTH] & RS5C348_BIT_Y2K) ? 100 : 0);
 139
 140        if (rtc_valid_tm(tm) < 0) {
 141                dev_err(&spi->dev, "retrieved date/time is not valid.\n");
 142                rtc_time_to_tm(0, tm);
 143        }
 144
 145        return 0;
 146}
 147
 148static const struct rtc_class_ops rs5c348_rtc_ops = {
 149        .read_time      = rs5c348_rtc_read_time,
 150        .set_time       = rs5c348_rtc_set_time,
 151};
 152
 153static struct spi_driver rs5c348_driver;
 154
 155static int __devinit rs5c348_probe(struct spi_device *spi)
 156{
 157        int ret;
 158        struct rtc_device *rtc;
 159        struct rs5c348_plat_data *pdata;
 160
 161        pdata = kzalloc(sizeof(struct rs5c348_plat_data), GFP_KERNEL);
 162        if (!pdata)
 163                return -ENOMEM;
 164        spi->dev.platform_data = pdata;
 165
 166        /* Check D7 of SECOND register */
 167        ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_SECS));
 168        if (ret < 0 || (ret & 0x80)) {
 169                dev_err(&spi->dev, "not found.\n");
 170                goto kfree_exit;
 171        }
 172
 173        dev_info(&spi->dev, "chip found, driver version " DRV_VERSION "\n");
 174        dev_info(&spi->dev, "spiclk %u KHz.\n",
 175                 (spi->max_speed_hz + 500) / 1000);
 176
 177        /* turn RTC on if it was not on */
 178        ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_CTL2));
 179        if (ret < 0)
 180                goto kfree_exit;
 181        if (ret & (RS5C348_BIT_XSTP | RS5C348_BIT_VDET)) {
 182                u8 buf[2];
 183                struct rtc_time tm;
 184                if (ret & RS5C348_BIT_VDET)
 185                        dev_warn(&spi->dev, "voltage-low detected.\n");
 186                if (ret & RS5C348_BIT_XSTP)
 187                        dev_warn(&spi->dev, "oscillator-stop detected.\n");
 188                rtc_time_to_tm(0, &tm); /* 1970/1/1 */
 189                ret = rs5c348_rtc_set_time(&spi->dev, &tm);
 190                if (ret < 0)
 191                        goto kfree_exit;
 192                buf[0] = RS5C348_CMD_W(RS5C348_REG_CTL2);
 193                buf[1] = 0;
 194                ret = spi_write_then_read(spi, buf, sizeof(buf), NULL, 0);
 195                if (ret < 0)
 196                        goto kfree_exit;
 197        }
 198
 199        ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_CTL1));
 200        if (ret < 0)
 201                goto kfree_exit;
 202        if (ret & RS5C348_BIT_24H)
 203                pdata->rtc_24h = 1;
 204
 205        rtc = rtc_device_register(rs5c348_driver.driver.name, &spi->dev,
 206                                  &rs5c348_rtc_ops, THIS_MODULE);
 207
 208        if (IS_ERR(rtc)) {
 209                ret = PTR_ERR(rtc);
 210                goto kfree_exit;
 211        }
 212
 213        pdata->rtc = rtc;
 214
 215        return 0;
 216 kfree_exit:
 217        kfree(pdata);
 218        return ret;
 219}
 220
 221static int __devexit rs5c348_remove(struct spi_device *spi)
 222{
 223        struct rs5c348_plat_data *pdata = spi->dev.platform_data;
 224        struct rtc_device *rtc = pdata->rtc;
 225
 226        if (rtc)
 227                rtc_device_unregister(rtc);
 228        kfree(pdata);
 229        return 0;
 230}
 231
 232static struct spi_driver rs5c348_driver = {
 233        .driver = {
 234                .name   = "rtc-rs5c348",
 235                .owner  = THIS_MODULE,
 236        },
 237        .probe  = rs5c348_probe,
 238        .remove = __devexit_p(rs5c348_remove),
 239};
 240
 241module_spi_driver(rs5c348_driver);
 242
 243MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
 244MODULE_DESCRIPTION("Ricoh RS5C348 RTC driver");
 245MODULE_LICENSE("GPL");
 246MODULE_VERSION(DRV_VERSION);
 247MODULE_ALIAS("spi:rtc-rs5c348");
 248
lxr.linux.no kindly hosted by Redpill Linpro AS, provider of Linux consulting and operations services since 1995.