linux/drivers/video/nuc900fb.c
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11/88/4cbc358f0558066382540a1b70626829c6cd_3/0" L1" class="line" namon>L1">3 31./a>.spa  class="comment">/*./spa  >L2" class="line" namon>L2">3 32./a>.spa  class="comment"> *./spa  >L3" class="line" namon>L3">3 33./a>.spa  class="comment"> * Copyright (c) 2009 Nuvot2L4" class="line" namon>L4">3 34./a>.spa  class="comment"> * All rights reserved../spa  >L5" class="line" namon>L5">3 35./a>.spa  class="comment"> *./spa  >L6" class="line" namon>L6">3 36./a>.spa  class="comment"> * This program is free software; you ca  redistribute it and/or modify./spa  >L7" class="line" namon>L7">3 37./a>.spa  class="comment"> * it under the/terms of the/GNU General Public License as published by./spa  >L8" class="line" namon>L8">3 38./a>.spa  class="comment"> * the/Free Software Founda"
	 ; either vers12L9" class="line" namon>L9">3 39./a>.spa  class="comment"> * (at your 12"
	 ) any later vers12<../spa  >L10" class="line" namon>L10">3 .18.a>.spa  class="comment"> *./spa  >L11" class="line" namon>L11">3 11./a>.spa  class="comment"> *  Descri2"
	 :./spa  >L12" class="line" namon>L12">3 12./a>.spa  class="comment"> *v3 3Nuvot2L13" class="line" namon>L13">3 13./a>.spa  class="comment"> *  Author:./spa  >L14" class="line" namon>L14">3 14./a>.spa  class="comment"> *    Wang Qiang (rurality.linux@gmail.com) 2009/12/11./spa  >L15" class="line" namon>L15">3 15./a>.spa  class="comment"> */./spa  >L16" class="line" namon>L16">3 16./a>#include <linux/module.h./a>>>L17" class="line" namon>L17">3 17./a>#include <linux/kernel.h./a>>>L18" class="line" namon>L18">3 18./a>#include <linux/err.h./a>>>L19" class="line" namon>L19">3 19./a>#include <linux/errno.h./a>>>L20" class="line" namon>L20">3 20./a>#include <linux/string.h./a>>>L21" class="line" namon>L21">3 21./a>#include <linux/mm.h./a>>>L22" class="line" namon>L22">3 22./a>#include <linux/tty.h./a>>>L23" class="line" namon>L23">3 23./a>#include <linux/slab.h./a>>>L24" class="line" namon>L24">3 24./a>#include <linux/delay.h./a>>>L25" class="line" namon>L25">3 25./a>#include <linux/fb.h./a>>>L26" class="line" namon>L26">3 26./a>#include <linux/init.h./a>>>L27" class="line" namon>L27">3 27./a>#include <linux/dma-mapping.h./a>>>L28" class="line" namon>L28">3 28./a>#include <linux/interrupt.h./a>>>L29" class="line" namon>L29">3 29./a>#include <linux/workqueue.h./a>>>L30" class="line" namon>L30">3 30./a>#include <linux/wait.h./a>>>L31" class="line" namon>L31">3 31./a>#include <linux/platform_device.h./a>>>L32" class="line" namon>L32">3 32./a>#include <linux/clk.h./a>>>L33" class="line" namon>L33">3 33./a>#include <linux/cpufreq.h./a>>>L34" class="line" namon>L34">3 34./a>#include <linux/io.h./a>>>L35" class="line" namon>L35">3 35./a>#include <linux/pm.h./a>>>L36" class="line" namon>L36">3 36./a>#include <linux/device.h./a>>>L37" class="line" namon>L37">3 37./a>>L38" class="line" namon>L38">3 38./a>#include <mach/map.h./a>>>L39" class="line" namon>L39">3 39./a>#include <mach/regs-clock.h./a>>>L40" class="line" namon>L40">3 40./a>#include <mach/regs-ldm.h./a>>>L41" class="line" namon>L41">3 41./a>#include <mach/fb.h./a>>>L42" class="line" namon>L42">3 42./a>>L43" class="line" namon>L43">3 43./a>#include "nuc900fb.h./a>">L44" class="line" namon>L44">3 44./a>>L45" class="line" namon>L45">3 45./a>>L46" class="line" namon>L46">3 46./a>.spa  class="comment">/*./spa  >L47" class="line" namon>L47">3 47./a>.spa  class="comment"> *  Initialize the/nuc900 video (dual) buffer address./spa  >L48" class="line" namon>L48">3 48./a>.spa  class="comment"> */./spa  >L49" class="line" namon>L49">3 49./a>static void3.a href="+code=nuc900fb_set_lcdaddr" class="sref">nuc900fb_set_lcdaddr./a>(struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">info./a>)>L50" class="line" namon>L50">3 50./a>{>L51" class="line" namon>L51">3 51./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=info" class="sref">info./a>->.a href="+code=par" class="sref">par./a>;>L52" class="line" namon>L52">3 52./a>        void3.a href="+code=__iomem" class="sref">__iomem./a> *.a href="+code=regs" class="sref">regs./a> =3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a>;>L53" class="line" namon>L53">3 53./a>        unsigned long3.a href="+code=vbaddr1" class="sref">vbaddr1./a>,3.a href="+code=vbaddr2" class="sref">vbaddr2./a>;>L54" class="line" namon>L54">3 54./a>>L55" class="line" namon>L55">3 55./a>        .a href="+code=vbaddr1" class="sref">vbaddr1./a>  =3.a href="+code=info" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=smem_start" class="sref">smem_start./a>;>L56" class="line" namon>L56">3 56./a>        .a href="+code=vbaddr2" class="sref">vbaddr2./a>  =3.a href="+code=info" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=smem_start" class="sref">smem_start./a>;>L57" class="line" namon>L57">3 57./a>        .a href="+code=vbaddr2" class="sref">vbaddr2./a> +=3.a href="+code=info" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=line_length" class="sref">line_length./a> *3.a href="+code=info" class="sref">info./a>->.a href="+code=var" class="sref">var./a>..a href="+code=yres" class="sref">yres./a>;>L58" class="line" namon>L58">3 58./a>>L59" class="line" namon>L59">3 59./a>        .spa  class="comment">/* set frambuffer start phy addr*/./spa  >L60" class="line" namon>L60">3 60./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=vbaddr1" class="sref">vbaddr1./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_VA_BADDR0" class="sref">REG_LCM_VA_BADDR0./a>);>L61" class="line" namon>L61">3 61./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=vbaddr2" class="sref">vbaddr2./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_VA_BADDR1" class="sref">REG_LCM_VA_BADDR1./a>);>L62" class="line" namon>L62">3 62./a>>L63" class="line" namon>L63">3 63./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_va_fbctrl" class="sref">lcd_va_fbctrl./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_VA_FBCTRL" class="sref">REG_LCM_VA_FBCTRL./a>);>L64" class="line" namon>L64">3 64./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_va_scale" class="sref">lcd_va_scale./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_VA_SCALE" class="sref">REG_LCM_VA_SCALE./a>);>L65" class="line" namon>L65">3 65./a>}>L66" class="line" namon>L66">3 66./a>>L67" class="line" namon>L67">3 67./a>.spa  class="comment">/*./spa  >L68" class="line" namon>L68">3 68./a>.spa  class="comment"> *      calculate divider for lcd div./spa  >L69" class="line" namon>L69">3 69./a>.spa  class="comment"> */./spa  >L70" class="line" namon>L70">3 70./a>static unsigned int3.a href="+code=nuc900fb_calc_pixclk" class="sref">nuc900fb_calc_pixclk./a>(struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a>,>L71" class="line" namon>L71">3 71./a>                                         unsigned long3.a href="+code=pixclk" class="sref">pixclk./a>)>L72" class="line" namon>L72">3 72./a>{>L73" class="line" namon>L73">3 73./a>        unsigned long3.a href="+code=clk" class="sref">clk./a> =3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=clk_rate" class="sref">clk_rate./a>;>L74" class="line" namon>L74">3 74./a>        unsigned long3long3.a href="+code=div" class="sref">div./a>;>L75" class="line" namon>L75">3 75./a>>L76" class="line" namon>L76">3 76./a>        .spa  class="comment">/* pixclk is in picseconds. our clock is in Hz*/./spa  >L77" class="line" namon>L77">3 77./a>        .spa  class="comment">/* div = (clk * pixclk)/10^12 */./spa  >L78" class="line" namon>L78">3 78./a>        .a href="+code=div" class="sref">div./a> = (unsigned long3long).a href="+code=clk" class="sref">clk./a> *3.a href="+code=pixclk" class="sref">pixclk./a>;>L79" class="line" namon>L79">3 79./a>        .a href="+code=div" class="sref">div./a> >>= 12;>L80" class="line" namon>L80">3 80./a>        .a href="+code=do_div" class="sref">do_div./a>(.a href="+code=div" class="sref">div./a>, 625 *3625UL *3625);>L81" class="line" namon>L81">3 81./a>>L82" class="line" namon>L82">3 82./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"pixclk %ld, divisor is %lld\n"pixclk./a>,3.a href="+code=div" class="sref">div./a>);>L83" class="line" namon>L83">3 83./a>>L84" class="line" namon>L84">3 84./a>        return .a href="+code=div" class="sref">div./a>;>L85" class="line" namon>L85">3 85./a>}>L86" class="line" namon>L86">3 86./a>>L87" class="line" namon>L87">3 87./a>.spa  class="comment">/*./spa  >L88" class="line" namon>L88">3 88./a>.spa  class="comment"> *      Check the/video params of 'var'../spa  >L89" class="line" namon>L89">3 89./a>.spa  class="comment"> */./spa  >L90" class="line" namon>L90">3 90./a>static int3.a href="+code=nuc900fb_check_var" class="sref">nuc900fb_check_var./a>(struct3.a href="+code=fb_var_screeninfo" class="sref">fb_var_screeninfo./a> *.a href="+code=var" class="sref">var./a>,>L91" class="line" namon>L91">3 91./a>                               struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">info./a>)>L92" class="line" namon>L92">3 92./a>{>L93" class="line" namon>L93">3 93./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=info" class="sref">info./a>->.a href="+code=par" class="sref">par./a>;>L94" class="line" namon>L94">3 94./a>        struct3.a href="+code=nuc900fb_mach_info" class="sref">nuc900fb_mach_info./a> *.a href="+code=mach_info" class="sref">mach_info./a> =3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>->.a href="+code=platform_data" class="sref">platform_data./a>;>L95" class="line" namon>L95">3 95./a>        struct3.a href="+code=nuc900fb_display" class="sref">nuc900fb_display./a> *.a href="+code=display" class="sref">display./a> =3.a href="+code=NULL" class="sref">NULL./a>;>L96" class="line" namon>L96">3 96./a>        struct3.a href="+code=nuc900fb_display" class="sref">nuc900fb_display./a> *.a href="+code=default_display" class="sref">default_display./a> =3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=displays" class="sref">displays./a> +>L97" class="line" namon>L97">3 97./a>                                                   .a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=default_display" class="sref">default_display./a>;>L98" class="line" namon>L98">3 98./a>        int3.a href="+code=i" class="sref">i./a>;>L99" class="line" namon>L99">3 99./a>>L100" class="line" namon>L100">3100./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"check_var(var=%p, info=%p)\n"var./a>,3.a href="+code=info" class="sref">info./a>);>L101" class="line" namon>L101">3101./a>>L102" class="line" namon>L102">3102./a>        .spa  class="comment">/* validate x/y resolu.12L103" class="line" namon>L103">3103./a>        .spa  class="comment">/* choose default mode if possible/*/./spa  >L104" class="line" namon>L104">3104./a>        if (.a href="+code=var" class="sref">var./a>->.a href="+code=xres" class="sref">xres./a> ==3.a href="+code=default_display" class="sref">default_display./a>->.a href="+code=xres" class="sref">xres./a> &&>L105" class="line" namon>L105">3105./a>            .a href="+code=var" class="sref">var./a>->.a href="+code=yres" class="sref">yres./a> ==3.a href="+code=default_display" class="sref">default_display./a>->.a href="+code=yres" class="sref">yres./a> &&>L106" class="line" namon>L106">3106./a>            .a href="+code=var" class="sref">var./a>->.a href="+code=bits_per_pixel" class="sref">bits_per_pixel./a> ==3.a href="+code=default_display" class="sref">default_display./a>->.a href="+code=bpp" class="sref">bpp./a>)>L107" class="line" namon>L107">3107./a>                .a href="+code=display" class="sref">display./a> =3.a href="+code=default_display" class="sref">default_display./a>;>L108" class="line" namon>L108">3108./a>        else>L109" class="line" namon>L109">3109./a>                for (.a href="+code=i" class="sref">i./a> =30;3.a href="+code=i" class="sref">i./a> < .a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=num_displays" class="sref">num_displays./a>;3.a href="+code=i" class="sref">i./a>++)>L110" class="line" namon>L110">3110./a>                        if (.a href="+code=var" class="sref">var./a>->.a href="+code=xres" class="sref">xres./a> ==3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=displays" class="sref">displays./a>[.a href="+code=i" class="sref">i./a>]..a href="+code=xres" class="sref">xres./a> &&>L111" class="line" namon>L111">3111./a>                            .a href="+code=var" class="sref">var./a>->.a href="+code=yres" class="sref">yres./a> ==3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=displays" class="sref">displays./a>[.a href="+code=i" class="sref">i./a>]..a href="+code=yres" class="sref">yres./a> &&>L112" class="line" namon>L112">3112./a>                            .a href="+code=var" class="sref">var./a>->.a href="+code=bits_per_pixel" class="sref">bits_per_pixel./a> ==3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=displays" class="sref">displays./a>[.a href="+code=i" class="sref">i./a>]..a href="+code=bpp" class="sref">bpp./a>) {>L113" class="line" namon>L113">3113./a>                                .a href="+code=display" class="sref">display./a> =3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=displays" class="sref">displays./a> +3.a href="+code=i" class="sref">i./a>;>L114" class="line" namon>L114">3114./a>                                break;>L115" class="line" namon>L115">3115./a>                        }>L116" class="line" namon>L116">3116./a>>L117" class="line" namon>L117">3117./a>        if (.a href="+code=display" class="sref">display./a> ==3.a href="+code=NULL" class="sref">NULL./a>) {>L118" class="line" namon>L118">3118./a>                .a href="+code=printk" class="sref">printk./a>(.a href="+code=KERN_ERR" class="sref">KERN_ERR./a> .spa  class="string">"wrong3resolu.12L119" class="line" namon>L119">3119./a>                        .a href="+code=var" class="sref">var./a>->.a href="+code=xres" class="sref">xres./a>,3.a href="+code=var" class="sref">var./a>->.a href="+code=yres" class="sref">yres./a>,3.a href="+code=var" class="sref">var./a>->.a href="+code=bits_per_pixel" class="sref">bits_per_pixel./a>);>L120" class="line" namon>L120">3120./a>                return -.a href="+code=EINVAL" class="sref">EINVAL./a>;>L121" class="line" namon>L121">3121./a>        }>L122" class="line" namon>L122">3122./a>>L123" class="line" namon>L123">3123./a>        .spa  class="comment">/* it should be the/samo size as the/display/*/./spa  >L124" class="line" namon>L124">3124./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=xres_virtual" class="sref">xres_virtual./a>       =3.a href="+code=display" class="sref">display./a>->.a href="+code=xres" class="sref">xres./a>;>L125" class="line" namon>L125">3125./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=yres_virtual" class="sref">yres_virtual./a>       =3.a href="+code=display" class="sref">display./a>->.a href="+code=yres" class="sref">yres./a>;>L126" class="line" namon>L126">3126./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=height" class="sref">height./a>             =3.a href="+code=display" class="sref">display./a>->.a href="+code=height" class="sref">height./a>;>L127" class="line" namon>L127">3127./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=width" class="sref">width./a>              =3.a href="+code=display" class="sref">display./a>->.a href="+code=width" class="sref">width./a>;>L128" class="line" namon>L128">3128./a>>L129" class="line" namon>L129">3129./a>        .spa  class="comment">/* copy lcd settings/*/./spa  >L130" class="line" namon>L130">3130./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=pixclock" class="sref">pixclock./a>           =3.a href="+code=display" class="sref">display./a>->.a href="+code=pixclock" class="sref">pixclock./a>;>L131" class="line" namon>L131">3131./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=left_margin" class="sref">left_margin./a>        =3.a href="+code=display" class="sref">display./a>->.a href="+code=left_margin" class="sref">left_margin./a>;>L132" class="line" namon>L132">3132./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=right_margin" class="sref">right_margin./a>       =3.a href="+code=display" class="sref">display./a>->.a href="+code=right_margin" class="sref">right_margin./a>;>L133" class="line" namon>L133">3133./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=upper_margin" class="sref">upper_margin./a>       =3.a href="+code=display" class="sref">display./a>->.a href="+code=upper_margin" class="sref">upper_margin./a>;>L134" class="line" namon>L134">3134./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=lower_margin" class="sref">lower_margin./a>       =3.a href="+code=display" class="sref">display./a>->.a href="+code=lower_margin" class="sref">lower_margin./a>;>L135" class="line" namon>L135">3135./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=vsync_len" class="sref">vsync_len./a>          =3.a href="+code=display" class="sref">display./a>->.a href="+code=vsync_len" class="sref">vsync_len./a>;>L136" class="line" namon>L136">3136./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=hsync_len" class="sref">hsync_len./a>          =3.a href="+code=display" class="sref">display./a>->.a href="+code=hsync_len" class="sref">hsync_len./a>;>L137" class="line" namon>L137">3137./a>>L138" class="line" namon>L138">3138./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=transp" class="sref">transp./a>..a href="+code=offset" class="sref">offset./a>      =30;>L139" class="line" namon>L139">3139./a>        .a href="+code=var" class="sref">var./a>->.a href="+code=transp" class="sref">transp./a>..a href="+code=length" class="sref">length./a>      =30;>L140" class="line" namon>L140">3140./a>>L141" class="line" namon>L141">3141./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_dccs" class="sref">lcd_dccs./a> =3.a href="+code=display" class="sref">display./a>->.a href="+code=dccs" class="sref">dccs./a>;>L142" class="line" namon>L142">3142./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_device_ctrl" class="sref">lcd_device_ctrl./a> =3.a href="+code=display" class="sref">display./a>->.a href="+code=devctl" class="sref">devctl./a>;>L143" class="line" namon>L143">3143./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_va_fbctrl" class="sref">lcd_va_fbctrl./a> =3.a href="+code=display" class="sref">display./a>->.a href="+code=fbctrl" class="sref">fbctrl./a>;>L144" class="line" namon>L144">3144./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_va_scale" class="sref">lcd_va_scale./a> =3.a href="+code=display" class="sref">display./a>->.a href="+code=scale" class="sref">scale./a>;>L145" class="line" namon>L145">3145./a>>L146" class="line" namon>L146">3146./a>        .spa  class="comment">/* set R/G/B possions/*/./spa  >L147" class="line" namon>L147">3147./a>        switch (.a href="+code=var" class="sref">var./a>->.a href="+code=bits_per_pixel" class="sref">bits_per_pixel./a>) {>L148" class="line" namon>L148">3148./a>        case 1:>L149" class="line" namon>L149">3149./a>        case 2:>L150" class="line" namon>L150">3150./a>        case 4:>L151" class="line" namon>L151">3151./a>        case 8:>L152" class="line" namon>L152">3152./a>        default:>L153" class="line" namon>L153">3153./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>..a href="+code=offset" class="sref">offset./a>         =30;>L154" class="line" namon>L154">3154./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>..a href="+code=length" class="sref">length./a>         =3.a href="+code=var" class="sref">var./a>->.a href="+code=bits_per_pixel" class="sref">bits_per_pixel./a>;>L155" class="line" namon>L155">3155./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=green" class="sref">green./a>              =3.a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>;>L156" class="line" namon>L156">3156./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=blue" class="sref">blue./a>               =3.a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>;>L157" class="line" namon>L157">3157./a>                break;>L158" class="line" namon>L158">3158./a>        case 12:>L159" class="line" namon>L159">3159./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>..a href="+code=length" class="sref">length./a>         =34;>L160" class="line" namon>L160">3160./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=green" class="sref">green./a>..a href="+code=length" class="sref">length./a>       =34;>L161" class="line" namon>L161">3161./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=blue" class="sref">blue./a>..a href="+code=length" class="sref">length./a>        =34;>L162" class="line" namon>L162">3162./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>..a href="+code=offset" class="sref">offset./a>         =38;>L163" class="line" namon>L163">3163./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=green" class="sref">green./a>..a href="+code=offset" class="sref">offset./a>       =34;>L164" class="line" namon>L164">3164./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=blue" class="sref">blue./a>..a href="+code=offset" class="sref">offset./a>        =30;>L165" class="line" namon>L165">3165./a>                break;>L166" class="line" namon>L166">3166./a>        case 16:>L167" class="line" namon>L167">3167./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>..a href="+code=length" class="sref">length./a>         =35;>L168" class="line" namon>L168">3168./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=green" class="sref">green./a>..a href="+code=length" class="sref">length./a>       =36;>L169" class="line" namon>L169">3169./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=blue" class="sref">blue./a>..a href="+code=length" class="sref">length./a>        =35;>L170" class="line" namon>L170">3170./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>..a href="+code=offset" class="sref">offset./a>         =311;>L171" class="line" namon>L171">3171./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=green" class="sref">green./a>..a href="+code=offset" class="sref">offset./a>       =35;>L172" class="line" namon>L172">3172./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=blue" class="sref">blue./a>..a href="+code=offset" class="sref">offset./a>        =30;>L173" class="line" namon>L173">3173./a>                break;>L174" class="line" namon>L174">3174./a>        case 18:>L175" class="line" namon>L175">3175./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>..a href="+code=length" class="sref">length./a>         =36;>L176" class="line" namon>L176">3176./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=green" class="sref">green./a>..a href="+code=length" class="sref">length./a>       =36;>L177" class="line" namon>L177">3177./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=blue" class="sref">blue./a>..a href="+code=length" class="sref">length./a>        =36;>L178" class="line" namon>L178">3178./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>..a href="+code=offset" class="sref">offset./a>         =312;>L179" class="line" namon>L179">3179./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=green" class="sref">green./a>..a href="+code=offset" class="sref">offset./a>       =36;>L180" class="line" namon>L180">3180./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=blue" class="sref">blue./a>..a href="+code=offset" class="sref">offset./a>        =30;>L181" class="line" namon>L181">3181./a>                break;>L182" class="line" namon>L182">3182./a>        case 32:>L183" class="line" namon>L183">3183./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>..a href="+code=length" class="sref">length./a>         =38;>L184" class="line" namon>L184">3184./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=green" class="sref">green./a>..a href="+code=length" class="sref">length./a>       =38;>L185" class="line" namon>L185">3185./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=blue" class="sref">blue./a>..a href="+code=length" class="sref">length./a>        =38;>L186" class="line" namon>L186">3186./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=red" class="sref">red./a>..a href="+code=offset" class="sref">offset./a>         =316;>L187" class="line" namon>L187">3187./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=green" class="sref">green./a>..a href="+code=offset" class="sref">offset./a>       =38;>L188" class="line" namon>L188">3188./a>                .a href="+code=var" class="sref">var./a>->.a href="+code=blue" class="sref">blue./a>..a href="+code=offset" class="sref">offset./a>        =30;>L189" class="line" namon>L189">3189./a>                break;>L190" class="line" namon>L190">3190./a>        }>L191" class="line" namon>L191">3191./a>>L192" class="line" namon>L192">3192./a>        return 0;>L193" class="line" namon>L193">3193./a>}>L194" class="line" namon>L194">3194./a>>L195" class="line" namon>L195">3195./a>.spa  class="comment">/*./spa  >L196" class="line" namon>L196">3196./a>.spa  class="comment"> *      Calculate lcd register values from var setting & save into hw./spa  >L197" class="line" namon>L197">3197./a>.spa  class="comment"> */./spa  >L198" class="line" namon>L198">3198./a>static void3.a href="+code=nuc900fb_calculate_lcd_regs" class="sref">nuc900fb_calculate_lcd_regs./a>(const struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">info./a>,>L199" class="line" namon>L199">3199./a>                                        struct3.a href="+code=nuc900fb_hw" class="sref">nuc900fb_hw./a> *.a href="+code=regs" class="sref">regs./a>)>L200" class="line" namon>L200">3200./a>{>L201" class="line" namon>L201">3201./a>        const struct3.a href="+code=fb_var_screeninfo" class="sref">fb_var_screeninfo./a> *.a href="+code=var" class="sref">var./a> =3&.a href="+code=info" class="sref">info./a>->.a href="+code=var" class="sref">var./a>;>L202" class="line" namon>L202">3202./a>        int3.a href="+code=vtt" class="sref">vtt./a> =3.a href="+code=var" class="sref">var./a>->.a href="+code=height" class="sref">height./a> +3.a href="+code=var" class="sref">var./a>->.a href="+code=upper_margin" class="sref">upper_margin./a> +3.a href="+code=var" class="sref">var./a>->.a href="+code=lower_margin" class="sref">lower_margin./a>;>L203" class="line" namon>L203">3203./a>        int3.a href="+code=htt" class="sref">htt./a> =3.a href="+code=var" class="sref">var./a>->.a href="+code=width" class="sref">width./a> +3.a href="+code=var" class="sref">var./a>->.a href="+code=left_margin" class="sref">left_margin./a> +3.a href="+code=var" class="sref">var./a>->.a href="+code=right_margin" class="sref">right_margin./a>;>L204" class="line" namon>L204">3204./a>        int3.a href="+code=hsync" class="sref">hsync./a> =3.a href="+code=var" class="sref">var./a>->.a href="+code=width" class="sref">width./a> +3.a href="+code=var" class="sref">var./a>->.a href="+code=right_margin" class="sref">right_margin./a>;>L205" class="line" namon>L205">3205./a>        int3.a href="+code=vsync" class="sref">vsync./a> =3.a href="+code=var" class="sref">var./a>->.a href="+code=height" class="sref">height./a> +3.a href="+code=var" class="sref">var./a>->.a href="+code=lower_margin" class="sref">lower_margin./a>;>L206" class="line" namon>L206">3206./a>>L207" class="line" namon>L207">3207./a>        .a href="+code=regs" class="sref">regs./a>->.a href="+code=lcd_crtc_size" class="sref">lcd_crtc_size./a> =3.a href="+code=LCM_CRTC_SIZE_VTTVAL" class="sref">LCM_CRTC_SIZE_VTTVAL./a>(.a href="+code=vtt" class="sref">vtt./a>) |>L208" class="line" namon>L208">3208./a>                              .a href="+code=LCM_CRTC_SIZE_HTTVAL" class="sref">LCM_CRTC_SIZE_HTTVAL./a>(.a href="+code=htt" class="sref">htt./a>);>L209" class="line" namon>L209">3209./a>        .a href="+code=regs" class="sref">regs./a>->.a href="+code=lcd_crtc_dend" class="sref">lcd_crtc_dend./a> =3.a href="+code=LCM_CRTC_DEND_VDENDVAL" class="sref">LCM_CRTC_DEND_VDENDVAL./a>(.a href="+code=var" class="sref">var./a>->.a href="+code=height" class="sref">height./a>) |>L210" class="line" namon>L210">3210./a>                              .a href="+code=LCM_CRTC_DEND_HDENDVAL" class="sref">LCM_CRTC_DEND_HDENDVAL./a>(.a href="+code=var" class="sref">var./a>->.a href="+code=width" class="sref">width./a>);>L211" class="line" namon>L211">3211./a>        .a href="+code=regs" class="sref">regs./a>->.a href="+code=lcd_crtc_hr" class="sref">lcd_crtc_hr./a> =3.a href="+code=LCM_CRTC_HR_EVAL" class="sref">LCM_CRTC_HR_EVAL./a>(.a href="+code=var" class="sref">var./a>->.a href="+code=width" class="sref">width./a> +35) |>L212" class="line" namon>L212">3212./a>                            .a href="+code=LCM_CRTC_HR_SVAL" class="sref">LCM_CRTC_HR_SVAL./a>(.a href="+code=var" class="sref">var./a>->.a href="+code=width" class="sref">width./a> +31);>L213" class="line" namon>L213">3213./a>        .a href="+code=regs" class="sref">regs./a>->.a href="+code=lcd_crtc_hsync" class="sref">lcd_crtc_hsync./a> =3.a href="+code=LCM_CRTC_HSYNC_EVAL" class="sref">LCM_CRTC_HSYNC_EVAL./a>(.a href="+code=hsync" class="sref">hsync./a> +3.a href="+code=var" class="sref">var./a>->.a href="+code=hsync_len" class="sref">hsync_len./a>) |>L214" class="line" namon>L214">3214./a>                               .a href="+code=LCM_CRTC_HSYNC_SVAL" class="sref">LCM_CRTC_HSYNC_SVAL./a>(.a href="+code=hsync" class="sref">hsync./a>);>L215" class="line" namon>L215">3215./a>        .a href="+code=regs" class="sref">regs./a>->.a href="+code=lcd_crtc_vr" class="sref">lcd_crtc_vr./a> =3.a href="+code=LCM_CRTC_VR_EVAL" class="sref">LCM_CRTC_VR_EVAL./a>(.a href="+code=vsync" class="sref">vsync./a> +3.a href="+code=var" class="sref">var./a>->.a href="+code=vsync_len" class="sref">vsync_len./a>) |>L216" class="line" namon>L216">3216./a>                            .a href="+code=LCM_CRTC_VR_SVAL" class="sref">LCM_CRTC_VR_SVAL./a>(.a href="+code=vsync" class="sref">vsync./a>);>L217" class="line" namon>L217">3217./a>>L218" class="line" namon>L218">3218./a>}>L219" class="line" namon>L219">3219./a>>L220" class="line" namon>L220">3220./a>.spa  class="comment">/*./spa  >L221" class="line" namon>L221">3221./a>.spa  class="comment"> *      Activate (set) the/controller from the/given framobuffer./spa  >L222" class="line" namon>L222">3222./a>.spa  class="comment"> *      informa.12<./spa  >L223" class="line" namon>L223">3223./a>.spa  class="comment"> */./spa  >L224" class="line" namon>L224">3224./a>static void3.a href="+code=nuc900fb_activate_var" class="sref">nuc900fb_activate_var./a>(struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">info./a>)>L225" class="line" namon>L225">3225./a>{>L226" class="line" namon>L226">3226./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=info" class="sref">info./a>->.a href="+code=par" class="sref">par./a>;>L227" class="line" namon>L227">3227./a>        void3.a href="+code=__iomem" class="sref">__iomem./a> *.a href="+code=regs" class="sref">regs./a> =3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a>;>L228" class="line" namon>L228">3228./a>        struct3.a href="+code=fb_var_screeninfo" class="sref">fb_var_screeninfo./a> *.a href="+code=var" class="sref">var./a> =3&.a href="+code=info" class="sref">info./a>->.a href="+code=var" class="sref">var./a>;>L229" class="line" namon>L229">3229./a>        int3.a href="+code=clkdiv" class="sref">clkdiv./a>;>L230" class="line" namon>L230">3230./a>>L231" class="line" namon>L231">3231./a>        .a href="+code=clkdiv" class="sref">clkdiv./a> =3.a href="+code=nuc900fb_calc_pixclk" class="sref">nuc900fb_calc_pixclk./a>(.a href="+code=fbi" class="sref">fbi./a>,3.a href="+code=var" class="sref">var./a>->.a href="+code=pixclock" class="sref">pixclock./a>) - 1;>L232" class="line" namon>L232">3232./a>        if (.a href="+code=clkdiv" class="sref">clkdiv./a> < 0)>L233" class="line" namon>L233">3233./a>                .a href="+code=clkdiv" class="sref">clkdiv./a> =30;>L234" class="line" namon>L234">3234./a>>L235" class="line" namon>L235">3235./a>        .a href="+code=nuc900fb_calculate_lcd_regs" class="sref">nuc900fb_calculate_lcd_regs./a>(.a href="+code=info" class="sref">info./a>,3&.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>);>L236" class="line" namon>L236">3236./a>>L237" class="line" namon>L237">3237./a>        .spa  class="comment">/* set the/new lcd registers*/./spa  >L238" class="line" namon>L238">3238./a>>L239" class="line" namon>L239">3239./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"new lcd register set:\n"L240" class="line" namon>L240">3240./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"dccs       =30x%08x\n"fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_dccs" class="sref">lcd_dccs./a>);>L241" class="line" namon>L241">3241./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"dev_ctl    =30x%08x\n"fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_device_ctrl" class="sref">lcd_device_ctrl./a>);>L242" class="line" namon>L242">3242./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"crtc_size  =30x%08x\n"fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_crtc_size" class="sref">lcd_crtc_size./a>);>L243" class="line" namon>L243">3243./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"crtc_dend  =30x%08x\n"fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_crtc_dend" class="sref">lcd_crtc_dend./a>);>L244" class="line" namon>L244">3244./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"crtc_hr    =30x%08x\n"fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_crtc_hr" class="sref">lcd_crtc_hr./a>);>L245" class="line" namon>L245">3245./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"crtc_hsync =30x%08x\n"fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_crtc_hsync" class="sref">lcd_crtc_hsync./a>);>L246" class="line" namon>L246">3246./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"crtc_vr    =30x%08x\n"fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_crtc_vr" class="sref">lcd_crtc_vr./a>);>L247" class="line" namon>L247">3247./a>>L248" class="line" namon>L248">3248./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_device_ctrl" class="sref">lcd_device_ctrl./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DEV_CTRL" class="sref">REG_LCM_DEV_CTRL./a>);>L249" class="line" namon>L249">3249./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_crtc_size" class="sref">lcd_crtc_size./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_CRTC_SIZE" class="sref">REG_LCM_CRTC_SIZE./a>);>L250" class="line" namon>L250">3250./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_crtc_dend" class="sref">lcd_crtc_dend./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_CRTC_DEND" class="sref">REG_LCM_CRTC_DEND./a>);>L251" class="line" namon>L251">3251./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_crtc_hr" class="sref">lcd_crtc_hr./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_CRTC_HR" class="sref">REG_LCM_CRTC_HR./a>);>L252" class="line" namon>L252">3252./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_crtc_hsync" class="sref">lcd_crtc_hsync./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_CRTC_HSYNC" class="sref">REG_LCM_CRTC_HSYNC./a>);>L253" class="line" namon>L253">3253./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_crtc_vr" class="sref">lcd_crtc_vr./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_CRTC_VR" class="sref">REG_LCM_CRTC_VR./a>);>L254" class="line" namon>L254">3254./a>>L255" class="line" namon>L255">3255./a>        .spa  class="comment">/* set lcd address pointers */./spa  >L256" class="line" namon>L256">3256./a>        .a href="+code=nuc900fb_set_lcdaddr" class="sref">nuc900fb_set_lcdaddr./a>(.a href="+code=info" class="sref">info./a>);>L257" class="line" namon>L257">3257./a>>L258" class="line" namon>L258">3258./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=regs" class="sref">regs./a>..a href="+code=lcd_dccs" class="sref">lcd_dccs./a>,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>);>L259" class="line" namon>L259">3259./a>}>L260" class="line" namon>L260">3260./a>>L261" class="line" namon>L261">3261./a>.spa  class="comment">/*./spa  >L262" class="line" namon>L262">3262./a>.spa  class="comment"> *      Alters the/hardware state../spa  >L263" class="line" namon>L263">3263./a>.spa  class="comment"> *./spa  >L264" class="line" namon>L264">3264./a>.spa  class="comment"> */./spa  >L265" class="line" namon>L265">3265./a>static int3.a href="+code=nuc900fb_set_par" class="sref">nuc900fb_set_par./a>(struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">info./a>)>L266" class="line" namon>L266">3266./a>{>L267" class="line" namon>L267">3267./a>        struct3.a href="+code=fb_var_screeninfo" class="sref">fb_var_screeninfo./a> *.a href="+code=var" class="sref">var./a> =3&.a href="+code=info" class="sref">info./a>->.a href="+code=var" class="sref">var./a>;>L268" class="line" namon>L268">3268./a>>L269" class="line" namon>L269">3269./a>        switch (.a href="+code=var" class="sref">var./a>->.a href="+code=bits_per_pixel" class="sref">bits_per_pixel./a>) {>L270" class="line" namon>L270">3270./a>        case 32:>L271" class="line" namon>L271">3271./a>        case 24:>L272" class="line" namon>L272">3272./a>        case 18:>L273" class="line" namon>L273">3273./a>        case 16:>L274" class="line" namon>L274">3274./a>        case 12:>L275" class="line" namon>L275">3275./a>                .a href="+code=info" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=visual" class="sref">visual./a> =3.a href="+code=FB_VISUAL_TRUECOLOR" class="sref">FB_VISUAL_TRUECOLOR./a>;>L276" class="line" namon>L276">3276./a>                break;>L277" class="line" namon>L277">3277./a>        case 1:>L278" class="line" namon>L278">3278./a>                .a href="+code=info" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=visual" class="sref">visual./a> =3.a href="+code=FB_VISUAL_MONO01" class="sref">FB_VISUAL_MONO01./a>;>L279" class="line" namon>L279">3279./a>                break;>L280" class="line" namon>L280">3280./a>        default:>L281" class="line" namon>L281">3281./a>                ref="+code=info" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=visual" class="sref">visual./a> =3.a href="+code=FB_VISUAL_MONOPSE#"ECOLOR" class="sref">FB_VISUAL_PSE#"ECOLOR./a>;>L282" class="line" namon>L282">3282./a>                break;>L283" class="line" namon>L283">3283./a>        }>L284" class="line" namon>L284">3284./a>>L285" class="line" namon>L285">3285./a>        .a href="+code=" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=visuline_length" class="sref">line_length =3.a h(.a href="+code=var" class="sref">var./a>->.a href="+code=xres_virt class="sref">visuxres_virt cl./a> *3.a href="+code=var" class="sref">var./a>->.a href="+code=bits_per_pixel" class="sref">bits_per_pixel./a>) /38;>L286" class="line" namon>L286">3286./a>>L287" class="line" namon>L287">3287./a>        .spa  class="comment">/* activate this/new configura.12< */./spa  >L288" class="line" namon>L288">3288./a>        .a href="+code=nuc900fb_activate_var" class="sref">nuc900fb_activate_var./a>(.a href="+code=info" class="sref">info./a>);>L289" class="line" namon>L289">3289./a>        return 0;>L290" class="line" namon>L290">3290./a>}>L291" class="line" namon>L291">3291./a>>L292" class="line" namon>L292">3292./a>static .a href="+code=inline" class="sref">inline./a> unsigned int3.a href="+code=chan_to_field" class="sref">chan_to_field./a>(unsigned int3.a href="+code=chan" class="sref">chan./a>,>L293" class="line" namon>L293">3293./a>                                         struct3.a href="+code=fb_bitfield" class="sref">fb_bitfield./a> *.a href="+code=bf" class="sref">bf./a>)>L294" class="line" namon>L294">3294./a>{>L295" class="line" namon>L295">3295./a>        .a href="+code=chan" class="sref">chan./a>3&=30xffff;>L296" class="line" namon>L296">3296./a>        .a href="+code=chan" class="sref">chan./a>3>>=316 - .a href="+code=bf" class="sref">bf./a>->.a href="+code=length" class="sref">length./a>;>L297" class="line" namon>L297">3297./a>        return .a href="+code=chan" class="sref">chan./a>3<< .a href="+code=bf" class="sref">bf./a>->.a href="+code=offset" class="sref">offset./a>;>L298" class="line" namon>L298">3298./a>}>L299" class="line" namon>L299">3299./a>>L300" class="line" namon>L300">3300./a>static int3.a href="+code=nuc900fb_setcolreg" class="sref">nuc900fb_setcolreg./a>(unsigned .a href="+code=regno" class="sref">regno./a>,>L301" class="line" namon>L301">3301./a>                               unsigned .a href="+code=red" class="sref">red./a>, unsigned .a href="+code=green" class="sref">green./a>, unsigned .a href="+code=blue" class="sref">blue./a>,>L302" class="line" namon>L302">3302./a>                               unsigned .a href="+code=transp" class="sref">transp./a>, struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">info./a>)>L303" class="line" namon>L303">3303./a>{>L304" class="line" namon>L304">3304./a>        unsigned int3.a href="+code=vclass="sref">visuaal./a>;>L305" class="line" namon>L305">3305./a>>L306" class="line" namon>L306">3306./a>        switch (.a href="+code=" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=visual" class="sref">visual./a> =3.) {>L307" class="line" namon>L307">3307./a>        case .a href="+code=FB_VISUAL_TRUECOLOR" class="sref">FB_VISUAL_TRUECOLOR./a>:>L308" class="line" namon>L308">3308./a>                .spa  class="comment">/* true-colour, use pseuo-palette */./spa  >L309" class="line" namon>L309">3309./a>                if (.a href="+code=regno" class="sref">regno./a> < 16) {>L310" class="line" namon>L310">3310./a>                        .a href="+code=u32" class="sref">u32./a> *.a href="+code=pclass="sref">visupa> =3.a href="+code=FB_Vinfo" class="sref">info./a>->.a href="+code=pseudo_paletteass="sref">visupseudo_palette./a>;>L311" class="line" namon>L311">3311./a>>L312" class="line" namon>L312">3312./a>                        .a href="+code=vclass="sref">visuaal./a> a href="+code=FB_Vchan_to_field" class="sref">chan_to_field./a>(.a href="+code=red" class="sref">red./a>, &.a href="+code=info" class="sref">info./a>->.a href="+code=var" class="sref">var./a>href="+code=visured" class="sref">red./a>);>L313" class="line" namon>L313">3313./a>                        .a href="+code=vclass="sref">visuaal./a> | href="+code=FB_Vchan_to_field" class="sref">chan_to_field./a>(.a href="+code=green" class="sref">green./a>, &.a href="+code=info" class="sref">info./a>->.a href="+code=var" class="sref">var./a>href="+code=visugreen" class="sref">green./a>);>L314" class="line" namon>L314">3314./a>                        .a href="+code=vclass="sref">visuaal./a> | href="+code=FB_Vchan_to_field" class="sref">chan_to_field./a>(.a href="+code=blue" class="sref">blue./a>, &.a href="+code=info" class="sref">info./a>->.a href="+code=var" class="sref">var./a>href="+code=visublue" class="sref">blue./a>);>L315" class="line" namon>L315">3315./a>                        .a href="+code=pclass="sref">visupa> =3.[.a href="+code=regno" class="sref">regno./a>] =3.a href="+code=valass="sref">visuaal./a>;>L316" class="line" namon>L316">3316./a>                }>L317" class="line" namon>L317">3317./a>                break;>L318" class="line" namon>L318">3318./a>>L319" class="line" namon>L319">3319./a>        default:>L320" class="line" namon>L320">3320./a>                return 1;   .spa  class="comment">/* unknown type */./spa  >L321" class="line" namon>L321">3321./a>        }>L322" class="line" namon>L322">3322./a>        return 0;>L323" class="line" namon>L323">3323./a>}>L324" class="line" namon>L324">3324./a>>L325" class="line" namon>L325">3325./a>.spa  class="comment">/**./spa  >L326" class="line" namon>L326">3326./a>.spa  class="comment"> *      nuc900fb_blank./spa  >L327" class="line" namon>L327">3327./a>.spa  class="comment"> *./spa  >L328" class="line" namon>L328">3328./a>.spa  class="comment"> */./spa  >L329" class="line" namon>L329">3329./a>static int3.a href="+code=nuc900fb_blank" class="sref">nuc900fb_blank./a>(int3.a href="+code=blank_mode" class="sref">blank_mode./a>, struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">info./a>)>L330" class="line" namon>L330">3330./a>{>L331" class="line" namon>L331">3331./a>>L332" class="line" namon>L332">3332./a>        return 0;>L333" class="line" namon>L333">3333./a>}>L334" class="line" namon>L334">3334./a>>L335" class="line" namon>L335">3335./a>static struct3.a href="+code=fb_ops" class="sref">fb_ops./a> .a href="+code=nuc900fb_ops" class="sref">nuc900fb_ops =3.a h{>L336" class="line" namon>L336">3336./a>        ..a href="+code=owner" class="sref">owner./a>                  =3.a href="+code=THIS_MODULE" class="sref">THIS_MODULE./a>,>L337" class="line" namon>L337">3337./a>        ..a href="+code=fb_check_var" class="sref">fb_check_var./a>           =3.a href="+code=nuc900fb_check_var" class="sref">nuc900fb_check_var./a>,>L338" class="line" namon>L338">3338./a>        ..a href="+code=fb_set_par" class="sref">fb_set_par./a>             =3.a href="+code=nuc900fb_set_par" class="sref">nuc900fb_set_par./a>,>L339" class="line" namon>L339">3339./a>        ..a href="+code=fb_blank" class="sref">fb_blank./a>               =3.a href="+code=nuc900fb_blank" class="sref">nuc900fb_blank./a>,>L340" class="line" namon>L340">3340./a>        ..a href="+code=fb_setcolreg" class="sref">fb_setcolreg./a>           =3.a href="+code=nuc900fb_setcolreg" class="sref">nuc900fb_setcolreg./a>,>L341" class="line" namon>L341">3341./a>        ..a href="+code=fb_fillrect" class="sref">fb_fillrect./a>             href="+code=FB_Vcfb_fillrect" class="sref">cfb_fillrect./a>,>L342" class="line" namon>L342">3342./a>        ..a href="+code=fb_copyarea" class="sref">fb_copyarea./a>             href="+code=FB_Vcfb_copyarea" class="sref">cfb_copyarea./a>,>L343" class="line" namon>L343">3343./a>        ..a href="+code=fb_imageblit" class="sref">fb_imageblit./a>           =3.a href="+code=cfb_imageblit" class="sref">cfb_imageblit./a>,>L344" class="line" namon>L344">3344./a>};>L345" class="line" namon>L345">3345./a>>L346" class="line" namon>L346">3346./a>>L347" class="line" namon>L347">3347./a>static .a href="+code=inline" class="sref">inline./a> void3.a href="+code=modify_gpio" class="sref">modify_gpio./a>(void3.a href="+code=__iomem" class="sref">__iomem./a> *.a href="+code=reg" class="sref">reg./a>,>L348" class="line" namon>L348">3348./a>                               unsigned long3.a href="+code=set" class="sref">set./a>, unsigned long3.a href="+code=mask" class="sref">mask./a>)>L349" class="line" namon>L349">3349./a>{>L350" class="line" namon>L350">3350./a>        unsigned long3.a href="+code=tmp" class="sref">tmp./a>;>L351" class="line" namon>L351">3351./a>        .a href="+code=tmp" class="sref">tmp./a> =3.a href="+code=readlass="sref">visureadl./a>(.a href="+code=reg" class="sref">reg./a>) & ~.a href="+code=mask" class="sref">mask./a>;>L352" class="line" namon>L352">3352./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=tmp" class="sref">tmp./a> |3.a href="+code=set" class="sref">set./a>, .a href="+code=reg" class="sref">reg./a>);>L353" class="line" namon>L353">3353./a>}>L354" class="line" namon>L354">3354./a>>L355" class="line" namon>L355">3355./a>.spa  class="comment">/*./spa  >L356" class="line" namon>L356">3356./a>.spa  class="comment"> * Initialise LCD-related registers./spa  >L357" class="line" namon>L357">3357./a>.spa  class="comment"> */./spa  >L358" class="line" namon>L358">3358./a>static int3.a href="+code=nuc900fb_init_registers" class="sref">nuc900fb_init_registers./a>(struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">info./a>)>L359" class="line" namon>L359">3359./a>{>L360" class="line" namon>L360">3360./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=info" class="sref">info./a>->.a href="+code=par" class="sref">par./a>;>L361" class="line" namon>L361">3361./a>        struct3.a href="+code=nuc900fb_mach_info" class="sref">nuc900fb_mach_info./a> *.a href="+code=mach_info" class="sref">mach_info./a> =3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>->.a href="+code=platform_data" class="sref">platform_data./a>;>L362" class="line" namon>L362">3362./a>        void3.a href="+code=__iomem" class="sref">__iomem./a> *.a href="+code=regs" class="sref">regs./a> =3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a>;>L363" class="line" namon>L363">3363./a>>L364" class="line" namon>L364">3364./a>        .spa  class="comment">/*reset the/display engine*/./spa  >L365" class="line" namon>L365">3365./a>        .a href="+code=writel" class="sref">writel./a>(0,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>);>L366" class="line" namon>L366">3366./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=readlass="sref">visureadl./a>(.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>) |3.a href="+code=LCM_DCCS_ENG_RST" class="sref">LCM_DCCS_ENG_RST./a>,>L367" class="line" namon>L367">3367./a>               .a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>);>L368" class="line" namon>L368">3368./a>        .a href="+code=ndelay" class="sref">ndelay./a>(100);>L369" class="line" namon>L369">3369./a>        .a href="+code=writel" class="sref">writel./a>(.a href="+code=readlass="sref">visureadl./a>(.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>) & (~.a href="+code=LCM_DCCS_ENG_RST" class="sref">LCM_DCCS_ENG_RST./a>),>L370" class="line" namon>L370">3370./a>               .a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>);>L371" class="line" namon>L371">3371./a>        .a href="+code=ndelay" class="sref">ndelay./a>(100);>L372" class="line" namon>L372">3372./a>>L373" class="line" namon>L373">3373./a>        .a href="+code=writel" class="sref">writel./a>(0,3.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DEV_CTRL" class="sref">REG_LCM_DEV_CTRL./a>);>L374" class="line" namon>L374">3374./a>>L375" class="line" namon>L375">3375./a>        .spa  class="comment">/* config gpio output */./spa  >L376" class="line" namon>L376">3376./a>        .a href="+code=modify_gpio" class="sref">modify_gpio./a>(.a href="+code=W90X900_VA_GPIO" class="sref">W90X900_VA_GPIO./a> +30x54,3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=gpio_dir" class="sref">gpio_dir./a>,>L377" class="line" namon>L377">3377./a>                    .a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=gpio_dir_mask" class="sref">gpio_dir_mask./a>);>L378" class="line" namon>L378">3378./a>        .a href="+code=modify_gpio" class="sref">modify_gpio./a>(.a href="+code=W90X900_VA_GPIO" class="sref">W90X900_VA_GPIO./a> +30x58,3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=gpio_data" class="sref">gpio_data./a>,>L379" class="line" namon>L379">3379./a>                    .a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=gpio_data_mask" class="sref">gpio_data_mask./a>);>L380" class="line" namon>L380">3380./a>>L381" class="line" namon>L381">3381./a>        return 0;>L382" class="line" namon>L382">3382./a>}>L383" class="line" namon>L383">3383./a>>L384" class="line" namon>L384">3384./a>>L385" class="line" namon>L385">3385./a>.spa  class="comment">/*./spa  >L386" class="line" namon>L386">3386./a>.spa  class="comment"> *    Alloc the/SDRAM region of NUC900 for the/framo buffer../spa  >L387" class="line" namon>L387">3387./a>.spa  class="comment"> *    Tho buffer should be a non-cached, non-buffered, memory region./spa  >L388" class="line" namon>L388">3388./a>.spa  class="comment"> *    to allow palette and pixel writes without flushing the/cache../spa  >L389" class="line" namon>L389">3389./a>.spa  class="comment"> */./spa  >L390" class="line" namon>L390">3390./a>static int3.a href="+code=__init" class="sref">__init./a> .a href="+code=nuc900fb_map_video_memory" class="sref">nuc900fb_map_video_memory./a>(struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">info./a>)>L391" class="line" namon>L391">3391./a>{>L392" class="line" namon>L392">3392./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=info" class="sref">info./a>->.a href="+code=par" class="sref">par./a>;>L393" class="line" namon>L393">3393./a>        .a href="+code=dma_addr_t" class="sref">dma_addr_t./a> .a href="+code=map_dma" class="sref">map_dma./a>;>L394" class="line" namon>L394">3394./a>        unsigned long3.a href="+code=map_size" class="sref">map_size./a> =3.a href="+code=PAGE_ALIGN" class="sref">PAGE_ALIGN./a>(.a href="+code=" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=visusmem_len" class="sref">smem_len./a>);>L395" class="line" namon>L395">3395./a>>L396" class="line" namon>L396">3396./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"nuc900fb_map_video_memory(fbi=%p) map_size %lu\n"L397" class="line" namon>L397">3397./a>                .a href="+code=fbi" class="sref">fbi./a>,3.a href="+code=map_size" class="sref">map_size./a>);>L398" class="line" namon>L398">3398./a>>L399" class="line" namon>L399">3399./a>        .a href="+code=" class="sref">info./a>->.a href="+code=fix"screen_base" class="sref">screen_base./a> =3.a href="+code=dma_alloc_writecombine" class="sref">dma_alloc_writecombine./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.a href="+code=map_size" class="sref">map_size./a>,>L400" class="line" namon>L400">3400./a>                                                        &.a href="+code=map_dma" class="sref">map_dma./a>,3.a href="+code=GFP_KERNEL" class="sref">GFP_KERNEL./a>);>L401" class="line" namon>L401">3401./a>>L402" class="line" namon>L402">3402./a>        if (!.a href="+code=" class="sref">info./a>->.a href="+code=fix"screen_base" class="sref">screen_base./a>)>L403" class="line" namon>L403">3403./a>                return -ref="+code=fix"ENOMEM" class="sref">ENOMEM./a>;>L404" class="line" namon>L404">3404./a>>L405" class="line" namon>L405">3405./a>        .a href="+code=memset" class="sref">memset./a>(.a href="+code=" class="sref">info./a>->.a href="+code=fix"screen_base" class="sref">screen_base./a>, 0x00,3.a href="+code=map_size" class="sref">map_size./a>);>L406" class="line" namon>L406">3406./a>        .a href="+code=" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=visusmem_start" class="sref">smem_start./a> =3.a href="+code=map_dma" class="sref">map_dma./a>;>L407" class="line" namon>L407">3407./a>>L408" class="line" namon>L408">3408./a>        return 0;>L409" class="line" namon>L409">3409./a>}>L410" class="line" namon>L410">3410./a>>L411" class="line" namon>L411">3411./a>static .a href="+code=inline" class="sref">inline./a> void3.a href="+code=nuc900fb_unmap_video_memory" class="sref">nuc900fb_unmap_video_memory./a>(struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">info./a>)>L412" class="line" namon>L412">3412./a>{>L413" class="line" namon>L413">3413./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=info" class="sref">info./a>->.a href="+code=par" class="sref">par./a>;>L414" class="line" namon>L414">3414./a>        .a href="+code=dma_free_writecombine" class="sref">dma_free_writecombine./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a>,3.a href="+code=PAGE_ALIGN" class="sref">PAGE_ALIGN./a>(.a href="+code=" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=visusmem_len" class="sref">smem_len./a>),>L415" class="line" namon>L415">3415./a>                              .a href="+code=" class="sref">info./a>->.a href="+code=fix"screen_base" class="sref">screen_base./a>, .a href="+code=" class="sref">info./a>->.a href="+code=fix" class="sref">fix./a>..a href="+code=visusmem_start" class="sref">smem_start./a>);>L416" class="line" namon>L416">3416./a>}>L417" class="line" namon>L417">3417./a>>L418" class="line" namon>L418">3418./a>static .a href="+code=irqreturn_t" class="sref">irqreturn_t./a> .a href="+code=nuc900fb_irqhandler" class="sref">nuc900fb_irqhandler./a>(int3.a href="+code=irq" class="sref">irq./a>, void3*.a href="+code=dev_id" class="sref">dev_id./a>)>L419" class="line" namon>L419">3419./a>{>L420" class="line" namon>L420">3420./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=dev_id" class="sref">dev_id./a>;>L421" class="line" namon>L421">3421./a>        void3.a href="+code=__iomem" class="sref">__iomem./a> *.a href="+code=regs" class="sref">regs./a> =3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a>;>L422" class="line" namon>L422">3422./a>        void3.a href="+code=__iomem" class="sref">__iomem./a> *.a href="+code=irq_base" class="sref">irq_base./a> =3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=irq_base" class="sref">irq_base./a>;>L423" class="line" namon>L423">3423./a>        unsigned long3.a href="+code=lcdirq" class="sref">lcdirq./a> =3.a href="+code=readlass="sref">visureadl./a>(.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_INT_CS" class="sref">REG_LCM_INT_CS./a>);>L424" class="line" namon>L424">3424./a>>L425" class="line" namon>L425">3425./a>        if (.a href="+code=lcdirq" class="sref">lcdirq./a> & .a href="+code=LCM_INT_CS_DISP_F_STATUS" class="sref">LCM_INT_CS_DISP_F_STATUS./a>)h{>L426" class="line" namon>L426">3426./a>                .a href="+code=writel" class="sref">writel./a>(.a href="+code=readlass="sref">visureadl./a>(.a href="+code=irq_base" class="sref">irq_base./a>) |31<<30,3.a href="+code=irq_base" class="sref">irq_base./a>);>L427" class="line" namon>L427">3427./a>>L428" class="line" namon>L428">3428./a>                .spa  class="comment">/* wait VA_EN low */./spa  >L429" class="line" namon>L429">3429./a>                if ((.a href="+code=readlass="sref">visureadl./a>(.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>) &>L430" class="line" namon>L430">3430./a>                    .a href="+code=LCM_DCCS_SINGLE" class="sref">LCM_DCCS_SINGLE./a>) ==3.a href="+code=LCM_DCCS_SINGLE" class="sref">LCM_DCCS_SINGLE./a>)>L431" class="line" namon>L431">3431./a>                        while ((.a href="+code=readlass="sref">visureadl./a>(.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>) &>L432" class="line" namon>L432">3432./a>                               .a href="+code=LCM_DCCS_VA_EN" class="sref">LCM_DCCS_VA_EN./a>) ==3.a href="+code=LCM_DCCS_VA_EN" class="sref">LCM_DCCS_VA_EN./a>)>L433" class="line" namon>L433">3433./a>                                ;>L434" class="line" namon>L434">3434./a>                .spa  class="comment">/* display_out-enable */./spa  >L435" class="line" namon>L435">3435./a>                .a href="+code=writel" class="sref">writel./a>(.a href="+code=readlass="sref">visureadl./a>(.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>) |3.a href="+code=LCM_DCCS_DISP_OUT_EN" class="sref">LCM_DCCS_DISP_OUT_EN./a>,>L436" class="line" namon>L436">3436./a>                        .a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>);>L437" class="line" namon>L437">3437./a>                .spa  class="comment">/* va-enable*/./spa  >L438" class="line" namon>L438">3438./a>                .a href="+code=writel" class="sref">writel./a>(.a href="+code=readlass="sref">visureadl./a>(.a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>) |3.a href="+code=LCM_DCCS_VA_EN" class="sref">LCM_DCCS_VA_EN./a>,>L439" class="line" namon>L439">3439./a>                        .a href="+code=regs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>);>L440" class="line" namon>L440">3440./a>        } else if (.a href="+code=lcdirq" class="sref">lcdirq./a> & .a href="+code=LCM_INT_CS_UNDERRUN_INT" class="sref">LCM_INT_CS_UNDERRUN_INT./a>)h{>L441" class="line" namon>L441">3441./a>                ref="+code=infowritel" class="sref">writel./a>(.a href="+code=readlass="sref">visureadl./a>(.a href="+code=irq_base" class="sref">irq_base./a>) |3.a href="+code=LCM_INT_CS_UNDERRUN_INT" class="sref">LCM_INT_CS_UNDERRUN_INT./a>,3.a href="+code=irq_base" class="sref">irq_base./a>);>L442" class="line" namon>L442">3442./a>        } else if (.a href="+code=lcdirq" class="sref">lcdirq./a> & .a href="+code=LCM_INT_CS_BUS_ERROR_INT" class="sref">LCM_INT_CS_BUS_ERROR_INT./a>)h{>L443" class="line" namon>L443">3443./a>                ref="+code=infowritel" class="sref">writel./a>(.a href="+code=readlass="sref">visureadl./a>(.a href="+code=irq_base" class="sref">irq_base./a>) |3.a href="+code=LCM_INT_CS_BUS_ERROR_INT" class="sref">LCM_INT_CS_BUS_ERROR_INT./a>,3.a href="+code=irq_base" class="sref">irq_base./a>);>L444" class="line" namon>L444">3444./a>        }>L445" class="line" namon>L445">3445./a>>L446" class="line" namon>L446">3446./a>        return .a href="+code=IRQ_HANDLED" class="sref">IRQ_HANDLED./a>;>L447" class="line" namon>L447">3447./a>}>L448" class="line" namon>L448">3448./a>>L449" class="line" namon>L449">3449./a>#ifdef .a href="+code=CONFIG_CPU_FREQ" class="sref">CONFIG_CPU_FREQ./a>>L450" class="line" namon>L450">3450./a>>L451" class="line" namon>L451">3451./a>static int3.a href="+code=nuc900fb_cpufreq_transi.12<" class="sref">nuc900fb_cpufreq_transi.12<./a>(struct3.a href="+code=notifier_block" class="sref">notifier_block./a> *.a href="+code=nb" class="sref">nb./a>,>L452" class="line" namon>L452">3452./a>                                       unsigned long3.a href="+code=valass="sref">visuaal./a>, void3*.a href="+code=data" class="sref">data./a>)>L453" class="line" namon>L453">3453./a>{>L454" class="line" namon>L454">3454./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=" class="sref">info./a>->>L455" class="line" namon>L455">3455./a>        struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=fbinfo" class="sref">fb./a>->>L456" class="line" namon>L456">3456./a>        long3.a href="+code=delta_f" class="sref">delta_f->>L457" class="line" namon>L457">3457./a>        .a href="+code=" class="sref">info./a>-> =3.a href="+code=container_of" class="sref">container_of./a>(.a href="+code=nb" class="sref">nb./a>, struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a>,3.a href="+code=freq_transi.12<" class="sref">freq_transi.12<./a>);>L458" class="line" namon>L458">3458./a>        .a href="+code=fbinfo" class="sref">fb./a>-> =3.a href="+code=platform_get_drvdata" class="sref">platform_get_drvdata./a>(.a href="+code=to_platform_device" class="sref">to_platform_device./a>(.a href="+code=i class="sref">info./a>->.a href="+code=fix"dev" class="sref">dev./a>));>L459" class="line" namon>L459">3459./a>>L460" class="line" namon>L460">3460./a>        .a href="+code=delta_f" class="sref">delta_f-> =3.a href="+code=info" class="sref">info./a>->.a href="+code=clk_rateass="sref">visuclk_rate-> - .a href="+code=clk_get_rateass="sref">visuclk_get_rate./a>(.a href="+code=i class="sref">info./a>->.a href="+code=fix"clkass="sref">visuclk./a>);>L461" class="line" namon>L461">3461./a>>L462" class="line" namon>L462">3462./a>        if ((.a href="+code=vclass="sref">visuaal./a> ==3.a href="+code=CPUFREQ_POSTCHANGE" class="sref">CPUFREQ_POSTCHANGE./a> && .a href="+code=delta_f" class="sref">delta_f-> .a h 0) ||>L463" class="line" namon>L463">3463./a>           (.a href="+code=vclass="sref">visuaal./a> ==3.a href="+code=CPUFREQ_PRECHANGE" class="sref">CPUFREQ_PRECHANGE./a> && .a href="+code=delta_f" class="sref">delta_f-> .l h 0))h{>L464" class="line" namon>L464">3464./a>                .a href="+code=info" class="sref">info./a>->.a href="+code=clk_rateass="sref">visuclk_rate-> =3.a href="+code=clk_get_rateass="sref">visuclk_get_rate./a>(.a href="+code=i class="sref">info./a>->.a href="+code=fix"clkass="sref">visuclk./a>);>L465" class="line" namon>L465">3465./a>                .a href="+code=nuc900fb_activate_var" class="sref">nuc900fb_activate_var./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L466" class="line" namon>L466">3466./a>        }>L467" class="line" namon>L467">3467./a>>L468" class="line" namon>L468">3468./a>        return 0;>L469" class="line" namon>L469">3469./a>}>L470" class="line" namon>L470">3470./a>>L471" class="line" namon>L471">3471./a>static .a href="+code=inline" class="sref">inline./a> int3.a href="+code=nuc900fb_cpufreq_register" class="sref">nuc900fb_cpufreq_register./a>(struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a>)>L472" class="line" namon>L472">3472./a>{>L473" class="line" namon>L473">3473./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=freq_transi.12<" class="sref">freq_transi.12<./a>href="+code=visunotifier_callass="sref">visunotifier_call-> =3.a href="+code=nuc900fb_cpufreq_transi.12<" class="sref">nuc900fb_cpufreq_transi.12<./a>;>L474" class="line" namon>L474">3474./a>        return ref="+code=fix"cpufreq_register_notifierass="sref">visucpufreq_register_notifier./a>(&.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=freq_transi.12<" class="sref">freq_transi.12<./a>,>L475" class="line" namon>L475">3475./a>                                  .a href="+code=CPUFREQ_TRANSITION_NOTIFIER" class="sref">CPUFREQ_TRANSITION_NOTIFIER->);>L476" class="line" namon>L476">3476./a>}>L477" class="line" namon>L477">3477./a>>L478" class="line" namon>L478">3478./a>static .a href="+code=inline" class="sref">inline./a> void3.a href="+code=nuc900fb_cpufreq_deregister" class="sref">nuc900fb_cpufreq_deregister./a>(struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a>)>L479" class="line" namon>L479">3479./a>{>L480" class="line" namon>L480">3480./a>        .a href="+code=cpufreq_unregister_notifierass="sref">visucpufreq_unregister_notifier./a>(&.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=freq_transi.12<" class="sref">freq_transi.12<./a>,>L481" class="line" namon>L481">3481./a>                                    .a href="+code=CPUFREQ_TRANSITION_NOTIFIER" class="sref">CPUFREQ_TRANSITION_NOTIFIER->);>L482" class="line" namon>L482">3482./a>}>L483" class="line" namon>L483">3483./a>#else>L484" class="line" namon>L484">3484./a>static .a href="+code=inline" class="sref">inline./a> int3.a href="+code=nuc900fb_cpufreq_transi.12<" class="sref">nuc900fb_cpufreq_transi.12<./a>(struct3.a href="+code=notifier_block" class="sref">notifier_block./a> *.a href="+code=nb" class="sref">nb./a>,>L485" class="line" namon>L485">3485./a>                                       unsigned long3.a href="+code=valass="sref">visuaal./a>, void3*.a href="+code=data" class="sref">data./a>)>L486" class="line" namon>L486">3486./a>{>L487" class="line" namon>L487">3487./a>        return 0;>L488" class="line" namon>L488">3488./a>}>L489" class="line" namon>L489">3489./a>>L490" class="line" namon>L490">3490./a>static .a href="+code=inline" class="sref">inline./a> int3.a href="+code=nuc900fb_cpufreq_register" class="sref">nuc900fb_cpufreq_register./a>(struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a>)>L491" class="line" namon>L491">3491./a>{>L492" class="line" namon>L492">3492./a>        return 0;>L493" class="line" namon>L493">3493./a>}>L494" class="line" namon>L494">3494./a>>L495" class="line" namon>L495">3495./a>static .a href="+code=inline" class="sref">inline./a> void3.a href="+code=nuc900fb_cpufreq_deregister" class="sref">nuc900fb_cpufreq_deregister./a>(struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=info" class="sref">info./a>)>L496" class="line" namon>L496">3496./a>{>L497" class="line" namon>L497">3497./a>}>L498" class="line" namon>L498">3498./a>#endif>L499" class="line" namon>L499">3499./a>>L500" class="line" namon>L500">3500./a>static char .a href="+code=driver_namo" class="sref">driver_namo./a>[] =3.spa  class="string">"nuc900fb"L501" class="line" namon>L501">3501./a>>L502" class="line" namon>L502">3502./a>static int3.a href="+code=__devinit" class="sref">__devinit./a> .a href="+code=nuc900fb_probo" class="sref">nuc900fb_probo./a>(struct3.a href="+code=platform_device" class="sref">platform_device./a> *.a href="+code=pdev" class="sref">pdev./a>)>L503" class="line" namon>L503">3503./a>{>L504" class="line" namon>L504">3504./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a>;>L505" class="line" namon>L505">3505./a>        struct3.a href="+code=nuc900fb_display" class="sref">nuc900fb_display./a> *.a href="+code=display" class="sref">display./a>;>L506" class="line" namon>L506">3506./a>        struct3.a href="+code=fb_info" class="sref">fb_info./a>     *.a href="+code=fbinfo" class="sref">fb./a>->>L507" class="line" namon>L507">3507./a>        struct3.a href="+code=nuc900fb_mach_info" class="sref">nuc900fb_mach_info./a> *.a href="+code=mach_info" class="sref">mach_info./a>;>L508" class="line" namon>L508">3508./a>        struct3.a href="+code=resource" class="sref">resource./a> *.a href="+code=res" class="sref">res./a>;>L509" class="line" namon>L509">3509./a>        int3.a href="+code=ret" class="sref">ret./a>;>L510" class="line" namon>L510">3510./a>        int3.a href="+code=irq" class="sref">irq./a>;>L511" class="line" namon>L511">3511./a>        int3.a href="+code=i" class="sref">i./a>;>L512" class="line" namon>L512">3512./a>        int3.a href="+code=size" class="sref">size./a>;>L513" class="line" namon>L513">3513./a>>L514" class="line" namon>L514">3514./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"devinit\n"L515" class="line" namon>L515">3515./a>        .a href="+code=mach_info" class="sref">mach_info./a> =3.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>href="+code=visuplatform_data" class="sref">platform_data./a>;>L516" class="line" namon>L516">3516./a>        if (.a href="+code=mach_info" class="sref">mach_info./a> ==3.a href="+code=NULL" class="sref">NULL./a>)h{>L517" class="line" namon>L517">3517./a>                .a href="+code=dev_err" class="sref">dev_err./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>,>L518" class="line" namon>L518">3518./a>                        .spa  class="string">"no platform data for lcd, cannot attach\n"L519" class="line" namon>L519">3519./a>                return -ref="+code=fix"EINVAL" class="sref">EINVAL./a>;>L520" class="line" namon>L520">3520./a>        }>L521" class="line" namon>L521">3521./a>>L522" class="line" namon>L522">3522./a>        if (.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=default_display" class="sref">default_display./a> .a h .a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=num_displays" class="sref">num_displays./a>)h{>L523" class="line" namon>L523">3523./a>                ref="+code=infodev_err" class="sref">dev_err./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>,>L524" class="line" namon>L524">3524./a>                        .spa  class="string">"default/display No. is %d but only %d displays \n"L525" class="line" namon>L525">3525./a>                        .a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=default_display" class="sref">default_display./a>,3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=num_displays" class="sref">num_displays./a>);>L526" class="line" namon>L526">3526./a>                return -ref="+code=fix"EINVAL" class="sref">EINVAL./a>;>L527" class="line" namon>L527">3527./a>        }>L528" class="line" namon>L528">3528./a>>L529" class="line" namon>L529">3529./a>>L530" class="line" namon>L530">3530./a>        .a href="+code=display" class="sref">display./a> =3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=displays" class="sref">displays./a> +3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=default_display" class="sref">default_display./a>;>L531" class="line" namon>L531">3531./a>>L532" class="line" namon>L532">3532./a>        .a href="+code=irq" class="sref">irq./a> =3.a href="+code=platform_get_irq" class="sref">platform_get_irq./a>(.a href="+code=pdev" class="sref">pdev./a>, 0);>L533" class="line" namon>L533">3533./a>        if (.a href="+code=irq" class="sref">irq./a> .l h 0)h{>L534" class="line" namon>L534">3534./a>                .ef="+code=infodev_err" class="sref">dev_err./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>, .spa  class="string">"no irq for device\n"L535" class="line" namon>L535">3535./a>                return -ref="+code=fix"ENOENT" class="sref">ENOENT./a>;>L536" class="line" namon>L536">3536./a>        }>L537" class="line" namon>L537">3537./a>>L538" class="line" namon>L538">3538./a>        .a href="+code=fbinfo" class="sref">fb./a>-> =3.a href="+code=framobuffer_alloc" class="sref">framobuffer_alloc./a>(sizeof(struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a>), &.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>);>L539" class="line" namon>L539">3539./a>        if (!.a href="+code=fbinfo" class="sref">fb./a>->)>L540" class="line" namon>L540">3540./a>                return -ref="+code=fix"ENOMEM" class="sref">ENOMEM./a>;>L541" class="line" namon>L541">3541./a>>L542" class="line" namon>L542">3542./a>        .a href="+code=platform_set_drvdata" class="sref">platform_set_drvdata./a>(.a href="+code=pdev" class="sref">pdev./a>, .a href="+code=fbinfo" class="sref">fb./a>->);>L543" class="line" namon>L543">3543./a>>L544" class="line" namon>L544">3544./a>        .a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=par" class="sref">par./a>;>L545" class="line" namon>L545">3545./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=dev" class="sref">dev./a> =3&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>;>L546" class="line" namon>L546">3546./a>>L547" class="line" namon>L547">3547./a>#ifdef .a href="+code=CONFIG_CPU_NUC950" class="sref">CONFIG_CPU_NUC950./a>>L548" class="line" namon>L548">3548./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=drv_typo" class="sref">drv_typo./a> =3.a href="+code=LCDDRV_NUC950" class="sref">LCDDRV_NUC950./a>;>L549" class="line" namon>L549">3549./a>#endif>L550" class="line" namon>L550">3550./a>>L551" class="line" namon>L551">3551./a>        .a href="+code=res" class="sref">res./a> =3.a href="+code=platform_get_resource" class="sref">platform_get_resource./a>(.a href="+code=pdev" class="sref">pdev./a>, .a href="+code=IORESOURCE_MEM" class="sref">IORESOURCE_MEM./a>, 0);>L552" class="line" namon>L552">3552./a>>L553" class="line" namon>L553">3553./a>        .a href="+code=size" class="sref">size./a> =3.a href="+code=resource_size" class="sref">resource_size./a>(.a href="+code=res" class="sref">res./a>);>L554" class="line" namon>L554">3554./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=mem" class="sref">mem./a> =3.a href="+code=request_mem_region" class="sref">request_mem_region./a>(.a href="+code=res" class="sref">res./a>;.a href="+code=fix"start" class="sref">start./a>, .a href="+code=size" class="sref">size./a>, .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=namo" class="sref">namo./a>);>L555" class="line" namon>L555">3555./a>        if (.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=mem" class="sref">mem./a> ==3.a href="+code=NULL" class="sref">NULL./a>)h{>L556" class="line" namon>L556">3556./a>                .ef="+code=infodev_err" class="sref">dev_err./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>, .spa  class="string">"failed to alloc memory region\n"L557" class="line" namon>L557">3557./a>                .a href="+code=ret" class="sref">ret./a> =3-ref="+code=fix"ENOENT" class="sref">ENOENT./a>;>L558" class="line" namon>L558">3558./a>                goto .a href="+code=free_fb" class="sref">free_fb./a>;>L559" class="line" namon>L559">3559./a>        }>L560" class="line" namon>L560">3560./a>>L561" class="line" namon>L561">3561./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a> =3.a href="+code=ioremap" class="sref">ioremap./a>(.a href="+code=res" class="sref">res./a>;.a href="+code=fix"start" class="sref">start./a>, .a href="+code=size" class="sref">size./a>);>L562" class="line" namon>L562">3562./a>        if (.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a> ==3.a href="+code=NULL" class="sref">NULL./a>)h{>L563" class="line" namon>L563">3563./a>                .ef="+code=infodev_err" class="sref">dev_err./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>, .spa  class="string">"ioremap() of lcd registers failed\n"L564" class="line" namon>L564">3564./a>                .a href="+code=ret" class="sref">ret./a> =3-ref="+code=fix"ENXIO" class="sref">ENXIO./a>;>L565" class="line" namon>L565">3565./a>                goto .a href="+code=release_mem_region" class="sref">release_mem_region./a>;>L566" class="line" namon>L566">3566./a>        }>L567" class="line" namon>L567">3567./a>>L568" class="line" namon>L568">3568./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=irq_base" class="sref">irq_base./a> =3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a> +3.a href="+code=REG_LCM_INT_CS" class="sref">REG_LCM_INT_CS./a>;>L569" class="line" namon>L569">3569./a>>L570" class="line" namon>L570">3570./a>>L571" class="line" namon>L571">3571./a>        .spa  class="comment">/* Stop the LCD */./spa  >L572" class="line" namon>L572">3572./a>        .a href="+code=writel" class="sref">writel./a>(0,3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>);>L573" class="line" namon>L573">3573./a>>L574" class="line" namon>L574">3574./a>        .spa  class="comment">/* fill the fb./a>*/./spa  >L575" class="line" namon>L575">3575./a>        .a href="+code=strcpy" class="sref">strcpy./a>(.a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= class="sref">fix./a>..a href="+code=visuid" class="sref">id./a>,3.a href="+code=driver_namo" class="sref">driver_namo./a>);>L576" class="line" namon>L576">3576./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= class="sref">fix./a>..a href="+code=visutypo" class="sref">typo./a>                =3.a href="+code=FB_TYPE_PACKED_PIXELS" class="sref">FB_TYPE_PACKED_PIXELS./a>;>L577" class="line" namon>L577">3577./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= class="sref">fix./a>..a href="+code=visutypo_aulass="sref">fix.typo_aul./a>            = 0;>L578" class="line" namon>L578">3578./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= class="sref">fix./a>..a href="+code=visuxpa step" class="sref">xpa step./a>            = 0;>L579" class="line" namon>L579">3579./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= class="sref">fix./a>..a href="+code=visuypa step" class="sref">ypa step./a>            = 0;>L580" class="line" namon>L580">3580./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= class="sref">fix./a>..a href="+code=visuywrapstep" class="sref">ywrapstep./a>           = 0;>L581" class="line" namon>L581">3581./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= class="sref">fix./a>..a href="+code=visuaccel" class="sref">accel./a>               =3.a href="+code=FB_ACCEL_NONE" class="sref">FB_ACCEL_NONE./a>;>L582" class="line" namon>L582">3582./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=var" class="sref">var./a>href="+code=visuno std" class="sref">no std./a>              = 0;>L583" class="line" namon>L583">3583./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=var" class="sref">var./a>href="+code=visuactivate" class="sref">activate./a>            = .a href="+code=FB_ACTIVATE_NOW" class="sref">FB_ACTIVATE_NOW./a>;>L584" class="line" namon>L584">3584./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=var" class="sref">var./a>href="+code=visuaccel_flags" class="sref">accel_flags./a>         = 0;>L585" class="line" namon>L585">3585./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=var" class="sref">var./a>href="+code=visuvmvis" class="sref">vmvis./a>               =3.a href="+code=FB_VMODE_NONINTERLACED" class="sref">FB_VMODE_NONINTERLACED./a>;>L586" class="line" namon>L586">3586./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= bops" class="sref"> bops./a>                   =3&.a href="+code=nuc900fb_ops" class="sref">nuc900fb_ops./a>;>L587" class="line" namon>L587">3587./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= lags" class="sref">flags./a>                   =3.a href="+code=FBINFO_FLAG_DEFAULT" class="sref">FBINFO_FLAG_DEFAULT./a>;>L588" class="line" namon>L588">3588./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=pseudo_palette" class="sref">pseudo_palette./a>          =3&.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=pseudo_pal" class="sref">pseudo_pal./a>;>L589" class="line" namon>L589">3589./a>>L590" class="line" namon>L590">3590./a>        .a href="+code=ret" class="sref">ret./a> =3.a href="+code=request_irq" class="sref">request_irq./a>(.a href="+code=irq" class="sref">irq./a>,3.a href="+code=nuc900fb_irqhandler" class="sref">nuc900fb_irqhandler./a>,30,>L591" class="line" namon>L591">3591./a>                          .a href="+code=pdev" class="sref">pdev./a>->.a href="+code=namo" class="sref">namo./a>, .a href="+code=fbinfo" class="sref">fb./a>->);>L592" class="line" namon>L592">3592./a>        if (.a href="+code=ret" class="sref">ret./a>)h{>L593" class="line" namon>L593">3593./a>                .ef="+code=infodev_err" class="sref">dev_err./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>, .spa  class="string">"cannot register irq handler %d -err %d\n"L594" class="line" namon>L594">3594./a>                        .a href="+code=irq" class="sref">irq./a>,3.a href="+code=ret" class="sref">ret./a>);>L595" class="line" namon>L595">3595./a>                .a href="+code=ret" class="sref">ret./a> =3-ref="+code=fix"EBUSY" class="sref">EBUSY./a>;>L596" class="line" namon>L596">3596./a>                goto .a href="+code=release_regs" class="sref">release_regs./a>;>L597" class="line" namon>L597">3597./a>        }>L598" class="line" namon>L598">3598./a>>L599" class="line" namon>L599">3599./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=clkass="sref">visuclk./a> =3.a href="+code=clk_getass="sref">visuclk_get./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>, .a href="+code=NULL" class="sref">NULL./a>);>L600" class="line" namon>L600">3600./a>        if (.a href="+code=IS_ERR" class="sref">IS_ERR./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=clkass="sref">visuclk./a>))h{>L601" class="line" namon>L601">3601./a>                ref="+code=infoprintkass="sref">visuprintk./a>(.a href="+code=KERN_ERR" class="sref">KERN_ERR./a> .spa  class="string">"nuc900-lcd:failed to get lcd clock source\n"L602" class="line" namon>L602">3602./a>                .a href="+code=ret" class="sref">ret./a> =3.a href="+code=PTR_ERR" class="sref">PTR_ERR./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=clkass="sref">visuclk./a>);>L603" class="line" namon>L603">3603./a>                goto .a href="+code=release_irq" class="sref">release_irq./a>;>L604" class="line" namon>L604">3604./a>        }>L605" class="line" namon>L605">3605./a>>L606" class="line" namon>L606">3606./a>        .a href="+code=clk_enablo" class="sref">clk_enablo./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=clkass="sref">visuclk./a>);>L607" class="line" namon>L607">3607./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"got and enablod clock\n"L608" class="line" namon>L608">3608./a>>L609" class="line" namon>L609">3609./a>        .a href="+code=fbi" class="sref">fbi./a>->.a href="+code=clk_rateass="sref">visuclk_rate-> =3.a href="+code=clk_get_rateass="sref">visuclk_get_rate./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=clkass="sref">visuclk./a>);>L610" class="line" namon>L610">3610./a>>L611" class="line" namon>L611">3611./a>        .spa  class="comment">/* calutate the video buffer size */./spa  >L612" class="line" namon>L612">3612./a>        for (.a href="+code=i" class="sref">i-> =30h .a href="+code=i" class="sref">i-> .l h .a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=num_displays" class="sref">num_displays./a>h .a href="+code=i" class="sref">i->++)h{>L613" class="line" namon>L613">3613./a>                unsigned long3.a href="+code=smem_len" class="sref">smem_len-> =3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=displays" class="sref">displays./a>[.a href="+code=i" class="sref">i->]href="+code=visuxres" class="sref">xres./a>;>L614" class="line" namon>L614">3614./a>                .a href="+code=smem_len" class="sref">smem_len-> *=3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=displays" class="sref">displays./a>[.a href="+code=i" class="sref">i->]href="+code=visuyres" class="sref">yres./a>;>L615" class="line" namon>L615">3615./a>                .a href="+code=smem_len" class="sref">smem_len-> *=3.a href="+code=mach_info" class="sref">mach_info./a>->.a href="+code=displays" class="sref">displays./a>[.a href="+code=i" class="sref">i->]href="+code=visubpp" class="sref">bpp./a>;>L616" class="line" namon>L616">3616./a>                .ef="+code=infosmem_len" class="sref">smem_len-> >>= 3;>L617" class="line" namon>L617">3617./a>                if (.a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= class="sref">fix./a>..a href="+code=visusmem_len" class="sref">smem_len-> &l h .a href="+code=smem_len" class="sref">smem_len->)>L618" class="line" namon>L618">3618./a>                        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= class="sref">fix./a>..a href="+code=visusmem_len" class="sref">smem_len-> =3.a href="+code=smem_len" class="sref">smem_len->>L619" class="line" namon>L619">3619./a>        }>L620" class="line" namon>L620">3620./a>>L621" class="line" namon>L621">3621./a>        .spa  class="comment">/* Initialize Video Memory */./spa  >L622" class="line" namon>L622">3622./a>        .a href="+code=ret" class="sref">ret./a> =3.a href="+code=nuc900fb_map_video_memory" class="sref">nuc900fb_map_video_memory./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L623" class="line" namon>L623">3623./a>        if (.a href="+code=ret" class="sref">ret./a>)h{>L624" class="line" namon>L624">3624./a>                ref="+code=infoprintkass="sref">visuprintk./a>(.a href="+code=KERN_ERR" class="sref">KERN_ERR./a> .spa  class="string">"Failed to allocate video RAM: %x\n"ret./a>);>L625" class="line" namon>L625">3625./a>                goto .a href="+code=release_clock" class="sref">release_clock->>L626" class="line" namon>L626">3626./a>        }>L627" class="line" namon>L627">3627./a>>L628" class="line" namon>L628">3628./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>,3.spa  class="string">"got video memory\n"L629" class="line" namon>L629">3629./a>>L630" class="line" namon>L630">3630./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=var" class="sref">var./a>href="+code=visuxres" class="sref">xres./a> =3.a href="+code=display" class="sref">display./a>->.a href="+code=xres" class="sref">xres./a>;>L631" class="line" namon>L631">3631./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=var" class="sref">var./a>href="+code=visuyres" class="sref">yres./a> =3.a href="+code=display" class="sref">display./a>->.a href="+code=yres" class="sref">yres./a>;>L632" class="line" namon>L632">3632./a>        .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=var" class="sref">var./a>href="+code=visubits_per_pixel" class="sref">bits_per_pixel./a> =3.a href="+code=display" class="sref">display./a>->.a href="+code=bpp" class="sref">bpp./a>;>L633" class="line" namon>L633">3633./a>>L634" class="line" namon>L634">3634./a>        .a href="+code=nuc900fb_init_registers" class="sref">nuc900fb_init_registers./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L635" class="line" namon>L635">3635./a>>L636" class="line" namon>L636">3636./a>        .a href="+code=nuc900fb_check_var" class="sref">nuc900fb_check_var./a>(&.a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=var" class="sref">var./a>, .a href="+code=fbinfo" class="sref">fb./a>->);>L637" class="line" namon>L637">3637./a>>L638" class="line" namon>L638">3638./a>        .a href="+code=ret" class="sref">ret./a> =3.a href="+code=nuc900fb_cpufreq_register" class="sref">nuc900fb_cpufreq_register./a>(.a href="+code=fbi" class="sref">fbi./a>);>L639" class="line" namon>L639">3639./a>        if (.a href="+code=ret" class="sref">ret./a> .l h 0)h{>L640" class="line" namon>L640">3640./a>                .a href="+code=dev_err" class="sref">dev_err./a>(&.a href="+code=pdev" class="sref">pdev./a>->.a href="+code=dev" class="sref">dev./a>, .spa  class="string">"Failed to register cpufreq\n"L641" class="line" namon>L641">3641./a>                goto .a href="+code=free_video_memory" class="sref">free_video_memory./a>;>L642" class="line" namon>L642">3642./a>        }>L643" class="line" namon>L643">3643./a>>L644" class="line" namon>L644">3644./a>        .a href="+code=ret" class="sref">ret./a> =3.a href="+code=register_framobuffer" class="sref">register_framobuffer./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L645" class="line" namon>L645">3645./a>        if (.a href="+code=ret" class="sref">ret./a>)h{>L646" class="line" namon>L646">3646./a>                .ef="+code=infoprintkass="sref">visuprintk./a>(.a href="+code=KERN_ERR" class="sref">KERN_ERR./a> .spa  class="string">"failed to register framobuffer device: %d\n"L647" class="line" namon>L647">3647./a>                        .a href="+code=ret" class="sref">ret./a>);>L648" class="line" namon>L648">3648./a>                goto .a href="+code=free_cpufreq" class="sref">free_cpufreq./a>;>L649" class="line" namon>L649">3649./a>        }>L650" class="line" namon>L650">3650./a>>L651" class="line" namon>L651">3651./a>        .a href="+code=printkass="sref">visuprintk./a>(.a href="+code=KERN_INFO" class="sref">KERN_INFO./a> .spa  class="string">"fb%d: %s framo buffer device\n"L652" class="line" namon>L652">3652./a>                .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=nois" class="sref">nois./a>, .a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code= class="sref">fix./a>..a href="+code=visuid" class="sref">id./a>);>L653" class="line" namon>L653">3653./a>>L654" class="line" namon>L654">3654./a>        return 0;>L655" class="line" namon>L655">3655./a>>L656" class="line" namon>L656">3656./a>.a href="+code=free_cpufreq" class="sref">free_cpufreq./a>:>L657" class="line" namon>L657">3657./a>        .a href="+code=nuc900fb_cpufreq_deregister" class="sref">nuc900fb_cpufreq_deregister./a>(.a href="+code=fbi" class="sref">fbi./a>);>L658" class="line" namon>L658">3658./a>.a href="+code=free_video_memory" class="sref">free_video_memory./a>:>L659" class="line" namon>L659">3659./a>        .a href="+code=nuc900fb_unmap_video_memory" class="sref">nuc900fb_unmap_video_memory./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L660" class="line" namon>L660">3660./a>.a href="+code=release_clock" class="sref">release_clock->:>L661" class="line" namon>L661">3661./a>        .a href="+code=clk_disablo" class="sref">clk_disablo./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=clkass="sref">visuclk./a>);>L662" class="line" namon>L662">3662./a>        .a href="+code=clk_putass="sref">visuclk_put./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=clkass="sref">visuclk./a>);>L663" class="line" namon>L663">3663./a>.a href="+code=release_irq" class="sref">release_irq./a>:>L664" class="line" namon>L664">3664./a>        .a href="+code=free_irq" class="sref">free_irq./a>(.a href="+code=irq" class="sref">irq./a>,3.a href="+code=fbi" class="sref">fbi./a>);>L665" class="line" namon>L665">3665./a>.a href="+code=release_regs" class="sref">release_regs./a>:>L666" class="line" namon>L666">3666./a>        .a href="+code=iounmap" class="sref">iounmap./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a>);>L667" class="line" namon>L667">3667./a>.a href="+code=release_mem_region" class="sref">release_mem_region./a>:>L668" class="line" namon>L668">3668./a>        .a href="+code=release_mem_region" class="sref">release_mem_region./a>(.a href="+code=res" class="sref">res./a>;.a href="+code=fix"start" class="sref">start./a>, .a href="+code=size" class="sref">size./a>);>L669" class="line" namon>L669">3669./a>.a href="+code=free_fb" class="sref">free_fb./a>:>L670" class="line" namon>L670">3670./a>        .a href="+code=framobuffer_release" class="sref">framobuffer_release./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L671" class="line" namon>L671">3671./a>        return .a href="+code=ret" class="sref">ret./a>;>L672" class="line" namon>L672">3672./a>}>L673" class="line" namon>L673">3673./a>>L674" class="line" namon>L674">3674./a>.spa  class="comment">/*./spa  >L675" class="line" namon>L675">3675./a>.spa  class="comment"> * shutdown the lcd controller./spa  >L676" class="line" namon>L676">3676./a>.spa  class="comment"> */./spa  >L677" class="line" namon>L677">3677./a>static void .a href="+code=nuc900fb_stop_lcd" class="sref">nuc900fb_stop_lcd./a>(struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=info" class="sref">./a>->)>L678" class="line" namon>L678">3678./a>{>L679" class="line" namon>L679">3679./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=info" class="sref">./a>->->.a href="+code=par" class="sref">par./a>;>L680" class="line" namon>L680">3680./a>        void .a href="+code=__iomem" class="sref">__iomem./a> *.a href="+code=regs" class="sref">regs./a> =3.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a>;>L681" class="line" namon>L681">3681./a>>L682" class="line" namon>L682">3682./a>        .a href="+code=writel" class="sref">writel./a>((~.a href="+code=LCM_DCCS_DISP_INT_EN" class="sref">LCM_DCCS_DISP_INT_EN./a>)h| (~.a href="+code=LCM_DCCS_VA_EN" class="sref">LCM_DCCS_VA_EN./a>)h| (~.a href="+code=LCM_DCCS_OSD_EN" class="sref">LCM_DCCS_OSD_EN./a>),>L683" class="line" namon>L683">3683./a>                .ef="+code=inforegs" class="sref">regs./a> +3.a href="+code=REG_LCM_DCCS" class="sref">REG_LCM_DCCS./a>);>L684" class="line" namon>L684">3684./a>}>L685" class="line" namon>L685">3685./a>>L686" class="line" namon>L686">3686./a>.spa  class="comment">/*./spa  >L687" class="line" namon>L687">3687./a>.spa  class="comment"> *  Cleanup./spa  >L688" class="line" namon>L688">3688./a>.spa  class="comment"> */./spa  >L689" class="line" namon>L689">3689./a>static int3.a href="+code=nuc900fb_removs" class="sref">nuc900fb_removs./a>(struct3.a href="+code=platform_device" class="sref">platform_device./a> *.a href="+code=pdev" class="sref">pdev./a>)>L690" class="line" namon>L690">3690./a>{>L691" class="line" namon>L691">3691./a>        struct3.a href="+code=fb_info" class="sref">fb_info./a> *.a href="+code=fbinfo" class="sref">fb./a>-> =3.a href="+code=platform_get_drvdata" class="sref">platform_get_drvdata./a>(.a href="+code=pdev" class="sref">pdev./a>);>L692" class="line" namon>L692">3692./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=par" class="sref">par./a>;>L693" class="line" namon>L693">3693./a>        int3.a href="+code=irq" class="sref">irq./a>;>L694" class="line" namon>L694">3694./a>>L695" class="line" namon>L695">3695./a>        .a href="+code=nuc900fb_stop_lcd" class="sref">nuc900fb_stop_lcd./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L696" class="line" namon>L696">3696./a>        .a href="+code=msleep" class="sref">msleep./a>(1);>L697" class="line" namon>L697">3697./a>>L698" class="line" namon>L698">3698./a>        .a href="+code=unregister_framobuffer" class="sref">unregister_framobuffer./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L699" class="line" namon>L699">3699./a>        .a href="+code=nuc900fb_cpufreq_deregister" class="sref">nuc900fb_cpufreq_deregister./a>(.a href="+code=fbi" class="sref">fbi./a>);>L700" class="line" namon>L700">3700./a>        .a href="+code=nuc900fb_unmap_video_memory" class="sref">nuc900fb_unmap_video_memory./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L701" class="line" namon>L701">3701./a>>L702" class="line" namon>L702">3702./a>        .a href="+code=iounmap" class="sref">iounmap./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=io" class="sref">io./a>);>L703" class="line" namon>L703">3703./a>>L704" class="line" namon>L704">3704./a>        .a href="+code=irq" class="sref">irq./a> =3.a href="+code=platform_get_irq" class="sref">platform_get_irq./a>(.a href="+code=pdev" class="sref">pdev./a>, 0);>L705" class="line" namon>L705">3705./a>        .a href="+code=free_irq" class="sref">free_irq./a>(.a href="+code=irq" class="sref">irq./a>,3.a href="+code=fbi" class="sref">fbi./a>);>L706" class="line" namon>L706">3706./a>>L707" class="line" namon>L707">3707./a>        .a href="+code=release_resource" class="sref">release_resource./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=mem" class="sref">mem./a>);>L708" class="line" namon>L708">3708./a>        .a href="+code=kfree" class="sref">kfree./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=mem" class="sref">mem./a>);>L709" class="line" namon>L709">3709./a>>L710" class="line" namon>L710">3710./a>        .a href="+code=platform_set_drvdata" class="sref">platform_set_drvdata./a>(.a href="+code=pdev" class="sref">pdev./a>, .a href="+code=NULL" class="sref">NULL./a>);>L711" class="line" namon>L711">3711./a>        .a href="+code=framobuffer_release" class="sref">framobuffer_release./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L712" class="line" namon>L712">3712./a>>L713" class="line" namon>L713">3713./a>        return 0;>L714" class="line" namon>L714">3714./a>}>L715" class="line" namon>L715">3715./a>>L716" class="line" namon>L716">3716./a>#ifdef .a href="+code=CONFIG_PM" class="sref">CONFIG_PM./a>>L717" class="line" namon>L717">3717./a>>L718" class="line" namon>L718">3718./a>.spa  class="comment">/*./spa  >L719" class="line" namon>L719">3719./a>.spa  class="comment"> *      suspend and resume support for the lcd controller./spa  >L720" class="line" namon>L720">3720./a>.spa  class="comment"> */./spa  >L721" class="line" namon>L721">3721./a>>L722" class="line" namon>L722">3722./a>static int3.a href="+code=nuc900fb_suspend" class="sref">nuc900fb_suspend./a>(struct3.a href="+code=platform_device" class="sref">platform_device./a> *.a href="+code=dev" class="sref">dev./a>, .a href="+code=pm_message_t" class="sref">pm_message_t./a> ref="+code=fix"stateass="sref">visustate./a>)>L723" class="line" namon>L723">3723./a>{>L724" class="line" namon>L724">3724./a>        struct3.a href="+code=fb_info" class="sref">fb_info./a>     *.a href="+code=fbinfo" class="sref">fb./a>-> =3.a href="+code=platform_get_drvdata" class="sref">platform_get_drvdata./a>(.a href="+code=dev" class="sref">dev./a>);>L725" class="line" namon>L725">3725./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=info" class="sref">./a>-> =3.a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=par" class="sref">par./a>;>L726" class="line" namon>L726">3726./a>>L727" class="line" namon>L727">3727./a>        .a href="+code=nuc900fb_stop_lcd" class="sref">nuc900fb_stop_lcd./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L728" class="line" namon>L728">3728./a>        .a href="+code=msleep" class="sref">msleep./a>(1);>L729" class="line" namon>L729">3729./a>        .a href="+code=clk_disablo" class="sref">clk_disablo./a>(.a href="+code=info" class="sref">./a>->->.a href="+code=clkass="sref">visuclk./a>);>L730" class="line" namon>L730">3730./a>        return 0;>L731" class="line" namon>L731">3731./a>}>L732" class="line" namon>L732">3732./a>>L733" class="line" namon>L733">3733./a>static int3.a href="+code=nuc900fb_resume" class="sref">nuc900fb_resume./a>(struct3.a href="+code=platform_device" class="sref">platform_device./a> *.a href="+code=dev" class="sref">dev./a>)>L734" class="line" namon>L734">3734./a>{>L735" class="line" namon>L735">3735./a>        struct3.a href="+code=fb_info" class="sref">fb_info./a>     *.a href="+code=fbinfo" class="sref">fb./a>-> =3.a href="+code=platform_get_drvdata" class="sref">platform_get_drvdata./a>(.a href="+code=dev" class="sref">dev./a>);>L736" class="line" namon>L736">3736./a>        struct3.a href="+code=nuc900fb_info" class="sref">nuc900fb_info./a> *.a href="+code=fbi" class="sref">fbi./a> =3.a href="+code=fbinfo" class="sref">fb./a>->->.a href="+code=par" class="sref">par./a>;>L737" class="line" namon>L737">3737./a>>L738" class="line" namon>L738">3738./a>        .a href="+code=printkass="sref">visuprintk./a>(.a href="+code=KERN_INFO" class="sref">KERN_INFO./a> .spa  class="string">"nuc900fb resume\n"L739" class="line" namon>L739">3739./a>>L740" class="line" namon>L740">3740./a>        .a href="+code=clk_enablo" class="sref">clk_enablo./a>(.a href="+code=fbi" class="sref">fbi./a>->.a href="+code=clkass="sref">visuclk./a>);>L741" class="line" namon>L741">3741./a>        .a href="+code=msleep" class="sref">msleep./a>(1);>L742" class="line" namon>L742">3742./a>>L743" class="line" namon>L743">3743./a>        .a href="+code=nuc900fb_init_registers" class="sref">nuc900fb_init_registers./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L744" class="line" namon>L744">3744./a>        .a href="+code=nuc900fb_activate_var" class="sref">nuc900fb_activate_var./a>(.a href="+code=fbinfo" class="sref">fb./a>->);>L745" class="line" namon>L745">3745./a>>L746" class="line" namon>L746">3746./a>        return 0;>L747" class="line" namon>L747">3747./a>}>L748" class="line" namon>L748">3748./a>>L749" class="line" namon>L749">3749./a>#else>L750" class="line" namon>L750">3750./a>#define3.a href="+code=nuc900fb_suspend" class="sref">nuc900fb_suspend./a> .a href="+code=NULL" class="sref">NULL./a>>L751" class="line" namon>L751">3751./a>#define3.a href="+code=nuc900fb_resume" class="sref">nuc900fb_resume./a>  .a href="+code=NULL" class="sref">NULL./a>>L752" class="line" namon>L752">3752./a>#endif>L753" class="line" namon>L753">3753./a>>L754" class="line" namon>L754">3754./a>static struct3.a href="+code=platform_driver" class="sref">platform_driver./a> .a href="+code=nuc900fb_driver" class="sref">nuc900fb_driver./a> =3{>L755" class="line" namon>L755">3755./a>        href="+code=visuprobe" class="sref">probe./a>          =3.a href="+code=nuc900fb_probe" class="sref">nuc900fb_probe./a>,>L756" class="line" namon>L756">3756./a>        href="+code=visuremovs" class="sref">removs./a>         =3.a href="+code=nuc900fb_removs" class="sref">nuc900fb_removs./a>,>L757" class="line" namon>L757">3757./a>        href="+code=visususpend" class="sref">suspend./a>        =3.a href="+code=nuc900fb_suspend" class="sref">nuc900fb_suspend./a>,>L758" class="line" namon>L758">3758./a>        href="+code=visuresume" class="sref">resume./a>         =3.a href="+code=nuc900fb_resume" class="sref">nuc900fb_resume./a>,>L759" class="line" namon>L759">3759./a>        href="+code=visudriver" class="sref">driver./a>         =3{>L760" class="line" namon>L760">3760./a>                href="+code=visunamo" class="sref">name./a>   = .spa  class="string">"nuc900-lcd"L761" class="line" namon>L761">3761./a>                href="+code=visuowner" class="sref">owner./a>  =3.a href="+code=THIS_MODULE" class="sref">THIS_MODULE./a>,>L762" class="line" namon>L762">3762./a>        },>L763" class="line" namon>L763">3763./a>};>L764" class="line" namon>L764">3764./a>>L765" class="line" namon>L765">3765./a>.a href="+code=module_platform_driver" class="sref">module_platform_driver./a>(.a href="+code=nuc900fb_driver" class="sref">nuc900fb_driver./a>);>L766" class="line" namon>L766">3766./a>>L767" class="line" namon>L767">3767./a>.a href="+code=MODULE_DESCRIPTION" class="sref">MODULE_DESCRIPTION./a>(.spa  class="string">"Framobuffer driver for the NUC900"L768" class="line" namon>L768">3768./a>.a href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSE./a>(.spa  class="string">"GPL"L769" class="line" namon>L769">3769./a>./pre>./div>


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