linux/drivers/pinctrl/pinctrl-u300.c
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   1/*
   2 * Driver for the U300 pin controller
   3 *
   4 * Based on the original U300 padmux functions
   5 * Copyright (C) 2009-2011 ST-Ericsson AB
   6 * Author: Martin Persson <martin.persson@stericsson.com>
   7 * Author: Linus Walleij <linus.walleij@linaro.org>
   8 *
   9 * The DB3350 design and control registers are oriented around pads rather than
  10 * pins, so we enumerate the pads we can mux rather than actual pins. The pads
  11 * are connected to different pins in different packaging types, so it would
  12 * be confusing.
  13 */
  14#include <linux/init.h>
  15#include <linux/module.h>
  16#include <linux/platform_device.h>
  17#include <linux/io.h>
  18#include <linux/slab.h>
  19#include <linux/err.h>
  20#include <linux/pinctrl/pinctrl.h>
  21#include <linux/pinctrl/pinmux.h>
  22#include <linux/pinctrl/pinconf.h>
  23#include <linux/pinctrl/pinconf-generic.h>
  24#include "pinctrl-coh901.h"
  25
  26/*
  27 * Register definitions for the U300 Padmux control registers in the
  28 * system controller
  29 */
  30
  31/* PAD MUX Control register 1 (LOW) 16bit (R/W) */
  32#define U300_SYSCON_PMC1LR                                      0x007C
  33#define U300_SYSCON_PMC1LR_MASK                                 0xFFFF
  34#define U300_SYSCON_PMC1LR_CDI_MASK                             0xC000
  35#define U300_SYSCON_PMC1LR_CDI_CDI                              0x0000
  36#define U300_SYSCON_PMC1LR_CDI_EMIF                             0x4000
  37/* For BS335 */
  38#define U300_SYSCON_PMC1LR_CDI_CDI2                             0x8000
  39#define U300_SYSCON_PMC1LR_CDI_WCDMA_APP_GPIO                   0xC000
  40/* For BS365 */
  41#define U300_SYSCON_PMC1LR_CDI_GPIO                             0x8000
  42#define U300_SYSCON_PMC1LR_CDI_WCDMA                            0xC000
  43/* Common defs */
  44#define U300_SYSCON_PMC1LR_PDI_MASK                             0x3000
  45#define U300_SYSCON_PMC1LR_PDI_PDI                              0x0000
  46#define U300_SYSCON_PMC1LR_PDI_EGG                              0x1000
  47#define U300_SYSCON_PMC1LR_PDI_WCDMA                            0x3000
  48#define U300_SYSCON_PMC1LR_MMCSD_MASK                           0x0C00
  49#define U300_SYSCON_PMC1LR_MMCSD_MMCSD                          0x0000
  50#define U300_SYSCON_PMC1LR_MMCSD_MSPRO                          0x0400
  51#define U300_SYSCON_PMC1LR_MMCSD_DSP                            0x0800
  52#define U300_SYSCON_PMC1LR_MMCSD_WCDMA                          0x0C00
  53#define U300_SYSCON_PMC1LR_ETM_MASK                             0x0300
  54#define U300_SYSCON_PMC1LR_ETM_ACC                              0x0000
  55#define U300_SYSCON_PMC1LR_ETM_APP                              0x0100
  56#define U300_SYSCON_PMC1LR_EMIF_1_CS2_MASK                      0x00C0
  57#define U300_SYSCON_PMC1LR_EMIF_1_CS2_STATIC                    0x0000
  58#define U300_SYSCON_PMC1LR_EMIF_1_CS2_NFIF                      0x0040
  59#define U300_SYSCON_PMC1LR_EMIF_1_CS2_SDRAM                     0x0080
  60#define U300_SYSCON_PMC1LR_EMIF_1_CS2_STATIC_2GB                0x00C0
  61#define U300_SYSCON_PMC1LR_EMIF_1_CS1_MASK                      0x0030
  62#define U300_SYSCON_PMC1LR_EMIF_1_CS1_STATIC                    0x0000
  63#define U300_SYSCON_PMC1LR_EMIF_1_CS1_NFIF                      0x0010
  64#define U300_SYSCON_PMC1LR_EMIF_1_CS1_SDRAM                     0x0020
  65#define U300_SYSCON_PMC1LR_EMIF_1_CS1_SEMI                      0x0030
  66#define U300_SYSCON_PMC1LR_EMIF_1_CS0_MASK                      0x000C
  67#define U300_SYSCON_PMC1LR_EMIF_1_CS0_STATIC                    0x0000
  68#define U300_SYSCON_PMC1LR_EMIF_1_CS0_NFIF                      0x0004
  69#define U300_SYSCON_PMC1LR_EMIF_1_CS0_SDRAM                     0x0008
  70#define U300_SYSCON_PMC1LR_EMIF_1_CS0_SEMI                      0x000C
  71#define U300_SYSCON_PMC1LR_EMIF_1_MASK                          0x0003
  72#define U300_SYSCON_PMC1LR_EMIF_1_STATIC                        0x0000
  73#define U300_SYSCON_PMC1LR_EMIF_1_SDRAM0                        0x0001
  74#define U300_SYSCON_PMC1LR_EMIF_1_SDRAM1                        0x0002
  75#define U300_SYSCON_PMC1LR_EMIF_1                               0x0003
  76/* PAD MUX Control register 2 (HIGH) 16bit (R/W) */
  77#define U300_SYSCON_PMC1HR                                      0x007E
  78#define U300_SYSCON_PMC1HR_MASK                                 0xFFFF
  79#define U300_SYSCON_PMC1HR_MISC_2_MASK                          0xC000
  80#define U300_SYSCON_PMC1HR_MISC_2_APP_GPIO                      0x0000
  81#define U300_SYSCON_PMC1HR_MISC_2_MSPRO                         0x4000
  82#define U300_SYSCON_PMC1HR_MISC_2_DSP                           0x8000
  83#define U300_SYSCON_PMC1HR_MISC_2_AAIF                          0xC000
  84#define U300_SYSCON_PMC1HR_APP_GPIO_2_MASK                      0x3000
  85#define U300_SYSCON_PMC1HR_APP_GPIO_2_APP_GPIO                  0x0000
  86#define U300_SYSCON_PMC1HR_APP_GPIO_2_NFIF                      0x1000
  87#define U300_SYSCON_PMC1HR_APP_GPIO_2_DSP                       0x2000
  88#define U300_SYSCON_PMC1HR_APP_GPIO_2_AAIF                      0x3000
  89#define U300_SYSCON_PMC1HR_APP_GPIO_1_MASK                      0x0C00
  90#define U300_SYSCON_PMC1HR_APP_GPIO_1_APP_GPIO                  0x0000
  91#define U300_SYSCON_PMC1HR_APP_GPIO_1_MMC                       0x0400
  92#define U300_SYSCON_PMC1HR_APP_GPIO_1_DSP                       0x0800
  93#define U300_SYSCON_PMC1HR_APP_GPIO_1_AAIF                      0x0C00
  94#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK                    0x0300
  95#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_APP_GPIO                0x0000
  96#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI                     0x0100
  97#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_AAIF                    0x0300
  98#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK                    0x00C0
  99#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_APP_GPIO                0x0000
 100#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI                     0x0040
 101#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_AAIF                    0x00C0
 102#define U300_SYSCON_PMC1HR_APP_SPI_2_MASK                       0x0030
 103#define U300_SYSCON_PMC1HR_APP_SPI_2_APP_GPIO                   0x0000
 104#define U300_SYSCON_PMC1HR_APP_SPI_2_SPI                        0x0010
 105#define U300_SYSCON_PMC1HR_APP_SPI_2_DSP                        0x0020
 106#define U300_SYSCON_PMC1HR_APP_SPI_2_AAIF                       0x0030
 107#define U300_SYSCON_PMC1HR_APP_UART0_2_MASK                     0x000C
 108#define U300_SYSCON_PMC1HR_APP_UART0_2_APP_GPIO                 0x0000
 109#define U300_SYSCON_PMC1HR_APP_UART0_2_UART0                    0x0004
 110#define U300_SYSCON_PMC1HR_APP_UART0_2_NFIF_CS                  0x0008
 111#define U300_SYSCON_PMC1HR_APP_UART0_2_AAIF                     0x000C
 112#define U300_SYSCON_PMC1HR_APP_UART0_1_MASK                     0x0003
 113#define U300_SYSCON_PMC1HR_APP_UART0_1_APP_GPIO                 0x0000
 114#define U300_SYSCON_PMC1HR_APP_UART0_1_UART0                    0x0001
 115#define U300_SYSCON_PMC1HR_APP_UART0_1_AAIF                     0x0003
 116/* Padmux 2 control */
 117#define U300_SYSCON_PMC2R                                       0x100
 118#define U300_SYSCON_PMC2R_APP_MISC_0_MASK                       0x00C0
 119#define U300_SYSCON_PMC2R_APP_MISC_0_APP_GPIO                   0x0000
 120#define U300_SYSCON_PMC2R_APP_MISC_0_EMIF_SDRAM                 0x0040
 121#define U300_SYSCON_PMC2R_APP_MISC_0_MMC                        0x0080
 122#define U300_SYSCON_PMC2R_APP_MISC_0_CDI2                       0x00C0
 123#define U300_SYSCON_PMC2R_APP_MISC_1_MASK                       0x0300
 124#define U300_SYSCON_PMC2R_APP_MISC_1_APP_GPIO                   0x0000
 125#define U300_SYSCON_PMC2R_APP_MISC_1_EMIF_SDRAM                 0x0100
 126#define U300_SYSCON_PMC2R_APP_MISC_1_MMC                        0x0200
 127#define U300_SYSCON_PMC2R_APP_MISC_1_CDI2                       0x0300
 128#define U300_SYSCON_PMC2R_APP_MISC_2_MASK                       0x0C00
 129#define U300_SYSCON_PMC2R_APP_MISC_2_APP_GPIO                   0x0000
 130#define U300_SYSCON_PMC2R_APP_MISC_2_EMIF_SDRAM                 0x0400
 131#define U300_SYSCON_PMC2R_APP_MISC_2_MMC                        0x0800
 132#define U300_SYSCON_PMC2R_APP_MISC_2_CDI2                       0x0C00
 133#define U300_SYSCON_PMC2R_APP_MISC_3_MASK                       0x3000
 134#define U300_SYSCON_PMC2R_APP_MISC_3_APP_GPIO                   0x0000
 135#define U300_SYSCON_PMC2R_APP_MISC_3_EMIF_SDRAM                 0x1000
 136#define U300_SYSCON_PMC2R_APP_MISC_3_MMC                        0x2000
 137#define U300_SYSCON_PMC2R_APP_MISC_3_CDI2                       0x3000
 138#define U300_SYSCON_PMC2R_APP_MISC_4_MASK                       0xC000
 139#define U300_SYSCON_PMC2R_APP_MISC_4_APP_GPIO                   0x0000
 140#define U300_SYSCON_PMC2R_APP_MISC_4_EMIF_SDRAM                 0x4000
 141#define U300_SYSCON_PMC2R_APP_MISC_4_MMC                        0x8000
 142#define U300_SYSCON_PMC2R_APP_MISC_4_ACC_GPIO                   0xC000
 143/* TODO: More SYSCON registers missing */
 144#define U300_SYSCON_PMC3R                                       0x10C
 145#define U300_SYSCON_PMC3R_APP_MISC_11_MASK                      0xC000
 146#define U300_SYSCON_PMC3R_APP_MISC_11_SPI                       0x4000
 147#define U300_SYSCON_PMC3R_APP_MISC_10_MASK                      0x3000
 148#define U300_SYSCON_PMC3R_APP_MISC_10_SPI                       0x1000
 149/* TODO: Missing other configs */
 150#define U300_SYSCON_PMC4R                                       0x168
 151#define U300_SYSCON_PMC4R_APP_MISC_12_MASK                      0x0003
 152#define U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO                  0x0000
 153#define U300_SYSCON_PMC4R_APP_MISC_13_MASK                      0x000C
 154#define U300_SYSCON_PMC4R_APP_MISC_13_CDI                       0x0000
 155#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA                      0x0004
 156#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA2                     0x0008
 157#define U300_SYSCON_PMC4R_APP_MISC_13_APP_GPIO                  0x000C
 158#define U300_SYSCON_PMC4R_APP_MISC_14_MASK                      0x0030
 159#define U300_SYSCON_PMC4R_APP_MISC_14_CDI                       0x0000
 160#define U300_SYSCON_PMC4R_APP_MISC_14_SMIA                      0x0010
 161#define U300_SYSCON_PMC4R_APP_MISC_14_CDI2                      0x0020
 162#define U300_SYSCON_PMC4R_APP_MISC_14_APP_GPIO                  0x0030
 163#define U300_SYSCON_PMC4R_APP_MISC_16_MASK                      0x0300
 164#define U300_SYSCON_PMC4R_APP_MISC_16_APP_GPIO_13               0x0000
 165#define U300_SYSCON_PMC4R_APP_MISC_16_APP_UART1_CTS             0x0100
 166#define U300_SYSCON_PMC4R_APP_MISC_16_EMIF_1_STATIC_CS5_N       0x0200
 167
 168#define DRIVER_NAME "pinctrl-u300"
 169
 170/*
 171 * The DB3350 has 467 pads, I have enumerated the pads clockwise around the
 172 * edges of the silicon, finger by finger. LTCORNER upper left is pad 0.
 173 * Data taken from the PadRing chart, arranged like this:
 174 *
 175 *   0 ..... 104
 176 * 466        105
 177 *   .        .
 178 *   .        .
 179 * 358        224
 180 *  357 .... 225
 181 */
 182#define U300_NUM_PADS 467
 183
 184/* Pad names for the pinmux subsystem */
 185static const struct pinctrl_pin_desc u300_pads[] = {
 186        /* Pads along the top edge of the chip */
 187        PINCTRL_PIN(0, "P PAD VDD 28"),
 188        PINCTRL_PIN(1, "P PAD GND 28"),
 189        PINCTRL_PIN(2, "PO SIM RST N"),
 190        PINCTRL_PIN(3, "VSSIO 25"),
 191        PINCTRL_PIN(4, "VSSA ADDA ESDSUB"),
 192        PINCTRL_PIN(5, "PWR VSSCOMMON"),
 193        PINCTRL_PIN(6, "PI ADC I1 POS"),
 194        PINCTRL_PIN(7, "PI ADC I1 NEG"),
 195        PINCTRL_PIN(8, "PWR VSSAD0"),
 196        PINCTRL_PIN(9, "PWR VCCAD0"),
 197        PINCTRL_PIN(10, "PI ADC Q1 NEG"),
 198        PINCTRL_PIN(11, "PI ADC Q1 POS"),
 199        PINCTRL_PIN(12, "PWR VDDAD"),
 200        PINCTRL_PIN(13, "PWR GNDAD"),
 201        PINCTRL_PIN(14, "PI ADC I2 POS"),
 202        PINCTRL_PIN(15, "PI ADC I2 NEG"),
 203        PINCTRL_PIN(16, "PWR VSSAD1"),
 204        PINCTRL_PIN(17, "PWR VCCAD1"),
 205        PINCTRL_PIN(18, "PI ADC Q2 NEG"),
 206        PINCTRL_PIN(19, "PI ADC Q2 POS"),
 207        PINCTRL_PIN(20, "VSSA ADDA ESDSUB"),
 208        PINCTRL_PIN(21, "PWR VCCGPAD"),
 209        PINCTRL_PIN(22, "PI TX POW"),
 210        PINCTRL_PIN(23, "PWR VSSGPAD"),
 211        PINCTRL_PIN(24, "PO DAC I POS"),
 212        PINCTRL_PIN(25, "PO DAC I NEG"),
 213        PINCTRL_PIN(26, "PO DAC Q POS"),
 214        PINCTRL_PIN(27, "PO DAC Q NEG"),
 215        PINCTRL_PIN(28, "PWR VSSDA"),
 216        PINCTRL_PIN(29, "PWR VCCDA"),
 217        PINCTRL_PIN(30, "VSSA ADDA ESDSUB"),
 218        PINCTRL_PIN(31, "P PAD VDDIO 11"),
 219        PINCTRL_PIN(32, "PI PLL 26 FILTVDD"),
 220        PINCTRL_PIN(33, "PI PLL 26 VCONT"),
 221        PINCTRL_PIN(34, "PWR AGNDPLL2V5 32 13"),
 222        PINCTRL_PIN(35, "PWR AVDDPLL2V5 32 13"),
 223        PINCTRL_PIN(36, "VDDA PLL ESD"),
 224        PINCTRL_PIN(37, "VSSA PLL ESD"),
 225        PINCTRL_PIN(38, "VSS PLL"),
 226        PINCTRL_PIN(39, "VDDC PLL"),
 227        PINCTRL_PIN(40, "PWR AGNDPLL2V5 26 60"),
 228        PINCTRL_PIN(41, "PWR AVDDPLL2V5 26 60"),
 229        PINCTRL_PIN(42, "PWR AVDDPLL2V5 26 208"),
 230        PINCTRL_PIN(43, "PWR AGNDPLL2V5 26 208"),
 231        PINCTRL_PIN(44, "PWR AVDDPLL2V5 13 208"),
 232        PINCTRL_PIN(45, "PWR AGNDPLL2V5 13 208"),
 233        PINCTRL_PIN(46, "P PAD VSSIO 11"),
 234        PINCTRL_PIN(47, "P PAD VSSIO 12"),
 235        PINCTRL_PIN(48, "PI POW RST N"),
 236        PINCTRL_PIN(49, "VDDC IO"),
 237        PINCTRL_PIN(50, "P PAD VDDIO 16"),
 238        PINCTRL_PIN(51, "PO RF WCDMA EN 4"),
 239        PINCTRL_PIN(52, "PO RF WCDMA EN 3"),
 240        PINCTRL_PIN(53, "PO RF WCDMA EN 2"),
 241        PINCTRL_PIN(54, "PO RF WCDMA EN 1"),
 242        PINCTRL_PIN(55, "PO RF WCDMA EN 0"),
 243        PINCTRL_PIN(56, "PO GSM PA ENABLE"),
 244        PINCTRL_PIN(57, "PO RF DATA STRB"),
 245        PINCTRL_PIN(58, "PO RF DATA2"),
 246        PINCTRL_PIN(59, "PIO RF DATA1"),
 247        PINCTRL_PIN(60, "PIO RF DATA0"),
 248        PINCTRL_PIN(61, "P PAD VDD 11"),
 249        PINCTRL_PIN(62, "P PAD GND 11"),
 250        PINCTRL_PIN(63, "P PAD VSSIO 16"),
 251        PINCTRL_PIN(64, "P PAD VDDIO 18"),
 252        PINCTRL_PIN(65, "PO RF CTRL STRB2"),
 253        PINCTRL_PIN(66, "PO RF CTRL STRB1"),
 254        PINCTRL_PIN(67, "PO RF CTRL STRB0"),
 255        PINCTRL_PIN(68, "PIO RF CTRL DATA"),
 256        PINCTRL_PIN(69, "PO RF CTRL CLK"),
 257        PINCTRL_PIN(70, "PO TX ADC STRB"),
 258        PINCTRL_PIN(71, "PO ANT SW 2"),
 259        PINCTRL_PIN(72, "PO ANT SW 3"),
 260        PINCTRL_PIN(73, "PO ANT SW 0"),
 261        PINCTRL_PIN(74, "PO ANT SW 1"),
 262        PINCTRL_PIN(75, "PO M CLKRQ"),
 263        PINCTRL_PIN(76, "PI M CLK"),
 264        PINCTRL_PIN(77, "PI RTC CLK"),
 265        PINCTRL_PIN(78, "P PAD VDD 8"),
 266        PINCTRL_PIN(79, "P PAD GND 8"),
 267        PINCTRL_PIN(80, "P PAD VSSIO 13"),
 268        PINCTRL_PIN(81, "P PAD VDDIO 13"),
 269        PINCTRL_PIN(82, "PO SYS 1 CLK"),
 270        PINCTRL_PIN(83, "PO SYS 2 CLK"),
 271        PINCTRL_PIN(84, "PO SYS 0 CLK"),
 272        PINCTRL_PIN(85, "PI SYS 0 CLKRQ"),
 273        PINCTRL_PIN(86, "PO PWR MNGT CTRL 1"),
 274        PINCTRL_PIN(87, "PO PWR MNGT CTRL 0"),
 275        PINCTRL_PIN(88, "PO RESOUT2 RST N"),
 276        PINCTRL_PIN(89, "PO RESOUT1 RST N"),
 277        PINCTRL_PIN(90, "PO RESOUT0 RST N"),
 278        PINCTRL_PIN(91, "PI SERVICE N"),
 279        PINCTRL_PIN(92, "P PAD VDD 29"),
 280        PINCTRL_PIN(93, "P PAD GND 29"),
 281        PINCTRL_PIN(94, "P PAD VSSIO 8"),
 282        PINCTRL_PIN(95, "P PAD VDDIO 8"),
 283        PINCTRL_PIN(96, "PI EXT IRQ1 N"),
 284        PINCTRL_PIN(97, "PI EXT IRQ0 N"),
 285        PINCTRL_PIN(98, "PIO DC ON"),
 286        PINCTRL_PIN(99, "PIO ACC APP I2C DATA"),
 287        PINCTRL_PIN(100, "PIO ACC APP I2C CLK"),
 288        PINCTRL_PIN(101, "P PAD VDD 12"),
 289        PINCTRL_PIN(102, "P PAD GND 12"),
 290        PINCTRL_PIN(103, "P PAD VSSIO 14"),
 291        PINCTRL_PIN(104, "P PAD VDDIO 14"),
 292        /* Pads along the right edge of the chip */
 293        PINCTRL_PIN(105, "PIO APP I2C1 DATA"),
 294        PINCTRL_PIN(106, "PIO APP I2C1 CLK"),
 295        PINCTRL_PIN(107, "PO KEY OUT0"),
 296        PINCTRL_PIN(108, "PO KEY OUT1"),
 297        PINCTRL_PIN(109, "PO KEY OUT2"),
 298        PINCTRL_PIN(110, "PO KEY OUT3"),
 299        PINCTRL_PIN(111, "PO KEY OUT4"),
 300        PINCTRL_PIN(112, "PI KEY IN0"),
 301        PINCTRL_PIN(113, "PI KEY IN1"),
 302        PINCTRL_PIN(114, "PI KEY IN2"),
 303        PINCTRL_PIN(115, "P PAD VDDIO 15"),
 304        PINCTRL_PIN(116, "P PAD VSSIO 15"),
 305        PINCTRL_PIN(117, "P PAD GND 13"),
 306        PINCTRL_PIN(118, "P PAD VDD 13"),
 307        PINCTRL_PIN(119, "PI KEY IN3"),
 308        PINCTRL_PIN(120, "PI KEY IN4"),
 309        PINCTRL_PIN(121, "PI KEY IN5"),
 310        PINCTRL_PIN(122, "PIO APP PCM I2S1 DATA B"),
 311        PINCTRL_PIN(123, "PIO APP PCM I2S1 DATA A"),
 312        PINCTRL_PIN(124, "PIO APP PCM I2S1 WS"),
 313        PINCTRL_PIN(125, "PIO APP PCM I2S1 CLK"),
 314        PINCTRL_PIN(126, "PIO APP PCM I2S0 DATA B"),
 315        PINCTRL_PIN(127, "PIO APP PCM I2S0 DATA A"),
 316        PINCTRL_PIN(128, "PIO APP PCM I2S0 WS"),
 317        PINCTRL_PIN(129, "PIO APP PCM I2S0 CLK"),
 318        PINCTRL_PIN(130, "P PAD VDD 17"),
 319        PINCTRL_PIN(131, "P PAD GND 17"),
 320        PINCTRL_PIN(132, "P PAD VSSIO 19"),
 321        PINCTRL_PIN(133, "P PAD VDDIO 19"),
 322        PINCTRL_PIN(134, "UART0 RTS"),
 323        PINCTRL_PIN(135, "UART0 CTS"),
 324        PINCTRL_PIN(136, "UART0 TX"),
 325        PINCTRL_PIN(137, "UART0 RX"),
 326        PINCTRL_PIN(138, "PIO ACC SPI DO"),
 327        PINCTRL_PIN(139, "PIO ACC SPI DI"),
 328        PINCTRL_PIN(140, "PIO ACC SPI CS0 N"),
 329        PINCTRL_PIN(141, "PIO ACC SPI CS1 N"),
 330        PINCTRL_PIN(142, "PIO ACC SPI CS2 N"),
 331        PINCTRL_PIN(143, "PIO ACC SPI CLK"),
 332        PINCTRL_PIN(144, "PO PDI EXT RST N"),
 333        PINCTRL_PIN(145, "P PAD VDDIO 22"),
 334        PINCTRL_PIN(146, "P PAD VSSIO 22"),
 335        PINCTRL_PIN(147, "P PAD GND 18"),
 336        PINCTRL_PIN(148, "P PAD VDD 18"),
 337        PINCTRL_PIN(149, "PIO PDI C0"),
 338        PINCTRL_PIN(150, "PIO PDI C1"),
 339        PINCTRL_PIN(151, "PIO PDI C2"),
 340        PINCTRL_PIN(152, "PIO PDI C3"),
 341        PINCTRL_PIN(153, "PIO PDI C4"),
 342        PINCTRL_PIN(154, "PIO PDI C5"),
 343        PINCTRL_PIN(155, "PIO PDI D0"),
 344        PINCTRL_PIN(156, "PIO PDI D1"),
 345        PINCTRL_PIN(157, "PIO PDI D2"),
 346        PINCTRL_PIN(158, "PIO PDI D3"),
 347        PINCTRL_PIN(159, "P PAD VDDIO 21"),
 348        PINCTRL_PIN(160, "P PAD VSSIO 21"),
 349        PINCTRL_PIN(161, "PIO PDI D4"),
 350        PINCTRL_PIN(162, "PIO PDI D5"),
 351        PINCTRL_PIN(163, "PIO PDI D6"),
 352        PINCTRL_PIN(164, "PIO PDI D7"),
 353        PINCTRL_PIN(165, "PIO MS INS"),
 354        PINCTRL_PIN(166, "MMC DATA DIR LS"),
 355        PINCTRL_PIN(167, "MMC DATA 3"),
 356        PINCTRL_PIN(168, "MMC DATA 2"),
 357        PINCTRL_PIN(169, "MMC DATA 1"),
 358        PINCTRL_PIN(170, "MMC DATA 0"),
 359        PINCTRL_PIN(171, "MMC CMD DIR LS"),
 360        PINCTRL_PIN(172, "P PAD VDD 27"),
 361        PINCTRL_PIN(173, "P PAD GND 27"),
 362        PINCTRL_PIN(174, "P PAD VSSIO 20"),
 363        PINCTRL_PIN(175, "P PAD VDDIO 20"),
 364        PINCTRL_PIN(176, "MMC CMD"),
 365        PINCTRL_PIN(177, "MMC CLK"),
 366        PINCTRL_PIN(178, "PIO APP GPIO 14"),
 367        PINCTRL_PIN(179, "PIO APP GPIO 13"),
 368        PINCTRL_PIN(180, "PIO APP GPIO 11"),
 369        PINCTRL_PIN(181, "PIO APP GPIO 25"),
 370        PINCTRL_PIN(182, "PIO APP GPIO 24"),
 371        PINCTRL_PIN(183, "PIO APP GPIO 23"),
 372        PINCTRL_PIN(184, "PIO APP GPIO 22"),
 373        PINCTRL_PIN(185, "PIO APP GPIO 21"),
 374        PINCTRL_PIN(186, "PIO APP GPIO 20"),
 375        PINCTRL_PIN(187, "P PAD VDD 19"),
 376        PINCTRL_PIN(188, "P PAD GND 19"),
 377        PINCTRL_PIN(189, "P PAD VSSIO 23"),
 378        PINCTRL_PIN(190, "P PAD VDDIO 23"),
 379        PINCTRL_PIN(191, "PIO APP GPIO 19"),
 380        PINCTRL_PIN(192, "PIO APP GPIO 18"),
 381        PINCTRL_PIN(193, "PIO APP GPIO 17"),
 382        PINCTRL_PIN(194, "PIO APP GPIO 16"),
 383        PINCTRL_PIN(195, "PI CI D1"),
 384        PINCTRL_PIN(196, "PI CI D0"),
 385        PINCTRL_PIN(197, "PI CI HSYNC"),
 386        PINCTRL_PIN(198, "PI CI VSYNC"),
 387        PINCTRL_PIN(199, "PI CI EXT CLK"),
 388        PINCTRL_PIN(200, "PO CI EXT RST N"),
 389        PINCTRL_PIN(201, "P PAD VSSIO 43"),
 390        PINCTRL_PIN(202, "P PAD VDDIO 43"),
 391        PINCTRL_PIN(203, "PI CI D6"),
 392        PINCTRL_PIN(204, "PI CI D7"),
 393        PINCTRL_PIN(205, "PI CI D2"),
 394        PINCTRL_PIN(206, "PI CI D3"),
 395        PINCTRL_PIN(207, "PI CI D4"),
 396        PINCTRL_PIN(208, "PI CI D5"),
 397        PINCTRL_PIN(209, "PI CI D8"),
 398        PINCTRL_PIN(210, "PI CI D9"),
 399        PINCTRL_PIN(211, "P PAD VDD 20"),
 400        PINCTRL_PIN(212, "P PAD GND 20"),
 401        PINCTRL_PIN(213, "P PAD VSSIO 24"),
 402        PINCTRL_PIN(214, "P PAD VDDIO 24"),
 403        PINCTRL_PIN(215, "P PAD VDDIO 26"),
 404        PINCTRL_PIN(216, "PO EMIF 1 A26"),
 405        PINCTRL_PIN(217, "PO EMIF 1 A25"),
 406        PINCTRL_PIN(218, "P PAD VSSIO 26"),
 407        PINCTRL_PIN(219, "PO EMIF 1 A24"),
 408        PINCTRL_PIN(220, "PO EMIF 1 A23"),
 409        /* Pads along the bottom edge of the chip */
 410        PINCTRL_PIN(221, "PO EMIF 1 A22"),
 411        PINCTRL_PIN(222, "PO EMIF 1 A21"),
 412        PINCTRL_PIN(223, "P PAD VDD 21"),
 413        PINCTRL_PIN(224, "P PAD GND 21"),
 414        PINCTRL_PIN(225, "P PAD VSSIO 27"),
 415        PINCTRL_PIN(226, "P PAD VDDIO 27"),
 416        PINCTRL_PIN(227, "PO EMIF 1 A20"),
 417        PINCTRL_PIN(228, "PO EMIF 1 A19"),
 418        PINCTRL_PIN(229, "PO EMIF 1 A18"),
 419        PINCTRL_PIN(230, "PO EMIF 1 A17"),
 420        PINCTRL_PIN(231, "P PAD VDDIO 28"),
 421        PINCTRL_PIN(232, "P PAD VSSIO 28"),
 422        PINCTRL_PIN(233, "PO EMIF 1 A16"),
 423        PINCTRL_PIN(234, "PIO EMIF 1 D15"),
 424        PINCTRL_PIN(235, "PO EMIF 1 A15"),
 425        PINCTRL_PIN(236, "PIO EMIF 1 D14"),
 426        PINCTRL_PIN(237, "P PAD VDD 22"),
 427        PINCTRL_PIN(238, "P PAD GND 22"),
 428        PINCTRL_PIN(239, "P PAD VSSIO 29"),
 429        PINCTRL_PIN(240, "P PAD VDDIO 29"),
 430        PINCTRL_PIN(241, "PO EMIF 1 A14"),
 431        PINCTRL_PIN(242, "PIO EMIF 1 D13"),
 432        PINCTRL_PIN(243, "PO EMIF 1 A13"),
 433        PINCTRL_PIN(244, "PIO EMIF 1 D12"),
 434        PINCTRL_PIN(245, "P PAD VSSIO 30"),
 435        PINCTRL_PIN(246, "P PAD VDDIO 30"),
 436        PINCTRL_PIN(247, "PO EMIF 1 A12"),
 437        PINCTRL_PIN(248, "PIO EMIF 1 D11"),
 438        PINCTRL_PIN(249, "PO EMIF 1 A11"),
 439        PINCTRL_PIN(250, "PIO EMIF 1 D10"),
 440        PINCTRL_PIN(251, "P PAD VSSIO 31"),
 441        PINCTRL_PIN(252, "P PAD VDDIO 31"),
 442        PINCTRL_PIN(253, "PO EMIF 1 A10"),
 443        PINCTRL_PIN(254, "PIO EMIF 1 D09"),
 444        PINCTRL_PIN(255, "PO EMIF 1 A09"),
 445        PINCTRL_PIN(256, "P PAD VDDIO 32"),
 446        PINCTRL_PIN(257, "P PAD VSSIO 32"),
 447        PINCTRL_PIN(258, "P PAD GND 24"),
 448        PINCTRL_PIN(259, "P PAD VDD 24"),
 449        PINCTRL_PIN(260, "PIO EMIF 1 D08"),
 450        PINCTRL_PIN(261, "PO EMIF 1 A08"),
 451        PINCTRL_PIN(262, "PIO EMIF 1 D07"),
 452        PINCTRL_PIN(263, "PO EMIF 1 A07"),
 453        PINCTRL_PIN(264, "P PAD VDDIO 33"),
 454        PINCTRL_PIN(265, "P PAD VSSIO 33"),
 455        PINCTRL_PIN(266, "PIO EMIF 1 D06"),
 456        PINCTRL_PIN(267, "PO EMIF 1 A06"),
 457        PINCTRL_PIN(268, "PIO EMIF 1 D05"),
 458        PINCTRL_PIN(269, "PO EMIF 1 A05"),
 459        PINCTRL_PIN(270, "P PAD VDDIO 34"),
 460        PINCTRL_PIN(271, "P PAD VSSIO 34"),
 461        PINCTRL_PIN(272, "PIO EMIF 1 D04"),
 462        PINCTRL_PIN(273, "PO EMIF 1 A04"),
 463        PINCTRL_PIN(274, "PIO EMIF 1 D03"),
 464        PINCTRL_PIN(275, "PO EMIF 1 A03"),
 465        PINCTRL_PIN(276, "P PAD VDDIO 35"),
 466        PINCTRL_PIN(277, "P PAD VSSIO 35"),
 467        PINCTRL_PIN(278, "P PAD GND 23"),
 468        PINCTRL_PIN(279, "P PAD VDD 23"),
 469        PINCTRL_PIN(280, "PIO EMIF 1 D02"),
 470        PINCTRL_PIN(281, "PO EMIF 1 A02"),
 471        PINCTRL_PIN(282, "PIO EMIF 1 D01"),
 472        PINCTRL_PIN(283, "PO EMIF 1 A01"),
 473        PINCTRL_PIN(284, "P PAD VDDIO 36"),
 474        PINCTRL_PIN(285, "P PAD VSSIO 36"),
 475        PINCTRL_PIN(286, "PIO EMIF 1 D00"),
 476        PINCTRL_PIN(287, "PO EMIF 1 BE1 N"),
 477        PINCTRL_PIN(288, "PO EMIF 1 BE0 N"),
 478        PINCTRL_PIN(289, "PO EMIF 1 ADV N"),
 479        PINCTRL_PIN(290, "P PAD VDDIO 37"),
 480        PINCTRL_PIN(291, "P PAD VSSIO 37"),
 481        PINCTRL_PIN(292, "PO EMIF 1 SD CKE0"),
 482        PINCTRL_PIN(293, "PO EMIF 1 OE N"),
 483        PINCTRL_PIN(294, "PO EMIF 1 WE N"),
 484        PINCTRL_PIN(295, "P PAD VDDIO 38"),
 485        PINCTRL_PIN(296, "P PAD VSSIO 38"),
 486        PINCTRL_PIN(297, "PO EMIF 1 CLK"),
 487        PINCTRL_PIN(298, "PIO EMIF 1 SD CLK"),
 488        PINCTRL_PIN(299, "P PAD VSSIO 45 (not bonded)"),
 489        PINCTRL_PIN(300, "P PAD VDDIO 42"),
 490        PINCTRL_PIN(301, "P PAD VSSIO 42"),
 491        PINCTRL_PIN(302, "P PAD GND 31"),
 492        PINCTRL_PIN(303, "P PAD VDD 31"),
 493        PINCTRL_PIN(304, "PI EMIF 1 RET CLK"),
 494        PINCTRL_PIN(305, "PI EMIF 1 WAIT N"),
 495        PINCTRL_PIN(306, "PI EMIF 1 NFIF READY"),
 496        PINCTRL_PIN(307, "PO EMIF 1 SD CKE1"),
 497        PINCTRL_PIN(308, "PO EMIF 1 CS3 N"),
 498        PINCTRL_PIN(309, "P PAD VDD 25"),
 499        PINCTRL_PIN(310, "P PAD GND 25"),
 500        PINCTRL_PIN(311, "P PAD VSSIO 39"),
 501        PINCTRL_PIN(312, "P PAD VDDIO 39"),
 502        PINCTRL_PIN(313, "PO EMIF 1 CS2 N"),
 503        PINCTRL_PIN(314, "PO EMIF 1 CS1 N"),
 504        PINCTRL_PIN(315, "PO EMIF 1 CS0 N"),
 505        PINCTRL_PIN(316, "PO ETM TRACE PKT0"),
 506        PINCTRL_PIN(317, "PO ETM TRACE PKT1"),
 507        PINCTRL_PIN(318, "PO ETM TRACE PKT2"),
 508        PINCTRL_PIN(319, "P PAD VDD 30"),
 509        PINCTRL_PIN(320, "P PAD GND 30"),
 510        PINCTRL_PIN(321, "P PAD VSSIO 44"),
 511        PINCTRL_PIN(322, "P PAD VDDIO 44"),
 512        PINCTRL_PIN(323, "PO ETM TRACE PKT3"),
 513        PINCTRL_PIN(324, "PO ETM TRACE PKT4"),
 514        PINCTRL_PIN(325, "PO ETM TRACE PKT5"),
 515        PINCTRL_PIN(326, "PO ETM TRACE PKT6"),
 516        PINCTRL_PIN(327, "PO ETM TRACE PKT7"),
 517        PINCTRL_PIN(328, "PO ETM PIPE STAT0"),
 518        PINCTRL_PIN(329, "P PAD VDD 26"),
 519        PINCTRL_PIN(330, "P PAD GND 26"),
 520        PINCTRL_PIN(331, "P PAD VSSIO 40"),
 521        PINCTRL_PIN(332, "P PAD VDDIO 40"),
 522        PINCTRL_PIN(333, "PO ETM PIPE STAT1"),
 523        PINCTRL_PIN(334, "PO ETM PIPE STAT2"),
 524        PINCTRL_PIN(335, "PO ETM TRACE CLK"),
 525        PINCTRL_PIN(336, "PO ETM TRACE SYNC"),
 526        PINCTRL_PIN(337, "PIO ACC GPIO 33"),
 527        PINCTRL_PIN(338, "PIO ACC GPIO 32"),
 528        PINCTRL_PIN(339, "PIO ACC GPIO 30"),
 529        PINCTRL_PIN(340, "PIO ACC GPIO 29"),
 530        PINCTRL_PIN(341, "P PAD VDDIO 17"),
 531        PINCTRL_PIN(342, "P PAD VSSIO 17"),
 532        PINCTRL_PIN(343, "P PAD GND 15"),
 533        PINCTRL_PIN(344, "P PAD VDD 15"),
 534        PINCTRL_PIN(345, "PIO ACC GPIO 28"),
 535        PINCTRL_PIN(346, "PIO ACC GPIO 27"),
 536        PINCTRL_PIN(347, "PIO ACC GPIO 16"),
 537        PINCTRL_PIN(348, "PI TAP TMS"),
 538        PINCTRL_PIN(349, "PI TAP TDI"),
 539        PINCTRL_PIN(350, "PO TAP TDO"),
 540        PINCTRL_PIN(351, "PI TAP RST N"),
 541        /* Pads along the left edge of the chip */
 542        PINCTRL_PIN(352, "PI EMU MODE 0"),
 543        PINCTRL_PIN(353, "PO TAP RET CLK"),
 544        PINCTRL_PIN(354, "PI TAP CLK"),
 545        PINCTRL_PIN(355, "PO EMIF 0 SD CS N"),
 546        PINCTRL_PIN(356, "PO EMIF 0 SD CAS N"),
 547        PINCTRL_PIN(357, "PO EMIF 0 SD WE N"),
 548        PINCTRL_PIN(358, "P PAD VDDIO 1"),
 549        PINCTRL_PIN(359, "P PAD VSSIO 1"),
 550        PINCTRL_PIN(360, "P PAD GND 1"),
 551        PINCTRL_PIN(361, "P PAD VDD 1"),
 552        PINCTRL_PIN(362, "PO EMIF 0 SD CKE"),
 553        PINCTRL_PIN(363, "PO EMIF 0 SD DQML"),
 554        PINCTRL_PIN(364, "PO EMIF 0 SD DQMU"),
 555        PINCTRL_PIN(365, "PO EMIF 0 SD RAS N"),
 556        PINCTRL_PIN(366, "PIO EMIF 0 D15"),
 557        PINCTRL_PIN(367, "PO EMIF 0 A15"),
 558        PINCTRL_PIN(368, "PIO EMIF 0 D14"),
 559        PINCTRL_PIN(369, "PO EMIF 0 A14"),
 560        PINCTRL_PIN(370, "PIO EMIF 0 D13"),
 561        PINCTRL_PIN(371, "PO EMIF 0 A13"),
 562        PINCTRL_PIN(372, "P PAD VDDIO 2"),
 563        PINCTRL_PIN(373, "P PAD VSSIO 2"),
 564        PINCTRL_PIN(374, "P PAD GND 2"),
 565        PINCTRL_PIN(375, "P PAD VDD 2"),
 566        PINCTRL_PIN(376, "PIO EMIF 0 D12"),
 567        PINCTRL_PIN(377, "PO EMIF 0 A12"),
 568        PINCTRL_PIN(378, "PIO EMIF 0 D11"),
 569        PINCTRL_PIN(379, "PO EMIF 0 A11"),
 570        PINCTRL_PIN(380, "PIO EMIF 0 D10"),
 571        PINCTRL_PIN(381, "PO EMIF 0 A10"),
 572        PINCTRL_PIN(382, "PIO EMIF 0 D09"),
 573        PINCTRL_PIN(383, "PO EMIF 0 A09"),
 574        PINCTRL_PIN(384, "PIO EMIF 0 D08"),
 575        PINCTRL_PIN(385, "PO EMIF 0 A08"),
 576        PINCTRL_PIN(386, "PIO EMIF 0 D07"),
 577        PINCTRL_PIN(387, "PO EMIF 0 A07"),
 578        PINCTRL_PIN(388, "P PAD VDDIO 3"),
 579        PINCTRL_PIN(389, "P PAD VSSIO 3"),
 580        PINCTRL_PIN(390, "P PAD GND 3"),
 581        PINCTRL_PIN(391, "P PAD VDD 3"),
 582        PINCTRL_PIN(392, "PO EFUSE RDOUT1"),
 583        PINCTRL_PIN(393, "PIO EMIF 0 D06"),
 584        PINCTRL_PIN(394, "PO EMIF 0 A06"),
 585        PINCTRL_PIN(395, "PIO EMIF 0 D05"),
 586        PINCTRL_PIN(396, "PO EMIF 0 A05"),
 587        PINCTRL_PIN(397, "PIO EMIF 0 D04"),
 588        PINCTRL_PIN(398, "PO EMIF 0 A04"),
 589        PINCTRL_PIN(399, "A PADS/A VDDCO1v82v5 GND 80U SF LIN VDDCO AF"),
 590        PINCTRL_PIN(400, "PWR VDDCO AF"),
 591        PINCTRL_PIN(401, "PWR EFUSE HV1"),
 592        PINCTRL_PIN(402, "P PAD VSSIO 4"),
 593        PINCTRL_PIN(403, "P PAD VDDIO 4"),
 594        PINCTRL_PIN(404, "P PAD GND 4"),
 595        PINCTRL_PIN(405, "P PAD VDD 4"),
 596        PINCTRL_PIN(406, "PIO EMIF 0 D03"),
 597        PINCTRL_PIN(407, "PO EMIF 0 A03"),
 598        PINCTRL_PIN(408, "PWR EFUSE HV2"),
 599        PINCTRL_PIN(409, "PWR EFUSE HV3"),
 600        PINCTRL_PIN(410, "PIO EMIF 0 D02"),
 601        PINCTRL_PIN(411, "PO EMIF 0 A02"),
 602        PINCTRL_PIN(412, "PIO EMIF 0 D01"),
 603        PINCTRL_PIN(413, "P PAD VDDIO 5"),
 604        PINCTRL_PIN(414, "P PAD VSSIO 5"),
 605        PINCTRL_PIN(415, "P PAD GND 5"),
 606        PINCTRL_PIN(416, "P PAD VDD 5"),
 607        PINCTRL_PIN(417, "PO EMIF 0 A01"),
 608        PINCTRL_PIN(418, "PIO EMIF 0 D00"),
 609        PINCTRL_PIN(419, "IF 0 SD CLK"),
 610        PINCTRL_PIN(420, "APP SPI CLK"),
 611        PINCTRL_PIN(421, "APP SPI DO"),
 612        PINCTRL_PIN(422, "APP SPI DI"),
 613        PINCTRL_PIN(423, "APP SPI CS0"),
 614        PINCTRL_PIN(424, "APP SPI CS1"),
 615        PINCTRL_PIN(425, "APP SPI CS2"),
 616        PINCTRL_PIN(426, "PIO APP GPIO 10"),
 617        PINCTRL_PIN(427, "P PAD VDDIO 41"),
 618        PINCTRL_PIN(428, "P PAD VSSIO 41"),
 619        PINCTRL_PIN(429, "P PAD GND 6"),
 620        PINCTRL_PIN(430, "P PAD VDD 6"),
 621        PINCTRL_PIN(431, "PIO ACC SDIO0 CMD"),
 622        PINCTRL_PIN(432, "PIO ACC SDIO0 CK"),
 623        PINCTRL_PIN(433, "PIO ACC SDIO0 D3"),
 624        PINCTRL_PIN(434, "PIO ACC SDIO0 D2"),
 625        PINCTRL_PIN(435, "PIO ACC SDIO0 D1"),
 626        PINCTRL_PIN(436, "PIO ACC SDIO0 D0"),
 627        PINCTRL_PIN(437, "PIO USB PU"),
 628        PINCTRL_PIN(438, "PIO USB SP"),
 629        PINCTRL_PIN(439, "PIO USB DAT VP"),
 630        PINCTRL_PIN(440, "PIO USB SE0 VM"),
 631        PINCTRL_PIN(441, "PIO USB OE"),
 632        PINCTRL_PIN(442, "PIO USB SUSP"),
 633        PINCTRL_PIN(443, "P PAD VSSIO 6"),
 634        PINCTRL_PIN(444, "P PAD VDDIO 6"),
 635        PINCTRL_PIN(445, "PIO USB PUEN"),
 636        PINCTRL_PIN(446, "PIO ACC UART0 RX"),
 637        PINCTRL_PIN(447, "PIO ACC UART0 TX"),
 638        PINCTRL_PIN(448, "PIO ACC UART0 CTS"),
 639        PINCTRL_PIN(449, "PIO ACC UART0 RTS"),
 640        PINCTRL_PIN(450, "PIO ACC UART3 RX"),
 641        PINCTRL_PIN(451, "PIO ACC UART3 TX"),
 642        PINCTRL_PIN(452, "PIO ACC UART3 CTS"),
 643        PINCTRL_PIN(453, "PIO ACC UART3 RTS"),
 644        PINCTRL_PIN(454, "PIO ACC IRDA TX"),
 645        PINCTRL_PIN(455, "P PAD VDDIO 7"),
 646        PINCTRL_PIN(456, "P PAD VSSIO 7"),
 647        PINCTRL_PIN(457, "P PAD GND 7"),
 648        PINCTRL_PIN(458, "P PAD VDD 7"),
 649        PINCTRL_PIN(459, "PIO ACC IRDA RX"),
 650        PINCTRL_PIN(460, "PIO ACC PCM I2S CLK"),
 651        PINCTRL_PIN(461, "PIO ACC PCM I2S WS"),
 652        PINCTRL_PIN(462, "PIO ACC PCM I2S DATA A"),
 653        PINCTRL_PIN(463, "PIO ACC PCM I2S DATA B"),
 654        PINCTRL_PIN(464, "PO SIM CLK"),
 655        PINCTRL_PIN(465, "PIO ACC IRDA SD"),
 656        PINCTRL_PIN(466, "PIO SIM DATA"),
 657};
 658
 659/**
 660 * @dev: a pointer back to containing device
 661 * @virtbase: the offset to the controller in virtual memory
 662 */
 663struct u300_pmx {
 664        struct device *dev;
 665        struct pinctrl_dev *pctl;
 666        u32 phybase;
 667        u32 physize;
 668        void __iomem *virtbase;
 669};
 670
 671/**
 672 * u300_pmx_registers - the array of registers read/written for each pinmux
 673 * shunt setting
 674 */
 675const u32 u300_pmx_registers[] = {
 676        U300_SYSCON_PMC1LR,
 677        U300_SYSCON_PMC1HR,
 678        U300_SYSCON_PMC2R,
 679        U300_SYSCON_PMC3R,
 680        U300_SYSCON_PMC4R,
 681};
 682
 683/**
 684 * struct u300_pin_group - describes a U300 pin group
 685 * @name: the name of this specific pin group
 686 * @pins: an array of discrete physical pins used in this group, taken
 687 *      from the driver-local pin enumeration spa3R,
&AOa>   6     * @name: the num_rray of thiumberte pin thoup, taken 589<6a>   68 class="comment">/**om the dele/spathoup.in thso we ccomita3R 590<6a>   69 class="comment"> * @dev: a pa href="drivers/pinctrl/pinctrl-u300.c#L675" id="L691" class6"line" name="L591"> 591<6a>   6    u300_pmx_registe describhref="drivers/pinctrl/pinctrl-u300.c#L664" id="L692" class6"line" name="L592"> 592<6a>   6     5ref">u300_pmx_r"> 5ref="drivers/pinctrl/pinctrl-u300.c#L669" id="L693" class6"line" name="L593"> 593<6a>   6    pinctrl_dev 594<6a>   6    u300_pmx_r"um_rrayref="drivers/pinctrl/pinctrl-u300.c#L669" id="L695" class="line" name="L595"> 595<6a>   6     596<6a>   6     597<6a>   69 class="comment"> *      fr
 598<6a>   69    * @name: thehref="+ers 599<6a>   69 class="comment">/**om @mask: maskebiathtoohysable href="drivers/pinctrl/pinctrl-u300.c#L673" id="L700" class7"line" name="L600"> 600<7a>   70 class="comment"> * @dev: a poival: maskebiathtoon able href="drivers/pinctrl/pinctrl-u300.c#L673" id="L701" class7"line" name="L591"> 591<7a>   70 class="comment"> * @virtbase href="drivers/pinctrl/pinctrl-u300.c#L673" id="L702" class7"line" name="L592"> 592<7a>   70 class="comment"> * u300_pmx_ronmaskelazy dog: href="drivers/pinctrl/pinctrl-u300.c#L673" id="L703" class7"line" name="L593"> 593<7a>   70 class="comment"> * shunt settonmaske= { href="drivers/pinctrl/pinctrl-u300.c#L673" id="L704" class7"line" name="L594"> 594<7a>   70 class="comment"> * struct u30  {SIM DAT
 595<7a>   70 class="comment"> * @name: the  {SIM DAT
 596<7a>   70 class="comment"> * @pins: an   {SIM DAT
<2hSIM DA  mask, SIM DAT
<2hSIM DA  value}, href="drivers/pinctrl/pinctrl-u300.c#L673" id="L707" class7"line" name="L597"> 597<7a>   70 class="comment"> *      from th{SIM DAT
<3hSIM DA  mask, SIM DAT
<3hSIM DA  value}, href="drivers/pinctrl/pinctrl-u300.c#L673" id="L708" class7"line" name="L598"> 598<7a>   70    * @name: theth{SIM DAT
<4hSIM DA  mask, SIM DAT
<4hSIM DA  value} href="drivers/pinctrl/pinctrl-u300.c#L673" id="L709" class7"line" name="L599"> 599<7a>   70 class="comment">/**om } href="drivers/pinctrl/pinctrl-u300.c#L673" id="L710" class7"line" name="L610"> 610<7a>   71 class="comment"> * @dev: a pa href="drivers/pinctrl/pinctrl-u300.c#L675" id="L711" class7"line" name="L611"> 611<7a>   71   u300_pmx_registers 612<7a>   7    u300_pmx_rmaskhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L713" class7"line" name="L613"> 613<7a>   7     614<7a>   7     615<7a>   7     616<7a>   71 class="comment"> * @pins: /* Tler hip powpioin tharet; 617<7a>   7    u300_pmx_rpowpi_rray
 618<7a>   7     619<7a>   7     620<7a>   7     621<7a>   7     622<7a>   7     623<7a>   7     624<7a>   7     625<7a>   7     626<7a>   7     627<7a>   72   u300_pmx_remif0_rray
 628<7a>   7     629<7a>   7     630<7a>   7     631<7a>   731  u300_pmx_remif1_rray
 632<7a>   7     633<7a>   7     634<7a>   7     635<7a>   7     636<7a>   7    u300_pmx_ruart0_rray
 637<7a>   73   u300_pmx_rmmc0_rray
 638<7a>   7    u300_pmx_rspi0_rray
 639<7a>   7     640<7a>   7    u300_pmx_registersu300_pmx_remif0_mask
 641<7a>   7     642<7a>   7     643<7a>   7     644<7a>   7     645<7a>   7     646<7a>   7     647<7a>   7     648<7a>   74   u300_pmx_registersu300_pmx_remif1_mask
 649<7a>   7     * @pins: /* href="drivers/pinctrl/pinctrl-u300.c#L675" id="L750" class7"line" name="L650"> 650<7a>   75 class="comment"> * @dev: a         * Tlis+refnecaththe SDRAMhtooCS2sandua NAND fenthhto href="drivers/pinctrl/pinctrl-u300.c#L675" id="L751" class7"line" name="L651"> 651<7a>   75 class="comment"> * @virtbas        * CS0 onhthe &quo. href="drivers/pinctrl/pinctrl-u300.c#L675" id="L752" class7"line" name="L652"> 652<7a>   75 class="comment"> * u300_pmx        *a href="drivers/pinctrl/pinctrl-u300.c#L675" id="L753" class7"line" name="L653"> 653<7a>   7     654<7a>   7    U300_SYSCON_PMC1LR,
 655<7a>   7    U300_SYSCON_PMC1LR,
 656<7a>   7    U300_SYSCON_PMC1LR,
 657<7a>};
757  U300_SYSCON_PMC1LR,
 658<7a>
U300_SYSCON_PMC1LR,
 659<7a>U300_SYSCON_PMC1LR,
 660<7a>U300_SYSCON_PMC1LR,
 661<7a>U300_SYSCON_PMC1LR,
 662<7a> 663<7a>str76    664<7a>   76    665<7a>   76    666<7a>   7     667<7a>   76 href="drivers/pinctrl/pinctrl-u300.c#L658" id="L768" class7"line" name="L668"> 668<7a>   76ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L769" class7"line" name="L669"> 669<7a>};
7a hrefstatic+ref="+href="+code=u300_pmx" class=rsu300_pmx_registersu300_pmx_reart0_mask
 670<7a>
 671<7a> 672<7a>U300_SYSCON_PMC1LR,
 673<7a>U300_SYSCON_PMC1LR,
 674<7a>U300_SYSCON_PMC1LR,
 675<7a>con77   U300_SYSCON_PMC1LR,
 676<7a>   7     677<7a>   7     678<7a>   7     679<7a>   7     680<7a>   7     681<7a>};
7a hrefdrivers/pinctrl/pinctrl-u300.c#L658" id="L782" class7"line" name="L682"> 682<7a>
u300_pmx_registersu300_pmx_rmmc0_mask
 683<7a>U300_SYSCON_PMC1LR,
U300_SYSCON_PMC1LR,
 684<7a> 685<7a> 686<7a> 687<7a>U300_SYSCON_PMC1LR,
<4R_APP_MISC_12_MASK  &A7a>   788  U300_SYSCON_PMC1LR,
<4R_APP_MISC_12_APP_ot;<   589<7a>   78 href="drivers/pinctrl/pinctrl-u300.c#L670" id="L790" class7"line" name="L590"> 590<7a>   79;   591<7a>   791  u300_pmx_registersu300_pmx_rspi0_mask
 592<7a>   79    593<7a>   79    594<7a>   79   U300_SYSCON_PMC1LR,
 595<7a>   79   U300_SYSCON_PMC1LR,
 596<7a>   79   U300_SYSCON_PMC1LR,
 597<7a>   797  U300_SYSCON_PMC1LR,
 598<7a>   798  U300_SYSCON_PMC1LR,
 599<7a>   799  U300_SYSCON_PMC1LR,
 600<8a>   800   591<8a>   80    592<8a>   80    593<8a>   80    594<8a>   80    595<8a>   80    596<8a>   80   u300_pmx_registe describhref=code=u300_pmx" class= describsref">u300_pmx_registe describs
 597<8a>   807   598<8a>   808   5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DApowpigrpan>),
 599<8a>   809  pinctrl_devu300_pmx_rpowpi_rray
 610<8a>   810  u300_pmx_r"um_rrayref=ef=sode=u300_pmx" ARRAY_SIZEref">u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" powpi_rrayref">u300_pmx_rpowpi_rray
 611<8a>   811   612<8a>   8     613<8a>   813   5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DAemif0grpan>),
 614<8a>   81   pinctrl_devu300_pmx_remif0_rray
 615<8a>   81   u300_pmx_r"um_rrayref=ef=sode=u300_pmx" ARRAY_SIZEref">u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" emif0_rrayref">u300_pmx_remif0_rray
 616<8a>   81    617<8a>   817   618<8a>   818   5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DAemif1grpan>),
 619<8a>   819  pinctrl_devu300_pmx_remif1_rray
 620<8a>   820  u300_pmx_r"um_rrayref=ef=sode=u300_pmx" ARRAY_SIZEref">u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" emif1_rrayref">u300_pmx_remif1_rray
 621<8a>   821   622<8a>   82    623<8a>   823   5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DAeart0grpan>),
 624<8a>   82   pinctrl_devu300_pmx_ruart0_rray
 625<8a>   82   u300_pmx_r"um_rrayref=ef=sode=u300_pmx" ARRAY_SIZEref">u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" uart0_rrayref">u300_pmx_ruart0_rray
 626<8a>   82    627<8a>   827   628<8a>   828   5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DAmmc0grpan>),
 629<8a>   829  pinctrl_devu300_pmx_rmmc0_rray
 630<8a>   830  u300_pmx_r"um_rrayref=ef=sode=u300_pmx" ARRAY_SIZEref">u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" mmc0_rrayref">u300_pmx_rmmc0_rray
 631<8a>   831   632<8a>   83    633<8a>   833   5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DAspi0grpan>),
 634<8a>   83   pinctrl_devu300_pmx_rspi0_rray
 635<8a>   83   u300_pmx_r"um_rrayref=ef=sode=u300_pmx" ARRAY_SIZEref">u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" spi0_rrayref">u300_pmx_rspi0_rray
 636<8a>   83    637<8a>   83 href="drivers/pinctrl/pinctrl-u300.c#L658" id="L838" class8"line" name="L638"> 638<8a>   83ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L839" class8"line" name="L639"> 639<8a>   83 hrefstatic+out"code=u300_pmx" classgetescribs_countref">u300_pmx_registgetescribs_countref=(href="+code=u300_pmx" 00.c#L6s="sref">pinctrl_dev *pinctrl_dev="s="s
 640<8a>   8     641<8a>   8    u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" ulass= describsref">u300_pmx_registe describs
 642<8a>   8     643<8a>   8     644<8a>   8     5ref">u300_pmx_registgetescrib_"> 5ref=(href="+code=u300_pmx" 00.c#L6s="sref">pinctrl_dev *pinctrl_dev="s="s
 645<8a>   84   u300_pmx_rselector
 646<8a>   8     647<8a>   8    u300_pmx_registe describs
u300_pmx_rselector
 5ref">u300_pmx_r"> 5ref="drivers/pinctrl/pinctrl-u300.c#L658" id="L848" class8"line" name="L648"> 648<8a>   84    649<8a>   84    650<8a>   850hrefstatic+out"code=u300_pmx" classgetescrib_rrayref">u300_pmx_rulassgetescrib_rrayref=(href="+code=u300_pmx" 00.c#L6s="sref">pinctrl_dev *pinctrl_dev="s="s
u300_pmx_rselector
 651<8a>   851  pinctrl_dev 652<8a>   852  u300_pmx_r"um_rrayref==drivers/pinctrl/pinctrl-u300.c#L659" id="L853" class8"line" name="L653"> 653<8a>   8     654<8a>   8    pinctrl_devu300_pmx_registe describs
u300_pmx_rselector
pinctrl_dev 655<8a>   8    u300_pmx_r"um_rrayref=ef=sode=u300_pmx" ulass= describsref">u300_pmx_registe describs
u300_pmx_rselector
u300_pmx_r"um_rrayref="drivers/pinctrl/pinctrl-u300.c#L669" id="L856" class8"line" name="L656"> 656<8a>   8     657<8a>};
8a href=drivers/pinctrl/pinctrl-u300.c#L669" id="L858" class8"line" name="L658"> 658<8a>
 659<8a>u300_pmx_registe dedbg_showref=(href="+code=u300_pmx" 00.c#L6s="sref">pinctrl_dev *pinctrl_dev="s="s
u300_pmx_rseq_fil5ref="+code=pctl" clasyref">u300_pmx_rsref=adrivers/pinctrl/pinctrl-u300.c#L682" id="L860" class8"line" name="L660"> 660<8a>u300_pmx_rthe coref==drivers/pinctrl/pinctrl-u300.c#L659" id="L861" class8"line" name="L661"> 661<8a> 662<8a>u300_pmx_rseq_proutfref=(sode=u300_pmx" sref">u300_pmx_rsref=a=s="string">"PIO SIM DA an>),
u300_pmx_rDRIVER_NAME
 663<8a>str86    664<8a>   86    665<8a>   86   u300_pmx_r00.c#L6sobs  u300_pmx_registec#L6sobsref=ef="drivers/pinctrl/pinctrl-u300.c#L676" id="L866" class8"line" name="L666"> 666<8a>   8    u300_pmx_rgetescribs_countref=ef=sode=u300_pmx" ulassgetescribs_countref">u300_pmx_registgetescribs_countref=adrivers/pinctrl/pinctrl-u300.c#L682" id="L867" class8"line" name="L667"> 667<8a>   8     5ref">u300_pmx_rgetescrib_"> 5ref=ef=sode=u300_pmx" ulassgetescrib_"> 5ref">u300_pmx_registgetescrib_"> 5ref=adrivers/pinctrl/pinctrl-u300.c#L682" id="L868" class8"line" name="L668"> 668<8a>   8    void u300_pmx_rgetescrib_rrayref=ef=sode=u300_pmx" ulassgetescrib_rrayref">u300_pmx_rulassgetescrib_rrayref=adrivers/pinctrl/pinctrl-u300.c#L682" id="L869" class8"line" name="L669"> 669<8a>};
869  void u300_pmx_re dedbg_showref=ef=sode=u300_pmx" ulass= dedbg_showref">u300_pmx_registe dedbg_showref=adrivers/pinctrl/pinctrl-u300.c#L682" id="L870" class8"line" name="L670"> 670<8a>
 671<8a> 672<8a> * u300_pm/* href="drivers/pinctrl/pinctrl-u300.c#L675" id="L873" class8"line" name="L673"> 673<8a> * shunt settHere we def"L6 of revailable fu.c#io thand of ir+rerrespond;PI
 674<8a> */
 675<8a>con87    676<8a>   87 class="comment"> * @pins: /** href="drivers/pinctrl/pinctrl-u300.c#L675" id="L877" class8"line" name="L677"> 677<8a>   87 class="comment"> *      from s_pin_group -mx_fu.ces a U300 pinN_PM 678<8a>   87    * @name: the name of this specific pin group 679<8a>   87 class="comment">/**om @n>

 680<8a>   88 class="comment"> * @dev: a poionmask:ebiathtoo cohtoon ableific pwhen do;PI 681<8a>};
88 class="comment"> * @virtbasea href="drivers/pinctrl/pinctrl-u300.c#L675" id="L882" class8"line" name="L682"> 682<8a>
u300_pmx_registers 683<8a> 5ref">u300_pmx_r"> 5ref="drivers/pinctrl/pinctrl-u300.c#L669" id="L884" class8"line" name="L684"> 684<8a>u300_pmx_rscribs
 685<8a>u300_pmx_r"um_scribs
 686<8a>u300_pmx_registersu300_pmx_rmaskhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L887" class8"line" name="L687"> 687<8a>&A8a>   88ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L8N9" class8"line" name="L589"> 589<8a>   88 hrefstatic+ref="+char"++ref="+code=u300_pmx" eowpigrpyref">u300_pmx_rpowpigrpy
"PIO SIM DApowpigrpan>),
 590<8a>   89   u300_pmx_remif0grpy
"PIO SIM DAemif0grpan>),
 591<8a>   891  u300_pmx_remif1grpy
"PIO SIM DAemif1grpan>),
 592<8a>   89ref="static+ref="+char"++ref="+code=u300_pmx" eart0grpyref">u300_pmx_ruart0grpy
"PIO SIM DAeart0grpan>),
 593<8a>   89   u300_pmx_rmmc0grpy
"PIO SIM DAmmc0grpan>),
 594<8a>   89   u300_pmx_rspi0grpy
"PIO SIM DAspi0grpan>),
 595<8a>   89    596<8a>   89   u300_pmx_registersu300_pmx_registers 597<8a>   897   598<8a>   898   5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DApowpian>),
 599<8a>   899  u300_pmx_rscribs
u300_pmx_rpowpigrpy
 600<9a>   900  u300_pmx_r"um_scribs
u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" powpigrpyref">u300_pmx_rpowpigrpy
 591<9a>   901   * @pins: /* Mask c pN/Asea href="drivers/pinctrl/pinctrl-u300.c#L675" id="L902" class9"line" name="L592"> 592<9a>   90    593<9a>   90    594<9a>   90    5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DAemif0an>),
 595<9a>   90   u300_pmx_rscribs
u300_pmx_remif0grpy
 596<9a>   90   u300_pmx_r"um_scribs
u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" emif0grpyref">u300_pmx_remif0grpy
 597<9a>   907  u300_pmx_rmaskhrefef=sode=u300_pmx" emif0_maskref">u300_pmx_remif0_mask
 598<9a>   908   599<9a>   909   610<9a>   910   5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DAemif1an>),
 611<9a>   911  u300_pmx_rscribs
u300_pmx_remif1grpy
 612<9a>   912  u300_pmx_r"um_scribs
u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" emif1grpyref">u300_pmx_remif1grpy
 613<9a>   913  u300_pmx_rmaskhrefef=sode=u300_pmx" emif1_maskref">u300_pmx_remif1_mask
 614<9a>   91    615<9a>   91    616<9a>   91    5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DAeart0an>),
 617<9a>   917  u300_pmx_rscribs
u300_pmx_ruart0grpy
 618<9a>   918  u300_pmx_r"um_scribs
u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" eart0grpyref">u300_pmx_ruart0grpy
 619<9a>   919  u300_pmx_rmaskhrefef=sode=u300_pmx" uart0_maskref">u300_pmx_reart0_mask
 620<9a>   920   621<9a>   921   622<9a>   922   5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DAmmc0an>),
 623<9a>   923  u300_pmx_rscribs
u300_pmx_rmmc0grpy
 624<9a>   92   u300_pmx_r"um_scribs
u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" mmc0grpyref">u300_pmx_rmmc0grpy
 625<9a>   92   u300_pmx_rmaskhrefef=sode=u300_pmx" mmc0_maskref">u300_pmx_rmmc0_mask
 626<9a>   92    627<9a>   927   628<9a>   928   5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DAspi0an>),
 629<9a>   929  u300_pmx_rscribs
u300_pmx_rspi0grpy
 630<9a>   930  u300_pmx_r"um_scribs
u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" spi0grpyref">u300_pmx_rspi0grpy
 631<9a>   931  u300_pmx_rmaskhrefef=sode=u300_pmx" spi0_maskref">u300_pmx_rspi0_mask
 632<9a>   93    633<9a>   933   634<9a>   93    635<9a>   93   u300_pmx_registersu300_pmx_registershref=+code=virtbase" u=rsref">u300_pmx_reershrefa+unsign grcode=virtbase" selectorref">u300_pmx_rselector
 636<9a>   93   u300_pmx_rboolref=ecode=u300_pmx" n ableref">u300_pmx_renableref==drivers/pinctrl/pinctrl-u300.c#L659" id="L937" class9"line" name="L637"> 637<9a>   93 href"drivers/pinctrl/pinctrl-u300.c#L676" id="L938" class9"line" name="L638"> 638<9a>   938  u300_pmx_rregvalhrefa+code=virtbase" valref">u300_pmx_rvalhrefa+code=virtbase" maskref">u300_pmx_rmaskhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L939" class9"line" name="L639"> 639<9a>   939  u300_pmx_rihref"drivers/pinctrl/pinctrl-u300.c#L682" id="L940" class9"line" name="L640"> 640<9a>   940  u300_pmx_registersu300_pmx_reers 641<9a>   94 hrefdrivers/pinctrl/pinctrl-u300.c#L658" id="L942" class9"line" name="L642"> 642<9a>   94   u300_pmx_reersu300_pmx_registersu300_pmx_rselector
u300_pmx_rmaskhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L943" class9"line" name="L643"> 643<9a>   943  u300_pmx_rihrefef=0;"code=u300_pmx" iref">u300_pmx_rihref <"code=u300_pmx" ARRAY_SIZEref">u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" ulass=rsu300_pmx_registersu300_pmx_rihref++)+"drivers/pinctrl/pinctrl-u300.c#L676" id="L944" class9"line" name="L644"> 644<9a>   94   u300_pmx_renableref==drivers/pinctrl/pinctrl-u300.c#L659" id="L945" class9"line" name="L645"> 645<9a>   94   u300_pmx_rvalhrefef=sode=u300_pmx" u=rsu300_pmx_reersu300_pmx_rbitphref"drivers/pinctrl/pinctrl-u300.c#L682" id="L946" class9"line" name="L646"> 646<9a>   94    647<9a>   947  u300_pmx_rvalhrefef=0"drivers/pinctrl/pinctrl-u300.c#L669" id="L948" class9"line" name="L648"> 648<9a>   94ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L949" class9"line" name="L649"> 649<9a>   949  u300_pmx_rmaskhrefef=sode=u300_pmx" u=rsu300_pmx_reersu300_pmx_rmaskhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L950" class9"line" name="L650"> 650<9a>   950  u300_pmx_rmaskhrefe!f=0)+"drivers/pinctrl/pinctrl-u300.c#L676" id="L951" class9"line" name="L651"> 651<9a>   951  u300_pmx_rregvalhrefef=sode=u300_pmx" readwref">u300_pmx_rreadwref=(sode=u300_pmx" u=rsref">u300_pmx_reershref-&g,
u300_pmx_rvirtbasehrefe+=sode=u300_pmx" ulass=rsu300_pmx_registersu300_pmx_rihref])"drivers/pinctrl/pinctrl-u300.c#L658" id="L952" class9"line" name="L652"> 652<9a>   952  u300_pmx_rregvalhrefe&= ~u300_pmx_rmaskhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L953" class9"line" name="L653"> 653<9a>   953  u300_pmx_rregvalhrefe|f=sode=u300_pmx" valref">u300_pmx_rvalhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L954" class9"line" name="L654"> 654<9a>   95   u300_pmx_rwritewref=(sode=u300_pmx" regvalref">u300_pmx_rregvalhrefa+code=virtbase" u=rsref">u300_pmx_reershref-&g,
u300_pmx_rvirtbasehrefe+=sode=u300_pmx" ulass=rsu300_pmx_registersu300_pmx_rihref])"drivers/pinctrl/pinctrl-u300.c#L658" id="L955" class9"line" name="L655"> 655<9a>   95    656<9a>   95   u300_pmx_reers 657<9a>};
957   658<9a>
 659<9a> 660<9a>u300_pmx_registerspinctrl_dev *pinctrl_dev="s="s
u300_pmx_rselector
 661<9a>u300_pmx_rscribhref=drivers/pinctrl/pinctrl-u300.c#L659" id="L962" class9"line" name="L662"> 662<9a> 663<9a>str963  u300_pmx_registershref=+code=virtbase" u=rsref">u300_pmx_reershref"drivers/pinctrl/pinctrl-u300.c#L658" id="L964" class9"line" name="L664"> 664<9a>   96    665<9a>   96    * @pins: /* There is noth;PI 666<9a>   9    u300_pmx_rselector
 667<9a>   967   668<9a>   96ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L969" class9"line" name="L669"> 669<9a>};
969  void u300_pmx_reershrefef=sode=u300_pmx" p *pinctrl_dev *pinctrl_dev="s="s
 670<9a>
u300_pmx_registersu300_pmx_reershrefa+code=virtbase" selectorref">u300_pmx_rselector
u300_pmx_rrefe
 671<9a> 672<9a> 673<9a> 674<9a> 675<9a>con97   u300_pmx_registerspinctrl_dev *pinctrl_dev="s="s
u300_pmx_rselector
 676<9a>   97   u300_pmx_rscribhref=drivers/pinctrl/pinctrl-u300.c#L659" id="L977" class9"line" name="L677"> 677<9a>   97 href"drivers/pinctrl/pinctrl-u300.c#L676" id="L978" class9"line" name="L678"> 678<9a>   978  u300_pmx_registershref=+code=virtbase" u=rsref">u300_pmx_reershref"drivers/pinctrl/pinctrl-u300.c#L658" id="L979" class9"line" name="L679"> 679<9a>   97    680<9a>   980   * @pins: /* There is noth;PI 681<9a>};
981  u300_pmx_rselector
 682<9a>
 683<9a> 684<9a>u300_pmx_reershrefef=sode=u300_pmx" p *pinctrl_dev *pinctrl_dev="s="s
 685<9a>u300_pmx_registersu300_pmx_reershrefa+code=virtbase" selectorref">u300_pmx_rselector
u300_pmx_rfalse
 686<9a> 687<9a>&A9a>   98ref="static+out"code=u300_pmx" classersu300_pmx_registerspinctrl_dev *pinctrl_dev="s="s
 589<9a>   98 href"drivers/pinctrl/pinctrl-u300.c#L676" id="L990" class9"line" name="L590"> 590<9a>   990  u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" ulass=rsu300_pmx_registers 591<9a>   991   592<9a>   99ref="drivers/pinctrl/pinctrl-u300.c#L669" id="L993" class9"line" name="L593"> 593<9a>   99    5ref">u300_pmx_registers 5ref=(href="+code=u300_pmx" 00.c#L6_="sref">pinctrl_dev *pinctrl_dev="s="s
 594<9a>   99   u300_pmx_rselector
 595<9a>   99    596<9a>   99   u300_pmx_registersu300_pmx_rselector
 5ref">u300_pmx_r"> 5ref="drivers/pinctrl/pinctrl-u300.c#L669" id="L997" class9"line" name="L597"> 597<9a>   99 href=drivers/pinctrl/pinctrl-u300.c#L669" id="L99(4319"line" name="L598"> 598<9a>   99ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L999" class9"line" name="L599"> 599<9a>   99 hrefstatic+out"code=u300_pmx" classersu300_pmx_registerspinctrl_dev *pinctrl_dev="s="s
u300_pmx_rselector
 599<1000">1000  u300_pmx_rscribs
u300doL599clas94/df/ad30f30a7fa91049b4eccf5e8ad21f4bc98 _3/1000">rivers/pinctrl/pinctrl-u300.c#L682" id="L1001" class100line" name="L591"> 591<100li>1001  u300_pmx_r"um_scribs
 592<100li>100    593<100li>1003  u300_pmx_rscribs
u300_pmx_registersu300_pmx_rselector
u300_pmx_rscribs
 594<100li>100   u300_pmx_r"um_scribs
u300_pmx_registersu300_pmx_rselector
u300_pmx_r"um_scribs
 595<100li>1005   596<100li>100    597<100li>100 hrefdrivers/pinctrl/pinctrl-u300.c#L669" id="L1008" class100line" name="L598"> 598<100li>100ref="static+href="+code=u300_pmx" 00.muxsobsref">u300_pmx_r00.muxsobs  u300_pmx_registemxsobsref=ef="drivers/pinctrl/pinctrl-u300.c#L676" id="L1009" class100line" name="L599"> 599<100li>1009  void u300_pmx_rgetefu.c#io t_count
u300_pmx_registers 610<10"li>10"l  void  5ref">u300_pmx_rgetefu.c#io _"> 5
 5ref">u300_pmx_registers 5ref=adrivers/pinctrl/pinctrl-u300.c#L682" id="L1011" class10"line" name="L611"> 611<10"li>10"1  void u300_pmx_rsetefu.c#io _scribs
u300_pmx_registers 612<10"li>10"2  void u300_pmx_renableref=ef=sode=u300_pmx" ulass=rsu300_pmx_registers 613<10"li>10"3  void u300_pmx_rdisableref=ef=sode=u300_pmx" ulass=rsu300_pmx_registers 614<10"li>10"    615<10"li>10"    616<10"li>10" class="comment"> * @pins: /* href="drivers/pinctrl/pinctrl-u300.c#L675" id="L10"7" class10"line" name="L617"> 617<10"li>10" class="comment"> *      from GPIO ranges handl grby of repplica#io -side COH901XXX GPIO reftroller href="drivers/pinctrl/pinctrl-u300.c#L675" id="L10"8" class10"line" name="L618"> 618<10"li>10"    * @name: theVery many 619<10"li>10" class="comment">/**om that areeusefulrou prac#ice 620<10"li>10"lclass="comment">/**oma href="drivers/pinctrl/pinctrl-u300.c#L675" id="L10"1" class10"line" name="L621"> 621<10"li>10"1  vo#def"L6 sode=u300_pmx" UgistGPIO_RANGEref">u300_pmx_rUgistGPIO_RANGEref=(sode=u300_pmx" aref">pinctrl_dea
pinctrl_deb
u300_pmx_rcref=) {+.code=u300_pmx" "> 5ref">u300_pmx_r"> 5ref=ef=s="string">"PIO SIM DACOH901XXXan>),
u300_pmx_ridref=ef=sode=u300_pmx" aref">pinctrl_dea
u300_pmx_rbasehreff=sode=u300_pmx" aref">pinctrl_dea
 622<10"li>10"2  u300_pmx_re debaseref=ef=sode=u300_pmx" bref">pinctrl_deb
u300_pmx_r"prayref=ef=sode=u300_pmx" cref">u300_pmx_rcref=+=drivers/pinctrl/pinctrl-u300.c#L669" id="L10"3" class10"line" name="L623"> 623<10"li>10"    624<10"li>10"   pinctrl_dev *u300_pmx_rulassgpio_rangey ha href="drivers/pinctrl/pinctrl-u300.c#L676" id="L10"5" class10"line" name="L625"> 625<10"li>10"   u300_pmx_rUgistGPIO_RANGEref=(10, 426, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L10"6" class10"line" name="L626"> 626<10"li>10"6  u300_pmx_rUgistGPIO_RANGEref=(11, 180, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L10"7" class10"line" name="L627"> 627<10"li>10"7  u300_pmx_rUgistGPIO_RANGEref=(12, 165, 1="+c="comment"> * @pins: /* MS/MMCsccrgrousl/tio oma href="drivers/pinctrl/pinctrl-u300.c#L675" id="L10"8" class10"line" name="L628"> 628<10"li>10"8  u300_pmx_rUgistGPIO_RANGEref=(13, 179, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L10"9" class10"line" name="L629"> 629<10"li>10"9  void u300_pmx_rUgistGPIO_RANGEref=(14, 178, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1030" class10"line" name="L630"> 630<10"li>10"l  void u300_pmx_rUgistGPIO_RANGEref=(16, 194, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1031" class10"line" name="L631"> 631<10"li>10"1  void u300_pmx_rUgistGPIO_RANGEref=(17, 193, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1032" class10"line" name="L632"> 632<10"li>10"   u300_pmx_rUgistGPIO_RANGEref=(18, 192, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1033" class10"line" name="L633"> 633<10"li>10"3  u300_pmx_rUgistGPIO_RANGEref=(19, 191, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1034" class10"line" name="L634"> 634<10"li>10"   u300_pmx_rUgistGPIO_RANGEref=(20, 186, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1035" class10"line" name="L635"> 635<10"li>10"   u300_pmx_rUgistGPIO_RANGEref=(21, 185, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1036" class10"line" name="L636"> 636<10"li>10"6  u300_pmx_rUgistGPIO_RANGEref=(22, 184, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1037" class10"line" name="L637"> 637<10"li>10"7  u300_pmx_rUgistGPIO_RANGEref=(23, 183, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1038" class10"line" name="L638"> 638<10"li>10"8  u300_pmx_rUgistGPIO_RANGEref=(24, 182, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1039" class10"line" name="L639"> 639<10"li>10"9  void u300_pmx_rUgistGPIO_RANGEref=(25, 181, 1="drivers/pinctrl/pinctrl-u300.c#L657" id="L1040" class10"line" name="L640"> 640<10"li>10"l   641<10"li>10" hrefdrivers/pinctrl/pinctrl-u300.c#L658" id="L10"2" class10"line" name="L642"> 642<10"li>10"ref="static+href="+code=u300_pmx" 00.c#L6_gpio_rangeref">pinctrl_dev *pinctrl_declassmatch_gpio_rangeref=(unsign grcode=virtbase" vpinctrl_dev 643<10"li>10"3   644<10"li>10"   u300_pmx_rihref"drivers/pinctrl/pinctrl-u300.c#L682" id="L10"5" class10"line" name="L645"> 645<10"li>10"    646<10"li>10"6  u300_pmx_rihrefef=0;"code=u300_pmx" iref">u300_pmx_rihref <"code=u300_pmx" ARRAY_SIZEref">u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" ulassgpio_rangeyref">u300_pmx_rulassgpio_rangey ha =;"code=u300_pmx" iref">u300_pmx_rihref++)+"drivers/pinctrl/pinctrl-u300.c#L676" id="L10"7" class10"line" name="L647"> 647<10"li>10"7  pinctrl_dev *pinctrl_derange   648<10"li>10"ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L1049" class10"line" name="L639"> 639<104li>1049  pinctrl_derange  u300_pmx_rulassgpio_rangey ha hcode=u300_pmx" iref">u300_pmx_rihref]"drivers/pinctrl/pinctrl-u300.c#L682" id="L1050" class10"line" name="L650"> 650<10"li>10"l  pinctrl_devpinctrl_derange  u300_pmx_re debaseref=e&&drivers/pinctrl/pinctrl-u300.c#L682" id="L1051" class10"line" name="L651"> 651<10"li>10"1  pinctrl_devpinctrl_derange  u300_pmx_re debaseref=e+=sode=u300_pmx" rangeref">pinctrl_derange  u300_pmx_r"prayref=e- 1==drivers/pinctrl/pinctrl-u300.c#L659" id="L1052" class10"line" name="L652"> 652<10"li>10"2  pinctrl_derange   653<10"li>10"3   654<10"li>10"   pinctrl_deNULL   655<10"li>10"5   656<10"li>10"6ef="drivers/pinctrl/pinctrl-u300.c#L659" id="L1057" class10"line" name="L657"> 657<10"li>10"7  u300_pmx_registe deconfigpinctrl_dev *pinctrl_dev="s="s
 658<10"li>10"8  pinctrl_dev 659<10"li>10"9  u300_pmx_rconfig
 660<10"li>10"l   661<10"li>10"1  pinctrl_dev *pinctrl_derange  pinctrl_declassmatch_gpio_rangeref=(code=virtbase" vpinctrl_dev 662<10"li>10"ref="drivers/pinctrl/pinctrl-u300.c#L669" id="L10"3" class10"line" name="L663"> 663<10"li>10"3   * @pins: /* We get config+for those 664<10"li>10"   pinctrl_derange   665<10"li>10"   pinctrl_deENOTSUPP   666<10"li>10"6ef="drivers/pinctrl/pinctrl-u300.c#L659" id="L1067" class10"line" name="L667"> 667<10"li>10"7  u300_pmx_registgpio_configpinctrl_derange  u300_pmx_rgc
 668<10"li>10"8  pinctrl_devpinctrl_derange  u300_pmx_re debaseref=e+=sode=u300_pmx" rangeref">pinctrl_derange  u300_pmx_rbasehref="drivers/pinctrl/pinctrl-u300.c#L657" id="L1069" class10"line" name="L669"> 669<10"li>10"9  u300_pmx_rconfig
 670<10"li>10"l   671<10"li>10" hrefdrivers/pinctrl/pinctrl-u300.c#L658" id="L1072" class10"line" name="L672"> 672<10"li>10"2  u300_pmx_registe deconfigpinctrl_dev *pinctrl_dev="s="s
 673<10"li>10"3  pinctrl_dev 674<10"li>10"   u300_pmx_rconfig
 675<10"li>10"    676<10"li>10"6  pinctrl_dev *pinctrl_derange  pinctrl_declassmatch_gpio_rangeref=(code=virtbase" vpinctrl_dev 677<10"li>10"7  u300_pmx_rretref="drivers/pinctrl/pinctrl-u300.c#L676" id="L10"8" class10"line" name="L678"> 678<10"li>10"ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L1079" class10"line" name="L679"> 679<10"li>10"9  pinctrl_derange   680<10"li>10"l  pinctrl_deEINVALref="drivers/pinctrl/pinctrl-u300.c#L676" id="L1081" class10"line" name="L681"> 681<10"li>10" hrefdrivers/pinctrl/pinctrl-u300.c#L658" id="L1082" class10"line" name="L682"> 682<10"li>10"    * @pins: /* Note: none of of se configura#io s take any 683<10"li>10"3  u300_pmx_rretref=ef=sode=u300_pmx" ulassgpio_configu300_pmx_registgpio_configpinctrl_derange  u300_pmx_rgc
 684<10"li>10"   pinctrl_devpinctrl_derange  u300_pmx_re debaseref=e+=sode=u300_pmx" rangeref">pinctrl_derange  u300_pmx_rbasehref="drivers/pinctrl/pinctrl-u300.c#L669" id="L1085" class10"line" name="L685"> 685<10"li>10"   pinctrl_devu300_pmx_rconfig
 686<10"li>10"   u300_pmx_rretref==drivers/pinctrl/pinctrl-u300.c#L659" id="L1087" class10"line" name="L687"> 687<10"li>10"7  u300_pmx_rretref="drivers/pinctrl/pinctrl-u300.c#L676" id="L1088" class10 &A10 10"ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L1089" class10"line" name="L589"> 589<10"li>10"9   590<10"li>10"l   591<10"li>10" hrefdrivers/pinctrl/pinctrl-u300.c#L658" id="L1092" class10"line" name="L592"> 592<10"li>10"ref="static+href="+code=u300_pmx" 00.conf_obsref">u300_pmx_r00.conf_obs  u300_pmx_rclasseconf_obsref=ef="drivers/pinctrl/pinctrl-u300.c#L676" id="L1093" class10"line" name="L593"> 593<10"li>10"3  void u300_pmx_ris_genericref=ef=sode=u300_pmx" referef">u300_pmx_rrefe
 594<10"li>10"4  void u300_pmx_re deconfigu300_pmx_registe deconfig 595<10"li>10"5  void u300_pmx_re deconfigu300_pmx_registe deconfig 596<10"li>10"    597<10"li>10" hrefdrivers/pinctrl/pinctrl-u300.c#L669" id="L1098" class10"line" name="L598"> 598<10"li>10"ref="static+href="+code=u300_pmx" 00.a> *u300_pmx_r00.a> *u300_pmx_rclassers 599<10"li>10"9  void  5ref">u300_pmx_r"> 5ref=ef=sode=u300_pmx" DRIVER_NAMEref">u300_pmx_rDRIVER_NAMEref="drivers/pinctrl/pinctrl-u300.c#L669" id="L1100" class1100" e" name="L599"> 599<1100">110l  void u300_pmx_rprayref=ef=sode=u300_pmx" classeadsref">u300_pmx_rclasseadsref="drivers/pinctrl/pinctrl-u300.c#L669" id="L1101" class110line" name="L591"> 591<110li>1101  void u300_pmx_r"prayref=ef=sode=u300_pmx" ARRAY_SIZEref">u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" ulass=adsref">u300_pmx_rclasseadsref=="drivers/pinctrl/pinctrl-u300.c#L669" id="L1102" class110line" name="L592"> 592<110li>1102  void u300_pmx_r0="sobs   *u300_pmx_rclassec> * 593<110li>1103  void u300_pmx_r0rsobs  u300_pmx_registemxsobsref="drivers/pinctrl/pinctrl-u300.c#L669" id="L1104" class110line" name="L594"> 594<110li>1104  void u300_pmx_rconfobs  u300_pmx_rclasseconf_obsref="drivers/pinctrl/pinctrl-u300.c#L669" id="L1105" class110line" name="L595"> 595<110li>1105  void u300_pmx_rownerref=ef=sode=u300_pmx" THIS_MODULEref">u300_pmx_rTHIS_MODULEref="drivers/pinctrl/pinctrl-u300.c#L669" id="L1106" class110line" name="L596"> 596<110li>110    597<110li>110 hrefdrivers/pinctrl/pinctrl-u300.c#L669" id="L1108" class110line" name="L598"> 598<110li>110ref="static+out"code=u300_pmx" _u300_pmx_r_pinctrl_declassersu300_pmx_relatformpinctrl_dev="s
 599<110li>110 href"drivers/pinctrl/pinctrl-u300.c#L676" id="L1110" class11"line" name="L610"> 610<11"li>11"l  void pinctrl_declassersref="+code=pctl" clasu=rsref">u300_pmx_reershref"drivers/pinctrl/pinctrl-u300.c#L658" id="L11"1" class11"line" name="L611"> 611<11"li>1111  u300_pmx_rresource  u300_pmx_rres
 612<11"li>11"2  void u300_pmx_rspio_chib  u300_pmx_rspio_chib  pinctrl_dea hsgeteelatdataref=(&sode=u300_pmx" s="sref">pinctrl_dev="s
pinctrl_de="s
 613<11"li>11"3  void u300_pmx_rretref="drivers/pinctrl/pinctrl-u300.c#L676" id="L1114" class11"line" name="L614"> 614<11"li>111   u300_pmx_rihref"drivers/pinctrl/pinctrl-u300.c#L682" id="L11"5" class11"line" name="L615"> 615<11"li>11"    616<11"li>1116   * @pins: /* Create state holdl/p etc+for this nctrl/+ma href="drivers/pinctrl/pinctrl-u300.c#L675" id="L11"7" class11"line" name="L617"> 617<11"li>1117  u300_pmx_reershrefef=sode=u300_pmx" ="sm_kzallocref">u300_pmx_r="sm_kzallocref=(&sode=u300_pmx" s="sref">pinctrl_dev="s
pinctrl_de="s
u300_pmx_reershref)a+code=virtbase" GFP_KERNELref">pinctrl_deGFP_KERNEL
 618<11"li>1118  u300_pmx_reershref)drivers/pinctrl/pinctrl-u300.c#L669" id="L11"9" class11"line" name="L619"> 619<11"li>1119  pinctrl_deENOMEMhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L1120" class11"line" name="L620"> 620<11"li>11"lclasdrivers/pinctrl/pinctrl-u300.c#L682" id="L1121" class11"line" name="L621"> 621<11"li>1121  void u300_pmx_reershref-&g,
pinctrl_de="s
pinctrl_dev="s
pinctrl_de="s
 622<11"li>112ref="drivers/pinctrl/pinctrl-u300.c#L669" id="L11"3" class11"line" name="L623"> 623<11"li>1123  u300_pmx_rres
u300_pmx_rplatformpinctrl_dev="s
pinctrl_deIORESOURCE_MEM
 624<11"li>112   u300_pmx_rres
 625<11"li>112   pinctrl_deENOENT
 626<11"li>11"6  u300_pmx_reershref-&g,
u300_pmx_rehybase
u300_pmx_rres
u300_pmx_rstart
 627<11"li>11"7  u300_pmx_reershref-&g,
u300_pmx_rehysize
u300_pmx_rreyource_sizeref=(code=virtbase" reyref">u300_pmx_rres
 628<11"li>112ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L11"9" class11"line" name="L629"> 629<11"li>1129  pinctrl_derequest_memu300_pmx_reershref-&g,
u300_pmx_rehybase
u300_pmx_reershref-&g,
u300_pmx_rehysize
 630<11"li>1130  u300_pmx_rDRIVER_NAMEref=) =f=sode=u300_pmx" NULLref">pinctrl_deNULL   631<11"li>1131  u300_pmx_rretref=ef=-code=u300_pmx" ENOMEMref">pinctrl_deENOMEMhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L1132" class11"line" name="L632"> 632<11"li>1132  pinctrl_deout_no_memregio/href"drivers/pinctrl/pinctrl-u300.c#L682" id="L1133" class11"line" name="L633"> 633<11"li>1133   634<11"li>113    635<11"li>11"   u300_pmx_reershref-&g,
u300_pmx_rvirtbase
u300_pmx_rioremabref=(sode=u300_pmx" u=rsref">u300_pmx_reershref-&g,
u300_pmx_rehybase
u300_pmx_reershref-&g,
u300_pmx_rehysize
 636<11"li>113   u300_pmx_reershref-&g,
u300_pmx_rvirtbase
 637<11"li>1137  u300_pmx_rretref=ef=-code=u300_pmx" ENOMEMref">pinctrl_deENOMEMhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L1138" class11"line" name="L638"> 638<11"li>1138  u300_pmx_rout_no_remabhref"drivers/pinctrl/pinctrl-u300.c#L682" id="L1139" class11"line" name="L639"> 639<11"li>11"9  void  640<11"li>114lclasdrivers/pinctrl/pinctrl-u300.c#L682" id="L1141" class11"line" name="L641"> 641<11"li>1141  void u300_pmx_reershref-&g,
u300_pmx_r0="s
 *u300_pmx_rp0.a> *u300_pmx_rclasserspinctrl_dev="s
pinctrl_de="s
u300_pmx_reershref)"drivers/pinctrl/pinctrl-u300.c#L682" id="L11"2" class11"line" name="L642"> 642<11"li>1142  u300_pmx_reershref-&g,
u300_pmx_r0="s
 643<11"li>1143  u300_pmx_ra hserrref=(&sode=u300_pmx" s="sref">pinctrl_dev="s
pinctrl_de="s
"PIO SIM DAcould not register U" i),
 644<11"li>114   u300_pmx_rretref=ef=-code=u300_pmx" EINVALref">pinctrl_deEINVALref="drivers/pinctrl/pinctrl-u300.c#L676" id="L11"5" class11"line" name="L645"> 645<11"li>114   u300_pmx_rout_no_=rsref="drivers/pinctrl/pinctrl-u300.c#L676" id="L11"6" class11"line" name="L646"> 646<11"li>11"6   647<11"li>114 hrefdrivers/pinctrl/pinctrl-u300.c#L669" id="L11"8" class11"line" name="L648"> 648<11"li>1148   * @pins: /* We will handl  a range of GPIO /sps+ma href="drivers/pinctrl/pinctrl-u300.c#L675" id="L1149" class11"line" name="L639"> 639<114li>1149  u300_pmx_rihrefef=0;"code=u300_pmx" iref">u300_pmx_rihref <"code=u300_pmx" ARRAY_SIZEref">u300_pmx_rARRAY_SIZEref=(sode=u300_pmx" ulassgpio_rangeyref">u300_pmx_rulassgpio_rangey ha =;"code=u300_pmx" iref">u300_pmx_rihref++)+"drivers/pinctrl/pinctrl-u300.c#L675" id="L1150" class11"line" name="L650"> 650<11"li>11"l  u300_pmx_rulassgpio_rangey ha hcode=u300_pmx" iref">u300_pmx_rihref].code=u300_pmx" gcref">u300_pmx_rgc
u300_pmx_rspio_chib   651<11"li>11"1   *pinctrl_dev *u300_pmx_reershref-&g,
u300_pmx_r0="s
u300_pmx_rulassgpio_rangey ha hcode=u300_pmx" iref">u300_pmx_rihref])"drivers/pinctrl/pinctrl-u300.c#L682" id="L1152" class11"line" name="L652"> 652<11"li>11"2   653<11"li>115    654<11"li>115   pinctrl_deplatformpinctrl_dev="s
u300_pmx_reershref)"drivers/pinctrl/pinctrl-u300.c#L682" id="L1155" class11"line" name="L655"> 655<11"li>115    656<11"li>1156  u300_pmx_ra hsinforef=(&sode=u300_pmx" s="sref">pinctrl_dev="s
pinctrl_de="s
"PIO SIM DAinitialized U" i),
 657<11"li>115 hrefdrivers/pinctrl/pinctrl-u300.c#L669" id="L11"8" class11"line" name="L658"> 658<11"li>11"8   659<11"li>11"9   660<11"li>11"l  u300_pmx_rout_no_=rsref=:drivers/pinctrl/pinctrl-u300.c#L669" id="L1161" class11"line" name="L661"> 661<11"li>1161  void u300_pmx_riounmabref=(sode=u300_pmx" u=rsref">u300_pmx_reershref-&g,
u300_pmx_rvirtbase
 662<11"li>11"ref="code=u300_pmx" out_no_remabref">u300_pmx_rout_no_remabhref:drivers/pinctrl/pinctrl-u300.c#L669" id="L1163" class11"line" name="L663"> 663<11"li>1163  pinctrl_deplatformpinctrl_dev="s
pinctrl_deNULL   664<11"li>11"   pinctrl_deout_no_memregio/href:drivers/pinctrl/pinctrl-u300.c#L669" id="L1165" class11"line" name="L665"> 665<11"li>116   pinctrl_derelease_memu300_pmx_reershref-&g,
u300_pmx_rehybase
u300_pmx_reershref-&g,
u300_pmx_rehysize
 666<11"li>1166  u300_pmx_rretref="drivers/pinctrl/pinctrl-u300.c#L682" id="L1167" class11"line" name="L667"> 667<11"li>11"7   668<11"li>116ref="drivers/pinctrl/pinctrl-u300.c#L659" id="L1169" class11"line" name="L669"> 669<11"li>11"9  u300_pmx_r_pinctrl_declassersu300_pmx_relatformpinctrl_dev="s
 670<11"li>117l   671<11"li>1171  pinctrl_declassersref="+code=pctl" clasu=rsref">u300_pmx_reershrefef=sode=u300_pmx" platformpinctrl_deplatformpinctrl_dev="s
 672<11"li>117ref="drivers/pinctrl/pinctrl-u300.c#L669" id="L1173" class11"line" name="L673"> 673<11"li>1173  u300_pmx_rp0.a> *u300_pmx_reershref-&g,
u300_pmx_r0="s
 674<11"li>117   u300_pmx_riounmabref=(sode=u300_pmx" u=rsref">u300_pmx_reershref-&g,
u300_pmx_rvirtbase
 675<11"li>117   pinctrl_derelease_memu300_pmx_reershref-&g,
u300_pmx_rehybase
u300_pmx_reershref-&g,
u300_pmx_rehysize
 676<11"li>1176  pinctrl_deplatformpinctrl_dev="s
pinctrl_deNULL   677<11"li>117 hrefdrivers/pinctrl/pinctrl-u300.c#L669" id="L11"8" class11"line" name="L678"> 678<11"li>1178   679<11"li>11"9   680<11"li>118lclasdrivers/pinctrl/pinctrl-u300.c#L682" id="L1181" class11"line" name="L681"> 681<11"li>11" hrefstatic+href="+code=u300_pmx" 0latformu300_pmx_relatformu300_pmx_rclassers 682<11"li>1182  void u300_pmx_ractrl/hrefef="drivers/pinctrl/pinctrl-u300.c#L676" id="L1183" class11"line" name="L683"> 683<11"li>1183   5ref">u300_pmx_r"> 5ref=ef=sode=u300_pmx" DRIVER_NAMEref">u300_pmx_rDRIVER_NAMEref="drivers/pinctrl/pinctrl-u300.c#L669" id="L1184" class11"line" name="L684"> 684<11"li>11"   u300_pmx_rownerref=ef=sode=u300_pmx" THIS_MODULEref">u300_pmx_rTHIS_MODULEref="drivers/pinctrl/pinctrl-u300.c#L669" id="L1185" class11"line" name="L685"> 685<11"li>11"    686<11"li>11"   pinctrl_deproberef=ef=sode=u300_pmx" classerspinctrl_declassers 687<11"li>11"7  pinctrl_deremoveref=ef=sode=u300_pmx" _u300_pmx_r_pinctrl_declassers&A11 11"ref="="drivers/pinctrl/pinctrl-u300.c#L669" id="L1189" class11"line" name="L589"> 589<11"li>1189   590<11"li>11"l  u300_pmx_r_u300_pmx_rclassers 591<11"li>11" href"drivers/pinctrl/pinctrl-u300.c#L676" id="L1192" class11"line" name="L592"> 592<11"li>1192  u300_pmx_rplatformu300_pmx_rclassers 593<11"li>11"3  vo=drivers/pinctrl/pinctrl-u300.c#L669" id="L1194" class11"line" name="L594"> 594<11"li>119   u300_pmx_rarchu300_pmx_rclassers 595<11"li>119    596<11"li>11"   u300_pmx_r_u300_pmx_rclassers 597<11"li>11" href"drivers/pinctrl/pinctrl-u300.c#L676" id="L1198" class11"line" name="L598"> 598<11"li>1198  u300_pmx_rplatformu300_pmx_rclassers 599<11"li>1199   599<1200">120l  u300_pmx_rmoduleu300_pmx_rclassers 591<120li>120 hrefdrivers/pinctrl/pinctrl-u300.c#L658" id="L1202" class120line" name="L592"> 592<120li>120ref="code=u300_pmx" MODULE_AUTHORref">u300_pmx_rMODULE_AUTHORref=(s="string">"PIO SIM DALinus Walseij <linus.walseij@linaro.org&g,
an>),
 593<120li>1203  vocode=u300_pmx" MODULE_DESCRIPTIONref">u300_pmx_rMODULE_DESCRIPTIONref=(s="string">"PIO SIM DAU" i),
 594<120li>120   u300_pmx_rMODULE_LICENSEref=(s="string">"PIO SIM DAGPL v2an>),
 595<120li>1205  vo


The original LXR software by of +code=virthttp://yourceforge.net/projects/lxrr>LXR * @punity lxr@linux.no lxr.linux.no kindly hosted by code=virthttp://www.redpill-linpro.no">Redpill Linpro AS