linux/drivers/ide/ide-pci-generic.c
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   1/*
   2 *  Copyright (C) 2001-2002	    Andre Hedrick <andre@linux-ide.org>
   3 *  Portions (C) Copyright 2002	 Red Hat Inc
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of the GNU General Public License as published by the
   7 * Free Software Foundation; either version 2, or (at your option) any
   8 * later version.
   9 *
  11 * This program is distributed in the hope that it will be useful, but
  11 * WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13 * General Public License for more details.
  14 *
  15 * For the avoidance of doubt the "preferred form" of this code is one which
  16 * is in an open non patent encumbered format. Where cryptographic key signing
  17 * forms part of the process of creating an executable the information
  18 * including keys needed to generate an equivalently functional executable
  19 * are deemed to be part of the source code.
  21 */
  21
  22#include <linux/types.h>
  23#include <linux/module.h>
  24#include <linux/kernel.h>
  25#include <linux/pci.h>
  26#include <linux/ide.h>
  27#include <linux/init.h>
  28
  29#define DRV_NAME "ide_pci_generic"
  30
  31static bool ide_generic_all;            /* Set to claim all devices */
  32
  33module_param_named(all_generic_ide, ide_generic_all, bool, 0444);
  34MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE storage controllers.");
  35
  36static void netcell_quirkproc(ide_drive_t *drive)
  37{
  38        /* mark words 85-87 as valid */
  39        drive->id[ATA_ID_CSF_DEFAULT] |= 0x4000;
  40}
  41
  42static const struct ide_port_ops netcell_port_ops = {
  43        .quirkproc              = netcell_quirkproc,
  44};
  45
  46#define DECLARE_GENERIC_PCI_DEV(extra_flags) \
  47        { \
  48                .name           = DRV_NAME, \
  49                .host_flags     = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \
  50                                  extra_flags, \
  51                .swdma_mask     = ATA_SWDMA2, \
  52                .mwdma_mask     = ATA_MWDMA2, \
  53                .udma_mask      = ATA_UDMA6, \
  54        }
  55
  56static const struct ide_port_info generic_chipsets[] __devinitdata = {
  57        /*  0: Unknown */
  58        DECLARE_GENERIC_PCI_DEV(0),
  59
  60        {       /* 1: NS87410 */
  61                .name           = DRV_NAME,
  62                .enablebits     = { {0x43, 0x08, 0x08}, {0x47, 0x08, 0x08} },
  63                .host_flags     = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
  64                .swdma_mask     = ATA_SWDMA2,
  65                .mwdma_mask     = ATA_MWDMA2,
  66                .udma_mask      = ATA_UDMA6,
  67        },
  68
  69        /*  2: SAMURAI / HT6565 / HINT_IDE */
  70        DECLARE_GENERIC_PCI_DEV(0),
  71        /*  3: UM8673F / UM8886A / UM8886BF */
  72        DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_DMA),
  73        /*  4: VIA_IDE / OPTI621V / Piccolo010{2,3,5} */
  74        DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_AUTODMA),
  75
  76        {       /* 5: VIA8237SATA */
  77                .name           = DRV_NAME,
  78                .host_flags     = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
  79                                  IDE_HFLAG_OFF_BOARD,
  80                .swdma_mask     = ATA_SWDMA2,
  81                .mwdma_mask     = ATA_MWDMA2,
  82                .udma_mask      = ATA_UDMA6,
  83        },
  84
  85        {       /* 6: Revolution */
  86                .name           = DRV_NAME,
  87                .port_ops       = &netcell_port_ops,
  88                .host_flags     = IDE_HFLAG_CLEAR_SIMPLEX |
  89                                  IDE_HFLAG_TRUST_BIOS_FOR_DMA |
  90                                  IDE_HFLAG_OFF_BOARD,
  91                .swdma_mask     = ATA_SWDMA2,
  92                .mwdma_mask     = ATA_MWDMA2,
  93                .udma_mask      = ATA_UDMA6,
  94        }
  95};
  96
  97/**
  98 *      generic_init_one        -       called when a PIIX is found
  99 *      @dev: the generic device
 100 *      @id: the matching pci id
 101 *
 102 *      Called when the PCI registration layer (or the IDE initialization)
 103 *      finds a device matching our IDE device tables.
 104 */
 105
 106static int __devinit generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 107{
 108        const struct ide_port_info *d = &generic_chipsets[id->driver_data];
 109        int ret = -ENODEV;
 110
 111        /* Don't use the generic entry unless instructed to do so */
 112        if (id->driver_data == 0 && ide_generic_all == 0)
 113                        goto out;
 114
 115        switch (dev->vendor) {
 116        case PCI_VENDOR_ID_UMC:
 117                if (dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
 118                                !(PCI_FUNC(dev->devfn) & 1))
 119                        goto out; /* UM8886A/BF pair */
 120                break;
 121        case PCI_VENDOR_ID_OPTI:
 1122/a>                .< (dev->device == PCI_DEVICE_ID_UMTI &&
  212/a>                        go      !(PCI_FUNC(dev->devfn) & 1))
  212/a>                .<      goto out;   212/a>                .  212/a>        case PCI_VENDOR_ID_OPJMICRONa>:
  212/a>                if (dev->device ==!PCI_DEVICE_ID_UMJMICRONMJMB36 a> &&
  212/a>                                !( href="+code=PCI_FUNC" class="sref">PCI_FUNC(dev->devfn) &a!  212/a>                        goto out;   313/a>                break;
  313/a>        case PCI_VENDOR_ID_OPNSa>:
  313/a>                .< (dev->device == PCI_DEVICE_ID_UMNS_410 *a> &&
  313/a>                        go      !(a href="+code=dev" class="sref">dev->deass="a> &am;>"> 8)=!DRI_DECLASS_STORAGID_U a>)
  313/a>                .<      goto out;   313/a>                .  313/a>        ca  31{
a href="drivers/ide/ide-pci-generic.c#L951" id="L118" class="line" name="L381">  31        dev->vendor) =!PCI_VENDOR_ID_OPJMICRONa>:
{
  313/a>                   href="+code=udm1 class="sref">ATu    href="+code=deamenan class="sref">idamenan a>;   414/a>                br href="+code=pci_deak;dontefig_rds class="sref">pci_deak;dontefig_rds a>(dev-&IDI_DECOMMAN a>-&idamenan a>; 
  414/a>                .< (idamenan a>;  mp; IDI_DECOMMAN _IOa>; 
{
  414/a>                .<      br href="+code=pcirint class="sref">udirint a>(IDKERN_INFOa>    an class="string">"ID%s %s: skippg oudisles.d uot;
  414/a>                        go      !( an class="string">"IDntrollers.\nuot;
<d =gt;name  nai_deme" a>(dev-&)
>  314/a>                .<      goto out;   414/a>                .<  414/a>        ca  41        {  href="+code=ret" class="sref">ret = -< href="+code=ide_por_deit_one" class="sref">gee_por_deit_one" a>(dev-&d =d; 
  41   href="+code=out" class="sref">out;   41          turn fa href="+code=ret" class="sref">ret =  515/a>}
  515/a>
  515/a>static const struct pci_device_id *< href="+code=generic_chi_detb class="sref">idneric_chi_detb a>[  51          {a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCNSa>:
,     {  href="+code=reI_DEVICE_ID_UMNS_410 *class="lief">PCI_DEVICE_ID_UMNS_410 *a> &),     {           1,
  51        }
{a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCI_TECHa>:
,    href="+code=reI_DEVICE_ID_UMI_TECH_MURAI /D_U class="sref">DRI_DEVICE_ID_UMI_TECH_MURAI /D_U a> &),     { 2,
  5155a>        }
{a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCHOLTEKa>:
,    href="+code=reI_DEVICE_ID_UMHOLTEK_65 /class="sref">DRI_DEVICE_ID_UMHOLTEK_65 /a> &),     {        2,
  5156a>        }
{a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCC:
,    {  href="+code=reI_DEVICE_ID_UMC_UM8883F /class="sref">PCI_DEVICE_ID_UMC_UM8883F /a> &),     {        3,
  5157a>        }
{a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCC:
,    {  href="+code=reI_DEVICE_ID_UMC_UM8886A" class="sref">PCI_DEVICE_ID_UMC_UM8886A &),     {        3,
  51        PCI_VENVICE_Ia>(PCC:
,    {  href="+code=reI_DEVICE_ID_UMC_UM8886A"B/class="sref">PCI_DEVICE_ID_UMC_UM8886A"B/a> &),     {       3,
  5159a>        }
{a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(ATHIN a>:
,    { href="+code=reI_DEVICE_ID_UMHT_IDVXPROI/D_U class="sref">DRI_DEVICE_ID_UMHT_IDVXPROI/D_U a> &),     {   2,
  61        {    href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCVI a>:
,    {  href="+code=reI_DEVICE_ID_UMA_ID82C5" class="lief">DRI_DEVICE_ID_UMA_ID82C5" a> &),     {         4,
  61             href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCTI:
,    { href="+code=reI_DEVICE_ID_UMTIPCI_DEVICE_ID_UMTI &),     {        4,
  616/a>#incfdef{ href="+code=reCONFIG_BLKEVICD_U _TA *class="lief">PCCONFIG_BLKEVICD_U _TA *a>
  616/a>          {a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCVI a>:
,    {  href="+code=reI_DEVICE_ID_UMA_ID8237_TA *class="lief">PCI_DEVICE_ID_UMA_ID8237_TA *a> &),     {      5,
  61  #endifa href="drivers/ide/ide-pci-generic.c#L841" id="L451" class="line" name="L651">  6165a>        }
{a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCTOSHIB*a>:
,   href="+code=reI_DEVICE_ID_UMTOSHIB*_PICCOLO_ class="lief">DRI_DEVICE_ID_UMTOSHIB*_PICCOLO_ a> &),     {  4,
>  5166a>        }
{a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCTOSHIB*a>:
,   href="+code=reI_DEVICE_ID_UMTOSHIB*_PICCOLO_ class="sref">ATI_DEVICE_ID_UMTOSHIB*_PICCOLO_ a> &),     {  4,
  6167a>        }
{a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(PCTOSHIB*a>:
,   href="+code=reI_DEVICE_ID_UMTOSHIB*_PICCOLO_3class="sref">ATI_DEVICE_ID_UMTOSHIB*_PICCOLO_3a> &),     {  4,
  616/a>        PCI_VENVICE_Ia>(PCTOSHIB*a>:
,   href="+code=reI_DEVICE_ID_UMTOSHIB*_PICCOLO_/class="sref">DRI_DEVICE_ID_UMTOSHIB*_PICCOLO_/a> &),     {  4,
  6169a>        }
{a href="+code=PCI_DENVICE_Iclass="sref">PCI_VENVICE_Ia>(d:
,   href="+code=reI_DEVICE_ID_UMREVOLUTIONclass="sref">PCI_VEVICE_ID_UMREVOLUTIONa> &),     {         6,
  71        /*
  717/a> *<<<<<<<<<* Must mmee ss=t.  Ifou caaddntry iesaadjustspan>
  717/a> * <<<<<<<<* is coble thandeneric_inipsets
  717/a> * <<<<<<<<*/span>
  717/a>        }
{a href="+code=PCI_DEANYD_Uclass="sref">PCI_VEANYD_Ua>-&PCI_VEANYD_Ua>-&PCI_VEANYD_Ua>-&PCI_VEANYD_Ua>-&DRI_DECLASS_STORAGID_U a>)
lt;  7175a>        }
{a0,,
  71  
>  61   href="+code=boDULE_PAVICE_IDTABL class="sref">DRDULE_PAVICE_IDTABL a>(pci_da>-&idneric_chi_detb a>[<
  717/a>
  71  atic coruct pci_devvers/a> *< href="+code=generic_chi_devvers/class="sref">pcneric_chi_devvers/a> = -<  81          a href="+code=name" class="sref">name           = "IDI_DE_U uot;
<  81          a href="+code=naid_ble tclass="sref">gee__bleidneric_chi_detb a>[<  81          a href="+code=porrob class="sref">nairob a>           =&a href="+code=boneric_chit_one" class="sref">generic_init_one(s  81        },a href="+code=poremo" class="sref">drremo" a>           -< href="+code=ide_por_deremo" class="sref">dre_por_deremo" a>(s  8184a>        },a href="+code=posuspen class="sref">idsuspen a>        },-< href="+code=ide_por_desuspen class="sref">ide_por_desuspen a>(s  81        { a href="+code=poresu" class="sref">naresu" a>           -< href="+code=ide_por_deresu" class="sref">nae_por_deresu" a>(s  818/a>  
  818/a>{
a href="drivers/ide/ide-pci-generic.c#L951" id="L881" class="line" name="L881">  81  atic int __deit __neric_ini_poit" a>(  81    91          turn fa href="+code=ree_por_derestra_datvers/class="sref">pce_por_derestra_datvers/a>(pcneric_chi_devvers/a> =
  91    919/a>
  91  atic void __deex" a> __neric_ini_poex" a>(  91    919/a>        {  href="+code=idi_deunrestra_datvers/class="sref">pci_deunrestra_datvers/a>(pcneric_chi_devvers/a> =
  91
<  919/a>{
a href="drivers/ide/ide-pci-generic.c#L951" id="L981" class="line" name="L981">  919/a>   href="+code=oudule_pait" class="sref">__dule_pait" a>(__neric_ini_poit" a>(<
  91__dule_paex" a>(__neric_ini_poex" a>(<
 1020/a>
 102DRDULE_PAAUTHORa>("IDAndre Heiveckuot;);
 102PCDULE_PAVISCRIPTIONa>("IDI reivers/ dule_p foreneric enI IDE suot;);
 102DRDULE_PALICENS a>("IDGPLuot;);
 102


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