linux/drivers/edac/edac_pci.c
<<
lue=.12/spa2.6 .12/form.6 .12a lue=.1 href="../linux+v3 9/drivers/edac/edac_pci.c">lue=.12img src="../.static/gfx/right.png" alt=">>">lu2/spa2.6lu2spa2 class="lxr_search">lue=lue=.12input typ3 hidden" nam3 navtarget" n> 3 ">lue=.12input typ3 text" nam3 search" id search">lue=.12butttiotyp3 submit">Searchlue=.1Prefs6 .12/a>lu2/spa2.6e=.1 12/div.6e=.1 12form ac v2="ajax+*" method="post" onsubmit="return false;">lu2input typ3 hidden" nam3 ajax_lookup" id ajax_lookup" n> 3 ">le=.1 12/form.6le=.1 12div class="headingbotttm">6 2div id file_contents".
1 112/a>2spa2 class="comment">/*2/spa2.61 122/a>2spa2 class="comment"> * EDAC PCI component2/spa2.61 132/a>2spa2 class="comment"> *2/spa2.61 142/a>2spa2 class="comment"> * Author: Dave Jiang <djiang@mvista.com>2/spa2.61 152/a>2spa2 class="comment"> *2/spa2.61 162/a>2spa2 class="comment"> * 2007 (c) MontaVista Software, Inc. This file is licensed under2/spa2.61 172/a>2spa2 class="comment"> * the terms of the GNU General Public License versptio2. This program2/spa2.61 182/a>2spa2 class="comment"> * is licensed "as is" without any warranty of any kind, whether express2/spa2.61 192/a>2spa2 class="comment"> * or implied.2/spa2.61 10"
a>2spa2 class="comment"> *2/spa2.61 112/a>2spa2 class="comment"> */2/spa2.61 122/a>#include <linux/module.h2/a>>61 132/a>#include <linux/typ3s.h2/a>>61 142/a>#include <linux/smp.h2/a>>61 152/a>#include <linux/init.h2/a>>61 162/a>#include <linux/sysctl.h2/a>>61 172/a>#include <linux/highmem.h2/a>>61 182/a>#include <linux/timer.h2/a>>61 192/a>#include <linux/slab.h2/a>>61 202/a>#include <linux/spinlock.h2/a>>61 212/a>#include <linux/list.h2/a>>61 222/a>#include <linux/ctyp3.h2/a>>61 232/a>#include <linux/workqueu3.h2/a>>61 242/a>#include <asm/uaccess.h2/a>>61 252/a>#include <asm/page.h2/a>>61 262/a>61 272/a>#include "edac_cor3.h2/a>"61 282/a>#include "edac_module.h2/a>"61 292/a>61 302/a>static12a href="+code=DEFINE_MUTEX" class="sref">DEFINE_MUTEX2/a>(2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);61 312/a>static12a href="+code=LIST_HEAD" class="sref">LIST_HEAD2/a>(2a href="+code=edac_pci_list" class="sref">edac_pci_list2/a>);61 322/a>static12a href="+code=atomic_t" class="sref">atomic_t2/a>12a href="+code=pci_indexes" class="sref">pci_indexes2/a>1=12a href="+code=ATOMIC_INIT" class="sref">ATOMIC_INIT2/a>(0);61 332/a>61 342/a>2spa2 class="comment">/*2/spa2.61 352/a>2spa2 class="comment"> * edac_pci_alloc_ctl_info2/spa2.61 362/a>2spa2 class="comment"> *2/spa2.61 372/a>2spa2 class="comment"> *      The alloc() func  v2 for the 'edac_pci' control info2/spa2.61 382/a>2spa2 class="comment"> *      structur3. The chip driver will allocate one of these for each1 392/a>2spa2 class="comment"> *      edac_pci it is going to control/register with the EDAC CORE.2/spa2.61 40"
a>2spa2 class="comment"> */2/spa2.61 412/a>struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=edac_pci_alloc_ctl_info" class="sref">edac_pci_alloc_ctl_info2/a>(unsigned int12a href="+code=sz_pvt" class="sref">sz_pvt2/a>,61 422/a>                                                const char *2a href="+code=edac_pci_nam3" class="sref">edac_pci_nam32/a>)61 432/a>{61 442/a>        struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>;61 452/a>        void *2a href="+code=p" class="sref">p2/a>1=12a href="+code=NULL" class="sref">NULL2/a>, *2a href="+code=pvt" class="sref">pvt2/a>;61 462/a>        unsigned int12a href="+code=siz3" class="sref">siz32/a>;61 472/a>61 482/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(1, 2spa2 class="string">"\n"1 492/a>61 502/a>        2a href="+code=pci" class="sref">pci2/a>1=12a href="+code=edac_align_ptr" class="sref">edac_align_ptr2/a>(&2a href="+code=p" class="sref">p2/a>, siz3of(*2a href="+code=pci" class="sref">pci2/a>), 1);61 512/a>        2a href="+code=pvt" class="sref">pvt2/a>1=12a href="+code=edac_align_ptr" class="sref">edac_align_ptr2/a>(&2a href="+code=p" class="sref">p2/a>, 1, 2a href="+code=sz_pvt" class="sref">sz_pvt2/a>);61 522/a>        2a href="+code=siz3" class="sref">siz32/a>1=1((unsigned long)2a href="+code=pvt" class="sref">pvt2/a>) + 2a href="+code=sz_pvt" class="sref">sz_pvt2/a>;61 532/a>61 542/a>        2spa2 class="comment">/* Alloc the needed control struct1memory */2/spa2.61 552/a>        2a href="+code=pci" class="sref">pci2/a>1=12a href="+code=kzalloc" class="sref">kzalloc2/a>(2a href="+code=siz3" class="sref">siz32/a>, 2a href="+code=GFP_KERNEL" class="sref">GFP_KERNEL2/a>);61 562/a>        if (2a href="+code=pci" class="sref">pci2/a>1 ==12a href="+code=NULL" class="sref">NULL2/a>)61 572/a>                return 2a href="+code=NULL" class="sref">NULL2/a>;61 582/a>61 592/a>        2spa2 class="comment">/* Now much private space */2/spa2.61 602/a>        2a href="+code=pvt" class="sref">pvt2/a>1=12a href="+code=sz_pvt" class="sref">sz_pvt2/a> ?1((char *)2a href="+code=pci" class="sref">pci2/a>) + ((unsigned long)2a href="+code=pvt" class="sref">pvt2/a>) : 2a href="+code=NULL" class="sref">NULL2/a>;61 612/a>61 622/a>        2a href="+code=pci" class="sref">pci2/a>->2a href="+code=pvt_info" class="sref">pvt_info2/a>1=12a href="+code=pvt" class="sref">pvt2/a>;61 632/a>        2a href="+code=pci" class="sref">pci2/a>->2a href="+code=op_stat3" class="sref">op_stat32/a>1=12a href="+code=OP_ALLOC" class="sref">OP_ALLOC2/a>;61 642/a>61 652/a>        2a href="+code=snprintf" class="sref">snprintf2/a>(2a href="+code=pci" class="sref">pci2/a>->2a href="+code=nam3" class="sref">nam32/a>, 2a href="+code=strlen" class="sref">strlen2/a>(2a href="+code=edac_pci_nam3" class="sref">edac_pci_nam32/a>) + 1, 2spa2 class="string">"%s"edac_pci_nam32/a>);61 662/a>61 672/a>        return 2a href="+code=pci" class="sref">pci2/a>;61 682/a>}61 692/a>2a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL2/a>(2a href="+code=edac_pci_alloc_ctl_info" class="sref">edac_pci_alloc_ctl_info2/a>);61 702/a>61 712/a>2spa2 class="comment">/*2/spa2.61 722/a>2spa2 class="comment"> * edac_pci_free_ctl_info()2/spa2.61 732/a>2spa2 class="comment"> *2/spa2.61 742/a>2spa2 class="comment"> *      Last ac  v2 tiothe pci control structur3.2/spa2.61 752/a>2spa2 class="comment"> *2/spa2.61 762/a>2spa2 class="comment"> *      callothe remove sysfs informa  v2, which will unregister2/spa2.61 772/a>2spa2 class="comment"> *      this control struct's kobj. Wheiothat kobj's ref count2/spa2.61 782/a>2spa2 class="comment"> *      goes to zero, its release func  v2 will be calloandothen2/spa2.61 792/a>2spa2 class="comment"> *      kfree()othe memory.2/spa2.61 80"
a>2spa2 class="comment"> */2/spa2.61 812/a>void 2a href="+code=edac_pci_free_ctl_info" class="sref">edac_pci_free_ctl_info2/a>(struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>)61 822/a>{61 832/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(1, 2spa2 class="string">"\n"1 842/a>61 852/a>        2a href="+code=edac_pci_remove_sysfs" class="sref">edac_pci_remove_sysfs2/a>(2a href="+code=pci" class="sref">pci2/a>);61 862/a>}61 872/a>2a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL2/a>(2a href="+code=edac_pci_free_ctl_info" class="sref">edac_pci_free_ctl_info2/a>);61 882/a>61 892/a>2spa2 class="comment">/*2/spa2.61 90"
a>2spa2 class="comment"> * find_edac_pci_by_dev()2/spa2.61 912/a>2spa2 class="comment"> *      scansothe edac_pci list for a specific 'struct1device *'2/spa2.61 922/a>2spa2 class="comment"> *2/spa2.61 932/a>2spa2 class="comment"> *      return NULL if not found, or return control struct1pointer2/spa2.61 942/a>2spa2 class="comment"> */2/spa2.61 952/a>static1struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=find_edac_pci_by_dev" class="sref">find_edac_pci_by_dev2/a>(struct12a href="+code=device" class="sref">device2/a> *2a href="+code=dev" class="sref">dev2/a>)61 962/a>{61 972/a>        struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>;61 982/a>        struct12a href="+code=list_head" class="sref">list_head2/a> *2a href="+code=item" class="sref">item2/a>;61 992/a>611002/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(1, 2spa2 class="string">"\n"11012/a>611022/a>        2a href="+code=list_for_each" class="sref">list_for_each2/a>(2a href="+code=item" class="sref">item2/a>, &2a href="+code=edac_pci_list" class="sref">edac_pci_list2/a>) {611032/a>                2a href="+code=pci" class="sref">pci2/a>1=12a href="+code=list_entry" class="sref">list_entry2/a>(2a href="+code=item" class="sref">item2/a>, struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a>, 2a href="+code=link" class="sref">link2/a>);611042/a>611052/a>                if (2a href="+code=pci" class="sref">pci2/a>->2a href="+code=dev" class="sref">dev2/a> ==12a href="+code=dev" class="sref">dev2/a>)611062/a>                        return 2a href="+code=pci" class="sref">pci2/a>;611072/a>        }611082/a>611092/a>        return 2a href="+code=NULL" class="sref">NULL2/a>;61110"
a>}611112/a>611122/a>2spa2 class="comment">/*2/spa2.611132/a>2spa2 class="comment"> * add_edac_pci_to_global_list2/spa2.611142/a>2spa2 class="comment"> *      Before calling this func  v2, caller must assign a unique n>
 3 to2/spa2.611152/a>2spa2 class="comment"> *      edac_dev->pci_idx.2/spa2.611162/a>2spa2 class="comment"> *      Return:2/spa2.611172/a>2spa2 class="comment"> *              0 tiosuccess2/spa2.611182/a>2spa2 class="comment"> *              1 tiofailure2/spa2.611192/a>2spa2 class="comment"> */2/spa2.611202/a>static1int12a href="+code=add_edac_pci_to_global_list" class="sref">add_edac_pci_to_global_list2/a>(struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>)611212/a>{611222/a>        struct12a href="+code=list_head" class="sref">list_head2/a> *2a href="+code=item" class="sref">item2/a>, *2a href="+code=insert_before" class="sref">insert_before2/a>;611232/a>        struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=rover" class="sref">rover2/a>;611242/a>611252/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(1, 2spa2 class="string">"\n"11262/a>611272/a>        2a href="+code=insert_before" class="sref">insert_before2/a>1=1&2a href="+code=edac_pci_list" class="sref">edac_pci_list2/a>;611282/a>611292/a>        2spa2 class="comment">/* Determine if already tiothe list */2/spa2.611302/a>        2a href="+code=rover" class="sref">rover2/a>1=12a href="+code=find_edac_pci_by_dev" class="sref">find_edac_pci_by_dev2/a>(2a href="+code=pci" class="sref">pci2/a>->2a href="+code=dev" class="sref">dev2/a>);611312/a>        if (2a href="+code=unlikely" class="sref">unlikely2/a>(2a href="+code=rover" class="sref">rover2/a>1!=12a href="+code=NULL" class="sref">NULL2/a>))611322/a>                goto12a href="+code=fail0" class="sref">fail02/a>;611332/a>611342/a>        2spa2 class="comment">/* Insert1in ascending order by 'pci_idx', so find posi  v2 */2/spa2.611352/a>        2a href="+code=list_for_each" class="sref">list_for_each2/a>(2a href="+code=item" class="sref">item2/a>, &2a href="+code=edac_pci_list" class="sref">edac_pci_list2/a>) {611362/a>                2a href="+code=rover" class="sref">rover2/a>1=12a href="+code=list_entry" class="sref">list_entry2/a>(2a href="+code=item" class="sref">item2/a>, struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a>, 2a href="+code=link" class="sref">link2/a>);611372/a>611382/a>                if (2a href="+code=rover" class="sref">rover2/a>->2a href="+code=pci_idx" class="sref">pci_idx2/a> >=12a href="+code=pci" class="sref">pci2/a>->2a href="+code=pci_idx" class="sref">pci_idx2/a>) {611392/a>                        if (2a href="+code=unlikely" class="sref">unlikely2/a>(2a href="+code=rover" class="sref">rover2/a>->2a href="+code=pci_idx" class="sref">pci_idx2/a> ==12a href="+code=pci" class="sref">pci2/a>->2a href="+code=pci_idx" class="sref">pci_idx2/a>))611402/a>                                goto12a href="+code=fail1" class="sref">fail12/a>;611412/a>611422/a>                        2a href="+code=insert_before" class="sref">insert_before2/a>1=12a href="+code=item" class="sref">item2/a>;611432/a>                        break;611442/a>                }611452/a>        }611462/a>611472/a>        2a href="+code=list_add_tail_rcu" class="sref">list_add_tail_rcu2/a>(&2a href="+code=pci" class="sref">pci2/a>->2a href="+code=link" class="sref">link2/a>, 2a href="+code=insert_before" class="sref">insert_before2/a>);611482/a>        return 0;611492/a>611502/a>2a href="+code=fail0" class="sref">fail02/a>:611512/a>        2a href="+code=edac_printk" class="sref">edac_printk2/a>(2a href="+code=KERN_WARNING" class="sref">KERN_WARNING2/a>, 2a href="+code=EDAC_PCI" class="sref">EDAC_PCI2/a>,611522/a>                2spa2 class="string">"%s (%s) %s %s already assigned %d\n"11532/a>                2a href="+code=dev_nam3" class="sref">dev_nam32/a>(2a href="+code=rover" class="sref">rover2/a>->2a href="+code=dev" class="sref">dev2/a>), 2a href="+code=edac_dev_nam3" class="sref">edac_dev_nam32/a>(2a href="+code=rover" class="sref">rover2/a>),611542/a>                2a href="+code=rover" class="sref">rover2/a>->2a href="+code=mod_nam3" class="sref">mod_nam32/a>, 2a href="+code=rover" class="sref">rover2/a>->2a href="+code=ctl_nam3" class="sref">ctl_nam32/a>, 2a href="+code=rover" class="sref">rover2/a>->2a href="+code=pci_idx" class="sref">pci_idx2/a>);611552/a>        return 1;611562/a>611572/a>2a href="+code=fail1" class="sref">fail12/a>:611582/a>        2a href="+code=edac_printk" class="sref">edac_printk2/a>(2a href="+code=KERN_WARNING" class="sref">KERN_WARNING2/a>, 2a href="+code=EDAC_PCI" class="sref">EDAC_PCI2/a>,611592/a>                2spa2 class="string">"but1in low-level driver: attempt to assign\n"11602/a>                2spa2 class="string">"\tduplicate pci_idx %d1in %s()\n"rover2/a>->2a href="+code=pci_idx" class="sref">pci_idx2/a>,611612/a>                2a href="+code=__func__" class="sref">__func__2/a>);611622/a>        return 1;611632/a>}611642/a>611652/a>2spa2 class="comment">/*2/spa2.611662/a>2spa2 class="comment"> * del_edac_pci_from_global_list2/spa2.611672/a>2spa2 class="comment"> *2/spa2.611682/a>2spa2 class="comment"> *      remove the PCI control struct1from the global list2/spa2.611692/a>2spa2 class="comment"> */2/spa2.611702/a>static1void 2a href="+code=del_edac_pci_from_global_list" class="sref">del_edac_pci_from_global_list2/a>(struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>)611712/a>{611722/a>        2a href="+code=list_del_rcu" class="sref">list_del_rcu2/a>(&2a href="+code=pci" class="sref">pci2/a>->2a href="+code=link" class="sref">link2/a>);611732/a>611742/a>        2spa2 class="comment">/* these are for safe removal of1devices1from global list while2/spa2.611752/a>2spa2 class="comment">         * NMI handlers may be traversing list2/spa2.611762/a>2spa2 class="comment">         */2/spa2.611772/a>        2a href="+code=synchronize_rcu" class="sref">synchronize_rcu2/a>();611782/a>        2a href="+code=INIT_LIST_HEAD" class="sref">INIT_LIST_HEAD2/a>(&2a href="+code=pci" class="sref">pci2/a>->2a href="+code=link" class="sref">link2/a>);611792/a>}611802/a>611812/a>#if 0611822/a>2spa2 class="comment">/* Older code, but1might use iiothe futur3 */2/spa2.611832/a>611842/a>2spa2 class="comment">/*2/spa2.611852/a>2spa2 class="comment"> * edac_pci_find()2/spa2.611862/a>2spa2 class="comment"> *      Search for an edac_pci_ctl_info structur3 whose iidex is 'idx'2/spa2.611872/a>2spa2 class="comment"> *2/spa2.611882/a>2spa2 class="comment"> * If found, return a1pointer to the structur32/spa2.611892/a>2spa2 class="comment"> * Else return NULL.2/spa2.61190"
a>2spa2 class="comment"> *2/spa2.611912/a>2spa2 class="comment"> * Caller must hold pci_ctls_mutex.2/spa2.611922/a>2spa2 class="comment"> */2/spa2.611932/a>struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=edac_pci_find" class="sref">edac_pci_find2/a>(int12a href="+code=idx" class="sref">idx2/a>)611942/a>{611952/a>        struct12a href="+code=list_head" class="sref">list_head2/a> *2a href="+code=item" class="sref">item2/a>;611962/a>        struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>;611972/a>611982/a>        2spa2 class="comment">/* Iterage over list, looking for exact1match of1ID */2/spa2.611992/a>        2a href="+code=list_for_each" class="sref">list_for_each2/a>(2a href="+code=item" class="sref">item2/a>, &2a href="+code=edac_pci_list" class="sref">edac_pci_list2/a>) {612002/a>                2a href="+code=pci" class="sref">pci2/a>1=12a href="+code=list_entry" class="sref">list_entry2/a>(2a href="+code=item" class="sref">item2/a>, struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a>, 2a href="+code=link" class="sref">link2/a>);612012/a>612022/a>                if (2a href="+code=pci" class="sref">pci2/a>->2a href="+code=pci_idx" class="sref">pci_idx2/a> >=12a href="+code=idx" class="sref">idx2/a>) {612032/a>                        if (2a href="+code=pci" class="sref">pci2/a>->2a href="+code=pci_idx" class="sref">pci_idx2/a> ==12a href="+code=idx" class="sref">idx2/a>)612042/a>                                return 2a href="+code=pci" class="sref">pci2/a>;612052/a>612062/a>                        2spa2 class="comment">/* not on list, so terminate early */2/spa2.612072/a>                        break;612082/a>                }612092/a>        }612102/a>612112/a>        return 2a href="+code=NULL" class="sref">NULL2/a>;612122/a>}612132/a>2a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL2/a>(2a href="+code=edac_pci_find" class="sref">edac_pci_find2/a>);612142/a>#endif612152/a>612162/a>2spa2 class="comment">/*2/spa2.612172/a>2spa2 class="comment"> * edac_pci_workq_func  v2()2/spa2.612182/a>2spa2 class="comment"> *2/spa2.612192/a>2spa2 class="comment"> *      periodic func  v2 that performsothe opera  v22/spa2.61220"
a>2spa2 class="comment"> *      scheduled by a workq request, for a given PCI control struct2/spa2.612212/a>2spa2 class="comment"> */2/spa2.612222/a>static1void 2a href="+code=edac_pci_workq_func  v2" class="sref">edac_pci_workq_func  v22/a>(struct12a href="+code=work_struct" class="sref">work_struct2/a> *2a href="+code=work_req" class="sref">work_req2/a>)612232/a>{612242/a>        struct12a href="+code=delayed_work" class="sref">delayed_work2/a> *2a href="+code=d_work" class="sref">d_work2/a> =12a href="+code=to_delayed_work" class="sref">to_delayed_work2/a>(2a href="+code=work_req" class="sref">work_req2/a>);612252/a>        struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a> =12a href="+code=to_edac_pci_ctl_work" class="sref">to_edac_pci_ctl_work2/a>(2a href="+code=d_work" class="sref">d_work2/a>);612262/a>        int12a href="+code=msec" class="sref">msec2/a>;612272/a>        unsigned long12a href="+code=delay" class="sref">delay2/a>;612282/a>612292/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(3, 2spa2 class="string">"checking\n"12302/a>612312/a>        2a href="+code=mutex_lock" class="sref">mutex_lock2/a>(&2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);612322/a>612332/a>        if (2a href="+code=pci" class="sref">pci2/a>->2a href="+code=op_stat3" class="sref">op_stat32/a>1==12a href="+code=OP_RUNNING_POLL" class="sref">OP_RUNNING_POLL2/a>) {612342/a>                2spa2 class="comment">/* we1might be iioPOLL mode, but1there may NOT be a1poll func2/spa2.612352/a>2spa2 class="comment">                 */2/spa2.612362/a>                if ((2a href="+code=pci" class="sref">pci2/a>->2a href="+code=edac_check" class="sref">edac_check2/a> !=12a href="+code=NULL" class="sref">NULL2/a>) &&12a href="+code=edac_pci_get_check_errors" class="sref">edac_pci_get_check_errors2/a>())612372/a>                        2a href="+code=pci" class="sref">pci2/a>->2a href="+code=edac_check" class="sref">edac_check2/a>(2a href="+code=pci" class="sref">pci2/a>);612382/a>612392/a>                2spa2 class="comment">/* if we are on a1one second period,othen use round */2/spa2.612402/a>                2a href="+code=msec" class="sref">msec2/a>1=12a href="+code=edac_pci_get_poll_msec" class="sref">edac_pci_get_poll_msec2/a>();612412/a>                if (2a href="+code=msec" class="sref">msec2/a>1==11000)612422/a>                        2a href="+code=delay" class="sref">delay2/a>1=12a href="+code=round_jiffies_relativ3" class="sref">round_jiffies_relativ32/a>(2a href="+code=msecs_to_jiffies" class="sref">msecs_to_jiffies2/a>(2a href="+code=msec" class="sref">msec2/a>));612432/a>                else612442/a>                        2a href="+code=delay" class="sref">delay2/a>1=12a href="+code=msecs_to_jiffies" class="sref">msecs_to_jiffies2/a>(2a href="+code=msec" class="sref">msec2/a>);612452/a>612462/a>                2spa2 class="comment">/* Reschedule1only if we are iioPOLL mode */2/spa2.612472/a>                2a href="+code=queue_delayed_work" class="sref">queue_delayed_work2/a>(2a href="+code=edac_workqueue" class="sref">edac_workqueue2/a>, &2a href="+code=pci" class="sref">pci2/a>->2a href="+code=work" class="sref">work2/a>, 2a href="+code=delay" class="sref">delay2/a>);612482/a>        }612492/a>612502/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);612512/a>}612522/a>612532/a>2spa2 class="comment">/*2/spa2.612542/a>2spa2 class="comment"> * edac_pci_workq_setup()2/spa2.612552/a>2spa2 class="comment"> *      initialize a workq item for this edac_pci instanc32/spa2.612562/a>2spa2 class="comment"> *      passing iiothe new delay period iiomsec2/spa2.612572/a>2spa2 class="comment"> *2/spa2.612582/a>2spa2 class="comment"> *      locking model:2/spa2.612592/a>2spa2 class="comment"> *              called when 'edac_pci_ctls_mutex' is locked2/spa2.61260"
a>2spa2 class="comment"> */2/spa2.612612/a>static1void 2a href="+code=edac_pci_workq_setup" class="sref">edac_pci_workq_setup2/a>(struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>,612622/a>                                 unsigned int12a href="+code=msec" class="sref">msec2/a>)612632/a>{612642/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(0, 2spa2 class="string">"\n"12652/a>612662/a>        2a href="+code=INIT_DELAYED_WORK" class="sref">INIT_DELAYED_WORK2/a>(&2a href="+code=pci" class="sref">pci2/a>->2a href="+code=work" class="sref">work2/a>, 2a href="+code=edac_pci_workq_func  v2" class="sref">edac_pci_workq_func  v22/a>);612672/a>        2a href="+code=queue_delayed_work" class="sref">queue_delayed_work2/a>(2a href="+code=edac_workqueue" class="sref">edac_workqueue2/a>, &2a href="+code=pci" class="sref">pci2/a>->2a href="+code=work" class="sref">work2/a>,612682/a>                        2a href="+code=msecs_to_jiffies" class="sref">msecs_to_jiffies2/a>(2a href="+code=edac_pci_get_poll_msec" class="sref">edac_pci_get_poll_msec2/a>()));612692/a>}612702/a>612712/a>2spa2 class="comment">/*2/spa2.612722/a>2spa2 class="comment"> * edac_pci_workq_teardow2()2/spa2.612732/a>2spa2 class="comment"> *      stopothe workq processing on this edac_pci instanc32/spa2.612742/a>2spa2 class="comment"> */2/spa2.612752/a>static1void 2a href="+code=edac_pci_workq_teardow2" class="sref">edac_pci_workq_teardow22/a>(struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>)612762/a>{612772/a>        int12a href="+code=status" class="sref">status2/a>;612782/a>612792/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(0, 2spa2 class="string">"\n"12802/a>612812/a>        2a href="+code=status" class="sref">status2/a>1=12a href="+code=canc3l_delayed_work" class="sref">canc3l_delayed_work2/a>(&2a href="+code=pci" class="sref">pci2/a>->2a href="+code=work" class="sref">work2/a>);612822/a>        if (2a href="+code=status" class="sref">status2/a>1== 0)612832/a>                2a href="+code=flush_workqueue" class="sref">flush_workqueue2/a>(2a href="+code=edac_workqueue" class="sref">edac_workqueue2/a>);612842/a>}612852/a>612862/a>2spa2 class="comment">/*2/spa2.612872/a>2spa2 class="comment"> * edac_pci_reset_delay_period2/spa2.612882/a>2spa2 class="comment"> *2/spa2.612892/a>2spa2 class="comment"> *      called with a new period n>
 3 for the workq period2/spa2.61290"
a>2spa2 class="comment"> *      a) stopocurrent workq timer2/spa2.612912/a>2spa2 class="comment"> *      b) restart workq timer with new n>
 32/spa2.612922/a>2spa2 class="comment"> */2/spa2.612932/a>void 2a href="+code=edac_pci_reset_delay_period" class="sref">edac_pci_reset_delay_period2/a>(struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>,612942/a>                                 unsigned long12a href="+code=n>
 3" class="sref">n>
 32/a>)612952/a>{612962/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(0, 2spa2 class="string">"\n"12972/a>612982/a>        2a href="+code=edac_pci_workq_teardow2" class="sref">edac_pci_workq_teardow22/a>(2a href="+code=pci" class="sref">pci2/a>);612992/a>613002/a>        2spa2 class="comment">/* need to lock for the setup */2/spa2.613012/a>        2a href="+code=mutex_lock" class="sref">mutex_lock2/a>(&2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);613022/a>613032/a>        2a href="+code=edac_pci_workq_setup" class="sref">edac_pci_workq_setup2/a>(2a href="+code=pci" class="sref">pci2/a>,12a href="+code=n>
 3" class="sref">n>
 32/a>);613042/a>613052/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);613062/a>}613072/a>2a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL2/a>(2a href="+code=edac_pci_reset_delay_period" class="sref">edac_pci_reset_delay_period2/a>);613082/a>613092/a>2spa2 class="comment">/*2/spa2.61310"
a>2spa2 class="comment"> * edac_pci_alloc_iidex: Allocate a unique PCI iidex number2/spa2.613112/a>2spa2 class="comment"> *2/spa2.613122/a>2spa2 class="comment"> * Return:2/spa2.613132/a>2spa2 class="comment"> *      allocated iidex number2/spa2.613142/a>2spa2 class="comment"> *2/spa2.613152/a>2spa2 class="comment"> */2/spa2.613162/a>int12a href="+code=edac_pci_alloc_iidex" class="sref">edac_pci_alloc_iidex2/a>(void)613172/a>{613182/a>        return 2a href="+code=atomic_iic_return" class="sref">atomic_iic_return2/a>(&2a href="+code=pci_iidexes" class="sref">pci_iidexes2/a>) - 1;613192/a>}613202/a>2a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL2/a>(2a href="+code=edac_pci_alloc_iidex" class="sref">edac_pci_alloc_iidex2/a>);613212/a>613222/a>2spa2 class="comment">/*2/spa2.613232/a>2spa2 class="comment"> * edac_pci_add_device: Insert1the 'edac_dev' structur3 into the2/spa2.613242/a>2spa2 class="comment"> * edac_pci global list and create sysfs entries associated with2/spa2.613252/a>2spa2 class="comment"> * edac_pci structur3.2/spa2.613262/a>2spa2 class="comment"> * @pci:1pointer to the edac_device structur3 to be added to the list2/spa2.613272/a>2spa2 class="comment"> * @edac_idx: A unique numeric identifier to be assigned to the2/spa2.613282/a>2spa2 class="comment"> * 'edac_pci' structur3.2/spa2.613292/a>2spa2 class="comment"> *2/spa2.61330"
a>2spa2 class="comment"> * Return:2/spa2.613312/a>2spa2 class="comment"> *      0       Success2/spa2.613322/a>2spa2 class="comment"> *      !0      Failur32/spa2.613332/a>2spa2 class="comment"> */2/spa2.613342/a>int12a href="+code=edac_pci_add_device" class="sref">edac_pci_add_device2/a>(struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>, int12a href="+code=edac_idx" class="sref">edac_idx2/a>)613352/a>{613362/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(0, 2spa2 class="string">"\n"13372/a>613382/a>        2a href="+code=pci" class="sref">pci2/a>->2a href="+code=pci_idx" class="sref">pci_idx2/a> =12a href="+code=edac_idx" class="sref">edac_idx2/a>;613392/a>        2a href="+code=pci" class="sref">pci2/a>->2a href="+code=start_time" class="sref">start_time2/a> =12a href="+code=jiffies" class="sref">jiffies2/a>;613402/a>613412/a>        2a href="+code=mutex_lock" class="sref">mutex_lock2/a>(&2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);613422/a>613432/a>        if (2a href="+code=add_edac_pci_to_global_list" class="sref">add_edac_pci_to_global_list2/a>(2a href="+code=pci" class="sref">pci2/a>))613442/a>                goto12a href="+code=fail0" class="sref">fail02/a>;613452/a>613462/a>        if (2a href="+code=edac_pci_create_sysfs" class="sref">edac_pci_create_sysfs2/a>(2a href="+code=pci" class="sref">pci2/a>)) {613472/a>                2a href="+code=edac_pci_printk" class="sref">edac_pci_printk2/a>(2a href="+code=pci" class="sref">pci2/a>,12a href="+code=KERN_WARNING" class="sref">KERN_WARNING2/a>,613482/a>                                2spa2 class="string">"failed to create sysfs pci\n"13492/a>                goto12a href="+code=fail1" class="sref">fail12/a>;613502/a>        }613512/a>613522/a>        if (2a href="+code=pci" class="sref">pci2/a>->2a href="+code=edac_check" class="sref">edac_check2/a> !=12a href="+code=NULL" class="sref">NULL2/a>) {613532/a>                2a href="+code=pci" class="sref">pci2/a>->2a href="+code=op_stat3" class="sref">op_stat32/a>1=12a href="+code=OP_RUNNING_POLL" class="sref">OP_RUNNING_POLL2/a>;613542/a>613552/a>                2a href="+code=edac_pci_workq_setup" class="sref">edac_pci_workq_setup2/a>(2a href="+code=pci" class="sref">pci2/a>,11000);613562/a>        } else {613572/a>                2a href="+code=pci" class="sref">pci2/a>->2a href="+code=op_stat3" class="sref">op_stat32/a>1=12a href="+code=OP_RUNNING_INTERRUPT" class="sref">OP_RUNNING_INTERRUPT2/a>;613582/a>        }613592/a>613602/a>        2a href="+code=edac_pci_printk" class="sref">edac_pci_printk2/a>(2a href="+code=pci" class="sref">pci2/a>,12a href="+code=KERN_INFO" class="sref">KERN_INFO2/a>,613612/a>                        2spa2 class="string">"Giving out1device to module1'%s' controller '%s':"13622/a>                        2spa2 class="string">" DEV1'%s' (%s)\n"13632/a>                        2a href="+code=pci" class="sref">pci2/a>->2a href="+code=mod_nam3" class="sref">mod_nam32/a>,613642/a>                        2a href="+code=pci" class="sref">pci2/a>->2a href="+code=ctl_nam3" class="sref">ctl_nam32/a>,613652/a>                        2a href="+code=edac_dev_nam3" class="sref">edac_dev_nam32/a>(2a href="+code=pci" class="sref">pci2/a>), 2a href="+code=edac_op_stat3_to_string" class="sref">edac_op_stat3_to_string2/a>(2a href="+code=pci" class="sref">pci2/a>->2a href="+code=op_stat3" class="sref">op_stat32/a>));613662/a>613672/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);613682/a>        return 0;613692/a>613702/a>        2spa2 class="comment">/* error unwind stack */2/spa2.613712/a>2a href="+code=fail1" class="sref">fail12/a>:613722/a>        2a href="+code=del_edac_pci_from_global_list" class="sref">del_edac_pci_from_global_list2/a>(2a href="+code=pci" class="sref">pci2/a>);613732/a>2a href="+code=fail0" class="sref">fail02/a>:613742/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);613752/a>        return 1;613762/a>}613772/a>2a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL2/a>(2a href="+code=edac_pci_add_device" class="sref">edac_pci_add_device2/a>);613782/a>613792/a>2spa2 class="comment">/*2/spa2.61380"
a>2spa2 class="comment"> * edac_pci_d3l_device()2/spa2.613812/a>2spa2 class="comment"> *      Remove sysfs entries for specified edac_pci structur3 and2/spa2.613822/a>2spa2 class="comment"> *      then remove edac_pci structur3 from global list2/spa2.613832/a>2spa2 class="comment"> *2/spa2.613842/a>2spa2 class="comment"> * @dev:2/spa2.613852/a>2spa2 class="comment"> *      Pointer to 'struct1device' representing edac_pci structur32/spa2.613862/a>2spa2 class="comment"> *      to remove2/spa2.613872/a>2spa2 class="comment"> *2/spa2.613882/a>2spa2 class="comment"> * Return:2/spa2.613892/a>2spa2 class="comment"> *      Pointer to removed edac_pci structur3,2/spa2.61390"
a>2spa2 class="comment"> *      or NULL if device not found2/spa2.613912/a>2spa2 class="comment"> */2/spa2.613922/a>struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=edac_pci_d3l_device" class="sref">edac_pci_d3l_device2/a>(struct12a href="+code=device" class="sref">device2/a> *2a href="+code=dev" class="sref">dev2/a>)613932/a>{613942/a>        struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>;613952/a>613962/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(0, 2spa2 class="string">"\n"13972/a>613982/a>        2a href="+code=mutex_lock" class="sref">mutex_lock2/a>(&2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);613992/a>614002/a>        2spa2 class="comment">/* ensur3 the control struct is oiothe global list2/spa2.614012/a>2spa2 class="comment">         * if not,othen leave2/spa2.614022/a>2spa2 class="comment">         */2/spa2.614032/a>        2a href="+code=pci" class="sref">pci2/a>1=12a href="+code=find_edac_pci_by_dev" class="sref">find_edac_pci_by_dev2/a>(2a href="+code=dev" class="sref">dev2/a>);614042/a>        if (2a href="+code=pci" class="sref">pci2/a> 1==12a href="+code=NULL" class="sref">NULL2/a>) {614052/a>                2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);614062/a>                return 2a href="+code=NULL" class="sref">NULL2/a>;614072/a>        }614082/a>614092/a>        2a href="+code=pci" class="sref">pci2/a>->2a href="+code=op_stat3" class="sref">op_stat32/a>1=12a href="+code=OP_OFFLINE" class="sref">OP_OFFLINE2/a>;614102/a>614112/a>        2a href="+code=del_edac_pci_from_global_list" class="sref">del_edac_pci_from_global_list2/a>(2a href="+code=pci" class="sref">pci2/a>);614122/a>614132/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=edac_pci_ctls_mutex" class="sref">edac_pci_ctls_mutex2/a>);614142/a>614152/a>        2spa2 class="comment">/* stopothe workq timer */2/spa2.614162/a>        2a href="+code=edac_pci_workq_teardow2" class="sref">edac_pci_workq_teardow22/a>(2a href="+code=pci" class="sref">pci2/a>);614172/a>614182/a>        2a href="+code=edac_printk" class="sref">edac_printk2/a>(2a href="+code=KERN_INFO" class="sref">KERN_INFO2/a>, 2a href="+code=EDAC_PCI" class="sref">EDAC_PCI2/a>,614192/a>                2spa2 class="string">"Removed device %d for %s %s: DEV1%s\n"14202/a>                2a href="+code=pci" class="sref">pci2/a>->2a href="+code=pci_idx" class="sref">pci_idx2/a>, 2a href="+code=pci" class="sref">pci2/a>->2a href="+code=mod_nam3" class="sref">mod_nam32/a>, 2a href="+code=pci" class="sref">pci2/a>->2a href="+code=ctl_nam3" class="sref">ctl_nam32/a>, 2a href="+code=edac_dev_nam3" class="sref">edac_dev_nam32/a>(2a href="+code=pci" class="sref">pci2/a>));614212/a>614222/a>        return 2a href="+code=pci" class="sref">pci2/a>;614232/a>}614242/a>2a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL2/a>(2a href="+code=edac_pci_d3l_device" class="sref">edac_pci_d3l_device2/a>);614252/a>614262/a>2spa2 class="comment">/*2/spa2.614272/a>2spa2 class="comment"> * edac_pci_generic_check2/spa2.614282/a>2spa2 class="comment"> *2/spa2.614292/a>2spa2 class="comment"> *      a Generic parity check API2/spa2.61430"
a>2spa2 class="comment"> */2/spa2.614312/a>static1void 2a href="+code=edac_pci_generic_check" class="sref">edac_pci_generic_check2/a>(struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>)614322/a>{614332/a>        2a href="+code=edac_dbg" class="sref">edac_dbg2/a>(4, 2spa2 class="string">"\n"14342/a>        2a href="+code=edac_pci_do_parity_check" class="sref">edac_pci_do_parity_check2/a>();614352/a>}614362/a>614372/a>2spa2 class="comment">/* free running iistanc3 iidex counter */2/spa2.614382/a>static1int12a href="+code=edac_pci_idx" class="sref">edac_pci_idx2/a>;614392/a>#define 2a href="+code=EDAC_PCI_GENCTL_NAME" class="sref">EDAC_PCI_GENCTL_NAME2/a>    2spa2 class="string">"EDAC PCI controller"14402/a>614412/a>struct12a href="+code=edac_pci_gen_data" class="sref">edac_pci_gen_data2/a> {614422/a>        int12a href="+code=edac_idx" class="sref">edac_idx2/a>;614432/a>};614442/a>614452/a>2spa2 class="comment">/*2/spa2.614462/a>2spa2 class="comment"> * edac_pci_create_generic_ctl2/spa2.614472/a>2spa2 class="comment"> *2/spa2.614482/a>2spa2 class="comment"> *      A generic constructor for a PCI parity polling device2/spa2.614492/a>2spa2 class="comment"> *      Some systems have mor3 tha2 one domai2 of PCI busses.2/spa2.61450"
a>2spa2 class="comment"> *      For systems with one domai2,othen this API will2/spa2.614512/a>2spa2 class="comment"> *      provide for a generic poller.2/spa2.614522/a>2spa2 class="comment"> *2/spa2.614532/a>2spa2 class="comment"> *      This routine calls the edac_pci_alloc_ctl_info() for2/spa2.614542/a>2spa2 class="comment"> *      the generic device, with default n>
 3s2/spa2.614552/a>2spa2 class="comment"> */2/spa2.614562/a>struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=edac_pci_create_generic_ctl" class="sref">edac_pci_create_generic_ctl2/a>(struct12a href="+code=device" class="sref">device2/a> *2a href="+code=dev" class="sref">dev2/a>,614572/a>                                                const char *2a href="+code=mod_nam3" class="sref">mod_nam32/a>)614582/a>{614592/a>        struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=pci" class="sref">pci2/a>;614602/a>        struct12a href="+code=edac_pci_gen_data" class="sref">edac_pci_gen_data2/a> *2a href="+code=pdata" class="sref">pdata2/a>;614612/a>614622/a>        2a href="+code=pci" class="sref">pci2/a>1=12a href="+code=edac_pci_alloc_ctl_info" class="sref">edac_pci_alloc_ctl_info2/a>(sizeof(*2a href="+code=pdata" class="sref">pdata2/a>), 2a href="+code=EDAC_PCI_GENCTL_NAME" class="sref">EDAC_PCI_GENCTL_NAME2/a>);614632/a>        if (!2a href="+code=pci" class="sref">pci2/a>)614642/a>                return 2a href="+code=NULL" class="sref">NULL2/a>;614652/a>6142a href="+code=pdata" class="sref">pdata2/a>;6fs':"ctl_nam32a>)6device2/a> *2a href=edac/edac_pci.c#L31od_nad_nam3" cedac_pci_ctls_mutex2/a>)46(2arv66" id
 L466" classs="sa>(2arv66" >ctl_nam32/a>, 2a href="+code=edac_dev_nam3" #L464" id
 L462o"+code=ctl_nam3" class="sref"s="sref">pci2/a>->2a href="+code=mod_nahref="+code=EDAC_PCI_GENCTL_NAME" classclass="li13682/a>        return 04614092a href="+code=ctl_nam3"s="sref">ctlam3
 L466">142a href=ref="+code=ctl_nam3"ef=ref=">ctl_nam32/a>, 2a hrtoRT_SYMB=ctl_nam3" classtoRT_SYMB=>ctl_nam32/a>, 2a hr_edac_pci_by_dev" class="shref="+code=EDAC_PCI_GENCTL_NAME" clas" class="4ine" nam3
 L369">13692/a46/* er4or unwind stack */2/spa246pci_idx2/a>, 2a href="+code=pci" clasam3
 L466">142a hri_idx2/a>, 2a href="+code=pci" clasref="+code=EDAC_PCI_GENCTL_NAME" clas" class="l" class="sref">fail12/a>46mod_nam32/a>, 2a href="+code=pci" clasam3
 L466">142a hr(sizeof(*2a href="+code=pdata" class="sref">pdata2/a>), 2a ref="+code=EDAC_PCI_GENCTL_NAME" clas"="sref">Ei" class="sref">pci2/a>)4613522/a>        if (2a href="+code=pci" class="sr" nam3
 L462">14622/a>    " class="line" nam3
 L431">14312/a>static1void 2a hrefref="+code=EDAC_PCI_GENCTL_NAME" clas"="+code=p" class="sref">fail02/a>46)4613522/a>      L442" class="line" nam3
 L442"r" nam3
 L462">14622/a>    8" class="line" nam3
 L438">14382/++ref="+code=EDAC_PCI_GENCTL_NAME" clas" class="l13752/a>        return 14613762/a>4613342/a>int12aac/edac_pci.c#L403" id
 L403" class="lins="sref">pci2/a>-&66" id
 L466" class="line" nam3
 L352">13522/a>      L442" class="line" nam3
 L442") m3
  0ci" class="sref">pci2/a> 1==12a href="+ss="sref"4edac_pci_add_device2/a>)4614332/a>        2a href="+48">134m3
 L334">13342/a>i(               2href="+code=EDAC_PCI_GENCTL_NAME" clas"class="liine" nam3
 L378">13782/a46p7" ia href="+>ctl_nam32/a>, 2a href="+code=edac_dev_nam3" cref="+code=EDAC_PCI_GENCTL_NAME" clas2/a>2spa24class="comment">/*2/spa24614642/a>                return 2a href=nt"> * ed4c_pci_d3l_device()2/spa24614222/a>        return 2a hre2/a>2spa24class="comment"> *2/spa246 * @dev:2/spa24614242/a>2a href="+code=EXPORT__ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=edcref="+code=EDAC_PCI_GENCTL_NAME" clas2 class="ledac_pci structur32/spa24614452/a>2spa24class="comment"> *2/spa24614462/a>2spa2 class="comment"> *2 class="4omment"> * Return:2/spa24614462/a>2spa2 class="comment"> * removed 4dac_pci structur3,2/spa2462s="line" nE" class=a>2spa2 class="comment"> *      A generic constructor for or NULL 4f device not found2/spa24613914/a>2spa2 4lass="comment"> */2/spa246edac_pci_ctl_info2releaslass="line" namef="+code=edac_pci_generic_check" class="sref">edac_pci_generic_check2/a>(struct12a href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_info2/a> *2a href="+code=4ev" class="sref">dev2/a>4613932/a>4613962/a>        2a href="+d
     =spa2 class="string">&qdac/edac_pci.c#L>->2a href="+code=pci_idx" class="sref">pci_idx2/a>, 2a href="+code=pci" clascref="+code=EDAC_PCI_GENCTL_NAME" clasf="+code=4ci" class="sref">pci2/a>4613952/a46edac_pci_ctl_info2/a> *2anam32/a>, 2a href="+code=edac_dev_nam3" #L464" id
 L462o"+code=ctl_nam3" class="sref"cref="+code=EDAC_PCI_GENCTL_NAME" clasf"comment4">"\n"p7" ia href="+>ctl_nam32/a>, 2a href="+code=edac_dev_nam3" cref="+code=EDAC_PCI_GENCTL_NAME" clas" class="4ine" nam3
 L397">13972/a46)4614242/a>2a href="+code=EXPORT_d
leaslass="line" nsref">edac_pci_ctl_info2releaslass="line" namefcref="+code=EDAC_PCI_GENCTL_NAME" cla5" class="5ine" nam3
 L399">13992/a56
The original LXR software byd
 L4f="+code=http://sourceforge.net/projects/lxr">LXR ac_punity"lins=450"
ex="+cpci.al C_PCio2/bydf="+code=m8">to:lxr@L39ux.no">lxr@L39ux.no"lin.
lxr.L39ux.no kindly hoslassbydf="+code=http://www.redpill-L39pro.no">Redpill L39pro AS"lins= L451"r/a>2L39uxne" nulpa2 cine"o="+atio2s sero2/as si="li1995.