linux/drivers/ata/pata_legacy.c
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   1/*
   2 *   pata-legacy.c - Legacy port PATA/SATA controller driver.
   3 *   Copyright 2005/2006 Red Hat, all rights reserved.
   4 *
   5 *  This program is free software; you can redistribute it and/or modify
   6 *  it under the terms of the GNU General Public License as published by
   7 *  the Free Software Foundation; either version 2, or (at your option)
   8 *  any later version.
   9 *
  10 *  This program is distributed in the hope that it will be useful,
  11 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 *  GNU General Public License for more details.
  14 *
  15 *  You should have received a copy of the GNU General Public License
  16 *  along with this program; see the file COPYING.  If not, write to
  17 *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  18 *
  19 *   An ATA driver for the legacy ATA ports.
  20 *
  21 *   Data Sources:
  22 *      Opti 82C465/82C611 support: Data sheets at opti-inc.com
  23 *      HT6560 series:
  24 *      Promise 20230/20620:
  25 *              http://www.ryston.cz/petr/vlb/pdc20230b.html
  26 *              http://www.ryston.cz/petr/vlb/pdc20230c.html
  27 *              http://www.ryston.cz/petr/vlb/pdc20630.html
  28 *      QDI65x0:
  29 *              http://www.ryston.cz/petr/vlb/qd6500.html
  30 *              http://www.ryston.cz/petr/vlb/qd6580.html
  31 *
  32 *      QDI65x0 probe code based on drivers/ide/legacy/qd65xx.c
  33 *      Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
  34 *      Samuel Thibault <samuel.thibault@ens-lyon.org>
  35 *
  36 *  Unsupported but docs exist:
  37 *      Appian/Adaptec AIC25VL01/Cirrus Logic PD7220
  38 *
  39 *  This driver handles legacy (that is "ISA/VLB side") IDE ports found
  40 *  on PC class systems. There are three hybrid devices that are exceptions
  41 *  The Cyrix 5510/5520 where a pre SFF ATA device is on the bridge and
  42 *  the MPIIX where the tuning is PCI side but the IDE is "ISA side".
  43 *
  44 *  Specific support is included for the ht6560a/ht6560b/opti82c611a/
  45 *  opti82c465mv/promise 20230c/20630/qdi65x0/winbond83759A
  46 *
  47 *  Support for the Winbond 83759A when operating in advanced mode.
  48 *  Multichip mode is not currently supported.
  49 *
  50 *  Use the autospeed and pio_mask options with:
  51 *      Appian ADI/2 aka CLPD7220 or AIC25VL01.
  52 *  Use the jumpers, autospeed and set pio_mask to the mode on the jumpers with
  53 *      Goldstar GM82C711, PIC-1288A-125, UMC 82C871F, Winbond W83759,
  54 *      Winbond W83759A, Promise PDC20230-B
  55 *
  56 *  For now use autospeed and pio_mask as above with the W83759A. This may
  57 *  change.
  58 *
  59 */
  60
  61#include <linux/async.h>
  62#include <linux/kernel.h>
  63#include <linux/module.h>
  64#include <linux/pci.h>
  65#include <linux/init.h>
  66#include <linux/blkdev.h>
  67#include <linux/delay.h>
  68#include <scsi/scsi_host.h>
  69#include <linux/ata.h>
  70#include <linux/libata.h>
  71#include <linux/platform_device.h>
  72
  73#define DRV_NAME "pata_legacy"
  74#define DRV_VERSION "0.6.5"
  75
  76#define NR_HOST 6
  77
  78static int all;
  79module_param(all, int, 0444);
  80MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)");
  81
  82enum controller {
  83        BIOS = 0,
  84        SNOOP = 1,
  85        PDC20230 = 2,
  86        HT6560A = 3,
  87        HT6560B = 4,
  88        OPTI611A = 5,
  89        OPTI46X = 6,
  90        QDI6500 = 7,
  91        QDI6580 = 8,
  92        QDI6580DP = 9,          /* Dual channel mode is different */
  93        W83759A = 10,
  94
  95        UNKNOWN = -1
  96};
  97
  98struct legacy_data {
  99        unsigned long timing;
 100        u8 clock[2];
 101        u8 last;
 102        int fast;
 103        enum controller type;
 104        struct platform_device *platform_dev;
 105};
 106
 107struct legacy_probe {
 108        unsigned char *name;
 109        unsigned long port;
 110        unsigned int irq;
 111        unsigned int slot;
 112        enum controller type;
 113        unsigned long private;
 114};
 115
 116struct legacy_controller {
 117        const char *name;
 118        struct ata_port_operations *ops;
 119        unsigned int pio_mask;
 120        unsigned int flags;
 121        unsigned int pflags;
 122        int (*setup)(struct platform_device *, struct legacy_probe *probe,
 123                struct legacy_data *data);
 124};
 125
 126static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
 127
 128static struct legacy_probe probe_list[NR_HOST];
 129static struct legacy_data legacy_data[NR_HOST];
 130static struct ata_host *legacy_host[NR_HOST];
 131static int nr_legacy_host;
 132
 133
 134static int probe_all;           /* Set to check all ISA port ranges */
 135static int ht6560a;             /* HT 6560A on primary 1, second 2, both 3 */
 136static int ht6560b;             /* HT 6560A on primary 1, second 2, both 3 */
 137static int opti82c611a;         /* Opti82c611A on primary 1, sec 2, both 3 */
 138static int opti82c46x;          /* Opti 82c465MV present(pri/sec autodetect) */
 139static int autospeed;           /* Chip present which snoops speed changes */
 140static int pio_mask = ATA_PIO4; /* PIO range for autospeed devices */
 141static int iordy_mask = 0xFFFFFFFF;     /* Use iordy if available */
 142
 143/* Set to probe QDI controllers */
 144#ifdef CONFIG_PATA_QDI_MODULE
 145static int qdi = 1;
 146#else
 147static int qdi;
 148#endif
 149
 150#ifdef CONFIG_PATA_WINBOND_VLB_MODULE
 151static int winbond = 1;         /* Set to probe Winbond controllers,
 152                                        give I/O port if non standard */
 153#else
 154static int winbond;             /* Set to probe Winbond controllers,
 155                                        give I/O port if non standard */
 156#endif
 157
 158/**
 159 *      legacy_probe_add        -       Add interface to probe list
 160 *      @port: Controller port
 161 *      @irq: IRQ number
 162 *      @type: Controller type
 163 *      @private: Controller specific info
 164 *
 165 *      Add an entry into the probe list for ATA controllers. This is used
 166 *      to add the default ISA slots and then to build up the table
 167 *      further according to other ISA/VLB/Weird device scans
 168 *
 169 *      An I/O port list is used to keep ordering stable and sane, as we
 170 *      don't have any good way to talk about ordering otherwise
 171 */
 172
 173static int legacy_probe_add(unsigned long port, unsigned int irq,
 174                                enum controller type, unsigned long private)
 175{
 176        struct legacy_probe *lp = &probe_list[0];
 177        int i;
 178        struct legacy_probe *free = NULL;
 179
 180        for (i = 0; i < NR_HOST; i++) {
 181                if (lp->port == 0 && free == NULL)
 182                        free = lp;
 183                /* Matching port, or the correct slot for ordering */
 184                if (lp->port == port || legacy_port[i] == port) {
 185                        free = lp;
 186                        break;
 187                }
 188                lp++;
 189        }
 190        if (free == NULL) {
 191                printk(KERN_ERR "pata_legacy: Too many interfaces.\n");
 192                return -1;
 193        }
 194        /* Fill in the entry for later probing */
 195        free->port = port;
 196        free->irq = irq;
 197        free->type = type;
 198        free->private = private;
 199        return 0;
 200}
 201
 202
 203/**
 204 *      legacy_set_mode         -       mode setting
 205 *      @link: IDE link
 206 *      @unused: Device that failed when error is returned
 207 *
 208 *      Use a non standard set_mode function. We don't want to be tuned.
 209 *
 210 *      The BIOS configured everything. Our job is not to fiddle. Just use
 211 *      whatever PIO the hardware is using and leave it at that. When we
 212 *      get some kind of nice user driven API for control then we can
 213 *      expand on this as per hdparm in the base kernel.
 214 */
 215
 216static int legacy_set_mode(struct ata_link *link, struct ata_device **unused)
 217{
 218        struct ata_device *dev;
 219
 220        ata_for_each_dev(dev, link, ENABLED) {
 221                ata_dev_info(dev, "configured for PIO\n");
 222                dev->pio_mode = XFER_PIO_0;
 223                dev->xfer_mode = XFER_PIO_0;
 224                dev->xfer_shift = ATA_SHIFT_PIO;
 225                dev->flags |= ATA_DFLAG_PIO;
 226        }
 227        return 0;
 228}
 229
 230static struct scsi_host_template legacy_sht = {
 231        ATA_PIO_SHT(DRV_NAME),
 232};
 233
 234static const struct ata_port_operations legacy_base_port_ops = {
 235        .inherits       = &ata_sff_port_ops,
 236        .cable_detect   = ata_cable_40wire,
 237};
 238
 239/*
 240 *      These ops are used if the user indicates the hardware
 241 *      snoops the commands to decide on the mode and handles the
 242 *      mode selection "magically" itself. Several legacy controllers
 243 *      do this. The mode range can be set if it is not 0x1F by setting
 244 *      pio_mask as well.
 245 */
 246
 247static struct ata_port_operations simple_port_ops = {
 248        .inherits       = &legacy_base_port_ops,
 249        .sff_data_xfer  = ata_sff_data_xfer_noirq,
 250};
 251
 252static struct ata_port_operations legacy_port_ops = {
 253        .inherits       = &legacy_base_port_ops,
 254        .sff_data_xfer  = ata_sff_data_xfer_noirq,
 255        .set_mode       = legacy_set_mode,
 256};
 257
 258/*
 259 *      Promise 20230C and 20620 support
 260 *
 261 *      This controller supports PIO0 to PIO2. We set PIO timings
 262 *      conservatively to allow for 50MHz Vesa Local Bus. The 20620 DMA
 263 *      support is weird being DMA to controller and PIO'd to the host
 264 *      and not supported.
 265 */
 266
 267static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev)
 268{
 269        int tries = 5;
 270        int pio = adev->pio_mode - XFER_PIO_0;
 271        u8 rt;
 272        unsigned long flags;
 273
 274        /* Safe as UP only. Force I/Os to occur together */
 275
 276        local_irq_save(flags);
 277
 278        /* Unlock the control interface */
 279        do {
 280                inb(0x1F5);
 281                outb(inb(0x1F2) | 0x80, 0x1F2);
 282                inb(0x1F2);
 283                inb(0x3F6);
 284                inb(0x3F6);
 285                inb(0x1F2);
 286                inb(0x1F2);
 287        }
 288        while ((inb(0x1F2) & 0x80) && --tries);
 289
 290        local_irq_restore(flags);
 291
 292        outb(inb(0x1F4) & 0x07, 0x1F4);
 293
 294        rt = inb(0x1F3);
 295        rt &= 0x07 << (3 * adev->devno);
 296        if (pio)
 297                rt |= (1 + 3 * pio) << (3 * adev->devno);
 298
 299        udelay(100);
 300        outb(inb(0x1F2) | 0x01, 0x1F2);
 301        udelay(100);
 302        inb(0x1F5);
 303
 304}
 305
 306static unsigned int pdc_data_xfer_vlb(struct ata_device *dev,
 307                        unsigned char *buf, unsigned int buflen, int rw)
 308{
 309        int slop = buflen & 3;
 310        struct ata_port *ap = dev->link->ap;
 311
 312        /* 32bit I/O capable *and* we need to write a whole number of dwords */
 313        if (ata_id_has_dword_io(dev->id) && (slop == 0 || slop == 3)
 314                                        && (ap->pflags & ATA_PFLAG_PIO32)) {
 315                unsigned long flags;
 316
 317                local_irq_save(flags);
 318
 319                /* Perform the 32bit I/O synchronization sequence */
 320                ioread8(ap->ioaddr.nsect_addr);
 321                ioread8(ap->ioaddr.nsect_addr);
 322                ioread8(ap->ioaddr.nsect_addr);
 323
 324                /* Now the data */
 325                if (rw == READ)
 326                        ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
 327                else
 328                        iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
 329
 330                if (unlikely(slop)) {
 331                        __le32 pad;
 332                        if (rw == READ) {
 333                                pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
 334                                memcpy(buf + buflen - slop, &pad, slop);
 335                        } else {
 336                                memcpy(&pad, buf + buflen - slop, slop);
 337                                iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
 338                        }
 339                        buflen += 4 - slop;
 340                }
 341                local_irq_restore(flags);
 342        } else
 343                buflen = ata_sff_data_xfer_noirq(dev, buf, buflen, rw);
 344
 345        return buflen;
 346}
 347
 348static struct ata_port_operations pdc20230_port_ops = {
 349        .inherits       = &legacy_base_port_ops,
 350        .set_piomode    = pdc20230_set_piomode,
 351        .sff_data_xfer  = pdc_data_xfer_vlb,
 352};
 353
 354/*
 355 *      Holtek 6560A support
 356 *
 357 *      This controller supports PIO0 to PIO2 (no IORDY even though higher
 358 *      timings can be loaded).
 359 */
 360
 361static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev)
 362{
 363        u8 active, recover;
 364        struct ata_timing t;
 365
 366        /* Get the timing data in cycles. For now play safe at 50Mhz */
 367        ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
 368
 369        active = clamp_val(t.active, 2, 15);
 370        recover = clamp_val(t.recover, 4, 15);
 371
 372        inb(0x3E6);
 373        inb(0x3E6);
 374        inb(0x3E6);
 375        inb(0x3E6);
 376
 377        iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
 378        ioread8(ap->ioaddr.status_addr);
 379}
 380
 381static struct ata_port_operations ht6560a_port_ops = {
 382        .inherits       = &legacy_base_port_ops,
 383        .set_piomode    = ht6560a_set_piomode,
 384};
 385
 386/*
 387 *      Holtek 6560B support
 388 *
 389 *      This controller supports PIO0 to PIO4. We honour the BIOS/jumper FIFO
 390 *      setting unless we see an ATAPI device in which case we force it off.
 391 *
 392 *      FIXME: need to implement 2nd channel support.
 393 */
 394
 395static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev)
 396{
 397        u8 active, recover;
 398        struct ata_timing t;
 399
 400        /* Get the timing data in cycles. For now play safe at 50Mhz */
 401        ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
 402
 403        active = clamp_val(t.active, 2, 15);
 404        recover = clamp_val(t.recover, 2, 16) & 0x0F;
 405
 406        inb(0x3E6);
 407        inb(0x3E6);
 408        inb(0x3E6);
 409        inb(0x3E6);
 410
 411        iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
 412
 413        if (adev->class != ATA_DEV_ATA) {
 414                u8 rconf = inb(0x3E6);
 415                if (rconf & 0x24) {
 416                        rconf &= ~0x24;
 417                        outb(rconf, 0x3E6);
 418                }
 419        }
 420        ioread8(ap->ioaddr.status_addr);
 421}
 422
 423static struct ata_port_operations ht6560b_port_ops = {
 424        .inherits       = &legacy_base_port_ops,
 425        .set_piomode    = ht6560b_set_piomode,
 426};
 427
 428/*
 429 *      Opti core chipset helpers
 430 */
 431
 432/**
 433 *      opti_syscfg     -       read OPTI chipset configuration
 434 *      @reg: Configuration register to read
 435 *
 436 *      Returns the value of an OPTI system board configuration register.
 437 */
 438
 439static u8 opti_syscfg(u8 reg)
 440{
 441        unsigned long flags;
 442        u8 r;
 443
 444        /* Uniprocessor chipset and must force cycles adjancent */
 445        local_irq_save(flags);
 446        outb(reg, 0x22);
 447        r = inb(0x24);
 448        local_irq_restore(flags);
 449        return r;
 450}
 451
 452/*
 453 *      Opti 82C611A
 454 *
 455 *      This controller supports PIO0 to PIO3.
 456 */
 457
 458static void opti82c611a_set_piomode(struct ata_port *ap,
 459                                                struct ata_device *adev)
 460{
 461        u8 active, recover, setup;
 462        struct ata_timing t;
 463        struct ata_device *pair = ata_dev_pair(adev);
 464        int clock;
 465        int khz[4] = { 50000, 40000, 33000, 25000 };
 466        u8 rc;
 467
 468        /* Enter configuration mode */
 469        ioread16(ap->ioaddr.error_addr);
 470        ioread16(ap->ioaddr.error_addr);
 471        iowrite8(3, ap->ioaddr.nsect_addr);
 472
 473        /* Read VLB clock strapping */
 474        clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];
 475
 476        /* Get the timing data in cycles */
 477        ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
 478
 479        /* Setup timing is shared */
 480        if (pair) {
 481                struct ata_timing tp;
 482                ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
 483
 484                ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
 485        }
 486
 487        active = clamp_val(t.active, 2, 17) - 2;
 488        recover = clamp_val(t.recover, 1, 16) - 1;
 489        setup = clamp_val(t.setup, 1, 4) - 1;
 490
 491        /* Select the right timing bank for write timing */
 492        rc = ioread8(ap->ioaddr.lbal_addr);
 493        rc &= 0x7F;
 494        rc |= (adev->devno << 7);
 495        iowrite8(rc, ap->ioaddr.lbal_addr);
 496
 497        /* Write the timings */
 498        iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
 499
 500        /* Select the right bank for read timings, also
 501           load the shared timings for address */
 502        rc = ioread8(ap->ioaddr.device_addr);
 503        rc &= 0xC0;
 504        rc |= adev->devno;      /* Index select */
 505        rc |= (setup << 4) | 0x04;
 506        iowrite8(rc, ap->ioaddr.device_addr);
 507
 508        /* Load the read timings */
 509        iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
 510
 511        /* Ensure the timing register mode is right */
 512        rc = ioread8(ap->ioaddr.lbal_addr);
 513        rc &= 0x73;
 514        rc |= 0x84;
 515        iowrite8(rc, ap->ioaddr.lbal_addr);
 516
 517        /* Exit command mode */
 518        iowrite8(0x83,  ap->ioaddr.nsect_addr);
 519}
 520
 521
 522static struct ata_port_operations opti82c611a_port_ops = {
 523        .inherits       = &legacy_base_port_ops,
 524        .set_piomode    = opti82c611a_set_piomode,
 525};
 526
 527/*
 528 *      Opti 82C465MV
 529 V
 456/**
 518         *      opti_syscfg   5 -   53class="line" name="L484"> 484         5s="commen5"> *      @reg: Configur5tion 5egiste="sref">opti82c611a_set_piomodeap, struct ata_device *adev)
 396{
 *
 523        . *      Returns the va5ue of53ef="+code=rc" class="sref">rc;
recover, setup;
 462        s5s="commen5"> */
t;
 463        s5drivers/a5a/pata_legacy.c#L439" id5"L43953f">ata_timing pair = ata_dev_pair(adev);
 464        i5href="+co5e=u8" class="sref">u8( 465        i5"drivers/5ta/pata_legacy.c#L441" i5="L445408( 466        <5signed lo5g active,  467
u8 r;
 467
 444        <5pan class5"comment">/* Uniprocesso5 chip5et and must force cycles adjancent */ 518        local_irq_save(u8  518        ou5b54class="line" name="L527"> 527r5= 
 469        <5 href="+c5de=local_irq_restore" cl5ss="s5ef">local_irq_restore(ap->ioaddr.error_addr);
 471        <5turn ap->ioaddr.error_addr);
 470        <5"drivers/5ta/pata_legacy.c#L451" i5="L455516(ap->ioaddr.nsect_addr);
 472
 452/*
 474        <5s="commen5"> *      Opti 82C611A
55= 0x73;
khz[ioread8( 475
 *
 395static vo5s="commen5"> *      This controlle5 supp555 and must force cycles adjancent */ 477        <5s="commen5"> */
rref="driveode=adev" class="sref">adev, adev->pio_mode, &t, clock, 1000);
khz[3" class="line" name="L483"> 483
 458static vo5d 
 480        i5         5                        5   st5uct  481         5"drivers/5ta/pata_legacy.c#L461" i5="L465616(
 t;
 482         5 href="+c5de=u8" class="sref">u8 ata_timing class="sref">rref="driveode=adev" class="sref">adev, pair->pio_mode, &tp, clock, 1000);
 483
 473        <5ruct ata_devicea_timing class="sref">rref="driveoode=t" class="sref">t, &tp, &t, ATA_TIMING_SETUP);
 473        <5r="commen5"+code=clock" class="sre5">clo5k;
 520
 476        <5 href="+c5de=u8" class="sref">u8 rl" class="sref">clamp_val(t.active, 2, 17) - 2;
 488        <5drivers/a5a/pata_legacy.c#L468" id5"L46856ef="+code=inb" class="sref">ial" class="sref">clamp_val(t.recover, 1, 16) - 1;
 489        <5pan class5"comment">/* Enter confi5urati56f">local_irq_restore(clamp_val(t.setup, 1, 4) - 1;
 490
 500         492        <5 href="+c5de=iowrite8" class="sref5>iowr5te8(3, ioread8(ap->ioaddr.lbal_addr);
 513        ioread8( 494        <5pan class5"comment">/* Read VLB cl5ck st57= 0x73;
devno << 7);
 495        <5 href="+c5de=clock" class="sref">c5ock = 1000000000 / rc, ap->ioaddr.lbal_addr);
 516
 476        <5pan class5"comment">/* Get the tim5ng da5a in cycles */
 498        <5 href="+c5de=ata_timing_compute" c5ass="5ref">ata_timing_compute(<" class="sref">active << 4 | recover, ap->ioaddr.data_addr);
 470        <5drivers/a5a/pata_legacy.c#L479" id5"L4795 class="line" name="L479"> 479        <5pan class5"comment">/* Setup timin5 is s5ared */
 501 502        (3, ioread8(ap->ioaddr.lbal_addr);
 507
ioread8( 504        devno << 7);
 505        adev-> 506        (rc, ap->ioaddr.lbal_addr);
 507
 487        <5 href="+c5de=active" class="sref">5ctive58/
 509         = active << 4 | recover, ap->ioaddr.data_addr);
 510
s5tup 500        
 512        /* Select the 5ight 59e8(3, ioread8(ap->ioaddr.lbal_addr);
 516
rc = <5 href="+code=ioread8" class="sref">ioread8( 514        rc &am5;= 0x7F;
 515        rc |= 5rc, ap->ioaddr.lbal_addr);
 516
 476        <5drivers/a5a/pata_legacy.c#L497" id5"L49759 in cycles */
 518        /* Write the t5mings59ef">ata_timing_compute(<" class="sref">active << 4="+code=ioaddr" class="sref">ioaddr.nsect_addr);
 519}
 479        <5drivers/a5a/pata_legacy.c#L500" id5"L50059red */
 518        <6pan class6"comment">/* Select the 6ight 6016(ioaddr.tp,e="ate_id="a href="+code=ap" clas"sref">ioaddr. 519}
           load the sh6red t6mings s="line" name="L520"> 520
rc = <60class="line" name="L473"> 473        <6 href="+c6de=rc" class="sref">rc &am60 href="drivers/ata/pata_leg433" class="line" name="L433"> 433rc |= 60gister to read
 433 433iowr60a/pata_legacy.c#L457" id="L45rsclass="line" name="L433"> 433/* Write the t6"L50860a/pata_legacy.c#L438" id="L43ef="drCalla_lwhenvers/libc#L4laycy.ic#aboutleo issue4aa#L518" .tWe wr. 433 433iowr60/pata_legacy.c#L3vers/ata/patcy.c#LMVB5hac#a sd="leorce4of/ata/pata_legacysrs/at/atse4arta/pata_" class="line" name="L433"> 433 501/* Ensure the 6iming61/pata_legacy.c#L392" id="L392cy.c#Ltrackvers/lastatwotusa_lvalu#L44c#a sore4of/a_legacy.window. For" class="line" name="L501"> 501rc = <61a/pata_legacy.c#L433" id="L51cy.c#Lnowvw.cj/patreiversonva.c#L393" switch. Onvers/sd="leoc#L393"" class="line" name="L501"> 501rc &am61 href="drivers/ata/pata_legacy.c#L4s_legacvers/atdi69" ine"L5 fir#L4soLw.cdoLnocvepatextra6" class="line" name="L456"> 456rc |= 61/pata_legacy.c#L455" id="L455" class="line" name="L455"> 455 455 457
/* Exit comman6 mode61class="line" name="L458"> 458static vo6 href="+c6de=iowrite8" class="sref6>iowr61class="sref"unsigna_l="drivers/ata/pata_gacy.c#46xaqc_issueref">ioaddrgacy.c#46xaqc_issuelt; 4 ioaddr.claqueued_cmda hreode=ata_dev_pairqp-> 396{
 481         6drivers/a6a/pata_legacy.c#L521" id6"L5216216(ap, struct ata_devief="+code=ap" clasqp->ioaddr. 519}
(adev)
-> 519}
 473        <6a href="+6ode=inherits" class="sre6">inh6rits      drivers/ata/pata_legacy.c#f9" id="L5arta/ce4s/atL502ers/wropatc#L393" (2/at/epatis" class="line" name="L457"> 457
62/pata_legacy.c#L455" id="L455555555555due4eo a/libc#L4sha h5" epats/atwill e"Lntu5lly go I hope)457" class="line" name="L457"> 457
ioaddr.tp,e="ate_id="a hre!f="+code=ap" clas"sref">ioaddr. 457
ioaddr.tp,e="ate_id="a hre!f="+code=ap" clasNULLs="sref">tpNULL"+cos="line" name="L396"> 396{
/*
ioaddr.pio_mode, ss="line" name="L519"> 519}
 *      Opti 82C465MV<6span>62class="line" name="L479"> 479        <6s="commen6"> V
ioaddrlasssffaqc_issue hrefivers/ata/pata_qp-> 519}
 520
 452/**
ata_port_operations opti82c611a_port_ops = {
46xaef="drivers/ata/pata_legacy.c#46xaef="drivclasef=s="line" name="L481"> 481         6s="commen6"> *      opti_syscfg   6 -   63its       = &legacy_base_port_ops,
 524        .6s="commen6"> *      @reg: Configur6tion 63t_piomode    = opti82c611a_set_piomode 524        .6s"drivers6"> *
ioaddrqc_issue hre"sref">leivers/ata/pata_gacy.c#46xaqc_issueref">ioaddrgacy.c#46xaqc_issuelt; s="line" name="L524"> 524        .6s6ref="+c6"> *      Returns the va6ue of63ef="+ss="line" name="L466"> 466        <6s="commen6"> */
 458static vo6drivers/a6a/pata_legacy.c#L439" id6"L43963a href="drivers/ata/pata_le433" class="line" name="L433"> 433u8 433 455 455u8  455 455/* Uniprocesso6 chip64gister to read
 455
 456ou6b64a/pata_legacy.c#L457" id="L45rsclass="line" name="L433"> 433r6=  433 456 457
 521
opti82c611a_set_pioqdi65x0a href="drivref">ioaddrqdi65x0a href="drivlt; 4 ap, struct ata_device *adev)
 396{
/*
 481         6s="commen6"> *      Opti 82C611A
65= 0x73;
 t;
 463        s6s="commen6"> *
tpy.c#L52id="="drivers/ata/pata_leld_qdis="sref">tpyd_qdia href="+code=ap" clas"sref">ioaddr.tp,e="ate_id="a hrs="line" name="L463"> 463        s6s"drivers6"> *      This controlle6 supp655 and must fo="drivers/ata/pata_class="sref">recover,  463        s6s="commen6"> */
r/a>;
t;
 463        s6shref="+c6a/pata_legacy.c#L458" id6"L4586 class="line" name="L458"> 458static vo6d 
 477        <6         6                        6   st6516(adev, adev->pio_mode, &t, clock, 1000);
 483
 521
u8 at,"drivers/ata/pata_ld_qdis="sref">tpyd_qdia hr& 481         6 ="commen6ef="+code=ata_timing" cl6ss="s66href="+code=i>(clamp_val(t.active, 2, 17) - 2;
 483
ata_devicea_timing class="sref">rclass="y->t.active, 2, 17) - 2;
ap-> 483
clo6k;
 481         6 "drivers6"+code=khz" class="sref"6khz(clamp_val(t.active, 2, 17) - 2;
 483
u8 rclass="y->t.active, 2, 17) - 2;
ap-> 483
 520
/* Enter confi6urati66f">local_irq_restore(t;
clamp_val( 483
tpyd_qdia hr&devno << 7);
t;
 463        s6 href="+c6de=ioread16" class="sref6>iore67class="line" name="L521"> 521
at,"drivers/ata/pata_ld_qdis="sref">tpyd_qdia hr&clamptypars/a =f="+code=ap" clasQDI65"+code=pair>clampQDI65"+class="line" name="L396"> 396{
ioaddrgutbactive" class="sref">s="sref">t;
tpyd_qdia hr&t;
devno << 7);
 483
/* Read VLB cl6ck st67= 0x73;
 483
c6ock = 1000000000>(ioaddrgutbactive" class="sref">s="sref">t;
tpyd_qdia hr&t;
ioaddr. 483
 476        <6pan class6"comment">/* Get the tim6ng da6a in cycles */
 477        <6 href="+c6de=ata_timing_compute" c6ass="6ref">ata_timin,"drivers/ata/pata_ld_qdis="sref">tpyd_qdia hr&clamptypars/a !f="+code=ap" clasQDI650+code=pair>clampQDI65016"L514"L475"ivers/ata/pata_"s="sref">devno << 7);
df">t.t. 396{
(ioaddrgutbactiv0x5F,drivers/ata/pata_ld_qdis="sref">tpyd_qdia hr&t;
 483
/* Setup timin6 is s67 class="line" name="L520"> 520
 521
 433 433 433 455
 433 4336ctive68a/pata_legacy.c#L438" id="L437" class="line" name="L477"> 477        <6 href="+c6de=recover" class="sref"6recov68class="line" name="L479"> 479        <6 href="+c6de=setup" class="sref">s6tupioaddrqdiaqc_issuelt; 4 ioaddr.claqueued_cmda hreode=ata_dev_pairqp-> 396{
 481         6pan class6"comment">/* Select the 6ight 6916(ap, struct ata_devief="+code=ap" clasqp->ioaddr. 519}
rc = <6 href="+code=i *adev)
-> 519}
rc &am69= 0x73;
 tpy.c#L52id="="drivers/ata/pata_leld_qdis="sref">tpyd_qdia href="+code=ap" clas"sref">ioaddr.tp,e="ate_id="a hrs="line" name="L469"> 519}
rc |= 69class="line" name="L395"> 395static vo6 a href="6de=iowrite8" class="sref6>iowr69[4] = { 50000,"drivers/ata/pata_ld_qdis="sref">tpyd_qdia hr&devno << 7);
tpyd_qdia hr& 481         6drivers/a6a/pata_legacy.c#L497" id6"L49769 in cycles */////ming,"drivers/ata/pata_"lass="sref">pio_mode, &t,  481         6dhref="+c6"comment">/* Write the t6mings697in cycles *///// hre>(tpyd_qdia hr&tpyd_qdia hr&devno << 7);
 519}
ioaddrgutbactiv"+code=ap" clasld_qdis="sref">tpyd_qdia hr&devno << 7);
tpyd_qdia hr&t;
 519}
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>2 *"code=devno" classref">ioaddr. 483
/* Select the 7ight 7016( 520
           load the sh7red t7016( 520
rc = <70href="+code=ir_lernref="+code=ap" classsffaqc_issueref">ioaddrlasssffaqc_issue hrefivers/ata/pata_qp-> 519}
rc &am70 hrefs="line" name="L520"> 520
rc |= 70class="line" name="L395"> 395static vo7 5ref="+c7de=iowrite8" class="sref7> |= 70ts PI="sref"unsigna_l="drivers/ata/pata_vlb32_id="_xfref">ap-> adev)
 395static vo7 6ref="+c7d/pata_legacy.c#L497" id7>iowr70 in cycles */////mingggggggggggggggggggggggggunsigna_l="drivers/ata/pata_buflen.c#L396" id="L3buflenclas,"="drivers/ata/pata_rw-> 396{
/* Write the t7"L50870a/pats="line" name="L481"> 481         7 8ref="+c7de=iowrite8" class="sref7d tim708= 1000000000 *ap, struct ata_devief="+code=ap" classs="sref">devno << 7);
ioaddr. 519}
iowr70ct  514        <7drivers/a7a/pata_legacy.c#L511" id7"L51171class="line" name="L521"> 521
/* Ensure the 7iming71ass="sref">at,"drivers/ata/pata_1devno << 7);
ioaddrid"+cos="L514"L475"+code=devno" cla=loivers/ata/pata_leloidevief= 0 |" f="+code=ap" cl=loivers/ata/pata_leloidevief= 3s="line" name="L396"> 396{
rc = <71href="+code=i>(ioaddr.t./**"+coss=s="line" name="L481"> 481         7phref="+c7de=rc" class="sref">rc &am71f">ata_devicea_timing,"drivers/ata/pata_rw->-> 396{
rc |= 71 = 1000000000>(ioaddri> <32_res hrefivers/ata/pata_ssref">ioaddr.data_addr);
 519}
( 483
ioaddri>ref=32_res hrefivers/ata/pata_ssref">ioaddr.data_addr);
 483
/* Exit comman7 mode71class="line" name="L458"> 458static vo7 href="+c7de=iowrite8" class="sref7>iowr718= 1000000000>(-> 481         7p9ref="+c7ta/pata_legacy.c#L520" i7="L5271red */>>>>>>>>>>>>>>>>ivers/ata/pata__a> ">/** ">ed */code=nsect_addr=adref">ioaddr=ada hrs="line" name="L519"> 519}
(->-> 481         7drivers/a7a/pata_legacy.c#L522" id7"L52272ass="sref">ata_timing>>>>>>>>>>>>>>>>ivers/ata/pata_memcpy->ioaddr=ada hr"+code=pio_mode" buf.c#L396" id="L3bufclas +="+code=ap" clasbuflen.c#L396" id="L3buflenclas rif="+code=ap" cl=loivers/ata/pata_leloidevi"+code=pio_mode" =loivers/ata/pata_leloideviss="line" name="L519"> 519}
 <32ref">ioaddri> <32activ"+code=ap" clasl;32_to_cpus="sref">tpy.32_to_cpuactiv"+code=ap" clas=adref">ioaddr=ada hr)de=ioaddr" class="sref">ioaddr.data_addr);
 510
inh72f">ata_devicea_timingggggggggs else=s="line" name="L481"> 481         7a href="+7ode=set_piomode" class="7ref">72 = 1000000000>(ioaddr=ada hra href="+code=t" clpu_to_> ">/** ">activ"+code=ap" clasi>ref=32ref">ioaddri>ref=32 hrefivers/ata/pata_ssref">ioaddr.data_addr);
 510
(>>>>>>>>>>>>>>>ivers/ata/pata_memcpy->ioaddr=ada hr"+code=pio_mode" =loivers/ata/pata_leloideviss="line" name="L519"> 519}
 519}
/*
 519}
 *      Opti 82C465MV<7span>728= 1000000000>( 514        <7s="commen7"> V
 483
(ap->devno <<"+code=pio_mode" buf.c#L396" id="L3bufclas,="+code=ap" clasbuflen.c#L396" id="L3buflenclasef="+code=setup" cw-> 514        <7rrivers/a7a/pata_legacy.c#L432" id7"L43273ings s="line" name="L520"> 520
/**
 473        <7s="commen7"> *      opti_syscfg   7 -   73itsap, strqdi_="srlt; 4 adev 395static vo7s="commen7"> *      @reg: Configur7tion 73 = 1000000000>( adev *tpy.c#L52id="="drivers/ata/pata_lelds="sref">tpyd"+cos="line" name="L396"> 396{
 *
 481         7s6ref="+c7"> *      Returns the va7ue of73 in cycles */,"drivers/ata/pata_6" m_#Lquest_a_leon.c#L396" id="L36" m_#Lquest_a_leon href=clock" class="sref"acy.c#L396" id="L36" clas&adev
"qdi"" class) =f="+code=ap" clasNULLs="sref">tpNULL"+cos="line" name="L396"> 396{
 */
tpEBUSYa hrs="line" name="L519"> 519}
local_irq_restore(tpyd"+co&t;
adev 519}
u8r_lernrss="line" name="L504"> 504        <7"drivers/7ta/pata_legacy.c#L441" i7="L4474a/pats="line" name="L520"> 520
 452u8 ata_port_operations opti82c611a_port_ops 481         7s="commen7a/pata_legacy.c#L444" id7"L44474its       = &legacy_base_port_ops,
 524        .7s="commen7"comment">/* Uniprocesso7 chip74t_piomode    = opti82c611a_set_pioqdi65x0a href="drivref">ioaddrqdi65x0a href="drivlt; s="line" name="L524"> 524        .7s"drivers7de=local_irq_save" class7"sref745_piomode    = ioaddrqc_issue hre"sref">leivers/ata/pata_qdi_qc_issueref">ioaddrqdiaqc_issuelt; s="line" name="L524"> 524        .7s6ref="+c7de=outb" class="sref">ou7b746_piomode    = ap->leivers/ata/pata_vlb32_id="_xfref">ap-> 524        .7s="commen7de=r" class="sref">r7=  466        <7 rivers/a7de=local_irq_restore" cl7ss="s74class="line" name="L479"> 479        <7 ref="+co7ef="+code=r" class="sref7>rata_port_operations opti82c611a_port_ops 481         7"drivers/7ta/pata_legacy.c#L451" i7="L45750ts       = &legacy_base_port_ops,
 524        .7drivers/a7a/pata_legacy.c#L452" id7"L452751_piomode    = opti82c611a_set_pioqdi65x0a href="drivref">ioaddrqdi65x0a href="drivlt; s="line" name="L524"> 524        .7s="commen7">/*
ap->leivers/ata/pata_vlb32_id="_xfref">ap-> 524        .7s="commen7"> *      Opti 82C611A
75= 0x7ss="line" name="L466"> 466        <7s="commen7"> *
 395static vo7s"drivers7"> *      This controlle7 supp755ss="sref">ata_port_operations opti82c611a_port_ops 481         7"6ref="+c7"> */
legacy_base_port_ops,
 524        .7d="commen7a/pata_legacy.c#L458" id7"L458757_piomode    = opti82c611a_set_pioqdi65x0a href="drivref">ioaddrqdi65x0a href="drivlt; s="line" name="L524"> 524        .7srivers/a7"+code=opti82c611a_set_p7omode75gs */
    = ioaddrqc_issue hre"sref">leivers/ata/pata_qdi_qc_issueref">ioaddrqdiaqc_issuelt; s="line" name="L524"> 524        .7         7                        7   st7516(ap->leivers/ata/pata_vlb32_id="_xfref">ap-> 524        .7"drivers/7ta/pata_legacy.c#L461" i7="L4676classss="line" name="L466"> 466        <7 href="+c7de=u8" class="sref">u8  452aivers/ata/pata_DEFINE_SPINLOCKf">ap-> 514        <7"="commen7ef="+code=ata_device" cl7ss="s7ef">at="line" name="L514"> 514        <7"="commen7"+code=clock" class="sre7">clo7k;="sref">opti82c611a_set_piowinbond_ <cfref">t;
ap, str="srlt; "+code=pio_mode" /a>;
t;
;
t. 396{
 481         7"="commen7de=u8" class="sref">u8 t. 514        <7"="commen7a/pata_legacy.c#L468" id7"L46876ef="+code=inb   = clampcpin_/pat_irqsala href=clock" class="sref"winbond_/pata_legacy.c#L483winbond_/pat"+co"+code=pio_mode" flagdf">t. 514        <7"rivers/a7"comment">/* Enter confi7urati76f">local_irq_restore(ioaddrgutbactiv"+code=ap" clasreref">t;
ap, str="srlt;  + cla1ss="line" name="L514"> 514        <7"        7de=ioread16" class="sref7>iore7616(ioaddrgutbactiv"+code=ap" classref">t.ap, str="srlt;  + cla2ss="line" name="L483"> 483
clampcpin_un/pat_irqrestora href=clock" class="sref"winbond_/pata_legacy.c#L483winbond_/pat"+co"+code=pio_mode" flagdf">t. 514        <7 href="+c7de=iowrite8" class="sref7>iowr77ings s="line" name="L520"> 520
 473        <7pan class7"comment">/* Read VLB cl7ck st773ss="sref">aivers/ata/pata_/a>;
t;
ap, str="srlt; "+code=pio_mode" /a>;
t;
 396{
c7ock = 10s="line" name="L481"> 481         7p"drivers7a/pata_legacy.c#L476" id7"L476775f="+code=inb   = t. 514        <7 ="commen7"comment">/* Get the tim7ng da7a in c="line" name="L514"> 514        <7 ="commen7de=ata_timing_compute" c7ass="7ref">ata_timinunsigna_llopatt. 514        <7dan class7a/pata_legacy.c#L479" id7"L47977f">local_irq_restore(clampcpin_/pat_irqsala href=clock" class="sref"winbond_/pata_legacy.c#L483winbond_/pat"+co"+code=pio_mode" flagdf">t. 514        <7p        7"comment">/* Setup timin7 is s7716(ioaddrgutbactiv"+code=ap" clasreref">t;
ap, str="srlt;  + cla1ss="line" name="L514"> 514        <7 (t.leivers/ata/pata_inbegacy_base_port_obactiv"+code=ap" clast"sref">ap, str="srlt;  + cla2ss="line" name="L483"> 483
clampcpin_un/pat_irqrestora href=clock" class="sref"winbond_/pata_legacy.c#L483winbond_/pat"+co"+code=pio_mode" flagdf">t. 514        <7       473        <7drivers/a7a/pata_legacy.c#L484" id7"L48478its      r_lernref="+code=ap" csref">t. 514        <7       520
 476        <7 an class7a/pata_legacy.c#L487" id7"L48778a/pat="sref">opti82c611a_set_piowinbond_ href="drivref">ioaddrwinbond_ href="driv href ap, struct ata_device *adev)
 396{
7ctive78a/pats="line" name="L481"> 481         7 href="+c7de=recover" class="sref"7recov788= 1000000000 *t;
 463        s7 href="+c7de=setup" class="sref">s7tuptpy.c#L52id="="drivers/ata/pata_leld_winbonds="sref">tpyd_winbondacti>leivers/ata/pata_"sref">ioaddr.tp,e="ate_id="a hrs="line" name="L469"> 519}
recover,  463        s7pan class7"comment">/* Select the 7ight 791f="+code=inb   = t;
 463        s7p     rc = <7 href="+code=i="drivers/ata/pata_ts="sref">t;
ioaddr.devno << 7);
 483
rc &am79f">at="line" name="L514"> 514        <7      rc |= 794f="+code=inb   = t;
leivers/ata/pata_winbond_ref=cfref">t;
tpyd_winbondacti&t;
 514        <7 a href="7de=iowrite8" class="sref7>iowr79class="line" name="L476"> 476        <7drivers/a7a/pata_legacy.c#L497" id7"L49779 in cycles */ 477        <7dhref="+c7"comment">/* Write the t7mings79ef">ata_timin,"drivers/ata/pata_reref">t;
"L475" c40) ycles */ 477        <7dhref="+c7de=iowrite8" class="sref7>iowr798= 1000000000>(adev, adev->pio_mode, &t, clock, 1000);
 483
else="line" name="L483"> 483
/* Select the 8ight 8016(adev, adev->pio_mode, &t, clock, 1000);
 483
           load the sh8red t80class="line" name="L452"> 452rc = <80href="+code=iivers/ata/pata_class="sref">recover, t.active, 2, 17) - 2;
"L475" c0Fs="line" name="L483"> 483
rc &am803f="+code=inb   = ->t.active, 2, 17) - 2;
ap->"L475" c0Fs="line" name="L483"> 483
rc |= 804f="+code=inb   = t;
recover,  463        s8 5ref="+c8de=iowrite8" class="sref8> |= 805f="+code=inb   = t;
tpyd_winbondacti&t;
t;
t;
 463        s8 6ref="+c8d/pata_legacy.c#L497" id8>iowr80 in c="line" name="L514"> 514        <8 7ref="+c8dcomment">/* Write the t8"L50880ef="+code=inb a href="drivers/ata/pataLvers/atasetupa_legacy77" class="line" name="L477"> 477        <8 8ref="+c8de=iowrite8" class="sref8d tim80class="line" name="L479"> 479        <8 9ref="+c8d/pata_legacy.c#L500" id8>iowr8016(t;
le0x35s="line" name="L463"> 463        s8drivers/a8a/pata_legacy.c#L511" id8"L511810f="+code=inb="drivers/ata/pata_"lass="sref">pio_mode, &t.t. 396{
/* Ensure the 8iming81ass="sref">ata_timingf="+code=ap" clreref">t;
|= cla8ss */ 477        <8phref="+c8de=rc" class="sref">rc = <81href="+code=i="dr! href="+code=t" cla=a hneed_itrdy->adev-> 396{
rc &am81f">ata_devicea_timingf="+code=ap" clreref">t;
|= cla2ss */ 477        <8p4"commen8de=rc" class="sref">rc |= 814f="+code=inb   = t;
|a +code=devno" clacass="sref">t.active, 2, 17) - 2;
clampcetuprs/a,=0, 3s "6" id="L6ss="line" name="L463"> 463        s8 href="+c8de=iowrite8" class="sref8>iowr815f="+code=inb   = t;
tpyd_winbondacti&t;
t;
t;
 463        s8 6ref="+c8a/pata_legacy.c#L517" id8"L51781 in cs="line" name="L520"> 520
/* Exit comman8 mode81class="line" name="L458"> 458static vo8 href="+c8de=iowrite8" class="sref8>iowr818= 10="sref"="drivers/ata/pata_winbond_="sref">ap, strwinbond_="sr href adev 395static vo8p9ref="+c8ta/pata_legacy.c#L520" i8="L5281red */>>>>>>>>>>>>>>>> adev *tpy.c#L52id="="drivers/ata/pata_lelds="sref">tpyd"+cos="line" name="L396"> 396{
 481         8drivers/a8a/pata_legacy.c#L522" id8"L52282ass="sref">at,"drivers/ata/pata_6" m_#Lquest_a_leon.c#L396" id="L36" m_#Lquest_a_leon href=clock" class="sref"acy.c#L396" id="L36" clas&adev
"winbond"" class) =f="+code=ap" clasNULLs="sref">tpNULL"+cos="line" name="L396"> 396{
tpEBUSYa hrs="line" name="L519"> 519}
inh823f="+code=inb   = tpyd"+co&t;
adev 519}
82 = 1000000000r_lernrss="line" name="L504"> 504        <8ahref="+c8ata/pata_legacy.c#L526" 8d="L5825ref=s="line" name="L520"> 520
 514        <8d7ref="+c8">/*
ata_port_operations opti82c611a_port_ops 481         8dhref="+c8"> *      Opti 82C465MV<8span>82gs */
    = legacy_base_port_ops,
 524        .8s="commen8"> V
opti82c611a_set_piowinbond_ href="drivref">ioaddrwinbond_ href="driv hres="line" name="L524"> 524        .8ref="+cod8=opti82a href="ss="line"8name=830ts       = &ap->leivers/ata/pata_vlb32_id="_xfref">ap-> 524        .8rrivers/a8a/pata_legacy.c#L432" id8"L43283ings ss="line" name="L504"> 504        <8s="commen8">/**
 473        <8s="commen8"> *      opti_syscfg   8 -   83its *ap->t. 481         8s="commen8"> *      @reg: Configur8tion 83 = 1000000000{
"BIOS"" class,00000000gacy_base_port_ops,
 524        .8rhref="+c8"> *
(>>>>>>>   = tpNULL"+co }s="line" name="L524"> 524        .8r6ref="+c8"> *      Returns the va8ue of83 in cycles */{
"Snoop"sr"" class,0000gacy_base_port_ops 524        .8r7ref="+c8"> */
tpNULL"+co }s="line" name="L524"> 524        .8rhref="+c8a/pata_legacy.c#L439" id8"L43983f">local_irq_{
"PDC20230"" class,0000gacy_base_port_ops/**lt; s="line" name="L524"> 524        .8r="commen8e=u8" class="sref">u8>>>>>>>>>>>>>>>>ivers/ata/pata_#L48FLAG_NO_IORDY/ata/pata_legac#L48FLAG_NO_IORDYclass="line" name="L524"> 524        .8"drivers/8ta/pata_legacy.c#L441" i8="L448416(/**"+co6" f="+code=ap" cl#L48PFLAG_PIO">CHANGE/**CHANGEclassode=inb>   = tpNULL"+co }s="line" name="L524"> 524        .8signed lo8g local_irq_{
"HT6560A"" class,00000gacy_base_port_ops/**lt; s="line" name="L524"> 524        .8s="commen8de=u8" class="sref">u8 (>>>>>>>   = tpNULL"+co }s="line" name="L524"> 524        .8s="commen8a/pata_legacy.c#L444" id8"L44484its      {
"HT6560B"" class,00000gacy_base_port_ops 524        .8s="commen8"comment">/* Uniprocesso8 chip84t_piomode>(tpNULL"+co }s="line" name="L524"> 524        .8shref="+c8de=local_irq_save" class8"sref845_piomode{
"OPTI82C611A"" class,0gacy_base_port_ops 524        .8s6ref="+c8de=outb" class="sref">ou8b84 in cycles */////minggggggggg0,code=i>(>>>>>>>0,code=i>(>>>>>>>   = tpNULL"+co }s="line" name="L524"> 524        .8s="commen8de=r" class="sref">r8= {
"OPTI82C46X"" class,00gacy_base_port_ops 524        .8shref="+c8de=local_irq_restore" cl8ss="s848= 1000000000>(((>>>>>>>0,code=i>(>>>>>>>   = tpNULL"+co }s="line" name="L524"> 524        .8s="commen8ef="+code=r" class="sref8>r{
"QDI6500"" class,00000gacy_base_port_ops/**lt; s="line" name="L524"> 524        .8"drivers/8ta/pata_legacy.c#L451" i8="L458516( 524        .8drivers/a8a/pata_legacy.c#L452" id8"L45285ass="sref">ata_timing>>>>>>>>   = /**"+co6" f="+code=ap" cl#L48PFLAG_PIO">CHANGE/**CHANGEclassode=base_port_opsap, strqdi_="srlt;  }s="line" name="L524"> 524        .8s="commen8">/*
"QDI6580"" class,00000gacy_base_port_ops 524        .8s="commen8"> *      Opti 82C611A
85f">ata_devicea_timinggggggggg0"+code=pio_mode" #L48PFLAG_PIO">/**"+co6" f="+code=ap" cl#L48PFLAG_PIO">CHANGE/**CHANGEclassobase_port_opsap, strqdi_="srlt;  }s="line" name="L524"> 524        .8s="commen8"> *
"QDI6580DP"" class,000gacy_base_port_ops 524        .8shref="+c8"> *      This controlle8 supp855ref="+code=i>(>>>>>>>0"+code=pio_mode" #L48PFLAG_PIO">/**"+co6" f="+code=ap" cl#L48PFLAG_PIO">CHANGE/**CHANGEclassobase_port_opsap, strqdi_="srlt;  }s="line" name="L524"> 524        .8s6ref="+c8"> */
"W83759A"" class,00000gacy_base_port_ops 524        .8s="commen8a/pata_legacy.c#L458" id8"L458857in cycles *///// hreeeeeeeee0,ccode=pio_mode" #L48PFLAG_PIO">/**"+co6" f="+code=ap" cl#L48PFLAG_PIO">CHANGE/**CHANGEclass="line" name="L524"> 524        .8shref="+c8"+code=opti82c611a_set_p8omode858= 1000000000>((ap, strwinbond_="sr hrees="line" name="L519"> 519}
 504        <8"drivers/8ta/pata_legacy.c#L461" i8="L4686class="line" name="L521"> 521
u8  477        <8 ="commen8ef="+code=ata_timing" cl8ss="s86ass=" 477        <8 ="commen8ef="+code=ata_device" cl8ss="s8ef">at 477        <8 ="commen8"+code=clock" class="sre8">clo8k; 477        <8 href="+c8"+code=khz" class="sref"8khz 477        <8 6ref="+c8de=u8" class="sref">u8  477        <8 ="commen8a/pata_legacy.c#L468" id8"L46886ef="+ 477        <8"rivers/a8"comment">/* Enter confi8urati86class="line" name="L479"> 479        <8"        8de=ioread16" class="sref8>iore869ss="sref">aivers/ata/pata___iniref">ap, str__inir hree="drivers/ata/pata_probs_chip_type="sref">adev adevadev 396{
 481         8 href="+c8de=iowrite8" class="sref8>iowr87ass="sref">at,"drivers/ata/pata_masta_legacy.c#L483mastrs/a f=1 "6" id="Lcode=ata_deviceprobs="sref">adevap, strslorclass="line" name="L519"> 519}
 473        <8pan class8"comment">/* Read VLB cl8ck st87f">ata_device,"drivers/ata/pata_winbonds="sref">tpwinbondacti>gacy_"L475"v"+code=ap" clastrobs="sref">adevap, str="srlt;  == cl1F0 |" f="+code=ap" cltrobs="sref">adevap, str="srlt;  == cl170ss=s="line" name="L481"> 481         8p="commen8de=clock" class="sref">c8ock>(t;
leivers/ata/pata_winbond_ref=cfref">t;
tpwinbondacti,=0x81ss="line" name="L514"> 514        <8p"drivers8a/pata_legacy.c#L476" id8"L476875ref="+code=i>(t;
|= cl80ss */ 477        <8 ="commen8"comment">/* Get the tim8ng da87 in cycles */////mingivers/ata/pata_winbond_ <cfref">t;
tpwinbondacti,=0x81,=t;
 463        s8 ="commen8de=ata_timing_compute" c8ass="877in cycles *///// hrea/pata_legacy.creref">t;
leivers/ata/pata_winbond_ref=cfref">t;
tpwinbondacti,=0x83ss="line" name="L463"> 463        s8 rivers/a8a/pata_legacy.c#L479" id8"L479878= 1000000000>(t;
|= clF0ss */ 477        <8         8"comment">/* Setup timin8 is s87red */>>>>>>>>ivers/ata/pata_winbond_ <cfref">t;
tpwinbondacti,=0x83,=t;
 463        s8 (t;
leivers/ata/pata_winbond_ref=cfref">t;
tpwinbondacti,=0x85ss="line" name="L463"> 463        s8 href="+c8ct ata_timingf="+code=ap" clreref">t;
|= clF0ss */ 477        <8      t;
tpwinbondacti,=0x85,=t;
 463        s8 an class8a/pata_legacy.c#L484" id8"L48488f">at="line" name="L514"> 514        <8      >(t;
leivers/ata/pata_winbond_ref=cfref">t;
tpwinbondacti,=0x81ss="line" name="L514"> 514        <8 476        <8 an class8a/pata_legacy.c#L487" id8"L48788 in cycles */////ming,"drivers/ata/pata_reref">t;
"L475"ivers/ata/pata_masta_legacy.c#L483mastrs/as="line" name="L396"> 396{
8ctive887in cycles *///// hreeeeeeeeer_lernref="+code=ap" cW83759Aa_legacy.c#L483W83759Aclass="line" name="L519"> 519}
 519}
s8tupadevap, str="srlt;  == cl1F0s=s="line" name="L481"> 481         8drivers/a8a/pata_legacy.c#L491" id8"L4918916(t. 514        <8pan class8"comment">/* Select the 8ight 89ass="sref">ata_timingf="+code=ap" cllocal_irq_salass="sref">clamplocal_irq_sala hrefers/ata/pata_leflagdf">t. 514        <8p     rc = <89href="+code=i>( 477        <8 href="+c8de=rc" class="sref">rc &am89f">ata_devicea_timingf="+code=ap" cloutbref">ioaddrgutbactiv"+code=ap" clasinbegacy_base_port_obactivcl1F206" cl80, cl1F20s="line" name="L514"> 514        <8p     rc |= 89t_piomode>( 463        s8 a href="8de=iowrite8" class="sref8>iowr895ref="+code=i>( 463        s8 an class8a/pata_legacy.c#L497" id8"L49789 in cycles */////mingivers/ata/pata_inbegacy_base_port_obactivcl3F6ss="line" name="L463"> 463        s8dhref="+c8"comment">/* Write the t8mings897in cycles *///// hrea/pata_legacy.cinbegacy_base_port_obactivcl3F6ss="line" name="L463"> 463        s8dhref="+c8de=iowrite8" class="sref8>iowr898= 1000000000>( 463        s8 href="+c8a/pata_legacy.c#L500" id8"L50089red */>>>>>>>>ivers/ata/pata_inbegacy_base_port_obactivcl1F20s="line" name="L463"> 463        s9pan class9"comment">/* Select the 9ight 90class="line" name="L521"> 521
           load the sh9red t90ass="sref">ata_timing,"drv"+code=ap" clasinbegacy_base_port_obactivcl1F206"L475" c80) =f=0s=s="line" name="L481"> 481         9s2"commen9"e=rc" class="sref">rc = <90href="+code=i>( 477        <9s3"commen9"e=rc" class="sref">rc &am90f">ata_devicea_timingggggggggivers/ata/pata_trintta_legacy.c#L483trinttactiv"+code=ap" clasKERN_INFOa_legacy.c#L483KERN_INFO">ata_
"PDC20230-C/20630 VLB #L4 controllre"" class="line" name="L477"> 477        <9s4"commen9"e=rc" class="sref">rc |= 90t_piomode>(
" det;cted.\n"" class)s="line" name="L463"> 463        s9p5"commen9"e=iowrite8" class="sref9> |= 905ref="+code=i>(>>>>>>>   =  483
iowr90 in cycles */////minggggggggg 463        s9 7ref="+c9dcomment">/* Write the t9"L508907in cycles *///// hreeeeeeeeef="+code=ap" cllocal_irq_restorass="sref">clamplocal_irq_restora hrefers/ata/pata_leflagdf">t. 514        <9 8ref="+c9de=iowrite8" class="sref9d tim908= 1000000000>((t. 514        <9 9ref="+c9d/pata_legacy.c#L500" id9>iowr90red */>>>>>>>>}>else=s="line" name="L481"> 481         9drivers/a9a/pata_legacy.c#L511" id9"L5119116(ioaddrgutbactiv0x55, cl1F20s="line" name="L514"> 514        <9pan class9"comment">/* Ensure the 9iming91ass="sref">ata_timinggggggggg 514        <9p2"commen9de=rc" class="sref">rc = <91href="+code=i>( 514        <9p3"commen9de=rc" class="sref">rc &am91f">ata_devicea_timinggggggggg,"drivers/ata/pata_inbegacy_base_port_obactivcl1F206== cllas="line" name="L514"> 514        <9p4"commen9de=rc" class="sref">rc |= 91t_piomode>(ata
"PDC20230-B VLB #L4 "" class="line" name="L477"> 477        <9 href="+c9de=iowrite8" class="sref9>iowr915ref="+code=i>(>>>>>>>e>(
"controllre det;cted.\n"" class)s="line" name="L463"> 463        s9 6ref="+c9a/pata_legacy.c#L517" id9"L51791 in cycles */////mingggggggggclamplocal_irq_restora hrefers/ata/pata_leflagdf">t. 514        <9 7ref="+c9"comment">/* Exit comman9 mode917in cycles *///// hreeeeeeeeer_lernref="+code=ap" cBIOSf">t. 514        <9 href="+c9de=iowrite8" class="sref9>iowr918= 1000000000>( 519}
clamplocal_irq_restora hrefers/ata/pata_leflagdf">t. 514        <9drivers/a9a/pata_legacy.c#L521" id9"L5219216( 519}
 452t."L475"ivers/ata/pata_masta_legacy.c#L483mastrs/as="line" name="L396"> 396{
inh92f">ata_devicea_timingr_lernref="+code=ap" cHT6560Aa_legacy.c#L483HT6560Aclass="line" name="L514"> 514        <9a href="+9ode=set_piomode" class="9ref">92 = 1000000000,"drivers/ata/pata_ht6560begacy_base_portht6560blt; >"L475"ivers/ata/pata_masta_legacy.c#L483mastrs/as="line" name="L396"> 396{
( 514        <9a6ref="+c9a/pata_legacy.c#L527" id9"L527926= 1000000000,"drivers/ata/pata_opti82c611aref">ioaddrgpti82c611alt; >"L475"ivers/ata/pata_masta_legacy.c#L483mastrs/as="line" name="L396"> 396{
/*
 514        <9ahref="+c9"> *      Opti 82C465MV<9span>92gs */
,"drivers/ata/pata_opti82c46xref">ioaddrgpti82c46xlt; >"L475"ivers/ata/pata_masta_legacy.c#L483mastrs/as="line" name="L396"> 396{
 V
 514        <9ref="+cod9=opti82a href="ss="line"9name=930f="+code=inb="drivers/ata/pata_"utospeeds="sref">tp"utospeedlt; >"L475"ivers/ata/pata_masta_legacy.c#L483mastrs/as="line" name="L396"> 396{
ata_timingr_lernref="+code=ap" cSNOOPa_legacy.c#L483SNOOPclass="line" name="L514"> 514        <9rhref="+c9">/**
t. 514        <9s="commen9"> *      opti_syscfg   9 -   93its 519}
 *      @reg: Configur9tion 93 = 10="line" name="L519"> 519}
 *
 476        <9r6ref="+c9"> *      Returns the va9ue of93 in c 477        <9r7ref="+c9"> */
 477        <9rhref="+c9a/pata_legacy.c#L439" id9"L43993f">lo 477        <9r9ref="+c9e=u8" class="sref">u8 477        <9"drivers/9ta/pata_legacy.c#L441" i9="L449416 477        <9signed lo9g  477        <9s="commen9de=u8" class="sref">u8  477        <9s="commen9a/pata_legacy.c#L444" id9"L44494f">at="line" name="L514"> 514        <9s="commen9"comment">/* Uniprocesso9 chip94t_piosref">aivers/ata/pata___iniref">ap, str__inir hree="drivers/ata/pata_y.c#L52inir_oness="sref">clampl.c#L52inir_one href adevadev 396{
 481         9s6ref="+c9de=outb" class="sref">ou9b94 in cycles */ *ap->ap->t.adevadev 514        <9s="commen9de=r" class="sref">r9= ="drivers/ata/pata_pa href=s/ata/pata_legacpa href=slt; >leivers/ata/pata_controllref">ap-> 514        <9shref="+c9de=local_irq_restore" cl9ss="s948= 1000000000unsigna_llopatadevap, str="srlt; s="line" name="L514"> 514        <9s9ref="+c9ef="+code=r" class="sref9>r(/**adevap, strslorclasss="line" name="L514"> 514        <9"drivers/9ta/pata_legacy.c#L451" i9="L459516( opti82c+code=ata_deviceers/ata/pata_legacopslt; >leivers/ata/pata_controllref">ap-> 514        <9"igned lo9a/pata_legacy.c#L452" id9"L45295ass="sref">at *tpy.c#L52id="="drivers/ata/pata_lelds="sref">tpyd"+co>legacy_base_port_ops,
tpy.c#L52id="="dr[ivers/ata/pata_trobs="sref">adevap, strslorclas]s="line" name="L514"> 514        <9s="commen9">/*
, 1, 4)hossa>, >leivers/ata/pata_NULLs="sref">tpNULL"+cos="line" name="L514"> 514        <9s="commen9"> *      Opti 82C611A
95f">ata_deviceta_port_operations ioaddr. 514        <9s="commen9"> *
adev 514        <9shref="+c9"> *      This controlle9 supp955ref="+code=ita_port_operations adev 514        <9s6ref="+c9"> */
ap, str__iomemref="+code=ata_device" caddef">ap-><" cadderef=,c+code=ata_devicectrlcaddef">ap-> 514        <9s="commen9a/pata_legacy.c#L458" id9"L458957in cycles */f="+code=ap" clu">/**"L475"ivers/ata/pata_masta_legacy.c#L483mastrs/as ? 0:g   =  514        <9shref="+c9"+code=opti82c611a_set_p9omode958= 1000000000="drivers/ata/pata_refi82c611a_port_orefclass="line" name="L514"> 514        <9s9ref="+c9                        9   st9516 514        <9"drivers/9ta/pata_legacy.c#L461" i9="L46960in cycles */f="+code=ap" clitrdy->ap->t. 514        <9 href="+c9de=u8" class="sref">u8  452leivers/ata/pata_tlatforma class_a_lestre_simplf="sref">adevadevadevap, strslorclas,civers/ata/pata_NULLs="sref">tpNULL"+co, ass="line" name="L483"> 483
ata_device,"drivers/ata/pata_IS_ERRs="sref">tpIS_ERR hrefers/ata/pata_lepacy.c#L396" id="L3p6" clas)s="line" name="L396"> 396{
clo96t_piomode>(tpPTR_ERR hrefers/ata/pata_lepacy.c#L396" id="L3p6" clas)s="line" name="L483"> 483
 476        <9 6ref="+c9de=u8" class="sref">u8 tpEBUSYa hrs="line" name="L519"> 519}
ata_device,"drivers/ata/pata_6" m_#Lquest_a_leon.c#L396" id="L36" m_#Lquest_a_leon href=clock" class="sref"pacy.c#L396" id="L3p6" clas&
"19}
tpNULL"+co ||="line" name="L519"> 519}
/* Enter confi9urati968= 1000000000>( 524        .9"        9de=ioread16" class="sref9>iore96red */>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
"19}
tpNULL"+cos="line" name="L396"> 396{
t. 519}
 452tpENOMEMa hrs="line" name="L519"> 519}
/* Read VLB cl9ck st97f">ata_devicecode=ata_device" caddef">ap-><" cadderef=>leivers/ata/pata_6" m_ioclassmssref">ioaddr6" m_ioclassmss href=clock" class="sref"pacy.c#L396" id="L3p6" clas& 483
c9ockcode=ata_devicectrlcaddef">ap->leivers/ata/pata_6" m_ioclassmssref">ioaddr6" m_ioclassmss href=clock" class="sref"pacy.c#L396" id="L3p6" clas& 483
ap-><" cadderef=>|| !code=ata_devicectrlcaddef">ap-> 396{
/* Get the tim9ng da97 in cycles */////minggotott. 519}
tpyd"+co&adevleivers/ata/pata_trobs="sref">adev7w.c#L483mastrs/a3=pair>/**tpNULL"ref">ata/p *eeeeeeproevicepair>/**tpNULL"re="commen8a/patad="L396">ata/pata_refi82c611a_port_o+code3ode=ref="+code=ref="+code=ype hre>leivers4        <8p     ((>>>>>>>R036" 7 hracontrollre appears to bs me="Lles37 hra339d */<9span>>>>>>>>>ivers/ataref="+c9a/pata_legacy.c#L476" id9"L476975ref="+code=i,"dr!code=ata_device" caddef">ap->f8"+code=9air" class="sref8>pair88969adevtp,
tp 483
ap-> 469 98line" name="L514"p6" clas&adode=i>(>>>>>>>R036" 7 hracontrolliowrite8"e=ata_timing_co8pute"88h9ef="+98"> 452ap->f;<" cadde
ioaddr6" m_iocivers/ata/pata_lehossetevadollreti82&t="+ * 8ref="+c9de=ata_timing_me8ge" c889_piom9de>(t;
9a hrerlt;9>leivers/ata/pata_winbon9_ref=98f="+code=ap" cPTR_ERRs="srefivers/ata/pata_lehossetL514"> 514        <9"drivers/9ta/pata_legevap-> 514      e=type="sref">adevt. 514      ="+c9                        ata/pata_refi82c611n cycles SLAVE_POSL396"> 396{
n cycles SLAVE_POSL    ati82c611a_set_p9omode958= 1000000000="drivers/acy.c#L451" i9="L459516(8c9ive8898store" cl9ss="s948= 10000000ivers/ata/pata_lehossetL514"> 514      e="+c9               p         ata/pata_refi82c611rs/ata/pata_trobs="sref">adev 99c9"+code=opti82c611a_set_p9oivers/ata/pata_lehossetL514"> 514      iok" class="sref"pacy.c36" clasef="dri8ers/a821cmd="+code=acy.c#L396" imd="+co="liim9ng da97 in cycllock" class="sref"pacy.c#L396" idacy.c#L451" i9="L459516(ap9 str=99a hreeeeeeeeeL52id="="dr[iveivers/ata/pata_lehossetL514"> 514      iok" class="sref"pacy.c36" clasef="dri8ers/a821alt    usck" class="sref"pacyalt    usck" c="liim9ng da97 in cycl"+code=ata_deviceacy.c#L396" id="L36" class="line" name="L514"> 514     lagdclass9"line" name="L514"> 514<9a>   9916" class="sref9>iore9716 514      iok" class="sref"pacy.c36" clasef="dri8ers/a821ctode=ata_deviceacy.c#L39sref"pacy.c#L396" id="L3p6" "+code=ata_deviceacy.c#L396" id="L36" class="line" name="L514"> 514     liowrite8"mplocal_irq_sala hrefers9ata/p99 name="L452"> 452 5sff_st48PFLAy.c#L483mastrs/a ="+sff_st48PFLAyclas"+code=pio_mode" ita/ivers/ata/pata_lehossetL514"> 514      iok" class="sref"pacy.c36" clasa_devicectrlcaddef">ap-> 49799ssmssref">ioaddr6" m_iocivers/ata/pata_lehossetL514"> 514      rs/ata/pata_trobs="sref">adollreti82&(<_devicectrlcaddef">ap->>(t;
99t_piomod9>(,
1 "6"/* Read VLB cl9ck st97f">ata=clock" class="sref">c9ockcodea_devicectrlcaddef">ap->(ap->(tp,
tpadc9ockad ad/* Enter confi9urati968= 1000000000>(<97in cycl9s *///// hrea/pata_legac9.cinb9gacy_base_port_obactivvvvvvvvvvvvvvvvvntrollreti82&ap->1098code=ap" cllds="sref">tpyd">(
ap->ap109f=>10914        <9ref="a/pata_legacy.c#L476" id9"L476975ref="+code=i,"dr!code=ata_device" caddef">ap->1092= 10000109line" name="L514"> 514<109li>10916" class="sref9>iore9716ap->109 name="L452"> 452 396{
        <9 ="+code=ata_timi        <9 ="liim9ng da97 in cycleioaddr1094= 10000109s="line" name="L477"> 4109s=>109*
109>ioaddr6"/a>
Nothr hrfound means wio 477        <9signed lo9g >(ap->(tioaddr1098= 10000109 */////mingivers/ata/pa109 *>109483mastrs/as= 514      giv"sref">adevad 514        <9 8ref="+c9de=iowri1099= 10000109 *///// hrea/pata_legac109 *>109air>/**tpNULp6" clas& <_absomme"+code=ata_timissr> <_absomm11a_port_o+code3ode=3
tpwinbondacti>1018= 1000010"sref9d tim908= 1000000010"sr>10"scy_base_port_obactivvvvvvvvvlreti82&atadclas="drivers/ata/pata_lessref">ioaddr1011= 1000010500" id9>iowr90red */10">>>>}>else=s="line" name="L481"> 481    ="line" name="L396"> 396{
        <9 ="+code=ata_timi        <9 ="liim9ng da97 in cycleioaddr1012= 1000010 ioad10 10"tbactiv0x55, cl1F20s="line" nh    9 0clas="drivers/ata/pata_lessref">ioaddr1013= 1000010gggg 45210"ssmssref">ioaNOOPa_legacy.c#L483SNOOPclass="line" n10"5= 1000010>rc |= 91t_piomoderc>10"583mastrs/as=,
tpada_devicectrlcaddef">ap->10"3itsap-> 463        s9 10463>10"">ap->        <9 hrefun="+c9de=="+code=ata_timi        <9 hrefun="+c9de=11a_port_o+code3ode=ref="+code=ref="+code=ype ha_devicectrlcaddef">ap->10"483mastrs/as=h    9 ="commen9ef="+cc#L483itrdyclastlt; >"L475"ivers/ata/pata_masta_legacy.c#L483ma10"9= 1000010ment">/* Exit comman9 mo10men>10"    .8"ivers/ata/pata_masta_legacy.c#L483ma1028= 1000010 name="L519"> 519}
<10 na>10 n
 519}
t.10 /a>        <8"drivers/8ta/pata_lega"sref">a"+co_special_casesa_legas="line"linespecial cases/a>}
10 lass="line" name="L477"> 477     : PCI <9 hre="+code=ata_timing" cl8ss="s86ass=">10 eDisass=" controllreticlass="/a>    ma9de=: seivers/a>NUwiofind tary toma9de=ta_timing" cl8ss="s86ass="10 ref="drivers/ata/p *eeeeee@probs: P ma9de=: seivers/a>NUwiofind tary tosecondaryta_timing" cl8ss="s86ass=">10 ="L477"> 477        <8 hrta_timing" cl8ss="s86ass=" *
tosmall number"L47vendor/a> clac9">ed earlyaPCI y toL477"> 477ta_timing" cl8ss="s86ass=""L>10 line" name="L477"> 477         47 ber hrPCI visible9416clo8k;1038= 1000010; >"L475"ivers/ata/pata_10; >>10; eeeeeattach aiy.c#L5t,"derfa     <<9 hre=z"re. INUwio    <8 =" know abouegieghz"nkhz" 76"> 47ck" clcommen8"+code=clock" class="sre8">clo8k;1031= 1000010TI46Xclass="line" name="10TI4>10;me="L477"> 477        <9"drivers/ahz" right ivers/ anyway941610;are PIO hrdewsreclass="line" name="L477"> 477        <9signed lo9g ata_timingr_lernref=10ef">10;ivers/ata/p *eeeeeeadrume do not sup="sr I10;4= 1000010 514        <9rhref=10 51>10;/a>        <   <9shref="+c9"> *    class="sref">u8         <9s="commen9">ci <9 ="+code=ata_timici <9 4ass=t_operations ="+code=ata_timi">ad 514       imary=ers/ata/pata_lfadmarytaadt.<10cod>10;reeeeeeeeeeeeeeeeeivers/ata/pata_trintta_legacy.c#L483trinnnnnnnnnnnnitrd4"> 514     secondary9"L45295ass="sreecondarytaadode=i>(>>>>>>>R036" 7 hracontro10;6= 10000109"> *      opti_syscfg  109">>10;="L47ata_winbonds="sref">tpwinbondacti>1037= 100001093 = 10="line" name="L511093 >10;">ap->
Cyrix CS5510 pre SFF MWDMA y toonkhz" bridge  name="L477"> 477        <9signed lo9g 10;+code=ap" cllds="sref">tpyd" ="+code=ata_timi">ad6{
}
aptpyd" ="+code=ata_timi">ad6{
 020s="line" name="L463"> 463        s910;9= 1000010code=iy.c#L52inir_oneeee10cod>10;air>/**tp 514       imary=ers/ata/pata_lfadmarytaad =d4"> 514     secondary9"L45295ass="sreecondarytaad =d15"ivers/ata/pata_masta_legacy.c#L483ma1048= 1000010c9a/pata_legacy.c#L439" 10c9a>10c9ir>/**tp10c2>ap->
Cyrix CS5520 pre SFF MWDMA y toonkhz" bridge  name="L477"> 477        <9signed lo9g 10cDRV_NAME="sref">adevad6{
}
aptpyd" ="+code=ata_timi">ad6{
 020s="line" name="L463"> 463        s91044= 1000010"+class="line" name="L4710"+c>10ce="L483"> 483
 514       imary=ers/ata/pata_lfadmarytaad =d4"> 514     secondary9"L45295ass="sreecondarytaad =d15"ivers/ata/pata_masta_legacy.c#L483ma1045= 1000010iref">ap, str__inir 10ire>10c"> 514        <9a href=5"ivers/ata/pata_masta_legacy.c#L483ma1046= 1000010ir_one href 10c6>>>}>else=s=8"ivers/ata/pata_masta_legacy.c#L483ma1047= 1000010e=ata_devicecontrollref"10e=a>10c">ap->
I477l MPIIX -     y toonknonkPCI side"L47bridge  name="L477"> 477        <9signed lo9g r9= 10c+code=ap" cllds="sref">tpyd" ="+code=ata_timi">ad6{
}
<8086loref">aptpyd" ="+code=ata_timi">ad6{
  463        s91049= 1000010     <9shref="+c9de=loca10   >10ccycles *///// hreeeeeeeeer_lernref="u" class="li000000u   ="commen9ef="+cc483itrdyclastlt;"L475"ivers/ata/pata_masta_legacy.c#L483ma1058= 1000010( >adefig_wor"line" name="L39ici /a> >adefig_wor"11a_port_o+code3ode=r="+code=ata_timi">adap->  463        s91052= 1000010L52id="="drivers/ata/pat10L52>10 521
y to cheaenabled  name="L477"> 477        <9signed lo9g /*10<_port_obactivcl1F20s="line" name="L514"> 514c483itrdyclastlt;"L47port_obac40">rc = <91href="+code=i>(tpNULL"+cos="line10f">>10 514 4"> 514     secondary9"L45295ass="sreecondarytaad =d15"ivers/ata/pata_masta_legacy.c#L483ma1055= 1000010="line" name="L514"> 51410="l>1010        <9 href="+c9de=iow514 4"> 514       imary=ers/ata/pata_lfadmarytaad =d15"ivers/ata/pata_masta_legacy.c#L483ma1057= 1000010="+c9"> */
->10<. 514        <910L51>10L5   .8"ivers/ata/pata_masta_legacy.c#L483ma1061= 1000010<9"drivers/9ta/pata_lega10<9">10LNULLs="sref">tpNULL"+cos="line" name="10L2= 1000010;10L2a>         *    class="sref">u8  * ing" _7ref_vl"> 396{
 = <91href="+code=i>(10L3"L47ata_winbonds="sref">tpwinbondacti>1064= 1000010">tpNULL"+co, ass="l10">t>10L4>ap->
If taran>
 82C46Xrs/apresommofind ouegwz"re hz" chann"L5  name="L477"> 477        <9signed lo9g 10L    <9s="commen    tpwinbondacti>1066= 1000010o96t_piomode>(10Lacy_base_port_obactivcata_legacy.c#L468" id9"L463/463MV"+code=ap" cl#Lnata_legacy.c#L468" id9"L465MV"+code=ap" cl#ta_winbonds="sref">tpwinbondacti>1067= 1000010" class="sref"9khz10Lacy_base_port_obactivcata_legacy.c#L468" id9"L465MVA"+code=ap" cl#Lnata_legacy.c#L468" id9"L465MVB" name="L514"> 514        <9p4"commen9de=rc" c10L8= 100001096" id="L3p6" clas&<1096">10L.10Lstore" cl9ss="s948= 1000000008class="li000000u8a>   ="commen9ef="+cchan="line" name="L48han=taad =d15"ivers/ata/pata_masta_legacy.c#L483ma1078= 1000010     .9"        9de=iore10   >10  tore" cl9ss="s948= 1000000008class="li000000u8a>   ="commen9ef="+cctrd9"L476975ref="+ctrdtaad =das="line" name="L396_syscfg9"drivers/9ta/patti_syscfg11a_p0x30_port_obacC0_po/a>o/a> 65"ivers/ata/pata_masta_legacy.c#L483ma1071= 1000010quot;" class) =f="+code=10quo>10 NULLs="sref">tpNULL"+cos="line" name="1072= 1000010/a>{
 396{
/*
y/9ta/pma9de=     477        <9signed lo9g  452rc &am91f">ata_devicea_timinggggggggg,"drivers/ata/pata_inm91f">ata_devi96class="line" name="L452"> 452Lnata_legacy.c#L468" id9"L46: Oref 82C46%s chipseivacy.c#LKERN_INFO">atatpwinbondacti>1074= 1000010ref=>leivers/ata/pata_6"10ref>10 givers/ata/pata_trintta_legacy.c#L483trinttactiv"+code=ap" cllass="sref9>iore9716ap->10 >ioaddr6" m_i="commen9ef="+cctrd9"L476975ref="+ctrdtaad == 3rc = <91href="+code=i>(10 acy_base_port_obactivc"commen9ef="+cchan="line" name="L48han=taad =das="line" name="L396_syscfg9"drivers/9ta/patti_syscfg11a_p0x3F_port_obac20    2 :d15"ivers/ata/pata_masta_legacy.c#L483ma1077= 1000010f=>|| !code=ata_devicect10f=>>10 ">ap->ap->C"+coaenabled     477        <9signed lo9g 7w.c#L483mas10e=r>10 eeeeeeattach aiy.c#L5t,"derfffffffffffMVB wiomayohave two chann"L5< name="L477"> 477        <9signed lo9g  463        s91081= 1000010air" class="sref8>pair8810air>10sgacy.c#L500" id8"L50089re=pio_mode" ita/chan="line" name="L48han=taad == 20s="line" name="L463"> 463        s91082= 1000010s="line" name="L463"> 4610s=">10stbactiv0x55, cl1F20s="line" name="L514"> 514href="+ing" _ad"line" name="L396ref="+ing" _ad"11a_p0x1F0, 14adev10s_port_obactivcl1F20s="line" name="L514"> 514href="+ing" _ad"line" name="L396ref="+ing" _ad"11a_p0x170, 15adev10sgivers/ata/pata_trint8"ivers/ata/pata_masta_legacy.c#L483ma1085= 1000010de=ata_timing_me8ge" c8810de=>10sreeeeeeeeeeeeeeeeeive m_i="commen9ef="+cctrd9"L476975ref="+ctrdtaad ort_ob4rc = <91href="+code=i>(leivers/ata/pata_winbon10>le>10s/a>        <9 href="+c9de=iowrite8" class="srref="+ing" _ad"line" name="L396ref="+ing" _ad"11a_p0x170, 15adev10sacy_base_port_obactiv"L51"ivers/ata/pata_masta_legacy.c#L483ma1088= 1000010"ivers/ata/pata_masta_le10"iv>10s. 514href="+ing" _ad"line" name="L396ref="+ing" _ad"11a_p0x1F0, 14adev8c10=ac>10s9>>>}>else=s=8v"L51"ivers/ata/pata_masta_legacy.c#L483ma1098= 100001000000000s="line" name="L10000>1000cy_base_port_obactivc"commen9ef="+chref="+ing" _ad"line" name="L396ref="+ing" _ad"11a_p0x1F0, 14adevap10ef=>1001   .8"ivers/ata/pata_masta_legacy.c#L483ma1092= 1000010"line" name="L514"> 514<10"li>1002ULLs="sref">tpNULL"+cos="line" name="1093= 1000010mplocal_irq_sala hrefers10mpl>1003a>         *    class="sref">u8  * qdi65_id,"difyoperations  &am91f">ata_devi08class="li000000u8a>   ="commen9ef="+cc483itrdyclastlt;"L47   ="commen9ef="+ccesta/pata_trobs="res11a_,ivers/ata/pata_pa href=s/ata/pf="+code=t" clasta_legacy.crc = <91href="+code=i>( 410ss=>1004"L47ata_winbonds="sref">tpwinbondacti>1095= 1000010ode=ap" clasinbegacy_bas10ode>100    <9s="commen     >(
C"+coacar   name="L477"> 477        <9signed lo9g (100e" name="L476"> 4="L514"> 514c483itrdyclastlt;"L47port_obacF0)""srefC20s="line" name="L463"> 463        s91098= 1000010s */////mingivers/ata/pa10s *>100.QD6500: singl" chann"L  name="L477"> 477        <9signed lo9g 100air>/**tpNULL"ref">ata/p *ec483itrdyclastlt;"L47port_ob8rc = <91href="+code=i>(110scy_base_port_obactivvvvvvvvvla>
Disabled ?  name="L477"> 477        <9signed lo9g ap119f=>11914        <9ref=""""""""" href=5"ivers/ata/pata_masta_legacy.c#L483ma1192= 10000119line" name="L514"> 514<119li>110tbactiv0x55, cl1F20s=c"commen9ef="+chref="+ing" _ad"line" name="L396ref="+ing" _ad"11a_ppa href=s/ata/padeoperations  514c483itrdyclastlt;"L47port_obac01], 14 +e="L514"> 514c483itrdyclastlt;"L47port_obac01)#ta_winbonds="sref">tpwinbondacti>1193= 10000119plocal_irq_sala hrefers119pl>110_port_obactivcl1F20s="line" nnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnn"L514"> 514QDI6500483itrdyclastltQDI6500"L47 4119s=>110ssmssref">ioaNOOPa_legacy.c#L483SNOOPclass="line" n1195= 10000119de=ap" clasinbegacy_bas119de>110>ioaddr6" m_i4="L514"> 514c483itrdyclastlt;"L47port_obacF0)""srefA0)"||e="L514"> 514c483itrdyclastlt;"L47port_obacF0)""sref520s="line" name="L463"> 463        s91196= 10000119/a>>(QD6580: dual chann"L  name="L477"> 477        <9signed lo9g (110acy_base_port_obactiv>NULp6" clas&
 463        s91198= 10000119 */////mingivers/ata/pa119 *>110. 514releasede" ita/pata_legacy.ci, leasede" itaa hr119air>/**tp11"scy_base_port_obactivNOOPa_legacy.c#L483SNOOPclass="line" n1111= 1000011500" id9>iowr90red */11">>>>}>else=s="line" n="commen9ef="+ccesta/pata_trobs="res11a_im9ng da97 in cyclln"> 396{
ioad11 11"tbactiv0x55, cl1F20s=cata_legacy.cs="commen9">Singl" chann"L >. 477        <9signed lo9g  452tpyd">(sta/pata_trobs="res11a_iort_ob1rc = <91href="+code=i>(111givers/ata/pata_trintta_legacc"commen9ef="+chref="+ing" _ad"line" name="L396ref="+ing" _ad"11a_ppa href=s/ata/padeoperations  514c483itrdyclastlt;"L47port_obac01], 14 +e="L514"> 514c483itrdyclastlt;"L47port_obac01)#ta_winbonds="sref">tpwinbondactee11"5= 1000011>rc |= 91t_piomoderc>111reeeeeeeeeeeeeeeeeivers/ata/pata_trintta_legacy.c#L483trinnnnnnnnnnnn"L514"> 514QDI6580483itrdyclastltQDI6580"L47111acy_base_port_obactiv"L51
Dual chann"L >. 477        <9signed lo9g  463        s9 11463>111acy_base_port_obactivta_legacc"commen9ef="+chref="+ing" _ad"line" name="L396ref="+ing" _ad"11a_p0x1F0, 14111.
 cheaco, rport_obac04  name="L477"> 477        <9signed lo9g /* Exit comman9 mo11men>111air>/**tp 519}
<11 na>112scy_base_port_obactivNOOPa_legacy.c#L483SNOOPclass="line" n1121= 1000011t.112tbactiv0x55, NOOPa_legacy.c#L483SNOOPclass="line" n1123= 1000011d9"L52292class="line" na11d9">11 lass=NOOPa_legacy.c#L483SNOOPclass="line" n1124= 1000011; >"L475"ivers/ata/pata_11; >>112*
11 ref="       *    class="sref">u8  * ing" _qdi_vl"> 396{
 = <91href="+code=i>("L475"ivers/ata/pata_11; >>112="L47ata_winbonds="sref">tpwinbondacti>11 7= 1000011Bclass="line" name="L51411Bcl>112acy_base_portvers/ata/pata_pa href=s/ata/p="+c9                        9   st9516 514<1128= 1000011>"L475"ivers/ata/pata_ma11>"L>112.  514<1138= 1000011; >"L475"ivers/ata/pata_11; >>113n
 477        <9signed lo9g "L475"ivers/ata/p11edl>11;are PIO hrdewsreclass="line""""""""""driverC"+coaeach> cssible>QD65xx base 36" es7ta_timing" cl8ss="s86ass="ata_timingr_lernref=11ef">113lass="line" name="L477"> 477"""""""""name="L477"> 477        <9signed lo9g         <9rhref=11 51>113*
t.<11cod>11;reeeeeeeeeeeefore="L514"> 514itions tpyd"itions tpyd"itions  463        s911;6= 10000119"> *      opti_syscfg  119">>113acy_base_port_obactivvers/ata/pata_pa href=s/ata/pf="+code=t" clasta_legacy.cim9ng da97 in cyclqdoperations tpyd"itions  *ata_devi08class="li000000u8a>   ="commen9ef="+cc483itrdyclastlt;"L47 *11;+code *11;air>/ *11c9ir>/**tptpyd">(io_mode" ita/pata_legacy.ci, 8,/
 463        s91141= 1000011drivers/ata/p *"+class="11dri>114>>>>}>else=s="line" name="L481a>
C"+coaforeaacar <"name="L477"> 477        <9signed lo9g 114tbactiv0x55, cl1F20s="line" name="L514"> 514hocal_irq_sav/a95 = 100000000hocal_irq_sav/a hr114_port_obactivcl1F20s="line" naa>
Iohave no h/w that needs 477        <9signed lo9g 114eDisass=" controllreticlass===========================s/apresommoinkhz" rs/tor   477        <9signed lo9g ap, str__inir 11ire>11c"> 514        <9a"line" name="L514"> 514c483itrdyclastlt;"L47pm9ng da97 in cyclln"> 396{
 114/a>        <9 href="+c9de=iowrite8" class="sudelayclass="li000000udelaya hrap->114acy_base_port_obactivta_legacc"commen9ef="+cout"> 396{
r9= 114. 514udelayclass="li000000udelaya hrap-> 514cesta/pata_trobs="res11a_im9ng da97 in cyclln"> 396{
ap->( 514udelayclass="li000000udelaya hrap->  396{
ap->11 521 514udelayclass="li000000udelaya hrap->/*11<_port_obactivcl1F20s="line" name="L514"> 514hocal_irq_restor/a95 = 100000000hocal_irq_restor/a hrtpNULL"+cos="line11f">>115*
 51411="l>11
FaiL  name="L477"> 477        <9signed lo9g 11        <9 href="+c9de=iowds="sref">tpyd">(sta/pata_trobs="res11a_i"sref190s="line" name="L463"> 463        s91157= 1000011="+c9"> */
 514releasede" ita/pata_legacy.ci, leasede" itaa hr->11<. 514        <911L51>116scy_base_port_obactivvvvvvvvvla>
Prefe/ahz" presomre="est  name="L477"> 477        <9signed lo9g 116gacy.c#L500" id8"L500ta_legacc"commen9ef="+cc483itrdyclastlt;"L47pm9ng da97 in cyclln"> 396{
ap->116lass="line" name="L521"> 521 514udelayclass="li000000udelaya hrap->116_port_obactivcl1F20s="line" naa>
C"+coa cheatgree/awitha cheaseiv name="L477"> 477        <9signed lo9g tpNULL"+co, ass="l11">t>116givers/ata/pata_trintta_legac"> 4="L514"> 514c483itrdyclastlt;"L47port_ob2_po/a>o/a> 1i"srsref">tpyd"itions  = <91href="+code=i>(116reeeeeeeeeeeeeeeeeivers/ata/pata_trinng da97 in cyclqdi65_id,"difyoperations  &am91f">ata_devic483itrdyclastlt;"L47ap->>(11Lacy_base_port_obactivta_legacc"commen9ef="+cceleasede" ita/pata_legacy.ci, leasede" itaa hr11Lacy_base_port_obactivNOOPa_legacy.c#L483SNOOPclass="line" n1168= 100001196" id="L3p6" clas&<1196">11L.116    .8"ivers/ata/pata_masta_legacy.c#L483ma1178= 1000011     .9"        9de=iore11   >117n
117hrees="line" name="L519"> 519}
{
 47L477"> 477ta_timing" cl8ss="s86ass="iowr97clas11 cl>117lass="line" name="L477"> 477117eDisass=" controllreticlass="/a>   Atame= 76"> 47IDE7L477"> 477 by scannr hrhz" usual IRQ/ cheasuspects9416117ref="drivers/ata/p *eeeeee@probs: PRight now wio  a_legscanrhz" id,0    117="L477"> 477        <8 hrobs: PforenonkPCI systems oresystems withanokPCI IDE776"> 47>.  *
If you fix that noteghz"re /a> special cases="+coonsider like VLB416 477        7w.c#L483mas11e=r>11 eeeeeeattach aiy.c#L5t,"derf name="L477"> 477        <9signed lo9g  *    class="sref">u8  = <91href="+code=i>( 4611s=">11stbact="line" name="L463"> 463        s911s3= 1000011e=ata_timing_co8pute"88h11e=a>11s_port_obactivitrdyclasta_legacy.itions  514<11s4= 1000011
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