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8#ifndef __LINUX_MII_H__
9#define __LINUX_MII_H__
10
11#include <linux/types.h>
12#include <linux/ethtool.h>
13
14
15#define MII_BMCR 0x00
16#define MII_BMSR 0x01
17#define MII_PHYSID1 0x02
18#define MII_PHYSID2 0x03
19#define MII_ADVERTISE 0x04
20#define MII_LPA 0x05
21#define MII_EXPANSION 0x06
22#define MII_CTRL1000 0x09
23#define MII_STAT1000 0x0a
24#define MII_MMD_CTRL 0x0d
25#define MII_MMD_DATA 0x0e
26#define MII_ESTATUS 0x0f
27#define MII_DCOUNTER 0x12
28#define MII_FCSCOUNTER 0x13
29#define MII_NWAYTEST 0x14
30#define MII_RERRCOUNTER 0x15
31#define MII_SREVISION 0x16
32#define MII_RESV1 0x17
33#define MII_LBRERROR 0x18
34#define MII_PHYADDR 0x19
35#define MII_RESV2 0x1a
36#define MII_TPISTATUS 0x1b
37#define MII_NCONFIG 0x1c
38
39
40#define BMCR_RESV 0x003f
41#define BMCR_SPEED1000 0x0040
42#define BMCR_CTST 0x0080
43#define BMCR_FULLDPLX 0x0100
44#define BMCR_ANRESTART 0x0200
45#define BMCR_ISOLATE 0x0400
46#define BMCR_PDOWN 0x0800
47#define BMCR_ANENABLE 0x1000
48#define BMCR_SPEED100 0x2000
49#define BMCR_LOOPBACK 0x4000
50#define BMCR_RESET 0x8000
51
52
53#define BMSR_ERCAP 0x0001
54#define BMSR_JCD 0x0002
55#define BMSR_LSTATUS 0x0004
56#define BMSR_ANEGCAPABLE 0x0008
57#define BMSR_RFAULT 0x0010
58#define BMSR_ANEGCOMPLETE 0x0020
59#define BMSR_RESV 0x00c0
60#define BMSR_ESTATEN 0x0100
61#define BMSR_100HALF2 0x0200
62#define BMSR_100FULL2 0x0400
63#define BMSR_10HALF 0x0800
64#define BMSR_10FULL 0x1000
65#define BMSR_100HALF 0x2000
66#define BMSR_100FULL 0x4000
67#define BMSR_100BASE4 0x8000
68
69
70#define ADVERTISE_SLCT 0x001f
71#define ADVERTISE_CSMA 0x0001
72#define ADVERTISE_10HALF 0x0020
73#define ADVERTISE_1000XFULL 0x0020
74#define ADVERTISE_10FULL 0x0040
75#define ADVERTISE_1000XHALF 0x0040
76#define ADVERTISE_100HALF 0x0080
77#define ADVERTISE_1000XPAUSE 0x0080
78#define ADVERTISE_100FULL 0x0100
79#define ADVERTISE_1000XPSE_ASYM 0x0100
80#define ADVERTISE_100BASE4 0x0200
81#define ADVERTISE_PAUSE_CAP 0x0400
82#define ADVERTISE_PAUSE_ASYM 0x0800
83#define ADVERTISE_RESV 0x1000
84#define ADVERTISE_RFAULT 0x2000
85#define ADVERTISE_LPACK 0x4000
86#define ADVERTISE_NPAGE 0x8000
87
88#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
89 ADVERTISE_CSMA)
90#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
91 ADVERTISE_100HALF | ADVERTISE_100FULL)
92
93
94#define LPA_SLCT 0x001f
95#define LPA_10HALF 0x0020
96#define LPA_1000XFULL 0x0020
97#define LPA_10FULL 0x0040
98#define LPA_1000XHALF 0x0040
99#define LPA_100HALF 0x0080
100#define LPA_1000XPAUSE 0x0080
101#define LPA_100FULL 0x0100
102#define LPA_1000XPAUSE_ASYM 0x0100
103#define LPA_100BASE4 0x0200
104#define LPA_PAUSE_CAP 0x0400
105#define LPA_PAUSE_ASYM 0x0800
106#define LPA_RESV 0x1000
107#define LPA_RFAULT 0x2000
108#define LPA_LPACK 0x4000
109#define LPA_NPAGE 0x8000
110
111#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
112#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
113
114
115#define EXPANSION_NWAY 0x0001
116#define EXPANSION_LCWP 0x0002
117#define EXPANSION_ENABLENPAGE 0x0004
118#define EXPANSION_NPCAPABLE 0x0008
119#define EXPANSION_MFAULTS 0x0010
120#define EXPANSION_RESV 0xffe0
121
122#define ESTATUS_1000_TFULL 0x2000
123#define ESTATUS_1000_THALF 0x1000
124
125
126#define NWAYTEST_RESV1 0x00ff
127#define NWAYTEST_LOOPBACK 0x0100
128#define NWAYTEST_RESV2 0xfe00
129
130
131#define ADVERTISE_1000FULL 0x0200
132#define ADVERTISE_1000HALF 0x0100
133#define CTL1000_AS_MASTER 0x0800
134#define CTL1000_ENABLE_MASTER 0x1000
135
136
137#define LPA_1000LOCALRXOK 0x2000
138#define LPA_1000REMRXOK 0x1000
139#define LPA_1000FULL 0x0800
140#define LPA_1000HALF 0x0400
141
142
143#define FLOW_CTRL_TX 0x01
144#define FLOW_CTRL_RX 0x02
145
146
147#define MII_MMD_CTRL_DEVAD_MASK 0x1f
148#define MII_MMD_CTRL_ADDR 0x0000
149#define MII_MMD_CTRL_NOINCR 0x4000
150#define MII_MMD_CTRL_INCR_RDWT 0x8000
151#define MII_MMD_CTRL_INCR_ON_WT 0xC000
152
153
154struct mii_ioctl_data {
155 __u16 phy_id;
156 __u16 reg_num;
157 __u16 val_in;
158 __u16 val_out;
159};
160
161#ifdef __KERNEL__
162
163#include <linux/if.h>
164
165struct ethtool_cmd;
166
167struct mii_if_info {
168 int phy_id;
169 int advertising;
170 int phy_id_mask;
171 int reg_num_mask;
172
173 unsigned int full_duplex : 1;
174 unsigned int force_media : 1;
175 unsigned int supports_gmii : 1;
176
177 struct net_device *dev;
178 int (*mdio_read) (struct net_device *dev, int phy_id, int location);
179 void (*mdio_write) (struct net_device *dev, int phy_id, int location, int val);
180};
181
182extern int mii_link_ok (struct mii_if_info *mii);
183extern int mii_nway_restart (struct mii_if_info *mii);
184extern int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd);
185extern int mii_ethtool_sset(struct mii_if_info *mii, struct ethtool_cmd *ecmd);
186extern int mii_check_gmii_support(struct mii_if_info *mii);
187extern void mii_check_link (struct mii_if_info *mii);
188extern unsigned int mii_check_media (struct mii_if_info *mii,
189 unsigned int ok_to_print,
190 unsigned int init_media);
191extern int generic_mii_ioctl(struct mii_if_info *mii_if,
192 struct mii_ioctl_data *mii_data, int cmd,
193 unsigned int *duplex_changed);
194
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196static inline struct mii_ioctl_data *if_mii(struct ifreq *rq)
197{
198 return (struct mii_ioctl_data *) &rq->ifr_ifru;
199}
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215static inline unsigned int mii_nway_result (unsigned int negotiated)
216{
217 unsigned int ret;
218
219 if (negotiated & LPA_100FULL)
220 ret = LPA_100FULL;
221 else if (negotiated & LPA_100BASE4)
222 ret = LPA_100BASE4;
223 else if (negotiated & LPA_100HALF)
224 ret = LPA_100HALF;
225 else if (negotiated & LPA_10FULL)
226 ret = LPA_10FULL;
227 else
228 ret = LPA_10HALF;
229
230 return ret;
231}
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242static inline unsigned int mii_duplex (unsigned int duplex_lock,
243 unsigned int negotiated)
244{
245 if (duplex_lock)
246 return 1;
247 if (mii_nway_result(negotiated) & LPA_DUPLEX)
248 return 1;
249 return 0;
250}
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260static inline u32 ethtool_adv_to_mii_adv_t(u32 ethadv)
261{
262 u32 result = 0;
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264 if (ethadv & ADVERTISED_10baseT_Half)
265 result |= ADVERTISE_10HALF;
266 if (ethadv & ADVERTISED_10baseT_Full)
267 result |= ADVERTISE_10FULL;
268 if (ethadv & ADVERTISED_100baseT_Half)
269 result |= ADVERTISE_100HALF;
270 if (ethadv & ADVERTISED_100baseT_Full)
271 result |= ADVERTISE_100FULL;
272 if (ethadv & ADVERTISED_Pause)
273 result |= ADVERTISE_PAUSE_CAP;
274 if (ethadv & ADVERTISED_Asym_Pause)
275 result |= ADVERTISE_PAUSE_ASYM;
276
277 return result;
278}
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287static inline u32 mii_adv_to_ethtool_adv_t(u32 adv)
288{
289 u32 result = 0;
290
291 if (adv & ADVERTISE_10HALF)
292 result |= ADVERTISED_10baseT_Half;
293 if (adv & ADVERTISE_10FULL)
294 result |= ADVERTISED_10baseT_Full;
295 if (adv & ADVERTISE_100HALF)
296 result |= ADVERTISED_100baseT_Half;
297 if (adv & ADVERTISE_100FULL)
298 result |= ADVERTISED_100baseT_Full;
299 if (adv & ADVERTISE_PAUSE_CAP)
300 result |= ADVERTISED_Pause;
301 if (adv & ADVERTISE_PAUSE_ASYM)
302 result |= ADVERTISED_Asym_Pause;
303
304 return result;
305}
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315static inline u32 ethtool_adv_to_mii_ctrl1000_t(u32 ethadv)
316{
317 u32 result = 0;
318
319 if (ethadv & ADVERTISED_1000baseT_Half)
320 result |= ADVERTISE_1000HALF;
321 if (ethadv & ADVERTISED_1000baseT_Full)
322 result |= ADVERTISE_1000FULL;
323
324 return result;
325}
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335static inline u32 mii_ctrl1000_to_ethtool_adv_t(u32 adv)
336{
337 u32 result = 0;
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339 if (adv & ADVERTISE_1000HALF)
340 result |= ADVERTISED_1000baseT_Half;
341 if (adv & ADVERTISE_1000FULL)
342 result |= ADVERTISED_1000baseT_Full;
343
344 return result;
345}
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355static inline u32 mii_lpa_to_ethtool_lpa_t(u32 lpa)
356{
357 u32 result = 0;
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359 if (lpa & LPA_LPACK)
360 result |= ADVERTISED_Autoneg;
361
362 return result | mii_adv_to_ethtool_adv_t(lpa);
363}
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373static inline u32 mii_stat1000_to_ethtool_lpa_t(u32 lpa)
374{
375 u32 result = 0;
376
377 if (lpa & LPA_1000HALF)
378 result |= ADVERTISED_1000baseT_Half;
379 if (lpa & LPA_1000FULL)
380 result |= ADVERTISED_1000baseT_Full;
381
382 return result;
383}
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393static inline u32 ethtool_adv_to_mii_adv_x(u32 ethadv)
394{
395 u32 result = 0;
396
397 if (ethadv & ADVERTISED_1000baseT_Half)
398 result |= ADVERTISE_1000XHALF;
399 if (ethadv & ADVERTISED_1000baseT_Full)
400 result |= ADVERTISE_1000XFULL;
401 if (ethadv & ADVERTISED_Pause)
402 result |= ADVERTISE_1000XPAUSE;
403 if (ethadv & ADVERTISED_Asym_Pause)
404 result |= ADVERTISE_1000XPSE_ASYM;
405
406 return result;
407}
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417static inline u32 mii_adv_to_ethtool_adv_x(u32 adv)
418{
419 u32 result = 0;
420
421 if (adv & ADVERTISE_1000XHALF)
422 result |= ADVERTISED_1000baseT_Half;
423 if (adv & ADVERTISE_1000XFULL)
424 result |= ADVERTISED_1000baseT_Full;
425 if (adv & ADVERTISE_1000XPAUSE)
426 result |= ADVERTISED_Pause;
427 if (adv & ADVERTISE_1000XPSE_ASYM)
428 result |= ADVERTISED_Asym_Pause;
429
430 return result;
431}
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441static inline u32 mii_lpa_to_ethtool_lpa_x(u32 lpa)
442{
443 u32 result = 0;
444
445 if (lpa & LPA_LPACK)
446 result |= ADVERTISED_Autoneg;
447
448 return result | mii_adv_to_ethtool_adv_x(lpa);
449}
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455static inline u16 mii_advertise_flowctrl(int cap)
456{
457 u16 adv = 0;
458
459 if (cap & FLOW_CTRL_RX)
460 adv = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
461 if (cap & FLOW_CTRL_TX)
462 adv ^= ADVERTISE_PAUSE_ASYM;
463
464 return adv;
465}
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474static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv)
475{
476 u8 cap = 0;
477
478 if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) {
479 cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
480 } else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) {
481 if (lcladv & ADVERTISE_PAUSE_CAP)
482 cap = FLOW_CTRL_RX;
483 else if (rmtadv & ADVERTISE_PAUSE_CAP)
484 cap = FLOW_CTRL_TX;
485 }
486
487 return cap;
488}
489
490#endif
491#endif
492