LXR linux/include/drm/intel-gtt.h

   1/* Common header for intel-gtt.ko and i915.ko */
   2
   3#ifndef _DRM_INTEL_GTT_H
   4#define _DRM_INTEL_GTT_H
   5
   6const struct intel_gtt {
   7        /* Size of memory reserved for graphics by the BIOS */
   8        unsigned int stolen_size;
   9        /* Total number of gtt entries. */
  10        unsigned int gtt_total_entries;
  11        /* Part of the gtt that is mappable by the cpu, for those chips where
  12         * this is not the full gtt. */
  13        unsigned int gtt_mappable_entries;
  14        /* Whether i915 needs to use the dmar apis or not. */
  15        unsigned int needs_dmar : 1;
  16        /* Whether we idle the gpu before mapping/unmapping */
  17        unsigned int do_idle_maps : 1;
  18        /* Share the scratch page dma with ppgtts. */
  19        dma_addr_t scratch_page_dma;
  20        /* for ppgtt PDE access */
  21        u32 __iomem *gtt;
  22        /* needed for ioremap in drm/i915 */
  23        phys_addr_t gma_bus_addr;
  24} *intel_gtt_get(void);
  25
  26int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
  27                     struct agp_bridge_data *bridge);
  28void intel_gmch_remove(void);
  29
  30bool intel_enable_gtt(void);
  31
  32void intel_gtt_chipset_flush(void);
  33void intel_gtt_unmap_memory(struct scatterlist *sg_list, int num_sg);
  34void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
  35int intel_gtt_map_memory(struct page **pages, unsigned int num_entries,
  36                         struct scatterlist **sg_list, int *num_sg);
  37void intel_gtt_insert_sg_entries(struct scatterlist *sg_list,
  38                                 unsigned int sg_len,
  39                                 unsigned int pg_start,
  40                                 unsigned int flags);
  41void intel_gtt_insert_pages(unsigned int first_entry, unsigned int num_entries,
  42                            struct page **pages, unsigned int flags);
  43
  44/* Special gtt memory types */
  45#define AGP_DCACHE_MEMORY       1
  46#define AGP_PHYS_MEMORY         2
  47
  48/* New caching attributes for gen6/sandybridge */
  49#define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2)
  50#define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4)
  51
  52/* flag for GFDT type */
  53#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
  54
  55#ifdef CONFIG_INTEL_IOMMU
  56extern int intel_iommu_gfx_mapped;
  57#endif
  58
  59#endif
  60